2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2010 Fabien Thomas
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33 #include <sys/cdefs.h>
34 #include <sys/param.h>
37 #include <sys/pmckern.h>
38 #include <sys/systm.h>
40 #include <machine/intr_machdep.h>
41 #include <x86/apicvar.h>
42 #include <machine/cpu.h>
43 #include <machine/cpufunc.h>
44 #include <machine/specialreg.h>
46 #define UCF_PMC_CAPS \
47 (PMC_CAP_READ | PMC_CAP_WRITE)
49 #define UCP_PMC_CAPS \
50 (PMC_CAP_EDGE | PMC_CAP_THRESHOLD | PMC_CAP_READ | PMC_CAP_WRITE | \
51 PMC_CAP_INVERT | PMC_CAP_QUALIFIER | PMC_CAP_PRECISE)
53 #define SELECTSEL(x) \
54 (((x) == PMC_CPU_INTEL_SANDYBRIDGE || (x) == PMC_CPU_INTEL_HASWELL) ? \
55 UCP_CB0_EVSEL0 : UCP_EVSEL0)
57 #define SELECTOFF(x) \
58 (((x) == PMC_CPU_INTEL_SANDYBRIDGE || (x) == PMC_CPU_INTEL_HASWELL) ? \
59 UCF_OFFSET_SB : UCF_OFFSET)
61 static enum pmc_cputype uncore_cputype;
64 volatile uint32_t pc_ucfctrl; /* Fixed function control. */
65 volatile uint64_t pc_globalctrl; /* Global control register. */
66 struct pmc_hw pc_uncorepmcs[];
69 static struct uncore_cpu **uncore_pcpu;
71 static uint64_t uncore_pmcmask;
73 static int uncore_ucf_ri; /* relative index of fixed counters */
74 static int uncore_ucf_width;
75 static int uncore_ucf_npmc;
77 static int uncore_ucp_width;
78 static int uncore_ucp_npmc;
81 uncore_pcpu_noop(struct pmc_mdep *md, int cpu)
89 uncore_pcpu_init(struct pmc_mdep *md, int cpu)
92 struct uncore_cpu *cc;
94 int uncore_ri, n, npmc;
96 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
97 ("[ucf,%d] insane cpu number %d", __LINE__, cpu));
99 PMCDBG1(MDP,INI,1,"uncore-init cpu=%d", cpu);
101 uncore_ri = md->pmd_classdep[PMC_MDEP_CLASS_INDEX_UCP].pcd_ri;
102 npmc = md->pmd_classdep[PMC_MDEP_CLASS_INDEX_UCP].pcd_num;
103 npmc += md->pmd_classdep[PMC_MDEP_CLASS_INDEX_UCF].pcd_num;
105 cc = malloc(sizeof(struct uncore_cpu) + npmc * sizeof(struct pmc_hw),
106 M_PMC, M_WAITOK | M_ZERO);
108 uncore_pcpu[cpu] = cc;
111 KASSERT(pc != NULL && cc != NULL,
112 ("[uncore,%d] NULL per-cpu structures cpu=%d", __LINE__, cpu));
114 for (n = 0, phw = cc->pc_uncorepmcs; n < npmc; n++, phw++) {
115 phw->phw_state = PMC_PHW_FLAG_IS_ENABLED |
116 PMC_PHW_CPU_TO_STATE(cpu) |
117 PMC_PHW_INDEX_TO_STATE(n + uncore_ri);
119 pc->pc_hwpmcs[n + uncore_ri] = phw;
126 uncore_pcpu_fini(struct pmc_mdep *md, int cpu)
128 int uncore_ri, n, npmc;
130 struct uncore_cpu *cc;
132 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
133 ("[uncore,%d] insane cpu number (%d)", __LINE__, cpu));
135 PMCDBG1(MDP,INI,1,"uncore-pcpu-fini cpu=%d", cpu);
137 if ((cc = uncore_pcpu[cpu]) == NULL)
140 uncore_pcpu[cpu] = NULL;
144 KASSERT(pc != NULL, ("[uncore,%d] NULL per-cpu %d state", __LINE__,
147 npmc = md->pmd_classdep[PMC_MDEP_CLASS_INDEX_UCP].pcd_num;
148 uncore_ri = md->pmd_classdep[PMC_MDEP_CLASS_INDEX_UCP].pcd_ri;
150 for (n = 0; n < npmc; n++)
151 wrmsr(SELECTSEL(uncore_cputype) + n, 0);
154 npmc += md->pmd_classdep[PMC_MDEP_CLASS_INDEX_UCF].pcd_num;
156 for (n = 0; n < npmc; n++)
157 pc->pc_hwpmcs[n + uncore_ri] = NULL;
165 * Fixed function counters.
169 ucf_perfctr_value_to_reload_count(pmc_value_t v)
172 /* If the PMC has overflowed, return a reload count of zero. */
173 if ((v & (1ULL << (uncore_ucf_width - 1))) == 0)
175 v &= (1ULL << uncore_ucf_width) - 1;
176 return (1ULL << uncore_ucf_width) - v;
180 ucf_reload_count_to_perfctr_value(pmc_value_t rlc)
182 return (1ULL << uncore_ucf_width) - rlc;
186 ucf_allocate_pmc(int cpu, int ri, struct pmc *pm,
187 const struct pmc_op_pmcallocate *a)
191 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
192 ("[uncore,%d] illegal CPU %d", __LINE__, cpu));
194 PMCDBG2(MDP,ALL,1, "ucf-allocate ri=%d reqcaps=0x%x", ri, pm->pm_caps);
196 if (ri < 0 || ri > uncore_ucf_npmc)
199 if (a->pm_class != PMC_CLASS_UCF)
202 if ((a->pm_flags & PMC_F_EV_PMU) == 0)
207 pm->pm_md.pm_ucf.pm_ucf_ctrl = (flags << (ri * 4));
209 PMCDBG1(MDP,ALL,2, "ucf-allocate config=0x%jx",
210 (uintmax_t) pm->pm_md.pm_ucf.pm_ucf_ctrl);
216 ucf_config_pmc(int cpu, int ri, struct pmc *pm)
218 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
219 ("[uncore,%d] illegal CPU %d", __LINE__, cpu));
221 KASSERT(ri >= 0 && ri < uncore_ucf_npmc,
222 ("[uncore,%d] illegal row-index %d", __LINE__, ri));
224 PMCDBG3(MDP,CFG,1, "ucf-config cpu=%d ri=%d pm=%p", cpu, ri, pm);
226 KASSERT(uncore_pcpu[cpu] != NULL, ("[uncore,%d] null per-cpu %d", __LINE__,
229 uncore_pcpu[cpu]->pc_uncorepmcs[ri + uncore_ucf_ri].phw_pmc = pm;
235 ucf_describe(int cpu, int ri, struct pmc_info *pi, struct pmc **ppmc)
239 phw = &uncore_pcpu[cpu]->pc_uncorepmcs[ri + uncore_ucf_ri];
241 snprintf(pi->pm_name, sizeof(pi->pm_name), "UCF-%d", ri);
242 pi->pm_class = PMC_CLASS_UCF;
244 if (phw->phw_state & PMC_PHW_FLAG_IS_ENABLED) {
245 pi->pm_enabled = TRUE;
246 *ppmc = phw->phw_pmc;
248 pi->pm_enabled = FALSE;
256 ucf_get_config(int cpu, int ri, struct pmc **ppm)
258 *ppm = uncore_pcpu[cpu]->pc_uncorepmcs[ri + uncore_ucf_ri].phw_pmc;
264 ucf_read_pmc(int cpu, int ri, struct pmc *pm, pmc_value_t *v)
268 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
269 ("[uncore,%d] illegal cpu value %d", __LINE__, cpu));
270 KASSERT(ri >= 0 && ri < uncore_ucf_npmc,
271 ("[uncore,%d] illegal row-index %d", __LINE__, ri));
273 tmp = rdmsr(UCF_CTR0 + ri);
275 if (PMC_IS_SAMPLING_MODE(PMC_TO_MODE(pm)))
276 *v = ucf_perfctr_value_to_reload_count(tmp);
280 PMCDBG3(MDP,REA,1, "ucf-read cpu=%d ri=%d -> v=%jx", cpu, ri, *v);
286 ucf_release_pmc(int cpu, int ri, struct pmc *pmc)
288 PMCDBG3(MDP,REL,1, "ucf-release cpu=%d ri=%d pm=%p", cpu, ri, pmc);
290 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
291 ("[uncore,%d] illegal CPU value %d", __LINE__, cpu));
292 KASSERT(ri >= 0 && ri < uncore_ucf_npmc,
293 ("[uncore,%d] illegal row-index %d", __LINE__, ri));
295 KASSERT(uncore_pcpu[cpu]->pc_uncorepmcs[ri + uncore_ucf_ri].phw_pmc == NULL,
296 ("[uncore,%d] PHW pmc non-NULL", __LINE__));
302 ucf_start_pmc(int cpu, int ri, struct pmc *pm)
304 struct uncore_cpu *ucfc;
306 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
307 ("[uncore,%d] illegal CPU value %d", __LINE__, cpu));
308 KASSERT(ri >= 0 && ri < uncore_ucf_npmc,
309 ("[uncore,%d] illegal row-index %d", __LINE__, ri));
311 PMCDBG2(MDP,STA,1,"ucf-start cpu=%d ri=%d", cpu, ri);
313 ucfc = uncore_pcpu[cpu];
314 ucfc->pc_ucfctrl |= pm->pm_md.pm_ucf.pm_ucf_ctrl;
316 wrmsr(UCF_CTRL, ucfc->pc_ucfctrl);
318 ucfc->pc_globalctrl |= (1ULL << (ri + SELECTOFF(uncore_cputype)));
319 wrmsr(UC_GLOBAL_CTRL, ucfc->pc_globalctrl);
321 PMCDBG4(MDP,STA,1,"ucfctrl=%x(%x) globalctrl=%jx(%jx)",
322 ucfc->pc_ucfctrl, (uint32_t) rdmsr(UCF_CTRL),
323 ucfc->pc_globalctrl, rdmsr(UC_GLOBAL_CTRL));
329 ucf_stop_pmc(int cpu, int ri, struct pmc *pm __unused)
332 struct uncore_cpu *ucfc;
334 PMCDBG2(MDP,STO,1,"ucf-stop cpu=%d ri=%d", cpu, ri);
336 ucfc = uncore_pcpu[cpu];
338 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
339 ("[uncore,%d] illegal CPU value %d", __LINE__, cpu));
340 KASSERT(ri >= 0 && ri < uncore_ucf_npmc,
341 ("[uncore,%d] illegal row-index %d", __LINE__, ri));
343 fc = (UCF_MASK << (ri * 4));
345 ucfc->pc_ucfctrl &= ~fc;
347 PMCDBG1(MDP,STO,1,"ucf-stop ucfctrl=%x", ucfc->pc_ucfctrl);
348 wrmsr(UCF_CTRL, ucfc->pc_ucfctrl);
350 /* Don't need to write UC_GLOBAL_CTRL, one disable is enough. */
352 PMCDBG4(MDP,STO,1,"ucfctrl=%x(%x) globalctrl=%jx(%jx)",
353 ucfc->pc_ucfctrl, (uint32_t) rdmsr(UCF_CTRL),
354 ucfc->pc_globalctrl, rdmsr(UC_GLOBAL_CTRL));
360 ucf_write_pmc(int cpu, int ri, struct pmc *pm, pmc_value_t v)
362 struct uncore_cpu *cc;
364 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
365 ("[uncore,%d] illegal cpu value %d", __LINE__, cpu));
366 KASSERT(ri >= 0 && ri < uncore_ucf_npmc,
367 ("[uncore,%d] illegal row-index %d", __LINE__, ri));
369 cc = uncore_pcpu[cpu];
371 if (PMC_IS_SAMPLING_MODE(PMC_TO_MODE(pm)))
372 v = ucf_reload_count_to_perfctr_value(v);
374 wrmsr(UCF_CTRL, 0); /* Turn off fixed counters */
375 wrmsr(UCF_CTR0 + ri, v);
376 wrmsr(UCF_CTRL, cc->pc_ucfctrl);
378 PMCDBG4(MDP,WRI,1, "ucf-write cpu=%d ri=%d v=%jx ucfctrl=%jx ",
379 cpu, ri, v, (uintmax_t) rdmsr(UCF_CTRL));
386 ucf_initialize(struct pmc_mdep *md, int maxcpu, int npmc, int pmcwidth)
388 struct pmc_classdep *pcd;
390 KASSERT(md != NULL, ("[ucf,%d] md is NULL", __LINE__));
392 PMCDBG0(MDP,INI,1, "ucf-initialize");
394 pcd = &md->pmd_classdep[PMC_MDEP_CLASS_INDEX_UCF];
396 pcd->pcd_caps = UCF_PMC_CAPS;
397 pcd->pcd_class = PMC_CLASS_UCF;
399 pcd->pcd_ri = md->pmd_npmc;
400 pcd->pcd_width = pmcwidth;
402 pcd->pcd_allocate_pmc = ucf_allocate_pmc;
403 pcd->pcd_config_pmc = ucf_config_pmc;
404 pcd->pcd_describe = ucf_describe;
405 pcd->pcd_get_config = ucf_get_config;
406 pcd->pcd_get_msr = NULL;
407 pcd->pcd_pcpu_fini = uncore_pcpu_noop;
408 pcd->pcd_pcpu_init = uncore_pcpu_noop;
409 pcd->pcd_read_pmc = ucf_read_pmc;
410 pcd->pcd_release_pmc = ucf_release_pmc;
411 pcd->pcd_start_pmc = ucf_start_pmc;
412 pcd->pcd_stop_pmc = ucf_stop_pmc;
413 pcd->pcd_write_pmc = ucf_write_pmc;
415 md->pmd_npmc += npmc;
419 * Intel programmable PMCs.
423 * Event descriptor tables.
425 * For each event id, we track:
427 * 1. The CPUs that the event is valid for.
429 * 2. If the event uses a fixed UMASK, the value of the umask field.
430 * If the event doesn't use a fixed UMASK, a mask of legal bits
434 struct ucp_event_descr {
435 enum pmc_event ucp_ev;
436 unsigned char ucp_evcode;
437 unsigned char ucp_umask;
438 unsigned char ucp_flags;
441 #define UCP_F_I7 (1 << 0) /* CPU: Core i7 */
442 #define UCP_F_WM (1 << 1) /* CPU: Westmere */
443 #define UCP_F_SB (1 << 2) /* CPU: Sandy Bridge */
444 #define UCP_F_HW (1 << 3) /* CPU: Haswell */
445 #define UCP_F_FM (1 << 4) /* Fixed mask */
447 #define UCP_F_ALLCPUS \
448 (UCP_F_I7 | UCP_F_WM)
450 #define UCP_F_CMASK 0xFF000000
453 ucp_perfctr_value_to_reload_count(pmc_value_t v)
455 v &= (1ULL << uncore_ucp_width) - 1;
456 return (1ULL << uncore_ucp_width) - v;
460 ucp_reload_count_to_perfctr_value(pmc_value_t rlc)
462 return (1ULL << uncore_ucp_width) - rlc;
466 * Counter specific event information for Sandybridge and Haswell
469 ucp_event_sb_hw_ok_on_counter(uint8_t ev, int ri)
475 * Events valid only on counter 0.
483 mask = ~0; /* Any row index is ok. */
486 return (mask & (1 << ri));
490 ucp_allocate_pmc(int cpu, int ri, struct pmc *pm,
491 const struct pmc_op_pmcallocate *a)
494 const struct pmc_md_ucp_op_pmcallocate *ucp;
496 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
497 ("[uncore,%d] illegal CPU %d", __LINE__, cpu));
498 KASSERT(ri >= 0 && ri < uncore_ucp_npmc,
499 ("[uncore,%d] illegal row-index value %d", __LINE__, ri));
501 if (a->pm_class != PMC_CLASS_UCP)
504 if ((a->pm_flags & PMC_F_EV_PMU) == 0)
507 ucp = &a->pm_md.pm_ucp;
508 ev = UCP_EVSEL(ucp->pm_ucp_config);
509 switch (uncore_cputype) {
510 case PMC_CPU_INTEL_HASWELL:
511 case PMC_CPU_INTEL_SANDYBRIDGE:
512 if (ucp_event_sb_hw_ok_on_counter(ev, ri) == 0)
519 pm->pm_md.pm_ucp.pm_ucp_evsel = ucp->pm_ucp_config | UCP_EN;
525 ucp_config_pmc(int cpu, int ri, struct pmc *pm)
527 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
528 ("[uncore,%d] illegal CPU %d", __LINE__, cpu));
530 KASSERT(ri >= 0 && ri < uncore_ucp_npmc,
531 ("[uncore,%d] illegal row-index %d", __LINE__, ri));
533 PMCDBG3(MDP,CFG,1, "ucp-config cpu=%d ri=%d pm=%p", cpu, ri, pm);
535 KASSERT(uncore_pcpu[cpu] != NULL, ("[uncore,%d] null per-cpu %d", __LINE__,
538 uncore_pcpu[cpu]->pc_uncorepmcs[ri].phw_pmc = pm;
544 ucp_describe(int cpu, int ri, struct pmc_info *pi, struct pmc **ppmc)
548 phw = &uncore_pcpu[cpu]->pc_uncorepmcs[ri];
550 snprintf(pi->pm_name, sizeof(pi->pm_name), "UCP-%d", ri);
551 pi->pm_class = PMC_CLASS_UCP;
553 if (phw->phw_state & PMC_PHW_FLAG_IS_ENABLED) {
554 pi->pm_enabled = TRUE;
555 *ppmc = phw->phw_pmc;
557 pi->pm_enabled = FALSE;
565 ucp_get_config(int cpu, int ri, struct pmc **ppm)
567 *ppm = uncore_pcpu[cpu]->pc_uncorepmcs[ri].phw_pmc;
573 ucp_read_pmc(int cpu, int ri, struct pmc *pm, pmc_value_t *v)
577 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
578 ("[uncore,%d] illegal cpu value %d", __LINE__, cpu));
579 KASSERT(ri >= 0 && ri < uncore_ucp_npmc,
580 ("[uncore,%d] illegal row-index %d", __LINE__, ri));
582 tmp = rdmsr(UCP_PMC0 + ri);
583 if (PMC_IS_SAMPLING_MODE(PMC_TO_MODE(pm)))
584 *v = ucp_perfctr_value_to_reload_count(tmp);
588 PMCDBG4(MDP,REA,1, "ucp-read cpu=%d ri=%d msr=0x%x -> v=%jx", cpu, ri,
595 ucp_release_pmc(int cpu, int ri, struct pmc *pm)
599 PMCDBG3(MDP,REL,1, "ucp-release cpu=%d ri=%d pm=%p", cpu, ri,
602 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
603 ("[uncore,%d] illegal CPU value %d", __LINE__, cpu));
604 KASSERT(ri >= 0 && ri < uncore_ucp_npmc,
605 ("[uncore,%d] illegal row-index %d", __LINE__, ri));
607 KASSERT(uncore_pcpu[cpu]->pc_uncorepmcs[ri].phw_pmc
608 == NULL, ("[uncore,%d] PHW pmc non-NULL", __LINE__));
614 ucp_start_pmc(int cpu, int ri, struct pmc *pm)
617 struct uncore_cpu *cc;
619 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
620 ("[uncore,%d] illegal CPU value %d", __LINE__, cpu));
621 KASSERT(ri >= 0 && ri < uncore_ucp_npmc,
622 ("[uncore,%d] illegal row-index %d", __LINE__, ri));
624 cc = uncore_pcpu[cpu];
626 PMCDBG2(MDP,STA,1, "ucp-start cpu=%d ri=%d", cpu, ri);
628 evsel = pm->pm_md.pm_ucp.pm_ucp_evsel;
631 "ucp-start/2 cpu=%d ri=%d evselmsr=0x%x evsel=0x%x",
632 cpu, ri, SELECTSEL(uncore_cputype) + ri, evsel);
634 wrmsr(SELECTSEL(uncore_cputype) + ri, evsel);
636 cc->pc_globalctrl |= (1ULL << ri);
637 wrmsr(UC_GLOBAL_CTRL, cc->pc_globalctrl);
643 ucp_stop_pmc(int cpu, int ri, struct pmc *pm __unused)
646 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
647 ("[uncore,%d] illegal cpu value %d", __LINE__, cpu));
648 KASSERT(ri >= 0 && ri < uncore_ucp_npmc,
649 ("[uncore,%d] illegal row index %d", __LINE__, ri));
651 PMCDBG2(MDP,STO,1, "ucp-stop cpu=%d ri=%d", cpu, ri);
654 wrmsr(SELECTSEL(uncore_cputype) + ri, 0);
656 /* Don't need to write UC_GLOBAL_CTRL, one disable is enough. */
662 ucp_write_pmc(int cpu, int ri, struct pmc *pm, pmc_value_t v)
665 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
666 ("[uncore,%d] illegal cpu value %d", __LINE__, cpu));
667 KASSERT(ri >= 0 && ri < uncore_ucp_npmc,
668 ("[uncore,%d] illegal row index %d", __LINE__, ri));
670 PMCDBG4(MDP,WRI,1, "ucp-write cpu=%d ri=%d msr=0x%x v=%jx", cpu, ri,
673 if (PMC_IS_SAMPLING_MODE(PMC_TO_MODE(pm)))
674 v = ucp_reload_count_to_perfctr_value(v);
677 * Write the new value to the counter. The counter will be in
678 * a stopped state when the pcd_write() entry point is called.
681 wrmsr(UCP_PMC0 + ri, v);
688 ucp_initialize(struct pmc_mdep *md, int maxcpu, int npmc, int pmcwidth)
690 struct pmc_classdep *pcd;
692 KASSERT(md != NULL, ("[ucp,%d] md is NULL", __LINE__));
694 PMCDBG0(MDP,INI,1, "ucp-initialize");
696 pcd = &md->pmd_classdep[PMC_MDEP_CLASS_INDEX_UCP];
698 pcd->pcd_caps = UCP_PMC_CAPS;
699 pcd->pcd_class = PMC_CLASS_UCP;
701 pcd->pcd_ri = md->pmd_npmc;
702 pcd->pcd_width = pmcwidth;
704 pcd->pcd_allocate_pmc = ucp_allocate_pmc;
705 pcd->pcd_config_pmc = ucp_config_pmc;
706 pcd->pcd_describe = ucp_describe;
707 pcd->pcd_get_config = ucp_get_config;
708 pcd->pcd_get_msr = NULL;
709 pcd->pcd_pcpu_fini = uncore_pcpu_fini;
710 pcd->pcd_pcpu_init = uncore_pcpu_init;
711 pcd->pcd_read_pmc = ucp_read_pmc;
712 pcd->pcd_release_pmc = ucp_release_pmc;
713 pcd->pcd_start_pmc = ucp_start_pmc;
714 pcd->pcd_stop_pmc = ucp_stop_pmc;
715 pcd->pcd_write_pmc = ucp_write_pmc;
717 md->pmd_npmc += npmc;
721 pmc_uncore_initialize(struct pmc_mdep *md, int maxcpu)
723 uncore_cputype = md->pmd_cputype;
727 * Initialize programmable counters.
731 uncore_ucp_width = 48;
733 uncore_pmcmask |= ((1ULL << uncore_ucp_npmc) - 1);
735 ucp_initialize(md, maxcpu, uncore_ucp_npmc, uncore_ucp_width);
738 * Initialize fixed function counters, if present.
740 uncore_ucf_ri = uncore_ucp_npmc;
742 uncore_ucf_width = 48;
744 ucf_initialize(md, maxcpu, uncore_ucf_npmc, uncore_ucf_width);
745 uncore_pmcmask |= ((1ULL << uncore_ucf_npmc) - 1) << SELECTOFF(uncore_cputype);
747 PMCDBG2(MDP,INI,1,"uncore-init pmcmask=0x%jx ucfri=%d", uncore_pmcmask,
750 uncore_pcpu = malloc(sizeof(*uncore_pcpu) * maxcpu, M_PMC,
757 pmc_uncore_finalize(struct pmc_mdep *md)
759 PMCDBG0(MDP,INI,1, "uncore-finalize");
761 free(uncore_pcpu, M_PMC);