1 /* SPDX-License-Identifier: BSD-3-Clause */
2 /* Copyright (c) 2021, Intel Corporation
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are met:
8 * 1. Redistributions of source code must retain the above copyright notice,
9 * this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * 3. Neither the name of the Intel Corporation nor the names of its
16 * contributors may be used to endorse or promote products derived from
17 * this software without specific prior written permission.
19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
23 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
33 #ifndef _ICE_COMMON_H_
34 #define _ICE_COMMON_H_
38 #include "ice_flex_pipe.h"
40 #include "ice_switch.h"
42 #define ICE_SQ_SEND_DELAY_TIME_MS 10
43 #define ICE_SQ_SEND_MAX_EXECUTE 3
52 void ice_idle_aq(struct ice_hw *hw, struct ice_ctl_q_info *cq);
53 bool ice_sq_done(struct ice_hw *hw, struct ice_ctl_q_info *cq);
55 void ice_set_umac_shared(struct ice_hw *hw);
56 enum ice_status ice_init_hw(struct ice_hw *hw);
57 void ice_deinit_hw(struct ice_hw *hw);
58 enum ice_status ice_check_reset(struct ice_hw *hw);
59 enum ice_status ice_reset(struct ice_hw *hw, enum ice_reset_req req);
61 enum ice_status ice_create_all_ctrlq(struct ice_hw *hw);
62 enum ice_status ice_init_all_ctrlq(struct ice_hw *hw);
63 void ice_shutdown_all_ctrlq(struct ice_hw *hw);
64 void ice_destroy_all_ctrlq(struct ice_hw *hw);
66 ice_clean_rq_elem(struct ice_hw *hw, struct ice_ctl_q_info *cq,
67 struct ice_rq_event_info *e, u16 *pending);
69 ice_get_link_status(struct ice_port_info *pi, bool *link_up);
70 enum ice_status ice_update_link_info(struct ice_port_info *pi);
72 ice_acquire_res(struct ice_hw *hw, enum ice_aq_res_ids res,
73 enum ice_aq_res_access_type access, u32 timeout);
74 void ice_release_res(struct ice_hw *hw, enum ice_aq_res_ids res);
76 ice_alloc_hw_res(struct ice_hw *hw, u16 type, u16 num, bool btm, u16 *res);
78 ice_free_hw_res(struct ice_hw *hw, u16 type, u16 num, u16 *res);
80 ice_aq_alloc_free_res(struct ice_hw *hw, u16 num_entries,
81 struct ice_aqc_alloc_free_res_elem *buf, u16 buf_size,
82 enum ice_adminq_opc opc, struct ice_sq_cd *cd);
84 ice_sq_send_cmd(struct ice_hw *hw, struct ice_ctl_q_info *cq,
85 struct ice_aq_desc *desc, void *buf, u16 buf_size,
86 struct ice_sq_cd *cd);
87 void ice_clear_pxe_mode(struct ice_hw *hw);
89 enum ice_status ice_get_caps(struct ice_hw *hw);
91 void ice_set_safe_mode_caps(struct ice_hw *hw);
94 ice_aq_get_internal_data(struct ice_hw *hw, u8 cluster_id, u16 table_id,
95 u32 start, void *buf, u16 buf_size, u16 *ret_buf_size,
96 u16 *ret_next_table, u32 *ret_next_index,
97 struct ice_sq_cd *cd);
99 enum ice_status ice_set_mac_type(struct ice_hw *hw);
101 /* Define a macro that will align a pointer to point to the next memory address
102 * that falls on the given power of 2 (i.e., 2, 4, 8, 16, 32, 64...). For
103 * example, given the variable pointer = 0x1006, then after the following call:
105 * pointer = ICE_ALIGN(pointer, 4)
107 * ... the value of pointer would equal 0x1008, since 0x1008 is the next
108 * address after 0x1006 which is divisible by 4.
110 #define ICE_ALIGN(ptr, align) (((ptr) + ((align) - 1)) & ~((align) - 1))
113 ice_write_rxq_ctx(struct ice_hw *hw, struct ice_rlan_ctx *rlan_ctx,
115 enum ice_status ice_clear_rxq_ctx(struct ice_hw *hw, u32 rxq_index);
117 ice_clear_tx_cmpltnq_ctx(struct ice_hw *hw, u32 tx_cmpltnq_index);
119 ice_write_tx_cmpltnq_ctx(struct ice_hw *hw,
120 struct ice_tx_cmpltnq_ctx *tx_cmpltnq_ctx,
121 u32 tx_cmpltnq_index);
123 ice_clear_tx_drbell_q_ctx(struct ice_hw *hw, u32 tx_drbell_q_index);
125 ice_write_tx_drbell_q_ctx(struct ice_hw *hw,
126 struct ice_tx_drbell_q_ctx *tx_drbell_q_ctx,
127 u32 tx_drbell_q_index);
130 ice_aq_get_rss_lut(struct ice_hw *hw, struct ice_aq_get_set_rss_lut_params *get_params);
132 ice_aq_set_rss_lut(struct ice_hw *hw, struct ice_aq_get_set_rss_lut_params *set_params);
134 ice_aq_get_rss_key(struct ice_hw *hw, u16 vsi_handle,
135 struct ice_aqc_get_set_rss_keys *keys);
137 ice_aq_set_rss_key(struct ice_hw *hw, u16 vsi_handle,
138 struct ice_aqc_get_set_rss_keys *keys);
140 ice_aq_add_lan_txq(struct ice_hw *hw, u8 count,
141 struct ice_aqc_add_tx_qgrp *qg_list, u16 buf_size,
142 struct ice_sq_cd *cd);
144 ice_aq_move_recfg_lan_txq(struct ice_hw *hw, u8 num_qs, bool is_move,
145 bool is_tc_change, bool subseq_call, bool flush_pipe,
146 u8 timeout, u32 *blocked_cgds,
147 struct ice_aqc_move_txqs_data *buf, u16 buf_size,
148 u8 *txqs_moved, struct ice_sq_cd *cd);
150 bool ice_check_sq_alive(struct ice_hw *hw, struct ice_ctl_q_info *cq);
151 enum ice_status ice_aq_q_shutdown(struct ice_hw *hw, bool unloading);
152 void ice_fill_dflt_direct_cmd_desc(struct ice_aq_desc *desc, u16 opcode);
153 extern const struct ice_ctx_ele ice_tlan_ctx_info[];
155 ice_set_ctx(struct ice_hw *hw, u8 *src_ctx, u8 *dest_ctx,
156 const struct ice_ctx_ele *ce_info);
159 ice_aq_send_cmd(struct ice_hw *hw, struct ice_aq_desc *desc,
160 void *buf, u16 buf_size, struct ice_sq_cd *cd);
161 enum ice_status ice_aq_get_fw_ver(struct ice_hw *hw, struct ice_sq_cd *cd);
164 ice_aq_send_driver_ver(struct ice_hw *hw, struct ice_driver_ver *dv,
165 struct ice_sq_cd *cd);
167 ice_aq_set_port_params(struct ice_port_info *pi, u16 bad_frame_vsi,
168 bool save_bad_pac, bool pad_short_pac, bool double_vlan,
169 struct ice_sq_cd *cd);
171 ice_aq_get_phy_caps(struct ice_port_info *pi, bool qual_mods, u8 report_mode,
172 struct ice_aqc_get_phy_caps_data *caps,
173 struct ice_sq_cd *cd);
175 ice_aq_get_netlist_node(struct ice_hw *hw, struct ice_aqc_get_link_topo *cmd,
176 u8 *node_part_number, u16 *node_handle);
178 ice_find_netlist_node(struct ice_hw *hw, u8 node_type_ctx, u8 node_part_number,
181 ice_update_phy_type(u64 *phy_type_low, u64 *phy_type_high,
182 u16 link_speeds_bitmap);
184 ice_aq_manage_mac_read(struct ice_hw *hw, void *buf, u16 buf_size,
185 struct ice_sq_cd *cd);
187 ice_aq_manage_mac_write(struct ice_hw *hw, const u8 *mac_addr, u8 flags,
188 struct ice_sq_cd *cd);
190 enum ice_status ice_clear_pf_cfg(struct ice_hw *hw);
192 ice_aq_set_phy_cfg(struct ice_hw *hw, struct ice_port_info *pi,
193 struct ice_aqc_set_phy_cfg_data *cfg, struct ice_sq_cd *cd);
194 bool ice_fw_supports_link_override(struct ice_hw *hw);
196 ice_get_link_default_override(struct ice_link_default_override_tlv *ldo,
197 struct ice_port_info *pi);
198 bool ice_is_phy_caps_an_enabled(struct ice_aqc_get_phy_caps_data *caps);
200 enum ice_fc_mode ice_caps_to_fc_mode(u8 caps);
201 enum ice_fec_mode ice_caps_to_fec_mode(u8 caps, u8 fec_options);
203 ice_set_fc(struct ice_port_info *pi, u8 *aq_failures,
204 bool ena_auto_link_update);
206 ice_phy_caps_equals_cfg(struct ice_aqc_get_phy_caps_data *caps,
207 struct ice_aqc_set_phy_cfg_data *cfg);
209 ice_copy_phy_caps_to_cfg(struct ice_port_info *pi,
210 struct ice_aqc_get_phy_caps_data *caps,
211 struct ice_aqc_set_phy_cfg_data *cfg);
213 ice_cfg_phy_fec(struct ice_port_info *pi, struct ice_aqc_set_phy_cfg_data *cfg,
214 enum ice_fec_mode fec);
216 ice_aq_set_link_restart_an(struct ice_port_info *pi, bool ena_link,
217 struct ice_sq_cd *cd);
219 ice_aq_set_mac_cfg(struct ice_hw *hw, u16 max_frame_size, bool auto_drop,
220 struct ice_sq_cd *cd);
222 ice_aq_get_link_info(struct ice_port_info *pi, bool ena_lse,
223 struct ice_link_status *link, struct ice_sq_cd *cd);
225 ice_aq_set_event_mask(struct ice_hw *hw, u8 port_num, u16 mask,
226 struct ice_sq_cd *cd);
228 ice_aq_set_mac_loopback(struct ice_hw *hw, bool ena_lpbk, struct ice_sq_cd *cd);
231 ice_aq_set_port_id_led(struct ice_port_info *pi, bool is_orig_mode,
232 struct ice_sq_cd *cd);
234 ice_aq_sff_eeprom(struct ice_hw *hw, u16 lport, u8 bus_addr,
235 u16 mem_addr, u8 page, u8 set_page, u8 *data, u8 length,
236 bool write, struct ice_sq_cd *cd);
239 ice_aq_prog_topo_dev_nvm(struct ice_hw *hw,
240 struct ice_aqc_link_topo_params *topo_params,
241 struct ice_sq_cd *cd);
243 ice_aq_read_topo_dev_nvm(struct ice_hw *hw,
244 struct ice_aqc_link_topo_params *topo_params,
245 u32 start_address, u8 *buf, u8 buf_size,
246 struct ice_sq_cd *cd);
249 ice_aq_get_port_options(struct ice_hw *hw,
250 struct ice_aqc_get_port_options_elem *options,
251 u8 *option_count, u8 lport, bool lport_valid,
252 u8 *active_option_idx, bool *active_option_valid);
254 ice_get_ctx(u8 *src_ctx, u8 *dest_ctx, struct ice_ctx_ele *ce_info);
256 __ice_write_sr_word(struct ice_hw *hw, u32 offset, const u16 *data);
258 __ice_write_sr_buf(struct ice_hw *hw, u32 offset, u16 words, const u16 *data);
260 ice_dis_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u8 num_queues,
261 u16 *q_handle, u16 *q_ids, u32 *q_teids,
262 enum ice_disq_rst_src rst_src, u16 vmvf_num,
263 struct ice_sq_cd *cd);
265 ice_cfg_vsi_lan(struct ice_port_info *pi, u16 vsi_handle, u16 tc_bitmap,
268 ice_ena_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u16 q_handle,
269 u8 num_qgrps, struct ice_aqc_add_tx_qgrp *buf, u16 buf_size,
270 struct ice_sq_cd *cd);
272 ice_replay_pre_init(struct ice_hw *hw, struct ice_switch_info *sw);
273 enum ice_status ice_replay_vsi(struct ice_hw *hw, u16 vsi_handle);
274 void ice_replay_post(struct ice_hw *hw);
276 ice_get_lan_q_ctx(struct ice_hw *hw, u16 vsi_handle, u8 tc, u16 q_handle);
278 ice_stat_update40(struct ice_hw *hw, u32 reg, bool prev_stat_loaded,
279 u64 *prev_stat, u64 *cur_stat);
281 ice_stat_update32(struct ice_hw *hw, u32 reg, bool prev_stat_loaded,
282 u64 *prev_stat, u64 *cur_stat);
284 ice_stat_update_repc(struct ice_hw *hw, u16 vsi_handle, bool prev_stat_loaded,
285 struct ice_eth_stats *cur_stats);
286 enum ice_fw_modes ice_get_fw_mode(struct ice_hw *hw);
287 void ice_print_rollback_msg(struct ice_hw *hw);
288 bool ice_is_e810(struct ice_hw *hw);
289 bool ice_is_e810t(struct ice_hw *hw);
291 ice_aq_alternate_write(struct ice_hw *hw, u32 reg_addr0, u32 reg_val0,
292 u32 reg_addr1, u32 reg_val1);
294 ice_aq_alternate_read(struct ice_hw *hw, u32 reg_addr0, u32 *reg_val0,
295 u32 reg_addr1, u32 *reg_val1);
297 ice_aq_alternate_write_done(struct ice_hw *hw, u8 bios_mode,
299 enum ice_status ice_aq_alternate_clear(struct ice_hw *hw);
301 ice_sched_query_elem(struct ice_hw *hw, u32 node_teid,
302 struct ice_aqc_txsched_elem_data *buf);
304 ice_get_cur_lldp_persist_status(struct ice_hw *hw, u32 *lldp_status);
306 ice_get_dflt_lldp_persist_status(struct ice_hw *hw, u32 *lldp_status);
308 ice_aq_set_gpio(struct ice_hw *hw, u16 gpio_ctrl_handle, u8 pin_idx, bool value,
309 struct ice_sq_cd *cd);
311 ice_aq_get_gpio(struct ice_hw *hw, u16 gpio_ctrl_handle, u8 pin_idx,
312 bool *value, struct ice_sq_cd *cd);
313 bool ice_is_100m_speed_supported(struct ice_hw *hw);
314 enum ice_status ice_get_netlist_ver_info(struct ice_hw *hw, struct ice_netlist_info *netlist);
316 ice_aq_set_lldp_mib(struct ice_hw *hw, u8 mib_type, void *buf, u16 buf_size,
317 struct ice_sq_cd *cd);
318 bool ice_fw_supports_lldp_fltr_ctrl(struct ice_hw *hw);
320 ice_lldp_fltr_add_remove(struct ice_hw *hw, u16 vsi_num, bool add);
322 ice_aq_read_i2c(struct ice_hw *hw, struct ice_aqc_link_topo_addr topo_addr,
323 u16 bus_addr, __le16 addr, u8 params, u8 *data,
324 struct ice_sq_cd *cd);
326 ice_aq_write_i2c(struct ice_hw *hw, struct ice_aqc_link_topo_addr topo_addr,
327 u16 bus_addr, __le16 addr, u8 params, u8 *data,
328 struct ice_sq_cd *cd);
330 ice_aq_set_health_status_config(struct ice_hw *hw, u8 event_source,
331 struct ice_sq_cd *cd);
332 bool ice_is_fw_health_report_supported(struct ice_hw *hw);
333 bool ice_fw_supports_report_dflt_cfg(struct ice_hw *hw);
334 /* AQ API version for FW auto drop reports */
335 bool ice_is_fw_auto_drop_supported(struct ice_hw *hw);
336 #endif /* _ICE_COMMON_H_ */