1 /* SPDX-License-Identifier: BSD-3-Clause */
2 /* Copyright (c) 2020, Intel Corporation
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are met:
8 * 1. Redistributions of source code must retain the above copyright notice,
9 * this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * 3. Neither the name of the Intel Corporation nor the names of its
16 * contributors may be used to endorse or promote products derived from
17 * this software without specific prior written permission.
19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
23 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
36 #include "ice_flex_type.h"
38 #define ICE_IPV4_MAKE_PREFIX_MASK(prefix) ((u32)(~0) << (32 - (prefix)))
39 #define ICE_FLOW_PROF_ID_INVAL 0xfffffffffffffffful
40 #define ICE_FLOW_PROF_ID_BYPASS 0
41 #define ICE_FLOW_PROF_ID_DEFAULT 1
42 #define ICE_FLOW_ENTRY_HANDLE_INVAL 0
43 #define ICE_FLOW_VSI_INVAL 0xffff
44 #define ICE_FLOW_FLD_OFF_INVAL 0xffff
46 /* Generate flow hash field from flow field type(s) */
47 #define ICE_FLOW_HASH_IPV4 \
48 (BIT_ULL(ICE_FLOW_FIELD_IDX_IPV4_SA) | \
49 BIT_ULL(ICE_FLOW_FIELD_IDX_IPV4_DA))
50 #define ICE_FLOW_HASH_IPV6 \
51 (BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_SA) | \
52 BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_DA))
53 #define ICE_FLOW_HASH_TCP_PORT \
54 (BIT_ULL(ICE_FLOW_FIELD_IDX_TCP_SRC_PORT) | \
55 BIT_ULL(ICE_FLOW_FIELD_IDX_TCP_DST_PORT))
56 #define ICE_FLOW_HASH_UDP_PORT \
57 (BIT_ULL(ICE_FLOW_FIELD_IDX_UDP_SRC_PORT) | \
58 BIT_ULL(ICE_FLOW_FIELD_IDX_UDP_DST_PORT))
59 #define ICE_FLOW_HASH_SCTP_PORT \
60 (BIT_ULL(ICE_FLOW_FIELD_IDX_SCTP_SRC_PORT) | \
61 BIT_ULL(ICE_FLOW_FIELD_IDX_SCTP_DST_PORT))
63 #define ICE_HASH_INVALID 0
64 #define ICE_HASH_TCP_IPV4 (ICE_FLOW_HASH_IPV4 | ICE_FLOW_HASH_TCP_PORT)
65 #define ICE_HASH_TCP_IPV6 (ICE_FLOW_HASH_IPV6 | ICE_FLOW_HASH_TCP_PORT)
66 #define ICE_HASH_UDP_IPV4 (ICE_FLOW_HASH_IPV4 | ICE_FLOW_HASH_UDP_PORT)
67 #define ICE_HASH_UDP_IPV6 (ICE_FLOW_HASH_IPV6 | ICE_FLOW_HASH_UDP_PORT)
68 #define ICE_HASH_SCTP_IPV4 (ICE_FLOW_HASH_IPV4 | ICE_FLOW_HASH_SCTP_PORT)
69 #define ICE_HASH_SCTP_IPV6 (ICE_FLOW_HASH_IPV6 | ICE_FLOW_HASH_SCTP_PORT)
71 /* Protocol header fields within a packet segment. A segment consists of one or
72 * more protocol headers that make up a logical group of protocol headers. Each
73 * logical group of protocol headers encapsulates or is encapsulated using/by
74 * tunneling or encapsulation protocols for network virtualization such as GRE,
77 enum ice_flow_seg_hdr {
78 ICE_FLOW_SEG_HDR_NONE = 0x00000000,
79 ICE_FLOW_SEG_HDR_ETH = 0x00000001,
80 ICE_FLOW_SEG_HDR_VLAN = 0x00000002,
81 ICE_FLOW_SEG_HDR_IPV4 = 0x00000004,
82 ICE_FLOW_SEG_HDR_IPV6 = 0x00000008,
83 ICE_FLOW_SEG_HDR_ARP = 0x00000010,
84 ICE_FLOW_SEG_HDR_ICMP = 0x00000020,
85 ICE_FLOW_SEG_HDR_TCP = 0x00000040,
86 ICE_FLOW_SEG_HDR_UDP = 0x00000080,
87 ICE_FLOW_SEG_HDR_SCTP = 0x00000100,
88 ICE_FLOW_SEG_HDR_GRE = 0x00000200,
89 /* The following is an additive bit for ICE_FLOW_SEG_HDR_IPV4 and
90 * ICE_FLOW_SEG_HDR_IPV6 which include the IPV4 other PTYPEs
92 ICE_FLOW_SEG_HDR_IPV_OTHER = 0x20000000,
97 ICE_FLOW_FIELD_IDX_ETH_DA,
98 ICE_FLOW_FIELD_IDX_ETH_SA,
99 ICE_FLOW_FIELD_IDX_S_VLAN,
100 ICE_FLOW_FIELD_IDX_C_VLAN,
101 ICE_FLOW_FIELD_IDX_ETH_TYPE,
103 ICE_FLOW_FIELD_IDX_IPV4_DSCP,
104 ICE_FLOW_FIELD_IDX_IPV6_DSCP,
105 ICE_FLOW_FIELD_IDX_IPV4_TTL,
106 ICE_FLOW_FIELD_IDX_IPV4_PROT,
107 ICE_FLOW_FIELD_IDX_IPV6_TTL,
108 ICE_FLOW_FIELD_IDX_IPV6_PROT,
109 ICE_FLOW_FIELD_IDX_IPV4_SA,
110 ICE_FLOW_FIELD_IDX_IPV4_DA,
111 ICE_FLOW_FIELD_IDX_IPV6_SA,
112 ICE_FLOW_FIELD_IDX_IPV6_DA,
114 ICE_FLOW_FIELD_IDX_TCP_SRC_PORT,
115 ICE_FLOW_FIELD_IDX_TCP_DST_PORT,
116 ICE_FLOW_FIELD_IDX_UDP_SRC_PORT,
117 ICE_FLOW_FIELD_IDX_UDP_DST_PORT,
118 ICE_FLOW_FIELD_IDX_SCTP_SRC_PORT,
119 ICE_FLOW_FIELD_IDX_SCTP_DST_PORT,
120 ICE_FLOW_FIELD_IDX_TCP_FLAGS,
122 ICE_FLOW_FIELD_IDX_ARP_SIP,
123 ICE_FLOW_FIELD_IDX_ARP_DIP,
124 ICE_FLOW_FIELD_IDX_ARP_SHA,
125 ICE_FLOW_FIELD_IDX_ARP_DHA,
126 ICE_FLOW_FIELD_IDX_ARP_OP,
128 ICE_FLOW_FIELD_IDX_ICMP_TYPE,
129 ICE_FLOW_FIELD_IDX_ICMP_CODE,
131 ICE_FLOW_FIELD_IDX_GRE_KEYID,
132 /* The total number of enums must not exceed 64 */
133 ICE_FLOW_FIELD_IDX_MAX
136 /* Flow headers and fields for AVF support */
137 enum ice_flow_avf_hdr_field {
138 /* Values 0 - 28 are reserved for future use */
139 ICE_AVF_FLOW_FIELD_INVALID = 0,
140 ICE_AVF_FLOW_FIELD_UNICAST_IPV4_UDP = 29,
141 ICE_AVF_FLOW_FIELD_MULTICAST_IPV4_UDP,
142 ICE_AVF_FLOW_FIELD_IPV4_UDP,
143 ICE_AVF_FLOW_FIELD_IPV4_TCP_SYN_NO_ACK,
144 ICE_AVF_FLOW_FIELD_IPV4_TCP,
145 ICE_AVF_FLOW_FIELD_IPV4_SCTP,
146 ICE_AVF_FLOW_FIELD_IPV4_OTHER,
147 ICE_AVF_FLOW_FIELD_FRAG_IPV4,
148 /* Values 37-38 are reserved */
149 ICE_AVF_FLOW_FIELD_UNICAST_IPV6_UDP = 39,
150 ICE_AVF_FLOW_FIELD_MULTICAST_IPV6_UDP,
151 ICE_AVF_FLOW_FIELD_IPV6_UDP,
152 ICE_AVF_FLOW_FIELD_IPV6_TCP_SYN_NO_ACK,
153 ICE_AVF_FLOW_FIELD_IPV6_TCP,
154 ICE_AVF_FLOW_FIELD_IPV6_SCTP,
155 ICE_AVF_FLOW_FIELD_IPV6_OTHER,
156 ICE_AVF_FLOW_FIELD_FRAG_IPV6,
157 ICE_AVF_FLOW_FIELD_RSVD47,
158 ICE_AVF_FLOW_FIELD_FCOE_OX,
159 ICE_AVF_FLOW_FIELD_FCOE_RX,
160 ICE_AVF_FLOW_FIELD_FCOE_OTHER,
161 /* Values 51-62 are reserved */
162 ICE_AVF_FLOW_FIELD_L2_PAYLOAD = 63,
163 ICE_AVF_FLOW_FIELD_MAX
166 /* Supported RSS offloads This macro is defined to support
167 * VIRTCHNL_OP_GET_RSS_HENA_CAPS ops. PF driver sends the RSS hardware
168 * capabilities to the caller of this ops.
170 #define ICE_DEFAULT_RSS_HENA ( \
171 BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_UDP) | \
172 BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_SCTP) | \
173 BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_TCP) | \
174 BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_OTHER) | \
175 BIT_ULL(ICE_AVF_FLOW_FIELD_FRAG_IPV4) | \
176 BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_UDP) | \
177 BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_TCP) | \
178 BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_SCTP) | \
179 BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_OTHER) | \
180 BIT_ULL(ICE_AVF_FLOW_FIELD_FRAG_IPV6) | \
181 BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_TCP_SYN_NO_ACK) | \
182 BIT_ULL(ICE_AVF_FLOW_FIELD_UNICAST_IPV4_UDP) | \
183 BIT_ULL(ICE_AVF_FLOW_FIELD_MULTICAST_IPV4_UDP) | \
184 BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_TCP_SYN_NO_ACK) | \
185 BIT_ULL(ICE_AVF_FLOW_FIELD_UNICAST_IPV6_UDP) | \
186 BIT_ULL(ICE_AVF_FLOW_FIELD_MULTICAST_IPV6_UDP))
188 enum ice_rss_hash_func {
189 ICE_RSS_HASH_TOEPLITZ = 0,
190 ICE_RSS_HASH_TOEPLITZ_SYMMETRIC = 1,
191 ICE_RSS_HASH_XOR = 2,
192 ICE_RSS_HASH_JHASH = 3,
195 struct ice_rss_hash_cfg {
198 enum ice_rss_hash_func hash_func;
202 ICE_FLOW_DIR_UNDEFINED = 0,
205 ICE_FLOW_TX_RX = ICE_FLOW_RX | ICE_FLOW_TX
208 enum ice_flow_priority {
210 ICE_FLOW_PRIO_NORMAL,
214 #define ICE_FLOW_SEG_MAX 2
215 #define ICE_FLOW_PROFILE_MAX 1024
216 #define ICE_FLOW_ACL_FIELD_VECTOR_MAX 32
217 #define ICE_FLOW_FV_EXTRACT_SZ 2
219 #define ICE_FLOW_SET_HDRS(seg, val) ((seg)->hdrs |= (u32)(val))
221 struct ice_flow_seg_xtrct {
222 u8 prot_id; /* Protocol ID of extracted header field */
223 u16 off; /* Starting offset of the field in header in bytes */
224 u8 idx; /* Index of FV entry used */
225 u8 disp; /* Displacement of field in bits fr. FV entry's start */
228 enum ice_flow_fld_match_type {
229 ICE_FLOW_FLD_TYPE_REG, /* Value, mask */
230 ICE_FLOW_FLD_TYPE_RANGE, /* Value, mask, last (upper bound) */
231 ICE_FLOW_FLD_TYPE_PREFIX, /* IP address, prefix, size of prefix */
232 ICE_FLOW_FLD_TYPE_SIZE, /* Value, mask, size of match */
235 struct ice_flow_fld_loc {
236 /* Describe offsets of field information relative to the beginning of
237 * input buffer provided when adding flow entries.
239 u16 val; /* Offset where the value is located */
240 u16 mask; /* Offset where the mask/prefix value is located */
241 u16 last; /* Length or offset where the upper value is located */
244 struct ice_flow_fld_info {
245 enum ice_flow_fld_match_type type;
246 /* Location where to retrieve data from an input buffer */
247 struct ice_flow_fld_loc src;
248 /* Location where to put the data into the final entry buffer */
249 struct ice_flow_fld_loc entry;
250 struct ice_flow_seg_xtrct xtrct;
253 struct ice_flow_seg_info {
254 u32 hdrs; /* Bitmask indicating protocol headers present */
255 u64 match; /* Bitmask indicating header fields to be matched */
256 u64 range; /* Bitmask indicating header fields matched as ranges */
258 struct ice_flow_fld_info fields[ICE_FLOW_FIELD_IDX_MAX];
261 #define ICE_FLOW_ENTRY_HNDL(e) ((u64)e)
263 struct ice_flow_prof {
264 struct LIST_ENTRY_TYPE l_entry;
267 enum ice_flow_dir dir;
270 struct ice_flow_seg_info segs[ICE_FLOW_SEG_MAX];
272 /* software VSI handles referenced by this flow profile */
273 ice_declare_bitmap(vsis, ICE_MAX_VSI);
276 /* struct sw_recipe */
281 struct LIST_ENTRY_TYPE l_entry;
282 /* bitmap of VSIs added to the RSS entry */
283 ice_declare_bitmap(vsis, ICE_MAX_VSI);
288 enum ice_flow_action_type {
292 ICE_FLOW_ACT_CNTR_PKT,
293 ICE_FLOW_ACT_FWD_VSI,
294 ICE_FLOW_ACT_FWD_VSI_LIST, /* Should be abstracted away */
295 ICE_FLOW_ACT_FWD_QUEUE, /* Can Queues be abstracted away? */
296 ICE_FLOW_ACT_FWD_QUEUE_GROUP, /* Can Queues be abstracted away? */
300 ICE_FLOW_ACT_CNTR_BYTES,
301 ICE_FLOW_ACT_CNTR_PKT_BYTES,
302 ICE_FLOW_ACT_GENERIC_0,
303 ICE_FLOW_ACT_GENERIC_1,
304 ICE_FLOW_ACT_GENERIC_2,
305 ICE_FLOW_ACT_GENERIC_3,
306 ICE_FLOW_ACT_GENERIC_4,
307 ICE_FLOW_ACT_RPT_FLOW_ID,
308 ICE_FLOW_ACT_BUILD_PROF_IDX,
311 struct ice_flow_action {
312 enum ice_flow_action_type type;
319 ice_flow_find_prof(struct ice_hw *hw, enum ice_block blk, enum ice_flow_dir dir,
320 struct ice_flow_seg_info *segs, u8 segs_cnt);
322 ice_flow_assoc_vsig_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi_handle,
325 ice_flow_get_hw_prof(struct ice_hw *hw, enum ice_block blk, u64 prof_id,
328 ice_flow_set_fld_prefix(struct ice_flow_seg_info *seg, enum ice_flow_field fld,
329 u16 val_loc, u16 prefix_loc, u8 prefix_sz);
330 void ice_rem_vsi_rss_list(struct ice_hw *hw, u16 vsi_handle);
331 enum ice_status ice_replay_rss_cfg(struct ice_hw *hw, u16 vsi_handle);
333 ice_add_avf_rss_cfg(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds);
334 enum ice_status ice_rem_vsi_rss_cfg(struct ice_hw *hw, u16 vsi_handle);
336 ice_add_rss_cfg(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds,
339 ice_rem_rss_cfg(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds,
341 u64 ice_get_rss_cfg(struct ice_hw *hw, u16 vsi_handle, u32 hdrs);
342 #endif /* _ICE_FLOW_H_ */