1 /* SPDX-License-Identifier: BSD-3-Clause */
2 /* Copyright (c) 2023, Intel Corporation
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34 * @brief Functions used to implement OS compatibility layer
36 * Contains functions used by ice_osdep.h to implement the OS compatibility
37 * layer used by some of the hardware files. Specifically, it is for the bits
38 * of OS compatibility which don't make sense as macros or inline functions.
41 #include "ice_common.h"
42 #include "ice_iflib.h"
43 #include <machine/stdarg.h>
48 * @brief OS compatibility layer allocation type
50 * malloc(9) allocation type used by the OS compatibility layer for
51 * distinguishing allocations by this layer from those of the rest of the
54 MALLOC_DEFINE(M_ICE_OSDEP, "ice-osdep", "Intel(R) 100Gb Network Driver osdep allocations");
58 * @brief Global count of # of ice_lock mutexes initialized
60 * A global count of the total number of times that ice_init_lock has been
61 * called. This is used to generate unique lock names for each ice_lock, to
62 * aid in witness lock checking.
64 u16 ice_lock_count = 0;
66 static void ice_dmamap_cb(void *arg, bus_dma_segment_t * segs, int __unused nseg, int error);
69 * ice_hw_to_dev - Given a hw private struct, find the associated device_t
70 * @hw: the hardware private structure
72 * Given a hw structure pointer, lookup the softc and extract the device
73 * pointer. Assumes that hw is embedded within the ice_softc, instead of being
74 * allocated separately, so that __containerof math will work.
76 * This can't be defined in ice_osdep.h as it depends on the complete
77 * definition of struct ice_softc. That can't be easily included in
78 * ice_osdep.h without creating circular header dependencies.
81 ice_hw_to_dev(struct ice_hw *hw) {
82 struct ice_softc *sc = __containerof(hw, struct ice_softc, hw);
88 * ice_debug - Log a debug message if the type is enabled
89 * @hw: device private hardware structure
90 * @mask: the debug message type
91 * @fmt: printf format specifier
93 * Check if hw->debug_mask has enabled the given message type. If so, log the
94 * message to the console using vprintf. Mimic the output of device_printf by
95 * using device_print_prettyname().
98 ice_debug(struct ice_hw *hw, uint64_t mask, char *fmt, ...)
100 device_t dev = ice_hw_to_dev(hw);
103 if (!(mask & hw->debug_mask))
106 device_print_prettyname(dev);
113 * ice_debug_array - Format and print an array of values to the console
114 * @hw: private hardware structure
115 * @mask: the debug message type
116 * @rowsize: preferred number of rows to use
117 * @groupsize: preferred size in bytes to print each chunk
118 * @buf: the array buffer to print
119 * @len: size of the array buffer
121 * Format the given array as a series of uint8_t values with hexadecimal
122 * notation and log the contents to the console log.
124 * TODO: Currently only supports a group size of 1, due to the way hexdump is
128 ice_debug_array(struct ice_hw *hw, uint64_t mask, uint32_t rowsize,
129 uint32_t __unused groupsize, uint8_t *buf, size_t len)
131 device_t dev = ice_hw_to_dev(hw);
134 if (!(mask & hw->debug_mask))
137 /* Format the device header to a string */
138 snprintf(prettyname, sizeof(prettyname), "%s: ", device_get_nameunit(dev));
140 /* Make sure the row-size isn't too large */
144 hexdump(buf, len, prettyname, HD_OMIT_CHARS | rowsize);
148 * ice_info_fwlog - Format and print an array of values to the console
149 * @hw: private hardware structure
150 * @rowsize: preferred number of rows to use
151 * @groupsize: preferred size in bytes to print each chunk
152 * @buf: the array buffer to print
153 * @len: size of the array buffer
155 * Format the given array as a series of uint8_t values with hexadecimal
156 * notation and log the contents to the console log. This variation is
157 * specific to firmware logging.
159 * TODO: Currently only supports a group size of 1, due to the way hexdump is
163 ice_info_fwlog(struct ice_hw *hw, uint32_t rowsize, uint32_t __unused groupsize,
164 uint8_t *buf, size_t len)
166 device_t dev = ice_hw_to_dev(hw);
169 if (!ice_fwlog_supported(hw))
172 /* Format the device header to a string */
173 snprintf(prettyname, sizeof(prettyname), "%s: FWLOG: ",
174 device_get_nameunit(dev));
176 /* Make sure the row-size isn't too large */
180 hexdump(buf, len, prettyname, HD_OMIT_CHARS | rowsize);
184 * rd32 - Read a 32bit hardware register value
185 * @hw: the private hardware structure
186 * @reg: register address to read
188 * Read the specified 32bit register value from BAR0 and return its contents.
191 rd32(struct ice_hw *hw, uint32_t reg)
193 struct ice_softc *sc = __containerof(hw, struct ice_softc, hw);
195 return bus_space_read_4(sc->bar0.tag, sc->bar0.handle, reg);
199 * rd64 - Read a 64bit hardware register value
200 * @hw: the private hardware structure
201 * @reg: register address to read
203 * Read the specified 64bit register value from BAR0 and return its contents.
205 * @pre For 32-bit builds, assumes that the 64bit register read can be
206 * safely broken up into two 32-bit register reads.
209 rd64(struct ice_hw *hw, uint32_t reg)
211 struct ice_softc *sc = __containerof(hw, struct ice_softc, hw);
215 data = bus_space_read_8(sc->bar0.tag, sc->bar0.handle, reg);
218 * bus_space_read_8 isn't supported on 32bit platforms, so we fall
219 * back to using two bus_space_read_4 calls.
221 data = bus_space_read_4(sc->bar0.tag, sc->bar0.handle, reg);
222 data |= ((uint64_t)bus_space_read_4(sc->bar0.tag, sc->bar0.handle, reg + 4)) << 32;
229 * wr32 - Write a 32bit hardware register
230 * @hw: the private hardware structure
231 * @reg: the register address to write to
232 * @val: the 32bit value to write
234 * Write the specified 32bit value to a register address in BAR0.
237 wr32(struct ice_hw *hw, uint32_t reg, uint32_t val)
239 struct ice_softc *sc = __containerof(hw, struct ice_softc, hw);
241 bus_space_write_4(sc->bar0.tag, sc->bar0.handle, reg, val);
245 * wr64 - Write a 64bit hardware register
246 * @hw: the private hardware structure
247 * @reg: the register address to write to
248 * @val: the 64bit value to write
250 * Write the specified 64bit value to a register address in BAR0.
252 * @pre For 32-bit builds, assumes that the 64bit register write can be safely
253 * broken up into two 32-bit register writes.
256 wr64(struct ice_hw *hw, uint32_t reg, uint64_t val)
258 struct ice_softc *sc = __containerof(hw, struct ice_softc, hw);
261 bus_space_write_8(sc->bar0.tag, sc->bar0.handle, reg, val);
263 uint32_t lo_val, hi_val;
266 * bus_space_write_8 isn't supported on 32bit platforms, so we fall
267 * back to using two bus_space_write_4 calls.
269 lo_val = (uint32_t)val;
270 hi_val = (uint32_t)(val >> 32);
271 bus_space_write_4(sc->bar0.tag, sc->bar0.handle, reg, lo_val);
272 bus_space_write_4(sc->bar0.tag, sc->bar0.handle, reg + 4, hi_val);
277 * ice_usec_delay - Delay for the specified number of microseconds
278 * @time: microseconds to delay
279 * @sleep: if true, sleep where possible
281 * If sleep is true, and if the current thread is allowed to sleep, pause so
282 * that another thread can execute. Otherwise, use DELAY to spin the thread
286 ice_usec_delay(uint32_t time, bool sleep)
288 if (sleep && THREAD_CAN_SLEEP())
289 pause("ice_usec_delay", USEC_2_TICKS(time));
295 * ice_msec_delay - Delay for the specified number of milliseconds
296 * @time: milliseconds to delay
297 * @sleep: if true, sleep where possible
299 * If sleep is true, and if the current thread is allowed to sleep, pause so
300 * that another thread can execute. Otherwise, use DELAY to spin the thread
304 ice_msec_delay(uint32_t time, bool sleep)
306 if (sleep && THREAD_CAN_SLEEP())
307 pause("ice_msec_delay", MSEC_2_TICKS(time));
313 * ice_msec_pause - pause (sleep) the thread for a time in milliseconds
314 * @time: milliseconds to sleep
316 * Wrapper for ice_msec_delay with sleep set to true.
319 ice_msec_pause(uint32_t time)
321 ice_msec_delay(time, true);
325 * ice_msec_spin - Spin the thread for a time in milliseconds
326 * @time: milliseconds to delay
328 * Wrapper for ice_msec_delay with sleep sent to false.
331 ice_msec_spin(uint32_t time)
333 ice_msec_delay(time, false);
336 /********************************************************************
337 * Manage DMA'able memory.
338 *******************************************************************/
341 * ice_dmamap_cb - Callback function DMA maps
342 * @arg: pointer to return the segment address
343 * @segs: the segments array
344 * @nseg: number of segments in the array
347 * Callback used by the bus DMA code to obtain the segment address.
350 ice_dmamap_cb(void *arg, bus_dma_segment_t * segs, int __unused nseg, int error)
354 *(bus_addr_t *) arg = segs->ds_addr;
359 * ice_alloc_dma_mem - Request OS to allocate DMA memory
360 * @hw: private hardware structure
361 * @mem: structure defining the DMA memory request
362 * @size: the allocation size
364 * Allocates some memory for DMA use. Use the FreeBSD bus DMA interface to
365 * track this memory using a bus DMA tag and map.
367 * Returns a pointer to the DMA memory address.
370 ice_alloc_dma_mem(struct ice_hw *hw, struct ice_dma_mem *mem, u64 size)
372 device_t dev = ice_hw_to_dev(hw);
375 err = bus_dma_tag_create(bus_get_dma_tag(dev), /* parent */
376 1, 0, /* alignment, boundary */
377 BUS_SPACE_MAXADDR, /* lowaddr */
378 BUS_SPACE_MAXADDR, /* highaddr */
379 NULL, NULL, /* filtfunc, filtfuncarg */
383 BUS_DMA_ALLOCNOW, /* flags */
385 NULL, /* lockfuncarg */
389 "ice_alloc_dma: bus_dma_tag_create failed, "
390 "error %s\n", ice_err_str(err));
393 err = bus_dmamem_alloc(mem->tag, (void **)&mem->va,
394 BUS_DMA_NOWAIT | BUS_DMA_ZERO, &mem->map);
397 "ice_alloc_dma: bus_dmamem_alloc failed, "
398 "error %s\n", ice_err_str(err));
401 err = bus_dmamap_load(mem->tag, mem->map, mem->va,
408 "ice_alloc_dma: bus_dmamap_load failed, "
409 "error %s\n", ice_err_str(err));
413 bus_dmamap_sync(mem->tag, mem->map,
414 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
417 bus_dmamem_free(mem->tag, mem->va, mem->map);
419 bus_dma_tag_destroy(mem->tag);
427 * ice_free_dma_mem - Free DMA memory allocated by ice_alloc_dma_mem
428 * @hw: the hardware private structure
429 * @mem: DMA memory to free
431 * Release the bus DMA tag and map, and free the DMA memory associated with
435 ice_free_dma_mem(struct ice_hw __unused *hw, struct ice_dma_mem *mem)
437 bus_dmamap_sync(mem->tag, mem->map,
438 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
439 bus_dmamap_unload(mem->tag, mem->map);
440 bus_dmamem_free(mem->tag, mem->va, mem->map);
441 bus_dma_tag_destroy(mem->tag);