4 * Author: Archie Cobbs <archie@freebsd.org>
5 * Copyright (c) 2000 Whistle Communications, Inc.
7 * Author: Archie Cobbs <archie@freebsd.org>
9 * Subject to the following obligations and disclaimer of warranty, use and
10 * redistribution of this software, in source or object code forms, with or
11 * without modifications are expressly permitted by Whistle Communications;
12 * provided, however, that:
13 * 1. Any and all reproductions of the source or object code must include the
14 * copyright notice above and the following disclaimer of warranties; and
15 * 2. No rights are granted, in any manner or form, to use Whistle
16 * Communications, Inc. trademarks, including the mark "WHISTLE
17 * COMMUNICATIONS" on advertising, endorsements, or otherwise except as
18 * such appears in the above copyright notice or in the software.
20 * THIS SOFTWARE IS BEING PROVIDED BY WHISTLE COMMUNICATIONS "AS IS", AND
21 * TO THE MAXIMUM EXTENT PERMITTED BY LAW, WHISTLE COMMUNICATIONS MAKES NO
22 * REPRESENTATIONS OR WARRANTIES, EXPRESS OR IMPLIED, REGARDING THIS SOFTWARE,
23 * INCLUDING WITHOUT LIMITATION, ANY AND ALL IMPLIED WARRANTIES OF
24 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
25 * WHISTLE COMMUNICATIONS DOES NOT WARRANT, GUARANTEE, OR MAKE ANY
26 * REPRESENTATIONS REGARDING THE USE OF, OR THE RESULTS OF THE USE OF THIS
27 * SOFTWARE IN TERMS OF ITS CORRECTNESS, ACCURACY, RELIABILITY OR OTHERWISE.
28 * IN NO EVENT SHALL WHISTLE COMMUNICATIONS BE LIABLE FOR ANY DAMAGES
29 * RESULTING FROM OR ARISING OUT OF ANY USE OF THIS SOFTWARE, INCLUDING
30 * WITHOUT LIMITATION, ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
31 * PUNITIVE, OR CONSEQUENTIAL DAMAGES, PROCUREMENT OF SUBSTITUTE GOODS OR
32 * SERVICES, LOSS OF USE, DATA OR PROFITS, HOWEVER CAUSED AND UNDER ANY
33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
35 * THIS SOFTWARE, EVEN IF WHISTLE COMMUNICATIONS IS ADVISED OF THE POSSIBILITY
39 #include <sys/cdefs.h>
40 __FBSDID("$FreeBSD$");
43 * Support for the SMBus controller logical device which is part of the
44 * Intel 81801AA/AB/BA/CA/DC/EB (ICH/ICH[02345]) I/O controller hub chips.
47 #include <sys/param.h>
48 #include <sys/systm.h>
49 #include <sys/kernel.h>
50 #include <sys/module.h>
51 #include <sys/errno.h>
53 #include <sys/mutex.h>
54 #include <sys/syslog.h>
57 #include <machine/bus.h>
59 #include <machine/resource.h>
61 #include <dev/pci/pcivar.h>
62 #include <dev/pci/pcireg.h>
64 #include <dev/smbus/smbconf.h>
66 #include <dev/ichsmb/ichsmb_var.h>
67 #include <dev/ichsmb/ichsmb_reg.h>
69 /* PCI unique identifiers */
70 #define PCI_VENDOR_INTEL 0x8086
71 #define ID_82801AA 0x2413
72 #define ID_82801AB 0x2423
73 #define ID_82801BA 0x2443
74 #define ID_82801CA 0x2483
75 #define ID_82801DC 0x24C3
76 #define ID_82801EB 0x24D3
77 #define ID_82801FB 0x266A
78 #define ID_82801GB 0x27da
79 #define ID_82801H 0x283e
80 #define ID_82801I 0x2930
81 #define ID_EP80579 0x5032
82 #define ID_82801JI 0x3a30
83 #define ID_82801JD 0x3a60
85 #define ID_6300ESB 0x25a4
86 #define ID_631xESB 0x269b
87 #define ID_DH89XXCC 0x2330
88 #define ID_PATSBURG 0x1d22
91 #define ID_AVOTON 0x1f3c
92 #define ID_COLETOCRK 0x23B0
94 #define ID_LPTLP 0x9c22
95 #define ID_WCPT 0x8ca2
96 #define ID_WCPTLP 0x9ca2
97 #define ID_BAYTRAIL 0x0f12
98 #define ID_BRASWELL 0x2292
99 #define ID_WELLSBURG 0x8d22
100 #define ID_SRPT 0xa123
101 #define ID_SRPTLP 0x9d23
102 #define ID_DENVERTON 0x19df
103 #define ID_BROXTON 0x5ad4
104 #define ID_LEWISBURG 0xa1a3
105 #define ID_LEWISBURG2 0xa223
106 #define ID_KABYLAKE 0xa2a3
107 #define ID_CANNONLAKE 0xa323
109 static const struct ichsmb_device {
112 } ichsmb_devices[] = {
113 { ID_82801AA, "Intel 82801AA (ICH) SMBus controller" },
114 { ID_82801AB, "Intel 82801AB (ICH0) SMBus controller" },
115 { ID_82801BA, "Intel 82801BA (ICH2) SMBus controller" },
116 { ID_82801CA, "Intel 82801CA (ICH3) SMBus controller" },
117 { ID_82801DC, "Intel 82801DC (ICH4) SMBus controller" },
118 { ID_82801EB, "Intel 82801EB (ICH5) SMBus controller" },
119 { ID_82801FB, "Intel 82801FB (ICH6) SMBus controller" },
120 { ID_82801GB, "Intel 82801GB (ICH7) SMBus controller" },
121 { ID_82801H, "Intel 82801H (ICH8) SMBus controller" },
122 { ID_82801I, "Intel 82801I (ICH9) SMBus controller" },
123 { ID_82801GB, "Intel 82801GB (ICH7) SMBus controller" },
124 { ID_82801H, "Intel 82801H (ICH8) SMBus controller" },
125 { ID_82801I, "Intel 82801I (ICH9) SMBus controller" },
126 { ID_EP80579, "Intel EP80579 SMBus controller" },
127 { ID_82801JI, "Intel 82801JI (ICH10) SMBus controller" },
128 { ID_82801JD, "Intel 82801JD (ICH10) SMBus controller" },
129 { ID_PCH, "Intel PCH SMBus controller" },
130 { ID_6300ESB, "Intel 6300ESB (ICH) SMBus controller" },
131 { ID_631xESB, "Intel 631xESB/6321ESB (ESB2) SMBus controller" },
132 { ID_DH89XXCC, "Intel DH89xxCC SMBus controller" },
133 { ID_PATSBURG, "Intel Patsburg SMBus controller" },
134 { ID_CPT, "Intel Cougar Point SMBus controller" },
135 { ID_PPT, "Intel Panther Point SMBus controller" },
136 { ID_AVOTON, "Intel Avoton SMBus controller" },
137 { ID_LPT, "Intel Lynx Point SMBus controller" },
138 { ID_LPTLP, "Intel Lynx Point-LP SMBus controller" },
139 { ID_WCPT, "Intel Wildcat Point SMBus controller" },
140 { ID_WCPTLP, "Intel Wildcat Point-LP SMBus controller" },
141 { ID_BAYTRAIL, "Intel Baytrail SMBus controller" },
142 { ID_BRASWELL, "Intel Braswell SMBus controller" },
143 { ID_COLETOCRK, "Intel Coleto Creek SMBus controller" },
144 { ID_WELLSBURG, "Intel Wellsburg SMBus controller" },
145 { ID_SRPT, "Intel Sunrise Point-H SMBus controller" },
146 { ID_SRPTLP, "Intel Sunrise Point-LP SMBus controller" },
147 { ID_DENVERTON, "Intel Denverton SMBus controller" },
148 { ID_BROXTON, "Intel Broxton SMBus controller" },
149 { ID_LEWISBURG, "Intel Lewisburg SMBus controller" },
150 { ID_LEWISBURG2,"Intel Lewisburg SMBus controller" },
151 { ID_KABYLAKE, "Intel Kaby Lake SMBus controller" },
152 { ID_CANNONLAKE,"Intel Cannon Lake SMBus controller" },
156 /* Internal functions */
157 static int ichsmb_pci_probe(device_t dev);
158 static int ichsmb_pci_attach(device_t dev);
159 /*Use generic one for now*/
161 static int ichsmb_pci_detach(device_t dev);
165 static device_method_t ichsmb_pci_methods[] = {
166 /* Device interface */
167 DEVMETHOD(device_probe, ichsmb_pci_probe),
168 DEVMETHOD(device_attach, ichsmb_pci_attach),
169 DEVMETHOD(device_detach, ichsmb_detach),
172 DEVMETHOD(smbus_callback, ichsmb_callback),
173 DEVMETHOD(smbus_quick, ichsmb_quick),
174 DEVMETHOD(smbus_sendb, ichsmb_sendb),
175 DEVMETHOD(smbus_recvb, ichsmb_recvb),
176 DEVMETHOD(smbus_writeb, ichsmb_writeb),
177 DEVMETHOD(smbus_writew, ichsmb_writew),
178 DEVMETHOD(smbus_readb, ichsmb_readb),
179 DEVMETHOD(smbus_readw, ichsmb_readw),
180 DEVMETHOD(smbus_pcall, ichsmb_pcall),
181 DEVMETHOD(smbus_bwrite, ichsmb_bwrite),
182 DEVMETHOD(smbus_bread, ichsmb_bread),
187 static driver_t ichsmb_pci_driver = {
190 sizeof(struct ichsmb_softc)
193 static devclass_t ichsmb_pci_devclass;
195 DRIVER_MODULE(ichsmb, pci, ichsmb_pci_driver, ichsmb_pci_devclass, 0, 0);
198 ichsmb_pci_probe(device_t dev)
200 const struct ichsmb_device *device;
202 if (pci_get_vendor(dev) != PCI_VENDOR_INTEL)
205 for (device = ichsmb_devices; device->name != NULL; device++) {
206 if (pci_get_device(dev) == device->id) {
207 device_set_desc(dev, device->name);
208 return (ichsmb_probe(dev));
216 ichsmb_pci_attach(device_t dev)
218 const sc_p sc = device_get_softc(dev);
221 /* Initialize private state */
222 bzero(sc, sizeof(*sc));
226 /* Allocate an I/O range */
227 sc->io_rid = ICH_SMB_BASE;
228 sc->io_res = bus_alloc_resource_anywhere(dev, SYS_RES_IOPORT,
229 &sc->io_rid, 16, RF_ACTIVE);
230 if (sc->io_res == NULL)
231 sc->io_res = bus_alloc_resource_anywhere(dev, SYS_RES_IOPORT,
232 &sc->io_rid, 32, RF_ACTIVE);
233 if (sc->io_res == NULL) {
234 device_printf(dev, "can't map I/O\n");
239 /* Allocate interrupt */
241 sc->irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ,
242 &sc->irq_rid, RF_ACTIVE | RF_SHAREABLE);
243 if (sc->irq_res == NULL) {
244 device_printf(dev, "can't get IRQ\n");
250 pci_write_config(dev, ICH_HOSTC, ICH_HOSTC_HST_EN, 1);
253 error = ichsmb_attach(dev);
259 /* Attach failed, release resources */
260 ichsmb_release_resources(sc);
265 MODULE_DEPEND(ichsmb, pci, 1, 1, 1);
266 MODULE_DEPEND(ichsmb, smbus, SMBUS_MINVER, SMBUS_PREFVER, SMBUS_MAXVER);
267 MODULE_VERSION(ichsmb, 1);