2 * Copyright (c) 1999,2000 Jonathan Lemon
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 * software structures for the Compaq RAID controller
36 #define ida_inb(ida, port) \
37 bus_read_1((ida)->regs, port)
38 #define ida_inw(ida, port) \
39 bus_read_2((ida)->regs, port)
40 #define ida_inl(ida, port) \
41 bus_read_4((ida)->regs, port)
43 #define ida_outb(ida, port, val) \
44 bus_write_1((ida)->regs, port, val)
45 #define ida_outw(ida, port, val) \
46 bus_write_2((ida)->regs, port, val)
47 #define ida_outl(ida, port, val) \
48 bus_write_4((ida)->regs, port, val)
51 u_int8_t drive; /* logical drive */
52 u_int8_t priority; /* block priority */
53 u_int16_t size; /* size of request, in words */
57 u_int16_t next; /* offset of next request */
58 u_int8_t command; /* command */
59 u_int8_t error; /* return error code */
60 u_int32_t blkno; /* block number */
61 u_int16_t bcount; /* block count */
62 u_int8_t sgcount; /* number of scatter/gather entries */
63 u_int8_t spare; /* reserved */
67 u_int32_t length; /* length of S/G segment */
68 u_int32_t addr; /* physical address of block */
71 #define IDA_NSEG 32 /* maximum number of segments */
74 * right now, this structure totals 276 bytes.
76 struct ida_hardware_qcb {
77 struct ida_hdr hdr; /* 4 */
78 struct ida_req req; /* 12 */
79 struct ida_sgb seg[IDA_NSEG]; /* 256 */
80 struct ida_qcb *qcb; /* 4 - qcb backpointer */
85 QCB_ACTIVE = 0x0001, /* waiting for completion */
86 QCB_TIMEDOUT = 0x0002,
89 #define DMA_DATA_IN 0x0001
90 #define DMA_DATA_OUT 0x0002
91 #define IDA_COMMAND 0x0004
92 #define DMA_DATA_TRANSFER (DMA_DATA_IN | DMA_DATA_OUT)
94 #define IDA_QCB_MAX 256
95 #define IDA_CONTROLLER 0 /* drive "number" for controller */
100 struct ida_hardware_qcb *hwqcb;
101 struct ida_softc *ida;
105 STAILQ_ENTRY(ida_qcb) stqe;
106 SLIST_ENTRY(ida_qcb) sle;
109 bus_addr_t hwqcb_busaddr;
110 struct bio *buf; /* bio associated with qcb */
115 int (*fifo_full)(struct ida_softc *);
116 void (*submit)(struct ida_softc *, struct ida_qcb *);
117 bus_addr_t (*done)(struct ida_softc *);
118 int (*int_pending)(struct ida_softc *);
119 void (*int_enable)(struct ida_softc *, int);
123 * flags for the controller
125 #define IDA_ATTACHED 0x01 /* attached */
126 #define IDA_FIRMWARE 0x02 /* firmware must be started */
127 #define IDA_INTERRUPTS 0x04 /* interrupts enabled */
128 #define IDA_QFROZEN 0x08 /* request queue frozen */
134 struct cdev *ida_dev_t;
138 struct resource *regs;
141 struct resource *irq;
145 struct intr_config_hook ich;
147 /* various DMA tags */
148 bus_dma_tag_t parent_dmat;
149 bus_dma_tag_t buffer_dmat;
151 bus_dma_tag_t hwqcb_dmat;
152 bus_dmamap_t hwqcb_dmamap;
153 bus_addr_t hwqcb_busaddr;
155 bus_dma_tag_t sg_dmat;
161 struct ida_hardware_qcb *hwqcbs; /* HW QCB array */
162 struct ida_qcb *qcbs; /* kernel QCB array */
163 SLIST_HEAD(, ida_qcb) free_qcbs;
164 STAILQ_HEAD(, ida_qcb) qcb_queue;
165 struct bio_queue_head bio_queue;
167 struct ida_access cmd;
173 #define DRV_WRITEPROT 0x0001
177 struct ida_softc *controller;
179 int drive; /* per controller */
180 int unit; /* global */
192 struct ida_access *accessor;
196 extern int ida_detach(device_t dev);
197 extern struct ida_softc *ida_alloc(device_t dev, struct resource *regs,
198 int regs_type, int regs_id, bus_dma_tag_t parent_dmat);
199 extern void ida_free(struct ida_softc *ida);
200 extern int ida_init(struct ida_softc *ida);
201 extern int ida_command(struct ida_softc *ida, int command, void *data,
202 int datasize, int drive, u_int32_t pblkno, int flags);
203 extern void ida_submit_buf(struct ida_softc *ida, struct bio *bp);
204 extern void ida_intr(void *data);
206 extern void idad_intr(struct bio *bp);
208 #endif /* _IDAVAR_H */