3 * Definitions for 3C507
6 #define IE507_CTRL 6 /* control port */
7 #define IE507_ICTRL 10 /* interrupt control */
8 #define IE507_ATTN 11 /* any write here sends a chan attn */
9 #define IE507_ROM 13 /* rom configuration? */
10 #define IE507_MADDR 14 /* shared memory configuration */
11 #define IE507_IRQ 15 /* IRQ configuration */
13 /* Bank 0 -- "*3COM*" signature */
14 #define EL_SIG 0 /* offset of ASCII signature -- "*3COM*" */
16 /* Bank 1 -- ethernet address */
17 #define EL_ADDR 0 /* offset of card's ethernet address */
19 /* Bank 2 -- card part #, revision, date of manufacture */
20 #define EL_TYPE 0 /* offset of card part # */
21 #define EL_TYPE_HI 0 /* offset of card part # -- high byte */
22 #define EL_TYPE_MID 1 /* offset of card part # -- middle byte */
23 #define EL_TYPE_LOW 2 /* offset of card part # -- low byte */
24 #define EL_REV 3 /* offset of card revision, in BCD */
25 #define EL_DOM_DAY 4 /* offset of date of manf: day in BCD */
26 #define EL_DOM_MY 4 /* offset of date of manf: month, year in BCD */
29 * Definitions for non-bankswitched registers
32 /* General control register */
33 #define EL_CTRL_BNK0 0x00 /* register bank 0 */
34 #define EL_CTRL_BNK1 0x01 /* register bank 1 */
35 #define EL_CTRL_BNK2 0x02 /* register bank 2 */
36 #define EL_CTRL_IEN 0x04 /* interrupt enable */
37 #define EL_CTRL_INTL 0x08 /* interrupt active latch */
38 #define EL_CTRL_16BIT 0x10 /* bus width; clear = 8-bit, set = 16-bit */
39 #define EL_CTRL_LOOP 0x20 /* loopback mode */
40 #define EL_CTRL_NRST 0x80 /* turn off to reset */
41 #define EL_CTRL_RESET (EL_CTRL_LOOP)
42 #define EL_CTRL_NORMAL (EL_CTRL_NRST | EL_CTRL_IEN | EL_CTRL_BNK1)
44 /* ROM & media control register */
45 #define EL_MEDIA_MASK 0x80 /* m1 = (EL_MEDIA register) & EL_MEDIA_MASK */
46 #define EL_MEDIA_SHIFT 7 /* media index = m1 >> EL_MEDIA_SHIFT */
48 /* shared memory control register */
49 #define EL_MADDR_HIGH 0x20 /* memory mapping above 15Meg */
50 #define EL_MADDR_MASK 0x1c /* m1 = (EL_MADDR register) & EL_MADDR_MASK */
51 #define EL_MADDR_SHIFT 12 /* m2 = m1 << EL_MADDR_SHIFT */
52 #define EL_MADDR_BASE 0xc0000 /* maddr = m2 + EL_MADDR_BASE */
53 #define EL_MSIZE_MASK 0x03 /* m1 = (EL_MADDR register) & EL_MSIZE_MASK */
54 #define EL_MSIZE_STEP 16384 /* msize = (m1 + 1) * EL_MSIZE_STEP */
56 /* interrupt control register */
57 #define EL_IRQ_MASK 0x0f /* irq = (EL_IRQ register) & EL_IRQ_MASK */
60 * Definitions for Bank 0 registers
62 #define EL_SIG_LEN 6 /* signature length */
63 #define EL_SIGNATURE "*3COM*"
66 * Definitions for Bank 1 registers
68 #define EL_ADDR_LEN 6 /* ether address length */
71 * Definitions for Bank 2 registers
73 #define EL_TYPE_LEN 3 /* card part # length */
76 * General card-specific macros and definitions
78 #define EL_IOBASE_LOW 0x200
79 #define EL_IOBASE_HIGH 0x3e0
83 * XXX: It seems that the 3C507-TP is differentiated from AUI/BNC 3C507
84 * by part numbers, but I'm not sure how accurate this test is, seeing
85 * as it's based on the sample of 3 cards I own (2AUI/BNC, 1 TP).
87 #define EL_IS_TP(type) ((type)[EL_TYPE_MID] > 0x70)
89 #define EL_CARD_BNC 0 /* regular AUI/BNC 3C507 */
90 #define EL_CARD_TP 1 /* 3C507-TP -- no AUI/BNC */