2 * Copyright (c) 2005 Poul-Henning Kamp <phk@FreeBSD.org>
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * High-level driver for µPD7210 based GPIB cards.
30 #include <sys/cdefs.h>
31 __FBSDID("$FreeBSD$");
36 #include <sys/param.h>
37 #include <sys/systm.h>
39 #include <sys/malloc.h>
40 #include <sys/kernel.h>
41 #include <sys/limits.h>
42 #include <sys/module.h>
45 #include <sys/mutex.h>
48 #include <machine/bus.h>
49 #include <machine/resource.h>
50 #include <isa/isavar.h>
52 #include <dev/ieee488/ugpib.h>
54 #define UPD7210_SW_DRIVER
55 #include <dev/ieee488/upd7210.h>
57 static MALLOC_DEFINE(M_IBFOO, "IBFOO", "IBFOO");
62 #include <dev/ieee488/ibfoo_int.h>
64 /* XXX: This is really a bitmap */
72 LIST_ENTRY(handle) list;
77 struct timeval timeout;
85 LIST_HEAD(,handle) handles;
86 struct unrhdr *unrhdr;
87 struct callout callout;
100 struct timeval deadline;
102 struct handle *rdh; /* addressed for read */
103 struct handle *wrh; /* addressed for write */
111 typedef int ibhandler_t(struct ibfoo *ib);
113 static struct timeval timeouts[] = {
117 [T100us] = { 0, 100},
118 [T300us] = { 0, 300},
121 [T10ms] = { 0, 10000},
122 [T30ms] = { 0, 30000},
123 [T100ms] = { 0, 100000},
124 [T300ms] = { 0, 300000},
131 [T1000s] = { 1000, 0}
134 static const u_int max_timeouts = sizeof timeouts / sizeof timeouts[0];
139 ib_set_error(struct ibarg *ap, int error)
142 if (ap->__iberr == 0)
145 ap->__retval = ap->__ibsta;
150 ib_had_timeout(struct ibarg *ap)
153 ib_set_error(ap, EABO);
155 ap->__retval = ap->__ibsta;
160 ib_set_errno(struct ibarg *ap, int errno)
163 if (ap->__iberr == 0) {
168 ap->__retval = ap->__ibsta;
173 gpib_ib_irq(struct upd7210 *u, int intr __unused)
179 mtx_assert(&u->mutex, MA_OWNED);
182 if (!(u->rreg[ISR2] & IXR2_CO))
186 upd7210_wr(u, CDOR, *ib->buf);
191 if (!(u->rreg[ISR1] & IXR1_DI))
193 *ib->buf = upd7210_rd(u, DIR);
196 if (ib->buflen == 0 || (u->rreg[ISR1] & IXR1_ENDRX))
200 if (!(u->rreg[ISR1] & IXR1_DO))
204 if (ib->buflen == 1 && ib->doeoi)
205 upd7210_wr(u, AUXMR, AUXMR_SEOI);
206 upd7210_wr(u, CDOR, *ib->buf);
211 if (!(u->rreg[ISR1] & IXR1_ENDRX))
217 upd7210_wr(u, IMR1, 0);
218 upd7210_wr(u, IMR2, 0);
225 gpib_ib_timeout(void *arg)
234 if (ib->mode == DMA_IDATA && isa_dmatc(u->dmachan)) {
235 KASSERT(u->dmachan >= 0, ("Bogus dmachan = %d", u->dmachan));
236 upd7210_wr(u, IMR1, 0);
237 upd7210_wr(u, IMR2, 0);
241 if (ib->mode > BUSY) {
246 if (ib->mode != IDLE && timevalisset(&ib->deadline)) {
248 if (timevalcmp(&ib->deadline, &tv, <)) {
249 ib_had_timeout(ib->ap);
250 upd7210_wr(u, IMR1, 0);
251 upd7210_wr(u, IMR2, 0);
256 if (ib->mode != IDLE)
257 callout_reset(&ib->callout, hz / 5, gpib_ib_timeout, arg);
258 mtx_unlock(&u->mutex);
262 gpib_ib_wait_xfer(struct upd7210 *u, struct ibfoo *ib)
266 mtx_assert(&u->mutex, MA_OWNED);
267 while (ib->mode > BUSY) {
268 i = msleep(&ib->buflen, &u->mutex,
269 PZERO | PCATCH, "ibwxfr", 0);
271 ib_set_errno(ib->ap, i);
274 if (u->rreg[ISR1] & IXR1_ERR) {
275 ib_set_error(ib->ap, EABO); /* XXX ? */
281 upd7210_wr(u, IMR1, 0);
282 upd7210_wr(u, IMR2, 0);
286 config_eos(struct upd7210 *u, struct handle *h)
292 upd7210_wr(u, EOSR, h->eos & 0xff);
296 upd7210_wr(u, EOSR, h->eos & 0xff);
301 upd7210_wr(u, AUXRA, C_AUXA | i);
305 * Look up the handle, and set the deadline if the handle has a timeout.
308 gethandle(struct upd7210 *u, struct ibarg *ap, struct handle **hp)
313 KASSERT(ap->__field & __F_HANDLE, ("gethandle without __F_HANDLE"));
315 LIST_FOREACH(h, &ib->handles, list) {
316 if (h->handle == ap->handle) {
321 ib_set_error(ap, EARG);
326 pio_cmd(struct upd7210 *u, u_char *cmd, int len)
332 if (ib->rdh != NULL || ib->wrh != NULL) {
333 upd7210_take_ctrl_async(u);
341 upd7210_wr(u, IMR2, IXR2_CO);
345 gpib_ib_wait_xfer(u, ib);
347 mtx_unlock(&u->mutex);
348 return (len - ib->buflen);
352 pio_odata(struct upd7210 *u, u_char *data, int len)
361 ib->mode = PIO_ODATA;
364 upd7210_wr(u, IMR1, IXR1_DO);
366 gpib_ib_wait_xfer(u, ib);
368 mtx_unlock(&u->mutex);
369 return (len - ib->buflen);
373 pio_idata(struct upd7210 *u, u_char *data, int len)
380 ib->mode = PIO_IDATA;
383 upd7210_wr(u, IMR1, IXR1_DI);
385 gpib_ib_wait_xfer(u, ib);
387 mtx_unlock(&u->mutex);
388 return (len - ib->buflen);
392 dma_idata(struct upd7210 *u, u_char *data, int len)
397 KASSERT(u->dmachan >= 0, ("Bogus dmachan %d", u->dmachan));
399 ib->mode = DMA_IDATA;
401 isa_dmastart(ISADMA_READ, data, len, u->dmachan);
404 upd7210_wr(u, IMR1, IXR1_ENDRX);
405 upd7210_wr(u, IMR2, IMR2_DMAI);
406 gpib_ib_wait_xfer(u, ib);
407 mtx_unlock(&u->mutex);
409 j = isa_dmastatus(u->dmachan);
410 isa_dmadone(ISADMA_READ, data, len, u->dmachan);
416 ib_send_msg(struct ibfoo *ib, int msg)
424 buf[i++] = LAD | ib->h->pad;
426 buf[i++] = LAD | TAD | ib->h->sad;
429 j = pio_cmd(ib->u, buf, i);
431 ib_set_error(ib->ap, EABO); /* XXX ? */
436 ibask(struct ibfoo *ib)
439 ibdebug = ib->ap->option;
447 ibclr(struct ibfoo *ib)
450 return (ib_send_msg(ib, SDC));
455 #define ibconfig NULL
458 ibdev(struct ibfoo *ib)
462 h = malloc(sizeof *h, M_IBFOO, M_ZERO | M_WAITOK);
463 h->handle = alloc_unr(ib->unrhdr);
465 h->pad = ib->ap->pad;
466 h->sad = ib->ap->sad;
467 h->timeout = timeouts[ib->ap->tmo];
468 h->eot = ib->ap->eot;
469 h->eos = ib->ap->eos;
470 mtx_lock(&ib->u->mutex);
471 LIST_INSERT_HEAD(&ib->handles, h, list);
472 mtx_unlock(&ib->u->mutex);
473 ib->ap->__retval = h->handle;
480 ibdma(struct ibfoo *ib)
483 if (ib->u->dmachan < 0 && ib->ap->v)
484 return (ib_set_error(ib->ap, EARG));
485 ib->h->dma = ib->ap->v;
490 ibeos(struct ibfoo *ib)
493 ib->ap->__iberr = ib->h->eos;
494 ib->h->eos = ib->ap->eos;
495 if (ib->rdh == ib->h)
496 config_eos(ib->u, ib->h);
501 ibeot(struct ibfoo *ib)
504 ib->h->eot = ib->ap->eot;
517 ibloc(struct ibfoo *ib)
520 if (ib->h->kind == H_BOARD)
521 return (EOPNOTSUPP); /* XXX */
522 return (ib_send_msg(ib, GTL));
526 ibonl(struct ibfoo *ib)
530 return (EOPNOTSUPP); /* XXX */
531 mtx_lock(&ib->u->mutex);
532 LIST_REMOVE(ib->h, list);
533 mtx_unlock(&ib->u->mutex);
534 free(ib->h, M_IBFOO);
540 ibpad(struct ibfoo *ib)
543 ib->h->pad = ib->ap->pad;
552 ibrd(struct ibfoo *ib)
555 int i, j, error, bl, bc;
558 if (ib->h->kind == H_BOARD)
559 return (EOPNOTSUPP); /* XXX */
563 bp = malloc(bl, M_IBFOO, M_WAITOK);
565 if (ib->rdh != ib->h) {
570 buf[i++] = TAD | ib->h->pad;
572 buf[i++] = ib->h->sad;
573 i = pio_cmd(ib->u, buf, i);
574 config_eos(ib->u, ib->h);
578 upd7210_goto_standby(ib->u);
582 while (bc > 0 && ib->ap->__iberr == 0) {
583 j = imin(bc, PAGE_SIZE);
585 i = dma_idata(ib->u, bp, j);
587 i = pio_idata(ib->u, bp, j);
588 error = copyout(bp, dp , i);
591 ib->ap->__ibcnt += i;
597 upd7210_take_ctrl_async(ib->u);
611 ibsad(struct ibfoo *ib)
614 ib->h->sad = ib->ap->sad;
621 ibsic(struct ibfoo *ib)
624 upd7210_wr(ib->u, AUXMR, AUXMR_SIFC);
626 upd7210_wr(ib->u, AUXMR, AUXMR_CIFC);
635 ibtmo(struct ibfoo *ib)
638 ib->h->timeout = timeouts[ib->ap->tmo];
645 ibtrg(struct ibfoo *ib)
648 return (ib_send_msg(ib, GET));
654 ibwrt(struct ibfoo *ib)
659 if (ib->h->kind == H_BOARD)
661 bp = malloc(ib->ap->cnt, M_IBFOO, M_WAITOK);
662 /* XXX: bigger than PAGE_SIZE handling */
663 i = copyin(ib->ap->buffer, bp, ib->ap->cnt);
668 if (ib->wrh != ib->h) {
672 buf[i++] = LAD | ib->h->pad;
674 buf[i++] = LAD | TAD | ib->h->sad;
676 i = pio_cmd(ib->u, buf, i);
679 config_eos(ib->u, ib->h);
681 upd7210_goto_standby(ib->u);
682 ib->doeoi = ib->h->eot;
683 i = pio_odata(ib->u, bp, ib->ap->cnt);
684 upd7210_take_ctrl_async(ib->u);
692 #define ibwrtkey NULL
695 static struct ibhandler {
701 [__ID_IBASK] = { "ibask", H_EITHER, ibask, __F_HANDLE | __F_OPTION | __F_RETVAL },
702 [__ID_IBBNA] = { "ibbna", H_DEV, ibbna, __F_HANDLE | __F_BDNAME },
703 [__ID_IBCAC] = { "ibcac", H_BOARD, ibcac, __F_HANDLE | __F_V },
704 [__ID_IBCLR] = { "ibclr", H_DEV, ibclr, __F_HANDLE },
705 [__ID_IBCMD] = { "ibcmd", H_BOARD, ibcmd, __F_HANDLE | __F_BUFFER | __F_CNT },
706 [__ID_IBCMDA] = { "ibcmda", H_BOARD, ibcmda, __F_HANDLE | __F_BUFFER | __F_CNT },
707 [__ID_IBCONFIG] = { "ibconfig", H_EITHER, ibconfig, __F_HANDLE | __F_OPTION | __F_VALUE },
708 [__ID_IBDEV] = { "ibdev", 0, ibdev, __F_BOARDID | __F_PAD | __F_SAD | __F_TMO | __F_EOT | __F_EOS },
709 [__ID_IBDIAG] = { "ibdiag", H_EITHER, ibdiag, __F_HANDLE | __F_BUFFER | __F_CNT },
710 [__ID_IBDMA] = { "ibdma", H_EITHER, ibdma, __F_HANDLE | __F_V },
711 [__ID_IBEOS] = { "ibeos", H_EITHER, ibeos, __F_HANDLE | __F_EOS },
712 [__ID_IBEOT] = { "ibeot", H_EITHER, ibeot, __F_HANDLE | __F_EOT },
713 [__ID_IBEVENT] = { "ibevent", H_BOARD, ibevent, __F_HANDLE | __F_EVENT },
714 [__ID_IBFIND] = { "ibfind", 0, ibfind, __F_BDNAME },
715 [__ID_IBGTS] = { "ibgts", H_BOARD, ibgts, __F_HANDLE | __F_V },
716 [__ID_IBIST] = { "ibist", H_BOARD, ibist, __F_HANDLE | __F_V },
717 [__ID_IBLINES] = { "iblines", H_BOARD, iblines, __F_HANDLE | __F_LINES },
718 [__ID_IBLLO] = { "ibllo", H_EITHER, ibllo, __F_HANDLE },
719 [__ID_IBLN] = { "ibln", H_BOARD, ibln, __F_HANDLE | __F_PADVAL | __F_SADVAL | __F_LISTENFLAG },
720 [__ID_IBLOC] = { "ibloc", H_EITHER, ibloc, __F_HANDLE },
721 [__ID_IBONL] = { "ibonl", H_EITHER, ibonl, __F_HANDLE | __F_V },
722 [__ID_IBPAD] = { "ibpad", H_EITHER, ibpad, __F_HANDLE | __F_PAD },
723 [__ID_IBPCT] = { "ibpct", H_DEV, ibpct, __F_HANDLE },
724 [__ID_IBPOKE] = { "ibpoke", H_EITHER, ibpoke, __F_HANDLE | __F_OPTION | __F_VALUE },
725 [__ID_IBPPC] = { "ibppc", H_EITHER, ibppc, __F_HANDLE | __F_V },
726 [__ID_IBRD] = { "ibrd", H_EITHER, ibrd, __F_HANDLE | __F_BUFFER | __F_CNT },
727 [__ID_IBRDA] = { "ibrda", H_EITHER, ibrda, __F_HANDLE | __F_BUFFER | __F_CNT },
728 [__ID_IBRDF] = { "ibrdf", H_EITHER, ibrdf, __F_HANDLE | __F_FLNAME },
729 [__ID_IBRDKEY] = { "ibrdkey", H_EITHER, ibrdkey, __F_HANDLE | __F_BUFFER | __F_CNT },
730 [__ID_IBRPP] = { "ibrpp", H_EITHER, ibrpp, __F_HANDLE | __F_PPR },
731 [__ID_IBRSC] = { "ibrsc", H_BOARD, ibrsc, __F_HANDLE | __F_V },
732 [__ID_IBRSP] = { "ibrsp", H_DEV, ibrsp, __F_HANDLE | __F_SPR },
733 [__ID_IBRSV] = { "ibrsv", H_EITHER, ibrsv, __F_HANDLE | __F_V },
734 [__ID_IBSAD] = { "ibsad", H_EITHER, ibsad, __F_HANDLE | __F_SAD },
735 [__ID_IBSGNL] = { "ibsgnl", H_EITHER, ibsgnl, __F_HANDLE | __F_V },
736 [__ID_IBSIC] = { "ibsic", H_BOARD, ibsic, __F_HANDLE },
737 [__ID_IBSRE] = { "ibsre", H_BOARD, ibsre, __F_HANDLE | __F_V },
738 [__ID_IBSRQ] = { "ibsrq", H_EITHER, ibsrq, __F_FUNC },
739 [__ID_IBSTOP] = { "ibstop", H_EITHER, ibstop, __F_HANDLE },
740 [__ID_IBTMO] = { "ibtmo", H_EITHER, ibtmo, __F_HANDLE | __F_TMO },
741 [__ID_IBTRAP] = { "ibtrap", H_EITHER, ibtrap, __F_MASK | __F_MODE },
742 [__ID_IBTRG] = { "ibtrg", H_DEV, ibtrg, __F_HANDLE },
743 [__ID_IBWAIT] = { "ibwait", H_EITHER, ibwait, __F_HANDLE | __F_MASK },
744 [__ID_IBWRT] = { "ibwrt", H_EITHER, ibwrt, __F_HANDLE | __F_BUFFER | __F_CNT },
745 [__ID_IBWRTA] = { "ibwrta", H_EITHER, ibwrta, __F_HANDLE | __F_BUFFER | __F_CNT },
746 [__ID_IBWRTF] = { "ibwrtf", H_EITHER, ibwrtf, __F_HANDLE | __F_FLNAME },
747 [__ID_IBWRTKEY] = { "ibwrtkey", H_EITHER, ibwrtkey, __F_HANDLE | __F_BUFFER | __F_CNT },
748 [__ID_IBXTRC] = { "ibxtrc", H_EITHER, ibxtrc, __F_HANDLE | __F_BUFFER | __F_CNT },
751 static const u_int max_ibhandler = sizeof ibhandlers / sizeof ibhandlers[0];
754 ib_dump_args(struct ibhandler *ih, struct ibarg *ap)
757 if (ih->name != NULL)
758 printf("%s(", ih->name);
760 printf("ibinvalid(");
761 printf("[0x%x]", ap->__field);
762 if (ap->__field & __F_HANDLE) printf(" handle=%d", ap->handle);
763 if (ap->__field & __F_EOS) printf(" eos=0x%x", ap->eos);
764 if (ap->__field & __F_EOT) printf(" eot=%d", ap->eot);
765 if (ap->__field & __F_TMO) printf(" tmo=%d", ap->tmo);
766 if (ap->__field & __F_PAD) printf(" pad=0x%x", ap->pad);
767 if (ap->__field & __F_SAD) printf(" sad=0x%x", ap->sad);
768 if (ap->__field & __F_BUFFER) printf(" buffer=%p", ap->buffer);
769 if (ap->__field & __F_CNT) printf(" cnt=%ld", ap->cnt);
770 if (ap->__field & __F_V) printf(" v=%d/0x%x", ap->v, ap->v);
776 gpib_ib_open(struct cdev *dev, int oflags, int devtype, struct thread *td)
786 mtx_unlock(&u->mutex);
790 mtx_unlock(&u->mutex);
792 if (u->dmachan >= 0) {
794 error = isa_dma_acquire(u->dmachan);
796 error = isa_dma_init(u->dmachan, PAGE_SIZE, M_WAITOK);
798 isa_dma_release(u->dmachan);
806 mtx_unlock(&u->mutex);
810 ib = malloc(sizeof *ib, M_IBFOO, M_WAITOK | M_ZERO);
811 LIST_INIT(&ib->handles);
812 callout_init(&ib->callout, CALLOUT_MPSAFE);
813 ib->unrhdr = new_unrhdr(0, INT_MAX, NULL);
817 u->irq = gpib_ib_irq;
819 upd7210_wr(u, AUXMR, AUXMR_CRST);
822 upd7210_wr(u, IMR1, 0x00);
823 upd7210_wr(u, IMR2, 0x00);
824 upd7210_wr(u, SPMR, 0x00);
825 upd7210_wr(u, ADR, 0x00);
826 upd7210_wr(u, ADR, ADR_ARS | ADR_DL | ADR_DT);
827 upd7210_wr(u, ADMR, ADMR_ADM0 | ADMR_TRM0 | ADMR_TRM1);
828 upd7210_wr(u, EOSR, 0x00);
829 upd7210_wr(u, AUXMR, C_ICR | 8);
830 upd7210_wr(u, AUXMR, C_PPR | PPR_U);
831 upd7210_wr(u, AUXMR, C_AUXA);
832 upd7210_wr(u, AUXMR, C_AUXB + 3);
833 upd7210_wr(u, AUXMR, C_AUXE + 0);
834 upd7210_wr(u, AUXMR, AUXMR_PON);
835 upd7210_wr(u, AUXMR, AUXMR_CIFC);
837 upd7210_wr(u, AUXMR, AUXMR_SIFC);
838 upd7210_wr(u, AUXMR, AUXMR_SREN);
843 gpib_ib_close(struct cdev *dev, int oflags, int devtype, struct thread *td)
850 /* XXX: assert pointer consistency */
853 /* XXX: free handles */
857 if (u->dmachan >= 0) {
859 isa_dma_release(u->dmachan);
865 upd7210_wr(u, IMR1, 0x00);
866 upd7210_wr(u, IMR2, 0x00);
867 upd7210_wr(u, AUXMR, AUXMR_CRST);
869 mtx_unlock(&u->mutex);
874 gpib_ib_ioctl(struct cdev *dev, u_long cmd, caddr_t data, int fflag, struct thread *td)
877 struct ibhandler *ih;
882 struct timeval deadline, tv;
887 /* We only support a single ioctl, everything else is a mistake */
888 if (cmd != GPIB_IBFOO)
891 /* Check the identifier and field-bitmap in the arguments. */
893 if (ap->__ident < 0 || ap->__ident >= max_ibhandler)
895 ih = &ibhandlers[ap->__ident];
896 if (ap->__field != ih->args)
900 ib_dump_args(ih, ap);
902 if (ih->func == NULL)
910 if (ap->__field & __F_TMO) {
911 if (ap->tmo < 0 || ap->tmo >= max_timeouts)
912 return (ib_set_error(ap, EARG));
915 if (ap->__field & __F_EOS) {
916 if ((ap->eos & ~(REOS | XEOS | BIN | 0xff)) ||
917 ((ap->eos & (BIN | 0x80)) == 0x80))
918 return (ib_set_error(ap, EARG));
920 if (ap->__field & __F_PAD) {
921 if (ap->pad < 0 || ap->pad > 30)
922 return (ib_set_error(ap, EARG));
924 if (ap->__field & __F_SAD) {
925 if (ap->sad != 0 && (ap->sad < 0x60 || ap->sad > 126))
926 return (ib_set_error(ap, EARG));
933 /* Find the handle, if any */
935 if ((ap->__field & __F_HANDLE) && gethandle(u, ap, &h)) {
936 mtx_unlock(&u->mutex);
940 /* Check that the handle is the right kind */
941 if (h != NULL && !(h->kind & ih->kind)) {
942 mtx_unlock(&u->mutex);
943 return (ib_set_error(ap, EARG));
946 /* Set up handle and deadline */
947 if (h != NULL && timevalisset(&h->timeout)) {
948 getmicrouptime(&deadline);
949 timevaladd(&deadline, &h->timeout);
951 timevalclear(&deadline);
954 /* Wait for the card to be(come) available, respect deadline */
955 while(u->busy != 1) {
956 error = msleep(ib, &u->mutex,
957 PZERO | PCATCH, "gpib_ibioctl", hz / 10);
960 mtx_unlock(&u->mutex);
962 return(ib_set_error(ap, EABO));
963 if (error == EWOULDBLOCK && timevalisset(&deadline)) {
965 if (timevalcmp(&deadline, &tv, <))
966 return(ib_had_timeout(ap));
971 mtx_unlock(&u->mutex);
973 /* Hand over deadline handling to the callout routine */
977 ib->deadline = deadline;
978 callout_reset(&ib->callout, hz / 5, gpib_ib_timeout, u);
980 error = ih->func(ib);
986 timevalclear(&deadline);
987 callout_stop(&ib->callout);
992 mtx_unlock(&u->mutex);
995 return(ib_set_errno(ap, error));
999 struct cdevsw gpib_ib_cdevsw = {
1000 .d_version = D_VERSION,
1001 .d_name = "gpib_ib",
1002 .d_open = gpib_ib_open,
1003 .d_ioctl = gpib_ib_ioctl,
1004 .d_close = gpib_ib_close,