2 * Copyright 2021 Intel Corp
3 * Copyright 2021 Rubicon Communications, LLC (Netgate)
4 * SPDX-License-Identifier: BSD-3-Clause
13 * igc_init_mac_params - Initialize MAC function pointers
14 * @hw: pointer to the HW structure
16 * This function initializes the function pointers for the MAC
17 * set of functions. Called by drivers or by igc_setup_init_funcs.
19 s32 igc_init_mac_params(struct igc_hw *hw)
21 s32 ret_val = IGC_SUCCESS;
23 if (hw->mac.ops.init_params) {
24 ret_val = hw->mac.ops.init_params(hw);
26 DEBUGOUT("MAC Initialization Error\n");
30 DEBUGOUT("mac.init_mac_params was NULL\n");
31 ret_val = -IGC_ERR_CONFIG;
39 * igc_init_nvm_params - Initialize NVM function pointers
40 * @hw: pointer to the HW structure
42 * This function initializes the function pointers for the NVM
43 * set of functions. Called by drivers or by igc_setup_init_funcs.
45 s32 igc_init_nvm_params(struct igc_hw *hw)
47 s32 ret_val = IGC_SUCCESS;
49 if (hw->nvm.ops.init_params) {
50 ret_val = hw->nvm.ops.init_params(hw);
52 DEBUGOUT("NVM Initialization Error\n");
56 DEBUGOUT("nvm.init_nvm_params was NULL\n");
57 ret_val = -IGC_ERR_CONFIG;
65 * igc_init_phy_params - Initialize PHY function pointers
66 * @hw: pointer to the HW structure
68 * This function initializes the function pointers for the PHY
69 * set of functions. Called by drivers or by igc_setup_init_funcs.
71 s32 igc_init_phy_params(struct igc_hw *hw)
73 s32 ret_val = IGC_SUCCESS;
75 if (hw->phy.ops.init_params) {
76 ret_val = hw->phy.ops.init_params(hw);
78 DEBUGOUT("PHY Initialization Error\n");
82 DEBUGOUT("phy.init_phy_params was NULL\n");
83 ret_val = -IGC_ERR_CONFIG;
91 * igc_set_mac_type - Sets MAC type
92 * @hw: pointer to the HW structure
94 * This function sets the mac type of the adapter based on the
95 * device ID stored in the hw structure.
96 * MUST BE FIRST FUNCTION CALLED (explicitly or through
97 * igc_setup_init_funcs()).
99 s32 igc_set_mac_type(struct igc_hw *hw)
101 struct igc_mac_info *mac = &hw->mac;
102 s32 ret_val = IGC_SUCCESS;
104 DEBUGFUNC("igc_set_mac_type");
106 switch (hw->device_id) {
107 case IGC_DEV_ID_I225_LM:
108 case IGC_DEV_ID_I225_V:
109 case IGC_DEV_ID_I225_K:
110 case IGC_DEV_ID_I225_I:
111 case IGC_DEV_ID_I220_V:
112 case IGC_DEV_ID_I225_K2:
113 case IGC_DEV_ID_I225_LMVP:
114 case IGC_DEV_ID_I225_IT:
115 case IGC_DEV_ID_I226_LM:
116 case IGC_DEV_ID_I226_V:
117 case IGC_DEV_ID_I226_IT:
118 case IGC_DEV_ID_I221_V:
119 case IGC_DEV_ID_I226_BLANK_NVM:
120 case IGC_DEV_ID_I225_BLANK_NVM:
121 mac->type = igc_i225;
124 /* Should never have loaded on this device */
125 ret_val = -IGC_ERR_MAC_INIT;
133 * igc_setup_init_funcs - Initializes function pointers
134 * @hw: pointer to the HW structure
135 * @init_device: true will initialize the rest of the function pointers
136 * getting the device ready for use. FALSE will only set
137 * MAC type and the function pointers for the other init
138 * functions. Passing FALSE will not generate any hardware
141 * This function must be called by a driver in order to use the rest
142 * of the 'shared' code files. Called by drivers only.
144 s32 igc_setup_init_funcs(struct igc_hw *hw, bool init_device)
148 /* Can't do much good without knowing the MAC type. */
149 ret_val = igc_set_mac_type(hw);
151 DEBUGOUT("ERROR: MAC type could not be set properly.\n");
156 DEBUGOUT("ERROR: Registers not mapped\n");
157 ret_val = -IGC_ERR_CONFIG;
162 * Init function pointers to generic implementations. We do this first
163 * allowing a driver module to override it afterward.
165 igc_init_mac_ops_generic(hw);
166 igc_init_phy_ops_generic(hw);
167 igc_init_nvm_ops_generic(hw);
170 * Set up the init function pointers. These are functions within the
171 * adapter family file that sets up function pointers for the rest of
172 * the functions in that family.
174 switch (hw->mac.type) {
176 igc_init_function_pointers_i225(hw);
179 DEBUGOUT("Hardware not supported\n");
180 ret_val = -IGC_ERR_CONFIG;
185 * Initialize the rest of the function pointers. These require some
186 * register reads/writes in some cases.
188 if (!(ret_val) && init_device) {
189 ret_val = igc_init_mac_params(hw);
193 ret_val = igc_init_nvm_params(hw);
197 ret_val = igc_init_phy_params(hw);
207 * igc_get_bus_info - Obtain bus information for adapter
208 * @hw: pointer to the HW structure
210 * This will obtain information about the HW bus for which the
211 * adapter is attached and stores it in the hw structure. This is a
212 * function pointer entry point called by drivers.
214 s32 igc_get_bus_info(struct igc_hw *hw)
216 if (hw->mac.ops.get_bus_info)
217 return hw->mac.ops.get_bus_info(hw);
223 * igc_clear_vfta - Clear VLAN filter table
224 * @hw: pointer to the HW structure
226 * This clears the VLAN filter table on the adapter. This is a function
227 * pointer entry point called by drivers.
229 void igc_clear_vfta(struct igc_hw *hw)
231 if (hw->mac.ops.clear_vfta)
232 hw->mac.ops.clear_vfta(hw);
236 * igc_write_vfta - Write value to VLAN filter table
237 * @hw: pointer to the HW structure
238 * @offset: the 32-bit offset in which to write the value to.
239 * @value: the 32-bit value to write at location offset.
241 * This writes a 32-bit value to a 32-bit offset in the VLAN filter
242 * table. This is a function pointer entry point called by drivers.
244 void igc_write_vfta(struct igc_hw *hw, u32 offset, u32 value)
246 if (hw->mac.ops.write_vfta)
247 hw->mac.ops.write_vfta(hw, offset, value);
251 * igc_update_mc_addr_list - Update Multicast addresses
252 * @hw: pointer to the HW structure
253 * @mc_addr_list: array of multicast addresses to program
254 * @mc_addr_count: number of multicast addresses to program
256 * Updates the Multicast Table Array.
257 * The caller must have a packed mc_addr_list of multicast addresses.
259 void igc_update_mc_addr_list(struct igc_hw *hw, u8 *mc_addr_list,
262 if (hw->mac.ops.update_mc_addr_list)
263 hw->mac.ops.update_mc_addr_list(hw, mc_addr_list,
268 * igc_force_mac_fc - Force MAC flow control
269 * @hw: pointer to the HW structure
271 * Force the MAC's flow control settings. Currently no func pointer exists
272 * and all implementations are handled in the generic version of this
275 s32 igc_force_mac_fc(struct igc_hw *hw)
277 return igc_force_mac_fc_generic(hw);
281 * igc_check_for_link - Check/Store link connection
282 * @hw: pointer to the HW structure
284 * This checks the link condition of the adapter and stores the
285 * results in the hw->mac structure. This is a function pointer entry
286 * point called by drivers.
288 s32 igc_check_for_link(struct igc_hw *hw)
290 if (hw->mac.ops.check_for_link)
291 return hw->mac.ops.check_for_link(hw);
293 return -IGC_ERR_CONFIG;
297 * igc_reset_hw - Reset hardware
298 * @hw: pointer to the HW structure
300 * This resets the hardware into a known state. This is a function pointer
301 * entry point called by drivers.
303 s32 igc_reset_hw(struct igc_hw *hw)
305 if (hw->mac.ops.reset_hw)
306 return hw->mac.ops.reset_hw(hw);
308 return -IGC_ERR_CONFIG;
312 * igc_init_hw - Initialize hardware
313 * @hw: pointer to the HW structure
315 * This inits the hardware readying it for operation. This is a function
316 * pointer entry point called by drivers.
318 s32 igc_init_hw(struct igc_hw *hw)
320 if (hw->mac.ops.init_hw)
321 return hw->mac.ops.init_hw(hw);
323 return -IGC_ERR_CONFIG;
327 * igc_setup_link - Configures link and flow control
328 * @hw: pointer to the HW structure
330 * This configures link and flow control settings for the adapter. This
331 * is a function pointer entry point called by drivers. While modules can
332 * also call this, they probably call their own version of this function.
334 s32 igc_setup_link(struct igc_hw *hw)
336 if (hw->mac.ops.setup_link)
337 return hw->mac.ops.setup_link(hw);
339 return -IGC_ERR_CONFIG;
343 * igc_get_speed_and_duplex - Returns current speed and duplex
344 * @hw: pointer to the HW structure
345 * @speed: pointer to a 16-bit value to store the speed
346 * @duplex: pointer to a 16-bit value to store the duplex.
348 * This returns the speed and duplex of the adapter in the two 'out'
349 * variables passed in. This is a function pointer entry point called
352 s32 igc_get_speed_and_duplex(struct igc_hw *hw, u16 *speed, u16 *duplex)
354 if (hw->mac.ops.get_link_up_info)
355 return hw->mac.ops.get_link_up_info(hw, speed, duplex);
357 return -IGC_ERR_CONFIG;
361 * igc_disable_pcie_master - Disable PCI-Express master access
362 * @hw: pointer to the HW structure
364 * Disables PCI-Express master access and verifies there are no pending
365 * requests. Currently no func pointer exists and all implementations are
366 * handled in the generic version of this function.
368 s32 igc_disable_pcie_master(struct igc_hw *hw)
370 return igc_disable_pcie_master_generic(hw);
374 * igc_config_collision_dist - Configure collision distance
375 * @hw: pointer to the HW structure
377 * Configures the collision distance to the default value and is used
380 void igc_config_collision_dist(struct igc_hw *hw)
382 if (hw->mac.ops.config_collision_dist)
383 hw->mac.ops.config_collision_dist(hw);
387 * igc_rar_set - Sets a receive address register
388 * @hw: pointer to the HW structure
389 * @addr: address to set the RAR to
390 * @index: the RAR to set
392 * Sets a Receive Address Register (RAR) to the specified address.
394 int igc_rar_set(struct igc_hw *hw, u8 *addr, u32 index)
396 if (hw->mac.ops.rar_set)
397 return hw->mac.ops.rar_set(hw, addr, index);
403 * igc_validate_mdi_setting - Ensures valid MDI/MDIX SW state
404 * @hw: pointer to the HW structure
406 * Ensures that the MDI/MDIX SW state is valid.
408 s32 igc_validate_mdi_setting(struct igc_hw *hw)
410 if (hw->mac.ops.validate_mdi_setting)
411 return hw->mac.ops.validate_mdi_setting(hw);
417 * igc_hash_mc_addr - Determines address location in multicast table
418 * @hw: pointer to the HW structure
419 * @mc_addr: Multicast address to hash.
421 * This hashes an address to determine its location in the multicast
422 * table. Currently no func pointer exists and all implementations
423 * are handled in the generic version of this function.
425 u32 igc_hash_mc_addr(struct igc_hw *hw, u8 *mc_addr)
427 return igc_hash_mc_addr_generic(hw, mc_addr);
431 * igc_check_reset_block - Verifies PHY can be reset
432 * @hw: pointer to the HW structure
434 * Checks if the PHY is in a state that can be reset or if manageability
435 * has it tied up. This is a function pointer entry point called by drivers.
437 s32 igc_check_reset_block(struct igc_hw *hw)
439 if (hw->phy.ops.check_reset_block)
440 return hw->phy.ops.check_reset_block(hw);
446 * igc_read_phy_reg - Reads PHY register
447 * @hw: pointer to the HW structure
448 * @offset: the register to read
449 * @data: the buffer to store the 16-bit read.
451 * Reads the PHY register and returns the value in data.
452 * This is a function pointer entry point called by drivers.
454 s32 igc_read_phy_reg(struct igc_hw *hw, u32 offset, u16 *data)
456 if (hw->phy.ops.read_reg)
457 return hw->phy.ops.read_reg(hw, offset, data);
463 * igc_write_phy_reg - Writes PHY register
464 * @hw: pointer to the HW structure
465 * @offset: the register to write
466 * @data: the value to write.
468 * Writes the PHY register at offset with the value in data.
469 * This is a function pointer entry point called by drivers.
471 s32 igc_write_phy_reg(struct igc_hw *hw, u32 offset, u16 data)
473 if (hw->phy.ops.write_reg)
474 return hw->phy.ops.write_reg(hw, offset, data);
480 * igc_release_phy - Generic release PHY
481 * @hw: pointer to the HW structure
483 * Return if silicon family does not require a semaphore when accessing the
486 void igc_release_phy(struct igc_hw *hw)
488 if (hw->phy.ops.release)
489 hw->phy.ops.release(hw);
493 * igc_acquire_phy - Generic acquire PHY
494 * @hw: pointer to the HW structure
496 * Return success if silicon family does not require a semaphore when
499 s32 igc_acquire_phy(struct igc_hw *hw)
501 if (hw->phy.ops.acquire)
502 return hw->phy.ops.acquire(hw);
508 * igc_get_phy_info - Retrieves PHY information from registers
509 * @hw: pointer to the HW structure
511 * This function gets some information from various PHY registers and
512 * populates hw->phy values with it. This is a function pointer entry
513 * point called by drivers.
515 s32 igc_get_phy_info(struct igc_hw *hw)
517 if (hw->phy.ops.get_info)
518 return hw->phy.ops.get_info(hw);
524 * igc_phy_hw_reset - Hard PHY reset
525 * @hw: pointer to the HW structure
527 * Performs a hard PHY reset. This is a function pointer entry point called
530 s32 igc_phy_hw_reset(struct igc_hw *hw)
532 if (hw->phy.ops.reset)
533 return hw->phy.ops.reset(hw);
539 * igc_phy_commit - Soft PHY reset
540 * @hw: pointer to the HW structure
542 * Performs a soft PHY reset on those that apply. This is a function pointer
543 * entry point called by drivers.
545 s32 igc_phy_commit(struct igc_hw *hw)
547 if (hw->phy.ops.commit)
548 return hw->phy.ops.commit(hw);
554 * igc_set_d0_lplu_state - Sets low power link up state for D0
555 * @hw: pointer to the HW structure
556 * @active: boolean used to enable/disable lplu
558 * Success returns 0, Failure returns 1
560 * The low power link up (lplu) state is set to the power management level D0
561 * and SmartSpeed is disabled when active is true, else clear lplu for D0
562 * and enable Smartspeed. LPLU and Smartspeed are mutually exclusive. LPLU
563 * is used during Dx states where the power conservation is most important.
564 * During driver activity, SmartSpeed should be enabled so performance is
565 * maintained. This is a function pointer entry point called by drivers.
567 s32 igc_set_d0_lplu_state(struct igc_hw *hw, bool active)
569 if (hw->phy.ops.set_d0_lplu_state)
570 return hw->phy.ops.set_d0_lplu_state(hw, active);
576 * igc_set_d3_lplu_state - Sets low power link up state for D3
577 * @hw: pointer to the HW structure
578 * @active: boolean used to enable/disable lplu
580 * Success returns 0, Failure returns 1
582 * The low power link up (lplu) state is set to the power management level D3
583 * and SmartSpeed is disabled when active is true, else clear lplu for D3
584 * and enable Smartspeed. LPLU and Smartspeed are mutually exclusive. LPLU
585 * is used during Dx states where the power conservation is most important.
586 * During driver activity, SmartSpeed should be enabled so performance is
587 * maintained. This is a function pointer entry point called by drivers.
589 s32 igc_set_d3_lplu_state(struct igc_hw *hw, bool active)
591 if (hw->phy.ops.set_d3_lplu_state)
592 return hw->phy.ops.set_d3_lplu_state(hw, active);
598 * igc_read_mac_addr - Reads MAC address
599 * @hw: pointer to the HW structure
601 * Reads the MAC address out of the adapter and stores it in the HW structure.
602 * Currently no func pointer exists and all implementations are handled in the
603 * generic version of this function.
605 s32 igc_read_mac_addr(struct igc_hw *hw)
607 if (hw->mac.ops.read_mac_addr)
608 return hw->mac.ops.read_mac_addr(hw);
610 return igc_read_mac_addr_generic(hw);
614 * igc_read_pba_string - Read device part number string
615 * @hw: pointer to the HW structure
616 * @pba_num: pointer to device part number
617 * @pba_num_size: size of part number buffer
619 * Reads the product board assembly (PBA) number from the EEPROM and stores
620 * the value in pba_num.
621 * Currently no func pointer exists and all implementations are handled in the
622 * generic version of this function.
624 s32 igc_read_pba_string(struct igc_hw *hw, u8 *pba_num, u32 pba_num_size)
626 return igc_read_pba_string_generic(hw, pba_num, pba_num_size);
630 * igc_validate_nvm_checksum - Verifies NVM (EEPROM) checksum
631 * @hw: pointer to the HW structure
633 * Validates the NVM checksum is correct. This is a function pointer entry
634 * point called by drivers.
636 s32 igc_validate_nvm_checksum(struct igc_hw *hw)
638 if (hw->nvm.ops.validate)
639 return hw->nvm.ops.validate(hw);
641 return -IGC_ERR_CONFIG;
645 * igc_update_nvm_checksum - Updates NVM (EEPROM) checksum
646 * @hw: pointer to the HW structure
648 * Updates the NVM checksum. Currently no func pointer exists and all
649 * implementations are handled in the generic version of this function.
651 s32 igc_update_nvm_checksum(struct igc_hw *hw)
653 if (hw->nvm.ops.update)
654 return hw->nvm.ops.update(hw);
656 return -IGC_ERR_CONFIG;
660 * igc_reload_nvm - Reloads EEPROM
661 * @hw: pointer to the HW structure
663 * Reloads the EEPROM by setting the "Reinitialize from EEPROM" bit in the
664 * extended control register.
666 void igc_reload_nvm(struct igc_hw *hw)
668 if (hw->nvm.ops.reload)
669 hw->nvm.ops.reload(hw);
673 * igc_read_nvm - Reads NVM (EEPROM)
674 * @hw: pointer to the HW structure
675 * @offset: the word offset to read
676 * @words: number of 16-bit words to read
677 * @data: pointer to the properly sized buffer for the data.
679 * Reads 16-bit chunks of data from the NVM (EEPROM). This is a function
680 * pointer entry point called by drivers.
682 s32 igc_read_nvm(struct igc_hw *hw, u16 offset, u16 words, u16 *data)
684 if (hw->nvm.ops.read)
685 return hw->nvm.ops.read(hw, offset, words, data);
687 return -IGC_ERR_CONFIG;
691 * igc_write_nvm - Writes to NVM (EEPROM)
692 * @hw: pointer to the HW structure
693 * @offset: the word offset to read
694 * @words: number of 16-bit words to write
695 * @data: pointer to the properly sized buffer for the data.
697 * Writes 16-bit chunks of data to the NVM (EEPROM). This is a function
698 * pointer entry point called by drivers.
700 s32 igc_write_nvm(struct igc_hw *hw, u16 offset, u16 words, u16 *data)
702 if (hw->nvm.ops.write)
703 return hw->nvm.ops.write(hw, offset, words, data);
709 * igc_power_up_phy - Restores link in case of PHY power down
710 * @hw: pointer to the HW structure
712 * The phy may be powered down to save power, to turn off link when the
713 * driver is unloaded, or wake on lan is not enabled (among others).
715 void igc_power_up_phy(struct igc_hw *hw)
717 if (hw->phy.ops.power_up)
718 hw->phy.ops.power_up(hw);
724 * igc_power_down_phy - Power down PHY
725 * @hw: pointer to the HW structure
727 * The phy may be powered down to save power, to turn off link when the
728 * driver is unloaded, or wake on lan is not enabled (among others).
730 void igc_power_down_phy(struct igc_hw *hw)
732 if (hw->phy.ops.power_down)
733 hw->phy.ops.power_down(hw);