2 * Copyright (c) 2014-2015 Luiz Otavio O Souza <loos@FreeBSD.org>
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 #include <sys/cdefs.h>
28 __FBSDID("$FreeBSD$");
31 * Driver for Maxim DS3231[N] real-time clock/calendar.
34 #include "opt_platform.h"
36 #include <sys/param.h>
37 #include <sys/systm.h>
39 #include <sys/clock.h>
40 #include <sys/kernel.h>
41 #include <sys/module.h>
42 #include <sys/sysctl.h>
44 #include <dev/iicbus/iicbus.h>
45 #include <dev/iicbus/iiconf.h>
47 #include <dev/ofw/openfirm.h>
48 #include <dev/ofw/ofw_bus.h>
49 #include <dev/ofw/ofw_bus_subr.h>
52 #include <dev/iicbus/ds3231reg.h>
55 #include "iicbus_if.h"
61 struct intr_config_hook enum_hook;
62 uint16_t sc_addr; /* DS3231 slave address. */
67 static void ds3231_start(void *);
70 ds3231_read(device_t dev, uint16_t addr, uint8_t reg, uint8_t *data, size_t len)
72 struct iic_msg msg[2] = {
73 { addr, IIC_M_WR | IIC_M_NOSTOP, 1, ® },
74 { addr, IIC_M_RD, len, data },
77 return (iicbus_transfer(dev, msg, nitems(msg)));
81 ds3231_write(device_t dev, uint16_t addr, uint8_t *data, size_t len)
83 struct iic_msg msg[1] = {
84 { addr, IIC_M_WR, len, data },
87 return (iicbus_transfer(dev, msg, nitems(msg)));
91 ds3231_ctrl_read(struct ds3231_softc *sc)
96 error = ds3231_read(sc->sc_dev, sc->sc_addr, DS3231_CONTROL,
97 &sc->sc_ctrl, sizeof(sc->sc_ctrl));
99 device_printf(sc->sc_dev, "cannot read from RTC.\n");
107 ds3231_ctrl_write(struct ds3231_softc *sc)
112 data[0] = DS3231_CONTROL;
113 /* Always enable the oscillator. Always disable both alarms. */
114 data[1] = sc->sc_ctrl & ~DS3231_CTRL_MASK;
115 error = ds3231_write(sc->sc_dev, sc->sc_addr, data, sizeof(data));
117 device_printf(sc->sc_dev, "cannot write to RTC.\n");
123 ds3231_status_read(struct ds3231_softc *sc)
128 error = ds3231_read(sc->sc_dev, sc->sc_addr, DS3231_STATUS,
129 &sc->sc_status, sizeof(sc->sc_status));
131 device_printf(sc->sc_dev, "cannot read from RTC.\n");
139 ds3231_status_write(struct ds3231_softc *sc, int clear_a1, int clear_a2)
144 data[0] = DS3231_STATUS;
145 data[1] = sc->sc_status;
147 data[1] |= DS3231_STATUS_A1F;
149 data[1] |= DS3231_STATUS_A2F;
150 error = ds3231_write(sc->sc_dev, sc->sc_addr, data, sizeof(data));
152 device_printf(sc->sc_dev, "cannot write to RTC.\n");
158 ds3231_set_24hrs_mode(struct ds3231_softc *sc)
161 uint8_t data[2], hour;
164 error = ds3231_read(sc->sc_dev, sc->sc_addr, DS3231_HOUR,
165 &hour, sizeof(hour));
167 device_printf(sc->sc_dev, "cannot read from RTC.\n");
170 data[0] = DS3231_HOUR;
171 data[1] = hour & ~DS3231_C_MASK;
172 error = ds3231_write(sc->sc_dev, sc->sc_addr, data, sizeof(data));
174 device_printf(sc->sc_dev, "cannot write to RTC.\n");
180 ds3231_temp_read(struct ds3231_softc *sc, int *temp)
186 error = ds3231_read(sc->sc_dev, sc->sc_addr, DS3231_TEMP,
190 buf = (buf8[0] << 8) | (buf8[1] & 0xff);
192 if (buf & DS3231_NEG_BIT) {
193 buf = ~(buf & DS3231_TEMP_MASK) + 1;
196 *temp = ((int16_t)buf >> 8) * 10;
198 if (buf & DS3231_0250C)
200 if (buf & DS3231_0500C)
212 ds3231_temp_sysctl(SYSCTL_HANDLER_ARGS)
215 struct ds3231_softc *sc;
217 sc = (struct ds3231_softc *)arg1;
218 if (ds3231_temp_read(sc, &temp) != 0)
220 error = sysctl_handle_int(oidp, &temp, 0, req);
226 ds3231_conv_sysctl(SYSCTL_HANDLER_ARGS)
228 int error, conv, newc;
229 struct ds3231_softc *sc;
231 sc = (struct ds3231_softc *)arg1;
232 error = ds3231_ctrl_read(sc);
235 newc = conv = (sc->sc_ctrl & DS3231_CTRL_CONV) ? 1 : 0;
236 error = sysctl_handle_int(oidp, &newc, 0, req);
237 if (error != 0 || req->newptr == NULL)
239 if (conv == 0 && newc != 0) {
240 error = ds3231_status_read(sc);
243 if (sc->sc_status & DS3231_STATUS_BUSY)
245 sc->sc_ctrl |= DS3231_CTRL_CONV;
246 error = ds3231_ctrl_write(sc);
255 ds3231_bbsqw_sysctl(SYSCTL_HANDLER_ARGS)
257 int bbsqw, error, newb;
258 struct ds3231_softc *sc;
260 sc = (struct ds3231_softc *)arg1;
261 error = ds3231_ctrl_read(sc);
264 bbsqw = newb = (sc->sc_ctrl & DS3231_CTRL_BBSQW) ? 1 : 0;
265 error = sysctl_handle_int(oidp, &newb, 0, req);
266 if (error != 0 || req->newptr == NULL)
269 sc->sc_ctrl &= ~DS3231_CTRL_BBSQW;
271 sc->sc_ctrl |= DS3231_CTRL_BBSQW;
272 error = ds3231_ctrl_write(sc);
281 ds3231_sqw_freq_sysctl(SYSCTL_HANDLER_ARGS)
283 int ds3231_sqw_freq[] = { 1, 1024, 4096, 8192 };
284 int error, freq, i, newf, tmp;
285 struct ds3231_softc *sc;
287 sc = (struct ds3231_softc *)arg1;
288 error = ds3231_ctrl_read(sc);
291 tmp = (sc->sc_ctrl & DS3231_CTRL_RS_MASK) >> DS3231_CTRL_RS_SHIFT;
292 if (tmp >= nitems(ds3231_sqw_freq))
293 tmp = nitems(ds3231_sqw_freq) - 1;
294 freq = ds3231_sqw_freq[tmp];
295 error = sysctl_handle_int(oidp, &freq, 0, req);
296 if (error != 0 || req->newptr == NULL)
298 if (freq != ds3231_sqw_freq[tmp]) {
300 for (i = 0; i < nitems(ds3231_sqw_freq); i++)
301 if (freq >= ds3231_sqw_freq[i])
303 sc->sc_ctrl &= ~DS3231_CTRL_RS_MASK;
304 sc->sc_ctrl |= newf << DS3231_CTRL_RS_SHIFT;
305 error = ds3231_ctrl_write(sc);
314 ds3231_str_sqw_mode(char *buf)
320 if ((len > 2 && strncasecmp("interrupt", buf, len) == 0) ||
321 (len > 2 && strncasecmp("int", buf, len) == 0)) {
323 } else if ((len > 2 && strncasecmp("square-wave", buf, len) == 0) ||
324 (len > 2 && strncasecmp("sqw", buf, len) == 0)) {
332 ds3231_sqw_mode_sysctl(SYSCTL_HANDLER_ARGS)
335 int error, mode, newm;
336 struct ds3231_softc *sc;
338 sc = (struct ds3231_softc *)arg1;
339 error = ds3231_ctrl_read(sc);
342 if (sc->sc_ctrl & DS3231_CTRL_INTCN) {
344 strlcpy(buf, "interrupt", sizeof(buf));
347 strlcpy(buf, "square-wave", sizeof(buf));
349 error = sysctl_handle_string(oidp, buf, sizeof(buf), req);
350 if (error != 0 || req->newptr == NULL)
352 newm = ds3231_str_sqw_mode(buf);
353 if (newm != -1 && mode != newm) {
354 sc->sc_ctrl &= ~DS3231_CTRL_INTCN;
356 sc->sc_ctrl |= DS3231_CTRL_INTCN;
357 error = ds3231_ctrl_write(sc);
366 ds3231_en32khz_sysctl(SYSCTL_HANDLER_ARGS)
368 int error, en32khz, tmp;
369 struct ds3231_softc *sc;
371 sc = (struct ds3231_softc *)arg1;
372 error = ds3231_status_read(sc);
375 tmp = en32khz = (sc->sc_status & DS3231_STATUS_EN32KHZ) ? 1 : 0;
376 error = sysctl_handle_int(oidp, &en32khz, 0, req);
377 if (error != 0 || req->newptr == NULL)
379 if (en32khz != tmp) {
380 sc->sc_status &= ~DS3231_STATUS_EN32KHZ;
382 sc->sc_status |= DS3231_STATUS_EN32KHZ;
383 error = ds3231_status_write(sc, 0, 0);
392 ds3231_probe(device_t dev)
396 if (!ofw_bus_status_okay(dev))
398 if (!ofw_bus_is_compatible(dev, "maxim,ds3231"))
401 device_set_desc(dev, "Maxim DS3231 RTC");
403 return (BUS_PROBE_DEFAULT);
407 ds3231_attach(device_t dev)
409 struct ds3231_softc *sc;
411 sc = device_get_softc(dev);
413 sc->sc_addr = iicbus_get_addr(dev);
416 sc->enum_hook.ich_func = ds3231_start;
417 sc->enum_hook.ich_arg = dev;
420 * We have to wait until interrupts are enabled. Usually I2C read
421 * and write only works when the interrupts are available.
423 if (config_intrhook_establish(&sc->enum_hook) != 0)
430 ds3231_start(void *xdev)
433 struct ds3231_softc *sc;
434 struct sysctl_ctx_list *ctx;
435 struct sysctl_oid *tree_node;
436 struct sysctl_oid_list *tree;
438 dev = (device_t)xdev;
439 sc = device_get_softc(dev);
440 ctx = device_get_sysctl_ctx(dev);
441 tree_node = device_get_sysctl_tree(dev);
442 tree = SYSCTL_CHILDREN(tree_node);
444 config_intrhook_disestablish(&sc->enum_hook);
445 if (ds3231_ctrl_read(sc) != 0)
447 if (ds3231_status_read(sc) != 0)
449 /* Clear the OSF bit and ack any pending alarm interrupt. */
450 if (sc->sc_status & DS3231_STATUS_OSF) {
451 device_printf(sc->sc_dev,
452 "oscillator has stopped, check the battery.\n");
453 sc->sc_status &= ~DS3231_STATUS_OSF;
455 if (ds3231_status_write(sc, 1, 1) != 0)
457 /* Always enable the oscillator. */
458 if (ds3231_ctrl_write(sc) != 0)
460 /* Set the 24 hours mode. */
461 if (ds3231_set_24hrs_mode(sc) != 0)
465 SYSCTL_ADD_PROC(ctx, tree, OID_AUTO, "temperature",
466 CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_MPSAFE, sc, 0,
467 ds3231_temp_sysctl, "IK", "Current temperature");
468 /* Configuration parameters. */
469 SYSCTL_ADD_PROC(ctx, tree, OID_AUTO, "temp_conv",
470 CTLFLAG_RW | CTLTYPE_UINT | CTLFLAG_MPSAFE, sc, 0,
471 ds3231_conv_sysctl, "IU",
472 "DS3231 start a new temperature converstion");
473 SYSCTL_ADD_PROC(ctx, tree, OID_AUTO, "bbsqw",
474 CTLFLAG_RW | CTLTYPE_UINT | CTLFLAG_MPSAFE, sc, 0,
475 ds3231_bbsqw_sysctl, "IU",
476 "DS3231 battery-backed square-wave output enable");
477 SYSCTL_ADD_PROC(ctx, tree, OID_AUTO, "sqw_freq",
478 CTLFLAG_RW | CTLTYPE_UINT | CTLFLAG_MPSAFE, sc, 0,
479 ds3231_sqw_freq_sysctl, "IU",
480 "DS3231 square-wave output frequency");
481 SYSCTL_ADD_PROC(ctx, tree, OID_AUTO, "sqw_mode",
482 CTLFLAG_RW | CTLTYPE_STRING | CTLFLAG_MPSAFE, sc, 0,
483 ds3231_sqw_mode_sysctl, "A", "DS3231 SQW output mode control");
484 SYSCTL_ADD_PROC(ctx, tree, OID_AUTO, "32khz_enable",
485 CTLFLAG_RW | CTLTYPE_UINT | CTLFLAG_MPSAFE, sc, 0,
486 ds3231_en32khz_sysctl, "IU", "DS3231 enable the 32kHz output");
488 /* 1 second resolution. */
489 clock_register(dev, 1000000);
493 ds3231_gettime(device_t dev, struct timespec *ts)
497 struct ds3231_softc *sc;
500 sc = device_get_softc(dev);
501 memset(data, 0, sizeof(data));
502 error = ds3231_read(sc->sc_dev, sc->sc_addr, DS3231_SECS,
505 device_printf(dev, "cannot read from RTC.\n");
509 ct.sec = FROMBCD(data[DS3231_SECS] & DS3231_SECS_MASK);
510 ct.min = FROMBCD(data[DS3231_MINS] & DS3231_MINS_MASK);
511 ct.hour = FROMBCD(data[DS3231_HOUR] & DS3231_HOUR_MASK);
512 ct.day = FROMBCD(data[DS3231_DATE] & DS3231_DATE_MASK);
513 ct.dow = data[DS3231_WEEKDAY] & DS3231_WEEKDAY_MASK;
514 ct.mon = FROMBCD(data[DS3231_MONTH] & DS3231_MONTH_MASK);
515 ct.year = FROMBCD(data[DS3231_YEAR] & DS3231_YEAR_MASK);
516 c = (data[DS3231_MONTH] & DS3231_C_MASK) ? 1 : 0;
517 if (sc->sc_last_c == -1)
519 else if (c != sc->sc_last_c) {
523 ct.year += sc->sc_year0;
524 if (ct.year < POSIX_BASE_YEAR)
525 ct.year += 100; /* assume [1970, 2069] */
527 return (clock_ct_to_ts(&ct, ts));
531 ds3231_settime(device_t dev, struct timespec *ts)
535 struct ds3231_softc *sc;
538 sc = device_get_softc(dev);
539 /* Accuracy is only one second. */
540 if (ts->tv_nsec >= 500000000)
543 clock_ts_to_ct(ts, &ct);
544 memset(data, 0, sizeof(data));
545 data[0] = DS3231_SECS;
546 data[DS3231_SECS + 1] = TOBCD(ct.sec);
547 data[DS3231_MINS + 1] = TOBCD(ct.min);
548 data[DS3231_HOUR + 1] = TOBCD(ct.hour);
549 data[DS3231_DATE + 1] = TOBCD(ct.day);
550 data[DS3231_WEEKDAY + 1] = ct.dow;
551 data[DS3231_MONTH + 1] = TOBCD(ct.mon);
552 data[DS3231_YEAR + 1] = TOBCD(ct.year % 100);
554 data[DS3231_MONTH] |= DS3231_C_MASK;
555 /* Write the time back to RTC. */
556 error = ds3231_write(dev, sc->sc_addr, data, sizeof(data));
558 device_printf(dev, "cannot write to RTC.\n");
563 static device_method_t ds3231_methods[] = {
564 DEVMETHOD(device_probe, ds3231_probe),
565 DEVMETHOD(device_attach, ds3231_attach),
567 DEVMETHOD(clock_gettime, ds3231_gettime),
568 DEVMETHOD(clock_settime, ds3231_settime),
573 static driver_t ds3231_driver = {
576 sizeof(struct ds3231_softc),
579 static devclass_t ds3231_devclass;
581 DRIVER_MODULE(ds3231, iicbus, ds3231_driver, ds3231_devclass, NULL, NULL);
582 MODULE_VERSION(ds3231, 1);
583 MODULE_DEPEND(ds3231, iicbus, 1, 1, 1);