2 * Copyright (c) 2006 Warner Losh. All rights reserved.
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
7 * 1. Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
13 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
14 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
15 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
16 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
17 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
18 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
19 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
20 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
21 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
22 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 #include <sys/cdefs.h>
26 __FBSDID("$FreeBSD$");
28 * Generic IIC eeprom support, modeled after the AT24C family of products.
30 #include <sys/param.h>
31 #include <sys/systm.h>
34 #include <sys/kernel.h>
35 #include <sys/module.h>
36 #include <sys/mutex.h>
37 #include <sys/resource.h>
39 #include <machine/bus.h>
40 #include <dev/iicbus/iiconf.h>
41 #include <dev/iicbus/iicbus.h>
43 #include "iicbus_if.h"
45 #define IIC_M_WR 0 /* write operation */
46 #define MAX_RD_SZ 256 /* Largest read size we support */
47 #define MAX_WR_SZ 256 /* Largest write size we support */
50 device_t sc_dev; /* Myself */
51 struct mtx sc_mtx; /* basically a perimeter lock */
52 struct cdev *cdev; /* user interface */
56 int size; /* How big am I? */
57 int type; /* What type 8 or 16 bit? */
58 int rd_sz; /* What's the read page size */
59 int wr_sz; /* What's the write page size */
62 #define ICEE_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx)
63 #define ICEE_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx)
64 #define ICEE_LOCK_INIT(_sc) \
65 mtx_init(&_sc->sc_mtx, device_get_nameunit(_sc->sc_dev), "icee", MTX_DEF)
66 #define ICEE_LOCK_DESTROY(_sc) mtx_destroy(&_sc->sc_mtx);
67 #define ICEE_ASSERT_LOCKED(_sc) mtx_assert(&_sc->sc_mtx, MA_OWNED);
68 #define ICEE_ASSERT_UNLOCKED(_sc) mtx_assert(&_sc->sc_mtx, MA_NOTOWNED);
69 #define CDEV2SOFTC(dev) ((dev)->si_drv1)
72 static d_open_t icee_open;
73 static d_close_t icee_close;
74 static d_read_t icee_read;
75 static d_write_t icee_write;
77 static struct cdevsw icee_cdevsw =
79 .d_version = D_VERSION,
81 .d_close = icee_close,
87 icee_probe(device_t dev)
89 /* XXX really probe? -- not until we know the size... */
90 device_set_desc(dev, "I2C EEPROM");
95 icee_attach(device_t dev)
97 struct icee_softc *sc = device_get_softc(dev);
102 iicbus_get_addr(dev, &sc->addr);
104 dname = device_get_name(dev);
105 dunit = device_get_unit(dev);
106 resource_int_value(dname, dunit, "size", &sc->size);
107 resource_int_value(dname, dunit, "type", &sc->type);
108 resource_int_value(dname, dunit, "rd_sz", &sc->rd_sz);
109 if (sc->rd_sz > MAX_RD_SZ)
110 sc->rd_sz = MAX_RD_SZ;
111 resource_int_value(dname, dunit, "wr_sz", &sc->wr_sz);
113 device_printf(dev, "size: %d bytes bus_width: %d-bits\n",
115 sc->cdev = make_dev(&icee_cdevsw, device_get_unit(dev), UID_ROOT,
116 GID_WHEEL, 0600, "icee%d", device_get_unit(dev));
117 if (sc->cdev == NULL) {
121 sc->cdev->si_drv1 = sc;
128 icee_open(struct cdev *dev, int oflags, int devtype, struct thread *td)
130 struct icee_softc *sc;
132 sc = CDEV2SOFTC(dev);
134 if (!(sc->flags & OPENED)) {
142 icee_close(struct cdev *dev, int fflag, int devtype, struct thread *td)
144 struct icee_softc *sc;
146 sc = CDEV2SOFTC(dev);
148 sc->flags &= ~OPENED;
154 icee_read(struct cdev *dev, struct uio *uio, int ioflag)
156 struct icee_softc *sc;
158 uint8_t data[MAX_RD_SZ];
159 int error, i, len, slave;
160 struct iic_msg msgs[2] = {
161 { 0, IIC_M_WR, 1, addr },
162 { 0, IIC_M_RD, 0, data },
165 sc = CDEV2SOFTC(dev);
166 if (uio->uio_offset == sc->size)
168 if (uio->uio_offset > sc->size)
170 if (sc->type != 8 && sc->type != 16)
174 while (uio->uio_resid > 0) {
175 if (uio->uio_offset >= sc->size)
177 len = MIN(sc->rd_sz - (uio->uio_offset & (sc->rd_sz - 1)),
181 slave = (uio->uio_offset >> 7) | sc->addr;
184 addr[0] = uio->uio_offset & 0xff;
187 slave = sc->addr | (uio->uio_offset >> 15);
190 addr[0] = (uio->uio_offset >> 8) & 0xff;
191 addr[1] = uio->uio_offset & 0xff;
194 for (i = 0; i < 2; i++)
195 msgs[i].slave = slave;
196 error = iicbus_transfer(sc->sc_dev, msgs, 2);
199 error = uiomove(data, len, uio);
208 * Write to the part. We use three transfers here since we're actually
209 * doing a write followed by a read to make sure that the write finished.
210 * It is easier to encode the dummy read here than to break things up
211 * into smaller chunks...
214 icee_write(struct cdev *dev, struct uio *uio, int ioflag)
216 struct icee_softc *sc;
217 int error, len, slave, waitlimit;
218 uint8_t data[MAX_WR_SZ + 2];
219 struct iic_msg wr[1] = {
220 { 0, IIC_M_WR, 0, data },
222 struct iic_msg rd[1] = {
223 { 0, IIC_M_RD, 1, data },
226 sc = CDEV2SOFTC(dev);
227 if (uio->uio_offset >= sc->size)
229 if (sc->type != 8 && sc->type != 16)
233 while (uio->uio_resid > 0) {
234 if (uio->uio_offset >= sc->size)
236 len = MIN(sc->wr_sz - (uio->uio_offset & (sc->wr_sz - 1)),
240 slave = (uio->uio_offset >> 7) | sc->addr;
242 data[0] = uio->uio_offset & 0xff;
245 slave = sc->addr | (uio->uio_offset >> 15);
247 data[0] = (uio->uio_offset >> 8) & 0xff;
248 data[1] = uio->uio_offset & 0xff;
252 error = uiomove(data + sc->type / 8, len, uio);
255 error = iicbus_transfer(sc->sc_dev, wr, 1);
258 // Now wait for the write to be done by trying to read
264 error = iicbus_transfer(sc->sc_dev, rd, 1);
265 } while (waitlimit-- > 0 && error != 0);
267 printf("waiting for write failed %d\n", error);
275 static device_method_t icee_methods[] = {
276 DEVMETHOD(device_probe, icee_probe),
277 DEVMETHOD(device_attach, icee_attach),
282 static driver_t icee_driver = {
285 sizeof(struct icee_softc),
287 static devclass_t icee_devclass;
289 DRIVER_MODULE(icee, iicbus, icee_driver, icee_devclass, 0, 0);
290 MODULE_VERSION(icee, 1);
291 MODULE_DEPEND(icee, iicbus, 1, 1, 1);