2 * Copyright (C) 2008 MARVELL INTERNATIONAL LTD.
5 * Developed by Semihalf.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. Neither the name of MARVELL nor the names of contributors
16 * may be used to endorse or promote products derived from this software
17 * without specific prior written permission.
19 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
23 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33 * Driver for the TWSI (aka I2C, aka IIC) bus controller found on Marvell
34 * and Allwinner SoCs. Supports master operation only.
36 * Calls to DELAY() are needed per Application Note AN-179 "TWSI Software
37 * Guidelines for Discovery(TM), Horizon (TM) and Feroceon(TM) Devices".
40 #include <sys/cdefs.h>
41 __FBSDID("$FreeBSD$");
43 #include <sys/param.h>
44 #include <sys/systm.h>
46 #include <sys/kernel.h>
47 #include <sys/module.h>
48 #include <sys/resource.h>
50 #include <machine/_inttypes.h>
51 #include <machine/bus.h>
52 #include <machine/resource.h>
57 #include <sys/mutex.h>
59 #include <dev/iicbus/iiconf.h>
60 #include <dev/iicbus/iicbus.h>
61 #include <dev/ofw/ofw_bus.h>
62 #include <dev/ofw/ofw_bus_subr.h>
64 #include <dev/iicbus/twsi/twsi.h>
66 #include "iicbus_if.h"
68 #define TWSI_CONTROL_ACK (1 << 2)
69 #define TWSI_CONTROL_IFLG (1 << 3)
70 #define TWSI_CONTROL_STOP (1 << 4)
71 #define TWSI_CONTROL_START (1 << 5)
72 #define TWSI_CONTROL_TWSIEN (1 << 6)
73 #define TWSI_CONTROL_INTEN (1 << 7)
75 #define TWSI_STATUS_START 0x08
76 #define TWSI_STATUS_RPTD_START 0x10
77 #define TWSI_STATUS_ADDR_W_ACK 0x18
78 #define TWSI_STATUS_ADDR_W_NACK 0x20
79 #define TWSI_STATUS_DATA_WR_ACK 0x28
80 #define TWSI_STATUS_DATA_WR_NACK 0x30
81 #define TWSI_STATUS_ADDR_R_ACK 0x40
82 #define TWSI_STATUS_ADDR_R_NACK 0x48
83 #define TWSI_STATUS_DATA_RD_ACK 0x50
84 #define TWSI_STATUS_DATA_RD_NOACK 0x58
90 #define debugf(dev, fmt, args...) device_printf(dev, "%s: " fmt, __func__, ##args)
92 #define debugf(dev, fmt, args...)
95 static struct resource_spec res_spec[] = {
96 { SYS_RES_MEMORY, 0, RF_ACTIVE },
97 { SYS_RES_IRQ, 0, RF_ACTIVE | RF_SHAREABLE},
101 static __inline uint32_t
102 TWSI_READ(struct twsi_softc *sc, bus_size_t off)
106 val = bus_read_4(sc->res[0], off);
107 debugf(sc->dev, "read %x from %lx\n", val, off);
112 TWSI_WRITE(struct twsi_softc *sc, bus_size_t off, uint32_t val)
115 debugf(sc->dev, "Writing %x to %lx\n", val, off);
116 bus_write_4(sc->res[0], off, val);
120 twsi_control_clear(struct twsi_softc *sc, uint32_t mask)
124 val = TWSI_READ(sc, sc->reg_control);
125 debugf(sc->dev, "read val=%x\n", val);
126 val &= ~(TWSI_CONTROL_STOP | TWSI_CONTROL_START);
128 debugf(sc->dev, "write val=%x\n", val);
129 TWSI_WRITE(sc, sc->reg_control, val);
133 twsi_control_set(struct twsi_softc *sc, uint32_t mask)
137 val = TWSI_READ(sc, sc->reg_control);
138 debugf(sc->dev, "read val=%x\n", val);
139 val &= ~(TWSI_CONTROL_STOP | TWSI_CONTROL_START);
141 debugf(sc->dev, "write val=%x\n", val);
142 TWSI_WRITE(sc, sc->reg_control, val);
146 twsi_clear_iflg(struct twsi_softc *sc)
150 /* There are two ways of clearing IFLAG. */
152 twsi_control_set(sc, TWSI_CONTROL_IFLG);
154 twsi_control_clear(sc, TWSI_CONTROL_IFLG);
160 * timeout given in us
162 * 0 on successful mask change
163 * non-zero on timeout
166 twsi_poll_ctrl(struct twsi_softc *sc, int timeout, uint32_t mask)
170 debugf(sc->dev, "Waiting for ctrl reg to match mask %x\n", mask);
171 while (!(TWSI_READ(sc, sc->reg_control) & mask)) {
176 debugf(sc->dev, "done\n");
182 * 'timeout' is given in us. Note also that timeout handling is not exact --
183 * twsi_locked_start() total wait can be more than 2 x timeout
184 * (twsi_poll_ctrl() is called twice). 'mask' can be either TWSI_STATUS_START
185 * or TWSI_STATUS_RPTD_START
188 twsi_locked_start(device_t dev, struct twsi_softc *sc, int32_t mask,
189 u_char slave, int timeout)
191 int read_access, iflg_set = 0;
194 mtx_assert(&sc->mutex, MA_OWNED);
196 if (mask == TWSI_STATUS_RPTD_START)
197 /* read IFLG to know if it should be cleared later; from NBSD */
198 iflg_set = TWSI_READ(sc, sc->reg_control) & TWSI_CONTROL_IFLG;
200 debugf(dev, "send start\n");
201 twsi_control_set(sc, TWSI_CONTROL_START);
203 if (mask == TWSI_STATUS_RPTD_START && iflg_set) {
204 debugf(dev, "IFLG set, clearing (mask=%x)\n", mask);
209 * Without this delay we timeout checking IFLG if the timeout is 0.
210 * NBSD driver always waits here too.
214 if (twsi_poll_ctrl(sc, timeout, TWSI_CONTROL_IFLG)) {
215 debugf(dev, "timeout sending %sSTART condition\n",
216 mask == TWSI_STATUS_START ? "" : "repeated ");
217 return (IIC_ETIMEOUT);
220 status = TWSI_READ(sc, sc->reg_status);
221 debugf(dev, "status=%x\n", status);
223 if (status != mask) {
224 debugf(dev, "wrong status (%02x) after sending %sSTART condition\n",
225 status, mask == TWSI_STATUS_START ? "" : "repeated ");
226 return (IIC_ESTATUS);
229 TWSI_WRITE(sc, sc->reg_data, slave);
233 if (twsi_poll_ctrl(sc, timeout, TWSI_CONTROL_IFLG)) {
234 debugf(dev, "timeout sending slave address (timeout=%d)\n", timeout);
235 return (IIC_ETIMEOUT);
238 read_access = (slave & 0x1) ? 1 : 0;
239 status = TWSI_READ(sc, sc->reg_status);
240 if (status != (read_access ?
241 TWSI_STATUS_ADDR_R_ACK : TWSI_STATUS_ADDR_W_ACK)) {
242 debugf(dev, "no ACK (status: %02x) after sending slave address\n",
251 #define TWSI_BAUD_RATE_RAW(C,M,N) ((C)/((10*(M+1))<<(N)))
252 #define ABSSUB(a,b) (((a) > (b)) ? (a) - (b) : (b) - (a))
255 twsi_calc_baud_rate(struct twsi_softc *sc, const u_int target,
259 uint32_t cur, diff, diff0;
262 /* Calculate baud rate. */
265 if (clk_get_freq(sc->clk_core, &clk) < 0)
268 debugf(sc->dev, "Bus clock is at %ju\n", clk);
270 for (n = 0; n < 8; n++) {
271 for (m = 0; m < 16; m++) {
272 cur = TWSI_BAUD_RATE_RAW(clk,m,n);
273 diff = ABSSUB(target, cur);
281 *param = TWSI_BAUD_RATE_PARAM(m0, n0);
285 #endif /* EXT_RESOURCES */
288 * Only slave mode supported, disregard [old]addr
291 twsi_reset(device_t dev, u_char speed, u_char addr, u_char *oldaddr)
293 struct twsi_softc *sc;
299 sc = device_get_softc(dev);
302 busfreq = IICBUS_GET_FREQUENCY(sc->iicbus, speed);
304 if (twsi_calc_baud_rate(sc, busfreq, ¶m) == -1) {
309 param = sc->baud_rate[speed].param;
310 debugf(dev, "Using IIC_FAST mode with speed param=%x\n", param);
315 param = sc->baud_rate[IIC_FAST].param;
316 debugf(dev, "Using IIC_FASTEST/UNKNOWN mode with speed param=%x\n", param);
323 debugf(dev, "Using clock param=%x\n", param);
325 mtx_lock(&sc->mutex);
326 TWSI_WRITE(sc, sc->reg_soft_reset, 0x0);
327 TWSI_WRITE(sc, sc->reg_baud_rate, param);
328 TWSI_WRITE(sc, sc->reg_control, TWSI_CONTROL_TWSIEN);
330 mtx_unlock(&sc->mutex);
336 twsi_stop(device_t dev)
338 struct twsi_softc *sc;
340 sc = device_get_softc(dev);
342 debugf(dev, "%s\n", __func__);
343 mtx_lock(&sc->mutex);
344 twsi_control_clear(sc, TWSI_CONTROL_ACK);
345 twsi_control_set(sc, TWSI_CONTROL_STOP);
348 mtx_unlock(&sc->mutex);
354 * timeout is given in us
357 twsi_repeated_start(device_t dev, u_char slave, int timeout)
359 struct twsi_softc *sc;
362 sc = device_get_softc(dev);
364 debugf(dev, "%s: slave=%x\n", __func__, slave);
365 mtx_lock(&sc->mutex);
366 rv = twsi_locked_start(dev, sc, TWSI_STATUS_RPTD_START, slave,
368 mtx_unlock(&sc->mutex);
378 * timeout is given in us
381 twsi_start(device_t dev, u_char slave, int timeout)
383 struct twsi_softc *sc;
386 sc = device_get_softc(dev);
388 debugf(dev, "%s: slave=%x\n", __func__, slave);
389 mtx_lock(&sc->mutex);
390 rv = twsi_locked_start(dev, sc, TWSI_STATUS_START, slave, timeout);
391 mtx_unlock(&sc->mutex);
401 twsi_read(device_t dev, char *buf, int len, int *read, int last, int delay)
403 struct twsi_softc *sc;
407 sc = device_get_softc(dev);
409 mtx_lock(&sc->mutex);
411 while (*read < len) {
413 * Check if we are reading last byte of the last buffer,
414 * do not send ACK then, per I2C specs
416 last_byte = ((*read == len - 1) && last) ? 1 : 0;
418 twsi_control_clear(sc, TWSI_CONTROL_ACK);
420 twsi_control_set(sc, TWSI_CONTROL_ACK);
425 if (twsi_poll_ctrl(sc, delay, TWSI_CONTROL_IFLG)) {
426 debugf(dev, "timeout reading data (delay=%d)\n", delay);
431 status = TWSI_READ(sc, sc->reg_status);
432 if (status != (last_byte ?
433 TWSI_STATUS_DATA_RD_NOACK : TWSI_STATUS_DATA_RD_ACK)) {
434 debugf(dev, "wrong status (%02x) while reading\n", status);
439 *buf++ = TWSI_READ(sc, sc->reg_data);
444 mtx_unlock(&sc->mutex);
449 twsi_write(device_t dev, const char *buf, int len, int *sent, int timeout)
451 struct twsi_softc *sc;
455 sc = device_get_softc(dev);
457 mtx_lock(&sc->mutex);
459 while (*sent < len) {
460 TWSI_WRITE(sc, sc->reg_data, *buf++);
464 if (twsi_poll_ctrl(sc, timeout, TWSI_CONTROL_IFLG)) {
465 debugf(dev, "timeout writing data (timeout=%d)\n", timeout);
470 status = TWSI_READ(sc, sc->reg_status);
471 if (status != TWSI_STATUS_DATA_WR_ACK) {
472 debugf(dev, "wrong status (%02x) while writing\n", status);
480 mtx_unlock(&sc->mutex);
485 twsi_transfer(device_t dev, struct iic_msg *msgs, uint32_t nmsgs)
487 struct twsi_softc *sc;
489 sc = device_get_softc(dev);
492 return (iicbus_transfer_gen(dev, msgs, nmsgs));
496 sc->control_val = TWSI_CONTROL_TWSIEN |
497 TWSI_CONTROL_INTEN | TWSI_CONTROL_ACK;
498 TWSI_WRITE(sc, sc->reg_control, sc->control_val);
499 debugf(dev, "transmitting %d messages\n", nmsgs);
500 debugf(sc->dev, "status=%x\n", TWSI_READ(sc, sc->reg_status));
507 for (int i = 0; i < nmsgs; i++)
508 debugf(sc->dev, "msg %d is %d bytes long\n", i, msgs[i].len);
510 /* Send start and re-enable interrupts */
511 sc->control_val = TWSI_CONTROL_TWSIEN |
512 TWSI_CONTROL_INTEN | TWSI_CONTROL_ACK;
513 if (sc->msgs[0].len == 1)
514 sc->control_val &= ~TWSI_CONTROL_ACK;
515 TWSI_WRITE(sc, sc->reg_control, sc->control_val | TWSI_CONTROL_START);
516 while (sc->error == 0 && sc->transfer != 0) {
517 tsleep_sbt(sc, 0, "twsi", SBT_1MS * 30, SBT_1MS, 0);
519 debugf(sc->dev, "pause finish\n");
522 debugf(sc->dev, "Error, aborting (%d)\n", sc->error);
523 TWSI_WRITE(sc, sc->reg_control, 0);
526 /* Disable module and interrupts */
527 debugf(sc->dev, "status=%x\n", TWSI_READ(sc, sc->reg_status));
528 TWSI_WRITE(sc, sc->reg_control, 0);
529 debugf(sc->dev, "status=%x\n", TWSI_READ(sc, sc->reg_status));
537 struct twsi_softc *sc;
539 int transfer_done = 0;
543 debugf(sc->dev, "Got interrupt Current msg=%x\n", sc->msg_idx);
545 status = TWSI_READ(sc, sc->reg_status);
546 debugf(sc->dev, "reg control=%x\n", TWSI_READ(sc, sc->reg_control));
549 case TWSI_STATUS_START:
550 case TWSI_STATUS_RPTD_START:
551 /* Transmit the address */
552 debugf(sc->dev, "Send the address (%x)", sc->msgs[sc->msg_idx].slave);
554 if (sc->msgs[sc->msg_idx].flags & IIC_M_RD)
555 TWSI_WRITE(sc, sc->reg_data,
556 sc->msgs[sc->msg_idx].slave | LSB);
558 TWSI_WRITE(sc, sc->reg_data,
559 sc->msgs[sc->msg_idx].slave & ~LSB);
560 TWSI_WRITE(sc, sc->reg_control, sc->control_val);
563 case TWSI_STATUS_ADDR_W_ACK:
564 debugf(sc->dev, "Ack received after transmitting the address (write)\n");
565 /* Directly send the first byte */
567 debugf(sc->dev, "Sending byte 0 (of %d) = %x\n",
568 sc->msgs[sc->msg_idx].len,
569 sc->msgs[sc->msg_idx].buf[0]);
570 TWSI_WRITE(sc, sc->reg_data, sc->msgs[sc->msg_idx].buf[0]);
572 TWSI_WRITE(sc, sc->reg_control, sc->control_val);
575 case TWSI_STATUS_ADDR_R_ACK:
576 debugf(sc->dev, "Ack received after transmitting the address (read)\n");
579 TWSI_WRITE(sc, sc->reg_control, sc->control_val);
582 case TWSI_STATUS_ADDR_W_NACK:
583 case TWSI_STATUS_ADDR_R_NACK:
584 debugf(sc->dev, "No ack received after transmitting the address\n");
586 sc->error = IIC_ENOACK;
591 case TWSI_STATUS_DATA_WR_ACK:
592 debugf(sc->dev, "Ack received after transmitting data\n");
593 if (sc->sent_bytes == sc->msgs[sc->msg_idx].len) {
594 debugf(sc->dev, "Done sending all the bytes for msg %d\n", sc->msg_idx);
595 /* Send stop, no interrupts on stop */
596 if (!(sc->msgs[sc->msg_idx].flags & IIC_M_NOSTOP)) {
597 debugf(sc->dev, "Done TX data, send stop\n");
598 TWSI_WRITE(sc, sc->reg_control,
599 sc->control_val | TWSI_CONTROL_STOP);
601 debugf(sc->dev, "Done TX data with NO_STOP\n");
602 TWSI_WRITE(sc, sc->reg_control, sc->control_val | TWSI_CONTROL_START);
605 if (sc->msg_idx == sc->nmsgs) {
606 debugf(sc->dev, "transfer_done=1\n");
610 debugf(sc->dev, "Send repeated start\n");
611 TWSI_WRITE(sc, sc->reg_control, sc->control_val | TWSI_CONTROL_START);
614 debugf(sc->dev, "Sending byte %d (of %d) = %x\n",
616 sc->msgs[sc->msg_idx].len,
617 sc->msgs[sc->msg_idx].buf[sc->sent_bytes]);
618 TWSI_WRITE(sc, sc->reg_data,
619 sc->msgs[sc->msg_idx].buf[sc->sent_bytes]);
620 TWSI_WRITE(sc, sc->reg_control,
626 case TWSI_STATUS_DATA_RD_ACK:
627 debugf(sc->dev, "Ack received after receiving data\n");
628 sc->msgs[sc->msg_idx].buf[sc->recv_bytes++] = TWSI_READ(sc, sc->reg_data);
629 debugf(sc->dev, "msg_len=%d recv_bytes=%d\n", sc->msgs[sc->msg_idx].len, sc->recv_bytes);
631 /* If we only have one byte left, disable ACK */
632 if (sc->msgs[sc->msg_idx].len - sc->recv_bytes == 1)
633 sc->control_val &= ~TWSI_CONTROL_ACK;
634 if (sc->msgs[sc->msg_idx].len == sc->recv_bytes) {
635 debugf(sc->dev, "Done with msg %d\n", sc->msg_idx);
637 if (sc->msg_idx == sc->nmsgs - 1) {
638 debugf(sc->dev, "No more msgs\n");
643 TWSI_WRITE(sc, sc->reg_control, sc->control_val);
646 case TWSI_STATUS_DATA_RD_NOACK:
647 if (sc->msgs[sc->msg_idx].len - sc->recv_bytes == 1) {
648 sc->msgs[sc->msg_idx].buf[sc->recv_bytes++] = TWSI_READ(sc, sc->reg_data);
649 debugf(sc->dev, "Done RX data, send stop (2)\n");
650 if (!(sc->msgs[sc->msg_idx].flags & IIC_M_NOSTOP))
651 TWSI_WRITE(sc, sc->reg_control,
652 sc->control_val | TWSI_CONTROL_STOP);
654 debugf(sc->dev, "No ack when receiving data, sending stop anyway\n");
655 if (!(sc->msgs[sc->msg_idx].flags & IIC_M_NOSTOP))
656 TWSI_WRITE(sc, sc->reg_control,
657 sc->control_val | TWSI_CONTROL_STOP);
665 debugf(sc->dev, "status=%x hot handled\n", status);
667 sc->error = IIC_EBUSERR;
672 debugf(sc->dev, "Refresh reg_control\n");
675 * Newer Allwinner chips clear IFLG after writing 1 to it.
677 TWSI_WRITE(sc, sc->reg_control, sc->control_val |
678 (sc->iflag_w1c ? TWSI_CONTROL_IFLG : 0));
680 debugf(sc->dev, "Done with interrupts\n\n");
681 if (transfer_done == 1) {
688 twsi_intr_start(void *pdev)
690 struct twsi_softc *sc;
692 sc = device_get_softc(pdev);
694 if ((bus_setup_intr(pdev, sc->res[1], INTR_TYPE_MISC | INTR_MPSAFE,
695 NULL, twsi_intr, sc, &sc->intrhand)))
696 device_printf(pdev, "unable to register interrupt handler\n");
698 sc->have_intr = true;
702 twsi_attach(device_t dev)
704 struct twsi_softc *sc;
706 sc = device_get_softc(dev);
709 mtx_init(&sc->mutex, device_get_nameunit(dev), "twsi", MTX_DEF);
711 if (bus_alloc_resources(dev, res_spec, sc->res)) {
712 device_printf(dev, "could not allocate resources\n");
717 /* Attach the iicbus. */
718 if ((sc->iicbus = device_add_child(dev, "iicbus", -1)) == NULL) {
719 device_printf(dev, "could not allocate iicbus instance\n");
723 bus_generic_attach(dev);
725 config_intrhook_oneshot(twsi_intr_start, dev);
731 twsi_detach(device_t dev)
733 struct twsi_softc *sc;
736 sc = device_get_softc(dev);
738 if ((rv = bus_generic_detach(dev)) != 0)
741 if (sc->iicbus != NULL)
742 if ((rv = device_delete_child(dev, sc->iicbus)) != 0)
745 if (sc->intrhand != NULL)
746 bus_teardown_intr(sc->dev, sc->res[1], sc->intrhand);
748 bus_release_resources(dev, res_spec, sc->res);
750 mtx_destroy(&sc->mutex);
754 static device_method_t twsi_methods[] = {
755 /* device interface */
756 DEVMETHOD(device_detach, twsi_detach),
759 DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
760 DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr),
761 DEVMETHOD(bus_alloc_resource, bus_generic_alloc_resource),
762 DEVMETHOD(bus_release_resource, bus_generic_release_resource),
763 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
764 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
765 DEVMETHOD(bus_adjust_resource, bus_generic_adjust_resource),
766 DEVMETHOD(bus_set_resource, bus_generic_rl_set_resource),
767 DEVMETHOD(bus_get_resource, bus_generic_rl_get_resource),
769 /* iicbus interface */
770 DEVMETHOD(iicbus_callback, iicbus_null_callback),
771 DEVMETHOD(iicbus_repeated_start, twsi_repeated_start),
772 DEVMETHOD(iicbus_start, twsi_start),
773 DEVMETHOD(iicbus_stop, twsi_stop),
774 DEVMETHOD(iicbus_write, twsi_write),
775 DEVMETHOD(iicbus_read, twsi_read),
776 DEVMETHOD(iicbus_reset, twsi_reset),
777 DEVMETHOD(iicbus_transfer, twsi_transfer),
781 DEFINE_CLASS_0(twsi, twsi_driver, twsi_methods,
782 sizeof(struct twsi_softc));