2 * Copyright (C) 2008 MARVELL INTERNATIONAL LTD.
5 * Developed by Semihalf.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. Neither the name of MARVELL nor the names of contributors
16 * may be used to endorse or promote products derived from this software
17 * without specific prior written permission.
19 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
23 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33 * Driver for the TWSI (aka I2C, aka IIC) bus controller found on Marvell
34 * and Allwinner SoCs. Supports master operation only.
36 * Calls to DELAY() are needed per Application Note AN-179 "TWSI Software
37 * Guidelines for Discovery(TM), Horizon (TM) and Feroceon(TM) Devices".
40 #include <sys/cdefs.h>
41 __FBSDID("$FreeBSD$");
43 #include <sys/param.h>
44 #include <sys/systm.h>
46 #include <sys/kernel.h>
47 #include <sys/module.h>
48 #include <sys/resource.h>
50 #include <machine/_inttypes.h>
51 #include <machine/bus.h>
52 #include <machine/resource.h>
57 #include <sys/mutex.h>
59 #include <dev/iicbus/iiconf.h>
60 #include <dev/iicbus/iicbus.h>
61 #include <dev/ofw/ofw_bus.h>
62 #include <dev/ofw/ofw_bus_subr.h>
64 #include <dev/iicbus/twsi/twsi.h>
66 #include "iicbus_if.h"
68 #define TWSI_CONTROL_ACK (1 << 2)
69 #define TWSI_CONTROL_IFLG (1 << 3)
70 #define TWSI_CONTROL_STOP (1 << 4)
71 #define TWSI_CONTROL_START (1 << 5)
72 #define TWSI_CONTROL_TWSIEN (1 << 6)
73 #define TWSI_CONTROL_INTEN (1 << 7)
75 #define TWSI_STATUS_START 0x08
76 #define TWSI_STATUS_RPTD_START 0x10
77 #define TWSI_STATUS_ADDR_W_ACK 0x18
78 #define TWSI_STATUS_ADDR_W_NACK 0x20
79 #define TWSI_STATUS_DATA_WR_ACK 0x28
80 #define TWSI_STATUS_DATA_WR_NACK 0x30
81 #define TWSI_STATUS_ADDR_R_ACK 0x40
82 #define TWSI_STATUS_ADDR_R_NACK 0x48
83 #define TWSI_STATUS_DATA_RD_ACK 0x50
84 #define TWSI_STATUS_DATA_RD_NOACK 0x58
90 #define debugf(dev, fmt, args...) device_printf(dev, "%s: " fmt, __func__, ##args)
92 #define debugf(dev, fmt, args...)
95 static struct resource_spec res_spec[] = {
96 { SYS_RES_MEMORY, 0, RF_ACTIVE },
97 { SYS_RES_IRQ, 0, RF_ACTIVE | RF_SHAREABLE},
101 static __inline uint32_t
102 TWSI_READ(struct twsi_softc *sc, bus_size_t off)
106 val = bus_read_4(sc->res[0], off);
107 debugf(sc->dev, "read %x from %lx\n", val, off);
112 TWSI_WRITE(struct twsi_softc *sc, bus_size_t off, uint32_t val)
115 debugf(sc->dev, "Writing %x to %lx\n", val, off);
116 bus_write_4(sc->res[0], off, val);
120 twsi_control_clear(struct twsi_softc *sc, uint32_t mask)
124 val = TWSI_READ(sc, sc->reg_control);
125 debugf(sc->dev, "read val=%x\n", val);
126 val &= ~(TWSI_CONTROL_STOP | TWSI_CONTROL_START);
128 debugf(sc->dev, "write val=%x\n", val);
129 TWSI_WRITE(sc, sc->reg_control, val);
133 twsi_control_set(struct twsi_softc *sc, uint32_t mask)
137 val = TWSI_READ(sc, sc->reg_control);
138 debugf(sc->dev, "read val=%x\n", val);
139 val &= ~(TWSI_CONTROL_STOP | TWSI_CONTROL_START);
141 debugf(sc->dev, "write val=%x\n", val);
142 TWSI_WRITE(sc, sc->reg_control, val);
146 twsi_clear_iflg(struct twsi_softc *sc)
150 twsi_control_clear(sc, TWSI_CONTROL_IFLG);
156 * timeout given in us
158 * 0 on successful mask change
159 * non-zero on timeout
162 twsi_poll_ctrl(struct twsi_softc *sc, int timeout, uint32_t mask)
166 debugf(sc->dev, "Waiting for ctrl reg to match mask %x\n", mask);
167 while (!(TWSI_READ(sc, sc->reg_control) & mask)) {
172 debugf(sc->dev, "done\n");
178 * 'timeout' is given in us. Note also that timeout handling is not exact --
179 * twsi_locked_start() total wait can be more than 2 x timeout
180 * (twsi_poll_ctrl() is called twice). 'mask' can be either TWSI_STATUS_START
181 * or TWSI_STATUS_RPTD_START
184 twsi_locked_start(device_t dev, struct twsi_softc *sc, int32_t mask,
185 u_char slave, int timeout)
187 int read_access, iflg_set = 0;
190 mtx_assert(&sc->mutex, MA_OWNED);
192 if (mask == TWSI_STATUS_RPTD_START)
193 /* read IFLG to know if it should be cleared later; from NBSD */
194 iflg_set = TWSI_READ(sc, sc->reg_control) & TWSI_CONTROL_IFLG;
196 debugf(dev, "send start\n");
197 twsi_control_set(sc, TWSI_CONTROL_START);
199 if (mask == TWSI_STATUS_RPTD_START && iflg_set) {
200 debugf(dev, "IFLG set, clearing (mask=%x)\n", mask);
205 * Without this delay we timeout checking IFLG if the timeout is 0.
206 * NBSD driver always waits here too.
210 if (twsi_poll_ctrl(sc, timeout, TWSI_CONTROL_IFLG)) {
211 debugf(dev, "timeout sending %sSTART condition\n",
212 mask == TWSI_STATUS_START ? "" : "repeated ");
213 return (IIC_ETIMEOUT);
216 status = TWSI_READ(sc, sc->reg_status);
217 debugf(dev, "status=%x\n", status);
219 if (status != mask) {
220 debugf(dev, "wrong status (%02x) after sending %sSTART condition\n",
221 status, mask == TWSI_STATUS_START ? "" : "repeated ");
222 return (IIC_ESTATUS);
225 TWSI_WRITE(sc, sc->reg_data, slave);
229 if (twsi_poll_ctrl(sc, timeout, TWSI_CONTROL_IFLG)) {
230 debugf(dev, "timeout sending slave address (timeout=%d)\n", timeout);
231 return (IIC_ETIMEOUT);
234 read_access = (slave & 0x1) ? 1 : 0;
235 status = TWSI_READ(sc, sc->reg_status);
236 if (status != (read_access ?
237 TWSI_STATUS_ADDR_R_ACK : TWSI_STATUS_ADDR_W_ACK)) {
238 debugf(dev, "no ACK (status: %02x) after sending slave address\n",
247 #define TWSI_BAUD_RATE_RAW(C,M,N) ((C)/((10*(M+1))<<(N)))
248 #define ABSSUB(a,b) (((a) > (b)) ? (a) - (b) : (b) - (a))
251 twsi_calc_baud_rate(struct twsi_softc *sc, const u_int target,
255 uint32_t cur, diff, diff0;
258 /* Calculate baud rate. */
261 if (clk_get_freq(sc->clk_core, &clk) < 0)
264 debugf(sc->dev, "Bus clock is at %ju\n", clk);
266 for (n = 0; n < 8; n++) {
267 for (m = 0; m < 16; m++) {
268 cur = TWSI_BAUD_RATE_RAW(clk,m,n);
269 diff = ABSSUB(target, cur);
277 *param = TWSI_BAUD_RATE_PARAM(m0, n0);
281 #endif /* EXT_RESOURCES */
284 * Only slave mode supported, disregard [old]addr
287 twsi_reset(device_t dev, u_char speed, u_char addr, u_char *oldaddr)
289 struct twsi_softc *sc;
295 sc = device_get_softc(dev);
298 busfreq = IICBUS_GET_FREQUENCY(sc->iicbus, speed);
300 if (twsi_calc_baud_rate(sc, busfreq, ¶m) == -1) {
305 param = sc->baud_rate[speed].param;
306 debugf(dev, "Using IIC_FAST mode with speed param=%x\n", param);
311 param = sc->baud_rate[IIC_FAST].param;
312 debugf(dev, "Using IIC_FASTEST/UNKNOWN mode with speed param=%x\n", param);
319 debugf(dev, "Using clock param=%x\n", param);
321 mtx_lock(&sc->mutex);
322 TWSI_WRITE(sc, sc->reg_soft_reset, 0x0);
323 TWSI_WRITE(sc, sc->reg_baud_rate, param);
324 TWSI_WRITE(sc, sc->reg_control, TWSI_CONTROL_TWSIEN);
326 mtx_unlock(&sc->mutex);
332 twsi_stop(device_t dev)
334 struct twsi_softc *sc;
336 sc = device_get_softc(dev);
338 debugf(dev, "%s\n", __func__);
339 mtx_lock(&sc->mutex);
340 twsi_control_clear(sc, TWSI_CONTROL_ACK);
341 twsi_control_set(sc, TWSI_CONTROL_STOP);
344 mtx_unlock(&sc->mutex);
350 * timeout is given in us
353 twsi_repeated_start(device_t dev, u_char slave, int timeout)
355 struct twsi_softc *sc;
358 sc = device_get_softc(dev);
360 debugf(dev, "%s: slave=%x\n", __func__, slave);
361 mtx_lock(&sc->mutex);
362 rv = twsi_locked_start(dev, sc, TWSI_STATUS_RPTD_START, slave,
364 mtx_unlock(&sc->mutex);
374 * timeout is given in us
377 twsi_start(device_t dev, u_char slave, int timeout)
379 struct twsi_softc *sc;
382 sc = device_get_softc(dev);
384 debugf(dev, "%s: slave=%x\n", __func__, slave);
385 mtx_lock(&sc->mutex);
386 rv = twsi_locked_start(dev, sc, TWSI_STATUS_START, slave, timeout);
387 mtx_unlock(&sc->mutex);
397 twsi_read(device_t dev, char *buf, int len, int *read, int last, int delay)
399 struct twsi_softc *sc;
403 sc = device_get_softc(dev);
405 mtx_lock(&sc->mutex);
407 while (*read < len) {
409 * Check if we are reading last byte of the last buffer,
410 * do not send ACK then, per I2C specs
412 last_byte = ((*read == len - 1) && last) ? 1 : 0;
414 twsi_control_clear(sc, TWSI_CONTROL_ACK);
416 twsi_control_set(sc, TWSI_CONTROL_ACK);
421 if (twsi_poll_ctrl(sc, delay, TWSI_CONTROL_IFLG)) {
422 debugf(dev, "timeout reading data (delay=%d)\n", delay);
427 status = TWSI_READ(sc, sc->reg_status);
428 if (status != (last_byte ?
429 TWSI_STATUS_DATA_RD_NOACK : TWSI_STATUS_DATA_RD_ACK)) {
430 debugf(dev, "wrong status (%02x) while reading\n", status);
435 *buf++ = TWSI_READ(sc, sc->reg_data);
440 mtx_unlock(&sc->mutex);
445 twsi_write(device_t dev, const char *buf, int len, int *sent, int timeout)
447 struct twsi_softc *sc;
451 sc = device_get_softc(dev);
453 mtx_lock(&sc->mutex);
455 while (*sent < len) {
456 TWSI_WRITE(sc, sc->reg_data, *buf++);
460 if (twsi_poll_ctrl(sc, timeout, TWSI_CONTROL_IFLG)) {
461 debugf(dev, "timeout writing data (timeout=%d)\n", timeout);
466 status = TWSI_READ(sc, sc->reg_status);
467 if (status != TWSI_STATUS_DATA_WR_ACK) {
468 debugf(dev, "wrong status (%02x) while writing\n", status);
476 mtx_unlock(&sc->mutex);
481 twsi_transfer(device_t dev, struct iic_msg *msgs, uint32_t nmsgs)
483 struct twsi_softc *sc;
486 sc = device_get_softc(dev);
488 if (sc->have_intr == false)
489 return (iicbus_transfer_gen(dev, msgs, nmsgs));
493 sc->control_val = TWSI_CONTROL_TWSIEN |
494 TWSI_CONTROL_INTEN | TWSI_CONTROL_ACK;
495 TWSI_WRITE(sc, sc->reg_control, sc->control_val);
496 debugf(dev, "transmitting %d messages\n", nmsgs);
497 debugf(sc->dev, "status=%x\n", TWSI_READ(sc, sc->reg_status));
498 for (i = 0; i < nmsgs && sc->error == 0; i++) {
501 debugf(dev, "msg[%d] flags: %x\n", i, msgs[i].flags);
502 debugf(dev, "msg[%d] len: %d\n", i, msgs[i].len);
504 /* Send start and re-enable interrupts */
505 sc->control_val = TWSI_CONTROL_TWSIEN |
506 TWSI_CONTROL_INTEN | TWSI_CONTROL_ACK;
507 if (sc->msg->len == 1)
508 sc->control_val &= ~TWSI_CONTROL_ACK;
509 TWSI_WRITE(sc, sc->reg_control, sc->control_val | TWSI_CONTROL_START);
510 while (sc->error == 0 && sc->transfer != 0) {
511 pause_sbt("twsi", SBT_1MS * 30, SBT_1MS, 0);
514 debugf(dev, "Done with msg[%d]\n", i);
516 debugf(sc->dev, "Error, aborting (%d)\n", sc->error);
517 TWSI_WRITE(sc, sc->reg_control, 0);
522 /* Disable module and interrupts */
523 debugf(sc->dev, "status=%x\n", TWSI_READ(sc, sc->reg_status));
524 TWSI_WRITE(sc, sc->reg_control, 0);
525 debugf(sc->dev, "status=%x\n", TWSI_READ(sc, sc->reg_status));
534 struct twsi_softc *sc;
536 int transfer_done = 0;
540 debugf(sc->dev, "Got interrupt\n");
542 while (TWSI_READ(sc, sc->reg_control) & TWSI_CONTROL_IFLG) {
543 status = TWSI_READ(sc, sc->reg_status);
544 debugf(sc->dev, "status=%x\n", status);
547 case TWSI_STATUS_START:
548 case TWSI_STATUS_RPTD_START:
549 /* Transmit the address */
550 debugf(sc->dev, "Send the address\n");
552 if (sc->msg->flags & IIC_M_RD)
553 TWSI_WRITE(sc, sc->reg_data,
554 sc->msg->slave | LSB);
556 TWSI_WRITE(sc, sc->reg_data,
557 sc->msg->slave & ~LSB);
559 TWSI_WRITE(sc, sc->reg_control, sc->control_val);
562 case TWSI_STATUS_ADDR_W_ACK:
563 debugf(sc->dev, "Ack received after transmitting the address\n");
564 /* Directly send the first byte */
566 debugf(sc->dev, "Sending byte 0 = %x\n", sc->msg->buf[0]);
567 TWSI_WRITE(sc, sc->reg_data, sc->msg->buf[0]);
569 TWSI_WRITE(sc, sc->reg_control, sc->control_val);
572 case TWSI_STATUS_ADDR_R_ACK:
573 debugf(sc->dev, "Ack received after transmitting the address\n");
576 TWSI_WRITE(sc, sc->reg_control, sc->control_val);
579 case TWSI_STATUS_ADDR_W_NACK:
580 case TWSI_STATUS_ADDR_R_NACK:
581 debugf(sc->dev, "No ack received after transmitting the address\n");
583 sc->error = ETIMEDOUT;
588 case TWSI_STATUS_DATA_WR_ACK:
589 debugf(sc->dev, "Ack received after transmitting data\n");
590 if (sc->sent_bytes++ == (sc->msg->len - 1)) {
591 debugf(sc->dev, "Done sending all the bytes\n");
592 /* Send stop, no interrupts on stop */
593 if (!(sc->msg->flags & IIC_M_NOSTOP)) {
594 debugf(sc->dev, "Done TX data, send stop\n");
595 TWSI_WRITE(sc, sc->reg_control,
596 sc->control_val | TWSI_CONTROL_STOP);
598 sc->control_val &= ~TWSI_CONTROL_INTEN;
599 TWSI_WRITE(sc, sc->reg_control,
604 debugf(sc->dev, "Sending byte %d = %x\n",
606 sc->msg->buf[sc->sent_bytes]);
607 TWSI_WRITE(sc, sc->reg_data,
608 sc->msg->buf[sc->sent_bytes]);
609 TWSI_WRITE(sc, sc->reg_control,
614 case TWSI_STATUS_DATA_RD_ACK:
615 debugf(sc->dev, "Ack received after receiving data\n");
616 debugf(sc->dev, "msg_len=%d recv_bytes=%d\n", sc->msg->len, sc->recv_bytes);
617 sc->msg->buf[sc->recv_bytes++] = TWSI_READ(sc, sc->reg_data);
619 /* If we only have one byte left, disable ACK */
620 if (sc->msg->len - sc->recv_bytes == 1)
621 sc->control_val &= ~TWSI_CONTROL_ACK;
622 TWSI_WRITE(sc, sc->reg_control, sc->control_val);
625 case TWSI_STATUS_DATA_RD_NOACK:
626 if (sc->msg->len - sc->recv_bytes == 1) {
627 sc->msg->buf[sc->recv_bytes++] = TWSI_READ(sc, sc->reg_data);
628 debugf(sc->dev, "Done RX data, send stop (2)\n");
629 if (!(sc->msg->flags & IIC_M_NOSTOP))
630 TWSI_WRITE(sc, sc->reg_control,
631 sc->control_val | TWSI_CONTROL_STOP);
633 debugf(sc->dev, "No ack when receiving data\n");
642 debugf(sc->dev, "status=%x hot handled\n", status);
651 TWSI_WRITE(sc, sc->reg_control,
652 sc->control_val | TWSI_CONTROL_IFLG);
655 debugf(sc->dev, "Done with interrupts\n");
656 if (transfer_done == 1) {
663 twsi_intr_start(void *pdev)
665 struct twsi_softc *sc;
667 sc = device_get_softc(pdev);
669 if ((bus_setup_intr(pdev, sc->res[1], INTR_TYPE_MISC | INTR_MPSAFE,
670 NULL, twsi_intr, sc, &sc->intrhand)))
671 device_printf(pdev, "unable to register interrupt handler\n");
673 sc->have_intr = true;
677 twsi_attach(device_t dev)
679 struct twsi_softc *sc;
681 sc = device_get_softc(dev);
684 mtx_init(&sc->mutex, device_get_nameunit(dev), "twsi", MTX_DEF);
686 if (bus_alloc_resources(dev, res_spec, sc->res)) {
687 device_printf(dev, "could not allocate resources\n");
692 /* Attach the iicbus. */
693 if ((sc->iicbus = device_add_child(dev, "iicbus", -1)) == NULL) {
694 device_printf(dev, "could not allocate iicbus instance\n");
698 bus_generic_attach(dev);
700 config_intrhook_oneshot(twsi_intr_start, dev);
706 twsi_detach(device_t dev)
708 struct twsi_softc *sc;
711 sc = device_get_softc(dev);
713 if ((rv = bus_generic_detach(dev)) != 0)
716 if (sc->iicbus != NULL)
717 if ((rv = device_delete_child(dev, sc->iicbus)) != 0)
720 if (sc->intrhand != NULL)
721 bus_teardown_intr(sc->dev, sc->res[1], sc->intrhand);
723 bus_release_resources(dev, res_spec, sc->res);
725 mtx_destroy(&sc->mutex);
729 static device_method_t twsi_methods[] = {
730 /* device interface */
731 DEVMETHOD(device_detach, twsi_detach),
734 DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
735 DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr),
736 DEVMETHOD(bus_alloc_resource, bus_generic_alloc_resource),
737 DEVMETHOD(bus_release_resource, bus_generic_release_resource),
738 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
739 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
740 DEVMETHOD(bus_adjust_resource, bus_generic_adjust_resource),
741 DEVMETHOD(bus_set_resource, bus_generic_rl_set_resource),
742 DEVMETHOD(bus_get_resource, bus_generic_rl_get_resource),
744 /* iicbus interface */
745 DEVMETHOD(iicbus_callback, iicbus_null_callback),
746 DEVMETHOD(iicbus_repeated_start, twsi_repeated_start),
747 DEVMETHOD(iicbus_start, twsi_start),
748 DEVMETHOD(iicbus_stop, twsi_stop),
749 DEVMETHOD(iicbus_write, twsi_write),
750 DEVMETHOD(iicbus_read, twsi_read),
751 DEVMETHOD(iicbus_reset, twsi_reset),
752 DEVMETHOD(iicbus_transfer, twsi_transfer),
756 DEFINE_CLASS_0(twsi, twsi_driver, twsi_methods,
757 sizeof(struct twsi_softc));