2 * Copyright (C) 2008 MARVELL INTERNATIONAL LTD.
5 * Developed by Semihalf.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. Neither the name of MARVELL nor the names of contributors
16 * may be used to endorse or promote products derived from this software
17 * without specific prior written permission.
19 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
23 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33 * Driver for the TWSI (aka I2C, aka IIC) bus controller found on Marvell
34 * and Allwinner SoCs. Supports master operation only.
36 * Calls to DELAY() are needed per Application Note AN-179 "TWSI Software
37 * Guidelines for Discovery(TM), Horizon (TM) and Feroceon(TM) Devices".
40 #include <sys/cdefs.h>
41 __FBSDID("$FreeBSD$");
43 #include <sys/param.h>
44 #include <sys/systm.h>
46 #include <sys/kernel.h>
47 #include <sys/module.h>
48 #include <sys/resource.h>
50 #include <machine/_inttypes.h>
51 #include <machine/bus.h>
52 #include <machine/resource.h>
57 #include <sys/mutex.h>
59 #include <dev/iicbus/iiconf.h>
60 #include <dev/iicbus/iicbus.h>
61 #include <dev/ofw/ofw_bus.h>
62 #include <dev/ofw/ofw_bus_subr.h>
64 #include <dev/iicbus/twsi/twsi.h>
66 #include "iicbus_if.h"
68 #define TWSI_CONTROL_ACK (1 << 2)
69 #define TWSI_CONTROL_IFLG (1 << 3)
70 #define TWSI_CONTROL_STOP (1 << 4)
71 #define TWSI_CONTROL_START (1 << 5)
72 #define TWSI_CONTROL_TWSIEN (1 << 6)
73 #define TWSI_CONTROL_INTEN (1 << 7)
75 #define TWSI_STATUS_START 0x08
76 #define TWSI_STATUS_RPTD_START 0x10
77 #define TWSI_STATUS_ADDR_W_ACK 0x18
78 #define TWSI_STATUS_ADDR_W_NACK 0x20
79 #define TWSI_STATUS_DATA_WR_ACK 0x28
80 #define TWSI_STATUS_DATA_WR_NACK 0x30
81 #define TWSI_STATUS_ADDR_R_ACK 0x40
82 #define TWSI_STATUS_ADDR_R_NACK 0x48
83 #define TWSI_STATUS_DATA_RD_ACK 0x50
84 #define TWSI_STATUS_DATA_RD_NOACK 0x58
90 #define debugf(dev, fmt, args...) device_printf(dev, "%s: " fmt, __func__, ##args)
92 #define debugf(dev, fmt, args...)
95 static struct resource_spec res_spec[] = {
96 { SYS_RES_MEMORY, 0, RF_ACTIVE },
97 { SYS_RES_IRQ, 0, RF_ACTIVE | RF_SHAREABLE},
101 static __inline uint32_t
102 TWSI_READ(struct twsi_softc *sc, bus_size_t off)
106 val = bus_read_4(sc->res[0], off);
107 debugf(sc->dev, "read %x from %lx\n", val, off);
112 TWSI_WRITE(struct twsi_softc *sc, bus_size_t off, uint32_t val)
115 debugf(sc->dev, "Writing %x to %lx\n", val, off);
116 bus_write_4(sc->res[0], off, val);
120 twsi_control_clear(struct twsi_softc *sc, uint32_t mask)
124 val = TWSI_READ(sc, sc->reg_control);
125 debugf(sc->dev, "read val=%x\n", val);
126 val &= ~(TWSI_CONTROL_STOP | TWSI_CONTROL_START);
128 debugf(sc->dev, "write val=%x\n", val);
129 TWSI_WRITE(sc, sc->reg_control, val);
133 twsi_control_set(struct twsi_softc *sc, uint32_t mask)
137 val = TWSI_READ(sc, sc->reg_control);
138 debugf(sc->dev, "read val=%x\n", val);
139 val &= ~(TWSI_CONTROL_STOP | TWSI_CONTROL_START);
141 debugf(sc->dev, "write val=%x\n", val);
142 TWSI_WRITE(sc, sc->reg_control, val);
146 twsi_clear_iflg(struct twsi_softc *sc)
150 twsi_control_clear(sc, TWSI_CONTROL_IFLG);
156 * timeout given in us
158 * 0 on successful mask change
159 * non-zero on timeout
162 twsi_poll_ctrl(struct twsi_softc *sc, int timeout, uint32_t mask)
166 debugf(sc->dev, "Waiting for ctrl reg to match mask %x\n", mask);
167 while (!(TWSI_READ(sc, sc->reg_control) & mask)) {
172 debugf(sc->dev, "done\n");
178 * 'timeout' is given in us. Note also that timeout handling is not exact --
179 * twsi_locked_start() total wait can be more than 2 x timeout
180 * (twsi_poll_ctrl() is called twice). 'mask' can be either TWSI_STATUS_START
181 * or TWSI_STATUS_RPTD_START
184 twsi_locked_start(device_t dev, struct twsi_softc *sc, int32_t mask,
185 u_char slave, int timeout)
187 int read_access, iflg_set = 0;
190 mtx_assert(&sc->mutex, MA_OWNED);
192 if (mask == TWSI_STATUS_RPTD_START)
193 /* read IFLG to know if it should be cleared later; from NBSD */
194 iflg_set = TWSI_READ(sc, sc->reg_control) & TWSI_CONTROL_IFLG;
196 debugf(dev, "send start\n");
197 twsi_control_set(sc, TWSI_CONTROL_START);
199 if (mask == TWSI_STATUS_RPTD_START && iflg_set) {
200 debugf(dev, "IFLG set, clearing (mask=%x)\n", mask);
205 * Without this delay we timeout checking IFLG if the timeout is 0.
206 * NBSD driver always waits here too.
210 if (twsi_poll_ctrl(sc, timeout, TWSI_CONTROL_IFLG)) {
211 debugf(dev, "timeout sending %sSTART condition\n",
212 mask == TWSI_STATUS_START ? "" : "repeated ");
213 return (IIC_ETIMEOUT);
216 status = TWSI_READ(sc, sc->reg_status);
217 debugf(dev, "status=%x\n", status);
219 if (status != mask) {
220 debugf(dev, "wrong status (%02x) after sending %sSTART condition\n",
221 status, mask == TWSI_STATUS_START ? "" : "repeated ");
222 return (IIC_ESTATUS);
225 TWSI_WRITE(sc, sc->reg_data, slave);
229 if (twsi_poll_ctrl(sc, timeout, TWSI_CONTROL_IFLG)) {
230 debugf(dev, "timeout sending slave address (timeout=%d)\n", timeout);
231 return (IIC_ETIMEOUT);
234 read_access = (slave & 0x1) ? 1 : 0;
235 status = TWSI_READ(sc, sc->reg_status);
236 if (status != (read_access ?
237 TWSI_STATUS_ADDR_R_ACK : TWSI_STATUS_ADDR_W_ACK)) {
238 debugf(dev, "no ACK (status: %02x) after sending slave address\n",
247 * Only slave mode supported, disregard [old]addr
250 twsi_reset(device_t dev, u_char speed, u_char addr, u_char *oldaddr)
252 struct twsi_softc *sc;
256 sc = device_get_softc(dev);
261 param = sc->baud_rate[speed].param;
262 debugf(dev, "Using IIC_FAST mode with speed param=%x\n", param);
267 param = sc->baud_rate[IIC_FAST].param;
268 debugf(dev, "Using IIC_FASTEST/UNKNOWN mode with speed param=%x\n", param);
272 mtx_lock(&sc->mutex);
273 TWSI_WRITE(sc, sc->reg_soft_reset, 0x0);
274 TWSI_WRITE(sc, sc->reg_baud_rate, param);
275 TWSI_WRITE(sc, sc->reg_control, TWSI_CONTROL_TWSIEN);
277 mtx_unlock(&sc->mutex);
283 twsi_stop(device_t dev)
285 struct twsi_softc *sc;
287 sc = device_get_softc(dev);
289 debugf(dev, "%s\n", __func__);
290 mtx_lock(&sc->mutex);
291 twsi_control_clear(sc, TWSI_CONTROL_ACK);
292 twsi_control_set(sc, TWSI_CONTROL_STOP);
295 mtx_unlock(&sc->mutex);
301 * timeout is given in us
304 twsi_repeated_start(device_t dev, u_char slave, int timeout)
306 struct twsi_softc *sc;
309 sc = device_get_softc(dev);
311 debugf(dev, "%s: slave=%x\n", __func__, slave);
312 mtx_lock(&sc->mutex);
313 rv = twsi_locked_start(dev, sc, TWSI_STATUS_RPTD_START, slave,
315 mtx_unlock(&sc->mutex);
325 * timeout is given in us
328 twsi_start(device_t dev, u_char slave, int timeout)
330 struct twsi_softc *sc;
333 sc = device_get_softc(dev);
335 debugf(dev, "%s: slave=%x\n", __func__, slave);
336 mtx_lock(&sc->mutex);
337 rv = twsi_locked_start(dev, sc, TWSI_STATUS_START, slave, timeout);
338 mtx_unlock(&sc->mutex);
348 twsi_read(device_t dev, char *buf, int len, int *read, int last, int delay)
350 struct twsi_softc *sc;
354 sc = device_get_softc(dev);
356 mtx_lock(&sc->mutex);
358 while (*read < len) {
360 * Check if we are reading last byte of the last buffer,
361 * do not send ACK then, per I2C specs
363 last_byte = ((*read == len - 1) && last) ? 1 : 0;
365 twsi_control_clear(sc, TWSI_CONTROL_ACK);
367 twsi_control_set(sc, TWSI_CONTROL_ACK);
372 if (twsi_poll_ctrl(sc, delay, TWSI_CONTROL_IFLG)) {
373 debugf(dev, "timeout reading data (delay=%d)\n", delay);
378 status = TWSI_READ(sc, sc->reg_status);
379 if (status != (last_byte ?
380 TWSI_STATUS_DATA_RD_NOACK : TWSI_STATUS_DATA_RD_ACK)) {
381 debugf(dev, "wrong status (%02x) while reading\n", status);
386 *buf++ = TWSI_READ(sc, sc->reg_data);
391 mtx_unlock(&sc->mutex);
396 twsi_write(device_t dev, const char *buf, int len, int *sent, int timeout)
398 struct twsi_softc *sc;
402 sc = device_get_softc(dev);
404 mtx_lock(&sc->mutex);
406 while (*sent < len) {
407 TWSI_WRITE(sc, sc->reg_data, *buf++);
411 if (twsi_poll_ctrl(sc, timeout, TWSI_CONTROL_IFLG)) {
412 debugf(dev, "timeout writing data (timeout=%d)\n", timeout);
417 status = TWSI_READ(sc, sc->reg_status);
418 if (status != TWSI_STATUS_DATA_WR_ACK) {
419 debugf(dev, "wrong status (%02x) while writing\n", status);
427 mtx_unlock(&sc->mutex);
432 twsi_transfer(device_t dev, struct iic_msg *msgs, uint32_t nmsgs)
434 struct twsi_softc *sc;
437 sc = device_get_softc(dev);
439 if (sc->have_intr == false)
440 return (iicbus_transfer_gen(dev, msgs, nmsgs));
444 sc->control_val = TWSI_CONTROL_TWSIEN |
445 TWSI_CONTROL_INTEN | TWSI_CONTROL_ACK;
446 TWSI_WRITE(sc, sc->reg_control, sc->control_val);
447 debugf(dev, "transmitting %d messages\n", nmsgs);
448 debugf(sc->dev, "status=%x\n", TWSI_READ(sc, sc->reg_status));
449 for (i = 0; i < nmsgs && sc->error == 0; i++) {
452 debugf(dev, "msg[%d] flags: %x\n", i, msgs[i].flags);
453 debugf(dev, "msg[%d] len: %d\n", i, msgs[i].len);
455 /* Send start and re-enable interrupts */
456 sc->control_val = TWSI_CONTROL_TWSIEN |
457 TWSI_CONTROL_INTEN | TWSI_CONTROL_ACK;
458 if (sc->msg->len == 1)
459 sc->control_val &= ~TWSI_CONTROL_ACK;
460 TWSI_WRITE(sc, sc->reg_control, sc->control_val | TWSI_CONTROL_START);
461 while (sc->error == 0 && sc->transfer != 0) {
462 pause_sbt("twsi", SBT_1MS * 30, SBT_1MS, 0);
465 debugf(dev, "Done with msg[%d]\n", i);
467 debugf(sc->dev, "Error, aborting (%d)\n", sc->error);
468 TWSI_WRITE(sc, sc->reg_control, 0);
473 /* Disable module and interrupts */
474 debugf(sc->dev, "status=%x\n", TWSI_READ(sc, sc->reg_status));
475 TWSI_WRITE(sc, sc->reg_control, 0);
476 debugf(sc->dev, "status=%x\n", TWSI_READ(sc, sc->reg_status));
485 struct twsi_softc *sc;
487 int transfer_done = 0;
491 debugf(sc->dev, "Got interrupt\n");
493 while (TWSI_READ(sc, sc->reg_control) & TWSI_CONTROL_IFLG) {
494 status = TWSI_READ(sc, sc->reg_status);
495 debugf(sc->dev, "status=%x\n", status);
498 case TWSI_STATUS_START:
499 case TWSI_STATUS_RPTD_START:
500 /* Transmit the address */
501 debugf(sc->dev, "Send the address\n");
503 if (sc->msg->flags & IIC_M_RD)
504 TWSI_WRITE(sc, sc->reg_data,
505 sc->msg->slave | LSB);
507 TWSI_WRITE(sc, sc->reg_data,
508 sc->msg->slave & ~LSB);
510 TWSI_WRITE(sc, sc->reg_control, sc->control_val);
513 case TWSI_STATUS_ADDR_W_ACK:
514 debugf(sc->dev, "Ack received after transmitting the address\n");
515 /* Directly send the first byte */
517 debugf(sc->dev, "Sending byte 0 = %x\n", sc->msg->buf[0]);
518 TWSI_WRITE(sc, sc->reg_data, sc->msg->buf[0]);
520 TWSI_WRITE(sc, sc->reg_control, sc->control_val);
523 case TWSI_STATUS_ADDR_R_ACK:
526 TWSI_WRITE(sc, sc->reg_control, sc->control_val);
529 case TWSI_STATUS_ADDR_W_NACK:
530 case TWSI_STATUS_ADDR_R_NACK:
531 debugf(sc->dev, "No ack received after transmitting the address\n");
533 sc->error = ETIMEDOUT;
538 case TWSI_STATUS_DATA_WR_ACK:
539 debugf(sc->dev, "Ack received after transmitting data\n");
540 if (sc->sent_bytes++ == (sc->msg->len - 1)) {
541 debugf(sc->dev, "Done sending all the bytes\n");
542 /* Send stop, no interrupts on stop */
543 if (!(sc->msg->flags & IIC_M_NOSTOP)) {
544 debugf(sc->dev, "Done TX data, send stop\n");
545 TWSI_WRITE(sc, sc->reg_control,
546 sc->control_val | TWSI_CONTROL_STOP);
548 sc->control_val &= ~TWSI_CONTROL_INTEN;
549 TWSI_WRITE(sc, sc->reg_control,
554 debugf(sc->dev, "Sending byte %d = %x\n",
556 sc->msg->buf[sc->sent_bytes]);
557 TWSI_WRITE(sc, sc->reg_data,
558 sc->msg->buf[sc->sent_bytes]);
559 TWSI_WRITE(sc, sc->reg_control,
564 case TWSI_STATUS_DATA_RD_ACK:
565 debugf(sc->dev, "Ack received after receiving data\n");
566 debugf(sc->dev, "msg_len=%d recv_bytes=%d\n", sc->msg->len, sc->recv_bytes);
567 sc->msg->buf[sc->recv_bytes++] = TWSI_READ(sc, sc->reg_data);
569 /* If we only have one byte left, disable ACK */
570 if (sc->msg->len - sc->recv_bytes == 1)
571 sc->control_val &= ~TWSI_CONTROL_ACK;
572 TWSI_WRITE(sc, sc->reg_control, sc->control_val);
575 case TWSI_STATUS_DATA_RD_NOACK:
576 if (sc->msg->len - sc->recv_bytes == 1) {
577 sc->msg->buf[sc->recv_bytes++] = TWSI_READ(sc, sc->reg_data);
578 debugf(sc->dev, "Done RX data, send stop (2)\n");
579 if (!(sc->msg->flags & IIC_M_NOSTOP))
580 TWSI_WRITE(sc, sc->reg_control,
581 sc->control_val | TWSI_CONTROL_STOP);
583 debugf(sc->dev, "No ack when receiving data\n");
592 debugf(sc->dev, "status=%x hot handled\n", status);
601 TWSI_WRITE(sc, sc->reg_control,
602 sc->control_val | TWSI_CONTROL_IFLG);
605 debugf(sc->dev, "Done with interrupts\n");
606 if (transfer_done == 1) {
613 twsi_intr_start(void *pdev)
615 struct twsi_softc *sc;
617 sc = device_get_softc(pdev);
619 if ((bus_setup_intr(pdev, sc->res[1], INTR_TYPE_MISC | INTR_MPSAFE,
620 NULL, twsi_intr, sc, &sc->intrhand)))
621 device_printf(pdev, "unable to register interrupt handler\n");
623 sc->have_intr = true;
627 twsi_attach(device_t dev)
629 struct twsi_softc *sc;
631 sc = device_get_softc(dev);
634 mtx_init(&sc->mutex, device_get_nameunit(dev), "twsi", MTX_DEF);
636 if (bus_alloc_resources(dev, res_spec, sc->res)) {
637 device_printf(dev, "could not allocate resources\n");
642 /* Attach the iicbus. */
643 if ((sc->iicbus = device_add_child(dev, "iicbus", -1)) == NULL) {
644 device_printf(dev, "could not allocate iicbus instance\n");
648 bus_generic_attach(dev);
650 config_intrhook_oneshot(twsi_intr_start, dev);
656 twsi_detach(device_t dev)
658 struct twsi_softc *sc;
661 sc = device_get_softc(dev);
663 if ((rv = bus_generic_detach(dev)) != 0)
666 if (sc->iicbus != NULL)
667 if ((rv = device_delete_child(dev, sc->iicbus)) != 0)
670 if (sc->intrhand != NULL)
671 bus_teardown_intr(sc->dev, sc->res[1], sc->intrhand);
673 bus_release_resources(dev, res_spec, sc->res);
675 mtx_destroy(&sc->mutex);
679 static device_method_t twsi_methods[] = {
680 /* device interface */
681 DEVMETHOD(device_detach, twsi_detach),
684 DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
685 DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr),
686 DEVMETHOD(bus_alloc_resource, bus_generic_alloc_resource),
687 DEVMETHOD(bus_release_resource, bus_generic_release_resource),
688 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
689 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
690 DEVMETHOD(bus_adjust_resource, bus_generic_adjust_resource),
691 DEVMETHOD(bus_set_resource, bus_generic_rl_set_resource),
692 DEVMETHOD(bus_get_resource, bus_generic_rl_get_resource),
694 /* iicbus interface */
695 DEVMETHOD(iicbus_callback, iicbus_null_callback),
696 DEVMETHOD(iicbus_repeated_start, twsi_repeated_start),
697 DEVMETHOD(iicbus_start, twsi_start),
698 DEVMETHOD(iicbus_stop, twsi_stop),
699 DEVMETHOD(iicbus_write, twsi_write),
700 DEVMETHOD(iicbus_read, twsi_read),
701 DEVMETHOD(iicbus_reset, twsi_reset),
702 DEVMETHOD(iicbus_transfer, twsi_transfer),
706 DEFINE_CLASS_0(twsi, twsi_driver, twsi_methods,
707 sizeof(struct twsi_softc));