2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
4 * Copyright (c) 2006 IronPort Systems Inc. <ambrisko@ironport.com>
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 #ifndef __IPMIVARS_H__
32 #define __IPMIVARS_H__
34 struct ipmi_get_info {
45 TAILQ_ENTRY(ipmi_request) ir_link;
46 struct ipmi_device *ir_owner; /* Driver uses NULL. */
47 u_char *ir_request; /* Request is data to send to BMC. */
49 u_char *ir_reply; /* Reply is data read from BMC. */
50 size_t ir_replybuflen; /* Length of ir_reply[] buffer. */
51 int ir_replylen; /* Length of reply from BMC. */
63 #define SMIC_CTL_STS 1
68 /* Per file descriptor data. */
70 TAILQ_ENTRY(ipmi_device) ipmi_link;
71 TAILQ_HEAD(,ipmi_request) ipmi_completed_requests;
72 struct selinfo ipmi_select;
73 struct ipmi_softc *ipmi_softc;
76 u_char ipmi_address; /* IPMB address. */
95 struct ipmi_smic smic;
96 struct ipmi_ssif ssif;
100 struct mtx ipmi_io_lock;
101 struct resource *ipmi_io_res[MAX_RES];
104 struct resource *ipmi_irq_res;
108 uint8_t ipmi_dev_support; /* IPMI_ADS_* */
109 struct cdev *ipmi_cdev;
110 TAILQ_HEAD(,ipmi_request) ipmi_pending_requests;
111 int ipmi_driver_requests_polled;
112 eventhandler_tag ipmi_power_cycle_tag;
113 eventhandler_tag ipmi_watchdog_tag;
114 eventhandler_tag ipmi_shutdown_tag;
115 int ipmi_watchdog_active;
116 int ipmi_watchdog_actions;
117 int ipmi_watchdog_pretimeout;
118 struct intr_config_hook ipmi_ich;
119 struct mtx ipmi_requests_lock;
120 struct cv ipmi_request_added;
121 struct proc *ipmi_kthread;
122 driver_intr_t *ipmi_intr;
123 int (*ipmi_startup)(struct ipmi_softc *);
124 int (*ipmi_enqueue_request)(struct ipmi_softc *, struct ipmi_request *);
125 int (*ipmi_driver_request)(struct ipmi_softc *, struct ipmi_request *, int);
128 #define ipmi_ssif_smbus_address _iface.ssif.smbus_address
129 #define ipmi_ssif_smbus _iface.ssif.smbus
135 #define KCS_MODE 0x01
136 #define SMIC_MODE 0x02
138 #define SSIF_MODE 0x04
140 /* KCS status flags */
141 #define KCS_STATUS_OBF 0x01 /* Data Out ready from BMC */
142 #define KCS_STATUS_IBF 0x02 /* Data In from System */
143 #define KCS_STATUS_SMS_ATN 0x04 /* Ready in RX queue */
144 #define KCS_STATUS_C_D 0x08 /* Command/Data register write*/
145 #define KCS_STATUS_OEM1 0x10
146 #define KCS_STATUS_OEM2 0x20
147 #define KCS_STATUS_S0 0x40
148 #define KCS_STATUS_S1 0x80
149 #define KCS_STATUS_STATE(x) ((x)>>6)
150 #define KCS_STATUS_STATE_IDLE 0x0
151 #define KCS_STATUS_STATE_READ 0x1
152 #define KCS_STATUS_STATE_WRITE 0x2
153 #define KCS_STATUS_STATE_ERROR 0x3
154 #define KCS_IFACE_STATUS_OK 0x00
155 #define KCS_IFACE_STATUS_ABORT 0x01
156 #define KCS_IFACE_STATUS_ILLEGAL 0x02
157 #define KCS_IFACE_STATUS_LENGTH_ERR 0x06
158 #define KCS_IFACE_STATUS_UNKNOWN_ERR 0xff
160 /* KCS control codes */
161 #define KCS_CONTROL_GET_STATUS_ABORT 0x60
162 #define KCS_CONTROL_WRITE_START 0x61
163 #define KCS_CONTROL_WRITE_END 0x62
164 #define KCS_DATA_IN_READ 0x68
166 /* SMIC status flags */
167 #define SMIC_STATUS_BUSY 0x01 /* System set and BMC clears it */
168 #define SMIC_STATUS_SMS_ATN 0x04 /* BMC has a message */
169 #define SMIC_STATUS_EVT_ATN 0x08 /* Event has been RX */
170 #define SMIC_STATUS_SMI 0x10 /* asserted SMI */
171 #define SMIC_STATUS_TX_RDY 0x40 /* Ready to accept WRITE */
172 #define SMIC_STATUS_RX_RDY 0x80 /* Ready to read */
173 #define SMIC_STATUS_RESERVED 0x22
175 /* SMIC control codes */
176 #define SMIC_CC_SMS_GET_STATUS 0x40
177 #define SMIC_CC_SMS_WR_START 0x41
178 #define SMIC_CC_SMS_WR_NEXT 0x42
179 #define SMIC_CC_SMS_WR_END 0x43
180 #define SMIC_CC_SMS_RD_START 0x44
181 #define SMIC_CC_SMS_RD_NEXT 0x45
182 #define SMIC_CC_SMS_RD_END 0x46
184 /* SMIC status codes */
185 #define SMIC_SC_SMS_RDY 0xc0
186 #define SMIC_SC_SMS_WR_START 0xc1
187 #define SMIC_SC_SMS_WR_NEXT 0xc2
188 #define SMIC_SC_SMS_WR_END 0xc3
189 #define SMIC_SC_SMS_RD_START 0xc4
190 #define SMIC_SC_SMS_RD_NEXT 0xc5
191 #define SMIC_SC_SMS_RD_END 0xc6
193 #define IPMI_ADDR(netfn, lun) ((netfn) << 2 | (lun))
194 #define IPMI_REPLY_ADDR(addr) ((addr) + 0x4)
196 #define IPMI_LOCK(sc) mtx_lock(&(sc)->ipmi_requests_lock)
197 #define IPMI_UNLOCK(sc) mtx_unlock(&(sc)->ipmi_requests_lock)
198 #define IPMI_LOCK_ASSERT(sc) mtx_assert(&(sc)->ipmi_requests_lock, MA_OWNED)
200 #define IPMI_IO_LOCK(sc) mtx_lock(&(sc)->ipmi_io_lock)
201 #define IPMI_IO_UNLOCK(sc) mtx_unlock(&(sc)->ipmi_io_lock)
202 #define IPMI_IO_LOCK_ASSERT(sc) mtx_assert(&(sc)->ipmi_io_lock, MA_OWNED)
204 /* I/O to a single I/O resource. */
205 #define INB_SINGLE(sc, x) \
206 bus_read_1((sc)->ipmi_io_res[0], (sc)->ipmi_io_spacing * (x))
207 #define OUTB_SINGLE(sc, x, value) \
208 bus_write_1((sc)->ipmi_io_res[0], (sc)->ipmi_io_spacing * (x), value)
210 /* I/O with each register in its in I/O resource. */
211 #define INB_MULTIPLE(sc, x) \
212 bus_read_1((sc)->ipmi_io_res[(x)], 0)
213 #define OUTB_MULTIPLE(sc, x, value) \
214 bus_write_1((sc)->ipmi_io_res[(x)], 0, value)
217 * Determine I/O method based on whether or not we have more than one I/O
221 ((sc)->ipmi_io_res[1] != NULL ? INB_MULTIPLE(sc, x) : INB_SINGLE(sc, x))
222 #define OUTB(sc, x, value) \
223 ((sc)->ipmi_io_res[1] != NULL ? OUTB_MULTIPLE(sc, x, value) : \
224 OUTB_SINGLE(sc, x, value))
226 #define MAX_TIMEOUT 6 * hz
228 int ipmi_attach(device_t);
229 int ipmi_detach(device_t);
230 void ipmi_release_resources(device_t);
232 /* Manage requests. */
233 struct ipmi_request *ipmi_alloc_request(struct ipmi_device *, long, uint8_t,
234 uint8_t, size_t, size_t);
235 void ipmi_complete_request(struct ipmi_softc *, struct ipmi_request *);
236 struct ipmi_request *ipmi_dequeue_request(struct ipmi_softc *);
237 void ipmi_free_request(struct ipmi_request *);
238 int ipmi_polled_enqueue_request(struct ipmi_softc *, struct ipmi_request *);
239 int ipmi_submit_driver_request(struct ipmi_softc *, struct ipmi_request *,
242 /* Identify BMC interface via SMBIOS. */
243 int ipmi_smbios_identify(struct ipmi_get_info *);
245 /* Match BMC PCI device listed in SMBIOS. */
246 const char *ipmi_pci_match(uint16_t, uint16_t);
248 /* Interface attach routines. */
249 int ipmi_kcs_attach(struct ipmi_softc *);
250 int ipmi_kcs_probe_align(struct ipmi_softc *);
251 int ipmi_smic_attach(struct ipmi_softc *);
252 int ipmi_ssif_attach(struct ipmi_softc *, device_t, int);
255 int ipmi_handle_attn(struct ipmi_softc *);
258 extern devclass_t ipmi_devclass;
259 extern int ipmi_attached;
261 #endif /* !__IPMIVARS_H__ */