sys/dev/ips/ipsreg.h

   1 /*-
   2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
   3  *
   4  * Copyright (c) 2002 Adaptec Inc.
   5  * All rights reserved.
   6  *
   7  * Written by: David Jeffery
   8  *
   9  * Redistribution and use in source and binary forms, with or without
  10  * modification, are permitted provided that the following conditions
  11  * are met:
  12  * 1. Redistributions of source code must retain the above copyright
  13  *    notice, this list of conditions and the following disclaimer.
  14  * 2. Redistributions in binary form must reproduce the above copyright
  15  *    notice, this list of conditions and the following disclaimer in the
  16  *    documentation and/or other materials provided with the distribution.
  17  *
  18  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  19  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  20  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  21  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  22  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  23  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  24  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  25  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  26  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  27  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  28  * SUCH DAMAGE.
  29  *
  30  * $FreeBSD$
  31  */
  32
  33 #include <sys/param.h>
  34
  35 /*
  36  *   IPS CONSTANTS
  37  */
  38 #define IPS_VENDOR_ID                   0x1014
  39 #define IPS_VENDOR_ID_ADAPTEC           0x9005
  40 #define IPS_MORPHEUS_DEVICE_ID          0x01BD
  41 #define IPS_COPPERHEAD_DEVICE_ID        0x002E
  42 #define IPS_MARCO_DEVICE_ID             0x0250
  43 #define IPS_CSL                         0xff
  44 #define IPS_POCL                        0x30
  45
  46 /* amounts of memory to allocate for certain commands */
  47 #define IPS_ADAPTER_INFO_LEN            (sizeof(ips_adapter_info_t))
  48 #define IPS_DRIVE_INFO_LEN              (sizeof(ips_drive_info_t))
  49 #define IPS_COMMAND_LEN                 24
  50 #define IPS_MAX_SG_LEN                  (sizeof(ips_sg_element_t) * IPS_MAX_SG_ELEMENTS)
  51 #define IPS_NVRAM_PAGE_SIZE             128
  52 /* various flags */
  53 #define IPS_STATIC_FLAG                 0x01
  54
  55 /* states for the card to be in */
  56 #define IPS_DEV_OPEN                    0x01
  57 #define IPS_TIMEOUT                     0x02 /* command time out, need reset */
  58 #define IPS_OFFLINE                     0x04 /* can't reset card/card failure */
  59 #define IPS_STATIC_BUSY                 0x08
  60
  61 /* max number of commands set to something low for now */
  62 #define IPS_MAX_CMD_NUM                 128
  63 #define IPS_MAX_NUM_DRIVES              8
  64 #define IPS_MAX_SG_ELEMENTS             32
  65 #define IPS_MAX_IOBUF_SIZE              (64 * 1024)
  66 #define IPS_BLKSIZE                     512
  67 #define IPS_MAX_LD                      8
  68 #define IPS_MAX_CHANNELS                4
  69 #define IPS_MAX_TARGETS                 15
  70 #define IPS_MAX_CHUNKS                  16
  71
  72 /* logical drive states */
  73
  74 #define IPS_LD_OFFLINE                  0x02
  75 #define IPS_LD_OKAY                     0x03
  76 #define IPS_LD_DEGRADED                 0x04
  77 #define IPS_LD_FREE                     0x00
  78 #define IPS_LD_SYS                      0x06
  79 #define IPS_LD_CRS                      0x24
  80
  81 /* register offsets */
  82 #define MORPHEUS_REG_OMR0               0x0018 /* Outbound Msg. Reg. 0 */
  83 #define MORPHEUS_REG_OMR1               0x001C /* Outbound Msg. Reg. 1 */
  84 #define MORPHEUS_REG_IDR                0x0020 /* Inbound Doorbell Reg. */
  85 #define MORPHEUS_REG_IISR               0x0024 /* Inbound IRQ Status Reg. */
  86 #define MORPHEUS_REG_IIMR               0x0028 /* Inbound IRQ Mask Reg. */
  87 #define MORPHEUS_REG_OISR               0x0030 /* Outbound IRQ Status Reg. */
  88 #define MORPHEUS_REG_OIMR               0x0034 /* Outbound IRQ Mask Reg. */
  89 #define MORPHEUS_REG_IQPR               0x0040 /* Inbound Queue Port Reg. */
  90 #define MORPHEUS_REG_OQPR               0x0044 /* Outbound Queue Port Reg. */
  91
  92 #define COPPER_REG_SCPR                 0x05    /* Subsystem Ctrl. Port Reg. */
  93 #define COPPER_REG_ISPR                 0x06    /* IRQ Status Port Reg. */
  94 #define COPPER_REG_CBSP                 0x07    /* ? Reg. */
  95 #define COPPER_REG_HISR                 0x08    /* Host IRQ Status Reg.    */
  96 #define COPPER_REG_CCSAR                0x10    /* Cmd. Channel Sys Addr Reg.*/
  97 #define COPPER_REG_CCCR                 0x14    /* Cmd. Channel Ctrl. Reg. */
  98 #define COPPER_REG_SQHR                 0x20    /* Status Queue Head Reg.  */
  99 #define COPPER_REG_SQTR                 0x24    /* Status Queue Tail Reg.  */
 100 #define COPPER_REG_SQER                 0x28    /* Status Queue End Reg.   */
 101 #define COPPER_REG_SQSR                 0x2C    /* Status Queue Start Reg. */
 102
 103 /* bit definitions */
 104 #define MORPHEUS_BIT_POST1              0x01
 105 #define MORPHEUS_BIT_POST2              0x02
 106 #define MORPHEUS_BIT_CMD_IRQ            0x08
 107
 108 #define COPPER_CMD_START                0x101A
 109 #define COPPER_SEM_BIT                  0x08
 110 #define COPPER_EI_BIT                   0x80
 111 #define COPPER_EBM_BIT                  0x02
 112 #define COPPER_RESET_BIT                0x80
 113 #define COPPER_GHI_BIT                  0x04
 114 #define COPPER_SCE_BIT                  0x01
 115 #define COPPER_OP_BIT                   0x01
 116 #define COPPER_ILE_BIT                  0x10
 117
 118 /* status defines */
 119 #define IPS_POST1_OK                    0x8000
 120 #define IPS_POST2_OK                    0x000f
 121
 122 /* command op codes */
 123 #define IPS_READ_CMD                    0x02
 124 #define IPS_WRITE_CMD                   0x03
 125 #define IPS_ADAPTER_INFO_CMD            0x05
 126 #define IPS_CACHE_FLUSH_CMD             0x0A
 127 #define IPS_REBUILD_STATUS_CMD          0x0C
 128 #define IPS_ERROR_TABLE_CMD             0x17
 129 #define IPS_DRIVE_INFO_CMD              0x19
 130 #define IPS_CMD_READ_CONF               0x38
 131 #define IPS_SUBSYS_PARAM_CMD            0x40
 132 #define IPS_CONFIG_SYNC_CMD             0x58
 133 #define IPS_SG_READ_CMD                 0x82
 134 #define IPS_SG_WRITE_CMD                0x83
 135 #define IPS_RW_NVRAM_CMD                0xBC
 136 #define IPS_FFDC_CMD                    0xD7
 137
 138 /* basic_status information returned by the adapter */
 139 #define IPS_MIN_ERROR                   0x02
 140 #define IPS_BASIC_STATUS_MASK           0xFF
 141 #define IPS_GSC_STATUS_MASK             0x0F
 142 #define IPS_CMD_SUCCESS                 0x00
 143 #define IPS_CMD_RECOVERED_ERROR         0x01
 144 #define IPS_DRV_ERROR                   0x02    /* Driver supplied error */
 145 #define IPS_INVAL_OPCO                  0x03
 146 #define IPS_INVAL_CMD_BLK               0x04
 147 #define IPS_INVAL_PARM_BLK              0x05
 148 #define IPS_BUSY                        0x08
 149 #define IPS_CMD_CMPLT_WERROR            0x0C
 150 #define IPS_LD_ERROR                    0x0D
 151 #define IPS_CMD_TIMEOUT                 0x0E
 152 #define IPS_PHYS_DRV_ERROR              0x0F
 153
 154 /* extended_status information returned by the adapter */
 155 #define IPS_ERR_SEL_TO                  0xF0
 156 #define IPS_ERR_OU_RUN                  0xF2
 157 #define IPS_ERR_HOST_RESET              0xF7
 158 #define IPS_ERR_DEV_RESET               0xF8
 159 #define IPS_ERR_RECOVERY                0xFC
 160 #define IPS_ERR_CKCOND                  0xFF
 161
 162 #define IPS_OS_FREEBSD                  8
 163 #define IPS_VERSION_MAJOR               "0.90"
 164 #define IPS_VERSION_MINOR               ".10"
 165
 166 /* Adapter Types */
 167 #define IPS_ADAPTER_COPPERHEAD          0x01
 168 #define IPS_ADAPTER_COPPERHEAD2         0x02
 169 #define IPS_ADAPTER_COPPERHEADOB1       0x03
 170 #define IPS_ADAPTER_COPPERHEADOB2       0x04
 171 #define IPS_ADAPTER_CLARINET            0x05
 172 #define IPS_ADAPTER_CLARINETLITE        0x06
 173 #define IPS_ADAPTER_TROMBONE            0x07
 174 #define IPS_ADAPTER_MORPHEUS            0x08
 175 #define IPS_ADAPTER_MORPHEUSLITE        0x09
 176 #define IPS_ADAPTER_NEO                 0x0A
 177 #define IPS_ADAPTER_NEOLITE             0x0B
 178 #define IPS_ADAPTER_SARASOTA2           0x0C
 179 #define IPS_ADAPTER_SARASOTA1           0x0D
 180 #define IPS_ADAPTER_MARCO               0x0E
 181 #define IPS_ADAPTER_SEBRING             0x0F
 182 #define IPS_ADAPTER_7T                  0x10
 183 #define IPS_ADAPTER_7K                  0x11
 184 #define IPS_ADAPTER_7M                  0x12
 185 #define IPS_ADAPTER_MAX_T               IPS_ADAPTER_7M
 186
 187 /* values for ffdc_settime (from gmtime) */
 188 #define IPS_SECSPERMIN      60
 189 #define IPS_MINSPERHOUR     60
 190 #define IPS_HOURSPERDAY     24
 191 #define IPS_DAYSPERWEEK     7
 192 #define IPS_DAYSPERNYEAR    365
 193 #define IPS_DAYSPERLYEAR    366
 194 #define IPS_SECSPERHOUR     (IPS_SECSPERMIN * IPS_MINSPERHOUR)
 195 #define IPS_SECSPERDAY      ((long) IPS_SECSPERHOUR * IPS_HOURSPERDAY)
 196 #define IPS_MONSPERYEAR     12
 197 #define IPS_EPOCH_YEAR      1970
 198 #define IPS_LEAPS_THRU_END_OF(y)    ((y) / 4 - (y) / 100 + (y) / 400)
 199 #define ips_isleap(y) (((y) % 4) == 0 && (((y) % 100) != 0 || ((y) % 400) == 0))
 200
 201 /*
 202  *   IPS STRUCTS
 203  */
 204
 205 typedef struct{
 206         u_int8_t        command;
 207         u_int8_t        id;
 208         u_int8_t        drivenum;
 209         u_int8_t        reserve2;
 210         u_int32_t       lba;
 211         u_int32_t       buffaddr;
 212         u_int32_t       reserve3;
 213 } __attribute__ ((packed)) ips_generic_cmd;
 214
 215 typedef struct{
 216         u_int8_t        command;
 217         u_int8_t        id;
 218         u_int8_t        drivenum;
 219         u_int8_t        segnum;
 220         u_int32_t       lba;
 221         u_int32_t       buffaddr;
 222         u_int16_t       length;
 223         u_int16_t       reserve1;
 224 } __attribute__ ((packed)) ips_io_cmd;
 225
 226 typedef struct{
 227         u_int8_t        command;
 228         u_int8_t        id;
 229         u_int8_t        pagenum;
 230         u_int8_t        rw;
 231         u_int32_t       reserve1;
 232         u_int32_t       buffaddr;
 233         u_int32_t       reserve3;
 234 } __attribute__ ((packed)) ips_rw_nvram_cmd;
 235
 236 typedef struct{
 237         u_int8_t        command;
 238         u_int8_t        id;
 239         u_int8_t        drivenum;
 240         u_int8_t        reserve1;
 241         u_int32_t       reserve2;
 242         u_int32_t       buffaddr;
 243         u_int32_t       reserve3;
 244 } __attribute__ ((packed)) ips_drive_cmd;
 245
 246 typedef struct{
 247         u_int8_t        command;
 248         u_int8_t        id;
 249         u_int8_t        reserve1;
 250         u_int8_t        commandtype;
 251         u_int32_t       reserve2;
 252         u_int32_t       buffaddr;
 253         u_int32_t       reserve3;
 254 } __attribute__((packed)) ips_adapter_info_cmd;
 255
 256 typedef struct{
 257         u_int8_t        command;
 258         u_int8_t        id;
 259         u_int8_t        reset_count;
 260         u_int8_t        reset_type;
 261         u_int8_t        second;
 262         u_int8_t        minute;
 263         u_int8_t        hour;
 264         u_int8_t        day;
 265         u_int8_t        reserve1[4];
 266         u_int8_t        month;
 267         u_int8_t        yearH;
 268         u_int8_t        yearL;
 269         u_int8_t        reserve2;
 270 } __attribute__((packed)) ips_adapter_ffdc_cmd;
 271
 272 typedef union{
 273         ips_generic_cmd         generic_cmd;
 274         ips_drive_cmd           drive_cmd;
 275         ips_adapter_info_cmd    adapter_info_cmd;
 276 } ips_cmd_buff_t;
 277
 278 typedef struct {
 279    u_int32_t  signature;
 280    u_int8_t   reserved;
 281    u_int8_t   adapter_slot;
 282    u_int16_t  adapter_type;
 283    u_int8_t   bios_high[4];
 284    u_int8_t   bios_low[4];
 285    u_int16_t  reserve2;
 286    u_int8_t   reserve3;
 287    u_int8_t   operating_system;
 288    u_int8_t   driver_high[4];
 289    u_int8_t   driver_low[4];
 290    u_int8_t   reserve4[100];
 291 }__attribute__((packed)) ips_nvram_page5;
 292
 293 typedef struct{
 294         u_int32_t       addr;
 295         u_int32_t       len;
 296 } ips_sg_element_t;
 297
 298 typedef struct{
 299         u_int8_t        drivenum;
 300         u_int8_t        merge_id;
 301         u_int8_t        raid_lvl;
 302         u_int8_t        state;
 303         u_int32_t       sector_count;
 304 } __attribute__((packed)) ips_drive_t;
 305
 306 typedef struct{
 307         u_int8_t        drivecount;
 308         u_int8_t        reserve1;
 309         u_int16_t       reserve2;
 310         ips_drive_t drives[IPS_MAX_NUM_DRIVES];
 311 }__attribute__((packed)) ips_drive_info_t;
 312
 313 typedef struct{
 314         u_int8_t        drivecount;
 315         u_int8_t        miscflags;
 316         u_int8_t        SLTflags;
 317         u_int8_t        BSTflags;
 318         u_int8_t        pwr_chg_count;
 319         u_int8_t        wrong_addr_count;
 320         u_int8_t        unident_count;
 321         u_int8_t        nvram_dev_chg_count;
 322         u_int8_t        codeblock_version[8];
 323         u_int8_t        bootblock_version[8];
 324         u_int32_t       drive_sector_count[IPS_MAX_NUM_DRIVES];
 325         u_int8_t        max_concurrent_cmds;
 326         u_int8_t        max_phys_devices;
 327         u_int16_t       flash_prog_count;
 328         u_int8_t        defunct_disks;
 329         u_int8_t        rebuildflags;
 330         u_int8_t        offline_drivecount;
 331         u_int8_t        critical_drivecount;
 332         u_int16_t       config_update_count;
 333         u_int8_t        blockedflags;
 334         u_int8_t        psdn_error;
 335         u_int16_t       addr_dead_disk[IPS_MAX_CHANNELS][IPS_MAX_TARGETS];
 336 }__attribute__((packed)) ips_adapter_info_t;
 337
 338 typedef struct {
 339         u_int8_t        initiator;
 340         u_int8_t        parameters;
 341         u_int8_t        miscflag;
 342         u_int8_t        state;
 343         u_int32_t       blkcount;
 344         u_int8_t        deviceid[28];
 345 } __attribute__((packed)) ips_devstate_t;
 346
 347 /*
 348  * The states that a physical drive can be in.  The 'present' value can be
 349  * OR'd with the other values.
 350  */
 351 #define IPS_DEVSTATE_PRESENT    0x81
 352 #define IPS_DEVSTATE_REBUILD    0x02
 353 #define IPS_DEVSTATE_SPARE      0x04
 354 #define IPS_DEVSTATE_MEMBER     0x08
 355
 356 typedef struct {
 357         u_int8_t        channel;
 358         u_int8_t        target;
 359         u_int16_t       reserved;
 360         u_int32_t       startsectors;
 361         u_int32_t       numsectors;
 362 } __attribute__((packed)) ips_chunk_t;
 363
 364 typedef struct {
 365         u_int16_t       userfield;
 366         u_int8_t        state;
 367         u_int8_t        raidcacheparam;
 368         u_int8_t        numchunkunits;
 369         u_int8_t        stripesize;
 370         u_int8_t        params;
 371         u_int8_t        reserved;
 372         u_int32_t       ldsize;
 373         ips_chunk_t     chunk[IPS_MAX_CHUNKS];
 374 } __attribute__((packed)) ips_ld_t;
 375
 376 typedef struct {
 377         u_int8_t        boarddisc[8];
 378         u_int8_t        processor[8];
 379         u_int8_t        numchantype;
 380         u_int8_t        numhostinttype;
 381         u_int8_t        compression;
 382         u_int8_t        nvramtype;
 383         u_int32_t       nvramsize;
 384 } __attribute__((packed)) ips_hardware_t;
 385
 386 typedef struct {
 387         u_int8_t        ldcount;
 388         u_int8_t        day;
 389         u_int8_t        month;
 390         u_int8_t        year;
 391         u_int8_t        initiatorid[4];
 392         u_int8_t        hostid[12];
 393         u_int8_t        timesign[8];
 394         u_int32_t       useropt;
 395         u_int16_t       userfield;
 396         u_int8_t        rebuildrate;
 397         u_int8_t        reserve;
 398         ips_hardware_t  hardwaredisc;
 399         ips_ld_t        ld[IPS_MAX_LD];
 400         ips_devstate_t  dev[IPS_MAX_CHANNELS][IPS_MAX_TARGETS+1];
 401         u_int8_t        reserved[512];
 402 } __attribute__((packed)) ips_conf_t;
 403
 404 typedef union {
 405    struct {
 406       u_int8_t  reserved;
 407       u_int8_t  command_id;
 408       u_int8_t  basic_status;
 409       u_int8_t  extended_status;
 410    } fields;
 411    volatile u_int32_t    value;
 412 } ips_cmd_status_t;
 413