4 * Copyright (c) 2004-2006
5 * Damien Bergamini <damien.bergamini@free.fr>. All rights reserved.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice unmodified, this list of conditions, and the following
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 #include <sys/cdefs.h>
31 __FBSDID("$FreeBSD$");
34 * Intel(R) PRO/Wireless 2100 MiniPCI driver
35 * http://www.intel.com/network/connectivity/products/wireless/prowireless_mobile.htm
38 #include <sys/param.h>
39 #include <sys/sysctl.h>
40 #include <sys/sockio.h>
42 #include <sys/kernel.h>
43 #include <sys/socket.h>
44 #include <sys/systm.h>
45 #include <sys/malloc.h>
46 #include <sys/queue.h>
47 #include <sys/taskqueue.h>
48 #include <sys/module.h>
50 #include <sys/endian.h>
51 #include <sys/linker.h>
52 #include <sys/firmware.h>
54 #include <machine/bus.h>
55 #include <machine/resource.h>
58 #include <dev/pci/pcireg.h>
59 #include <dev/pci/pcivar.h>
63 #include <net/if_arp.h>
64 #include <net/ethernet.h>
65 #include <net/if_dl.h>
66 #include <net/if_media.h>
67 #include <net/if_types.h>
69 #include <net80211/ieee80211_var.h>
70 #include <net80211/ieee80211_radiotap.h>
72 #include <netinet/in.h>
73 #include <netinet/in_systm.h>
74 #include <netinet/in_var.h>
75 #include <netinet/ip.h>
76 #include <netinet/if_ether.h>
78 #include <dev/ipw/if_ipwreg.h>
79 #include <dev/ipw/if_ipwvar.h>
82 #define DPRINTF(x) do { if (ipw_debug > 0) printf x; } while (0)
83 #define DPRINTFN(n, x) do { if (ipw_debug >= (n)) printf x; } while (0)
85 SYSCTL_INT(_debug, OID_AUTO, ipw, CTLFLAG_RW, &ipw_debug, 0, "ipw debug level");
88 #define DPRINTFN(n, x)
91 MODULE_DEPEND(ipw, pci, 1, 1, 1);
92 MODULE_DEPEND(ipw, wlan, 1, 1, 1);
93 MODULE_DEPEND(ipw, firmware, 1, 1, 1);
101 static const struct ipw_ident ipw_ident_table[] = {
102 { 0x8086, 0x1043, "Intel(R) PRO/Wireless 2100 MiniPCI" },
107 static int ipw_dma_alloc(struct ipw_softc *);
108 static void ipw_release(struct ipw_softc *);
109 static int ipw_media_change(struct ifnet *);
110 static void ipw_media_status(struct ifnet *, struct ifmediareq *);
111 static int ipw_newstate(struct ieee80211com *, enum ieee80211_state, int);
112 static uint16_t ipw_read_prom_word(struct ipw_softc *, uint8_t);
113 static void ipw_command_intr(struct ipw_softc *, struct ipw_soft_buf *);
114 static void ipw_newstate_intr(struct ipw_softc *, struct ipw_soft_buf *);
115 static void ipw_data_intr(struct ipw_softc *, struct ipw_status *,
116 struct ipw_soft_bd *, struct ipw_soft_buf *);
117 static void ipw_rx_intr(struct ipw_softc *);
118 static void ipw_release_sbd(struct ipw_softc *, struct ipw_soft_bd *);
119 static void ipw_tx_intr(struct ipw_softc *);
120 static void ipw_intr(void *);
121 static void ipw_dma_map_addr(void *, bus_dma_segment_t *, int, int);
122 static int ipw_cmd(struct ipw_softc *, uint32_t, void *, uint32_t);
123 static int ipw_tx_start(struct ifnet *, struct mbuf *,
124 struct ieee80211_node *);
125 static void ipw_start(struct ifnet *);
126 static void ipw_watchdog(struct ifnet *);
127 static int ipw_ioctl(struct ifnet *, u_long, caddr_t);
128 static void ipw_stop_master(struct ipw_softc *);
129 static int ipw_reset(struct ipw_softc *);
130 static int ipw_load_ucode(struct ipw_softc *, const char *, int);
131 static int ipw_load_firmware(struct ipw_softc *, const char *, int);
132 static int ipw_config(struct ipw_softc *);
133 static void ipw_init_task(void *, int);
134 static void ipw_init(void *);
135 static void ipw_stop(void *);
136 static int ipw_sysctl_stats(SYSCTL_HANDLER_ARGS);
137 static int ipw_sysctl_radio(SYSCTL_HANDLER_ARGS);
138 static uint32_t ipw_read_table1(struct ipw_softc *, uint32_t);
139 static void ipw_write_table1(struct ipw_softc *, uint32_t, uint32_t);
140 static int ipw_read_table2(struct ipw_softc *, uint32_t, void *,
142 static void ipw_read_mem_1(struct ipw_softc *, bus_size_t, uint8_t *,
144 static void ipw_write_mem_1(struct ipw_softc *, bus_size_t,
145 const uint8_t *, bus_size_t);
147 static int ipw_probe(device_t);
148 static int ipw_attach(device_t);
149 static int ipw_detach(device_t);
150 static int ipw_shutdown(device_t);
151 static int ipw_suspend(device_t);
152 static int ipw_resume(device_t);
154 static device_method_t ipw_methods[] = {
155 /* Device interface */
156 DEVMETHOD(device_probe, ipw_probe),
157 DEVMETHOD(device_attach, ipw_attach),
158 DEVMETHOD(device_detach, ipw_detach),
159 DEVMETHOD(device_shutdown, ipw_shutdown),
160 DEVMETHOD(device_suspend, ipw_suspend),
161 DEVMETHOD(device_resume, ipw_resume),
166 static driver_t ipw_driver = {
169 sizeof (struct ipw_softc)
172 static devclass_t ipw_devclass;
174 DRIVER_MODULE(ipw, pci, ipw_driver, ipw_devclass, 0, 0);
177 ipw_probe(device_t dev)
179 const struct ipw_ident *ident;
181 for (ident = ipw_ident_table; ident->name != NULL; ident++) {
182 if (pci_get_vendor(dev) == ident->vendor &&
183 pci_get_device(dev) == ident->device) {
184 device_set_desc(dev, ident->name);
191 /* Base Address Register */
192 #define IPW_PCI_BAR0 0x10
195 ipw_attach(device_t dev)
197 struct ipw_softc *sc = device_get_softc(dev);
199 struct ieee80211com *ic = &sc->sc_ic;
205 mtx_init(&sc->sc_mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK,
206 MTX_DEF | MTX_RECURSE);
208 TASK_INIT(&sc->sc_init_task, 0, ipw_init_task, sc);
210 if (pci_get_powerstate(dev) != PCI_POWERSTATE_D0) {
211 device_printf(dev, "chip is in D%d power mode "
212 "-- setting to D0\n", pci_get_powerstate(dev));
213 pci_set_powerstate(dev, PCI_POWERSTATE_D0);
216 pci_write_config(dev, 0x41, 0, 1);
218 /* enable bus-mastering */
219 pci_enable_busmaster(dev);
221 sc->mem_rid = IPW_PCI_BAR0;
222 sc->mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &sc->mem_rid,
224 if (sc->mem == NULL) {
225 device_printf(dev, "could not allocate memory resource\n");
229 sc->sc_st = rman_get_bustag(sc->mem);
230 sc->sc_sh = rman_get_bushandle(sc->mem);
233 sc->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &sc->irq_rid,
234 RF_ACTIVE | RF_SHAREABLE);
235 if (sc->irq == NULL) {
236 device_printf(dev, "could not allocate interrupt resource\n");
240 if (ipw_reset(sc) != 0) {
241 device_printf(dev, "could not reset adapter\n");
245 if (ipw_dma_alloc(sc) != 0) {
246 device_printf(dev, "could not allocate DMA resources\n");
250 ifp = sc->sc_ifp = if_alloc(IFT_ETHER);
252 device_printf(dev, "can not if_alloc()\n");
257 if_initname(ifp, device_get_name(dev), device_get_unit(dev));
258 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
259 ifp->if_init = ipw_init;
260 ifp->if_ioctl = ipw_ioctl;
261 ifp->if_start = ipw_start;
262 ifp->if_watchdog = ipw_watchdog;
263 IFQ_SET_MAXLEN(&ifp->if_snd, IFQ_MAXLEN);
264 ifp->if_snd.ifq_drv_maxlen = IFQ_MAXLEN;
265 IFQ_SET_READY(&ifp->if_snd);
268 ic->ic_phytype = IEEE80211_T_DS;
269 ic->ic_opmode = IEEE80211_M_STA;
270 ic->ic_state = IEEE80211_S_INIT;
272 /* set device capabilities */
274 IEEE80211_C_IBSS | /* IBSS mode supported */
275 IEEE80211_C_MONITOR | /* monitor mode supported */
276 IEEE80211_C_TXPMGT | /* tx power management */
277 IEEE80211_C_SHPREAMBLE; /* short preamble supported */
279 /* read MAC address from EEPROM */
280 val = ipw_read_prom_word(sc, IPW_EEPROM_MAC + 0);
281 ic->ic_myaddr[0] = val >> 8;
282 ic->ic_myaddr[1] = val & 0xff;
283 val = ipw_read_prom_word(sc, IPW_EEPROM_MAC + 1);
284 ic->ic_myaddr[2] = val >> 8;
285 ic->ic_myaddr[3] = val & 0xff;
286 val = ipw_read_prom_word(sc, IPW_EEPROM_MAC + 2);
287 ic->ic_myaddr[4] = val >> 8;
288 ic->ic_myaddr[5] = val & 0xff;
290 /* set supported .11b channels */
291 for (i = 1; i < 14; i++) {
292 ic->ic_channels[i].ic_freq =
293 ieee80211_ieee2mhz(i, IEEE80211_CHAN_B);
294 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_B;
297 /* check support for radio transmitter switch in EEPROM */
298 if (!(ipw_read_prom_word(sc, IPW_EEPROM_RADIO) & 8))
299 sc->flags |= IPW_FLAG_HAS_RADIO_SWITCH;
301 ieee80211_ifattach(ic);
302 /* override state transition machine */
303 sc->sc_newstate = ic->ic_newstate;
304 ic->ic_newstate = ipw_newstate;
305 ieee80211_media_init(ic, ipw_media_change, ipw_media_status);
307 bpfattach2(ifp, DLT_IEEE802_11_RADIO,
308 sizeof (struct ieee80211_frame) + 64, &sc->sc_drvbpf);
310 sc->sc_rxtap_len = sizeof sc->sc_rxtapu;
311 sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len);
312 sc->sc_rxtap.wr_ihdr.it_present = htole32(IPW_RX_RADIOTAP_PRESENT);
314 sc->sc_txtap_len = sizeof sc->sc_txtapu;
315 sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len);
316 sc->sc_txtap.wt_ihdr.it_present = htole32(IPW_TX_RADIOTAP_PRESENT);
319 * Add a few sysctl knobs.
323 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev),
324 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, "radio",
325 CTLTYPE_INT | CTLFLAG_RD, sc, 0, ipw_sysctl_radio, "I",
326 "radio transmitter switch state (0=off, 1=on)");
328 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev),
329 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, "stats",
330 CTLTYPE_OPAQUE | CTLFLAG_RD, sc, 0, ipw_sysctl_stats, "S",
333 SYSCTL_ADD_INT(device_get_sysctl_ctx(dev),
334 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, "dwell",
335 CTLFLAG_RW, &sc->dwelltime, 0,
336 "channel dwell time (ms) for AP/station scanning");
339 * Hook our interrupt after all initialization is complete.
341 error = bus_setup_intr(dev, sc->irq, INTR_TYPE_NET | INTR_MPSAFE,
342 NULL, ipw_intr, sc, &sc->sc_ih);
344 device_printf(dev, "could not set up interrupt\n");
349 ieee80211_announce(ic);
353 fail: ipw_detach(dev);
358 ipw_detach(device_t dev)
360 struct ipw_softc *sc = device_get_softc(dev);
361 struct ieee80211com *ic = &sc->sc_ic;
362 struct ifnet *ifp = ic->ic_ifp;
368 ieee80211_ifdetach(ic);
373 if (sc->irq != NULL) {
374 bus_teardown_intr(dev, sc->irq, sc->sc_ih);
375 bus_release_resource(dev, SYS_RES_IRQ, sc->irq_rid, sc->irq);
379 bus_release_resource(dev, SYS_RES_MEMORY, sc->mem_rid, sc->mem);
384 if (sc->sc_firmware != NULL) {
385 firmware_put(sc->sc_firmware, FIRMWARE_UNLOAD);
386 sc->sc_firmware = NULL;
389 mtx_destroy(&sc->sc_mtx);
395 ipw_dma_alloc(struct ipw_softc *sc)
397 struct ipw_soft_bd *sbd;
398 struct ipw_soft_hdr *shdr;
399 struct ipw_soft_buf *sbuf;
404 * Allocate and map tx ring.
406 error = bus_dma_tag_create(NULL, 4, 0, BUS_SPACE_MAXADDR_32BIT,
407 BUS_SPACE_MAXADDR, NULL, NULL, IPW_TBD_SZ, 1, IPW_TBD_SZ, 0, NULL,
408 NULL, &sc->tbd_dmat);
410 device_printf(sc->sc_dev, "could not create tx ring DMA tag\n");
414 error = bus_dmamem_alloc(sc->tbd_dmat, (void **)&sc->tbd_list,
415 BUS_DMA_NOWAIT | BUS_DMA_ZERO, &sc->tbd_map);
417 device_printf(sc->sc_dev,
418 "could not allocate tx ring DMA memory\n");
422 error = bus_dmamap_load(sc->tbd_dmat, sc->tbd_map, sc->tbd_list,
423 IPW_TBD_SZ, ipw_dma_map_addr, &sc->tbd_phys, 0);
425 device_printf(sc->sc_dev, "could not map tx ring DMA memory\n");
430 * Allocate and map rx ring.
432 error = bus_dma_tag_create(NULL, 4, 0, BUS_SPACE_MAXADDR_32BIT,
433 BUS_SPACE_MAXADDR, NULL, NULL, IPW_RBD_SZ, 1, IPW_RBD_SZ, 0, NULL,
434 NULL, &sc->rbd_dmat);
436 device_printf(sc->sc_dev, "could not create rx ring DMA tag\n");
440 error = bus_dmamem_alloc(sc->rbd_dmat, (void **)&sc->rbd_list,
441 BUS_DMA_NOWAIT | BUS_DMA_ZERO, &sc->rbd_map);
443 device_printf(sc->sc_dev,
444 "could not allocate rx ring DMA memory\n");
448 error = bus_dmamap_load(sc->rbd_dmat, sc->rbd_map, sc->rbd_list,
449 IPW_RBD_SZ, ipw_dma_map_addr, &sc->rbd_phys, 0);
451 device_printf(sc->sc_dev, "could not map rx ring DMA memory\n");
456 * Allocate and map status ring.
458 error = bus_dma_tag_create(NULL, 4, 0, BUS_SPACE_MAXADDR_32BIT,
459 BUS_SPACE_MAXADDR, NULL, NULL, IPW_STATUS_SZ, 1, IPW_STATUS_SZ, 0,
460 NULL, NULL, &sc->status_dmat);
462 device_printf(sc->sc_dev,
463 "could not create status ring DMA tag\n");
467 error = bus_dmamem_alloc(sc->status_dmat, (void **)&sc->status_list,
468 BUS_DMA_NOWAIT | BUS_DMA_ZERO, &sc->status_map);
470 device_printf(sc->sc_dev,
471 "could not allocate status ring DMA memory\n");
475 error = bus_dmamap_load(sc->status_dmat, sc->status_map,
476 sc->status_list, IPW_STATUS_SZ, ipw_dma_map_addr, &sc->status_phys,
479 device_printf(sc->sc_dev,
480 "could not map status ring DMA memory\n");
485 * Allocate command DMA map.
487 error = bus_dma_tag_create(NULL, 1, 0, BUS_SPACE_MAXADDR_32BIT,
488 BUS_SPACE_MAXADDR, NULL, NULL, sizeof (struct ipw_cmd), 1,
489 sizeof (struct ipw_cmd), 0, NULL, NULL, &sc->cmd_dmat);
491 device_printf(sc->sc_dev, "could not create command DMA tag\n");
495 error = bus_dmamap_create(sc->cmd_dmat, 0, &sc->cmd_map);
497 device_printf(sc->sc_dev,
498 "could not create command DMA map\n");
503 * Allocate headers DMA maps.
505 error = bus_dma_tag_create(NULL, 1, 0, BUS_SPACE_MAXADDR_32BIT,
506 BUS_SPACE_MAXADDR, NULL, NULL, sizeof (struct ipw_hdr), 1,
507 sizeof (struct ipw_hdr), 0, NULL, NULL, &sc->hdr_dmat);
509 device_printf(sc->sc_dev, "could not create header DMA tag\n");
513 SLIST_INIT(&sc->free_shdr);
514 for (i = 0; i < IPW_NDATA; i++) {
515 shdr = &sc->shdr_list[i];
516 error = bus_dmamap_create(sc->hdr_dmat, 0, &shdr->map);
518 device_printf(sc->sc_dev,
519 "could not create header DMA map\n");
522 SLIST_INSERT_HEAD(&sc->free_shdr, shdr, next);
526 * Allocate tx buffers DMA maps.
528 error = bus_dma_tag_create(NULL, 1, 0, BUS_SPACE_MAXADDR_32BIT,
529 BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES, IPW_MAX_NSEG, MCLBYTES, 0,
530 NULL, NULL, &sc->txbuf_dmat);
532 device_printf(sc->sc_dev, "could not create tx DMA tag\n");
536 SLIST_INIT(&sc->free_sbuf);
537 for (i = 0; i < IPW_NDATA; i++) {
538 sbuf = &sc->tx_sbuf_list[i];
539 error = bus_dmamap_create(sc->txbuf_dmat, 0, &sbuf->map);
541 device_printf(sc->sc_dev,
542 "could not create tx DMA map\n");
545 SLIST_INSERT_HEAD(&sc->free_sbuf, sbuf, next);
549 * Initialize tx ring.
551 for (i = 0; i < IPW_NTBD; i++) {
552 sbd = &sc->stbd_list[i];
553 sbd->bd = &sc->tbd_list[i];
554 sbd->type = IPW_SBD_TYPE_NOASSOC;
558 * Pre-allocate rx buffers and DMA maps.
560 error = bus_dma_tag_create(NULL, 1, 0, BUS_SPACE_MAXADDR_32BIT,
561 BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES, 1, MCLBYTES, 0, NULL,
562 NULL, &sc->rxbuf_dmat);
564 device_printf(sc->sc_dev, "could not create rx DMA tag\n");
568 for (i = 0; i < IPW_NRBD; i++) {
569 sbd = &sc->srbd_list[i];
570 sbuf = &sc->rx_sbuf_list[i];
571 sbd->bd = &sc->rbd_list[i];
573 sbuf->m = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR);
574 if (sbuf->m == NULL) {
575 device_printf(sc->sc_dev,
576 "could not allocate rx mbuf\n");
581 error = bus_dmamap_create(sc->rxbuf_dmat, 0, &sbuf->map);
583 device_printf(sc->sc_dev,
584 "could not create rx DMA map\n");
588 error = bus_dmamap_load(sc->rxbuf_dmat, sbuf->map,
589 mtod(sbuf->m, void *), MCLBYTES, ipw_dma_map_addr,
592 device_printf(sc->sc_dev,
593 "could not map rx DMA memory\n");
597 sbd->type = IPW_SBD_TYPE_DATA;
599 sbd->bd->physaddr = htole32(physaddr);
600 sbd->bd->len = htole32(MCLBYTES);
603 bus_dmamap_sync(sc->rbd_dmat, sc->rbd_map, BUS_DMASYNC_PREWRITE);
607 fail: ipw_release(sc);
612 ipw_release(struct ipw_softc *sc)
614 struct ipw_soft_buf *sbuf;
617 if (sc->tbd_dmat != NULL) {
618 if (sc->stbd_list != NULL) {
619 bus_dmamap_unload(sc->tbd_dmat, sc->tbd_map);
620 bus_dmamem_free(sc->tbd_dmat, sc->tbd_list,
623 bus_dma_tag_destroy(sc->tbd_dmat);
626 if (sc->rbd_dmat != NULL) {
627 if (sc->rbd_list != NULL) {
628 bus_dmamap_unload(sc->rbd_dmat, sc->rbd_map);
629 bus_dmamem_free(sc->rbd_dmat, sc->rbd_list,
632 bus_dma_tag_destroy(sc->rbd_dmat);
635 if (sc->status_dmat != NULL) {
636 if (sc->status_list != NULL) {
637 bus_dmamap_unload(sc->status_dmat, sc->status_map);
638 bus_dmamem_free(sc->status_dmat, sc->status_list,
641 bus_dma_tag_destroy(sc->status_dmat);
644 for (i = 0; i < IPW_NTBD; i++)
645 ipw_release_sbd(sc, &sc->stbd_list[i]);
647 if (sc->cmd_dmat != NULL) {
648 bus_dmamap_destroy(sc->cmd_dmat, sc->cmd_map);
649 bus_dma_tag_destroy(sc->cmd_dmat);
652 if (sc->hdr_dmat != NULL) {
653 for (i = 0; i < IPW_NDATA; i++)
654 bus_dmamap_destroy(sc->hdr_dmat, sc->shdr_list[i].map);
655 bus_dma_tag_destroy(sc->hdr_dmat);
658 if (sc->txbuf_dmat != NULL) {
659 for (i = 0; i < IPW_NDATA; i++) {
660 bus_dmamap_destroy(sc->txbuf_dmat,
661 sc->tx_sbuf_list[i].map);
663 bus_dma_tag_destroy(sc->txbuf_dmat);
666 if (sc->rxbuf_dmat != NULL) {
667 for (i = 0; i < IPW_NRBD; i++) {
668 sbuf = &sc->rx_sbuf_list[i];
669 if (sbuf->m != NULL) {
670 bus_dmamap_sync(sc->rxbuf_dmat, sbuf->map,
671 BUS_DMASYNC_POSTREAD);
672 bus_dmamap_unload(sc->rxbuf_dmat, sbuf->map);
675 bus_dmamap_destroy(sc->rxbuf_dmat, sbuf->map);
677 bus_dma_tag_destroy(sc->rxbuf_dmat);
682 ipw_shutdown(device_t dev)
684 struct ipw_softc *sc = device_get_softc(dev);
692 ipw_suspend(device_t dev)
694 struct ipw_softc *sc = device_get_softc(dev);
702 ipw_resume(device_t dev)
704 struct ipw_softc *sc = device_get_softc(dev);
705 struct ifnet *ifp = sc->sc_ic.ic_ifp;
707 mtx_lock(&sc->sc_mtx);
709 pci_write_config(dev, 0x41, 0, 1);
711 if (ifp->if_flags & IFF_UP) {
712 ifp->if_init(ifp->if_softc);
713 if (ifp->if_drv_flags & IFF_DRV_RUNNING)
717 mtx_unlock(&sc->sc_mtx);
723 ipw_media_change(struct ifnet *ifp)
725 struct ipw_softc *sc = ifp->if_softc;
728 mtx_lock(&sc->sc_mtx);
730 error = ieee80211_media_change(ifp);
731 if (error != ENETRESET) {
732 mtx_unlock(&sc->sc_mtx);
736 if ((ifp->if_flags & IFF_UP) && (ifp->if_drv_flags & IFF_DRV_RUNNING))
739 mtx_unlock(&sc->sc_mtx);
745 * The firmware automatically adapts the transmit speed. We report its current
749 ipw_media_status(struct ifnet *ifp, struct ifmediareq *imr)
751 #define N(a) (sizeof (a) / sizeof (a[0]))
752 struct ipw_softc *sc = ifp->if_softc;
753 struct ieee80211com *ic = &sc->sc_ic;
754 static const struct {
760 { IPW_RATE_DS5, 11 },
761 { IPW_RATE_DS11, 22 },
766 imr->ifm_status = IFM_AVALID;
767 imr->ifm_active = IFM_IEEE80211;
768 if (ic->ic_state == IEEE80211_S_RUN)
769 imr->ifm_status |= IFM_ACTIVE;
771 /* read current transmission rate from adapter */
772 val = ipw_read_table1(sc, IPW_INFO_CURRENT_TX_RATE) & 0xf;
774 /* convert ipw rate to 802.11 rate */
775 for (i = 0; i < N(rates) && rates[i].val != val; i++);
776 rate = (i < N(rates)) ? rates[i].rate : 0;
778 imr->ifm_active |= IFM_IEEE80211_11B;
779 imr->ifm_active |= ieee80211_rate2media(ic, rate, IEEE80211_MODE_11B);
780 switch (ic->ic_opmode) {
781 case IEEE80211_M_STA:
784 case IEEE80211_M_IBSS:
785 imr->ifm_active |= IFM_IEEE80211_IBSS;
788 case IEEE80211_M_MONITOR:
789 imr->ifm_active |= IFM_IEEE80211_MONITOR;
792 case IEEE80211_M_AHDEMO:
793 case IEEE80211_M_HOSTAP:
794 /* should not get there */
801 ipw_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg)
803 struct ifnet *ifp = ic->ic_ifp;
804 struct ipw_softc *sc = ifp->if_softc;
805 struct ieee80211_node *ni;
806 uint8_t macaddr[IEEE80211_ADDR_LEN];
810 case IEEE80211_S_RUN:
811 DELAY(200); /* firmware needs a short delay here */
813 len = IEEE80211_ADDR_LEN;
814 ipw_read_table2(sc, IPW_INFO_CURRENT_BSSID, macaddr, &len);
816 ni = ieee80211_find_node(&ic->ic_scan, macaddr);
820 ieee80211_ref_node(ni);
821 ieee80211_sta_join(ic, ni);
822 ieee80211_node_authorize(ni);
824 if (ic->ic_opmode == IEEE80211_M_STA)
825 ieee80211_notify_node_join(ic, ni, 1);
828 case IEEE80211_S_INIT:
829 case IEEE80211_S_SCAN:
830 case IEEE80211_S_AUTH:
831 case IEEE80211_S_ASSOC:
835 ic->ic_state = nstate;
841 * Read 16 bits at address 'addr' from the serial EEPROM.
844 ipw_read_prom_word(struct ipw_softc *sc, uint8_t addr)
850 /* clock C once before the first command */
851 IPW_EEPROM_CTL(sc, 0);
852 IPW_EEPROM_CTL(sc, IPW_EEPROM_S);
853 IPW_EEPROM_CTL(sc, IPW_EEPROM_S | IPW_EEPROM_C);
854 IPW_EEPROM_CTL(sc, IPW_EEPROM_S);
856 /* write start bit (1) */
857 IPW_EEPROM_CTL(sc, IPW_EEPROM_S | IPW_EEPROM_D);
858 IPW_EEPROM_CTL(sc, IPW_EEPROM_S | IPW_EEPROM_D | IPW_EEPROM_C);
860 /* write READ opcode (10) */
861 IPW_EEPROM_CTL(sc, IPW_EEPROM_S | IPW_EEPROM_D);
862 IPW_EEPROM_CTL(sc, IPW_EEPROM_S | IPW_EEPROM_D | IPW_EEPROM_C);
863 IPW_EEPROM_CTL(sc, IPW_EEPROM_S);
864 IPW_EEPROM_CTL(sc, IPW_EEPROM_S | IPW_EEPROM_C);
866 /* write address A7-A0 */
867 for (n = 7; n >= 0; n--) {
868 IPW_EEPROM_CTL(sc, IPW_EEPROM_S |
869 (((addr >> n) & 1) << IPW_EEPROM_SHIFT_D));
870 IPW_EEPROM_CTL(sc, IPW_EEPROM_S |
871 (((addr >> n) & 1) << IPW_EEPROM_SHIFT_D) | IPW_EEPROM_C);
874 IPW_EEPROM_CTL(sc, IPW_EEPROM_S);
876 /* read data Q15-Q0 */
878 for (n = 15; n >= 0; n--) {
879 IPW_EEPROM_CTL(sc, IPW_EEPROM_S | IPW_EEPROM_C);
880 IPW_EEPROM_CTL(sc, IPW_EEPROM_S);
881 tmp = MEM_READ_4(sc, IPW_MEM_EEPROM_CTL);
882 val |= ((tmp & IPW_EEPROM_Q) >> IPW_EEPROM_SHIFT_Q) << n;
885 IPW_EEPROM_CTL(sc, 0);
887 /* clear Chip Select and clock C */
888 IPW_EEPROM_CTL(sc, IPW_EEPROM_S);
889 IPW_EEPROM_CTL(sc, 0);
890 IPW_EEPROM_CTL(sc, IPW_EEPROM_C);
896 ipw_command_intr(struct ipw_softc *sc, struct ipw_soft_buf *sbuf)
900 bus_dmamap_sync(sc->rxbuf_dmat, sbuf->map, BUS_DMASYNC_POSTREAD);
902 cmd = mtod(sbuf->m, struct ipw_cmd *);
904 DPRINTFN(2, ("cmd ack'ed (%u, %u, %u, %u, %u)\n", le32toh(cmd->type),
905 le32toh(cmd->subtype), le32toh(cmd->seq), le32toh(cmd->len),
906 le32toh(cmd->status)));
912 ipw_newstate_intr(struct ipw_softc *sc, struct ipw_soft_buf *sbuf)
914 struct ieee80211com *ic = &sc->sc_ic;
917 bus_dmamap_sync(sc->rxbuf_dmat, sbuf->map, BUS_DMASYNC_POSTREAD);
919 state = le32toh(*mtod(sbuf->m, uint32_t *));
921 DPRINTFN(2, ("entering state %u\n", state));
924 case IPW_STATE_ASSOCIATED:
925 ieee80211_new_state(ic, IEEE80211_S_RUN, -1);
928 case IPW_STATE_SCANNING:
929 /* don't leave run state on background scan */
930 if (ic->ic_state != IEEE80211_S_RUN)
931 ieee80211_new_state(ic, IEEE80211_S_SCAN, -1);
933 ic->ic_flags |= IEEE80211_F_SCAN;
936 case IPW_STATE_SCAN_COMPLETE:
937 ieee80211_notify_scan_done(ic);
938 ic->ic_flags &= ~IEEE80211_F_SCAN;
941 case IPW_STATE_ASSOCIATION_LOST:
942 ieee80211_new_state(ic, IEEE80211_S_INIT, -1);
945 case IPW_STATE_RADIO_DISABLED:
946 ic->ic_ifp->if_flags &= ~IFF_UP;
953 * XXX: Hack to set the current channel to the value advertised in beacons or
954 * probe responses. Only used during AP detection.
957 ipw_fix_channel(struct ieee80211com *ic, struct mbuf *m)
959 struct ieee80211_frame *wh;
963 wh = mtod(m, struct ieee80211_frame *);
965 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) != IEEE80211_FC0_TYPE_MGT)
968 subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
970 if (subtype != IEEE80211_FC0_SUBTYPE_BEACON &&
971 subtype != IEEE80211_FC0_SUBTYPE_PROBE_RESP)
974 frm = (uint8_t *)(wh + 1);
975 efrm = mtod(m, uint8_t *) + m->m_len;
977 frm += 12; /* skip tstamp, bintval and capinfo fields */
979 if (*frm == IEEE80211_ELEMID_DSPARMS)
980 #if IEEE80211_CHAN_MAX < 255
981 if (frm[2] <= IEEE80211_CHAN_MAX)
983 ic->ic_curchan = &ic->ic_channels[frm[2]];
990 ipw_data_intr(struct ipw_softc *sc, struct ipw_status *status,
991 struct ipw_soft_bd *sbd, struct ipw_soft_buf *sbuf)
993 struct ieee80211com *ic = &sc->sc_ic;
994 struct ifnet *ifp = ic->ic_ifp;
995 struct mbuf *mnew, *m;
996 struct ieee80211_frame *wh;
997 struct ieee80211_node *ni;
1001 DPRINTFN(5, ("received frame len=%u, rssi=%u\n", le32toh(status->len),
1004 if (le32toh(status->len) < sizeof (struct ieee80211_frame_min) ||
1005 le32toh(status->len) > MCLBYTES)
1009 * Try to allocate a new mbuf for this ring element and load it before
1010 * processing the current mbuf. If the ring element cannot be loaded,
1011 * drop the received packet and reuse the old mbuf. In the unlikely
1012 * case that the old mbuf can't be reloaded either, explicitly panic.
1014 mnew = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR);
1020 bus_dmamap_sync(sc->rxbuf_dmat, sbuf->map, BUS_DMASYNC_POSTREAD);
1021 bus_dmamap_unload(sc->rxbuf_dmat, sbuf->map);
1023 error = bus_dmamap_load(sc->rxbuf_dmat, sbuf->map, mtod(mnew, void *),
1024 MCLBYTES, ipw_dma_map_addr, &physaddr, 0);
1028 /* try to reload the old mbuf */
1029 error = bus_dmamap_load(sc->rxbuf_dmat, sbuf->map,
1030 mtod(sbuf->m, void *), MCLBYTES, ipw_dma_map_addr,
1033 /* very unlikely that it will fail... */
1034 panic("%s: could not load old rx mbuf",
1035 device_get_name(sc->sc_dev));
1042 * New mbuf successfully loaded, update Rx ring and continue
1047 sbd->bd->physaddr = htole32(physaddr);
1050 m->m_pkthdr.rcvif = ifp;
1051 m->m_pkthdr.len = m->m_len = le32toh(status->len);
1053 if (bpf_peers_present(sc->sc_drvbpf)) {
1054 struct ipw_rx_radiotap_header *tap = &sc->sc_rxtap;
1057 tap->wr_antsignal = status->rssi;
1058 tap->wr_chan_freq = htole16(ic->ic_curchan->ic_freq);
1059 tap->wr_chan_flags = htole16(ic->ic_curchan->ic_flags);
1061 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_rxtap_len, m);
1064 if (ic->ic_state == IEEE80211_S_SCAN)
1065 ipw_fix_channel(ic, m);
1067 wh = mtod(m, struct ieee80211_frame *);
1068 mtx_unlock(&sc->sc_mtx);
1069 ni = ieee80211_find_rxnode(ic, (struct ieee80211_frame_min *)wh);
1071 /* send the frame to the 802.11 layer */
1072 ieee80211_input(ic, m, ni, status->rssi, 0);
1074 /* node is no longer needed */
1075 ieee80211_free_node(ni);
1076 mtx_lock(&sc->sc_mtx);
1078 bus_dmamap_sync(sc->rbd_dmat, sc->rbd_map, BUS_DMASYNC_PREWRITE);
1082 ipw_rx_intr(struct ipw_softc *sc)
1084 struct ipw_status *status;
1085 struct ipw_soft_bd *sbd;
1086 struct ipw_soft_buf *sbuf;
1089 if (!(sc->flags & IPW_FLAG_FW_INITED))
1092 r = CSR_READ_4(sc, IPW_CSR_RX_READ);
1094 bus_dmamap_sync(sc->status_dmat, sc->status_map, BUS_DMASYNC_POSTREAD);
1096 for (i = (sc->rxcur + 1) % IPW_NRBD; i != r; i = (i + 1) % IPW_NRBD) {
1097 status = &sc->status_list[i];
1098 sbd = &sc->srbd_list[i];
1101 switch (le16toh(status->code) & 0xf) {
1102 case IPW_STATUS_CODE_COMMAND:
1103 ipw_command_intr(sc, sbuf);
1106 case IPW_STATUS_CODE_NEWSTATE:
1107 ipw_newstate_intr(sc, sbuf);
1110 case IPW_STATUS_CODE_DATA_802_3:
1111 case IPW_STATUS_CODE_DATA_802_11:
1112 ipw_data_intr(sc, status, sbd, sbuf);
1115 case IPW_STATUS_CODE_NOTIFICATION:
1116 DPRINTFN(2, ("received notification\n"));
1120 device_printf(sc->sc_dev, "unknown status code %u\n",
1121 le16toh(status->code));
1124 /* firmware was killed, stop processing received frames */
1125 if (!(sc->flags & IPW_FLAG_FW_INITED))
1131 bus_dmamap_sync(sc->rbd_dmat, sc->rbd_map, BUS_DMASYNC_PREWRITE);
1133 /* kick the firmware */
1134 sc->rxcur = (r == 0) ? IPW_NRBD - 1 : r - 1;
1135 CSR_WRITE_4(sc, IPW_CSR_RX_WRITE, sc->rxcur);
1139 ipw_release_sbd(struct ipw_softc *sc, struct ipw_soft_bd *sbd)
1141 struct ipw_soft_hdr *shdr;
1142 struct ipw_soft_buf *sbuf;
1144 switch (sbd->type) {
1145 case IPW_SBD_TYPE_COMMAND:
1146 bus_dmamap_sync(sc->cmd_dmat, sc->cmd_map,
1147 BUS_DMASYNC_POSTWRITE);
1148 bus_dmamap_unload(sc->cmd_dmat, sc->cmd_map);
1151 case IPW_SBD_TYPE_HEADER:
1153 bus_dmamap_sync(sc->hdr_dmat, shdr->map, BUS_DMASYNC_POSTWRITE);
1154 bus_dmamap_unload(sc->hdr_dmat, shdr->map);
1155 SLIST_INSERT_HEAD(&sc->free_shdr, shdr, next);
1158 case IPW_SBD_TYPE_DATA:
1160 bus_dmamap_sync(sc->txbuf_dmat, sbuf->map,
1161 BUS_DMASYNC_POSTWRITE);
1162 bus_dmamap_unload(sc->txbuf_dmat, sbuf->map);
1163 SLIST_INSERT_HEAD(&sc->free_sbuf, sbuf, next);
1166 ieee80211_free_node(sbuf->ni);
1168 sc->sc_tx_timer = 0;
1172 sbd->type = IPW_SBD_TYPE_NOASSOC;
1176 ipw_tx_intr(struct ipw_softc *sc)
1178 struct ifnet *ifp = sc->sc_ic.ic_ifp;
1179 struct ipw_soft_bd *sbd;
1182 if (!(sc->flags & IPW_FLAG_FW_INITED))
1185 r = CSR_READ_4(sc, IPW_CSR_TX_READ);
1187 for (i = (sc->txold + 1) % IPW_NTBD; i != r; i = (i + 1) % IPW_NTBD) {
1188 sbd = &sc->stbd_list[i];
1190 if (sbd->type == IPW_SBD_TYPE_DATA)
1193 ipw_release_sbd(sc, sbd);
1197 /* remember what the firmware has processed */
1198 sc->txold = (r == 0) ? IPW_NTBD - 1 : r - 1;
1200 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
1207 struct ipw_softc *sc = arg;
1210 mtx_lock(&sc->sc_mtx);
1212 if ((r = CSR_READ_4(sc, IPW_CSR_INTR)) == 0 || r == 0xffffffff) {
1213 mtx_unlock(&sc->sc_mtx);
1217 /* disable interrupts */
1218 CSR_WRITE_4(sc, IPW_CSR_INTR_MASK, 0);
1220 /* acknowledge all interrupts */
1221 CSR_WRITE_4(sc, IPW_CSR_INTR, r);
1223 if (r & (IPW_INTR_FATAL_ERROR | IPW_INTR_PARITY_ERROR)) {
1224 device_printf(sc->sc_dev, "firmware error\n");
1225 taskqueue_enqueue_fast(taskqueue_fast, &sc->sc_init_task);
1226 r = 0; /* don't process more interrupts */
1229 if (r & IPW_INTR_FW_INIT_DONE)
1232 if (r & IPW_INTR_RX_TRANSFER)
1235 if (r & IPW_INTR_TX_TRANSFER)
1238 /* re-enable interrupts */
1239 CSR_WRITE_4(sc, IPW_CSR_INTR_MASK, IPW_INTR_MASK);
1241 mtx_unlock(&sc->sc_mtx);
1245 ipw_dma_map_addr(void *arg, bus_dma_segment_t *segs, int nseg, int error)
1250 KASSERT(nseg == 1, ("too many DMA segments, %d should be 1", nseg));
1252 *(bus_addr_t *)arg = segs[0].ds_addr;
1256 * Send a command to the firmware and wait for the acknowledgement.
1259 ipw_cmd(struct ipw_softc *sc, uint32_t type, void *data, uint32_t len)
1261 struct ipw_soft_bd *sbd;
1262 bus_addr_t physaddr;
1265 sbd = &sc->stbd_list[sc->txcur];
1267 error = bus_dmamap_load(sc->cmd_dmat, sc->cmd_map, &sc->cmd,
1268 sizeof (struct ipw_cmd), ipw_dma_map_addr, &physaddr, 0);
1270 device_printf(sc->sc_dev, "could not map command DMA memory\n");
1274 sc->cmd.type = htole32(type);
1275 sc->cmd.subtype = 0;
1276 sc->cmd.len = htole32(len);
1278 memcpy(sc->cmd.data, data, len);
1280 sbd->type = IPW_SBD_TYPE_COMMAND;
1281 sbd->bd->physaddr = htole32(physaddr);
1282 sbd->bd->len = htole32(sizeof (struct ipw_cmd));
1284 sbd->bd->flags = IPW_BD_FLAG_TX_FRAME_COMMAND |
1285 IPW_BD_FLAG_TX_LAST_FRAGMENT;
1287 bus_dmamap_sync(sc->cmd_dmat, sc->cmd_map, BUS_DMASYNC_PREWRITE);
1288 bus_dmamap_sync(sc->tbd_dmat, sc->tbd_map, BUS_DMASYNC_PREWRITE);
1290 DPRINTFN(2, ("sending command (%u, %u, %u, %u)\n", type, 0, 0, len));
1294 sc->txcur = (sc->txcur + 1) % IPW_NTBD;
1295 CSR_WRITE_4(sc, IPW_CSR_TX_WRITE, sc->txcur);
1297 /* wait at most one second for command to complete */
1298 return msleep(sc, &sc->sc_mtx, 0, "ipwcmd", hz);
1302 ipw_tx_start(struct ifnet *ifp, struct mbuf *m0, struct ieee80211_node *ni)
1304 struct ipw_softc *sc = ifp->if_softc;
1305 struct ieee80211com *ic = &sc->sc_ic;
1306 struct ieee80211_frame *wh;
1307 struct ipw_soft_bd *sbd;
1308 struct ipw_soft_hdr *shdr;
1309 struct ipw_soft_buf *sbuf;
1310 struct ieee80211_key *k;
1312 bus_dma_segment_t segs[IPW_MAX_NSEG];
1313 bus_addr_t physaddr;
1314 int nsegs, error, i;
1316 wh = mtod(m0, struct ieee80211_frame *);
1318 if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
1319 k = ieee80211_crypto_encap(ic, ni, m0);
1325 /* packet header may have moved, reset our local pointer */
1326 wh = mtod(m0, struct ieee80211_frame *);
1329 if (bpf_peers_present(sc->sc_drvbpf)) {
1330 struct ipw_tx_radiotap_header *tap = &sc->sc_txtap;
1333 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq);
1334 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags);
1336 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0);
1339 shdr = SLIST_FIRST(&sc->free_shdr);
1340 sbuf = SLIST_FIRST(&sc->free_sbuf);
1341 KASSERT(shdr != NULL && sbuf != NULL, ("empty sw hdr/buf pool"));
1343 shdr->hdr.type = htole32(IPW_HDR_TYPE_SEND);
1344 shdr->hdr.subtype = 0;
1345 shdr->hdr.encrypted = (wh->i_fc[1] & IEEE80211_FC1_WEP) ? 1 : 0;
1346 shdr->hdr.encrypt = 0;
1347 shdr->hdr.keyidx = 0;
1348 shdr->hdr.keysz = 0;
1349 shdr->hdr.fragmentsz = 0;
1350 IEEE80211_ADDR_COPY(shdr->hdr.src_addr, wh->i_addr2);
1351 if (ic->ic_opmode == IEEE80211_M_STA)
1352 IEEE80211_ADDR_COPY(shdr->hdr.dst_addr, wh->i_addr3);
1354 IEEE80211_ADDR_COPY(shdr->hdr.dst_addr, wh->i_addr1);
1356 /* trim IEEE802.11 header */
1357 m_adj(m0, sizeof (struct ieee80211_frame));
1359 error = bus_dmamap_load_mbuf_sg(sc->txbuf_dmat, sbuf->map, m0, segs,
1361 if (error != 0 && error != EFBIG) {
1362 device_printf(sc->sc_dev, "could not map mbuf (error %d)\n",
1368 mnew = m_defrag(m0, M_DONTWAIT);
1370 device_printf(sc->sc_dev,
1371 "could not defragment mbuf\n");
1377 error = bus_dmamap_load_mbuf_sg(sc->txbuf_dmat, sbuf->map, m0,
1380 device_printf(sc->sc_dev,
1381 "could not map mbuf (error %d)\n", error);
1387 error = bus_dmamap_load(sc->hdr_dmat, shdr->map, &shdr->hdr,
1388 sizeof (struct ipw_hdr), ipw_dma_map_addr, &physaddr, 0);
1390 device_printf(sc->sc_dev, "could not map header DMA memory\n");
1391 bus_dmamap_unload(sc->txbuf_dmat, sbuf->map);
1396 SLIST_REMOVE_HEAD(&sc->free_sbuf, next);
1397 SLIST_REMOVE_HEAD(&sc->free_shdr, next);
1399 sbd = &sc->stbd_list[sc->txcur];
1400 sbd->type = IPW_SBD_TYPE_HEADER;
1402 sbd->bd->physaddr = htole32(physaddr);
1403 sbd->bd->len = htole32(sizeof (struct ipw_hdr));
1404 sbd->bd->nfrag = 1 + nsegs;
1405 sbd->bd->flags = IPW_BD_FLAG_TX_FRAME_802_3 |
1406 IPW_BD_FLAG_TX_NOT_LAST_FRAGMENT;
1408 DPRINTFN(5, ("sending tx hdr (%u, %u, %u, %u, %6D, %6D)\n",
1409 shdr->hdr.type, shdr->hdr.subtype, shdr->hdr.encrypted,
1410 shdr->hdr.encrypt, shdr->hdr.src_addr, ":", shdr->hdr.dst_addr,
1414 sc->txcur = (sc->txcur + 1) % IPW_NTBD;
1419 for (i = 0; i < nsegs; i++) {
1420 sbd = &sc->stbd_list[sc->txcur];
1422 sbd->bd->physaddr = htole32(segs[i].ds_addr);
1423 sbd->bd->len = htole32(segs[i].ds_len);
1425 sbd->bd->flags = IPW_BD_FLAG_TX_FRAME_802_3;
1426 if (i == nsegs - 1) {
1427 sbd->type = IPW_SBD_TYPE_DATA;
1429 sbd->bd->flags |= IPW_BD_FLAG_TX_LAST_FRAGMENT;
1431 sbd->type = IPW_SBD_TYPE_NOASSOC;
1432 sbd->bd->flags |= IPW_BD_FLAG_TX_NOT_LAST_FRAGMENT;
1435 DPRINTFN(5, ("sending fragment (%d, %d)\n", i, segs[i].ds_len));
1438 sc->txcur = (sc->txcur + 1) % IPW_NTBD;
1441 bus_dmamap_sync(sc->hdr_dmat, shdr->map, BUS_DMASYNC_PREWRITE);
1442 bus_dmamap_sync(sc->txbuf_dmat, sbuf->map, BUS_DMASYNC_PREWRITE);
1443 bus_dmamap_sync(sc->tbd_dmat, sc->tbd_map, BUS_DMASYNC_PREWRITE);
1446 CSR_WRITE_4(sc, IPW_CSR_TX_WRITE, sc->txcur);
1452 ipw_start(struct ifnet *ifp)
1454 struct ipw_softc *sc = ifp->if_softc;
1455 struct ieee80211com *ic = &sc->sc_ic;
1457 struct ether_header *eh;
1458 struct ieee80211_node *ni;
1460 mtx_lock(&sc->sc_mtx);
1462 if (ic->ic_state != IEEE80211_S_RUN) {
1463 mtx_unlock(&sc->sc_mtx);
1468 IFQ_DRV_DEQUEUE(&ifp->if_snd, m0);
1472 if (sc->txfree < 1 + IPW_MAX_NSEG) {
1473 IFQ_DRV_PREPEND(&ifp->if_snd, m0);
1474 ifp->if_drv_flags |= IFF_DRV_OACTIVE;
1478 if (m0->m_len < sizeof (struct ether_header) &&
1479 (m0 = m_pullup(m0, sizeof (struct ether_header))) == NULL)
1482 eh = mtod(m0, struct ether_header *);
1483 ni = ieee80211_find_txnode(ic, eh->ether_dhost);
1490 m0 = ieee80211_encap(ic, m0, ni);
1492 ieee80211_free_node(ni);
1496 if (bpf_peers_present(ic->ic_rawbpf))
1497 bpf_mtap(ic->ic_rawbpf, m0);
1499 if (ipw_tx_start(ifp, m0, ni) != 0) {
1500 ieee80211_free_node(ni);
1505 /* start watchdog timer */
1506 sc->sc_tx_timer = 5;
1510 mtx_unlock(&sc->sc_mtx);
1514 ipw_watchdog(struct ifnet *ifp)
1516 struct ipw_softc *sc = ifp->if_softc;
1517 struct ieee80211com *ic = &sc->sc_ic;
1519 mtx_lock(&sc->sc_mtx);
1523 if (sc->sc_tx_timer > 0) {
1524 if (--sc->sc_tx_timer == 0) {
1525 if_printf(ifp, "device timeout\n");
1527 taskqueue_enqueue_fast(taskqueue_fast,
1529 mtx_unlock(&sc->sc_mtx);
1535 ieee80211_watchdog(ic);
1537 mtx_unlock(&sc->sc_mtx);
1541 ipw_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
1543 struct ipw_softc *sc = ifp->if_softc;
1544 struct ieee80211com *ic = &sc->sc_ic;
1547 mtx_lock(&sc->sc_mtx);
1551 if (ifp->if_flags & IFF_UP) {
1552 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING))
1555 if (ifp->if_drv_flags & IFF_DRV_RUNNING)
1561 error = ieee80211_ioctl(ic, cmd, data);
1564 if (error == ENETRESET) {
1565 if ((ifp->if_flags & IFF_UP) &&
1566 (ifp->if_drv_flags & IFF_DRV_RUNNING))
1571 mtx_unlock(&sc->sc_mtx);
1577 ipw_stop_master(struct ipw_softc *sc)
1582 /* disable interrupts */
1583 CSR_WRITE_4(sc, IPW_CSR_INTR_MASK, 0);
1585 CSR_WRITE_4(sc, IPW_CSR_RST, IPW_RST_STOP_MASTER);
1586 for (ntries = 0; ntries < 50; ntries++) {
1587 if (CSR_READ_4(sc, IPW_CSR_RST) & IPW_RST_MASTER_DISABLED)
1592 device_printf(sc->sc_dev, "timeout waiting for master\n");
1594 tmp = CSR_READ_4(sc, IPW_CSR_RST);
1595 CSR_WRITE_4(sc, IPW_CSR_RST, tmp | IPW_RST_PRINCETON_RESET);
1597 sc->flags &= ~IPW_FLAG_FW_INITED;
1601 ipw_reset(struct ipw_softc *sc)
1606 ipw_stop_master(sc);
1608 /* move adapter to D0 state */
1609 tmp = CSR_READ_4(sc, IPW_CSR_CTL);
1610 CSR_WRITE_4(sc, IPW_CSR_CTL, tmp | IPW_CTL_INIT);
1612 /* wait for clock stabilization */
1613 for (ntries = 0; ntries < 1000; ntries++) {
1614 if (CSR_READ_4(sc, IPW_CSR_CTL) & IPW_CTL_CLOCK_READY)
1621 tmp = CSR_READ_4(sc, IPW_CSR_RST);
1622 CSR_WRITE_4(sc, IPW_CSR_RST, tmp | IPW_RST_SW_RESET);
1626 tmp = CSR_READ_4(sc, IPW_CSR_CTL);
1627 CSR_WRITE_4(sc, IPW_CSR_CTL, tmp | IPW_CTL_INIT);
1633 * Upload the microcode to the device.
1636 ipw_load_ucode(struct ipw_softc *sc, const char *uc, int size)
1640 MEM_WRITE_4(sc, 0x3000e0, 0x80000000);
1641 CSR_WRITE_4(sc, IPW_CSR_RST, 0);
1643 MEM_WRITE_2(sc, 0x220000, 0x0703);
1644 MEM_WRITE_2(sc, 0x220000, 0x0707);
1646 MEM_WRITE_1(sc, 0x210014, 0x72);
1647 MEM_WRITE_1(sc, 0x210014, 0x72);
1649 MEM_WRITE_1(sc, 0x210000, 0x40);
1650 MEM_WRITE_1(sc, 0x210000, 0x00);
1651 MEM_WRITE_1(sc, 0x210000, 0x40);
1653 MEM_WRITE_MULTI_1(sc, 0x210010, uc, size);
1655 MEM_WRITE_1(sc, 0x210000, 0x00);
1656 MEM_WRITE_1(sc, 0x210000, 0x00);
1657 MEM_WRITE_1(sc, 0x210000, 0x80);
1659 MEM_WRITE_2(sc, 0x220000, 0x0703);
1660 MEM_WRITE_2(sc, 0x220000, 0x0707);
1662 MEM_WRITE_1(sc, 0x210014, 0x72);
1663 MEM_WRITE_1(sc, 0x210014, 0x72);
1665 MEM_WRITE_1(sc, 0x210000, 0x00);
1666 MEM_WRITE_1(sc, 0x210000, 0x80);
1668 for (ntries = 0; ntries < 10; ntries++) {
1669 if (MEM_READ_1(sc, 0x210000) & 1)
1674 device_printf(sc->sc_dev,
1675 "timeout waiting for ucode to initialize\n");
1679 MEM_WRITE_4(sc, 0x3000e0, 0);
1684 /* set of macros to handle unaligned little endian data in firmware image */
1685 #define GETLE32(p) ((p)[0] | (p)[1] << 8 | (p)[2] << 16 | (p)[3] << 24)
1686 #define GETLE16(p) ((p)[0] | (p)[1] << 8)
1688 ipw_load_firmware(struct ipw_softc *sc, const char *fw, int size)
1690 const uint8_t *p, *end;
1698 dst = GETLE32(p); p += 4;
1699 len = GETLE16(p); p += 2;
1701 ipw_write_mem_1(sc, dst, p, len);
1705 CSR_WRITE_4(sc, IPW_CSR_IO, IPW_IO_GPIO1_ENABLE | IPW_IO_GPIO3_MASK |
1708 /* enable interrupts */
1709 CSR_WRITE_4(sc, IPW_CSR_INTR_MASK, IPW_INTR_MASK);
1711 /* kick the firmware */
1712 CSR_WRITE_4(sc, IPW_CSR_RST, 0);
1714 tmp = CSR_READ_4(sc, IPW_CSR_CTL);
1715 CSR_WRITE_4(sc, IPW_CSR_CTL, tmp | IPW_CTL_ALLOW_STANDBY);
1717 /* wait at most one second for firmware initialization to complete */
1718 if ((error = msleep(sc, &sc->sc_mtx, 0, "ipwinit", hz)) != 0) {
1719 device_printf(sc->sc_dev, "timeout waiting for firmware "
1720 "initialization to complete\n");
1724 tmp = CSR_READ_4(sc, IPW_CSR_IO);
1725 CSR_WRITE_4(sc, IPW_CSR_IO, tmp | IPW_IO_GPIO1_MASK |
1732 ipw_config(struct ipw_softc *sc)
1734 struct ieee80211com *ic = &sc->sc_ic;
1735 struct ifnet *ifp = ic->ic_ifp;
1736 struct ipw_security security;
1737 struct ieee80211_key *k;
1738 struct ipw_wep_key wepkey;
1739 struct ipw_scan_options options;
1740 struct ipw_configuration config;
1744 switch (ic->ic_opmode) {
1745 case IEEE80211_M_STA:
1746 case IEEE80211_M_HOSTAP:
1747 data = htole32(IPW_MODE_BSS);
1749 case IEEE80211_M_IBSS:
1750 case IEEE80211_M_AHDEMO:
1751 data = htole32(IPW_MODE_IBSS);
1753 case IEEE80211_M_MONITOR:
1754 data = htole32(IPW_MODE_MONITOR);
1757 DPRINTF(("Setting mode to %u\n", le32toh(data)));
1758 error = ipw_cmd(sc, IPW_CMD_SET_MODE, &data, sizeof data);
1762 if (ic->ic_opmode == IEEE80211_M_IBSS ||
1763 ic->ic_opmode == IEEE80211_M_MONITOR) {
1764 data = htole32(ieee80211_chan2ieee(ic, ic->ic_curchan));
1765 DPRINTF(("Setting channel to %u\n", le32toh(data)));
1766 error = ipw_cmd(sc, IPW_CMD_SET_CHANNEL, &data, sizeof data);
1771 if (ic->ic_opmode == IEEE80211_M_MONITOR) {
1772 DPRINTF(("Enabling adapter\n"));
1773 return ipw_cmd(sc, IPW_CMD_ENABLE, NULL, 0);
1776 IEEE80211_ADDR_COPY(ic->ic_myaddr, IF_LLADDR(ifp));
1777 DPRINTF(("Setting MAC address to %6D\n", ic->ic_myaddr, ":"));
1778 error = ipw_cmd(sc, IPW_CMD_SET_MAC_ADDRESS, ic->ic_myaddr,
1779 IEEE80211_ADDR_LEN);
1783 config.flags = htole32(IPW_CFG_BSS_MASK | IPW_CFG_IBSS_MASK |
1784 IPW_CFG_PREAMBLE_AUTO | IPW_CFG_802_1x_ENABLE);
1785 if (ic->ic_opmode == IEEE80211_M_IBSS)
1786 config.flags |= htole32(IPW_CFG_IBSS_AUTO_START);
1787 if (ifp->if_flags & IFF_PROMISC)
1788 config.flags |= htole32(IPW_CFG_PROMISCUOUS);
1789 config.bss_chan = htole32(0x3fff); /* channels 1-14 */
1790 config.ibss_chan = htole32(0x7ff); /* channels 1-11 */
1791 DPRINTF(("Setting configuration to 0x%x\n", le32toh(config.flags)));
1792 error = ipw_cmd(sc, IPW_CMD_SET_CONFIGURATION, &config, sizeof config);
1796 data = htole32(0x3); /* 1, 2 */
1797 DPRINTF(("Setting basic tx rates to 0x%x\n", le32toh(data)));
1798 error = ipw_cmd(sc, IPW_CMD_SET_BASIC_TX_RATES, &data, sizeof data);
1802 data = htole32(0xf); /* 1, 2, 5.5, 11 */
1803 DPRINTF(("Setting tx rates to 0x%x\n", le32toh(data)));
1804 error = ipw_cmd(sc, IPW_CMD_SET_TX_RATES, &data, sizeof data);
1808 data = htole32(IPW_POWER_MODE_CAM);
1809 DPRINTF(("Setting power mode to %u\n", le32toh(data)));
1810 error = ipw_cmd(sc, IPW_CMD_SET_POWER_MODE, &data, sizeof data);
1814 if (ic->ic_opmode == IEEE80211_M_IBSS) {
1815 data = htole32(32); /* default value */
1816 DPRINTF(("Setting tx power index to %u\n", le32toh(data)));
1817 error = ipw_cmd(sc, IPW_CMD_SET_TX_POWER_INDEX, &data,
1823 data = htole32(ic->ic_rtsthreshold);
1824 DPRINTF(("Setting RTS threshold to %u\n", le32toh(data)));
1825 error = ipw_cmd(sc, IPW_CMD_SET_RTS_THRESHOLD, &data, sizeof data);
1829 data = htole32(ic->ic_fragthreshold);
1830 DPRINTF(("Setting frag threshold to %u\n", le32toh(data)));
1831 error = ipw_cmd(sc, IPW_CMD_SET_FRAG_THRESHOLD, &data, sizeof data);
1836 if (ipw_debug > 0) {
1837 printf("Setting ESSID to ");
1838 ieee80211_print_essid(ic->ic_des_essid, ic->ic_des_esslen);
1842 error = ipw_cmd(sc, IPW_CMD_SET_ESSID, ic->ic_des_essid,
1847 /* no mandatory BSSID */
1848 DPRINTF(("Setting mandatory BSSID to null\n"));
1849 error = ipw_cmd(sc, IPW_CMD_SET_MANDATORY_BSSID, NULL, 0);
1853 if (ic->ic_flags & IEEE80211_F_DESBSSID) {
1854 DPRINTF(("Setting desired BSSID to %6D\n", ic->ic_des_bssid,
1856 error = ipw_cmd(sc, IPW_CMD_SET_DESIRED_BSSID,
1857 ic->ic_des_bssid, IEEE80211_ADDR_LEN);
1862 memset(&security, 0, sizeof security);
1863 security.authmode = (ic->ic_bss->ni_authmode == IEEE80211_AUTH_SHARED) ?
1864 IPW_AUTH_SHARED : IPW_AUTH_OPEN;
1865 security.ciphers = htole32(IPW_CIPHER_NONE);
1866 DPRINTF(("Setting authmode to %u\n", security.authmode));
1867 error = ipw_cmd(sc, IPW_CMD_SET_SECURITY_INFORMATION, &security,
1872 if (ic->ic_flags & IEEE80211_F_PRIVACY) {
1873 k = ic->ic_crypto.cs_nw_keys;
1874 for (i = 0; i < IEEE80211_WEP_NKID; i++, k++) {
1875 if (k->wk_keylen == 0)
1879 wepkey.len = k->wk_keylen;
1880 memset(wepkey.key, 0, sizeof wepkey.key);
1881 memcpy(wepkey.key, k->wk_key, k->wk_keylen);
1882 DPRINTF(("Setting wep key index %u len %u\n",
1883 wepkey.idx, wepkey.len));
1884 error = ipw_cmd(sc, IPW_CMD_SET_WEP_KEY, &wepkey,
1890 data = htole32(ic->ic_crypto.cs_def_txkey);
1891 DPRINTF(("Setting wep tx key index to %u\n", le32toh(data)));
1892 error = ipw_cmd(sc, IPW_CMD_SET_WEP_KEY_INDEX, &data,
1898 data = htole32((ic->ic_flags & IEEE80211_F_PRIVACY) ? IPW_WEPON : 0);
1899 DPRINTF(("Setting wep flags to 0x%x\n", le32toh(data)));
1900 error = ipw_cmd(sc, IPW_CMD_SET_WEP_FLAGS, &data, sizeof data);
1905 struct ipw_wpa_ie ie;
1907 memset(&ie, 0, sizeof ie);
1908 ie.len = htole32(sizeof (struct ieee80211_ie_wpa));
1909 DPRINTF(("Setting wpa ie\n"));
1910 error = ipw_cmd(sc, IPW_CMD_SET_WPA_IE, &ie, sizeof ie);
1915 if (ic->ic_opmode == IEEE80211_M_IBSS) {
1916 data = htole32(ic->ic_bintval);
1917 DPRINTF(("Setting beacon interval to %u\n", le32toh(data)));
1918 error = ipw_cmd(sc, IPW_CMD_SET_BEACON_INTERVAL, &data,
1925 options.channels = htole32(0x3fff); /* scan channels 1-14 */
1926 DPRINTF(("Setting scan options to 0x%x\n", le32toh(options.flags)));
1927 error = ipw_cmd(sc, IPW_CMD_SET_SCAN_OPTIONS, &options, sizeof options);
1931 /* finally, enable adapter (start scanning for an access point) */
1932 DPRINTF(("Enabling adapter\n"));
1933 return ipw_cmd(sc, IPW_CMD_ENABLE, NULL, 0);
1937 * Handler for sc_init_task. This is a simple wrapper around ipw_init().
1938 * It is called on firmware panics or on watchdog timeouts.
1941 ipw_init_task(void *context, int pending)
1947 ipw_init(void *priv)
1949 struct ipw_softc *sc = priv;
1950 struct ieee80211com *ic = &sc->sc_ic;
1951 struct ifnet *ifp = ic->ic_ifp;
1952 const struct firmware *fp;
1953 const struct ipw_firmware_hdr *hdr;
1954 const char *imagename, *fw;
1958 * ipw_init() is exposed through ifp->if_init so it might be called
1959 * without the driver's lock held. Since msleep() doesn't like being
1960 * called on a recursed mutex, we acquire the driver's lock only if
1961 * we're not already holding it.
1963 if (!(owned = mtx_owned(&sc->sc_mtx)))
1964 mtx_lock(&sc->sc_mtx);
1967 * Avoid re-entrant calls. We need to release the mutex in ipw_init()
1968 * when loading the firmware and we don't want to be called during this
1971 if (sc->flags & IPW_FLAG_INIT_LOCKED) {
1973 mtx_unlock(&sc->sc_mtx);
1976 sc->flags |= IPW_FLAG_INIT_LOCKED;
1980 if (ipw_reset(sc) != 0) {
1981 device_printf(sc->sc_dev, "could not reset adapter\n");
1985 switch (ic->ic_opmode) {
1986 case IEEE80211_M_STA:
1987 imagename = "ipw_bss";
1989 case IEEE80211_M_IBSS:
1990 imagename = "ipw_ibss";
1992 case IEEE80211_M_MONITOR:
1993 imagename = "ipw_monitor";
1996 imagename = NULL; /* should not get there */
2000 * Load firmware image using the firmware(9) subsystem. We need to
2001 * release the driver's lock first.
2003 if (sc->sc_firmware == NULL || strcmp(sc->sc_firmware->name,
2005 mtx_unlock(&sc->sc_mtx);
2006 if (sc->sc_firmware != NULL)
2007 firmware_put(sc->sc_firmware, FIRMWARE_UNLOAD);
2008 sc->sc_firmware = firmware_get(imagename);
2009 mtx_lock(&sc->sc_mtx);
2012 if (sc->sc_firmware == NULL) {
2013 device_printf(sc->sc_dev,
2014 "could not load firmware image '%s'\n", imagename);
2018 fp = sc->sc_firmware;
2019 if (fp->datasize < sizeof *hdr) {
2020 device_printf(sc->sc_dev,
2021 "firmware image too short %zu\n", fp->datasize);
2025 hdr = (const struct ipw_firmware_hdr *)fp->data;
2027 if (fp->datasize < sizeof *hdr + le32toh(hdr->mainsz) +
2028 le32toh(hdr->ucodesz)) {
2029 device_printf(sc->sc_dev,
2030 "firmware image too short %zu\n", fp->datasize);
2034 fw = (const char *)fp->data + sizeof *hdr + le32toh(hdr->mainsz);
2035 if (ipw_load_ucode(sc, fw, le32toh(hdr->ucodesz)) != 0) {
2036 device_printf(sc->sc_dev, "could not load microcode\n");
2040 ipw_stop_master(sc);
2043 * Setup tx, rx and status rings.
2045 sc->txold = IPW_NTBD - 1;
2047 sc->txfree = IPW_NTBD - 2;
2048 sc->rxcur = IPW_NRBD - 1;
2050 CSR_WRITE_4(sc, IPW_CSR_TX_BASE, sc->tbd_phys);
2051 CSR_WRITE_4(sc, IPW_CSR_TX_SIZE, IPW_NTBD);
2052 CSR_WRITE_4(sc, IPW_CSR_TX_READ, 0);
2053 CSR_WRITE_4(sc, IPW_CSR_TX_WRITE, sc->txcur);
2055 CSR_WRITE_4(sc, IPW_CSR_RX_BASE, sc->rbd_phys);
2056 CSR_WRITE_4(sc, IPW_CSR_RX_SIZE, IPW_NRBD);
2057 CSR_WRITE_4(sc, IPW_CSR_RX_READ, 0);
2058 CSR_WRITE_4(sc, IPW_CSR_RX_WRITE, sc->rxcur);
2060 CSR_WRITE_4(sc, IPW_CSR_STATUS_BASE, sc->status_phys);
2062 fw = (const char *)fp->data + sizeof *hdr;
2063 if (ipw_load_firmware(sc, fw, le32toh(hdr->mainsz)) != 0) {
2064 device_printf(sc->sc_dev, "could not load firmware\n");
2068 sc->flags |= IPW_FLAG_FW_INITED;
2070 /* retrieve information tables base addresses */
2071 sc->table1_base = CSR_READ_4(sc, IPW_CSR_TABLE1_BASE);
2072 sc->table2_base = CSR_READ_4(sc, IPW_CSR_TABLE2_BASE);
2074 ipw_write_table1(sc, IPW_INFO_LOCK, 0);
2076 if (ipw_config(sc) != 0) {
2077 device_printf(sc->sc_dev, "device configuration failed\n");
2081 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
2082 ifp->if_drv_flags |= IFF_DRV_RUNNING;
2084 sc->flags &=~ IPW_FLAG_INIT_LOCKED;
2087 mtx_unlock(&sc->sc_mtx);
2091 fail2: firmware_put(fp, FIRMWARE_UNLOAD);
2092 sc->sc_firmware = NULL;
2093 fail1: ifp->if_flags &= ~IFF_UP;
2095 sc->flags &=~ IPW_FLAG_INIT_LOCKED;
2097 mtx_unlock(&sc->sc_mtx);
2101 ipw_stop(void *priv)
2103 struct ipw_softc *sc = priv;
2104 struct ieee80211com *ic = &sc->sc_ic;
2105 struct ifnet *ifp = ic->ic_ifp;
2108 mtx_lock(&sc->sc_mtx);
2110 ieee80211_new_state(ic, IEEE80211_S_INIT, -1);
2112 ipw_stop_master(sc);
2114 CSR_WRITE_4(sc, IPW_CSR_RST, IPW_RST_SW_RESET);
2117 * Release tx buffers.
2119 for (i = 0; i < IPW_NTBD; i++)
2120 ipw_release_sbd(sc, &sc->stbd_list[i]);
2122 sc->sc_tx_timer = 0;
2124 ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE);
2126 mtx_unlock(&sc->sc_mtx);
2130 ipw_sysctl_stats(SYSCTL_HANDLER_ARGS)
2132 struct ipw_softc *sc = arg1;
2133 uint32_t i, size, buf[256];
2135 if (!(sc->flags & IPW_FLAG_FW_INITED)) {
2136 memset(buf, 0, sizeof buf);
2137 return SYSCTL_OUT(req, buf, sizeof buf);
2140 CSR_WRITE_4(sc, IPW_CSR_AUTOINC_ADDR, sc->table1_base);
2142 size = min(CSR_READ_4(sc, IPW_CSR_AUTOINC_DATA), 256);
2143 for (i = 1; i < size; i++)
2144 buf[i] = MEM_READ_4(sc, CSR_READ_4(sc, IPW_CSR_AUTOINC_DATA));
2146 return SYSCTL_OUT(req, buf, sizeof buf);
2150 ipw_sysctl_radio(SYSCTL_HANDLER_ARGS)
2152 struct ipw_softc *sc = arg1;
2155 val = !((sc->flags & IPW_FLAG_HAS_RADIO_SWITCH) &&
2156 (CSR_READ_4(sc, IPW_CSR_IO) & IPW_IO_RADIO_DISABLED));
2158 return SYSCTL_OUT(req, &val, sizeof val);
2162 ipw_read_table1(struct ipw_softc *sc, uint32_t off)
2164 return MEM_READ_4(sc, MEM_READ_4(sc, sc->table1_base + off));
2168 ipw_write_table1(struct ipw_softc *sc, uint32_t off, uint32_t info)
2170 MEM_WRITE_4(sc, MEM_READ_4(sc, sc->table1_base + off), info);
2174 ipw_read_table2(struct ipw_softc *sc, uint32_t off, void *buf, uint32_t *len)
2176 uint32_t addr, info;
2177 uint16_t count, size;
2180 /* addr[4] + count[2] + size[2] */
2181 addr = MEM_READ_4(sc, sc->table2_base + off);
2182 info = MEM_READ_4(sc, sc->table2_base + off + 4);
2185 size = info & 0xffff;
2186 total = count * size;
2194 ipw_read_mem_1(sc, addr, buf, total);
2200 ipw_read_mem_1(struct ipw_softc *sc, bus_size_t offset, uint8_t *datap,
2203 for (; count > 0; offset++, datap++, count--) {
2204 CSR_WRITE_4(sc, IPW_CSR_INDIRECT_ADDR, offset & ~3);
2205 *datap = CSR_READ_1(sc, IPW_CSR_INDIRECT_DATA + (offset & 3));
2210 ipw_write_mem_1(struct ipw_softc *sc, bus_size_t offset, const uint8_t *datap,
2213 for (; count > 0; offset++, datap++, count--) {
2214 CSR_WRITE_4(sc, IPW_CSR_INDIRECT_ADDR, offset & ~3);
2215 CSR_WRITE_1(sc, IPW_CSR_INDIRECT_DATA + (offset & 3), *datap);