2 * SPDX-License-Identifier: BSD-2-Clause OR GPL-2.0
4 * This file is provided under a dual BSD/GPLv2 license. When using or
5 * redistributing this file, you may do so under either license.
9 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of version 2 of the GNU General Public License as
13 * published by the Free Software Foundation.
15 * This program is distributed in the hope that it will be useful, but
16 * WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 * General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
23 * The full GNU General Public License is included in this distribution
24 * in the file called LICENSE.GPL.
28 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
29 * All rights reserved.
31 * Redistribution and use in source and binary forms, with or without
32 * modification, are permitted provided that the following conditions
35 * * Redistributions of source code must retain the above copyright
36 * notice, this list of conditions and the following disclaimer.
37 * * Redistributions in binary form must reproduce the above copyright
38 * notice, this list of conditions and the following disclaimer in
39 * the documentation and/or other materials provided with the
42 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
43 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
44 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
45 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
46 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
47 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
48 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
49 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
50 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
51 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
52 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
56 #ifndef _SCIC_SDS_CONTROLLER_H_
57 #define _SCIC_SDS_CONTROLLER_H_
62 * @brief This file contains the structures, constants and prototypes used for
63 * the core controller object.
70 #include <dev/isci/scil/sci_pool.h>
71 #include <dev/isci/scil/sci_controller_constants.h>
72 #include <dev/isci/scil/sci_memory_descriptor_list.h>
73 #include <dev/isci/scil/sci_base_controller.h>
74 #include <dev/isci/scil/scic_config_parameters.h>
75 #include <dev/isci/scil/scic_sds_port.h>
76 #include <dev/isci/scil/scic_sds_phy.h>
77 #include <dev/isci/scil/scic_sds_remote_node_table.h>
78 #include <dev/isci/scil/scu_registers.h>
79 #include <dev/isci/scil/scu_constants.h>
80 #include <dev/isci/scil/scu_remote_node_context.h>
81 #include <dev/isci/scil/scu_task_context.h>
82 #include <dev/isci/scil/scu_unsolicited_frame.h>
83 #include <dev/isci/scil/scic_sds_unsolicited_frame_control.h>
84 #include <dev/isci/scil/scic_sds_port_configuration_agent.h>
85 #include <dev/isci/scil/scic_sds_pci.h>
87 struct SCIC_SDS_REMOTE_DEVICE;
88 struct SCIC_SDS_REQUEST;
91 #define SCU_COMPLETION_RAM_ALIGNMENT (64)
94 * @enum SCIC_SDS_CONTROLLER_MEMORY_DESCRIPTORS
96 * This enumeration depects the types of MDEs that are going to be created for
97 * the controller object.
99 enum SCIC_SDS_CONTROLLER_MEMORY_DESCRIPTORS
102 * Completion queue MDE entry
104 SCU_MDE_COMPLETION_QUEUE,
107 * Remote node context MDE entry
109 SCU_MDE_REMOTE_NODE_CONTEXT,
112 * Task context MDE entry
114 SCU_MDE_TASK_CONTEXT,
117 * Unsolicited frame buffer MDE entrys this is the start of the unsolicited
118 * frame buffer entries.
126 * @struct SCIC_POWER_CONTROL
128 * This structure defines the fields for managing power control for direct
129 * attached disk devices.
131 typedef struct SCIC_POWER_CONTROL
134 * This field is set when the power control timer is running and cleared when
140 * This field is the handle to the driver timer object. This timer is used to
141 * control when the directed attached disks can consume power.
146 * This field is used to keep track of how many phys are put into the
152 * This field is used to keep track of how many remote devices have been granted to consume power
154 U8 remote_devices_granted_power;
157 * This field is an array of phys that we are waiting on. The phys are direct
158 * mapped into requesters via SCIC_SDS_PHY_T.phy_index
160 SCIC_SDS_PHY_T *requesters[SCI_MAX_PHYS];
162 } SCIC_POWER_CONTROL_T;
165 * @struct SCIC_SDS_CONTROLLER
167 * This structure represents the SCU contoller object.
169 typedef struct SCIC_SDS_CONTROLLER
172 * The SCI_BASE_CONTROLLER is the parent object for the SCIC_SDS_CONTROLLER
175 SCI_BASE_CONTROLLER_T parent;
178 * This field is the driver timer object handler used to time the controller
179 * object start and stop requests.
184 * This field is the current set of state handlers assigned to this controller
187 struct SCIC_SDS_CONTROLLER_STATE_HANDLER *state_handlers;
190 * This field contains the user parameters to be utilized for this
191 * core controller object.
193 SCIC_USER_PARAMETERS_T user_parameters;
196 * This field contains the OEM parameters version defining the structure
197 * layout. It comes from the version in the OEM block header.
199 U8 oem_parameters_version;
202 * This field contains the OEM parameters to be utilized for this
203 * core controller object.
205 SCIC_OEM_PARAMETERS_T oem_parameters;
208 * This field contains the port configuration agent for this controller.
210 SCIC_SDS_PORT_CONFIGURATION_AGENT_T port_agent;
213 * This field is the array of port objects that are controlled by this
214 * controller object. There is one dummy port object also contained within
215 * this controller object.
217 struct SCIC_SDS_PORT port_table[SCI_MAX_PORTS + 1];
220 * This field is the array of phy objects that are controlled by this
223 struct SCIC_SDS_PHY phy_table[SCI_MAX_PHYS];
226 * This field is the array of device objects that are currently constructed
227 * for this controller object. This table is used as a fast lookup of device
228 * objects that need to handle device completion notifications from the
229 * hardware. The table is RNi based.
231 struct SCIC_SDS_REMOTE_DEVICE *device_table[SCI_MAX_REMOTE_DEVICES];
234 * This field is the array of IO request objects that are currently active for
235 * this controller object. This table is used as a fast lookup of the io
236 * request object that need to handle completion queue notifications. The
237 * table is TCi based.
239 struct SCIC_SDS_REQUEST *io_request_table[SCI_MAX_IO_REQUESTS];
242 * This field is the free RNi data structure
244 SCIC_REMOTE_NODE_TABLE_T available_remote_nodes;
247 * This field is the TCi pool used to manage the task context index.
249 SCI_POOL_CREATE(tci_pool, U16, SCI_MAX_IO_REQUESTS);
252 * This filed is the SCIC_POWER_CONTROL data used to control when direct
253 * attached devices can consume power.
255 SCIC_POWER_CONTROL_T power_control;
258 * This field is the array of sequence values for the IO Tag fields. Even
259 * though only 4 bits of the field is used for the sequence the sequence is 16
260 * bits in size so the sequence can be bitwise or'd with the TCi to build the
263 U16 io_request_sequence[SCI_MAX_IO_REQUESTS];
266 * This field in the array of sequence values for the RNi. These are used
267 * to control io request build to io request start operations. The sequence
268 * value is recorded into an io request when it is built and is checked on
269 * the io request start operation to make sure that there was not a device
270 * hot plug between the build and start operation.
272 U8 remote_device_sequence[SCI_MAX_REMOTE_DEVICES];
275 * This field is a pointer to the memory allocated by the driver for the task
276 * context table. This data is shared between the hardware and software.
278 SCU_TASK_CONTEXT_T *task_context_table;
281 * This field is a pointer to the memory allocated by the driver for the
282 * remote node context table. This table is shared between the hardware and
285 SCU_REMOTE_NODE_CONTEXT_T *remote_node_context_table;
288 * This field is the array of physical memory requiremets for this controller
291 SCI_PHYSICAL_MEMORY_DESCRIPTOR_T memory_descriptors[SCU_MAX_MDES];
294 * This field is a pointer to the completion queue. This memory is
295 * written to by the hardware and read by the software.
297 U32 *completion_queue;
300 * This field is the software copy of the completion queue get pointer. The
301 * controller object writes this value to the hardware after processing the
302 * completion entries.
304 U32 completion_queue_get;
307 * This field is the minimum of the number of hardware supported port entries
308 * and the software requested port entries.
310 U32 logical_port_entries;
313 * This field is the minimum number of hardware supported completion queue
314 * entries and the software requested completion queue entries.
316 U32 completion_queue_entries;
319 * This field is the minimum number of hardware supported event entries and
320 * the software requested event entries.
322 U32 completion_event_entries;
325 * This field is the minimum number of devices supported by the hardware and
326 * the number of devices requested by the software.
328 U32 remote_node_entries;
331 * This field is the minimum number of IO requests supported by the hardware
332 * and the number of IO requests requested by the software.
334 U32 task_context_entries;
337 * This object contains all of the unsolicited frame specific
338 * data utilized by the core controller.
340 SCIC_SDS_UNSOLICITED_FRAME_CONTROL_T uf_control;
343 * This field records the fact that the controller has encountered a fatal
344 * error and must be reset.
346 BOOL encountered_fatal_error;
349 * This field specifies that the controller should ignore
350 * completion processing for non-fastpath events. This will
351 * cause the completions to be thrown away.
353 BOOL restrict_completions;
357 * This field is the driver timer handle for controller phy request startup.
358 * On controller start the controller will start each PHY individually in
359 * order of phy index.
361 void *phy_startup_timer;
364 * This field is set when the phy_startup_timer is running and is cleared when
365 * the phy_startup_timer is stopped.
367 BOOL phy_startup_timer_pending;
370 * This field is the index of the next phy start. It is initialized to 0 and
371 * increments for each phy index that is started.
373 U32 next_phy_to_start;
376 * This field controls the invalid link up notifications to the SCI_USER. If
377 * an invalid_link_up notification is reported a bit for the PHY index is set
378 * so further notifications are not made. Once the PHY object reports link up
379 * and is made part of a port then this bit for the PHY index is cleared.
384 * This is the controller index for this controller object.
389 * This field is the PCI revision code for the controller object.
391 enum SCU_CONTROLLER_PCI_REVISION_CODE pci_revision;
394 * This field saves the current interrupt coalescing number of the controller.
396 U16 interrupt_coalesce_number;
399 * This field saves the current interrupt coalescing timeout value in microseconds.
401 U32 interrupt_coalesce_timeout;
403 // Hardware memory mapped register space
404 #ifdef ARLINGTON_BUILD
406 * This field is a pointer to the memory mapped register space for the
409 LEX_REGISTERS_T *lex_registers;
413 * This field is a pointer to the memory mapped register space for the
416 SMU_REGISTERS_T *smu_registers;
419 * This field is a pointer to the memory mapped register space for the
422 SCU_REGISTERS_T *scu_registers;
424 } SCIC_SDS_CONTROLLER_T;
427 typedef void (*SCIC_SDS_CONTROLLER_PHY_HANDLER_T)(
428 struct SCIC_SDS_CONTROLLER *controller,
429 struct SCIC_SDS_PORT *port,
430 struct SCIC_SDS_PHY *phy
433 typedef void (*SCIC_SDS_CONTROLLER_DEVICE_HANDLER_T)(
434 struct SCIC_SDS_CONTROLLER * controller,
435 struct SCIC_SDS_REMOTE_DEVICE * device
438 * @struct SCIC_SDS_CONTROLLER_STATE_HANDLER
440 * This structure contains the SDS core specific definition for the state
443 typedef struct SCIC_SDS_CONTROLLER_STATE_HANDLER
445 SCI_BASE_CONTROLLER_STATE_HANDLER_T parent;
447 SCI_BASE_CONTROLLER_REQUEST_HANDLER_T terminate_request_handler;
448 SCIC_SDS_CONTROLLER_PHY_HANDLER_T link_up_handler;
449 SCIC_SDS_CONTROLLER_PHY_HANDLER_T link_down_handler;
450 SCIC_SDS_CONTROLLER_DEVICE_HANDLER_T remote_device_started_handler;
451 SCIC_SDS_CONTROLLER_DEVICE_HANDLER_T remote_device_stopped_handler;
453 } SCIC_SDS_CONTROLLER_STATE_HANDLER_T;
455 extern SCIC_SDS_CONTROLLER_STATE_HANDLER_T
456 scic_sds_controller_state_handler_table[];
457 extern SCI_BASE_STATE_T scic_sds_controller_state_table[];
460 * This macro will increment the specified index to and if the index wraps
461 * to 0 it will toggel the cycle bit.
463 #define INCREMENT_QUEUE_GET(index, cycle, entry_count, bit_toggle) \
465 if ((index) + 1 == entry_count) \
468 (cycle) = (cycle) ^ (bit_toggle); \
477 * This is a helper macro that sets the state handlers for the controller
480 #define scic_sds_controller_set_state_handlers(this_controller, handlers) \
481 ((this_controller)->state_handlers = (handlers))
484 * This is a helper macro that gets the base state machine for the
487 #define scic_sds_controller_get_base_state_machine(this_contoroller) \
488 (&(this_controller)->parent.state_machine)
491 * This is a helper macro to get the port configuration agent from the
494 #define scic_sds_controller_get_port_configuration_agent(controller) \
495 (&(controller)->port_agent)
498 * This is a helper macro that sets the base state machine state handlers
499 * based on the state id
501 #define scic_sds_controller_set_base_state_handlers(this_controller, state_id) \
502 scic_sds_controller_set_state_handlers( \
503 this_controller, &scic_sds_controller_state_handler_table[(state_id)])
506 * This macro writes to the smu_register for this controller
508 #define smu_register_write(controller, reg, value) \
509 scic_sds_pci_write_smu_dword((controller), &(reg), (value))
512 * This macro reads the smu_register for this controller
514 #define smu_register_read(controller, reg) \
515 scic_sds_pci_read_smu_dword((controller), &(reg))
518 * This mcaro writes the scu_register for this controller
520 #define scu_register_write(controller, reg, value) \
521 scic_sds_pci_write_scu_dword((controller), &(reg), (value))
524 * This macro reads the scu_register for this controller
526 #define scu_register_read(controller, reg) \
527 scic_sds_pci_read_scu_dword((controller), &(reg))
529 #ifdef ARLINGTON_BUILD
531 * This macro writes to the lex_register for this controller.
533 #define lex_register_write(controller, reg, value) \
534 scic_cb_pci_write_dword((controller), (reg), (value))
537 * This macro reads from the lex_register for this controller.
539 #define lex_register_read(controller, reg) \
540 scic_cb_pci_read_dword((controller), (reg))
541 #endif // ARLINGTON_BUILD
544 * This macro returns the protocol engine group for this controller object.
545 * Presently we only support protocol engine group 0 so just return that
547 #define scic_sds_controller_get_protocol_engine_group(controller) 0
550 * This macro constructs an IO tag from the sequence and index values.
552 #define scic_sds_io_tag_construct(sequence, task_index) \
553 ((sequence) << 12 | (task_index))
556 * This macro returns the IO sequence from the IO tag value.
558 #define scic_sds_io_tag_get_sequence(io_tag) \
559 (((io_tag) & 0xF000) >> 12)
562 * This macro returns the TCi from the io tag value
564 #define scic_sds_io_tag_get_index(io_tag) \
568 * This is a helper macro to increment the io sequence count.
570 * We may find in the future that it will be faster to store the sequence
571 * count in such a way as we dont perform the shift operation to build io
572 * tag values so therefore need a way to incrment them correctly
574 #define scic_sds_io_sequence_increment(value) \
575 ((value) = (((value) + 1) & 0x000F))
577 #define scic_sds_remote_device_node_count(device) \
580 (device)->target_protocols.u.bits.attached_stp_target \
581 && ((device)->is_direct_attached != TRUE) \
583 ? SCU_STP_REMOTE_NODE_COUNT : SCU_SSP_REMOTE_NODE_COUNT \
587 * This macro will set the bit in the invalid phy mask for this controller
588 * object. This is used to control messages reported for invalid link up
591 #define scic_sds_controller_set_invalid_phy(controller, phy) \
592 ((controller)->invalid_phy_mask |= (1 << (phy)->phy_index))
595 * This macro will clear the bit in the invalid phy mask for this controller
596 * object. This is used to control messages reported for invalid link up
599 #define scic_sds_controller_clear_invalid_phy(controller, phy) \
600 ((controller)->invalid_phy_mask &= ~(1 << (phy)->phy_index))
602 // ---------------------------------------------------------------------------
604 U32 scic_sds_controller_get_object_size(void);
606 // ---------------------------------------------------------------------------
608 U32 scic_sds_controller_get_min_timer_count(void);
609 U32 scic_sds_controller_get_max_timer_count(void);
611 // ---------------------------------------------------------------------------
613 void scic_sds_controller_post_request(
614 SCIC_SDS_CONTROLLER_T *this_controller,
618 // ---------------------------------------------------------------------------
620 void scic_sds_controller_release_frame(
621 SCIC_SDS_CONTROLLER_T *this_controller,
625 void scic_sds_controller_copy_sata_response(
626 void * response_buffer,
631 // ---------------------------------------------------------------------------
633 SCI_STATUS scic_sds_controller_allocate_remote_node_context(
634 SCIC_SDS_CONTROLLER_T *this_controller,
635 struct SCIC_SDS_REMOTE_DEVICE *the_device,
639 void scic_sds_controller_free_remote_node_context(
640 SCIC_SDS_CONTROLLER_T *this_controller,
641 struct SCIC_SDS_REMOTE_DEVICE *the_device,
645 SCU_REMOTE_NODE_CONTEXT_T *scic_sds_controller_get_remote_node_context_buffer(
646 SCIC_SDS_CONTROLLER_T *this_controller,
650 // ---------------------------------------------------------------------------
652 struct SCIC_SDS_REQUEST *scic_sds_controller_get_io_request_from_tag(
653 SCIC_SDS_CONTROLLER_T *this_controller,
657 U16 scic_sds_controller_get_io_sequence_from_tag(
658 SCIC_SDS_CONTROLLER_T *this_controller,
662 SCU_TASK_CONTEXT_T *scic_sds_controller_get_task_context_buffer(
663 SCIC_SDS_CONTROLLER_T *this_controller,
667 //-----------------------------------------------------------------------------
669 SCI_STATUS scic_sds_terminate_reqests(
670 SCIC_SDS_CONTROLLER_T *this_controller,
671 struct SCIC_SDS_REMOTE_DEVICE *this_remote_device,
672 struct SCIC_SDS_PORT *this_port
675 //*****************************************************************************
676 //* CORE CONTROLLER POWER CONTROL METHODS
677 //*****************************************************************************
679 void scic_sds_controller_power_control_timer_handler(
683 void scic_sds_controller_power_control_queue_insert(
684 SCIC_SDS_CONTROLLER_T *this_controller,
685 struct SCIC_SDS_PHY *the_phy
688 void scic_sds_controller_power_control_queue_remove(
689 SCIC_SDS_CONTROLLER_T *this_controller,
690 struct SCIC_SDS_PHY *the_phy
693 //*****************************************************************************
694 //* CORE CONTROLLER PHY MESSAGE PROCESSING
695 //*****************************************************************************
697 void scic_sds_controller_link_up(
698 SCIC_SDS_CONTROLLER_T *this_controller,
699 struct SCIC_SDS_PORT *the_port,
700 struct SCIC_SDS_PHY *the_phy
703 void scic_sds_controller_link_down(
704 SCIC_SDS_CONTROLLER_T *this_controller,
705 struct SCIC_SDS_PORT *the_port,
706 struct SCIC_SDS_PHY *the_phy
709 //*****************************************************************************
710 //* CORE CONTROLLER PORT AGENT MESSAGE PROCESSING
711 //*****************************************************************************
712 void scic_sds_controller_port_agent_configured_ports(
713 SCIC_SDS_CONTROLLER_T * this_controller
716 //*****************************************************************************
717 //* CORE CONTROLLER REMOTE DEVICE MESSAGE PROCESSING
718 //*****************************************************************************
720 BOOL scic_sds_controller_has_remote_devices_stopping(
721 SCIC_SDS_CONTROLLER_T * this_controller
724 void scic_sds_controller_remote_device_started(
725 SCIC_SDS_CONTROLLER_T * this_controller,
726 struct SCIC_SDS_REMOTE_DEVICE * the_device
729 void scic_sds_controller_remote_device_stopped(
730 SCIC_SDS_CONTROLLER_T * this_controller,
731 struct SCIC_SDS_REMOTE_DEVICE * the_device
734 //*****************************************************************************
735 //* CORE CONTROLLER PRIVATE METHODS
736 //*****************************************************************************
739 void scic_sds_controller_initialize_state_logging(
740 SCIC_SDS_CONTROLLER_T *this_controller
743 void scic_sds_controller_deinitialize_state_logging(
744 SCIC_SDS_CONTROLLER_T *this_controller
747 #define scic_sds_controller_initialize_state_logging(x)
748 #define scic_sds_controller_deinitialize_state_logging(x)
751 SCI_STATUS scic_sds_controller_validate_memory_descriptor_table(
752 SCIC_SDS_CONTROLLER_T *this_controller
755 void scic_sds_controller_ram_initialization(
756 SCIC_SDS_CONTROLLER_T *this_controller
759 void scic_sds_controller_assign_task_entries(
760 SCIC_SDS_CONTROLLER_T *this_controller
763 void scic_sds_controller_afe_initialization(
764 SCIC_SDS_CONTROLLER_T * this_controller
767 void scic_sds_controller_enable_port_task_scheduler(
768 SCIC_SDS_CONTROLLER_T *this_controller
771 void scic_sds_controller_initialize_completion_queue(
772 SCIC_SDS_CONTROLLER_T *this_controller
775 void scic_sds_controller_initialize_unsolicited_frame_queue(
776 SCIC_SDS_CONTROLLER_T *this_controller
779 void scic_sds_controller_phy_timer_stop(
780 SCIC_SDS_CONTROLLER_T *this_controller
783 BOOL scic_sds_controller_is_start_complete(
784 SCIC_SDS_CONTROLLER_T *this_controller
787 SCI_STATUS scic_sds_controller_start_next_phy(
788 SCIC_SDS_CONTROLLER_T *this_controller
791 SCI_STATUS scic_sds_controller_stop_phys(
792 SCIC_SDS_CONTROLLER_T *this_controller
795 SCI_STATUS scic_sds_controller_stop_ports(
796 SCIC_SDS_CONTROLLER_T *this_controller
799 SCI_STATUS scic_sds_controller_stop_devices(
800 SCIC_SDS_CONTROLLER_T *this_controller
803 void scic_sds_controller_copy_task_context(
804 SCIC_SDS_CONTROLLER_T *this_controller,
805 struct SCIC_SDS_REQUEST *this_request
808 void scic_sds_controller_timeout_handler(
809 SCI_CONTROLLER_HANDLE_T controller
812 void scic_sds_controller_initialize_power_control(
813 SCIC_SDS_CONTROLLER_T *this_controller
816 void scic_sds_controller_register_setup(
817 SCIC_SDS_CONTROLLER_T *this_controller
820 void scic_sds_controller_reset_hardware(
821 SCIC_SDS_CONTROLLER_T * this_controller
824 #ifdef ARLINGTON_BUILD
825 void scic_sds_controller_lex_atux_initialization(
826 SCIC_SDS_CONTROLLER_T *this_controller
829 void scic_sds_controller_enable_chipwatch(
830 SCIC_SDS_CONTROLLER_T *this_controller
832 #endif // ARLINGTON_BUILD
834 void scic_sds_controller_build_memory_descriptor_table(
835 SCIC_SDS_CONTROLLER_T *this_controller
840 #endif // __cplusplus
842 #endif // _SCIC_SDS_CONTROLLER_H_