sys/dev/isci/scil/scic_sds_phy_registers.h

   1 /*-
   2  * SPDX-License-Identifier: BSD-2-Clause OR GPL-2.0
   3  *
   4  * This file is provided under a dual BSD/GPLv2 license.  When using or
   5  * redistributing this file, you may do so under either license.
   6  *
   7  * GPL LICENSE SUMMARY
   8  *
   9  * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
  10  *
  11  * This program is free software; you can redistribute it and/or modify
  12  * it under the terms of version 2 of the GNU General Public License as
  13  * published by the Free Software Foundation.
  14  *
  15  * This program is distributed in the hope that it will be useful, but
  16  * WITHOUT ANY WARRANTY; without even the implied warranty of
  17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  18  * General Public License for more details.
  19  *
  20  * You should have received a copy of the GNU General Public License
  21  * along with this program; if not, write to the Free Software
  22  * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  23  * The full GNU General Public License is included in this distribution
  24  * in the file called LICENSE.GPL.
  25  *
  26  * BSD LICENSE
  27  *
  28  * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
  29  * All rights reserved.
  30  *
  31  * Redistribution and use in source and binary forms, with or without
  32  * modification, are permitted provided that the following conditions
  33  * are met:
  34  *
  35  *   * Redistributions of source code must retain the above copyright
  36  *     notice, this list of conditions and the following disclaimer.
  37  *   * Redistributions in binary form must reproduce the above copyright
  38  *     notice, this list of conditions and the following disclaimer in
  39  *     the documentation and/or other materials provided with the
  40  *     distribution.
  41  *
  42  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  43  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  44  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  45  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  46  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  47  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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  50  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  51  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  52  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  53  *
  54  * $FreeBSD$
  55  */
  56 #ifndef _SCIC_SDS_PHY_REGISTERS_H_
  57 #define _SCIC_SDS_PHY_REGISTERS_H_
  58
  59 /**
  60  * @file
  61  *
  62  * @brief This file contains the macros used by the phy object to read/write
  63  *        to the SCU link layer registers.
  64  */
  65
  66 #ifdef __cplusplus
  67 extern "C" {
  68 #endif // __cplusplus
  69
  70 #include <dev/isci/scil/scic_sds_controller.h>
  71
  72 //*****************************************************************************
  73 //* SCU LINK LAYER REGISTER OPERATIONS
  74 //*****************************************************************************
  75
  76 /**
  77  * Macro to read the transport layer register associated with this phy
  78  * object.
  79  */
  80 #define scu_transport_layer_read(phy, reg) \
  81    scu_register_read( \
  82       scic_sds_phy_get_controller(phy), \
  83       (phy)->transport_layer_registers->reg \
  84    )
  85
  86 /**
  87  * Macro to write the transport layer register associated with this phy
  88  * object.
  89  */
  90 #define scu_transport_layer_write(phy, reg, value) \
  91    scu_register_write( \
  92       scic_sds_phy_get_controller(phy), \
  93       (phy)->transport_layer_registers->reg, \
  94       (value) \
  95    )
  96
  97 //****************************************************************************
  98 //* Transport Layer registers controlled by the phy object
  99 //****************************************************************************
 100
 101 /**
 102  * This macro reads the Transport layer control register
 103  */
 104 #define SCU_TLCR_READ(phy) \
 105    scu_transport_layer_read(phy, control)
 106
 107 /**
 108  * This macro writes the Transport layer control register
 109  */
 110 #define SCU_TLCR_WRITE(phy, value) \
 111    scu_transport_layer_write(phy, control, value)
 112
 113 /**
 114  * This macro reads the Transport layer address translation register
 115  */
 116 #define SCU_TLADTR_READ(phy) \
 117    scu_transport_layer_read(phy, address_translation)
 118
 119 /**
 120  * This macro writes the Transport layer address translation register
 121  */
 122 #define SCU_TLADTR_WRITE(phy) \
 123    scu_transport_layer_write(phy, address_translation, value)
 124
 125 /**
 126  * This macro writes the STP Transport Layer Direct Attached RNi register.
 127  */
 128 #define SCU_STPTLDARNI_WRITE(phy, index) \
 129    scu_transport_layer_write(phy, stp_rni, index)
 130
 131 /**
 132  * This macro reads the STP Transport Layer Direct Attached RNi register.
 133  */
 134 #define SCU_STPTLDARNI_READ(phy) \
 135    scu_transport_layer_read(phy, stp_rni)
 136
 137 //*****************************************************************************
 138 //* SCU LINK LAYER REGISTER OPERATIONS
 139 //*****************************************************************************
 140
 141 /**
 142  * THis macro requests the SCU register write for the specified link layer
 143  * register.
 144  */
 145 #define scu_link_layer_register_read(phy, reg) \
 146    scu_register_read( \
 147       scic_sds_phy_get_controller(phy), \
 148       (phy)->link_layer_registers->reg \
 149    )
 150
 151 /**
 152  * This macro requests the SCU register read for the specified link layer
 153  * register.
 154  */
 155 #define scu_link_layer_register_write(phy, reg, value) \
 156    scu_register_write( \
 157       scic_sds_phy_get_controller(phy), \
 158       (phy)->link_layer_registers->reg, \
 159       (value) \
 160    )
 161
 162 //*****************************************************************************
 163 //* SCU LINK LAYER REGISTERS
 164 //*****************************************************************************
 165
 166 /// This macro reads from the SAS Identify Frame PHY Identifier register
 167 #define SCU_SAS_TIPID_READ(phy) \
 168     scu_link_layer_register_read(phy, identify_frame_phy_id)
 169
 170 /// This macro writes to the SAS Identify Frame PHY Identifier register
 171 #define SCU_SAS_TIPID_WRITE(phy, value) \
 172     scu_link_layer_register_write(phy, identify_frame_phy_id, value)
 173
 174 /// This macro reads from the SAS Identification register
 175 #define SCU_SAS_TIID_READ(phy) \
 176     scu_link_layer_register_read(phy, transmit_identification)
 177
 178 /// This macro writes to the SAS Identification register
 179 #define SCU_SAS_TIID_WRITE(phy, value) \
 180     scu_link_layer_register_write(phy, transmit_identification, value)
 181
 182 /// This macro reads the SAS Device Name High register
 183 #define SCU_SAS_TIDNH_READ(phy) \
 184     scu_link_layer_register_read(phy, sas_device_name_high)
 185
 186 /// This macro writes the SAS Device Name High register
 187 #define SCU_SAS_TIDNH_WRITE(phy, value) \
 188     scu_link_layer_register_write(phy, sas_device_name_high, value)
 189
 190 /// This macro reads the SAS Device Name Low register
 191 #define SCU_SAS_TIDNL_READ(phy) \
 192     scu_link_layer_register_read(phy, sas_device_name_low)
 193
 194 /// This macro writes the SAS Device Name Low register
 195 #define SCU_SAS_TIDNL_WRITE(phy, value) \
 196     scu_link_layer_register_write(phy, sas_device_name_low, value)
 197
 198 /// This macro reads the Source SAS Address High register
 199 #define SCU_SAS_TISSAH_READ(phy) \
 200     scu_link_layer_register_read(phy, source_sas_address_high)
 201
 202 /// This macro writes the Source SAS Address High register
 203 #define SCU_SAS_TISSAH_WRITE(phy, value) \
 204     scu_link_layer_register_write(phy, source_sas_address_high, value)
 205
 206 /// This macro reads the Source SAS Address Low register
 207 #define SCU_SAS_TISSAL_READ(phy) \
 208     scu_link_layer_register_read(phy, source_sas_address_low)
 209
 210 /// This macro writes the Source SAS Address Low register
 211 #define SCU_SAS_TISSAL_WRITE(phy, value) \
 212     scu_link_layer_register_write(phy, source_sas_address_low, value)
 213
 214 /// This macro reads the PHY Configuration register
 215 #define SCU_SAS_PCFG_READ(phy) \
 216     scu_link_layer_register_read(phy, phy_configuration);
 217
 218 /// This macro writes the PHY Configuration register
 219 #define SCU_SAS_PCFG_WRITE(phy, value) \
 220     scu_link_layer_register_write(phy, phy_configuration, value)
 221
 222 /// This macro reads the PHY Enable Spinup register
 223 #define SCU_SAS_ENSPINUP_READ(phy) \
 224     scu_link_layer_register_read(phy, notify_enable_spinup_control)
 225
 226 /// This macro writes the PHY Enable Spinup register
 227 #define SCU_SAS_ENSPINUP_WRITE(phy, value) \
 228     scu_link_layer_register_write(phy, notify_enable_spinup_control, value)
 229
 230 /// This macro reads the CLKSM register
 231 #define SCU_SAS_CLKSM_READ(phy) \
 232     scu_link_layer_register_read(phy, clock_skew_management)
 233
 234 /// This macro writes the CLKSM register
 235 #define SCU_SAS_CLKSM_WRITE(phy, value) \
 236     scu_link_layer_register_write(phy, clock_skew_management, value)
 237
 238 /// This macro reads the PHY Capacity register
 239 #define SCU_SAS_PHYCAP_READ(phy) \
 240     scu_link_layer_register_read(phy, phy_capabilities)
 241
 242 /// This macro writes the PHY Capacity register
 243 #define SCU_SAS_PHYCAP_WRITE(phy, value) \
 244     scu_link_layer_register_write(phy, phy_capabilities, value)
 245
 246 /// This macro reads the Received PHY Capacity register
 247 #define SCU_SAS_RECPHYCAP_READ(phy) \
 248     scu_link_layer_register_read(phy, receive_phycap)
 249
 250 /// This macro reads the link layer control register
 251 #define SCU_SAS_LLCTL_READ(phy) \
 252     scu_link_layer_register_read(phy, link_layer_control);
 253
 254 /// This macro writes the link layer control register
 255 #define SCU_SAS_LLCTL_WRITE(phy, value) \
 256     scu_link_layer_register_write(phy, link_layer_control, value);
 257
 258 /// This macro reads the link layer status register
 259 #define SCU_SAS_LLSTA_READ(phy) \
 260     scu_link_layer_register_read(phy, link_layer_status);
 261
 262 #define SCU_SAS_ECENCR_READ(phy) \
 263     scu_link_layer_register_read(phy, error_counter_event_notification_control)
 264
 265 #define SCU_SAS_ECENCR_WRITE(phy, value) \
 266     scu_link_layer_register_write(phy, error_counter_event_notification_control, value)
 267
 268 #ifdef __cplusplus
 269 }
 270 #endif // __cplusplus
 271
 272 #endif // _SCIC_SDS_PHY_REGISTERS_H_