2 * Copyright (c) 1997-2008 by Matthew Jacob
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice immediately at the beginning of the file, without modification,
10 * this list of conditions, and the following disclaimer.
11 * 2. The name of the author may not be used to endorse or promote products
12 * derived from this software without specific prior written permission.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
18 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * PCI specific probe and attach routines for Qlogic ISP SCSI adapters.
30 #include <sys/cdefs.h>
31 __FBSDID("$FreeBSD$");
33 #include <sys/param.h>
34 #include <sys/systm.h>
35 #include <sys/kernel.h>
36 #include <sys/module.h>
37 #include <sys/linker.h>
38 #include <sys/firmware.h>
40 #include <sys/stdint.h>
41 #include <dev/pci/pcireg.h>
42 #include <dev/pci/pcivar.h>
43 #include <machine/bus.h>
44 #include <machine/resource.h>
46 #include <sys/malloc.h>
50 #include <dev/ofw/openfirm.h>
51 #include <machine/ofw_machdep.h>
54 #include <dev/isp/isp_freebsd.h>
56 static uint32_t isp_pci_rd_reg(ispsoftc_t *, int);
57 static void isp_pci_wr_reg(ispsoftc_t *, int, uint32_t);
58 static uint32_t isp_pci_rd_reg_1080(ispsoftc_t *, int);
59 static void isp_pci_wr_reg_1080(ispsoftc_t *, int, uint32_t);
60 static uint32_t isp_pci_rd_reg_2400(ispsoftc_t *, int);
61 static void isp_pci_wr_reg_2400(ispsoftc_t *, int, uint32_t);
62 static uint32_t isp_pci_rd_reg_2600(ispsoftc_t *, int);
63 static void isp_pci_wr_reg_2600(ispsoftc_t *, int, uint32_t);
64 static void isp_pci_run_isr(ispsoftc_t *);
65 static void isp_pci_run_isr_2300(ispsoftc_t *);
66 static void isp_pci_run_isr_2400(ispsoftc_t *);
67 static int isp_pci_mbxdma(ispsoftc_t *);
68 static void isp_pci_mbxdmafree(ispsoftc_t *);
69 static int isp_pci_dmasetup(ispsoftc_t *, XS_T *, void *);
70 static int isp_pci_irqsetup(ispsoftc_t *);
71 static void isp_pci_dumpregs(ispsoftc_t *, const char *);
73 static struct ispmdvec mdvec = {
79 isp_common_dmateardown,
83 BIU_BURST_ENABLE|BIU_PCI_CONF1_FIFO_64
86 static struct ispmdvec mdvec_1080 = {
92 isp_common_dmateardown,
96 BIU_BURST_ENABLE|BIU_PCI_CONF1_FIFO_64
99 static struct ispmdvec mdvec_12160 = {
105 isp_common_dmateardown,
109 BIU_BURST_ENABLE|BIU_PCI_CONF1_FIFO_64
112 static struct ispmdvec mdvec_2100 = {
118 isp_common_dmateardown,
123 static struct ispmdvec mdvec_2200 = {
129 isp_common_dmateardown,
134 static struct ispmdvec mdvec_2300 = {
135 isp_pci_run_isr_2300,
140 isp_common_dmateardown,
145 static struct ispmdvec mdvec_2400 = {
146 isp_pci_run_isr_2400,
151 isp_common_dmateardown,
156 static struct ispmdvec mdvec_2500 = {
157 isp_pci_run_isr_2400,
162 isp_common_dmateardown,
167 static struct ispmdvec mdvec_2600 = {
168 isp_pci_run_isr_2400,
173 isp_common_dmateardown,
178 #ifndef PCIM_CMD_INVEN
179 #define PCIM_CMD_INVEN 0x10
181 #ifndef PCIM_CMD_BUSMASTEREN
182 #define PCIM_CMD_BUSMASTEREN 0x0004
184 #ifndef PCIM_CMD_PERRESPEN
185 #define PCIM_CMD_PERRESPEN 0x0040
187 #ifndef PCIM_CMD_SEREN
188 #define PCIM_CMD_SEREN 0x0100
190 #ifndef PCIM_CMD_INTX_DISABLE
191 #define PCIM_CMD_INTX_DISABLE 0x0400
195 #define PCIR_COMMAND 0x04
198 #ifndef PCIR_CACHELNSZ
199 #define PCIR_CACHELNSZ 0x0c
202 #ifndef PCIR_LATTIMER
203 #define PCIR_LATTIMER 0x0d
207 #define PCIR_ROMADDR 0x30
210 #ifndef PCI_VENDOR_QLOGIC
211 #define PCI_VENDOR_QLOGIC 0x1077
214 #ifndef PCI_PRODUCT_QLOGIC_ISP1020
215 #define PCI_PRODUCT_QLOGIC_ISP1020 0x1020
218 #ifndef PCI_PRODUCT_QLOGIC_ISP1080
219 #define PCI_PRODUCT_QLOGIC_ISP1080 0x1080
222 #ifndef PCI_PRODUCT_QLOGIC_ISP10160
223 #define PCI_PRODUCT_QLOGIC_ISP10160 0x1016
226 #ifndef PCI_PRODUCT_QLOGIC_ISP12160
227 #define PCI_PRODUCT_QLOGIC_ISP12160 0x1216
230 #ifndef PCI_PRODUCT_QLOGIC_ISP1240
231 #define PCI_PRODUCT_QLOGIC_ISP1240 0x1240
234 #ifndef PCI_PRODUCT_QLOGIC_ISP1280
235 #define PCI_PRODUCT_QLOGIC_ISP1280 0x1280
238 #ifndef PCI_PRODUCT_QLOGIC_ISP2100
239 #define PCI_PRODUCT_QLOGIC_ISP2100 0x2100
242 #ifndef PCI_PRODUCT_QLOGIC_ISP2200
243 #define PCI_PRODUCT_QLOGIC_ISP2200 0x2200
246 #ifndef PCI_PRODUCT_QLOGIC_ISP2300
247 #define PCI_PRODUCT_QLOGIC_ISP2300 0x2300
250 #ifndef PCI_PRODUCT_QLOGIC_ISP2312
251 #define PCI_PRODUCT_QLOGIC_ISP2312 0x2312
254 #ifndef PCI_PRODUCT_QLOGIC_ISP2322
255 #define PCI_PRODUCT_QLOGIC_ISP2322 0x2322
258 #ifndef PCI_PRODUCT_QLOGIC_ISP2422
259 #define PCI_PRODUCT_QLOGIC_ISP2422 0x2422
262 #ifndef PCI_PRODUCT_QLOGIC_ISP2432
263 #define PCI_PRODUCT_QLOGIC_ISP2432 0x2432
266 #ifndef PCI_PRODUCT_QLOGIC_ISP2532
267 #define PCI_PRODUCT_QLOGIC_ISP2532 0x2532
270 #ifndef PCI_PRODUCT_QLOGIC_ISP6312
271 #define PCI_PRODUCT_QLOGIC_ISP6312 0x6312
274 #ifndef PCI_PRODUCT_QLOGIC_ISP6322
275 #define PCI_PRODUCT_QLOGIC_ISP6322 0x6322
278 #ifndef PCI_PRODUCT_QLOGIC_ISP5432
279 #define PCI_PRODUCT_QLOGIC_ISP5432 0x5432
282 #ifndef PCI_PRODUCT_QLOGIC_ISP2031
283 #define PCI_PRODUCT_QLOGIC_ISP2031 0x2031
286 #ifndef PCI_PRODUCT_QLOGIC_ISP8031
287 #define PCI_PRODUCT_QLOGIC_ISP8031 0x8031
290 #define PCI_QLOGIC_ISP5432 \
291 ((PCI_PRODUCT_QLOGIC_ISP5432 << 16) | PCI_VENDOR_QLOGIC)
293 #define PCI_QLOGIC_ISP1020 \
294 ((PCI_PRODUCT_QLOGIC_ISP1020 << 16) | PCI_VENDOR_QLOGIC)
296 #define PCI_QLOGIC_ISP1080 \
297 ((PCI_PRODUCT_QLOGIC_ISP1080 << 16) | PCI_VENDOR_QLOGIC)
299 #define PCI_QLOGIC_ISP10160 \
300 ((PCI_PRODUCT_QLOGIC_ISP10160 << 16) | PCI_VENDOR_QLOGIC)
302 #define PCI_QLOGIC_ISP12160 \
303 ((PCI_PRODUCT_QLOGIC_ISP12160 << 16) | PCI_VENDOR_QLOGIC)
305 #define PCI_QLOGIC_ISP1240 \
306 ((PCI_PRODUCT_QLOGIC_ISP1240 << 16) | PCI_VENDOR_QLOGIC)
308 #define PCI_QLOGIC_ISP1280 \
309 ((PCI_PRODUCT_QLOGIC_ISP1280 << 16) | PCI_VENDOR_QLOGIC)
311 #define PCI_QLOGIC_ISP2100 \
312 ((PCI_PRODUCT_QLOGIC_ISP2100 << 16) | PCI_VENDOR_QLOGIC)
314 #define PCI_QLOGIC_ISP2200 \
315 ((PCI_PRODUCT_QLOGIC_ISP2200 << 16) | PCI_VENDOR_QLOGIC)
317 #define PCI_QLOGIC_ISP2300 \
318 ((PCI_PRODUCT_QLOGIC_ISP2300 << 16) | PCI_VENDOR_QLOGIC)
320 #define PCI_QLOGIC_ISP2312 \
321 ((PCI_PRODUCT_QLOGIC_ISP2312 << 16) | PCI_VENDOR_QLOGIC)
323 #define PCI_QLOGIC_ISP2322 \
324 ((PCI_PRODUCT_QLOGIC_ISP2322 << 16) | PCI_VENDOR_QLOGIC)
326 #define PCI_QLOGIC_ISP2422 \
327 ((PCI_PRODUCT_QLOGIC_ISP2422 << 16) | PCI_VENDOR_QLOGIC)
329 #define PCI_QLOGIC_ISP2432 \
330 ((PCI_PRODUCT_QLOGIC_ISP2432 << 16) | PCI_VENDOR_QLOGIC)
332 #define PCI_QLOGIC_ISP2532 \
333 ((PCI_PRODUCT_QLOGIC_ISP2532 << 16) | PCI_VENDOR_QLOGIC)
335 #define PCI_QLOGIC_ISP6312 \
336 ((PCI_PRODUCT_QLOGIC_ISP6312 << 16) | PCI_VENDOR_QLOGIC)
338 #define PCI_QLOGIC_ISP6322 \
339 ((PCI_PRODUCT_QLOGIC_ISP6322 << 16) | PCI_VENDOR_QLOGIC)
341 #define PCI_QLOGIC_ISP2031 \
342 ((PCI_PRODUCT_QLOGIC_ISP2031 << 16) | PCI_VENDOR_QLOGIC)
344 #define PCI_QLOGIC_ISP8031 \
345 ((PCI_PRODUCT_QLOGIC_ISP8031 << 16) | PCI_VENDOR_QLOGIC)
348 * Odd case for some AMI raid cards... We need to *not* attach to this.
350 #define AMI_RAID_SUBVENDOR_ID 0x101e
352 #define PCI_DFLT_LTNCY 0x40
353 #define PCI_DFLT_LNSZ 0x10
355 static int isp_pci_probe (device_t);
356 static int isp_pci_attach (device_t);
357 static int isp_pci_detach (device_t);
360 #define ISP_PCD(isp) ((struct isp_pcisoftc *)isp)->pci_dev
361 struct isp_pcisoftc {
364 struct resource * regs;
365 struct resource * regs1;
366 struct resource * regs2;
369 struct resource * irq;
378 int16_t pci_poff[_NREG_BLKS];
384 static device_method_t isp_pci_methods[] = {
385 /* Device interface */
386 DEVMETHOD(device_probe, isp_pci_probe),
387 DEVMETHOD(device_attach, isp_pci_attach),
388 DEVMETHOD(device_detach, isp_pci_detach),
392 static driver_t isp_pci_driver = {
393 "isp", isp_pci_methods, sizeof (struct isp_pcisoftc)
395 static devclass_t isp_devclass;
396 DRIVER_MODULE(isp, pci, isp_pci_driver, isp_devclass, 0, 0);
397 MODULE_DEPEND(isp, cam, 1, 1, 1);
398 MODULE_DEPEND(isp, firmware, 1, 1, 1);
399 static int isp_nvports = 0;
402 isp_pci_probe(device_t dev)
404 switch ((pci_get_device(dev) << 16) | (pci_get_vendor(dev))) {
405 case PCI_QLOGIC_ISP1020:
406 device_set_desc(dev, "Qlogic ISP 1020/1040 PCI SCSI Adapter");
408 case PCI_QLOGIC_ISP1080:
409 device_set_desc(dev, "Qlogic ISP 1080 PCI SCSI Adapter");
411 case PCI_QLOGIC_ISP1240:
412 device_set_desc(dev, "Qlogic ISP 1240 PCI SCSI Adapter");
414 case PCI_QLOGIC_ISP1280:
415 device_set_desc(dev, "Qlogic ISP 1280 PCI SCSI Adapter");
417 case PCI_QLOGIC_ISP10160:
418 device_set_desc(dev, "Qlogic ISP 10160 PCI SCSI Adapter");
420 case PCI_QLOGIC_ISP12160:
421 if (pci_get_subvendor(dev) == AMI_RAID_SUBVENDOR_ID) {
424 device_set_desc(dev, "Qlogic ISP 12160 PCI SCSI Adapter");
426 case PCI_QLOGIC_ISP2100:
427 device_set_desc(dev, "Qlogic ISP 2100 PCI FC-AL Adapter");
429 case PCI_QLOGIC_ISP2200:
430 device_set_desc(dev, "Qlogic ISP 2200 PCI FC-AL Adapter");
432 case PCI_QLOGIC_ISP2300:
433 device_set_desc(dev, "Qlogic ISP 2300 PCI FC-AL Adapter");
435 case PCI_QLOGIC_ISP2312:
436 device_set_desc(dev, "Qlogic ISP 2312 PCI FC-AL Adapter");
438 case PCI_QLOGIC_ISP2322:
439 device_set_desc(dev, "Qlogic ISP 2322 PCI FC-AL Adapter");
441 case PCI_QLOGIC_ISP2422:
442 device_set_desc(dev, "Qlogic ISP 2422 PCI FC-AL Adapter");
444 case PCI_QLOGIC_ISP2432:
445 device_set_desc(dev, "Qlogic ISP 2432 PCI FC-AL Adapter");
447 case PCI_QLOGIC_ISP2532:
448 device_set_desc(dev, "Qlogic ISP 2532 PCI FC-AL Adapter");
450 case PCI_QLOGIC_ISP5432:
451 device_set_desc(dev, "Qlogic ISP 5432 PCI FC-AL Adapter");
453 case PCI_QLOGIC_ISP6312:
454 device_set_desc(dev, "Qlogic ISP 6312 PCI FC-AL Adapter");
456 case PCI_QLOGIC_ISP6322:
457 device_set_desc(dev, "Qlogic ISP 6322 PCI FC-AL Adapter");
459 case PCI_QLOGIC_ISP2031:
460 device_set_desc(dev, "Qlogic ISP 2031 PCI FC-AL Adapter");
462 case PCI_QLOGIC_ISP8031:
463 device_set_desc(dev, "Qlogic ISP 8031 PCI FCoE Adapter");
468 if (isp_announced == 0 && bootverbose) {
469 printf("Qlogic ISP Driver, FreeBSD Version %d.%d, "
470 "Core Version %d.%d\n",
471 ISP_PLATFORM_VERSION_MAJOR, ISP_PLATFORM_VERSION_MINOR,
472 ISP_CORE_VERSION_MAJOR, ISP_CORE_VERSION_MINOR);
476 * XXXX: Here is where we might load the f/w module
477 * XXXX: (or increase a reference count to it).
479 return (BUS_PROBE_DEFAULT);
483 isp_get_generic_options(device_t dev, ispsoftc_t *isp)
488 if (resource_int_value(device_get_name(dev), device_get_unit(dev), "fwload_disable", &tval) == 0 && tval != 0) {
489 isp->isp_confopts |= ISP_CFG_NORELOAD;
492 if (resource_int_value(device_get_name(dev), device_get_unit(dev), "ignore_nvram", &tval) == 0 && tval != 0) {
493 isp->isp_confopts |= ISP_CFG_NONVRAM;
496 (void) resource_int_value(device_get_name(dev), device_get_unit(dev), "debug", &tval);
498 isp->isp_dblev = tval;
500 isp->isp_dblev = ISP_LOGWARN|ISP_LOGERR;
503 isp->isp_dblev |= ISP_LOGCONFIG|ISP_LOGINFO;
506 (void) resource_int_value(device_get_name(dev), device_get_unit(dev), "vports", &tval);
507 if (tval > 0 && tval <= 254) {
511 (void) resource_int_value(device_get_name(dev), device_get_unit(dev), "quickboot_time", &tval);
512 isp_quickboot_time = tval;
516 isp_get_specific_options(device_t dev, int chan, ispsoftc_t *isp)
520 char prefix[12], name[16];
525 snprintf(prefix, sizeof(prefix), "chan%d.", chan);
526 snprintf(name, sizeof(name), "%siid", prefix);
527 if (resource_int_value(device_get_name(dev), device_get_unit(dev),
530 ISP_FC_PC(isp, chan)->default_id = 109 - chan;
533 ISP_SPI_PC(isp, chan)->iid = OF_getscsinitid(dev);
535 ISP_SPI_PC(isp, chan)->iid = 7;
540 ISP_FC_PC(isp, chan)->default_id = tval - chan;
542 ISP_SPI_PC(isp, chan)->iid = tval;
544 isp->isp_confopts |= ISP_CFG_OWNLOOPID;
551 snprintf(name, sizeof(name), "%srole", prefix);
552 if (resource_int_value(device_get_name(dev), device_get_unit(dev),
556 case ISP_ROLE_INITIATOR:
557 case ISP_ROLE_TARGET:
559 device_printf(dev, "Chan %d setting role to 0x%x\n", chan, tval);
567 tval = ISP_DEFAULT_ROLES;
569 ISP_FC_PC(isp, chan)->def_role = tval;
572 snprintf(name, sizeof(name), "%sfullduplex", prefix);
573 if (resource_int_value(device_get_name(dev), device_get_unit(dev),
574 name, &tval) == 0 && tval != 0) {
575 isp->isp_confopts |= ISP_CFG_FULL_DUPLEX;
578 snprintf(name, sizeof(name), "%stopology", prefix);
579 if (resource_string_value(device_get_name(dev), device_get_unit(dev),
580 name, (const char **) &sptr) == 0 && sptr != NULL) {
581 if (strcmp(sptr, "lport") == 0) {
582 isp->isp_confopts |= ISP_CFG_LPORT;
583 } else if (strcmp(sptr, "nport") == 0) {
584 isp->isp_confopts |= ISP_CFG_NPORT;
585 } else if (strcmp(sptr, "lport-only") == 0) {
586 isp->isp_confopts |= ISP_CFG_LPORT_ONLY;
587 } else if (strcmp(sptr, "nport-only") == 0) {
588 isp->isp_confopts |= ISP_CFG_NPORT_ONLY;
592 #ifdef ISP_FCTAPE_OFF
593 isp->isp_confopts |= ISP_CFG_NOFCTAPE;
595 isp->isp_confopts |= ISP_CFG_FCTAPE;
599 snprintf(name, sizeof(name), "%snofctape", prefix);
600 (void) resource_int_value(device_get_name(dev), device_get_unit(dev),
603 isp->isp_confopts &= ~ISP_CFG_FCTAPE;
604 isp->isp_confopts |= ISP_CFG_NOFCTAPE;
608 snprintf(name, sizeof(name), "%sfctape", prefix);
609 (void) resource_int_value(device_get_name(dev), device_get_unit(dev),
612 isp->isp_confopts &= ~ISP_CFG_NOFCTAPE;
613 isp->isp_confopts |= ISP_CFG_FCTAPE;
618 * Because the resource_*_value functions can neither return
619 * 64 bit integer values, nor can they be directly coerced
620 * to interpret the right hand side of the assignment as
621 * you want them to interpret it, we have to force WWN
622 * hint replacement to specify WWN strings with a leading
623 * 'w' (e..g w50000000aaaa0001). Sigh.
626 snprintf(name, sizeof(name), "%sportwwn", prefix);
627 tval = resource_string_value(device_get_name(dev), device_get_unit(dev),
628 name, (const char **) &sptr);
629 if (tval == 0 && sptr != NULL && *sptr++ == 'w') {
631 ISP_FC_PC(isp, chan)->def_wwpn = strtouq(sptr, &eptr, 16);
632 if (eptr < sptr + 16 || ISP_FC_PC(isp, chan)->def_wwpn == -1) {
633 device_printf(dev, "mangled portwwn hint '%s'\n", sptr);
634 ISP_FC_PC(isp, chan)->def_wwpn = 0;
639 snprintf(name, sizeof(name), "%snodewwn", prefix);
640 tval = resource_string_value(device_get_name(dev), device_get_unit(dev),
641 name, (const char **) &sptr);
642 if (tval == 0 && sptr != NULL && *sptr++ == 'w') {
644 ISP_FC_PC(isp, chan)->def_wwnn = strtouq(sptr, &eptr, 16);
645 if (eptr < sptr + 16 || ISP_FC_PC(isp, chan)->def_wwnn == 0) {
646 device_printf(dev, "mangled nodewwn hint '%s'\n", sptr);
647 ISP_FC_PC(isp, chan)->def_wwnn = 0;
652 snprintf(name, sizeof(name), "%sloop_down_limit", prefix);
653 (void) resource_int_value(device_get_name(dev), device_get_unit(dev),
655 if (tval >= 0 && tval < 0xffff) {
656 ISP_FC_PC(isp, chan)->loop_down_limit = tval;
658 ISP_FC_PC(isp, chan)->loop_down_limit = isp_loop_down_limit;
662 snprintf(name, sizeof(name), "%sgone_device_time", prefix);
663 (void) resource_int_value(device_get_name(dev), device_get_unit(dev),
665 if (tval >= 0 && tval < 0xffff) {
666 ISP_FC_PC(isp, chan)->gone_device_time = tval;
668 ISP_FC_PC(isp, chan)->gone_device_time = isp_gone_device_time;
673 isp_pci_attach(device_t dev)
675 struct isp_pcisoftc *pcs = device_get_softc(dev);
676 ispsoftc_t *isp = &pcs->pci_isp;
678 uint32_t data, cmd, linesz, did;
685 mtx_init(&isp->isp_lock, "isp", NULL, MTX_DEF);
688 * Get Generic Options
691 isp_get_generic_options(dev, isp);
693 linesz = PCI_DFLT_LNSZ;
694 pcs->regs = pcs->regs2 = NULL;
695 pcs->rgd = pcs->rtp = 0;
698 pcs->pci_poff[BIU_BLOCK >> _BLK_REG_SHFT] = BIU_REGS_OFF;
699 pcs->pci_poff[MBOX_BLOCK >> _BLK_REG_SHFT] = PCI_MBOX_REGS_OFF;
700 pcs->pci_poff[SXP_BLOCK >> _BLK_REG_SHFT] = PCI_SXP_REGS_OFF;
701 pcs->pci_poff[RISC_BLOCK >> _BLK_REG_SHFT] = PCI_RISC_REGS_OFF;
702 pcs->pci_poff[DMA_BLOCK >> _BLK_REG_SHFT] = DMA_REGS_OFF;
704 switch (pci_get_devid(dev)) {
705 case PCI_QLOGIC_ISP1020:
707 isp->isp_mdvec = &mdvec;
708 isp->isp_type = ISP_HA_SCSI_UNKNOWN;
710 case PCI_QLOGIC_ISP1080:
712 isp->isp_mdvec = &mdvec_1080;
713 isp->isp_type = ISP_HA_SCSI_1080;
714 pcs->pci_poff[DMA_BLOCK >> _BLK_REG_SHFT] = ISP1080_DMA_REGS_OFF;
716 case PCI_QLOGIC_ISP1240:
718 isp->isp_mdvec = &mdvec_1080;
719 isp->isp_type = ISP_HA_SCSI_1240;
721 pcs->pci_poff[DMA_BLOCK >> _BLK_REG_SHFT] = ISP1080_DMA_REGS_OFF;
723 case PCI_QLOGIC_ISP1280:
725 isp->isp_mdvec = &mdvec_1080;
726 isp->isp_type = ISP_HA_SCSI_1280;
727 pcs->pci_poff[DMA_BLOCK >> _BLK_REG_SHFT] = ISP1080_DMA_REGS_OFF;
729 case PCI_QLOGIC_ISP10160:
731 isp->isp_mdvec = &mdvec_12160;
732 isp->isp_type = ISP_HA_SCSI_10160;
733 pcs->pci_poff[DMA_BLOCK >> _BLK_REG_SHFT] = ISP1080_DMA_REGS_OFF;
735 case PCI_QLOGIC_ISP12160:
738 isp->isp_mdvec = &mdvec_12160;
739 isp->isp_type = ISP_HA_SCSI_12160;
740 pcs->pci_poff[DMA_BLOCK >> _BLK_REG_SHFT] = ISP1080_DMA_REGS_OFF;
742 case PCI_QLOGIC_ISP2100:
744 isp->isp_mdvec = &mdvec_2100;
745 isp->isp_type = ISP_HA_FC_2100;
746 pcs->pci_poff[MBOX_BLOCK >> _BLK_REG_SHFT] = PCI_MBOX_REGS2100_OFF;
747 if (pci_get_revid(dev) < 3) {
749 * XXX: Need to get the actual revision
750 * XXX: number of the 2100 FB. At any rate,
751 * XXX: lower cache line size for early revision
757 case PCI_QLOGIC_ISP2200:
759 isp->isp_mdvec = &mdvec_2200;
760 isp->isp_type = ISP_HA_FC_2200;
761 pcs->pci_poff[MBOX_BLOCK >> _BLK_REG_SHFT] = PCI_MBOX_REGS2100_OFF;
763 case PCI_QLOGIC_ISP2300:
765 isp->isp_mdvec = &mdvec_2300;
766 isp->isp_type = ISP_HA_FC_2300;
767 pcs->pci_poff[MBOX_BLOCK >> _BLK_REG_SHFT] = PCI_MBOX_REGS2300_OFF;
769 case PCI_QLOGIC_ISP2312:
770 case PCI_QLOGIC_ISP6312:
772 isp->isp_mdvec = &mdvec_2300;
773 isp->isp_type = ISP_HA_FC_2312;
774 pcs->pci_poff[MBOX_BLOCK >> _BLK_REG_SHFT] = PCI_MBOX_REGS2300_OFF;
776 case PCI_QLOGIC_ISP2322:
777 case PCI_QLOGIC_ISP6322:
779 isp->isp_mdvec = &mdvec_2300;
780 isp->isp_type = ISP_HA_FC_2322;
781 pcs->pci_poff[MBOX_BLOCK >> _BLK_REG_SHFT] = PCI_MBOX_REGS2300_OFF;
783 case PCI_QLOGIC_ISP2422:
784 case PCI_QLOGIC_ISP2432:
786 isp->isp_nchan += isp_nvports;
787 isp->isp_mdvec = &mdvec_2400;
788 isp->isp_type = ISP_HA_FC_2400;
789 pcs->pci_poff[MBOX_BLOCK >> _BLK_REG_SHFT] = PCI_MBOX_REGS2400_OFF;
791 case PCI_QLOGIC_ISP2532:
793 isp->isp_nchan += isp_nvports;
794 isp->isp_mdvec = &mdvec_2500;
795 isp->isp_type = ISP_HA_FC_2500;
796 pcs->pci_poff[MBOX_BLOCK >> _BLK_REG_SHFT] = PCI_MBOX_REGS2400_OFF;
798 case PCI_QLOGIC_ISP5432:
800 isp->isp_mdvec = &mdvec_2500;
801 isp->isp_type = ISP_HA_FC_2500;
802 pcs->pci_poff[MBOX_BLOCK >> _BLK_REG_SHFT] = PCI_MBOX_REGS2400_OFF;
804 case PCI_QLOGIC_ISP2031:
805 case PCI_QLOGIC_ISP8031:
807 isp->isp_nchan += isp_nvports;
808 isp->isp_mdvec = &mdvec_2600;
809 isp->isp_type = ISP_HA_FC_2600;
810 pcs->pci_poff[MBOX_BLOCK >> _BLK_REG_SHFT] = PCI_MBOX_REGS2400_OFF;
813 device_printf(dev, "unknown device type\n");
817 isp->isp_revision = pci_get_revid(dev);
820 pcs->rtp = SYS_RES_MEMORY;
821 pcs->rgd = PCIR_BAR(0);
822 pcs->regs = bus_alloc_resource_any(dev, pcs->rtp, &pcs->rgd,
824 pcs->rtp1 = SYS_RES_MEMORY;
825 pcs->rgd1 = PCIR_BAR(2);
826 pcs->regs1 = bus_alloc_resource_any(dev, pcs->rtp1, &pcs->rgd1,
828 pcs->rtp2 = SYS_RES_MEMORY;
829 pcs->rgd2 = PCIR_BAR(4);
830 pcs->regs2 = bus_alloc_resource_any(dev, pcs->rtp2, &pcs->rgd2,
833 pcs->rtp = SYS_RES_MEMORY;
834 pcs->rgd = PCIR_BAR(1);
835 pcs->regs = bus_alloc_resource_any(dev, pcs->rtp, &pcs->rgd,
837 if (pcs->regs == NULL) {
838 pcs->rtp = SYS_RES_IOPORT;
839 pcs->rgd = PCIR_BAR(0);
840 pcs->regs = bus_alloc_resource_any(dev, pcs->rtp,
841 &pcs->rgd, RF_ACTIVE);
844 if (pcs->regs == NULL) {
845 device_printf(dev, "Unable to map any ports\n");
849 device_printf(dev, "Using %s space register mapping\n",
850 (pcs->rtp == SYS_RES_IOPORT)? "I/O" : "Memory");
852 isp->isp_regs = pcs->regs;
853 isp->isp_regs2 = pcs->regs2;
856 psize = sizeof (fcparam);
857 xsize = sizeof (struct isp_fc);
859 psize = sizeof (sdparam);
860 xsize = sizeof (struct isp_spi);
862 psize *= isp->isp_nchan;
863 xsize *= isp->isp_nchan;
864 isp->isp_param = malloc(psize, M_DEVBUF, M_NOWAIT | M_ZERO);
865 if (isp->isp_param == NULL) {
866 device_printf(dev, "cannot allocate parameter data\n");
869 isp->isp_osinfo.pc.ptr = malloc(xsize, M_DEVBUF, M_NOWAIT | M_ZERO);
870 if (isp->isp_osinfo.pc.ptr == NULL) {
871 device_printf(dev, "cannot allocate parameter data\n");
876 * Now that we know who we are (roughly) get/set specific options
878 for (i = 0; i < isp->isp_nchan; i++) {
879 isp_get_specific_options(dev, i, isp);
882 isp->isp_osinfo.fw = NULL;
883 if (isp->isp_osinfo.fw == NULL) {
884 snprintf(fwname, sizeof (fwname), "isp_%04x", did);
885 isp->isp_osinfo.fw = firmware_get(fwname);
887 if (isp->isp_osinfo.fw != NULL) {
888 isp_prt(isp, ISP_LOGCONFIG, "loaded firmware %s", fwname);
889 isp->isp_mdvec->dv_ispfw = isp->isp_osinfo.fw->data;
893 * Make sure that SERR, PERR, WRITE INVALIDATE and BUSMASTER are set.
895 cmd = pci_read_config(dev, PCIR_COMMAND, 2);
896 cmd |= PCIM_CMD_SEREN | PCIM_CMD_PERRESPEN | PCIM_CMD_BUSMASTEREN | PCIM_CMD_INVEN;
897 if (IS_2300(isp)) { /* per QLogic errata */
898 cmd &= ~PCIM_CMD_INVEN;
900 if (IS_2322(isp) || pci_get_devid(dev) == PCI_QLOGIC_ISP6312) {
901 cmd &= ~PCIM_CMD_INTX_DISABLE;
904 cmd &= ~PCIM_CMD_INTX_DISABLE;
906 pci_write_config(dev, PCIR_COMMAND, cmd, 2);
909 * Make sure the Cache Line Size register is set sensibly.
911 data = pci_read_config(dev, PCIR_CACHELNSZ, 1);
912 if (data == 0 || (linesz != PCI_DFLT_LNSZ && data != linesz)) {
913 isp_prt(isp, ISP_LOGDEBUG0, "set PCI line size to %d from %d", linesz, data);
915 pci_write_config(dev, PCIR_CACHELNSZ, data, 1);
919 * Make sure the Latency Timer is sane.
921 data = pci_read_config(dev, PCIR_LATTIMER, 1);
922 if (data < PCI_DFLT_LTNCY) {
923 data = PCI_DFLT_LTNCY;
924 isp_prt(isp, ISP_LOGDEBUG0, "set PCI latency to %d", data);
925 pci_write_config(dev, PCIR_LATTIMER, data, 1);
929 * Make sure we've disabled the ROM.
931 data = pci_read_config(dev, PCIR_ROMADDR, 4);
933 pci_write_config(dev, PCIR_ROMADDR, data, 4);
936 * Last minute checks...
938 if (IS_23XX(isp) || IS_24XX(isp)) {
939 isp->isp_port = pci_get_function(dev);
943 * Make sure we're in reset state.
946 if (isp_reinit(isp, 1) != 0) {
951 if (isp_attach(isp)) {
960 for (i = 0; i < isp->isp_nirq; i++) {
961 (void) bus_teardown_intr(dev, pcs->irq[i].irq, pcs->irq[i].ih);
962 (void) bus_release_resource(dev, SYS_RES_IRQ, pcs->irq[i].iqd,
966 pci_release_msi(dev);
969 (void) bus_release_resource(dev, pcs->rtp, pcs->rgd, pcs->regs);
971 (void) bus_release_resource(dev, pcs->rtp1, pcs->rgd1, pcs->regs1);
973 (void) bus_release_resource(dev, pcs->rtp2, pcs->rgd2, pcs->regs2);
974 if (pcs->pci_isp.isp_param) {
975 free(pcs->pci_isp.isp_param, M_DEVBUF);
976 pcs->pci_isp.isp_param = NULL;
978 if (pcs->pci_isp.isp_osinfo.pc.ptr) {
979 free(pcs->pci_isp.isp_osinfo.pc.ptr, M_DEVBUF);
980 pcs->pci_isp.isp_osinfo.pc.ptr = NULL;
982 mtx_destroy(&isp->isp_lock);
987 isp_pci_detach(device_t dev)
989 struct isp_pcisoftc *pcs = device_get_softc(dev);
990 ispsoftc_t *isp = &pcs->pci_isp;
993 status = isp_detach(isp);
999 for (i = 0; i < isp->isp_nirq; i++) {
1000 (void) bus_teardown_intr(dev, pcs->irq[i].irq, pcs->irq[i].ih);
1001 (void) bus_release_resource(dev, SYS_RES_IRQ, pcs->irq[i].iqd,
1005 pci_release_msi(dev);
1006 (void) bus_release_resource(dev, pcs->rtp, pcs->rgd, pcs->regs);
1008 (void) bus_release_resource(dev, pcs->rtp1, pcs->rgd1, pcs->regs1);
1010 (void) bus_release_resource(dev, pcs->rtp2, pcs->rgd2, pcs->regs2);
1011 isp_pci_mbxdmafree(isp);
1012 if (pcs->pci_isp.isp_param) {
1013 free(pcs->pci_isp.isp_param, M_DEVBUF);
1014 pcs->pci_isp.isp_param = NULL;
1016 if (pcs->pci_isp.isp_osinfo.pc.ptr) {
1017 free(pcs->pci_isp.isp_osinfo.pc.ptr, M_DEVBUF);
1018 pcs->pci_isp.isp_osinfo.pc.ptr = NULL;
1020 mtx_destroy(&isp->isp_lock);
1024 #define IspVirt2Off(a, x) \
1025 (((struct isp_pcisoftc *)a)->pci_poff[((x) & _BLK_REG_MASK) >> \
1026 _BLK_REG_SHFT] + ((x) & 0xfff))
1028 #define BXR2(isp, off) bus_read_2((isp)->isp_regs, (off))
1029 #define BXW2(isp, off, v) bus_write_2((isp)->isp_regs, (off), (v))
1030 #define BXR4(isp, off) bus_read_4((isp)->isp_regs, (off))
1031 #define BXW4(isp, off, v) bus_write_4((isp)->isp_regs, (off), (v))
1032 #define B2R4(isp, off) bus_read_4((isp)->isp_regs2, (off))
1033 #define B2W4(isp, off, v) bus_write_4((isp)->isp_regs2, (off), (v))
1035 static ISP_INLINE uint16_t
1036 isp_pci_rd_debounced(ispsoftc_t *isp, int off)
1040 val = BXR2(isp, IspVirt2Off(isp, off));
1043 val = BXR2(isp, IspVirt2Off(isp, off));
1044 } while (val != prev);
1049 isp_pci_run_isr(ispsoftc_t *isp)
1051 uint16_t isr, sema, info;
1054 isr = isp_pci_rd_debounced(isp, BIU_ISR);
1055 sema = isp_pci_rd_debounced(isp, BIU_SEMA);
1057 isr = BXR2(isp, IspVirt2Off(isp, BIU_ISR));
1058 sema = BXR2(isp, IspVirt2Off(isp, BIU_SEMA));
1060 isp_prt(isp, ISP_LOGDEBUG3, "ISR 0x%x SEMA 0x%x", isr, sema);
1061 isr &= INT_PENDING_MASK(isp);
1062 sema &= BIU_SEMA_LOCK;
1063 if (isr == 0 && sema == 0)
1067 info = isp_pci_rd_debounced(isp, OUTMAILBOX0);
1069 info = BXR2(isp, IspVirt2Off(isp, OUTMAILBOX0));
1070 if (info & MBOX_COMMAND_COMPLETE)
1071 isp_intr_mbox(isp, info);
1073 isp_intr_async(isp, info);
1074 if (!IS_FC(isp) && isp->isp_state == ISP_RUNSTATE)
1075 isp_intr_respq(isp);
1077 isp_intr_respq(isp);
1078 ISP_WRITE(isp, HCCR, HCCR_CMD_CLEAR_RISC_INT);
1080 ISP_WRITE(isp, BIU_SEMA, 0);
1084 isp_pci_run_isr_2300(ispsoftc_t *isp)
1086 uint32_t hccr, r2hisr;
1089 if ((BXR2(isp, IspVirt2Off(isp, BIU_ISR)) & BIU2100_ISR_RISC_INT) == 0)
1091 r2hisr = BXR4(isp, IspVirt2Off(isp, BIU_R2HSTSLO));
1092 isp_prt(isp, ISP_LOGDEBUG3, "RISC2HOST ISR 0x%x", r2hisr);
1093 if ((r2hisr & BIU_R2HST_INTR) == 0)
1095 isr = r2hisr & BIU_R2HST_ISTAT_MASK;
1096 info = r2hisr >> 16;
1098 case ISPR2HST_ROM_MBX_OK:
1099 case ISPR2HST_ROM_MBX_FAIL:
1100 case ISPR2HST_MBX_OK:
1101 case ISPR2HST_MBX_FAIL:
1102 isp_intr_mbox(isp, info);
1104 case ISPR2HST_ASYNC_EVENT:
1105 isp_intr_async(isp, info);
1107 case ISPR2HST_RIO_16:
1108 isp_intr_async(isp, ASYNC_RIO16_1);
1110 case ISPR2HST_FPOST:
1111 isp_intr_async(isp, ASYNC_CMD_CMPLT);
1113 case ISPR2HST_FPOST_CTIO:
1114 isp_intr_async(isp, ASYNC_CTIO_DONE);
1116 case ISPR2HST_RSPQ_UPDATE:
1117 isp_intr_respq(isp);
1120 hccr = ISP_READ(isp, HCCR);
1121 if (hccr & HCCR_PAUSE) {
1122 ISP_WRITE(isp, HCCR, HCCR_RESET);
1123 isp_prt(isp, ISP_LOGERR, "RISC paused at interrupt (%x->%x)", hccr, ISP_READ(isp, HCCR));
1124 ISP_WRITE(isp, BIU_ICR, 0);
1126 isp_prt(isp, ISP_LOGERR, "unknown interrupt 0x%x\n", r2hisr);
1129 ISP_WRITE(isp, HCCR, HCCR_CMD_CLEAR_RISC_INT);
1130 ISP_WRITE(isp, BIU_SEMA, 0);
1134 isp_pci_run_isr_2400(ispsoftc_t *isp)
1139 r2hisr = BXR4(isp, IspVirt2Off(isp, BIU2400_R2HSTSLO));
1140 isp_prt(isp, ISP_LOGDEBUG3, "RISC2HOST ISR 0x%x", r2hisr);
1141 if ((r2hisr & BIU_R2HST_INTR) == 0)
1143 isr = r2hisr & BIU_R2HST_ISTAT_MASK;
1144 info = (r2hisr >> 16);
1146 case ISPR2HST_ROM_MBX_OK:
1147 case ISPR2HST_ROM_MBX_FAIL:
1148 case ISPR2HST_MBX_OK:
1149 case ISPR2HST_MBX_FAIL:
1150 isp_intr_mbox(isp, info);
1152 case ISPR2HST_ASYNC_EVENT:
1153 isp_intr_async(isp, info);
1155 case ISPR2HST_RSPQ_UPDATE:
1156 isp_intr_respq(isp);
1158 case ISPR2HST_RSPQ_UPDATE2:
1159 #ifdef ISP_TARGET_MODE
1160 case ISPR2HST_ATIO_RSPQ_UPDATE:
1162 isp_intr_respq(isp);
1164 #ifdef ISP_TARGET_MODE
1165 case ISPR2HST_ATIO_UPDATE:
1166 case ISPR2HST_ATIO_UPDATE2:
1167 isp_intr_atioq(isp);
1171 isp_prt(isp, ISP_LOGERR, "unknown interrupt 0x%x\n", r2hisr);
1173 ISP_WRITE(isp, BIU2400_HCCR, HCCR_2400_CMD_CLEAR_RISC_INT);
1177 isp_pci_rd_reg(ispsoftc_t *isp, int regoff)
1182 if ((regoff & _BLK_REG_MASK) == SXP_BLOCK) {
1184 * We will assume that someone has paused the RISC processor.
1186 oldconf = BXR2(isp, IspVirt2Off(isp, BIU_CONF1));
1187 BXW2(isp, IspVirt2Off(isp, BIU_CONF1), oldconf | BIU_PCI_CONF1_SXP);
1188 MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, BIU_CONF1), 2, -1);
1190 rv = BXR2(isp, IspVirt2Off(isp, regoff));
1191 if ((regoff & _BLK_REG_MASK) == SXP_BLOCK) {
1192 BXW2(isp, IspVirt2Off(isp, BIU_CONF1), oldconf);
1193 MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, BIU_CONF1), 2, -1);
1199 isp_pci_wr_reg(ispsoftc_t *isp, int regoff, uint32_t val)
1203 if ((regoff & _BLK_REG_MASK) == SXP_BLOCK) {
1205 * We will assume that someone has paused the RISC processor.
1207 oldconf = BXR2(isp, IspVirt2Off(isp, BIU_CONF1));
1208 BXW2(isp, IspVirt2Off(isp, BIU_CONF1),
1209 oldconf | BIU_PCI_CONF1_SXP);
1210 MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, BIU_CONF1), 2, -1);
1212 BXW2(isp, IspVirt2Off(isp, regoff), val);
1213 MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, regoff), 2, -1);
1214 if ((regoff & _BLK_REG_MASK) == SXP_BLOCK) {
1215 BXW2(isp, IspVirt2Off(isp, BIU_CONF1), oldconf);
1216 MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, BIU_CONF1), 2, -1);
1222 isp_pci_rd_reg_1080(ispsoftc_t *isp, int regoff)
1224 uint32_t rv, oc = 0;
1226 if ((regoff & _BLK_REG_MASK) == SXP_BLOCK) {
1229 * We will assume that someone has paused the RISC processor.
1231 oc = BXR2(isp, IspVirt2Off(isp, BIU_CONF1));
1232 tc = oc & ~BIU_PCI1080_CONF1_DMA;
1233 if (regoff & SXP_BANK1_SELECT)
1234 tc |= BIU_PCI1080_CONF1_SXP1;
1236 tc |= BIU_PCI1080_CONF1_SXP0;
1237 BXW2(isp, IspVirt2Off(isp, BIU_CONF1), tc);
1238 MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, BIU_CONF1), 2, -1);
1239 } else if ((regoff & _BLK_REG_MASK) == DMA_BLOCK) {
1240 oc = BXR2(isp, IspVirt2Off(isp, BIU_CONF1));
1241 BXW2(isp, IspVirt2Off(isp, BIU_CONF1),
1242 oc | BIU_PCI1080_CONF1_DMA);
1243 MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, BIU_CONF1), 2, -1);
1245 rv = BXR2(isp, IspVirt2Off(isp, regoff));
1247 BXW2(isp, IspVirt2Off(isp, BIU_CONF1), oc);
1248 MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, BIU_CONF1), 2, -1);
1254 isp_pci_wr_reg_1080(ispsoftc_t *isp, int regoff, uint32_t val)
1258 if ((regoff & _BLK_REG_MASK) == SXP_BLOCK) {
1261 * We will assume that someone has paused the RISC processor.
1263 oc = BXR2(isp, IspVirt2Off(isp, BIU_CONF1));
1264 tc = oc & ~BIU_PCI1080_CONF1_DMA;
1265 if (regoff & SXP_BANK1_SELECT)
1266 tc |= BIU_PCI1080_CONF1_SXP1;
1268 tc |= BIU_PCI1080_CONF1_SXP0;
1269 BXW2(isp, IspVirt2Off(isp, BIU_CONF1), tc);
1270 MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, BIU_CONF1), 2, -1);
1271 } else if ((regoff & _BLK_REG_MASK) == DMA_BLOCK) {
1272 oc = BXR2(isp, IspVirt2Off(isp, BIU_CONF1));
1273 BXW2(isp, IspVirt2Off(isp, BIU_CONF1),
1274 oc | BIU_PCI1080_CONF1_DMA);
1275 MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, BIU_CONF1), 2, -1);
1277 BXW2(isp, IspVirt2Off(isp, regoff), val);
1278 MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, regoff), 2, -1);
1280 BXW2(isp, IspVirt2Off(isp, BIU_CONF1), oc);
1281 MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, BIU_CONF1), 2, -1);
1286 isp_pci_rd_reg_2400(ispsoftc_t *isp, int regoff)
1289 int block = regoff & _BLK_REG_MASK;
1295 return (BXR2(isp, IspVirt2Off(isp, regoff)));
1297 isp_prt(isp, ISP_LOGERR, "SXP_BLOCK read at 0x%x", regoff);
1298 return (0xffffffff);
1300 isp_prt(isp, ISP_LOGERR, "RISC_BLOCK read at 0x%x", regoff);
1301 return (0xffffffff);
1303 isp_prt(isp, ISP_LOGERR, "DMA_BLOCK read at 0x%x", regoff);
1304 return (0xffffffff);
1306 isp_prt(isp, ISP_LOGERR, "unknown block read at 0x%x", regoff);
1307 return (0xffffffff);
1311 case BIU2400_FLASH_ADDR:
1312 case BIU2400_FLASH_DATA:
1316 case BIU2400_REQINP:
1317 case BIU2400_REQOUTP:
1318 case BIU2400_RSPINP:
1319 case BIU2400_RSPOUTP:
1320 case BIU2400_PRI_REQINP:
1321 case BIU2400_PRI_REQOUTP:
1322 case BIU2400_ATIO_RSPINP:
1323 case BIU2400_ATIO_RSPOUTP:
1328 rv = BXR4(isp, IspVirt2Off(isp, regoff));
1330 case BIU2400_R2HSTSLO:
1331 rv = BXR4(isp, IspVirt2Off(isp, regoff));
1333 case BIU2400_R2HSTSHI:
1334 rv = BXR4(isp, IspVirt2Off(isp, regoff)) >> 16;
1337 isp_prt(isp, ISP_LOGERR, "unknown register read at 0x%x",
1346 isp_pci_wr_reg_2400(ispsoftc_t *isp, int regoff, uint32_t val)
1348 int block = regoff & _BLK_REG_MASK;
1354 BXW2(isp, IspVirt2Off(isp, regoff), val);
1355 MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, regoff), 2, -1);
1358 isp_prt(isp, ISP_LOGERR, "SXP_BLOCK write at 0x%x", regoff);
1361 isp_prt(isp, ISP_LOGERR, "RISC_BLOCK write at 0x%x", regoff);
1364 isp_prt(isp, ISP_LOGERR, "DMA_BLOCK write at 0x%x", regoff);
1367 isp_prt(isp, ISP_LOGERR, "unknown block write at 0x%x", regoff);
1372 case BIU2400_FLASH_ADDR:
1373 case BIU2400_FLASH_DATA:
1377 case BIU2400_REQINP:
1378 case BIU2400_REQOUTP:
1379 case BIU2400_RSPINP:
1380 case BIU2400_RSPOUTP:
1381 case BIU2400_PRI_REQINP:
1382 case BIU2400_PRI_REQOUTP:
1383 case BIU2400_ATIO_RSPINP:
1384 case BIU2400_ATIO_RSPOUTP:
1389 BXW4(isp, IspVirt2Off(isp, regoff), val);
1390 #ifdef MEMORYBARRIERW
1391 if (regoff == BIU2400_REQINP ||
1392 regoff == BIU2400_RSPOUTP ||
1393 regoff == BIU2400_PRI_REQINP ||
1394 regoff == BIU2400_ATIO_RSPOUTP)
1395 MEMORYBARRIERW(isp, SYNC_REG,
1396 IspVirt2Off(isp, regoff), 4, -1)
1399 MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, regoff), 4, -1);
1402 isp_prt(isp, ISP_LOGERR, "unknown register write at 0x%x",
1409 isp_pci_rd_reg_2600(ispsoftc_t *isp, int regoff)
1414 case BIU2400_PRI_REQINP:
1415 case BIU2400_PRI_REQOUTP:
1416 isp_prt(isp, ISP_LOGERR, "unknown register read at 0x%x",
1420 case BIU2400_REQINP:
1421 rv = B2R4(isp, 0x00);
1423 case BIU2400_REQOUTP:
1424 rv = B2R4(isp, 0x04);
1426 case BIU2400_RSPINP:
1427 rv = B2R4(isp, 0x08);
1429 case BIU2400_RSPOUTP:
1430 rv = B2R4(isp, 0x0c);
1432 case BIU2400_ATIO_RSPINP:
1433 rv = B2R4(isp, 0x10);
1435 case BIU2400_ATIO_RSPOUTP:
1436 rv = B2R4(isp, 0x14);
1439 rv = isp_pci_rd_reg_2400(isp, regoff);
1446 isp_pci_wr_reg_2600(ispsoftc_t *isp, int regoff, uint32_t val)
1451 case BIU2400_PRI_REQINP:
1452 case BIU2400_PRI_REQOUTP:
1453 isp_prt(isp, ISP_LOGERR, "unknown register write at 0x%x",
1456 case BIU2400_REQINP:
1459 case BIU2400_REQOUTP:
1462 case BIU2400_RSPINP:
1465 case BIU2400_RSPOUTP:
1468 case BIU2400_ATIO_RSPINP:
1471 case BIU2400_ATIO_RSPOUTP:
1475 isp_pci_wr_reg_2400(isp, regoff, val);
1478 B2W4(isp, off, val);
1488 imc(void *arg, bus_dma_segment_t *segs, int nseg, int error)
1490 struct imush *imushp = (struct imush *) arg;
1492 if (!(imushp->error = error))
1493 imushp->maddr = segs[0].ds_addr;
1497 isp_pci_mbxdma(ispsoftc_t *isp)
1500 uint32_t len, nsegs;
1501 int i, error, cmap = 0;
1502 bus_size_t slim; /* segment size */
1503 bus_addr_t llim; /* low limit of unavailable dma */
1504 bus_addr_t hlim; /* high limit of unavailable dma */
1508 /* Already been here? If so, leave... */
1509 if (isp->isp_xflist != NULL)
1511 if (isp->isp_rquest != NULL && isp->isp_maxcmds == 0)
1514 if (isp->isp_rquest != NULL)
1517 hlim = BUS_SPACE_MAXADDR;
1518 if (IS_ULTRA2(isp) || IS_FC(isp) || IS_1240(isp)) {
1519 if (sizeof (bus_size_t) > 4)
1520 slim = (bus_size_t) (1ULL << 32);
1522 slim = (bus_size_t) (1UL << 31);
1523 llim = BUS_SPACE_MAXADDR;
1526 llim = BUS_SPACE_MAXADDR_32BIT;
1528 if (sizeof (bus_size_t) > 4)
1529 nsegs = ISP_NSEG64_MAX;
1531 nsegs = ISP_NSEG_MAX;
1533 if (bus_dma_tag_create(bus_get_dma_tag(ISP_PCD(isp)), 1,
1534 slim, llim, hlim, NULL, NULL, BUS_SPACE_MAXSIZE, nsegs, slim, 0,
1535 busdma_lock_mutex, &isp->isp_lock, &isp->isp_osinfo.dmat)) {
1537 isp_prt(isp, ISP_LOGERR, "could not create master dma tag");
1542 * Allocate and map the request queue and a region for external
1543 * DMA addressable command/status structures (22XX and later).
1545 len = ISP_QUEUE_SIZE(RQUEST_QUEUE_LEN(isp));
1546 if (isp->isp_type >= ISP_HA_FC_2200)
1547 len += (N_XCMDS * XCMD_SIZE);
1548 if (bus_dma_tag_create(isp->isp_osinfo.dmat, QENTRY_LEN, slim,
1549 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL,
1550 len, 1, len, 0, busdma_lock_mutex, &isp->isp_lock,
1551 &isp->isp_osinfo.reqdmat)) {
1552 isp_prt(isp, ISP_LOGERR, "cannot create request DMA tag");
1555 if (bus_dmamem_alloc(isp->isp_osinfo.reqdmat, (void **)&base,
1556 BUS_DMA_COHERENT, &isp->isp_osinfo.reqmap) != 0) {
1557 isp_prt(isp, ISP_LOGERR, "cannot allocate request DMA memory");
1558 bus_dma_tag_destroy(isp->isp_osinfo.reqdmat);
1561 isp->isp_rquest = base;
1563 if (bus_dmamap_load(isp->isp_osinfo.reqdmat, isp->isp_osinfo.reqmap,
1564 base, len, imc, &im, 0) || im.error) {
1565 isp_prt(isp, ISP_LOGERR, "error loading request DMA map %d", im.error);
1568 isp_prt(isp, ISP_LOGDEBUG0, "request area @ 0x%jx/0x%jx",
1569 (uintmax_t)im.maddr, (uintmax_t)len);
1570 isp->isp_rquest_dma = im.maddr;
1571 base += ISP_QUEUE_SIZE(RQUEST_QUEUE_LEN(isp));
1572 im.maddr += ISP_QUEUE_SIZE(RQUEST_QUEUE_LEN(isp));
1573 if (isp->isp_type >= ISP_HA_FC_2200) {
1574 isp->isp_osinfo.ecmd_dma = im.maddr;
1575 isp->isp_osinfo.ecmd_free = (isp_ecmd_t *)base;
1576 isp->isp_osinfo.ecmd_base = isp->isp_osinfo.ecmd_free;
1577 for (ecmd = isp->isp_osinfo.ecmd_free;
1578 ecmd < &isp->isp_osinfo.ecmd_free[N_XCMDS]; ecmd++) {
1579 if (ecmd == &isp->isp_osinfo.ecmd_free[N_XCMDS - 1])
1582 ecmd->next = ecmd + 1;
1587 * Allocate and map the result queue.
1589 len = ISP_QUEUE_SIZE(RESULT_QUEUE_LEN(isp));
1590 if (bus_dma_tag_create(isp->isp_osinfo.dmat, QENTRY_LEN, slim,
1591 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL,
1592 len, 1, len, 0, busdma_lock_mutex, &isp->isp_lock,
1593 &isp->isp_osinfo.respdmat)) {
1594 isp_prt(isp, ISP_LOGERR, "cannot create response DMA tag");
1597 if (bus_dmamem_alloc(isp->isp_osinfo.respdmat, (void **)&base,
1598 BUS_DMA_COHERENT, &isp->isp_osinfo.respmap) != 0) {
1599 isp_prt(isp, ISP_LOGERR, "cannot allocate response DMA memory");
1600 bus_dma_tag_destroy(isp->isp_osinfo.respdmat);
1603 isp->isp_result = base;
1605 if (bus_dmamap_load(isp->isp_osinfo.respdmat, isp->isp_osinfo.respmap,
1606 base, len, imc, &im, 0) || im.error) {
1607 isp_prt(isp, ISP_LOGERR, "error loading response DMA map %d", im.error);
1610 isp_prt(isp, ISP_LOGDEBUG0, "response area @ 0x%jx/0x%jx",
1611 (uintmax_t)im.maddr, (uintmax_t)len);
1612 isp->isp_result_dma = im.maddr;
1614 #ifdef ISP_TARGET_MODE
1616 * Allocate and map ATIO queue on 24xx with target mode.
1619 len = ISP_QUEUE_SIZE(RESULT_QUEUE_LEN(isp));
1620 if (bus_dma_tag_create(isp->isp_osinfo.dmat, QENTRY_LEN, slim,
1621 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL,
1622 len, 1, len, 0, busdma_lock_mutex, &isp->isp_lock,
1623 &isp->isp_osinfo.atiodmat)) {
1624 isp_prt(isp, ISP_LOGERR, "cannot create ATIO DMA tag");
1627 if (bus_dmamem_alloc(isp->isp_osinfo.atiodmat, (void **)&base,
1628 BUS_DMA_COHERENT, &isp->isp_osinfo.atiomap) != 0) {
1629 isp_prt(isp, ISP_LOGERR, "cannot allocate ATIO DMA memory");
1630 bus_dma_tag_destroy(isp->isp_osinfo.atiodmat);
1633 isp->isp_atioq = base;
1635 if (bus_dmamap_load(isp->isp_osinfo.atiodmat, isp->isp_osinfo.atiomap,
1636 base, len, imc, &im, 0) || im.error) {
1637 isp_prt(isp, ISP_LOGERR, "error loading ATIO DMA map %d", im.error);
1640 isp_prt(isp, ISP_LOGDEBUG0, "ATIO area @ 0x%jx/0x%jx",
1641 (uintmax_t)im.maddr, (uintmax_t)len);
1642 isp->isp_atioq_dma = im.maddr;
1647 if (bus_dma_tag_create(isp->isp_osinfo.dmat, 64, slim,
1648 BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, NULL, NULL,
1649 2*QENTRY_LEN, 1, 2*QENTRY_LEN, 0, busdma_lock_mutex,
1650 &isp->isp_lock, &isp->isp_osinfo.iocbdmat)) {
1653 if (bus_dmamem_alloc(isp->isp_osinfo.iocbdmat,
1654 (void **)&base, BUS_DMA_COHERENT, &isp->isp_osinfo.iocbmap) != 0)
1656 isp->isp_iocb = base;
1658 if (bus_dmamap_load(isp->isp_osinfo.iocbdmat, isp->isp_osinfo.iocbmap,
1659 base, 2*QENTRY_LEN, imc, &im, 0) || im.error)
1661 isp->isp_iocb_dma = im.maddr;
1663 if (bus_dma_tag_create(isp->isp_osinfo.dmat, 64, slim,
1664 BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, NULL, NULL,
1665 ISP_FC_SCRLEN, 1, ISP_FC_SCRLEN, 0, busdma_lock_mutex,
1666 &isp->isp_lock, &isp->isp_osinfo.scdmat))
1668 for (cmap = 0; cmap < isp->isp_nchan; cmap++) {
1669 struct isp_fc *fc = ISP_FC_PC(isp, cmap);
1670 if (bus_dmamem_alloc(isp->isp_osinfo.scdmat,
1671 (void **)&base, BUS_DMA_COHERENT, &fc->scmap) != 0)
1673 FCPARAM(isp, cmap)->isp_scratch = base;
1675 if (bus_dmamap_load(isp->isp_osinfo.scdmat, fc->scmap,
1676 base, ISP_FC_SCRLEN, imc, &im, 0) || im.error) {
1677 bus_dmamem_free(isp->isp_osinfo.scdmat,
1679 FCPARAM(isp, cmap)->isp_scratch = NULL;
1682 FCPARAM(isp, cmap)->isp_scdma = im.maddr;
1683 if (!IS_2100(isp)) {
1684 for (i = 0; i < INITIAL_NEXUS_COUNT; i++) {
1685 struct isp_nexus *n = malloc(sizeof (struct isp_nexus), M_DEVBUF, M_NOWAIT | M_ZERO);
1687 while (fc->nexus_free_list) {
1688 n = fc->nexus_free_list;
1689 fc->nexus_free_list = n->next;
1694 n->next = fc->nexus_free_list;
1695 fc->nexus_free_list = n;
1701 if (isp->isp_maxcmds == 0) {
1707 len = isp->isp_maxcmds * sizeof (struct isp_pcmd);
1708 isp->isp_osinfo.pcmd_pool = (struct isp_pcmd *)
1709 malloc(len, M_DEVBUF, M_WAITOK | M_ZERO);
1710 for (i = 0; i < isp->isp_maxcmds; i++) {
1711 struct isp_pcmd *pcmd = &isp->isp_osinfo.pcmd_pool[i];
1712 error = bus_dmamap_create(isp->isp_osinfo.dmat, 0, &pcmd->dmap);
1714 isp_prt(isp, ISP_LOGERR, "error %d creating per-cmd DMA maps", error);
1716 bus_dmamap_destroy(isp->isp_osinfo.dmat,
1717 isp->isp_osinfo.pcmd_pool[i].dmap);
1721 callout_init_mtx(&pcmd->wdog, &isp->isp_lock, 0);
1722 if (i == isp->isp_maxcmds-1)
1725 pcmd->next = &isp->isp_osinfo.pcmd_pool[i+1];
1727 isp->isp_osinfo.pcmd_free = &isp->isp_osinfo.pcmd_pool[0];
1729 len = sizeof (isp_hdl_t) * isp->isp_maxcmds;
1730 isp->isp_xflist = (isp_hdl_t *) malloc(len, M_DEVBUF, M_WAITOK | M_ZERO);
1731 for (len = 0; len < isp->isp_maxcmds - 1; len++)
1732 isp->isp_xflist[len].cmd = &isp->isp_xflist[len+1];
1733 isp->isp_xffree = isp->isp_xflist;
1739 isp_pci_mbxdmafree(isp);
1745 isp_pci_mbxdmafree(ispsoftc_t *isp)
1749 if (isp->isp_xflist != NULL) {
1750 free(isp->isp_xflist, M_DEVBUF);
1751 isp->isp_xflist = NULL;
1753 if (isp->isp_osinfo.pcmd_pool != NULL) {
1754 for (i = 0; i < isp->isp_maxcmds; i++) {
1755 bus_dmamap_destroy(isp->isp_osinfo.dmat,
1756 isp->isp_osinfo.pcmd_pool[i].dmap);
1758 free(isp->isp_osinfo.pcmd_pool, M_DEVBUF);
1759 isp->isp_osinfo.pcmd_pool = NULL;
1762 for (i = 0; i < isp->isp_nchan; i++) {
1763 struct isp_fc *fc = ISP_FC_PC(isp, i);
1764 if (FCPARAM(isp, i)->isp_scdma != 0) {
1765 bus_dmamap_unload(isp->isp_osinfo.scdmat,
1767 FCPARAM(isp, i)->isp_scdma = 0;
1769 if (FCPARAM(isp, i)->isp_scratch != NULL) {
1770 bus_dmamem_free(isp->isp_osinfo.scdmat,
1771 FCPARAM(isp, i)->isp_scratch, fc->scmap);
1772 FCPARAM(isp, i)->isp_scratch = NULL;
1774 while (fc->nexus_free_list) {
1775 struct isp_nexus *n = fc->nexus_free_list;
1776 fc->nexus_free_list = n->next;
1780 if (isp->isp_iocb_dma != 0) {
1781 bus_dma_tag_destroy(isp->isp_osinfo.scdmat);
1782 bus_dmamap_unload(isp->isp_osinfo.iocbdmat,
1783 isp->isp_osinfo.iocbmap);
1784 isp->isp_iocb_dma = 0;
1786 if (isp->isp_iocb != NULL) {
1787 bus_dmamem_free(isp->isp_osinfo.iocbdmat,
1788 isp->isp_iocb, isp->isp_osinfo.iocbmap);
1789 bus_dma_tag_destroy(isp->isp_osinfo.iocbdmat);
1792 #ifdef ISP_TARGET_MODE
1794 if (isp->isp_atioq_dma != 0) {
1795 bus_dmamap_unload(isp->isp_osinfo.atiodmat,
1796 isp->isp_osinfo.atiomap);
1797 isp->isp_atioq_dma = 0;
1799 if (isp->isp_atioq != NULL) {
1800 bus_dmamem_free(isp->isp_osinfo.atiodmat, isp->isp_atioq,
1801 isp->isp_osinfo.atiomap);
1802 bus_dma_tag_destroy(isp->isp_osinfo.atiodmat);
1803 isp->isp_atioq = NULL;
1807 if (isp->isp_result_dma != 0) {
1808 bus_dmamap_unload(isp->isp_osinfo.respdmat,
1809 isp->isp_osinfo.respmap);
1810 isp->isp_result_dma = 0;
1812 if (isp->isp_result != NULL) {
1813 bus_dmamem_free(isp->isp_osinfo.respdmat, isp->isp_result,
1814 isp->isp_osinfo.respmap);
1815 bus_dma_tag_destroy(isp->isp_osinfo.respdmat);
1816 isp->isp_result = NULL;
1818 if (isp->isp_rquest_dma != 0) {
1819 bus_dmamap_unload(isp->isp_osinfo.reqdmat,
1820 isp->isp_osinfo.reqmap);
1821 isp->isp_rquest_dma = 0;
1823 if (isp->isp_rquest != NULL) {
1824 bus_dmamem_free(isp->isp_osinfo.reqdmat, isp->isp_rquest,
1825 isp->isp_osinfo.reqmap);
1826 bus_dma_tag_destroy(isp->isp_osinfo.reqdmat);
1827 isp->isp_rquest = NULL;
1834 void *rq; /* original request */
1838 #define MUSHERR_NOQENTRIES -2
1841 dma2(void *arg, bus_dma_segment_t *dm_segs, int nseg, int error)
1843 mush_t *mp = (mush_t *) arg;
1844 ispsoftc_t *isp= mp->isp;
1845 struct ccb_scsiio *csio = mp->cmd_token;
1856 if ((csio->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) {
1857 ddir = ISP_FROM_DEVICE;
1859 ddir = ISP_TO_DEVICE;
1861 if ((csio->ccb_h.func_code == XPT_CONT_TARGET_IO) ^
1862 ((csio->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN)) {
1863 sdir = BUS_DMASYNC_PREREAD;
1865 sdir = BUS_DMASYNC_PREWRITE;
1867 bus_dmamap_sync(isp->isp_osinfo.dmat, PISP_PCMD(csio)->dmap,
1871 error = isp_send_cmd(isp, mp->rq, dm_segs, nseg, XS_XFRLEN(csio),
1872 ddir, (ispds64_t *)csio->req_map);
1875 mp->error = MUSHERR_NOQENTRIES;
1886 isp_pci_dmasetup(ispsoftc_t *isp, struct ccb_scsiio *csio, void *ff)
1893 mp->cmd_token = csio;
1897 error = bus_dmamap_load_ccb(isp->isp_osinfo.dmat, PISP_PCMD(csio)->dmap,
1898 (union ccb *)csio, dma2, mp, 0);
1899 if (error == EINPROGRESS) {
1900 bus_dmamap_unload(isp->isp_osinfo.dmat, PISP_PCMD(csio)->dmap);
1902 isp_prt(isp, ISP_LOGERR, "deferred dma allocation not supported");
1903 } else if (error && mp->error == 0) {
1905 isp_prt(isp, ISP_LOGERR, "error %d in dma mapping code", error);
1910 int retval = CMD_COMPLETE;
1911 if (mp->error == MUSHERR_NOQENTRIES) {
1912 retval = CMD_EAGAIN;
1913 } else if (mp->error == EFBIG) {
1914 csio->ccb_h.status = CAM_REQ_TOO_BIG;
1915 } else if (mp->error == EINVAL) {
1916 csio->ccb_h.status = CAM_REQ_INVALID;
1918 csio->ccb_h.status = CAM_UNREC_HBA_ERROR;
1922 return (CMD_QUEUED);
1926 isp_pci_irqsetup(ispsoftc_t *isp)
1928 device_t dev = isp->isp_osinfo.dev;
1929 struct isp_pcisoftc *pcs = device_get_softc(dev);
1933 /* Allocate IRQs only once. */
1934 if (isp->isp_nirq > 0)
1938 if (ISP_CAP_MSIX(isp)) {
1939 max_irq = min(ISP_MAX_IRQS, IS_26XX(isp) ? 3 : 2);
1940 pcs->msicount = imin(pci_msix_count(dev), max_irq);
1941 if (pcs->msicount > 0 &&
1942 pci_alloc_msix(dev, &pcs->msicount) != 0)
1945 if (pcs->msicount == 0) {
1946 pcs->msicount = imin(pci_msi_count(dev), 1);
1947 if (pcs->msicount > 0 &&
1948 pci_alloc_msi(dev, &pcs->msicount) != 0)
1951 for (i = 0; i < MAX(1, pcs->msicount); i++) {
1952 pcs->irq[i].iqd = i + (pcs->msicount > 0);
1953 pcs->irq[i].irq = bus_alloc_resource_any(dev, SYS_RES_IRQ,
1954 &pcs->irq[i].iqd, RF_ACTIVE | RF_SHAREABLE);
1955 if (pcs->irq[i].irq == NULL) {
1956 device_printf(dev, "could not allocate interrupt\n");
1960 f = isp_platform_intr;
1962 f = isp_platform_intr_resp;
1964 f = isp_platform_intr_atio;
1965 if (bus_setup_intr(dev, pcs->irq[i].irq, ISP_IFLAGS, NULL,
1966 f, isp, &pcs->irq[i].ih)) {
1967 device_printf(dev, "could not setup interrupt\n");
1968 (void) bus_release_resource(dev, SYS_RES_IRQ,
1969 pcs->irq[i].iqd, pcs->irq[i].irq);
1972 if (pcs->msicount > 1) {
1973 bus_describe_intr(dev, pcs->irq[i].irq, pcs->irq[i].ih,
1976 isp->isp_nirq = i + 1;
1980 return (isp->isp_nirq == 0);
1984 isp_pci_dumpregs(ispsoftc_t *isp, const char *msg)
1986 struct isp_pcisoftc *pcs = (struct isp_pcisoftc *)isp;
1988 printf("%s: %s\n", device_get_nameunit(isp->isp_dev), msg);
1990 printf("%s:\n", device_get_nameunit(isp->isp_dev));
1992 printf(" biu_conf1=%x", ISP_READ(isp, BIU_CONF1));
1994 printf(" biu_csr=%x", ISP_READ(isp, BIU2100_CSR));
1995 printf(" biu_icr=%x biu_isr=%x biu_sema=%x ", ISP_READ(isp, BIU_ICR),
1996 ISP_READ(isp, BIU_ISR), ISP_READ(isp, BIU_SEMA));
1997 printf("risc_hccr=%x\n", ISP_READ(isp, HCCR));
2001 ISP_WRITE(isp, HCCR, HCCR_CMD_PAUSE);
2002 printf(" cdma_conf=%x cdma_sts=%x cdma_fifostat=%x\n",
2003 ISP_READ(isp, CDMA_CONF), ISP_READ(isp, CDMA_STATUS),
2004 ISP_READ(isp, CDMA_FIFO_STS));
2005 printf(" ddma_conf=%x ddma_sts=%x ddma_fifostat=%x\n",
2006 ISP_READ(isp, DDMA_CONF), ISP_READ(isp, DDMA_STATUS),
2007 ISP_READ(isp, DDMA_FIFO_STS));
2008 printf(" sxp_int=%x sxp_gross=%x sxp(scsi_ctrl)=%x\n",
2009 ISP_READ(isp, SXP_INTERRUPT),
2010 ISP_READ(isp, SXP_GROSS_ERR),
2011 ISP_READ(isp, SXP_PINS_CTRL));
2012 ISP_WRITE(isp, HCCR, HCCR_CMD_RELEASE);
2014 printf(" mbox regs: %x %x %x %x %x\n",
2015 ISP_READ(isp, OUTMAILBOX0), ISP_READ(isp, OUTMAILBOX1),
2016 ISP_READ(isp, OUTMAILBOX2), ISP_READ(isp, OUTMAILBOX3),
2017 ISP_READ(isp, OUTMAILBOX4));
2018 printf(" PCI Status Command/Status=%x\n",
2019 pci_read_config(pcs->pci_dev, PCIR_COMMAND, 1));