2 * Copyright (c) 1997-2008 by Matthew Jacob
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice immediately at the beginning of the file, without modification,
10 * this list of conditions, and the following disclaimer.
11 * 2. The name of the author may not be used to endorse or promote products
12 * derived from this software without specific prior written permission.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
18 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * PCI specific probe and attach routines for Qlogic ISP SCSI adapters.
30 #include <sys/cdefs.h>
31 __FBSDID("$FreeBSD$");
33 #include <sys/param.h>
34 #include <sys/systm.h>
35 #include <sys/kernel.h>
36 #include <sys/module.h>
37 #include <sys/linker.h>
38 #include <sys/firmware.h>
40 #include <sys/stdint.h>
41 #include <dev/pci/pcireg.h>
42 #include <dev/pci/pcivar.h>
43 #include <machine/bus.h>
44 #include <machine/resource.h>
46 #include <sys/malloc.h>
50 #include <dev/ofw/openfirm.h>
51 #include <machine/ofw_machdep.h>
54 #include <dev/isp/isp_freebsd.h>
56 static uint32_t isp_pci_rd_reg(ispsoftc_t *, int);
57 static void isp_pci_wr_reg(ispsoftc_t *, int, uint32_t);
58 static uint32_t isp_pci_rd_reg_1080(ispsoftc_t *, int);
59 static void isp_pci_wr_reg_1080(ispsoftc_t *, int, uint32_t);
60 static uint32_t isp_pci_rd_reg_2400(ispsoftc_t *, int);
61 static void isp_pci_wr_reg_2400(ispsoftc_t *, int, uint32_t);
62 static int isp_pci_rd_isr(ispsoftc_t *, uint32_t *, uint16_t *, uint16_t *);
63 static int isp_pci_rd_isr_2300(ispsoftc_t *, uint32_t *, uint16_t *, uint16_t *);
64 static int isp_pci_rd_isr_2400(ispsoftc_t *, uint32_t *, uint16_t *, uint16_t *);
65 static int isp_pci_mbxdma(ispsoftc_t *);
66 static int isp_pci_dmasetup(ispsoftc_t *, XS_T *, void *);
69 static void isp_pci_reset0(ispsoftc_t *);
70 static void isp_pci_reset1(ispsoftc_t *);
71 static void isp_pci_dumpregs(ispsoftc_t *, const char *);
73 static struct ispmdvec mdvec = {
79 isp_common_dmateardown,
84 BIU_BURST_ENABLE|BIU_PCI_CONF1_FIFO_64
87 static struct ispmdvec mdvec_1080 = {
93 isp_common_dmateardown,
98 BIU_BURST_ENABLE|BIU_PCI_CONF1_FIFO_64
101 static struct ispmdvec mdvec_12160 = {
107 isp_common_dmateardown,
112 BIU_BURST_ENABLE|BIU_PCI_CONF1_FIFO_64
115 static struct ispmdvec mdvec_2100 = {
121 isp_common_dmateardown,
127 static struct ispmdvec mdvec_2200 = {
133 isp_common_dmateardown,
139 static struct ispmdvec mdvec_2300 = {
145 isp_common_dmateardown,
151 static struct ispmdvec mdvec_2400 = {
157 isp_common_dmateardown,
163 static struct ispmdvec mdvec_2500 = {
169 isp_common_dmateardown,
175 #ifndef PCIM_CMD_INVEN
176 #define PCIM_CMD_INVEN 0x10
178 #ifndef PCIM_CMD_BUSMASTEREN
179 #define PCIM_CMD_BUSMASTEREN 0x0004
181 #ifndef PCIM_CMD_PERRESPEN
182 #define PCIM_CMD_PERRESPEN 0x0040
184 #ifndef PCIM_CMD_SEREN
185 #define PCIM_CMD_SEREN 0x0100
187 #ifndef PCIM_CMD_INTX_DISABLE
188 #define PCIM_CMD_INTX_DISABLE 0x0400
192 #define PCIR_COMMAND 0x04
195 #ifndef PCIR_CACHELNSZ
196 #define PCIR_CACHELNSZ 0x0c
199 #ifndef PCIR_LATTIMER
200 #define PCIR_LATTIMER 0x0d
204 #define PCIR_ROMADDR 0x30
207 #ifndef PCI_VENDOR_QLOGIC
208 #define PCI_VENDOR_QLOGIC 0x1077
211 #ifndef PCI_PRODUCT_QLOGIC_ISP1020
212 #define PCI_PRODUCT_QLOGIC_ISP1020 0x1020
215 #ifndef PCI_PRODUCT_QLOGIC_ISP1080
216 #define PCI_PRODUCT_QLOGIC_ISP1080 0x1080
219 #ifndef PCI_PRODUCT_QLOGIC_ISP10160
220 #define PCI_PRODUCT_QLOGIC_ISP10160 0x1016
223 #ifndef PCI_PRODUCT_QLOGIC_ISP12160
224 #define PCI_PRODUCT_QLOGIC_ISP12160 0x1216
227 #ifndef PCI_PRODUCT_QLOGIC_ISP1240
228 #define PCI_PRODUCT_QLOGIC_ISP1240 0x1240
231 #ifndef PCI_PRODUCT_QLOGIC_ISP1280
232 #define PCI_PRODUCT_QLOGIC_ISP1280 0x1280
235 #ifndef PCI_PRODUCT_QLOGIC_ISP2100
236 #define PCI_PRODUCT_QLOGIC_ISP2100 0x2100
239 #ifndef PCI_PRODUCT_QLOGIC_ISP2200
240 #define PCI_PRODUCT_QLOGIC_ISP2200 0x2200
243 #ifndef PCI_PRODUCT_QLOGIC_ISP2300
244 #define PCI_PRODUCT_QLOGIC_ISP2300 0x2300
247 #ifndef PCI_PRODUCT_QLOGIC_ISP2312
248 #define PCI_PRODUCT_QLOGIC_ISP2312 0x2312
251 #ifndef PCI_PRODUCT_QLOGIC_ISP2322
252 #define PCI_PRODUCT_QLOGIC_ISP2322 0x2322
255 #ifndef PCI_PRODUCT_QLOGIC_ISP2422
256 #define PCI_PRODUCT_QLOGIC_ISP2422 0x2422
259 #ifndef PCI_PRODUCT_QLOGIC_ISP2432
260 #define PCI_PRODUCT_QLOGIC_ISP2432 0x2432
263 #ifndef PCI_PRODUCT_QLOGIC_ISP2532
264 #define PCI_PRODUCT_QLOGIC_ISP2532 0x2532
267 #ifndef PCI_PRODUCT_QLOGIC_ISP6312
268 #define PCI_PRODUCT_QLOGIC_ISP6312 0x6312
271 #ifndef PCI_PRODUCT_QLOGIC_ISP6322
272 #define PCI_PRODUCT_QLOGIC_ISP6322 0x6322
275 #ifndef PCI_PRODUCT_QLOGIC_ISP5432
276 #define PCI_PRODUCT_QLOGIC_ISP5432 0x5432
279 #define PCI_QLOGIC_ISP5432 \
280 ((PCI_PRODUCT_QLOGIC_ISP5432 << 16) | PCI_VENDOR_QLOGIC)
282 #define PCI_QLOGIC_ISP1020 \
283 ((PCI_PRODUCT_QLOGIC_ISP1020 << 16) | PCI_VENDOR_QLOGIC)
285 #define PCI_QLOGIC_ISP1080 \
286 ((PCI_PRODUCT_QLOGIC_ISP1080 << 16) | PCI_VENDOR_QLOGIC)
288 #define PCI_QLOGIC_ISP10160 \
289 ((PCI_PRODUCT_QLOGIC_ISP10160 << 16) | PCI_VENDOR_QLOGIC)
291 #define PCI_QLOGIC_ISP12160 \
292 ((PCI_PRODUCT_QLOGIC_ISP12160 << 16) | PCI_VENDOR_QLOGIC)
294 #define PCI_QLOGIC_ISP1240 \
295 ((PCI_PRODUCT_QLOGIC_ISP1240 << 16) | PCI_VENDOR_QLOGIC)
297 #define PCI_QLOGIC_ISP1280 \
298 ((PCI_PRODUCT_QLOGIC_ISP1280 << 16) | PCI_VENDOR_QLOGIC)
300 #define PCI_QLOGIC_ISP2100 \
301 ((PCI_PRODUCT_QLOGIC_ISP2100 << 16) | PCI_VENDOR_QLOGIC)
303 #define PCI_QLOGIC_ISP2200 \
304 ((PCI_PRODUCT_QLOGIC_ISP2200 << 16) | PCI_VENDOR_QLOGIC)
306 #define PCI_QLOGIC_ISP2300 \
307 ((PCI_PRODUCT_QLOGIC_ISP2300 << 16) | PCI_VENDOR_QLOGIC)
309 #define PCI_QLOGIC_ISP2312 \
310 ((PCI_PRODUCT_QLOGIC_ISP2312 << 16) | PCI_VENDOR_QLOGIC)
312 #define PCI_QLOGIC_ISP2322 \
313 ((PCI_PRODUCT_QLOGIC_ISP2322 << 16) | PCI_VENDOR_QLOGIC)
315 #define PCI_QLOGIC_ISP2422 \
316 ((PCI_PRODUCT_QLOGIC_ISP2422 << 16) | PCI_VENDOR_QLOGIC)
318 #define PCI_QLOGIC_ISP2432 \
319 ((PCI_PRODUCT_QLOGIC_ISP2432 << 16) | PCI_VENDOR_QLOGIC)
321 #define PCI_QLOGIC_ISP2532 \
322 ((PCI_PRODUCT_QLOGIC_ISP2532 << 16) | PCI_VENDOR_QLOGIC)
324 #define PCI_QLOGIC_ISP6312 \
325 ((PCI_PRODUCT_QLOGIC_ISP6312 << 16) | PCI_VENDOR_QLOGIC)
327 #define PCI_QLOGIC_ISP6322 \
328 ((PCI_PRODUCT_QLOGIC_ISP6322 << 16) | PCI_VENDOR_QLOGIC)
331 * Odd case for some AMI raid cards... We need to *not* attach to this.
333 #define AMI_RAID_SUBVENDOR_ID 0x101e
335 #define IO_MAP_REG 0x10
336 #define MEM_MAP_REG 0x14
338 #define PCI_DFLT_LTNCY 0x40
339 #define PCI_DFLT_LNSZ 0x10
341 static int isp_pci_probe (device_t);
342 static int isp_pci_attach (device_t);
343 static int isp_pci_detach (device_t);
346 #define ISP_PCD(isp) ((struct isp_pcisoftc *)isp)->pci_dev
347 struct isp_pcisoftc {
350 struct resource * regs;
356 int16_t pci_poff[_NREG_BLKS];
362 static device_method_t isp_pci_methods[] = {
363 /* Device interface */
364 DEVMETHOD(device_probe, isp_pci_probe),
365 DEVMETHOD(device_attach, isp_pci_attach),
366 DEVMETHOD(device_detach, isp_pci_detach),
370 static driver_t isp_pci_driver = {
371 "isp", isp_pci_methods, sizeof (struct isp_pcisoftc)
373 static devclass_t isp_devclass;
374 DRIVER_MODULE(isp, pci, isp_pci_driver, isp_devclass, 0, 0);
375 MODULE_DEPEND(isp, cam, 1, 1, 1);
376 MODULE_DEPEND(isp, firmware, 1, 1, 1);
377 static int isp_nvports = 0;
380 isp_pci_probe(device_t dev)
382 switch ((pci_get_device(dev) << 16) | (pci_get_vendor(dev))) {
383 case PCI_QLOGIC_ISP1020:
384 device_set_desc(dev, "Qlogic ISP 1020/1040 PCI SCSI Adapter");
386 case PCI_QLOGIC_ISP1080:
387 device_set_desc(dev, "Qlogic ISP 1080 PCI SCSI Adapter");
389 case PCI_QLOGIC_ISP1240:
390 device_set_desc(dev, "Qlogic ISP 1240 PCI SCSI Adapter");
392 case PCI_QLOGIC_ISP1280:
393 device_set_desc(dev, "Qlogic ISP 1280 PCI SCSI Adapter");
395 case PCI_QLOGIC_ISP10160:
396 device_set_desc(dev, "Qlogic ISP 10160 PCI SCSI Adapter");
398 case PCI_QLOGIC_ISP12160:
399 if (pci_get_subvendor(dev) == AMI_RAID_SUBVENDOR_ID) {
402 device_set_desc(dev, "Qlogic ISP 12160 PCI SCSI Adapter");
404 case PCI_QLOGIC_ISP2100:
405 device_set_desc(dev, "Qlogic ISP 2100 PCI FC-AL Adapter");
407 case PCI_QLOGIC_ISP2200:
408 device_set_desc(dev, "Qlogic ISP 2200 PCI FC-AL Adapter");
410 case PCI_QLOGIC_ISP2300:
411 device_set_desc(dev, "Qlogic ISP 2300 PCI FC-AL Adapter");
413 case PCI_QLOGIC_ISP2312:
414 device_set_desc(dev, "Qlogic ISP 2312 PCI FC-AL Adapter");
416 case PCI_QLOGIC_ISP2322:
417 device_set_desc(dev, "Qlogic ISP 2322 PCI FC-AL Adapter");
419 case PCI_QLOGIC_ISP2422:
420 device_set_desc(dev, "Qlogic ISP 2422 PCI FC-AL Adapter");
422 case PCI_QLOGIC_ISP2432:
423 device_set_desc(dev, "Qlogic ISP 2432 PCI FC-AL Adapter");
425 case PCI_QLOGIC_ISP2532:
426 device_set_desc(dev, "Qlogic ISP 2532 PCI FC-AL Adapter");
428 case PCI_QLOGIC_ISP5432:
429 device_set_desc(dev, "Qlogic ISP 5432 PCI FC-AL Adapter");
431 case PCI_QLOGIC_ISP6312:
432 device_set_desc(dev, "Qlogic ISP 6312 PCI FC-AL Adapter");
434 case PCI_QLOGIC_ISP6322:
435 device_set_desc(dev, "Qlogic ISP 6322 PCI FC-AL Adapter");
440 if (isp_announced == 0 && bootverbose) {
441 printf("Qlogic ISP Driver, FreeBSD Version %d.%d, "
442 "Core Version %d.%d\n",
443 ISP_PLATFORM_VERSION_MAJOR, ISP_PLATFORM_VERSION_MINOR,
444 ISP_CORE_VERSION_MAJOR, ISP_CORE_VERSION_MINOR);
448 * XXXX: Here is where we might load the f/w module
449 * XXXX: (or increase a reference count to it).
451 return (BUS_PROBE_DEFAULT);
455 isp_get_generic_options(device_t dev, ispsoftc_t *isp)
460 * Figure out if we're supposed to skip this one.
463 if (resource_int_value(device_get_name(dev), device_get_unit(dev), "disable", &tval) == 0 && tval) {
464 device_printf(dev, "disabled at user request\n");
465 isp->isp_osinfo.disabled = 1;
470 if (resource_int_value(device_get_name(dev), device_get_unit(dev), "fwload_disable", &tval) == 0 && tval != 0) {
471 isp->isp_confopts |= ISP_CFG_NORELOAD;
474 if (resource_int_value(device_get_name(dev), device_get_unit(dev), "ignore_nvram", &tval) == 0 && tval != 0) {
475 isp->isp_confopts |= ISP_CFG_NONVRAM;
478 (void) resource_int_value(device_get_name(dev), device_get_unit(dev), "debug", &tval);
480 isp->isp_dblev = tval;
482 isp->isp_dblev = ISP_LOGWARN|ISP_LOGERR;
485 isp->isp_dblev |= ISP_LOGCONFIG|ISP_LOGINFO;
488 (void) resource_int_value(device_get_name(dev), device_get_unit(dev), "vports", &tval);
489 if (tval > 0 && tval < 127) {
493 (void) resource_int_value(device_get_name(dev), device_get_unit(dev), "autoconfig", &tval);
494 isp_autoconfig = tval;
496 (void) resource_int_value(device_get_name(dev), device_get_unit(dev), "quickboot_time", &tval);
497 isp_quickboot_time = tval;
501 isp_get_pci_options(device_t dev, int *m1, int *m2)
505 * Which we should try first - memory mapping or i/o mapping?
507 * We used to try memory first followed by i/o on alpha, otherwise
508 * the reverse, but we should just try memory first all the time now.
510 *m1 = PCIM_CMD_MEMEN;
511 *m2 = PCIM_CMD_PORTEN;
514 if (resource_int_value(device_get_name(dev), device_get_unit(dev), "prefer_iomap", &tval) == 0 && tval != 0) {
515 *m1 = PCIM_CMD_PORTEN;
516 *m2 = PCIM_CMD_MEMEN;
519 if (resource_int_value(device_get_name(dev), device_get_unit(dev), "prefer_memmap", &tval) == 0 && tval != 0) {
520 *m1 = PCIM_CMD_MEMEN;
521 *m2 = PCIM_CMD_PORTEN;
526 isp_get_specific_options(device_t dev, int chan, ispsoftc_t *isp)
530 char prefix[12], name[16];
535 snprintf(prefix, sizeof(prefix), "chan%d.", chan);
536 snprintf(name, sizeof(name), "%siid", prefix);
537 if (resource_int_value(device_get_name(dev), device_get_unit(dev),
540 ISP_FC_PC(isp, chan)->default_id = 109 - chan;
543 ISP_SPI_PC(isp, chan)->iid = OF_getscsinitid(dev);
545 ISP_SPI_PC(isp, chan)->iid = 7;
550 ISP_FC_PC(isp, chan)->default_id = tval - chan;
552 ISP_SPI_PC(isp, chan)->iid = tval;
554 isp->isp_confopts |= ISP_CFG_OWNLOOPID;
558 snprintf(name, sizeof(name), "%srole", prefix);
559 if (resource_int_value(device_get_name(dev), device_get_unit(dev),
563 case ISP_ROLE_INITIATOR:
564 case ISP_ROLE_TARGET:
566 device_printf(dev, "Chan %d setting role to 0x%x\n", chan, tval);
574 tval = ISP_DEFAULT_ROLES;
578 ISP_SPI_PC(isp, chan)->def_role = tval;
581 ISP_FC_PC(isp, chan)->def_role = tval;
584 snprintf(name, sizeof(name), "%sfullduplex", prefix);
585 if (resource_int_value(device_get_name(dev), device_get_unit(dev),
586 name, &tval) == 0 && tval != 0) {
587 isp->isp_confopts |= ISP_CFG_FULL_DUPLEX;
590 snprintf(name, sizeof(name), "%stopology", prefix);
591 if (resource_string_value(device_get_name(dev), device_get_unit(dev),
592 name, (const char **) &sptr) == 0 && sptr != 0) {
593 if (strcmp(sptr, "lport") == 0) {
594 isp->isp_confopts |= ISP_CFG_LPORT;
595 } else if (strcmp(sptr, "nport") == 0) {
596 isp->isp_confopts |= ISP_CFG_NPORT;
597 } else if (strcmp(sptr, "lport-only") == 0) {
598 isp->isp_confopts |= ISP_CFG_LPORT_ONLY;
599 } else if (strcmp(sptr, "nport-only") == 0) {
600 isp->isp_confopts |= ISP_CFG_NPORT_ONLY;
605 snprintf(name, sizeof(name), "%snofctape", prefix);
606 (void) resource_int_value(device_get_name(dev), device_get_unit(dev),
609 isp->isp_confopts |= ISP_CFG_NOFCTAPE;
613 snprintf(name, sizeof(name), "%sfctape", prefix);
614 (void) resource_int_value(device_get_name(dev), device_get_unit(dev),
617 isp->isp_confopts &= ~ISP_CFG_NOFCTAPE;
618 isp->isp_confopts |= ISP_CFG_FCTAPE;
623 * Because the resource_*_value functions can neither return
624 * 64 bit integer values, nor can they be directly coerced
625 * to interpret the right hand side of the assignment as
626 * you want them to interpret it, we have to force WWN
627 * hint replacement to specify WWN strings with a leading
628 * 'w' (e..g w50000000aaaa0001). Sigh.
631 snprintf(name, sizeof(name), "%sportwwn", prefix);
632 tval = resource_string_value(device_get_name(dev), device_get_unit(dev),
633 name, (const char **) &sptr);
634 if (tval == 0 && sptr != 0 && *sptr++ == 'w') {
636 ISP_FC_PC(isp, chan)->def_wwpn = strtouq(sptr, &eptr, 16);
637 if (eptr < sptr + 16 || ISP_FC_PC(isp, chan)->def_wwpn == -1) {
638 device_printf(dev, "mangled portwwn hint '%s'\n", sptr);
639 ISP_FC_PC(isp, chan)->def_wwpn = 0;
644 snprintf(name, sizeof(name), "%snodewwn", prefix);
645 tval = resource_string_value(device_get_name(dev), device_get_unit(dev),
646 name, (const char **) &sptr);
647 if (tval == 0 && sptr != 0 && *sptr++ == 'w') {
649 ISP_FC_PC(isp, chan)->def_wwnn = strtouq(sptr, &eptr, 16);
650 if (eptr < sptr + 16 || ISP_FC_PC(isp, chan)->def_wwnn == 0) {
651 device_printf(dev, "mangled nodewwn hint '%s'\n", sptr);
652 ISP_FC_PC(isp, chan)->def_wwnn = 0;
657 snprintf(name, sizeof(name), "%shysteresis", prefix);
658 (void) resource_int_value(device_get_name(dev), device_get_unit(dev),
660 if (tval >= 0 && tval < 256) {
661 ISP_FC_PC(isp, chan)->hysteresis = tval;
663 ISP_FC_PC(isp, chan)->hysteresis = isp_fabric_hysteresis;
667 snprintf(name, sizeof(name), "%sloop_down_limit", prefix);
668 (void) resource_int_value(device_get_name(dev), device_get_unit(dev),
670 if (tval >= 0 && tval < 0xffff) {
671 ISP_FC_PC(isp, chan)->loop_down_limit = tval;
673 ISP_FC_PC(isp, chan)->loop_down_limit = isp_loop_down_limit;
677 snprintf(name, sizeof(name), "%sgone_device_time", prefix);
678 (void) resource_int_value(device_get_name(dev), device_get_unit(dev),
680 if (tval >= 0 && tval < 0xffff) {
681 ISP_FC_PC(isp, chan)->gone_device_time = tval;
683 ISP_FC_PC(isp, chan)->gone_device_time = isp_gone_device_time;
688 isp_pci_attach(device_t dev)
690 int i, m1, m2, locksetup = 0;
691 uint32_t data, cmd, linesz, did;
692 struct isp_pcisoftc *pcs;
697 pcs = device_get_softc(dev);
699 device_printf(dev, "cannot get softc\n");
702 memset(pcs, 0, sizeof (*pcs));
708 if (sizeof (bus_addr_t) > 4)
709 isp->isp_osinfo.sixtyfourbit = 1;
712 * Get Generic Options
715 isp_get_generic_options(dev, isp);
718 * Check to see if options have us disabled
720 if (isp->isp_osinfo.disabled) {
722 * But return zero to preserve unit numbering
728 * Get PCI options- which in this case are just mapping preferences.
730 isp_get_pci_options(dev, &m1, &m2);
732 linesz = PCI_DFLT_LNSZ;
733 pcs->irq = pcs->regs = NULL;
734 pcs->rgd = pcs->rtp = pcs->iqd = 0;
736 pcs->rtp = (m1 == PCIM_CMD_MEMEN)? SYS_RES_MEMORY : SYS_RES_IOPORT;
737 pcs->rgd = (m1 == PCIM_CMD_MEMEN)? MEM_MAP_REG : IO_MAP_REG;
738 pcs->regs = bus_alloc_resource_any(dev, pcs->rtp, &pcs->rgd, RF_ACTIVE);
739 if (pcs->regs == NULL) {
740 pcs->rtp = (m2 == PCIM_CMD_MEMEN)? SYS_RES_MEMORY : SYS_RES_IOPORT;
741 pcs->rgd = (m2 == PCIM_CMD_MEMEN)? MEM_MAP_REG : IO_MAP_REG;
742 pcs->regs = bus_alloc_resource_any(dev, pcs->rtp, &pcs->rgd, RF_ACTIVE);
744 if (pcs->regs == NULL) {
745 device_printf(dev, "unable to map any ports\n");
749 device_printf(dev, "using %s space register mapping\n", (pcs->rgd == IO_MAP_REG)? "I/O" : "Memory");
751 isp->isp_bus_tag = rman_get_bustag(pcs->regs);
752 isp->isp_bus_handle = rman_get_bushandle(pcs->regs);
755 pcs->pci_poff[BIU_BLOCK >> _BLK_REG_SHFT] = BIU_REGS_OFF;
756 pcs->pci_poff[MBOX_BLOCK >> _BLK_REG_SHFT] = PCI_MBOX_REGS_OFF;
757 pcs->pci_poff[SXP_BLOCK >> _BLK_REG_SHFT] = PCI_SXP_REGS_OFF;
758 pcs->pci_poff[RISC_BLOCK >> _BLK_REG_SHFT] = PCI_RISC_REGS_OFF;
759 pcs->pci_poff[DMA_BLOCK >> _BLK_REG_SHFT] = DMA_REGS_OFF;
761 switch (pci_get_devid(dev)) {
762 case PCI_QLOGIC_ISP1020:
764 isp->isp_mdvec = &mdvec;
765 isp->isp_type = ISP_HA_SCSI_UNKNOWN;
767 case PCI_QLOGIC_ISP1080:
769 isp->isp_mdvec = &mdvec_1080;
770 isp->isp_type = ISP_HA_SCSI_1080;
771 pcs->pci_poff[DMA_BLOCK >> _BLK_REG_SHFT] = ISP1080_DMA_REGS_OFF;
773 case PCI_QLOGIC_ISP1240:
775 isp->isp_mdvec = &mdvec_1080;
776 isp->isp_type = ISP_HA_SCSI_1240;
778 pcs->pci_poff[DMA_BLOCK >> _BLK_REG_SHFT] = ISP1080_DMA_REGS_OFF;
780 case PCI_QLOGIC_ISP1280:
782 isp->isp_mdvec = &mdvec_1080;
783 isp->isp_type = ISP_HA_SCSI_1280;
784 pcs->pci_poff[DMA_BLOCK >> _BLK_REG_SHFT] = ISP1080_DMA_REGS_OFF;
786 case PCI_QLOGIC_ISP10160:
788 isp->isp_mdvec = &mdvec_12160;
789 isp->isp_type = ISP_HA_SCSI_10160;
790 pcs->pci_poff[DMA_BLOCK >> _BLK_REG_SHFT] = ISP1080_DMA_REGS_OFF;
792 case PCI_QLOGIC_ISP12160:
795 isp->isp_mdvec = &mdvec_12160;
796 isp->isp_type = ISP_HA_SCSI_12160;
797 pcs->pci_poff[DMA_BLOCK >> _BLK_REG_SHFT] = ISP1080_DMA_REGS_OFF;
799 case PCI_QLOGIC_ISP2100:
801 isp->isp_mdvec = &mdvec_2100;
802 isp->isp_type = ISP_HA_FC_2100;
803 pcs->pci_poff[MBOX_BLOCK >> _BLK_REG_SHFT] = PCI_MBOX_REGS2100_OFF;
804 if (pci_get_revid(dev) < 3) {
806 * XXX: Need to get the actual revision
807 * XXX: number of the 2100 FB. At any rate,
808 * XXX: lower cache line size for early revision
814 case PCI_QLOGIC_ISP2200:
816 isp->isp_mdvec = &mdvec_2200;
817 isp->isp_type = ISP_HA_FC_2200;
818 pcs->pci_poff[MBOX_BLOCK >> _BLK_REG_SHFT] = PCI_MBOX_REGS2100_OFF;
820 case PCI_QLOGIC_ISP2300:
822 isp->isp_mdvec = &mdvec_2300;
823 isp->isp_type = ISP_HA_FC_2300;
824 pcs->pci_poff[MBOX_BLOCK >> _BLK_REG_SHFT] = PCI_MBOX_REGS2300_OFF;
826 case PCI_QLOGIC_ISP2312:
827 case PCI_QLOGIC_ISP6312:
829 isp->isp_mdvec = &mdvec_2300;
830 isp->isp_type = ISP_HA_FC_2312;
831 pcs->pci_poff[MBOX_BLOCK >> _BLK_REG_SHFT] = PCI_MBOX_REGS2300_OFF;
833 case PCI_QLOGIC_ISP2322:
834 case PCI_QLOGIC_ISP6322:
836 isp->isp_mdvec = &mdvec_2300;
837 isp->isp_type = ISP_HA_FC_2322;
838 pcs->pci_poff[MBOX_BLOCK >> _BLK_REG_SHFT] = PCI_MBOX_REGS2300_OFF;
840 case PCI_QLOGIC_ISP2422:
841 case PCI_QLOGIC_ISP2432:
843 isp->isp_nchan += isp_nvports;
844 isp->isp_mdvec = &mdvec_2400;
845 isp->isp_type = ISP_HA_FC_2400;
846 pcs->pci_poff[MBOX_BLOCK >> _BLK_REG_SHFT] = PCI_MBOX_REGS2400_OFF;
848 case PCI_QLOGIC_ISP2532:
850 isp->isp_nchan += isp_nvports;
851 isp->isp_mdvec = &mdvec_2500;
852 isp->isp_type = ISP_HA_FC_2500;
853 pcs->pci_poff[MBOX_BLOCK >> _BLK_REG_SHFT] = PCI_MBOX_REGS2400_OFF;
855 case PCI_QLOGIC_ISP5432:
857 isp->isp_mdvec = &mdvec_2500;
858 isp->isp_type = ISP_HA_FC_2500;
859 pcs->pci_poff[MBOX_BLOCK >> _BLK_REG_SHFT] = PCI_MBOX_REGS2400_OFF;
862 device_printf(dev, "unknown device type\n");
866 isp->isp_revision = pci_get_revid(dev);
869 psize = sizeof (fcparam);
870 xsize = sizeof (struct isp_fc);
872 psize = sizeof (sdparam);
873 xsize = sizeof (struct isp_spi);
875 psize *= isp->isp_nchan;
876 xsize *= isp->isp_nchan;
877 isp->isp_param = malloc(psize, M_DEVBUF, M_NOWAIT | M_ZERO);
878 if (isp->isp_param == NULL) {
879 device_printf(dev, "cannot allocate parameter data\n");
882 isp->isp_osinfo.pc.ptr = malloc(xsize, M_DEVBUF, M_NOWAIT | M_ZERO);
883 if (isp->isp_osinfo.pc.ptr == NULL) {
884 device_printf(dev, "cannot allocate parameter data\n");
889 * Now that we know who we are (roughly) get/set specific options
891 for (i = 0; i < isp->isp_nchan; i++) {
892 isp_get_specific_options(dev, i, isp);
896 * The 'it' suffix really only matters for SCSI cards in target mode.
898 isp->isp_osinfo.fw = NULL;
899 if (IS_SCSI(isp) && (ISP_SPI_PC(isp, 0)->def_role & ISP_ROLE_TARGET)) {
900 snprintf(fwname, sizeof (fwname), "isp_%04x_it", did);
901 isp->isp_osinfo.fw = firmware_get(fwname);
903 if (isp->isp_osinfo.fw == NULL) {
904 snprintf(fwname, sizeof (fwname), "isp_%04x", did);
905 isp->isp_osinfo.fw = firmware_get(fwname);
907 if (isp->isp_osinfo.fw != NULL) {
908 isp_prt(isp, ISP_LOGCONFIG, "loaded firmware %s", fwname);
909 isp->isp_mdvec->dv_ispfw = isp->isp_osinfo.fw->data;
913 * Make sure that SERR, PERR, WRITE INVALIDATE and BUSMASTER are set.
915 cmd = pci_read_config(dev, PCIR_COMMAND, 2);
916 cmd |= PCIM_CMD_SEREN | PCIM_CMD_PERRESPEN | PCIM_CMD_BUSMASTEREN | PCIM_CMD_INVEN;
917 if (IS_2300(isp)) { /* per QLogic errata */
918 cmd &= ~PCIM_CMD_INVEN;
920 if (IS_2322(isp) || pci_get_devid(dev) == PCI_QLOGIC_ISP6312) {
921 cmd &= ~PCIM_CMD_INTX_DISABLE;
924 cmd &= ~PCIM_CMD_INTX_DISABLE;
926 pci_write_config(dev, PCIR_COMMAND, cmd, 2);
929 * Make sure the Cache Line Size register is set sensibly.
931 data = pci_read_config(dev, PCIR_CACHELNSZ, 1);
932 if (data == 0 || (linesz != PCI_DFLT_LNSZ && data != linesz)) {
933 isp_prt(isp, ISP_LOGDEBUG0, "set PCI line size to %d from %d", linesz, data);
935 pci_write_config(dev, PCIR_CACHELNSZ, data, 1);
939 * Make sure the Latency Timer is sane.
941 data = pci_read_config(dev, PCIR_LATTIMER, 1);
942 if (data < PCI_DFLT_LTNCY) {
943 data = PCI_DFLT_LTNCY;
944 isp_prt(isp, ISP_LOGDEBUG0, "set PCI latency to %d", data);
945 pci_write_config(dev, PCIR_LATTIMER, data, 1);
949 * Make sure we've disabled the ROM.
951 data = pci_read_config(dev, PCIR_ROMADDR, 4);
953 pci_write_config(dev, PCIR_ROMADDR, data, 4);
958 * NB: MSI-X needs to be disabled for the 2432 (PCI-Express)
960 if (IS_24XX(isp) || IS_2322(isp)) {
961 pcs->msicount = pci_msi_count(dev);
962 if (pcs->msicount > 1) {
965 if (pci_alloc_msi(dev, &pcs->msicount) == 0) {
971 pcs->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &pcs->iqd, RF_ACTIVE | RF_SHAREABLE);
972 if (pcs->irq == NULL) {
973 device_printf(dev, "could not allocate interrupt\n");
977 /* Make sure the lock is set up. */
978 mtx_init(&isp->isp_osinfo.lock, "isp", NULL, MTX_DEF);
981 if (isp_setup_intr(dev, pcs->irq, ISP_IFLAGS, NULL, isp_platform_intr, isp, &pcs->ih)) {
982 device_printf(dev, "could not setup interrupt\n");
987 * Last minute checks...
989 if (IS_23XX(isp) || IS_24XX(isp)) {
990 isp->isp_port = pci_get_function(dev);
994 * Make sure we're in reset state.
998 if (isp->isp_state != ISP_RESETSTATE) {
1003 if (isp->isp_state == ISP_INITSTATE) {
1004 isp->isp_state = ISP_RUNSTATE;
1007 if (isp_attach(isp)) {
1017 (void) bus_teardown_intr(dev, pcs->irq, pcs->ih);
1020 mtx_destroy(&isp->isp_osinfo.lock);
1023 (void) bus_release_resource(dev, SYS_RES_IRQ, pcs->iqd, pcs->irq);
1025 if (pcs->msicount) {
1026 pci_release_msi(dev);
1029 (void) bus_release_resource(dev, pcs->rtp, pcs->rgd, pcs->regs);
1031 if (pcs->pci_isp.isp_param) {
1032 free(pcs->pci_isp.isp_param, M_DEVBUF);
1033 pcs->pci_isp.isp_param = NULL;
1035 if (pcs->pci_isp.isp_osinfo.pc.ptr) {
1036 free(pcs->pci_isp.isp_osinfo.pc.ptr, M_DEVBUF);
1037 pcs->pci_isp.isp_osinfo.pc.ptr = NULL;
1043 isp_pci_detach(device_t dev)
1045 struct isp_pcisoftc *pcs;
1049 pcs = device_get_softc(dev);
1053 isp = (ispsoftc_t *) pcs;
1054 status = isp_detach(isp);
1060 (void) bus_teardown_intr(dev, pcs->irq, pcs->ih);
1063 mtx_destroy(&isp->isp_osinfo.lock);
1064 (void) bus_release_resource(dev, SYS_RES_IRQ, pcs->iqd, pcs->irq);
1065 if (pcs->msicount) {
1066 pci_release_msi(dev);
1068 (void) bus_release_resource(dev, pcs->rtp, pcs->rgd, pcs->regs);
1070 * XXX: THERE IS A LOT OF LEAKAGE HERE
1072 if (pcs->pci_isp.isp_param) {
1073 free(pcs->pci_isp.isp_param, M_DEVBUF);
1074 pcs->pci_isp.isp_param = NULL;
1076 if (pcs->pci_isp.isp_osinfo.pc.ptr) {
1077 free(pcs->pci_isp.isp_osinfo.pc.ptr, M_DEVBUF);
1078 pcs->pci_isp.isp_osinfo.pc.ptr = NULL;
1083 #define IspVirt2Off(a, x) \
1084 (((struct isp_pcisoftc *)a)->pci_poff[((x) & _BLK_REG_MASK) >> \
1085 _BLK_REG_SHFT] + ((x) & 0xfff))
1087 #define BXR2(isp, off) \
1088 bus_space_read_2(isp->isp_bus_tag, isp->isp_bus_handle, off)
1089 #define BXW2(isp, off, v) \
1090 bus_space_write_2(isp->isp_bus_tag, isp->isp_bus_handle, off, v)
1091 #define BXR4(isp, off) \
1092 bus_space_read_4(isp->isp_bus_tag, isp->isp_bus_handle, off)
1093 #define BXW4(isp, off, v) \
1094 bus_space_write_4(isp->isp_bus_tag, isp->isp_bus_handle, off, v)
1097 static ISP_INLINE int
1098 isp_pci_rd_debounced(ispsoftc_t *isp, int off, uint16_t *rp)
1100 uint32_t val0, val1;
1104 val0 = BXR2(isp, IspVirt2Off(isp, off));
1105 val1 = BXR2(isp, IspVirt2Off(isp, off));
1106 } while (val0 != val1 && ++i < 1000);
1115 isp_pci_rd_isr(ispsoftc_t *isp, uint32_t *isrp, uint16_t *semap, uint16_t *mbp)
1120 if (isp_pci_rd_debounced(isp, BIU_ISR, &isr)) {
1123 if (isp_pci_rd_debounced(isp, BIU_SEMA, &sema)) {
1127 isr = BXR2(isp, IspVirt2Off(isp, BIU_ISR));
1128 sema = BXR2(isp, IspVirt2Off(isp, BIU_SEMA));
1130 isp_prt(isp, ISP_LOGDEBUG3, "ISR 0x%x SEMA 0x%x", isr, sema);
1131 isr &= INT_PENDING_MASK(isp);
1132 sema &= BIU_SEMA_LOCK;
1133 if (isr == 0 && sema == 0) {
1137 if ((*semap = sema) != 0) {
1139 if (isp_pci_rd_debounced(isp, OUTMAILBOX0, mbp)) {
1143 *mbp = BXR2(isp, IspVirt2Off(isp, OUTMAILBOX0));
1150 isp_pci_rd_isr_2300(ispsoftc_t *isp, uint32_t *isrp, uint16_t *semap, uint16_t *mbox0p)
1155 if (!(BXR2(isp, IspVirt2Off(isp, BIU_ISR) & BIU2100_ISR_RISC_INT))) {
1159 r2hisr = BXR4(isp, IspVirt2Off(isp, BIU_R2HSTSLO));
1160 isp_prt(isp, ISP_LOGDEBUG3, "RISC2HOST ISR 0x%x", r2hisr);
1161 if ((r2hisr & BIU_R2HST_INTR) == 0) {
1165 switch (r2hisr & BIU_R2HST_ISTAT_MASK) {
1166 case ISPR2HST_ROM_MBX_OK:
1167 case ISPR2HST_ROM_MBX_FAIL:
1168 case ISPR2HST_MBX_OK:
1169 case ISPR2HST_MBX_FAIL:
1170 case ISPR2HST_ASYNC_EVENT:
1171 *isrp = r2hisr & 0xffff;
1172 *mbox0p = (r2hisr >> 16);
1175 case ISPR2HST_RIO_16:
1176 *isrp = r2hisr & 0xffff;
1177 *mbox0p = ASYNC_RIO16_1;
1180 case ISPR2HST_FPOST:
1181 *isrp = r2hisr & 0xffff;
1182 *mbox0p = ASYNC_CMD_CMPLT;
1185 case ISPR2HST_FPOST_CTIO:
1186 *isrp = r2hisr & 0xffff;
1187 *mbox0p = ASYNC_CTIO_DONE;
1190 case ISPR2HST_RSPQ_UPDATE:
1191 *isrp = r2hisr & 0xffff;
1196 hccr = ISP_READ(isp, HCCR);
1197 if (hccr & HCCR_PAUSE) {
1198 ISP_WRITE(isp, HCCR, HCCR_RESET);
1199 isp_prt(isp, ISP_LOGERR, "RISC paused at interrupt (%x->%x)", hccr, ISP_READ(isp, HCCR));
1200 ISP_WRITE(isp, BIU_ICR, 0);
1202 isp_prt(isp, ISP_LOGERR, "unknown interrupt 0x%x\n", r2hisr);
1209 isp_pci_rd_isr_2400(ispsoftc_t *isp, uint32_t *isrp, uint16_t *semap, uint16_t *mbox0p)
1213 r2hisr = BXR4(isp, IspVirt2Off(isp, BIU2400_R2HSTSLO));
1214 isp_prt(isp, ISP_LOGDEBUG3, "RISC2HOST ISR 0x%x", r2hisr);
1215 if ((r2hisr & BIU2400_R2HST_INTR) == 0) {
1219 switch (r2hisr & BIU2400_R2HST_ISTAT_MASK) {
1220 case ISP2400R2HST_ROM_MBX_OK:
1221 case ISP2400R2HST_ROM_MBX_FAIL:
1222 case ISP2400R2HST_MBX_OK:
1223 case ISP2400R2HST_MBX_FAIL:
1224 case ISP2400R2HST_ASYNC_EVENT:
1225 *isrp = r2hisr & 0xffff;
1226 *mbox0p = (r2hisr >> 16);
1229 case ISP2400R2HST_RSPQ_UPDATE:
1230 case ISP2400R2HST_ATIO_RSPQ_UPDATE:
1231 case ISP2400R2HST_ATIO_RQST_UPDATE:
1232 *isrp = r2hisr & 0xffff;
1237 ISP_WRITE(isp, BIU2400_HCCR, HCCR_2400_CMD_CLEAR_RISC_INT);
1238 isp_prt(isp, ISP_LOGERR, "unknown interrupt 0x%x\n", r2hisr);
1244 isp_pci_rd_reg(ispsoftc_t *isp, int regoff)
1249 if ((regoff & _BLK_REG_MASK) == SXP_BLOCK) {
1251 * We will assume that someone has paused the RISC processor.
1253 oldconf = BXR2(isp, IspVirt2Off(isp, BIU_CONF1));
1254 BXW2(isp, IspVirt2Off(isp, BIU_CONF1), oldconf | BIU_PCI_CONF1_SXP);
1255 MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, BIU_CONF1), 2, -1);
1257 rv = BXR2(isp, IspVirt2Off(isp, regoff));
1258 if ((regoff & _BLK_REG_MASK) == SXP_BLOCK) {
1259 BXW2(isp, IspVirt2Off(isp, BIU_CONF1), oldconf);
1260 MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, BIU_CONF1), 2, -1);
1266 isp_pci_wr_reg(ispsoftc_t *isp, int regoff, uint32_t val)
1270 if ((regoff & _BLK_REG_MASK) == SXP_BLOCK) {
1272 * We will assume that someone has paused the RISC processor.
1274 oldconf = BXR2(isp, IspVirt2Off(isp, BIU_CONF1));
1275 BXW2(isp, IspVirt2Off(isp, BIU_CONF1),
1276 oldconf | BIU_PCI_CONF1_SXP);
1277 MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, BIU_CONF1), 2, -1);
1279 BXW2(isp, IspVirt2Off(isp, regoff), val);
1280 MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, regoff), 2, -1);
1281 if ((regoff & _BLK_REG_MASK) == SXP_BLOCK) {
1282 BXW2(isp, IspVirt2Off(isp, BIU_CONF1), oldconf);
1283 MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, BIU_CONF1), 2, -1);
1289 isp_pci_rd_reg_1080(ispsoftc_t *isp, int regoff)
1291 uint32_t rv, oc = 0;
1293 if ((regoff & _BLK_REG_MASK) == SXP_BLOCK) {
1296 * We will assume that someone has paused the RISC processor.
1298 oc = BXR2(isp, IspVirt2Off(isp, BIU_CONF1));
1299 tc = oc & ~BIU_PCI1080_CONF1_DMA;
1300 if (regoff & SXP_BANK1_SELECT)
1301 tc |= BIU_PCI1080_CONF1_SXP1;
1303 tc |= BIU_PCI1080_CONF1_SXP0;
1304 BXW2(isp, IspVirt2Off(isp, BIU_CONF1), tc);
1305 MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, BIU_CONF1), 2, -1);
1306 } else if ((regoff & _BLK_REG_MASK) == DMA_BLOCK) {
1307 oc = BXR2(isp, IspVirt2Off(isp, BIU_CONF1));
1308 BXW2(isp, IspVirt2Off(isp, BIU_CONF1),
1309 oc | BIU_PCI1080_CONF1_DMA);
1310 MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, BIU_CONF1), 2, -1);
1312 rv = BXR2(isp, IspVirt2Off(isp, regoff));
1314 BXW2(isp, IspVirt2Off(isp, BIU_CONF1), oc);
1315 MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, BIU_CONF1), 2, -1);
1321 isp_pci_wr_reg_1080(ispsoftc_t *isp, int regoff, uint32_t val)
1325 if ((regoff & _BLK_REG_MASK) == SXP_BLOCK) {
1328 * We will assume that someone has paused the RISC processor.
1330 oc = BXR2(isp, IspVirt2Off(isp, BIU_CONF1));
1331 tc = oc & ~BIU_PCI1080_CONF1_DMA;
1332 if (regoff & SXP_BANK1_SELECT)
1333 tc |= BIU_PCI1080_CONF1_SXP1;
1335 tc |= BIU_PCI1080_CONF1_SXP0;
1336 BXW2(isp, IspVirt2Off(isp, BIU_CONF1), tc);
1337 MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, BIU_CONF1), 2, -1);
1338 } else if ((regoff & _BLK_REG_MASK) == DMA_BLOCK) {
1339 oc = BXR2(isp, IspVirt2Off(isp, BIU_CONF1));
1340 BXW2(isp, IspVirt2Off(isp, BIU_CONF1),
1341 oc | BIU_PCI1080_CONF1_DMA);
1342 MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, BIU_CONF1), 2, -1);
1344 BXW2(isp, IspVirt2Off(isp, regoff), val);
1345 MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, regoff), 2, -1);
1347 BXW2(isp, IspVirt2Off(isp, BIU_CONF1), oc);
1348 MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, BIU_CONF1), 2, -1);
1353 isp_pci_rd_reg_2400(ispsoftc_t *isp, int regoff)
1356 int block = regoff & _BLK_REG_MASK;
1362 return (BXR2(isp, IspVirt2Off(isp, regoff)));
1364 isp_prt(isp, ISP_LOGWARN, "SXP_BLOCK read at 0x%x", regoff);
1365 return (0xffffffff);
1367 isp_prt(isp, ISP_LOGWARN, "RISC_BLOCK read at 0x%x", regoff);
1368 return (0xffffffff);
1370 isp_prt(isp, ISP_LOGWARN, "DMA_BLOCK read at 0x%x", regoff);
1371 return (0xffffffff);
1373 isp_prt(isp, ISP_LOGWARN, "unknown block read at 0x%x", regoff);
1374 return (0xffffffff);
1379 case BIU2400_FLASH_ADDR:
1380 case BIU2400_FLASH_DATA:
1384 case BIU2400_REQINP:
1385 case BIU2400_REQOUTP:
1386 case BIU2400_RSPINP:
1387 case BIU2400_RSPOUTP:
1388 case BIU2400_PRI_REQINP:
1389 case BIU2400_PRI_REQOUTP:
1390 case BIU2400_ATIO_RSPINP:
1391 case BIU2400_ATIO_RSPOUTP:
1396 rv = BXR4(isp, IspVirt2Off(isp, regoff));
1398 case BIU2400_R2HSTSLO:
1399 rv = BXR4(isp, IspVirt2Off(isp, regoff));
1401 case BIU2400_R2HSTSHI:
1402 rv = BXR4(isp, IspVirt2Off(isp, regoff)) >> 16;
1405 isp_prt(isp, ISP_LOGERR,
1406 "isp_pci_rd_reg_2400: unknown offset %x", regoff);
1414 isp_pci_wr_reg_2400(ispsoftc_t *isp, int regoff, uint32_t val)
1416 int block = regoff & _BLK_REG_MASK;
1422 BXW2(isp, IspVirt2Off(isp, regoff), val);
1423 MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, regoff), 2, -1);
1426 isp_prt(isp, ISP_LOGWARN, "SXP_BLOCK write at 0x%x", regoff);
1429 isp_prt(isp, ISP_LOGWARN, "RISC_BLOCK write at 0x%x", regoff);
1432 isp_prt(isp, ISP_LOGWARN, "DMA_BLOCK write at 0x%x", regoff);
1435 isp_prt(isp, ISP_LOGWARN, "unknown block write at 0x%x",
1441 case BIU2400_FLASH_ADDR:
1442 case BIU2400_FLASH_DATA:
1446 case BIU2400_REQINP:
1447 case BIU2400_REQOUTP:
1448 case BIU2400_RSPINP:
1449 case BIU2400_RSPOUTP:
1450 case BIU2400_PRI_REQINP:
1451 case BIU2400_PRI_REQOUTP:
1452 case BIU2400_ATIO_RSPINP:
1453 case BIU2400_ATIO_RSPOUTP:
1458 BXW4(isp, IspVirt2Off(isp, regoff), val);
1459 #ifdef MEMORYBARRIERW
1460 if (regoff == BIU2400_REQINP ||
1461 regoff == BIU2400_RSPOUTP ||
1462 regoff == BIU2400_PRI_REQINP ||
1463 regoff == BIU2400_ATIO_RSPOUTP)
1464 MEMORYBARRIERW(isp, SYNC_REG,
1465 IspVirt2Off(isp, regoff), 4, -1)
1468 MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, regoff), 4, -1);
1471 isp_prt(isp, ISP_LOGERR,
1472 "isp_pci_wr_reg_2400: bad offset 0x%x", regoff);
1485 static void imc(void *, bus_dma_segment_t *, int, int);
1486 static void imc1(void *, bus_dma_segment_t *, int, int);
1489 imc(void *arg, bus_dma_segment_t *segs, int nseg, int error)
1491 struct imush *imushp = (struct imush *) arg;
1495 imushp->error = error;
1499 imushp->error = EINVAL;
1502 isp_prt(imushp->isp, ISP_LOGDEBUG0, "request/result area @ 0x%jx/0x%jx", (uintmax_t) segs->ds_addr, (uintmax_t) segs->ds_len);
1504 imushp->isp->isp_rquest = imushp->vbase;
1505 imushp->isp->isp_rquest_dma = segs->ds_addr;
1506 segs->ds_addr += ISP_QUEUE_SIZE(RQUEST_QUEUE_LEN(imushp->isp));
1507 imushp->vbase += ISP_QUEUE_SIZE(RQUEST_QUEUE_LEN(imushp->isp));
1509 imushp->isp->isp_result_dma = segs->ds_addr;
1510 imushp->isp->isp_result = imushp->vbase;
1511 segs->ds_addr += ISP_QUEUE_SIZE(RESULT_QUEUE_LEN(imushp->isp));
1512 imushp->vbase += ISP_QUEUE_SIZE(RESULT_QUEUE_LEN(imushp->isp));
1514 if (imushp->isp->isp_type >= ISP_HA_FC_2300) {
1515 imushp->isp->isp_osinfo.ecmd_dma = segs->ds_addr;
1516 imushp->isp->isp_osinfo.ecmd_free = (isp_ecmd_t *)imushp->vbase;
1517 imushp->isp->isp_osinfo.ecmd_base = imushp->isp->isp_osinfo.ecmd_free;
1518 for (ecmd = imushp->isp->isp_osinfo.ecmd_free; ecmd < &imushp->isp->isp_osinfo.ecmd_free[N_XCMDS]; ecmd++) {
1519 if (ecmd == &imushp->isp->isp_osinfo.ecmd_free[N_XCMDS - 1]) {
1522 ecmd->next = ecmd + 1;
1526 #ifdef ISP_TARGET_MODE
1527 segs->ds_addr += (N_XCMDS * XCMD_SIZE);
1528 imushp->vbase += (N_XCMDS * XCMD_SIZE);
1529 if (IS_24XX(imushp->isp)) {
1530 imushp->isp->isp_atioq_dma = segs->ds_addr;
1531 imushp->isp->isp_atioq = imushp->vbase;
1537 imc1(void *arg, bus_dma_segment_t *segs, int nseg, int error)
1539 struct imush *imushp = (struct imush *) arg;
1541 imushp->error = error;
1545 imushp->error = EINVAL;
1548 isp_prt(imushp->isp, ISP_LOGDEBUG0, "scdma @ 0x%jx/0x%jx", (uintmax_t) segs->ds_addr, (uintmax_t) segs->ds_len);
1549 FCPARAM(imushp->isp, imushp->chan)->isp_scdma = segs->ds_addr;
1550 FCPARAM(imushp->isp, imushp->chan)->isp_scratch = imushp->vbase;
1554 isp_pci_mbxdma(ispsoftc_t *isp)
1557 uint32_t len, nsegs;
1558 int i, error, cmap = 0;
1559 bus_size_t slim; /* segment size */
1560 bus_addr_t llim; /* low limit of unavailable dma */
1561 bus_addr_t hlim; /* high limit of unavailable dma */
1565 * Already been here? If so, leave...
1567 if (isp->isp_rquest) {
1572 if (isp->isp_maxcmds == 0) {
1573 isp_prt(isp, ISP_LOGERR, "maxcmds not set");
1578 hlim = BUS_SPACE_MAXADDR;
1579 if (IS_ULTRA2(isp) || IS_FC(isp) || IS_1240(isp)) {
1580 if (sizeof (bus_size_t) > 4) {
1581 slim = (bus_size_t) (1ULL << 32);
1583 slim = (bus_size_t) (1UL << 31);
1585 llim = BUS_SPACE_MAXADDR;
1587 llim = BUS_SPACE_MAXADDR_32BIT;
1591 len = isp->isp_maxcmds * sizeof (struct isp_pcmd);
1592 isp->isp_osinfo.pcmd_pool = (struct isp_pcmd *) malloc(len, M_DEVBUF, M_WAITOK | M_ZERO);
1593 if (isp->isp_osinfo.pcmd_pool == NULL) {
1594 isp_prt(isp, ISP_LOGERR, "cannot allocate pcmds");
1599 if (isp->isp_osinfo.sixtyfourbit) {
1600 nsegs = ISP_NSEG64_MAX;
1602 nsegs = ISP_NSEG_MAX;
1604 #ifdef ISP_TARGET_MODE
1606 * XXX: We don't really support 64 bit target mode for parallel scsi yet
1608 if (IS_SCSI(isp) && isp->isp_osinfo.sixtyfourbit) {
1609 free(isp->isp_osinfo.pcmd_pool, M_DEVBUF);
1610 isp_prt(isp, ISP_LOGERR, "we cannot do DAC for SPI cards yet");
1616 if (isp_dma_tag_create(BUS_DMA_ROOTARG(ISP_PCD(isp)), 1, slim, llim, hlim, NULL, NULL, BUS_SPACE_MAXSIZE, nsegs, slim, 0, &isp->isp_osinfo.dmat)) {
1617 free(isp->isp_osinfo.pcmd_pool, M_DEVBUF);
1619 isp_prt(isp, ISP_LOGERR, "could not create master dma tag");
1623 len = sizeof (isp_hdl_t) * isp->isp_maxcmds;
1624 isp->isp_xflist = (isp_hdl_t *) malloc(len, M_DEVBUF, M_WAITOK | M_ZERO);
1625 if (isp->isp_xflist == NULL) {
1626 free(isp->isp_osinfo.pcmd_pool, M_DEVBUF);
1628 isp_prt(isp, ISP_LOGERR, "cannot alloc xflist array");
1631 for (len = 0; len < isp->isp_maxcmds - 1; len++) {
1632 isp->isp_xflist[len].cmd = &isp->isp_xflist[len+1];
1634 isp->isp_xffree = isp->isp_xflist;
1635 #ifdef ISP_TARGET_MODE
1636 len = sizeof (isp_hdl_t) * isp->isp_maxcmds;
1637 isp->isp_tgtlist = (isp_hdl_t *) malloc(len, M_DEVBUF, M_WAITOK | M_ZERO);
1638 if (isp->isp_tgtlist == NULL) {
1639 free(isp->isp_osinfo.pcmd_pool, M_DEVBUF);
1640 free(isp->isp_xflist, M_DEVBUF);
1642 isp_prt(isp, ISP_LOGERR, "cannot alloc tgtlist array");
1645 for (len = 0; len < isp->isp_maxcmds - 1; len++) {
1646 isp->isp_tgtlist[len].cmd = &isp->isp_tgtlist[len+1];
1648 isp->isp_tgtfree = isp->isp_tgtlist;
1652 * Allocate and map the request and result queues (and ATIO queue
1653 * if we're a 2400 supporting target mode), and a region for
1654 * external dma addressable command/status structures (23XX and
1657 len = ISP_QUEUE_SIZE(RQUEST_QUEUE_LEN(isp));
1658 len += ISP_QUEUE_SIZE(RESULT_QUEUE_LEN(isp));
1659 #ifdef ISP_TARGET_MODE
1661 len += ISP_QUEUE_SIZE(RESULT_QUEUE_LEN(isp));
1664 if (isp->isp_type >= ISP_HA_FC_2300) {
1665 len += (N_XCMDS * XCMD_SIZE);
1669 * Create a tag for the control spaces. We don't always need this
1670 * to be 32 bits, but we do this for simplicity and speed's sake.
1672 if (isp_dma_tag_create(isp->isp_osinfo.dmat, QENTRY_LEN, slim, BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, len, 1, slim, 0, &isp->isp_osinfo.cdmat)) {
1673 isp_prt(isp, ISP_LOGERR, "cannot create a dma tag for control spaces");
1674 free(isp->isp_osinfo.pcmd_pool, M_DEVBUF);
1675 free(isp->isp_xflist, M_DEVBUF);
1676 #ifdef ISP_TARGET_MODE
1677 free(isp->isp_tgtlist, M_DEVBUF);
1683 if (bus_dmamem_alloc(isp->isp_osinfo.cdmat, (void **)&base, BUS_DMA_NOWAIT | BUS_DMA_COHERENT, &isp->isp_osinfo.cdmap) != 0) {
1684 isp_prt(isp, ISP_LOGERR, "cannot allocate %d bytes of CCB memory", len);
1685 bus_dma_tag_destroy(isp->isp_osinfo.cdmat);
1686 free(isp->isp_osinfo.pcmd_pool, M_DEVBUF);
1687 free(isp->isp_xflist, M_DEVBUF);
1688 #ifdef ISP_TARGET_MODE
1689 free(isp->isp_tgtlist, M_DEVBUF);
1700 bus_dmamap_load(isp->isp_osinfo.cdmat, isp->isp_osinfo.cdmap, base, len, imc, &im, 0);
1702 isp_prt(isp, ISP_LOGERR, "error %d loading dma map for control areas", im.error);
1707 for (cmap = 0; cmap < isp->isp_nchan; cmap++) {
1708 struct isp_fc *fc = ISP_FC_PC(isp, cmap);
1709 if (isp_dma_tag_create(isp->isp_osinfo.dmat, 64, slim, BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, ISP_FC_SCRLEN, 1, slim, 0, &fc->tdmat)) {
1712 if (bus_dmamem_alloc(fc->tdmat, (void **)&base, BUS_DMA_NOWAIT | BUS_DMA_COHERENT, &fc->tdmap) != 0) {
1713 bus_dma_tag_destroy(fc->tdmat);
1720 bus_dmamap_load(fc->tdmat, fc->tdmap, base, ISP_FC_SCRLEN, imc1, &im, 0);
1722 bus_dmamem_free(fc->tdmat, base, fc->tdmap);
1723 bus_dma_tag_destroy(fc->tdmat);
1726 if (isp->isp_type >= ISP_HA_FC_2300) {
1727 for (i = 0; i < INITIAL_NEXUS_COUNT; i++) {
1728 struct isp_nexus *n = malloc(sizeof (struct isp_nexus), M_DEVBUF, M_NOWAIT | M_ZERO);
1730 while (fc->nexus_free_list) {
1731 n = fc->nexus_free_list;
1732 fc->nexus_free_list = n->next;
1737 n->next = fc->nexus_free_list;
1738 fc->nexus_free_list = n;
1744 for (i = 0; i < isp->isp_maxcmds; i++) {
1745 struct isp_pcmd *pcmd = &isp->isp_osinfo.pcmd_pool[i];
1746 error = bus_dmamap_create(isp->isp_osinfo.dmat, 0, &pcmd->dmap);
1748 isp_prt(isp, ISP_LOGERR, "error %d creating per-cmd DMA maps", error);
1750 bus_dmamap_destroy(isp->isp_osinfo.dmat, isp->isp_osinfo.pcmd_pool[i].dmap);
1754 callout_init_mtx(&pcmd->wdog, &isp->isp_osinfo.lock, 0);
1755 if (i == isp->isp_maxcmds-1) {
1758 pcmd->next = &isp->isp_osinfo.pcmd_pool[i+1];
1761 isp->isp_osinfo.pcmd_free = &isp->isp_osinfo.pcmd_pool[0];
1766 while (--cmap >= 0) {
1767 struct isp_fc *fc = ISP_FC_PC(isp, cmap);
1768 bus_dmamap_unload(fc->tdmat, fc->tdmap);
1769 bus_dmamem_free(fc->tdmat, base, fc->tdmap);
1770 bus_dma_tag_destroy(fc->tdmat);
1771 while (fc->nexus_free_list) {
1772 struct isp_nexus *n = fc->nexus_free_list;
1773 fc->nexus_free_list = n->next;
1777 if (isp->isp_rquest_dma != 0)
1778 bus_dmamap_unload(isp->isp_osinfo.cdmat, isp->isp_osinfo.cdmap);
1779 bus_dmamem_free(isp->isp_osinfo.cdmat, base, isp->isp_osinfo.cdmap);
1780 bus_dma_tag_destroy(isp->isp_osinfo.cdmat);
1781 free(isp->isp_xflist, M_DEVBUF);
1782 #ifdef ISP_TARGET_MODE
1783 free(isp->isp_tgtlist, M_DEVBUF);
1785 free(isp->isp_osinfo.pcmd_pool, M_DEVBUF);
1786 isp->isp_rquest = NULL;
1794 void *rq; /* original request */
1799 #define MUSHERR_NOQENTRIES -2
1801 #ifdef ISP_TARGET_MODE
1802 static void tdma2_2(void *, bus_dma_segment_t *, int, bus_size_t, int);
1803 static void tdma2(void *, bus_dma_segment_t *, int, int);
1806 tdma2_2(void *arg, bus_dma_segment_t *dm_segs, int nseg, bus_size_t mapsize, int error)
1810 mp->mapsize = mapsize;
1811 tdma2(arg, dm_segs, nseg, error);
1815 tdma2(void *arg, bus_dma_segment_t *dm_segs, int nseg, int error)
1819 struct ccb_scsiio *csio;
1823 mp = (mush_t *) arg;
1828 csio = mp->cmd_token;
1832 if (isp->isp_osinfo.sixtyfourbit) {
1833 if (nseg >= ISP_NSEG64_MAX) {
1834 isp_prt(isp, ISP_LOGERR, "number of segments (%d) exceed maximum we can support (%d)", nseg, ISP_NSEG64_MAX);
1838 if (rq->req_header.rqs_entry_type == RQSTYPE_CTIO2) {
1839 rq->req_header.rqs_entry_type = RQSTYPE_CTIO3;
1842 if (nseg >= ISP_NSEG_MAX) {
1843 isp_prt(isp, ISP_LOGERR, "number of segments (%d) exceed maximum we can support (%d)", nseg, ISP_NSEG_MAX);
1848 if ((csio->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) {
1849 bus_dmamap_sync(isp->isp_osinfo.dmat, PISP_PCMD(csio)->dmap, BUS_DMASYNC_PREWRITE);
1850 ddir = ISP_TO_DEVICE;
1851 } else if ((csio->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_OUT) {
1852 bus_dmamap_sync(isp->isp_osinfo.dmat, PISP_PCMD(csio)->dmap, BUS_DMASYNC_PREREAD);
1853 ddir = ISP_FROM_DEVICE;
1865 error = isp_send_tgt_cmd(isp, rq, dm_segs, nseg, XS_XFRLEN(csio), ddir, &csio->sense_data, csio->sense_len);
1868 mp->error = MUSHERR_NOQENTRIES;
1877 static void dma2_2(void *, bus_dma_segment_t *, int, bus_size_t, int);
1878 static void dma2(void *, bus_dma_segment_t *, int, int);
1881 dma2_2(void *arg, bus_dma_segment_t *dm_segs, int nseg, bus_size_t mapsize, int error)
1885 mp->mapsize = mapsize;
1886 dma2(arg, dm_segs, nseg, error);
1890 dma2(void *arg, bus_dma_segment_t *dm_segs, int nseg, int error)
1894 struct ccb_scsiio *csio;
1898 mp = (mush_t *) arg;
1903 csio = mp->cmd_token;
1907 if (isp->isp_osinfo.sixtyfourbit) {
1908 if (nseg >= ISP_NSEG64_MAX) {
1909 isp_prt(isp, ISP_LOGERR, "number of segments (%d) exceed maximum we can support (%d)", nseg, ISP_NSEG64_MAX);
1913 if (rq->req_header.rqs_entry_type == RQSTYPE_T2RQS) {
1914 rq->req_header.rqs_entry_type = RQSTYPE_T3RQS;
1915 } else if (rq->req_header.rqs_entry_type == RQSTYPE_REQUEST) {
1916 rq->req_header.rqs_entry_type = RQSTYPE_A64;
1919 if (nseg >= ISP_NSEG_MAX) {
1920 isp_prt(isp, ISP_LOGERR, "number of segments (%d) exceed maximum we can support (%d)", nseg, ISP_NSEG_MAX);
1925 if ((csio->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) {
1926 bus_dmamap_sync(isp->isp_osinfo.dmat, PISP_PCMD(csio)->dmap, BUS_DMASYNC_PREREAD);
1927 ddir = ISP_FROM_DEVICE;
1928 } else if ((csio->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_OUT) {
1929 bus_dmamap_sync(isp->isp_osinfo.dmat, PISP_PCMD(csio)->dmap, BUS_DMASYNC_PREWRITE);
1930 ddir = ISP_TO_DEVICE;
1940 error = isp_send_cmd(isp, rq, dm_segs, nseg, XS_XFRLEN(csio), ddir, (ispds64_t *)csio->req_map);
1943 mp->error = MUSHERR_NOQENTRIES;
1954 isp_pci_dmasetup(ispsoftc_t *isp, struct ccb_scsiio *csio, void *ff)
1957 void (*eptr)(void *, bus_dma_segment_t *, int, int);
1958 void (*eptr2)(void *, bus_dma_segment_t *, int, bus_size_t, int);
1963 mp->cmd_token = csio;
1968 #ifdef ISP_TARGET_MODE
1969 if (csio->ccb_h.func_code == XPT_CONT_TARGET_IO) {
1980 error = bus_dmamap_load_ccb(isp->isp_osinfo.dmat, PISP_PCMD(csio)->dmap,
1981 (union ccb *)csio, eptr, mp, 0);
1982 if (error == EINPROGRESS) {
1983 bus_dmamap_unload(isp->isp_osinfo.dmat, PISP_PCMD(csio)->dmap);
1985 isp_prt(isp, ISP_LOGERR, "deferred dma allocation not supported");
1986 } else if (error && mp->error == 0) {
1988 isp_prt(isp, ISP_LOGERR, "error %d in dma mapping code", error);
1993 int retval = CMD_COMPLETE;
1994 if (mp->error == MUSHERR_NOQENTRIES) {
1995 retval = CMD_EAGAIN;
1996 } else if (mp->error == EFBIG) {
1997 csio->ccb_h.status = CAM_REQ_TOO_BIG;
1998 } else if (mp->error == EINVAL) {
1999 csio->ccb_h.status = CAM_REQ_INVALID;
2001 csio->ccb_h.status = CAM_UNREC_HBA_ERROR;
2005 return (CMD_QUEUED);
2009 isp_pci_reset0(ispsoftc_t *isp)
2011 ISP_DISABLE_INTS(isp);
2015 isp_pci_reset1(ispsoftc_t *isp)
2017 if (!IS_24XX(isp)) {
2018 /* Make sure the BIOS is disabled */
2019 isp_pci_wr_reg(isp, HCCR, PCI_HCCR_CMD_BIOS);
2021 /* and enable interrupts */
2022 ISP_ENABLE_INTS(isp);
2026 isp_pci_dumpregs(ispsoftc_t *isp, const char *msg)
2028 struct isp_pcisoftc *pcs = (struct isp_pcisoftc *)isp;
2030 printf("%s: %s\n", device_get_nameunit(isp->isp_dev), msg);
2032 printf("%s:\n", device_get_nameunit(isp->isp_dev));
2034 printf(" biu_conf1=%x", ISP_READ(isp, BIU_CONF1));
2036 printf(" biu_csr=%x", ISP_READ(isp, BIU2100_CSR));
2037 printf(" biu_icr=%x biu_isr=%x biu_sema=%x ", ISP_READ(isp, BIU_ICR),
2038 ISP_READ(isp, BIU_ISR), ISP_READ(isp, BIU_SEMA));
2039 printf("risc_hccr=%x\n", ISP_READ(isp, HCCR));
2043 ISP_WRITE(isp, HCCR, HCCR_CMD_PAUSE);
2044 printf(" cdma_conf=%x cdma_sts=%x cdma_fifostat=%x\n",
2045 ISP_READ(isp, CDMA_CONF), ISP_READ(isp, CDMA_STATUS),
2046 ISP_READ(isp, CDMA_FIFO_STS));
2047 printf(" ddma_conf=%x ddma_sts=%x ddma_fifostat=%x\n",
2048 ISP_READ(isp, DDMA_CONF), ISP_READ(isp, DDMA_STATUS),
2049 ISP_READ(isp, DDMA_FIFO_STS));
2050 printf(" sxp_int=%x sxp_gross=%x sxp(scsi_ctrl)=%x\n",
2051 ISP_READ(isp, SXP_INTERRUPT),
2052 ISP_READ(isp, SXP_GROSS_ERR),
2053 ISP_READ(isp, SXP_PINS_CTRL));
2054 ISP_WRITE(isp, HCCR, HCCR_CMD_RELEASE);
2056 printf(" mbox regs: %x %x %x %x %x\n",
2057 ISP_READ(isp, OUTMAILBOX0), ISP_READ(isp, OUTMAILBOX1),
2058 ISP_READ(isp, OUTMAILBOX2), ISP_READ(isp, OUTMAILBOX3),
2059 ISP_READ(isp, OUTMAILBOX4));
2060 printf(" PCI Status Command/Status=%x\n",
2061 pci_read_config(pcs->pci_dev, PCIR_COMMAND, 1));