2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
4 * Copyright (c) 2009-2018 Alexander Motin <mav@FreeBSD.org>
5 * Copyright (c) 1997-2008 by Matthew Jacob
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
11 * 1. Redistributions of source code must retain the above copyright
12 * notice immediately at the beginning of the file, without modification,
13 * this list of conditions, and the following disclaimer.
14 * 2. The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
21 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 * PCI specific probe and attach routines for Qlogic ISP SCSI adapters.
33 #include <sys/cdefs.h>
34 __FBSDID("$FreeBSD$");
36 #include <sys/param.h>
37 #include <sys/systm.h>
38 #include <sys/kernel.h>
39 #include <sys/module.h>
40 #include <sys/linker.h>
41 #include <sys/firmware.h>
43 #include <sys/stdint.h>
44 #include <dev/pci/pcireg.h>
45 #include <dev/pci/pcivar.h>
46 #include <machine/bus.h>
47 #include <machine/resource.h>
49 #include <sys/malloc.h>
53 #include <dev/ofw/openfirm.h>
54 #include <machine/ofw_machdep.h>
57 #include <dev/isp/isp_freebsd.h>
59 static uint32_t isp_pci_rd_reg(ispsoftc_t *, int);
60 static void isp_pci_wr_reg(ispsoftc_t *, int, uint32_t);
61 static uint32_t isp_pci_rd_reg_1080(ispsoftc_t *, int);
62 static void isp_pci_wr_reg_1080(ispsoftc_t *, int, uint32_t);
63 static uint32_t isp_pci_rd_reg_2400(ispsoftc_t *, int);
64 static void isp_pci_wr_reg_2400(ispsoftc_t *, int, uint32_t);
65 static uint32_t isp_pci_rd_reg_2600(ispsoftc_t *, int);
66 static void isp_pci_wr_reg_2600(ispsoftc_t *, int, uint32_t);
67 static void isp_pci_run_isr(ispsoftc_t *);
68 static void isp_pci_run_isr_2300(ispsoftc_t *);
69 static void isp_pci_run_isr_2400(ispsoftc_t *);
70 static int isp_pci_mbxdma(ispsoftc_t *);
71 static void isp_pci_mbxdmafree(ispsoftc_t *);
72 static int isp_pci_dmasetup(ispsoftc_t *, XS_T *, void *);
73 static int isp_pci_irqsetup(ispsoftc_t *);
74 static void isp_pci_dumpregs(ispsoftc_t *, const char *);
76 static struct ispmdvec mdvec = {
82 isp_common_dmateardown,
86 BIU_BURST_ENABLE|BIU_PCI_CONF1_FIFO_64
89 static struct ispmdvec mdvec_1080 = {
95 isp_common_dmateardown,
99 BIU_BURST_ENABLE|BIU_PCI_CONF1_FIFO_64
102 static struct ispmdvec mdvec_12160 = {
108 isp_common_dmateardown,
112 BIU_BURST_ENABLE|BIU_PCI_CONF1_FIFO_64
115 static struct ispmdvec mdvec_2100 = {
121 isp_common_dmateardown,
126 static struct ispmdvec mdvec_2200 = {
132 isp_common_dmateardown,
137 static struct ispmdvec mdvec_2300 = {
138 isp_pci_run_isr_2300,
143 isp_common_dmateardown,
148 static struct ispmdvec mdvec_2400 = {
149 isp_pci_run_isr_2400,
154 isp_common_dmateardown,
159 static struct ispmdvec mdvec_2500 = {
160 isp_pci_run_isr_2400,
165 isp_common_dmateardown,
170 static struct ispmdvec mdvec_2600 = {
171 isp_pci_run_isr_2400,
176 isp_common_dmateardown,
181 static struct ispmdvec mdvec_2700 = {
182 isp_pci_run_isr_2400,
187 isp_common_dmateardown,
192 #ifndef PCIM_CMD_INVEN
193 #define PCIM_CMD_INVEN 0x10
195 #ifndef PCIM_CMD_BUSMASTEREN
196 #define PCIM_CMD_BUSMASTEREN 0x0004
198 #ifndef PCIM_CMD_PERRESPEN
199 #define PCIM_CMD_PERRESPEN 0x0040
201 #ifndef PCIM_CMD_SEREN
202 #define PCIM_CMD_SEREN 0x0100
204 #ifndef PCIM_CMD_INTX_DISABLE
205 #define PCIM_CMD_INTX_DISABLE 0x0400
209 #define PCIR_COMMAND 0x04
212 #ifndef PCIR_CACHELNSZ
213 #define PCIR_CACHELNSZ 0x0c
216 #ifndef PCIR_LATTIMER
217 #define PCIR_LATTIMER 0x0d
221 #define PCIR_ROMADDR 0x30
224 #define PCI_VENDOR_QLOGIC 0x1077
226 #define PCI_PRODUCT_QLOGIC_ISP1020 0x1020
227 #define PCI_PRODUCT_QLOGIC_ISP1080 0x1080
228 #define PCI_PRODUCT_QLOGIC_ISP10160 0x1016
229 #define PCI_PRODUCT_QLOGIC_ISP12160 0x1216
230 #define PCI_PRODUCT_QLOGIC_ISP1240 0x1240
231 #define PCI_PRODUCT_QLOGIC_ISP1280 0x1280
233 #define PCI_PRODUCT_QLOGIC_ISP2100 0x2100
234 #define PCI_PRODUCT_QLOGIC_ISP2200 0x2200
235 #define PCI_PRODUCT_QLOGIC_ISP2300 0x2300
236 #define PCI_PRODUCT_QLOGIC_ISP2312 0x2312
237 #define PCI_PRODUCT_QLOGIC_ISP2322 0x2322
238 #define PCI_PRODUCT_QLOGIC_ISP2422 0x2422
239 #define PCI_PRODUCT_QLOGIC_ISP2432 0x2432
240 #define PCI_PRODUCT_QLOGIC_ISP2532 0x2532
241 #define PCI_PRODUCT_QLOGIC_ISP5432 0x5432
242 #define PCI_PRODUCT_QLOGIC_ISP6312 0x6312
243 #define PCI_PRODUCT_QLOGIC_ISP6322 0x6322
244 #define PCI_PRODUCT_QLOGIC_ISP2031 0x2031
245 #define PCI_PRODUCT_QLOGIC_ISP8031 0x8031
246 #define PCI_PRODUCT_QLOGIC_ISP2684 0x2171
247 #define PCI_PRODUCT_QLOGIC_ISP2692 0x2b61
248 #define PCI_PRODUCT_QLOGIC_ISP2714 0x2071
249 #define PCI_PRODUCT_QLOGIC_ISP2722 0x2261
251 #define PCI_QLOGIC_ISP1020 \
252 ((PCI_PRODUCT_QLOGIC_ISP1020 << 16) | PCI_VENDOR_QLOGIC)
253 #define PCI_QLOGIC_ISP1080 \
254 ((PCI_PRODUCT_QLOGIC_ISP1080 << 16) | PCI_VENDOR_QLOGIC)
255 #define PCI_QLOGIC_ISP10160 \
256 ((PCI_PRODUCT_QLOGIC_ISP10160 << 16) | PCI_VENDOR_QLOGIC)
257 #define PCI_QLOGIC_ISP12160 \
258 ((PCI_PRODUCT_QLOGIC_ISP12160 << 16) | PCI_VENDOR_QLOGIC)
259 #define PCI_QLOGIC_ISP1240 \
260 ((PCI_PRODUCT_QLOGIC_ISP1240 << 16) | PCI_VENDOR_QLOGIC)
261 #define PCI_QLOGIC_ISP1280 \
262 ((PCI_PRODUCT_QLOGIC_ISP1280 << 16) | PCI_VENDOR_QLOGIC)
264 #define PCI_QLOGIC_ISP2100 \
265 ((PCI_PRODUCT_QLOGIC_ISP2100 << 16) | PCI_VENDOR_QLOGIC)
266 #define PCI_QLOGIC_ISP2200 \
267 ((PCI_PRODUCT_QLOGIC_ISP2200 << 16) | PCI_VENDOR_QLOGIC)
268 #define PCI_QLOGIC_ISP2300 \
269 ((PCI_PRODUCT_QLOGIC_ISP2300 << 16) | PCI_VENDOR_QLOGIC)
270 #define PCI_QLOGIC_ISP2312 \
271 ((PCI_PRODUCT_QLOGIC_ISP2312 << 16) | PCI_VENDOR_QLOGIC)
272 #define PCI_QLOGIC_ISP2322 \
273 ((PCI_PRODUCT_QLOGIC_ISP2322 << 16) | PCI_VENDOR_QLOGIC)
274 #define PCI_QLOGIC_ISP2422 \
275 ((PCI_PRODUCT_QLOGIC_ISP2422 << 16) | PCI_VENDOR_QLOGIC)
276 #define PCI_QLOGIC_ISP2432 \
277 ((PCI_PRODUCT_QLOGIC_ISP2432 << 16) | PCI_VENDOR_QLOGIC)
278 #define PCI_QLOGIC_ISP2532 \
279 ((PCI_PRODUCT_QLOGIC_ISP2532 << 16) | PCI_VENDOR_QLOGIC)
280 #define PCI_QLOGIC_ISP5432 \
281 ((PCI_PRODUCT_QLOGIC_ISP5432 << 16) | PCI_VENDOR_QLOGIC)
282 #define PCI_QLOGIC_ISP6312 \
283 ((PCI_PRODUCT_QLOGIC_ISP6312 << 16) | PCI_VENDOR_QLOGIC)
284 #define PCI_QLOGIC_ISP6322 \
285 ((PCI_PRODUCT_QLOGIC_ISP6322 << 16) | PCI_VENDOR_QLOGIC)
286 #define PCI_QLOGIC_ISP2031 \
287 ((PCI_PRODUCT_QLOGIC_ISP2031 << 16) | PCI_VENDOR_QLOGIC)
288 #define PCI_QLOGIC_ISP8031 \
289 ((PCI_PRODUCT_QLOGIC_ISP8031 << 16) | PCI_VENDOR_QLOGIC)
290 #define PCI_QLOGIC_ISP2684 \
291 ((PCI_PRODUCT_QLOGIC_ISP2684 << 16) | PCI_VENDOR_QLOGIC)
292 #define PCI_QLOGIC_ISP2692 \
293 ((PCI_PRODUCT_QLOGIC_ISP2692 << 16) | PCI_VENDOR_QLOGIC)
294 #define PCI_QLOGIC_ISP2714 \
295 ((PCI_PRODUCT_QLOGIC_ISP2714 << 16) | PCI_VENDOR_QLOGIC)
296 #define PCI_QLOGIC_ISP2722 \
297 ((PCI_PRODUCT_QLOGIC_ISP2722 << 16) | PCI_VENDOR_QLOGIC)
300 * Odd case for some AMI raid cards... We need to *not* attach to this.
302 #define AMI_RAID_SUBVENDOR_ID 0x101e
304 #define PCI_DFLT_LTNCY 0x40
305 #define PCI_DFLT_LNSZ 0x10
307 static int isp_pci_probe (device_t);
308 static int isp_pci_attach (device_t);
309 static int isp_pci_detach (device_t);
312 #define ISP_PCD(isp) ((struct isp_pcisoftc *)isp)->pci_dev
313 struct isp_pcisoftc {
316 struct resource * regs;
317 struct resource * regs1;
318 struct resource * regs2;
321 struct resource * irq;
330 int16_t pci_poff[_NREG_BLKS];
336 static device_method_t isp_pci_methods[] = {
337 /* Device interface */
338 DEVMETHOD(device_probe, isp_pci_probe),
339 DEVMETHOD(device_attach, isp_pci_attach),
340 DEVMETHOD(device_detach, isp_pci_detach),
344 static driver_t isp_pci_driver = {
345 "isp", isp_pci_methods, sizeof (struct isp_pcisoftc)
347 static devclass_t isp_devclass;
348 DRIVER_MODULE(isp, pci, isp_pci_driver, isp_devclass, 0, 0);
349 MODULE_DEPEND(isp, cam, 1, 1, 1);
350 MODULE_DEPEND(isp, firmware, 1, 1, 1);
351 static int isp_nvports = 0;
354 isp_pci_probe(device_t dev)
356 switch ((pci_get_device(dev) << 16) | (pci_get_vendor(dev))) {
357 case PCI_QLOGIC_ISP1020:
358 device_set_desc(dev, "Qlogic ISP 1020/1040 PCI SCSI Adapter");
360 case PCI_QLOGIC_ISP1080:
361 device_set_desc(dev, "Qlogic ISP 1080 PCI SCSI Adapter");
363 case PCI_QLOGIC_ISP1240:
364 device_set_desc(dev, "Qlogic ISP 1240 PCI SCSI Adapter");
366 case PCI_QLOGIC_ISP1280:
367 device_set_desc(dev, "Qlogic ISP 1280 PCI SCSI Adapter");
369 case PCI_QLOGIC_ISP10160:
370 device_set_desc(dev, "Qlogic ISP 10160 PCI SCSI Adapter");
372 case PCI_QLOGIC_ISP12160:
373 if (pci_get_subvendor(dev) == AMI_RAID_SUBVENDOR_ID) {
376 device_set_desc(dev, "Qlogic ISP 12160 PCI SCSI Adapter");
378 case PCI_QLOGIC_ISP2100:
379 device_set_desc(dev, "Qlogic ISP 2100 PCI FC-AL Adapter");
381 case PCI_QLOGIC_ISP2200:
382 device_set_desc(dev, "Qlogic ISP 2200 PCI FC-AL Adapter");
384 case PCI_QLOGIC_ISP2300:
385 device_set_desc(dev, "Qlogic ISP 2300 PCI FC-AL Adapter");
387 case PCI_QLOGIC_ISP2312:
388 device_set_desc(dev, "Qlogic ISP 2312 PCI FC-AL Adapter");
390 case PCI_QLOGIC_ISP2322:
391 device_set_desc(dev, "Qlogic ISP 2322 PCI FC-AL Adapter");
393 case PCI_QLOGIC_ISP2422:
394 device_set_desc(dev, "Qlogic ISP 2422 PCI FC-AL Adapter");
396 case PCI_QLOGIC_ISP2432:
397 device_set_desc(dev, "Qlogic ISP 2432 PCI FC-AL Adapter");
399 case PCI_QLOGIC_ISP2532:
400 device_set_desc(dev, "Qlogic ISP 2532 PCI FC-AL Adapter");
402 case PCI_QLOGIC_ISP5432:
403 device_set_desc(dev, "Qlogic ISP 5432 PCI FC-AL Adapter");
405 case PCI_QLOGIC_ISP6312:
406 device_set_desc(dev, "Qlogic ISP 6312 PCI FC-AL Adapter");
408 case PCI_QLOGIC_ISP6322:
409 device_set_desc(dev, "Qlogic ISP 6322 PCI FC-AL Adapter");
411 case PCI_QLOGIC_ISP2031:
412 device_set_desc(dev, "Qlogic ISP 2031 PCI FC-AL Adapter");
414 case PCI_QLOGIC_ISP8031:
415 device_set_desc(dev, "Qlogic ISP 8031 PCI FCoE Adapter");
417 case PCI_QLOGIC_ISP2684:
418 device_set_desc(dev, "Qlogic ISP 2684 PCI FC Adapter");
420 case PCI_QLOGIC_ISP2692:
421 device_set_desc(dev, "Qlogic ISP 2692 PCI FC Adapter");
423 case PCI_QLOGIC_ISP2714:
424 device_set_desc(dev, "Qlogic ISP 2714 PCI FC Adapter");
426 case PCI_QLOGIC_ISP2722:
427 device_set_desc(dev, "Qlogic ISP 2722 PCI FC Adapter");
432 if (isp_announced == 0 && bootverbose) {
433 printf("Qlogic ISP Driver, FreeBSD Version %d.%d, "
434 "Core Version %d.%d\n",
435 ISP_PLATFORM_VERSION_MAJOR, ISP_PLATFORM_VERSION_MINOR,
436 ISP_CORE_VERSION_MAJOR, ISP_CORE_VERSION_MINOR);
440 * XXXX: Here is where we might load the f/w module
441 * XXXX: (or increase a reference count to it).
443 return (BUS_PROBE_DEFAULT);
447 isp_get_generic_options(device_t dev, ispsoftc_t *isp)
452 if (resource_int_value(device_get_name(dev), device_get_unit(dev), "fwload_disable", &tval) == 0 && tval != 0) {
453 isp->isp_confopts |= ISP_CFG_NORELOAD;
456 if (resource_int_value(device_get_name(dev), device_get_unit(dev), "ignore_nvram", &tval) == 0 && tval != 0) {
457 isp->isp_confopts |= ISP_CFG_NONVRAM;
460 (void) resource_int_value(device_get_name(dev), device_get_unit(dev), "debug", &tval);
462 isp->isp_dblev = tval;
464 isp->isp_dblev = ISP_LOGWARN|ISP_LOGERR;
467 isp->isp_dblev |= ISP_LOGCONFIG|ISP_LOGINFO;
470 (void) resource_int_value(device_get_name(dev), device_get_unit(dev), "vports", &tval);
471 if (tval > 0 && tval <= 254) {
475 (void) resource_int_value(device_get_name(dev), device_get_unit(dev), "quickboot_time", &tval);
476 isp_quickboot_time = tval;
480 isp_get_specific_options(device_t dev, int chan, ispsoftc_t *isp)
484 char prefix[12], name[16];
489 snprintf(prefix, sizeof(prefix), "chan%d.", chan);
490 snprintf(name, sizeof(name), "%siid", prefix);
491 if (resource_int_value(device_get_name(dev), device_get_unit(dev),
494 ISP_FC_PC(isp, chan)->default_id = 109 - chan;
497 ISP_SPI_PC(isp, chan)->iid = OF_getscsinitid(dev);
499 ISP_SPI_PC(isp, chan)->iid = 7;
504 ISP_FC_PC(isp, chan)->default_id = tval - chan;
506 ISP_SPI_PC(isp, chan)->iid = tval;
508 isp->isp_confopts |= ISP_CFG_OWNLOOPID;
515 snprintf(name, sizeof(name), "%srole", prefix);
516 if (resource_int_value(device_get_name(dev), device_get_unit(dev),
520 case ISP_ROLE_INITIATOR:
521 case ISP_ROLE_TARGET:
523 device_printf(dev, "Chan %d setting role to 0x%x\n", chan, tval);
531 tval = ISP_DEFAULT_ROLES;
533 ISP_FC_PC(isp, chan)->def_role = tval;
536 snprintf(name, sizeof(name), "%sfullduplex", prefix);
537 if (resource_int_value(device_get_name(dev), device_get_unit(dev),
538 name, &tval) == 0 && tval != 0) {
539 isp->isp_confopts |= ISP_CFG_FULL_DUPLEX;
542 snprintf(name, sizeof(name), "%stopology", prefix);
543 if (resource_string_value(device_get_name(dev), device_get_unit(dev),
544 name, (const char **) &sptr) == 0 && sptr != NULL) {
545 if (strcmp(sptr, "lport") == 0) {
546 isp->isp_confopts |= ISP_CFG_LPORT;
547 } else if (strcmp(sptr, "nport") == 0) {
548 isp->isp_confopts |= ISP_CFG_NPORT;
549 } else if (strcmp(sptr, "lport-only") == 0) {
550 isp->isp_confopts |= ISP_CFG_LPORT_ONLY;
551 } else if (strcmp(sptr, "nport-only") == 0) {
552 isp->isp_confopts |= ISP_CFG_NPORT_ONLY;
556 #ifdef ISP_FCTAPE_OFF
557 isp->isp_confopts |= ISP_CFG_NOFCTAPE;
559 isp->isp_confopts |= ISP_CFG_FCTAPE;
563 snprintf(name, sizeof(name), "%snofctape", prefix);
564 (void) resource_int_value(device_get_name(dev), device_get_unit(dev),
567 isp->isp_confopts &= ~ISP_CFG_FCTAPE;
568 isp->isp_confopts |= ISP_CFG_NOFCTAPE;
572 snprintf(name, sizeof(name), "%sfctape", prefix);
573 (void) resource_int_value(device_get_name(dev), device_get_unit(dev),
576 isp->isp_confopts &= ~ISP_CFG_NOFCTAPE;
577 isp->isp_confopts |= ISP_CFG_FCTAPE;
582 * Because the resource_*_value functions can neither return
583 * 64 bit integer values, nor can they be directly coerced
584 * to interpret the right hand side of the assignment as
585 * you want them to interpret it, we have to force WWN
586 * hint replacement to specify WWN strings with a leading
587 * 'w' (e..g w50000000aaaa0001). Sigh.
590 snprintf(name, sizeof(name), "%sportwwn", prefix);
591 tval = resource_string_value(device_get_name(dev), device_get_unit(dev),
592 name, (const char **) &sptr);
593 if (tval == 0 && sptr != NULL && *sptr++ == 'w') {
595 ISP_FC_PC(isp, chan)->def_wwpn = strtouq(sptr, &eptr, 16);
596 if (eptr < sptr + 16 || ISP_FC_PC(isp, chan)->def_wwpn == -1) {
597 device_printf(dev, "mangled portwwn hint '%s'\n", sptr);
598 ISP_FC_PC(isp, chan)->def_wwpn = 0;
603 snprintf(name, sizeof(name), "%snodewwn", prefix);
604 tval = resource_string_value(device_get_name(dev), device_get_unit(dev),
605 name, (const char **) &sptr);
606 if (tval == 0 && sptr != NULL && *sptr++ == 'w') {
608 ISP_FC_PC(isp, chan)->def_wwnn = strtouq(sptr, &eptr, 16);
609 if (eptr < sptr + 16 || ISP_FC_PC(isp, chan)->def_wwnn == 0) {
610 device_printf(dev, "mangled nodewwn hint '%s'\n", sptr);
611 ISP_FC_PC(isp, chan)->def_wwnn = 0;
616 snprintf(name, sizeof(name), "%sloop_down_limit", prefix);
617 (void) resource_int_value(device_get_name(dev), device_get_unit(dev),
619 if (tval >= 0 && tval < 0xffff) {
620 ISP_FC_PC(isp, chan)->loop_down_limit = tval;
622 ISP_FC_PC(isp, chan)->loop_down_limit = isp_loop_down_limit;
626 snprintf(name, sizeof(name), "%sgone_device_time", prefix);
627 (void) resource_int_value(device_get_name(dev), device_get_unit(dev),
629 if (tval >= 0 && tval < 0xffff) {
630 ISP_FC_PC(isp, chan)->gone_device_time = tval;
632 ISP_FC_PC(isp, chan)->gone_device_time = isp_gone_device_time;
637 isp_pci_attach(device_t dev)
639 struct isp_pcisoftc *pcs = device_get_softc(dev);
640 ispsoftc_t *isp = &pcs->pci_isp;
642 uint32_t data, cmd, linesz, did;
649 mtx_init(&isp->isp_lock, "isp", NULL, MTX_DEF);
652 * Get Generic Options
655 isp_get_generic_options(dev, isp);
657 linesz = PCI_DFLT_LNSZ;
658 pcs->regs = pcs->regs2 = NULL;
659 pcs->rgd = pcs->rtp = 0;
662 pcs->pci_poff[BIU_BLOCK >> _BLK_REG_SHFT] = BIU_REGS_OFF;
663 pcs->pci_poff[MBOX_BLOCK >> _BLK_REG_SHFT] = PCI_MBOX_REGS_OFF;
664 pcs->pci_poff[SXP_BLOCK >> _BLK_REG_SHFT] = PCI_SXP_REGS_OFF;
665 pcs->pci_poff[RISC_BLOCK >> _BLK_REG_SHFT] = PCI_RISC_REGS_OFF;
666 pcs->pci_poff[DMA_BLOCK >> _BLK_REG_SHFT] = DMA_REGS_OFF;
668 switch (pci_get_devid(dev)) {
669 case PCI_QLOGIC_ISP1020:
671 isp->isp_mdvec = &mdvec;
672 isp->isp_type = ISP_HA_SCSI_UNKNOWN;
674 case PCI_QLOGIC_ISP1080:
676 isp->isp_mdvec = &mdvec_1080;
677 isp->isp_type = ISP_HA_SCSI_1080;
678 pcs->pci_poff[DMA_BLOCK >> _BLK_REG_SHFT] = ISP1080_DMA_REGS_OFF;
680 case PCI_QLOGIC_ISP1240:
682 isp->isp_mdvec = &mdvec_1080;
683 isp->isp_type = ISP_HA_SCSI_1240;
685 pcs->pci_poff[DMA_BLOCK >> _BLK_REG_SHFT] = ISP1080_DMA_REGS_OFF;
687 case PCI_QLOGIC_ISP1280:
689 isp->isp_mdvec = &mdvec_1080;
690 isp->isp_type = ISP_HA_SCSI_1280;
691 pcs->pci_poff[DMA_BLOCK >> _BLK_REG_SHFT] = ISP1080_DMA_REGS_OFF;
693 case PCI_QLOGIC_ISP10160:
695 isp->isp_mdvec = &mdvec_12160;
696 isp->isp_type = ISP_HA_SCSI_10160;
697 pcs->pci_poff[DMA_BLOCK >> _BLK_REG_SHFT] = ISP1080_DMA_REGS_OFF;
699 case PCI_QLOGIC_ISP12160:
702 isp->isp_mdvec = &mdvec_12160;
703 isp->isp_type = ISP_HA_SCSI_12160;
704 pcs->pci_poff[DMA_BLOCK >> _BLK_REG_SHFT] = ISP1080_DMA_REGS_OFF;
706 case PCI_QLOGIC_ISP2100:
708 isp->isp_mdvec = &mdvec_2100;
709 isp->isp_type = ISP_HA_FC_2100;
710 pcs->pci_poff[MBOX_BLOCK >> _BLK_REG_SHFT] = PCI_MBOX_REGS2100_OFF;
711 if (pci_get_revid(dev) < 3) {
713 * XXX: Need to get the actual revision
714 * XXX: number of the 2100 FB. At any rate,
715 * XXX: lower cache line size for early revision
721 case PCI_QLOGIC_ISP2200:
723 isp->isp_mdvec = &mdvec_2200;
724 isp->isp_type = ISP_HA_FC_2200;
725 pcs->pci_poff[MBOX_BLOCK >> _BLK_REG_SHFT] = PCI_MBOX_REGS2100_OFF;
727 case PCI_QLOGIC_ISP2300:
729 isp->isp_mdvec = &mdvec_2300;
730 isp->isp_type = ISP_HA_FC_2300;
731 pcs->pci_poff[MBOX_BLOCK >> _BLK_REG_SHFT] = PCI_MBOX_REGS2300_OFF;
733 case PCI_QLOGIC_ISP2312:
734 case PCI_QLOGIC_ISP6312:
736 isp->isp_mdvec = &mdvec_2300;
737 isp->isp_type = ISP_HA_FC_2312;
738 pcs->pci_poff[MBOX_BLOCK >> _BLK_REG_SHFT] = PCI_MBOX_REGS2300_OFF;
740 case PCI_QLOGIC_ISP2322:
741 case PCI_QLOGIC_ISP6322:
743 isp->isp_mdvec = &mdvec_2300;
744 isp->isp_type = ISP_HA_FC_2322;
745 pcs->pci_poff[MBOX_BLOCK >> _BLK_REG_SHFT] = PCI_MBOX_REGS2300_OFF;
747 case PCI_QLOGIC_ISP2422:
748 case PCI_QLOGIC_ISP2432:
750 isp->isp_nchan += isp_nvports;
751 isp->isp_mdvec = &mdvec_2400;
752 isp->isp_type = ISP_HA_FC_2400;
753 pcs->pci_poff[MBOX_BLOCK >> _BLK_REG_SHFT] = PCI_MBOX_REGS2400_OFF;
755 case PCI_QLOGIC_ISP2532:
757 isp->isp_nchan += isp_nvports;
758 isp->isp_mdvec = &mdvec_2500;
759 isp->isp_type = ISP_HA_FC_2500;
760 pcs->pci_poff[MBOX_BLOCK >> _BLK_REG_SHFT] = PCI_MBOX_REGS2400_OFF;
762 case PCI_QLOGIC_ISP5432:
764 isp->isp_mdvec = &mdvec_2500;
765 isp->isp_type = ISP_HA_FC_2500;
766 pcs->pci_poff[MBOX_BLOCK >> _BLK_REG_SHFT] = PCI_MBOX_REGS2400_OFF;
768 case PCI_QLOGIC_ISP2031:
769 case PCI_QLOGIC_ISP8031:
771 isp->isp_nchan += isp_nvports;
772 isp->isp_mdvec = &mdvec_2600;
773 isp->isp_type = ISP_HA_FC_2600;
774 pcs->pci_poff[MBOX_BLOCK >> _BLK_REG_SHFT] = PCI_MBOX_REGS2400_OFF;
776 case PCI_QLOGIC_ISP2684:
777 case PCI_QLOGIC_ISP2692:
778 case PCI_QLOGIC_ISP2714:
779 case PCI_QLOGIC_ISP2722:
781 isp->isp_nchan += isp_nvports;
782 isp->isp_mdvec = &mdvec_2700;
783 isp->isp_type = ISP_HA_FC_2700;
784 pcs->pci_poff[MBOX_BLOCK >> _BLK_REG_SHFT] = PCI_MBOX_REGS2400_OFF;
787 device_printf(dev, "unknown device type\n");
791 isp->isp_revision = pci_get_revid(dev);
794 pcs->rtp = SYS_RES_MEMORY;
795 pcs->rgd = PCIR_BAR(0);
796 pcs->regs = bus_alloc_resource_any(dev, pcs->rtp, &pcs->rgd,
798 pcs->rtp1 = SYS_RES_MEMORY;
799 pcs->rgd1 = PCIR_BAR(2);
800 pcs->regs1 = bus_alloc_resource_any(dev, pcs->rtp1, &pcs->rgd1,
802 pcs->rtp2 = SYS_RES_MEMORY;
803 pcs->rgd2 = PCIR_BAR(4);
804 pcs->regs2 = bus_alloc_resource_any(dev, pcs->rtp2, &pcs->rgd2,
807 pcs->rtp = SYS_RES_MEMORY;
808 pcs->rgd = PCIR_BAR(1);
809 pcs->regs = bus_alloc_resource_any(dev, pcs->rtp, &pcs->rgd,
811 if (pcs->regs == NULL) {
812 pcs->rtp = SYS_RES_IOPORT;
813 pcs->rgd = PCIR_BAR(0);
814 pcs->regs = bus_alloc_resource_any(dev, pcs->rtp,
815 &pcs->rgd, RF_ACTIVE);
818 if (pcs->regs == NULL) {
819 device_printf(dev, "Unable to map any ports\n");
823 device_printf(dev, "Using %s space register mapping\n",
824 (pcs->rtp == SYS_RES_IOPORT)? "I/O" : "Memory");
826 isp->isp_regs = pcs->regs;
827 isp->isp_regs2 = pcs->regs2;
830 psize = sizeof (fcparam);
831 xsize = sizeof (struct isp_fc);
833 psize = sizeof (sdparam);
834 xsize = sizeof (struct isp_spi);
836 psize *= isp->isp_nchan;
837 xsize *= isp->isp_nchan;
838 isp->isp_param = malloc(psize, M_DEVBUF, M_NOWAIT | M_ZERO);
839 if (isp->isp_param == NULL) {
840 device_printf(dev, "cannot allocate parameter data\n");
843 isp->isp_osinfo.pc.ptr = malloc(xsize, M_DEVBUF, M_NOWAIT | M_ZERO);
844 if (isp->isp_osinfo.pc.ptr == NULL) {
845 device_printf(dev, "cannot allocate parameter data\n");
850 * Now that we know who we are (roughly) get/set specific options
852 for (i = 0; i < isp->isp_nchan; i++) {
853 isp_get_specific_options(dev, i, isp);
856 isp->isp_osinfo.fw = NULL;
857 if (isp->isp_osinfo.fw == NULL) {
858 snprintf(fwname, sizeof (fwname), "isp_%04x", did);
859 isp->isp_osinfo.fw = firmware_get(fwname);
861 if (isp->isp_osinfo.fw != NULL) {
862 isp_prt(isp, ISP_LOGCONFIG, "loaded firmware %s", fwname);
863 isp->isp_mdvec->dv_ispfw = isp->isp_osinfo.fw->data;
867 * Make sure that SERR, PERR, WRITE INVALIDATE and BUSMASTER are set.
869 cmd = pci_read_config(dev, PCIR_COMMAND, 2);
870 cmd |= PCIM_CMD_SEREN | PCIM_CMD_PERRESPEN | PCIM_CMD_BUSMASTEREN | PCIM_CMD_INVEN;
871 if (IS_2300(isp)) { /* per QLogic errata */
872 cmd &= ~PCIM_CMD_INVEN;
874 if (IS_2322(isp) || pci_get_devid(dev) == PCI_QLOGIC_ISP6312) {
875 cmd &= ~PCIM_CMD_INTX_DISABLE;
878 cmd &= ~PCIM_CMD_INTX_DISABLE;
880 pci_write_config(dev, PCIR_COMMAND, cmd, 2);
883 * Make sure the Cache Line Size register is set sensibly.
885 data = pci_read_config(dev, PCIR_CACHELNSZ, 1);
886 if (data == 0 || (linesz != PCI_DFLT_LNSZ && data != linesz)) {
887 isp_prt(isp, ISP_LOGDEBUG0, "set PCI line size to %d from %d", linesz, data);
889 pci_write_config(dev, PCIR_CACHELNSZ, data, 1);
893 * Make sure the Latency Timer is sane.
895 data = pci_read_config(dev, PCIR_LATTIMER, 1);
896 if (data < PCI_DFLT_LTNCY) {
897 data = PCI_DFLT_LTNCY;
898 isp_prt(isp, ISP_LOGDEBUG0, "set PCI latency to %d", data);
899 pci_write_config(dev, PCIR_LATTIMER, data, 1);
903 * Make sure we've disabled the ROM.
905 data = pci_read_config(dev, PCIR_ROMADDR, 4);
907 pci_write_config(dev, PCIR_ROMADDR, data, 4);
910 * Last minute checks...
912 if (IS_23XX(isp) || IS_24XX(isp)) {
913 isp->isp_port = pci_get_function(dev);
917 * Make sure we're in reset state.
920 if (isp_reinit(isp, 1) != 0) {
925 if (isp_attach(isp)) {
934 if (isp->isp_osinfo.fw == NULL && !IS_26XX(isp)) {
936 * Failure to attach at boot time might have been caused
937 * by a missing ispfw(4). Except for for 16Gb adapters,
938 * there's no loadable firmware for them.
940 isp_prt(isp, ISP_LOGWARN, "See the ispfw(4) man page on "
941 "how to load known good firmware at boot time");
943 for (i = 0; i < isp->isp_nirq; i++) {
944 (void) bus_teardown_intr(dev, pcs->irq[i].irq, pcs->irq[i].ih);
945 (void) bus_release_resource(dev, SYS_RES_IRQ, pcs->irq[i].iqd,
949 pci_release_msi(dev);
952 (void) bus_release_resource(dev, pcs->rtp, pcs->rgd, pcs->regs);
954 (void) bus_release_resource(dev, pcs->rtp1, pcs->rgd1, pcs->regs1);
956 (void) bus_release_resource(dev, pcs->rtp2, pcs->rgd2, pcs->regs2);
957 if (pcs->pci_isp.isp_param) {
958 free(pcs->pci_isp.isp_param, M_DEVBUF);
959 pcs->pci_isp.isp_param = NULL;
961 if (pcs->pci_isp.isp_osinfo.pc.ptr) {
962 free(pcs->pci_isp.isp_osinfo.pc.ptr, M_DEVBUF);
963 pcs->pci_isp.isp_osinfo.pc.ptr = NULL;
965 mtx_destroy(&isp->isp_lock);
970 isp_pci_detach(device_t dev)
972 struct isp_pcisoftc *pcs = device_get_softc(dev);
973 ispsoftc_t *isp = &pcs->pci_isp;
976 status = isp_detach(isp);
982 for (i = 0; i < isp->isp_nirq; i++) {
983 (void) bus_teardown_intr(dev, pcs->irq[i].irq, pcs->irq[i].ih);
984 (void) bus_release_resource(dev, SYS_RES_IRQ, pcs->irq[i].iqd,
988 pci_release_msi(dev);
989 (void) bus_release_resource(dev, pcs->rtp, pcs->rgd, pcs->regs);
991 (void) bus_release_resource(dev, pcs->rtp1, pcs->rgd1, pcs->regs1);
993 (void) bus_release_resource(dev, pcs->rtp2, pcs->rgd2, pcs->regs2);
994 isp_pci_mbxdmafree(isp);
995 if (pcs->pci_isp.isp_param) {
996 free(pcs->pci_isp.isp_param, M_DEVBUF);
997 pcs->pci_isp.isp_param = NULL;
999 if (pcs->pci_isp.isp_osinfo.pc.ptr) {
1000 free(pcs->pci_isp.isp_osinfo.pc.ptr, M_DEVBUF);
1001 pcs->pci_isp.isp_osinfo.pc.ptr = NULL;
1003 mtx_destroy(&isp->isp_lock);
1007 #define IspVirt2Off(a, x) \
1008 (((struct isp_pcisoftc *)a)->pci_poff[((x) & _BLK_REG_MASK) >> \
1009 _BLK_REG_SHFT] + ((x) & 0xfff))
1011 #define BXR2(isp, off) bus_read_2((isp)->isp_regs, (off))
1012 #define BXW2(isp, off, v) bus_write_2((isp)->isp_regs, (off), (v))
1013 #define BXR4(isp, off) bus_read_4((isp)->isp_regs, (off))
1014 #define BXW4(isp, off, v) bus_write_4((isp)->isp_regs, (off), (v))
1015 #define B2R4(isp, off) bus_read_4((isp)->isp_regs2, (off))
1016 #define B2W4(isp, off, v) bus_write_4((isp)->isp_regs2, (off), (v))
1018 static ISP_INLINE uint16_t
1019 isp_pci_rd_debounced(ispsoftc_t *isp, int off)
1023 val = BXR2(isp, IspVirt2Off(isp, off));
1026 val = BXR2(isp, IspVirt2Off(isp, off));
1027 } while (val != prev);
1032 isp_pci_run_isr(ispsoftc_t *isp)
1034 uint16_t isr, sema, info;
1037 isr = isp_pci_rd_debounced(isp, BIU_ISR);
1038 sema = isp_pci_rd_debounced(isp, BIU_SEMA);
1040 isr = BXR2(isp, IspVirt2Off(isp, BIU_ISR));
1041 sema = BXR2(isp, IspVirt2Off(isp, BIU_SEMA));
1043 isp_prt(isp, ISP_LOGDEBUG3, "ISR 0x%x SEMA 0x%x", isr, sema);
1044 isr &= INT_PENDING_MASK(isp);
1045 sema &= BIU_SEMA_LOCK;
1046 if (isr == 0 && sema == 0)
1050 info = isp_pci_rd_debounced(isp, OUTMAILBOX0);
1052 info = BXR2(isp, IspVirt2Off(isp, OUTMAILBOX0));
1053 if (info & MBOX_COMMAND_COMPLETE)
1054 isp_intr_mbox(isp, info);
1056 isp_intr_async(isp, info);
1057 if (!IS_FC(isp) && isp->isp_state == ISP_RUNSTATE)
1058 isp_intr_respq(isp);
1060 isp_intr_respq(isp);
1061 ISP_WRITE(isp, HCCR, HCCR_CMD_CLEAR_RISC_INT);
1063 ISP_WRITE(isp, BIU_SEMA, 0);
1067 isp_pci_run_isr_2300(ispsoftc_t *isp)
1069 uint32_t hccr, r2hisr;
1072 if ((BXR2(isp, IspVirt2Off(isp, BIU_ISR)) & BIU2100_ISR_RISC_INT) == 0)
1074 r2hisr = BXR4(isp, IspVirt2Off(isp, BIU_R2HSTSLO));
1075 isp_prt(isp, ISP_LOGDEBUG3, "RISC2HOST ISR 0x%x", r2hisr);
1076 if ((r2hisr & BIU_R2HST_INTR) == 0)
1078 isr = r2hisr & BIU_R2HST_ISTAT_MASK;
1079 info = r2hisr >> 16;
1081 case ISPR2HST_ROM_MBX_OK:
1082 case ISPR2HST_ROM_MBX_FAIL:
1083 case ISPR2HST_MBX_OK:
1084 case ISPR2HST_MBX_FAIL:
1085 isp_intr_mbox(isp, info);
1087 case ISPR2HST_ASYNC_EVENT:
1088 isp_intr_async(isp, info);
1090 case ISPR2HST_RIO_16:
1091 isp_intr_async(isp, ASYNC_RIO16_1);
1093 case ISPR2HST_FPOST:
1094 isp_intr_async(isp, ASYNC_CMD_CMPLT);
1096 case ISPR2HST_FPOST_CTIO:
1097 isp_intr_async(isp, ASYNC_CTIO_DONE);
1099 case ISPR2HST_RSPQ_UPDATE:
1100 isp_intr_respq(isp);
1103 hccr = ISP_READ(isp, HCCR);
1104 if (hccr & HCCR_PAUSE) {
1105 ISP_WRITE(isp, HCCR, HCCR_RESET);
1106 isp_prt(isp, ISP_LOGERR, "RISC paused at interrupt (%x->%x)", hccr, ISP_READ(isp, HCCR));
1107 ISP_WRITE(isp, BIU_ICR, 0);
1109 isp_prt(isp, ISP_LOGERR, "unknown interrupt 0x%x\n", r2hisr);
1112 ISP_WRITE(isp, HCCR, HCCR_CMD_CLEAR_RISC_INT);
1113 ISP_WRITE(isp, BIU_SEMA, 0);
1117 isp_pci_run_isr_2400(ispsoftc_t *isp)
1122 r2hisr = BXR4(isp, IspVirt2Off(isp, BIU2400_R2HSTSLO));
1123 isp_prt(isp, ISP_LOGDEBUG3, "RISC2HOST ISR 0x%x", r2hisr);
1124 if ((r2hisr & BIU_R2HST_INTR) == 0)
1126 isr = r2hisr & BIU_R2HST_ISTAT_MASK;
1127 info = (r2hisr >> 16);
1129 case ISPR2HST_ROM_MBX_OK:
1130 case ISPR2HST_ROM_MBX_FAIL:
1131 case ISPR2HST_MBX_OK:
1132 case ISPR2HST_MBX_FAIL:
1133 isp_intr_mbox(isp, info);
1135 case ISPR2HST_ASYNC_EVENT:
1136 isp_intr_async(isp, info);
1138 case ISPR2HST_RSPQ_UPDATE:
1139 isp_intr_respq(isp);
1141 case ISPR2HST_RSPQ_UPDATE2:
1142 #ifdef ISP_TARGET_MODE
1143 case ISPR2HST_ATIO_RSPQ_UPDATE:
1145 isp_intr_respq(isp);
1147 #ifdef ISP_TARGET_MODE
1148 case ISPR2HST_ATIO_UPDATE:
1149 case ISPR2HST_ATIO_UPDATE2:
1150 isp_intr_atioq(isp);
1154 isp_prt(isp, ISP_LOGERR, "unknown interrupt 0x%x\n", r2hisr);
1156 ISP_WRITE(isp, BIU2400_HCCR, HCCR_2400_CMD_CLEAR_RISC_INT);
1160 isp_pci_rd_reg(ispsoftc_t *isp, int regoff)
1165 if ((regoff & _BLK_REG_MASK) == SXP_BLOCK) {
1167 * We will assume that someone has paused the RISC processor.
1169 oldconf = BXR2(isp, IspVirt2Off(isp, BIU_CONF1));
1170 BXW2(isp, IspVirt2Off(isp, BIU_CONF1), oldconf | BIU_PCI_CONF1_SXP);
1171 MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, BIU_CONF1), 2, -1);
1173 rv = BXR2(isp, IspVirt2Off(isp, regoff));
1174 if ((regoff & _BLK_REG_MASK) == SXP_BLOCK) {
1175 BXW2(isp, IspVirt2Off(isp, BIU_CONF1), oldconf);
1176 MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, BIU_CONF1), 2, -1);
1182 isp_pci_wr_reg(ispsoftc_t *isp, int regoff, uint32_t val)
1186 if ((regoff & _BLK_REG_MASK) == SXP_BLOCK) {
1188 * We will assume that someone has paused the RISC processor.
1190 oldconf = BXR2(isp, IspVirt2Off(isp, BIU_CONF1));
1191 BXW2(isp, IspVirt2Off(isp, BIU_CONF1),
1192 oldconf | BIU_PCI_CONF1_SXP);
1193 MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, BIU_CONF1), 2, -1);
1195 BXW2(isp, IspVirt2Off(isp, regoff), val);
1196 MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, regoff), 2, -1);
1197 if ((regoff & _BLK_REG_MASK) == SXP_BLOCK) {
1198 BXW2(isp, IspVirt2Off(isp, BIU_CONF1), oldconf);
1199 MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, BIU_CONF1), 2, -1);
1205 isp_pci_rd_reg_1080(ispsoftc_t *isp, int regoff)
1207 uint32_t rv, oc = 0;
1209 if ((regoff & _BLK_REG_MASK) == SXP_BLOCK) {
1212 * We will assume that someone has paused the RISC processor.
1214 oc = BXR2(isp, IspVirt2Off(isp, BIU_CONF1));
1215 tc = oc & ~BIU_PCI1080_CONF1_DMA;
1216 if (regoff & SXP_BANK1_SELECT)
1217 tc |= BIU_PCI1080_CONF1_SXP1;
1219 tc |= BIU_PCI1080_CONF1_SXP0;
1220 BXW2(isp, IspVirt2Off(isp, BIU_CONF1), tc);
1221 MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, BIU_CONF1), 2, -1);
1222 } else if ((regoff & _BLK_REG_MASK) == DMA_BLOCK) {
1223 oc = BXR2(isp, IspVirt2Off(isp, BIU_CONF1));
1224 BXW2(isp, IspVirt2Off(isp, BIU_CONF1),
1225 oc | BIU_PCI1080_CONF1_DMA);
1226 MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, BIU_CONF1), 2, -1);
1228 rv = BXR2(isp, IspVirt2Off(isp, regoff));
1230 BXW2(isp, IspVirt2Off(isp, BIU_CONF1), oc);
1231 MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, BIU_CONF1), 2, -1);
1237 isp_pci_wr_reg_1080(ispsoftc_t *isp, int regoff, uint32_t val)
1241 if ((regoff & _BLK_REG_MASK) == SXP_BLOCK) {
1244 * We will assume that someone has paused the RISC processor.
1246 oc = BXR2(isp, IspVirt2Off(isp, BIU_CONF1));
1247 tc = oc & ~BIU_PCI1080_CONF1_DMA;
1248 if (regoff & SXP_BANK1_SELECT)
1249 tc |= BIU_PCI1080_CONF1_SXP1;
1251 tc |= BIU_PCI1080_CONF1_SXP0;
1252 BXW2(isp, IspVirt2Off(isp, BIU_CONF1), tc);
1253 MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, BIU_CONF1), 2, -1);
1254 } else if ((regoff & _BLK_REG_MASK) == DMA_BLOCK) {
1255 oc = BXR2(isp, IspVirt2Off(isp, BIU_CONF1));
1256 BXW2(isp, IspVirt2Off(isp, BIU_CONF1),
1257 oc | BIU_PCI1080_CONF1_DMA);
1258 MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, BIU_CONF1), 2, -1);
1260 BXW2(isp, IspVirt2Off(isp, regoff), val);
1261 MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, regoff), 2, -1);
1263 BXW2(isp, IspVirt2Off(isp, BIU_CONF1), oc);
1264 MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, BIU_CONF1), 2, -1);
1269 isp_pci_rd_reg_2400(ispsoftc_t *isp, int regoff)
1272 int block = regoff & _BLK_REG_MASK;
1278 return (BXR2(isp, IspVirt2Off(isp, regoff)));
1280 isp_prt(isp, ISP_LOGERR, "SXP_BLOCK read at 0x%x", regoff);
1281 return (0xffffffff);
1283 isp_prt(isp, ISP_LOGERR, "RISC_BLOCK read at 0x%x", regoff);
1284 return (0xffffffff);
1286 isp_prt(isp, ISP_LOGERR, "DMA_BLOCK read at 0x%x", regoff);
1287 return (0xffffffff);
1289 isp_prt(isp, ISP_LOGERR, "unknown block read at 0x%x", regoff);
1290 return (0xffffffff);
1294 case BIU2400_FLASH_ADDR:
1295 case BIU2400_FLASH_DATA:
1299 case BIU2400_REQINP:
1300 case BIU2400_REQOUTP:
1301 case BIU2400_RSPINP:
1302 case BIU2400_RSPOUTP:
1303 case BIU2400_PRI_REQINP:
1304 case BIU2400_PRI_REQOUTP:
1305 case BIU2400_ATIO_RSPINP:
1306 case BIU2400_ATIO_RSPOUTP:
1311 rv = BXR4(isp, IspVirt2Off(isp, regoff));
1313 case BIU2400_R2HSTSLO:
1314 rv = BXR4(isp, IspVirt2Off(isp, regoff));
1316 case BIU2400_R2HSTSHI:
1317 rv = BXR4(isp, IspVirt2Off(isp, regoff)) >> 16;
1320 isp_prt(isp, ISP_LOGERR, "unknown register read at 0x%x",
1329 isp_pci_wr_reg_2400(ispsoftc_t *isp, int regoff, uint32_t val)
1331 int block = regoff & _BLK_REG_MASK;
1337 BXW2(isp, IspVirt2Off(isp, regoff), val);
1338 MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, regoff), 2, -1);
1341 isp_prt(isp, ISP_LOGERR, "SXP_BLOCK write at 0x%x", regoff);
1344 isp_prt(isp, ISP_LOGERR, "RISC_BLOCK write at 0x%x", regoff);
1347 isp_prt(isp, ISP_LOGERR, "DMA_BLOCK write at 0x%x", regoff);
1350 isp_prt(isp, ISP_LOGERR, "unknown block write at 0x%x", regoff);
1355 case BIU2400_FLASH_ADDR:
1356 case BIU2400_FLASH_DATA:
1360 case BIU2400_REQINP:
1361 case BIU2400_REQOUTP:
1362 case BIU2400_RSPINP:
1363 case BIU2400_RSPOUTP:
1364 case BIU2400_PRI_REQINP:
1365 case BIU2400_PRI_REQOUTP:
1366 case BIU2400_ATIO_RSPINP:
1367 case BIU2400_ATIO_RSPOUTP:
1372 BXW4(isp, IspVirt2Off(isp, regoff), val);
1373 #ifdef MEMORYBARRIERW
1374 if (regoff == BIU2400_REQINP ||
1375 regoff == BIU2400_RSPOUTP ||
1376 regoff == BIU2400_PRI_REQINP ||
1377 regoff == BIU2400_ATIO_RSPOUTP)
1378 MEMORYBARRIERW(isp, SYNC_REG,
1379 IspVirt2Off(isp, regoff), 4, -1)
1382 MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, regoff), 4, -1);
1385 isp_prt(isp, ISP_LOGERR, "unknown register write at 0x%x",
1392 isp_pci_rd_reg_2600(ispsoftc_t *isp, int regoff)
1397 case BIU2400_PRI_REQINP:
1398 case BIU2400_PRI_REQOUTP:
1399 isp_prt(isp, ISP_LOGERR, "unknown register read at 0x%x",
1403 case BIU2400_REQINP:
1404 rv = B2R4(isp, 0x00);
1406 case BIU2400_REQOUTP:
1407 rv = B2R4(isp, 0x04);
1409 case BIU2400_RSPINP:
1410 rv = B2R4(isp, 0x08);
1412 case BIU2400_RSPOUTP:
1413 rv = B2R4(isp, 0x0c);
1415 case BIU2400_ATIO_RSPINP:
1416 rv = B2R4(isp, 0x10);
1418 case BIU2400_ATIO_RSPOUTP:
1419 rv = B2R4(isp, 0x14);
1422 rv = isp_pci_rd_reg_2400(isp, regoff);
1429 isp_pci_wr_reg_2600(ispsoftc_t *isp, int regoff, uint32_t val)
1434 case BIU2400_PRI_REQINP:
1435 case BIU2400_PRI_REQOUTP:
1436 isp_prt(isp, ISP_LOGERR, "unknown register write at 0x%x",
1439 case BIU2400_REQINP:
1442 case BIU2400_REQOUTP:
1445 case BIU2400_RSPINP:
1448 case BIU2400_RSPOUTP:
1451 case BIU2400_ATIO_RSPINP:
1454 case BIU2400_ATIO_RSPOUTP:
1458 isp_pci_wr_reg_2400(isp, regoff, val);
1461 B2W4(isp, off, val);
1471 imc(void *arg, bus_dma_segment_t *segs, int nseg, int error)
1473 struct imush *imushp = (struct imush *) arg;
1475 if (!(imushp->error = error))
1476 imushp->maddr = segs[0].ds_addr;
1480 isp_pci_mbxdma(ispsoftc_t *isp)
1483 uint32_t len, nsegs;
1484 int i, error, cmap = 0;
1485 bus_size_t slim; /* segment size */
1486 bus_addr_t llim; /* low limit of unavailable dma */
1487 bus_addr_t hlim; /* high limit of unavailable dma */
1491 /* Already been here? If so, leave... */
1492 if (isp->isp_xflist != NULL)
1494 if (isp->isp_rquest != NULL && isp->isp_maxcmds == 0)
1497 if (isp->isp_rquest != NULL)
1500 hlim = BUS_SPACE_MAXADDR;
1501 if (IS_ULTRA2(isp) || IS_FC(isp) || IS_1240(isp)) {
1502 if (sizeof (bus_size_t) > 4)
1503 slim = (bus_size_t) (1ULL << 32);
1505 slim = (bus_size_t) (1UL << 31);
1506 llim = BUS_SPACE_MAXADDR;
1509 llim = BUS_SPACE_MAXADDR_32BIT;
1511 if (sizeof (bus_size_t) > 4)
1512 nsegs = ISP_NSEG64_MAX;
1514 nsegs = ISP_NSEG_MAX;
1516 if (bus_dma_tag_create(bus_get_dma_tag(ISP_PCD(isp)), 1,
1517 slim, llim, hlim, NULL, NULL, BUS_SPACE_MAXSIZE, nsegs, slim, 0,
1518 busdma_lock_mutex, &isp->isp_lock, &isp->isp_osinfo.dmat)) {
1520 isp_prt(isp, ISP_LOGERR, "could not create master dma tag");
1525 * Allocate and map the request queue and a region for external
1526 * DMA addressable command/status structures (22XX and later).
1528 len = ISP_QUEUE_SIZE(RQUEST_QUEUE_LEN(isp));
1529 if (isp->isp_type >= ISP_HA_FC_2200)
1530 len += (N_XCMDS * XCMD_SIZE);
1531 if (bus_dma_tag_create(isp->isp_osinfo.dmat, QENTRY_LEN, slim,
1532 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL,
1533 len, 1, len, 0, busdma_lock_mutex, &isp->isp_lock,
1534 &isp->isp_osinfo.reqdmat)) {
1535 isp_prt(isp, ISP_LOGERR, "cannot create request DMA tag");
1538 if (bus_dmamem_alloc(isp->isp_osinfo.reqdmat, (void **)&base,
1539 BUS_DMA_COHERENT, &isp->isp_osinfo.reqmap) != 0) {
1540 isp_prt(isp, ISP_LOGERR, "cannot allocate request DMA memory");
1541 bus_dma_tag_destroy(isp->isp_osinfo.reqdmat);
1544 isp->isp_rquest = base;
1546 if (bus_dmamap_load(isp->isp_osinfo.reqdmat, isp->isp_osinfo.reqmap,
1547 base, len, imc, &im, 0) || im.error) {
1548 isp_prt(isp, ISP_LOGERR, "error loading request DMA map %d", im.error);
1551 isp_prt(isp, ISP_LOGDEBUG0, "request area @ 0x%jx/0x%jx",
1552 (uintmax_t)im.maddr, (uintmax_t)len);
1553 isp->isp_rquest_dma = im.maddr;
1554 base += ISP_QUEUE_SIZE(RQUEST_QUEUE_LEN(isp));
1555 im.maddr += ISP_QUEUE_SIZE(RQUEST_QUEUE_LEN(isp));
1556 if (isp->isp_type >= ISP_HA_FC_2200) {
1557 isp->isp_osinfo.ecmd_dma = im.maddr;
1558 isp->isp_osinfo.ecmd_free = (isp_ecmd_t *)base;
1559 isp->isp_osinfo.ecmd_base = isp->isp_osinfo.ecmd_free;
1560 for (ecmd = isp->isp_osinfo.ecmd_free;
1561 ecmd < &isp->isp_osinfo.ecmd_free[N_XCMDS]; ecmd++) {
1562 if (ecmd == &isp->isp_osinfo.ecmd_free[N_XCMDS - 1])
1565 ecmd->next = ecmd + 1;
1570 * Allocate and map the result queue.
1572 len = ISP_QUEUE_SIZE(RESULT_QUEUE_LEN(isp));
1573 if (bus_dma_tag_create(isp->isp_osinfo.dmat, QENTRY_LEN, slim,
1574 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL,
1575 len, 1, len, 0, busdma_lock_mutex, &isp->isp_lock,
1576 &isp->isp_osinfo.respdmat)) {
1577 isp_prt(isp, ISP_LOGERR, "cannot create response DMA tag");
1580 if (bus_dmamem_alloc(isp->isp_osinfo.respdmat, (void **)&base,
1581 BUS_DMA_COHERENT, &isp->isp_osinfo.respmap) != 0) {
1582 isp_prt(isp, ISP_LOGERR, "cannot allocate response DMA memory");
1583 bus_dma_tag_destroy(isp->isp_osinfo.respdmat);
1586 isp->isp_result = base;
1588 if (bus_dmamap_load(isp->isp_osinfo.respdmat, isp->isp_osinfo.respmap,
1589 base, len, imc, &im, 0) || im.error) {
1590 isp_prt(isp, ISP_LOGERR, "error loading response DMA map %d", im.error);
1593 isp_prt(isp, ISP_LOGDEBUG0, "response area @ 0x%jx/0x%jx",
1594 (uintmax_t)im.maddr, (uintmax_t)len);
1595 isp->isp_result_dma = im.maddr;
1597 #ifdef ISP_TARGET_MODE
1599 * Allocate and map ATIO queue on 24xx with target mode.
1602 len = ISP_QUEUE_SIZE(RESULT_QUEUE_LEN(isp));
1603 if (bus_dma_tag_create(isp->isp_osinfo.dmat, QENTRY_LEN, slim,
1604 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL,
1605 len, 1, len, 0, busdma_lock_mutex, &isp->isp_lock,
1606 &isp->isp_osinfo.atiodmat)) {
1607 isp_prt(isp, ISP_LOGERR, "cannot create ATIO DMA tag");
1610 if (bus_dmamem_alloc(isp->isp_osinfo.atiodmat, (void **)&base,
1611 BUS_DMA_COHERENT, &isp->isp_osinfo.atiomap) != 0) {
1612 isp_prt(isp, ISP_LOGERR, "cannot allocate ATIO DMA memory");
1613 bus_dma_tag_destroy(isp->isp_osinfo.atiodmat);
1616 isp->isp_atioq = base;
1618 if (bus_dmamap_load(isp->isp_osinfo.atiodmat, isp->isp_osinfo.atiomap,
1619 base, len, imc, &im, 0) || im.error) {
1620 isp_prt(isp, ISP_LOGERR, "error loading ATIO DMA map %d", im.error);
1623 isp_prt(isp, ISP_LOGDEBUG0, "ATIO area @ 0x%jx/0x%jx",
1624 (uintmax_t)im.maddr, (uintmax_t)len);
1625 isp->isp_atioq_dma = im.maddr;
1630 if (bus_dma_tag_create(isp->isp_osinfo.dmat, 64, slim,
1631 BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, NULL, NULL,
1632 2*QENTRY_LEN, 1, 2*QENTRY_LEN, 0, busdma_lock_mutex,
1633 &isp->isp_lock, &isp->isp_osinfo.iocbdmat)) {
1636 if (bus_dmamem_alloc(isp->isp_osinfo.iocbdmat,
1637 (void **)&base, BUS_DMA_COHERENT, &isp->isp_osinfo.iocbmap) != 0)
1639 isp->isp_iocb = base;
1641 if (bus_dmamap_load(isp->isp_osinfo.iocbdmat, isp->isp_osinfo.iocbmap,
1642 base, 2*QENTRY_LEN, imc, &im, 0) || im.error)
1644 isp->isp_iocb_dma = im.maddr;
1646 if (bus_dma_tag_create(isp->isp_osinfo.dmat, 64, slim,
1647 BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, NULL, NULL,
1648 ISP_FC_SCRLEN, 1, ISP_FC_SCRLEN, 0, busdma_lock_mutex,
1649 &isp->isp_lock, &isp->isp_osinfo.scdmat))
1651 for (cmap = 0; cmap < isp->isp_nchan; cmap++) {
1652 struct isp_fc *fc = ISP_FC_PC(isp, cmap);
1653 if (bus_dmamem_alloc(isp->isp_osinfo.scdmat,
1654 (void **)&base, BUS_DMA_COHERENT, &fc->scmap) != 0)
1656 FCPARAM(isp, cmap)->isp_scratch = base;
1658 if (bus_dmamap_load(isp->isp_osinfo.scdmat, fc->scmap,
1659 base, ISP_FC_SCRLEN, imc, &im, 0) || im.error) {
1660 bus_dmamem_free(isp->isp_osinfo.scdmat,
1662 FCPARAM(isp, cmap)->isp_scratch = NULL;
1665 FCPARAM(isp, cmap)->isp_scdma = im.maddr;
1666 if (!IS_2100(isp)) {
1667 for (i = 0; i < INITIAL_NEXUS_COUNT; i++) {
1668 struct isp_nexus *n = malloc(sizeof (struct isp_nexus), M_DEVBUF, M_NOWAIT | M_ZERO);
1670 while (fc->nexus_free_list) {
1671 n = fc->nexus_free_list;
1672 fc->nexus_free_list = n->next;
1677 n->next = fc->nexus_free_list;
1678 fc->nexus_free_list = n;
1684 if (isp->isp_maxcmds == 0) {
1690 len = isp->isp_maxcmds * sizeof (struct isp_pcmd);
1691 isp->isp_osinfo.pcmd_pool = (struct isp_pcmd *)
1692 malloc(len, M_DEVBUF, M_WAITOK | M_ZERO);
1693 for (i = 0; i < isp->isp_maxcmds; i++) {
1694 struct isp_pcmd *pcmd = &isp->isp_osinfo.pcmd_pool[i];
1695 error = bus_dmamap_create(isp->isp_osinfo.dmat, 0, &pcmd->dmap);
1697 isp_prt(isp, ISP_LOGERR, "error %d creating per-cmd DMA maps", error);
1699 bus_dmamap_destroy(isp->isp_osinfo.dmat,
1700 isp->isp_osinfo.pcmd_pool[i].dmap);
1704 callout_init_mtx(&pcmd->wdog, &isp->isp_lock, 0);
1705 if (i == isp->isp_maxcmds-1)
1708 pcmd->next = &isp->isp_osinfo.pcmd_pool[i+1];
1710 isp->isp_osinfo.pcmd_free = &isp->isp_osinfo.pcmd_pool[0];
1712 len = sizeof (isp_hdl_t) * isp->isp_maxcmds;
1713 isp->isp_xflist = (isp_hdl_t *) malloc(len, M_DEVBUF, M_WAITOK | M_ZERO);
1714 for (len = 0; len < isp->isp_maxcmds - 1; len++)
1715 isp->isp_xflist[len].cmd = &isp->isp_xflist[len+1];
1716 isp->isp_xffree = isp->isp_xflist;
1722 isp_pci_mbxdmafree(isp);
1728 isp_pci_mbxdmafree(ispsoftc_t *isp)
1732 if (isp->isp_xflist != NULL) {
1733 free(isp->isp_xflist, M_DEVBUF);
1734 isp->isp_xflist = NULL;
1736 if (isp->isp_osinfo.pcmd_pool != NULL) {
1737 for (i = 0; i < isp->isp_maxcmds; i++) {
1738 bus_dmamap_destroy(isp->isp_osinfo.dmat,
1739 isp->isp_osinfo.pcmd_pool[i].dmap);
1741 free(isp->isp_osinfo.pcmd_pool, M_DEVBUF);
1742 isp->isp_osinfo.pcmd_pool = NULL;
1745 for (i = 0; i < isp->isp_nchan; i++) {
1746 struct isp_fc *fc = ISP_FC_PC(isp, i);
1747 if (FCPARAM(isp, i)->isp_scdma != 0) {
1748 bus_dmamap_unload(isp->isp_osinfo.scdmat,
1750 FCPARAM(isp, i)->isp_scdma = 0;
1752 if (FCPARAM(isp, i)->isp_scratch != NULL) {
1753 bus_dmamem_free(isp->isp_osinfo.scdmat,
1754 FCPARAM(isp, i)->isp_scratch, fc->scmap);
1755 FCPARAM(isp, i)->isp_scratch = NULL;
1757 while (fc->nexus_free_list) {
1758 struct isp_nexus *n = fc->nexus_free_list;
1759 fc->nexus_free_list = n->next;
1763 if (isp->isp_iocb_dma != 0) {
1764 bus_dma_tag_destroy(isp->isp_osinfo.scdmat);
1765 bus_dmamap_unload(isp->isp_osinfo.iocbdmat,
1766 isp->isp_osinfo.iocbmap);
1767 isp->isp_iocb_dma = 0;
1769 if (isp->isp_iocb != NULL) {
1770 bus_dmamem_free(isp->isp_osinfo.iocbdmat,
1771 isp->isp_iocb, isp->isp_osinfo.iocbmap);
1772 bus_dma_tag_destroy(isp->isp_osinfo.iocbdmat);
1775 #ifdef ISP_TARGET_MODE
1777 if (isp->isp_atioq_dma != 0) {
1778 bus_dmamap_unload(isp->isp_osinfo.atiodmat,
1779 isp->isp_osinfo.atiomap);
1780 isp->isp_atioq_dma = 0;
1782 if (isp->isp_atioq != NULL) {
1783 bus_dmamem_free(isp->isp_osinfo.atiodmat, isp->isp_atioq,
1784 isp->isp_osinfo.atiomap);
1785 bus_dma_tag_destroy(isp->isp_osinfo.atiodmat);
1786 isp->isp_atioq = NULL;
1790 if (isp->isp_result_dma != 0) {
1791 bus_dmamap_unload(isp->isp_osinfo.respdmat,
1792 isp->isp_osinfo.respmap);
1793 isp->isp_result_dma = 0;
1795 if (isp->isp_result != NULL) {
1796 bus_dmamem_free(isp->isp_osinfo.respdmat, isp->isp_result,
1797 isp->isp_osinfo.respmap);
1798 bus_dma_tag_destroy(isp->isp_osinfo.respdmat);
1799 isp->isp_result = NULL;
1801 if (isp->isp_rquest_dma != 0) {
1802 bus_dmamap_unload(isp->isp_osinfo.reqdmat,
1803 isp->isp_osinfo.reqmap);
1804 isp->isp_rquest_dma = 0;
1806 if (isp->isp_rquest != NULL) {
1807 bus_dmamem_free(isp->isp_osinfo.reqdmat, isp->isp_rquest,
1808 isp->isp_osinfo.reqmap);
1809 bus_dma_tag_destroy(isp->isp_osinfo.reqdmat);
1810 isp->isp_rquest = NULL;
1817 void *rq; /* original request */
1821 #define MUSHERR_NOQENTRIES -2
1824 dma2(void *arg, bus_dma_segment_t *dm_segs, int nseg, int error)
1826 mush_t *mp = (mush_t *) arg;
1827 ispsoftc_t *isp= mp->isp;
1828 struct ccb_scsiio *csio = mp->cmd_token;
1839 if ((csio->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) {
1840 ddir = ISP_FROM_DEVICE;
1842 ddir = ISP_TO_DEVICE;
1844 if ((csio->ccb_h.func_code == XPT_CONT_TARGET_IO) ^
1845 ((csio->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN)) {
1846 sdir = BUS_DMASYNC_PREREAD;
1848 sdir = BUS_DMASYNC_PREWRITE;
1850 bus_dmamap_sync(isp->isp_osinfo.dmat, PISP_PCMD(csio)->dmap,
1854 error = isp_send_cmd(isp, mp->rq, dm_segs, nseg, XS_XFRLEN(csio),
1855 ddir, (ispds64_t *)csio->req_map);
1858 mp->error = MUSHERR_NOQENTRIES;
1869 isp_pci_dmasetup(ispsoftc_t *isp, struct ccb_scsiio *csio, void *ff)
1876 mp->cmd_token = csio;
1880 error = bus_dmamap_load_ccb(isp->isp_osinfo.dmat, PISP_PCMD(csio)->dmap,
1881 (union ccb *)csio, dma2, mp, 0);
1882 if (error == EINPROGRESS) {
1883 bus_dmamap_unload(isp->isp_osinfo.dmat, PISP_PCMD(csio)->dmap);
1885 isp_prt(isp, ISP_LOGERR, "deferred dma allocation not supported");
1886 } else if (error && mp->error == 0) {
1888 isp_prt(isp, ISP_LOGERR, "error %d in dma mapping code", error);
1893 int retval = CMD_COMPLETE;
1894 if (mp->error == MUSHERR_NOQENTRIES) {
1895 retval = CMD_EAGAIN;
1896 } else if (mp->error == EFBIG) {
1897 csio->ccb_h.status = CAM_REQ_TOO_BIG;
1898 } else if (mp->error == EINVAL) {
1899 csio->ccb_h.status = CAM_REQ_INVALID;
1901 csio->ccb_h.status = CAM_UNREC_HBA_ERROR;
1905 return (CMD_QUEUED);
1909 isp_pci_irqsetup(ispsoftc_t *isp)
1911 device_t dev = isp->isp_osinfo.dev;
1912 struct isp_pcisoftc *pcs = device_get_softc(dev);
1916 /* Allocate IRQs only once. */
1917 if (isp->isp_nirq > 0)
1921 if (ISP_CAP_MSIX(isp)) {
1922 max_irq = IS_26XX(isp) ? 3 : (IS_25XX(isp) ? 2 : 0);
1923 resource_int_value(device_get_name(dev),
1924 device_get_unit(dev), "msix", &max_irq);
1925 max_irq = imin(ISP_MAX_IRQS, max_irq);
1926 pcs->msicount = imin(pci_msix_count(dev), max_irq);
1927 if (pcs->msicount > 0 &&
1928 pci_alloc_msix(dev, &pcs->msicount) != 0)
1931 if (pcs->msicount == 0) {
1933 resource_int_value(device_get_name(dev),
1934 device_get_unit(dev), "msi", &max_irq);
1935 max_irq = imin(1, max_irq);
1936 pcs->msicount = imin(pci_msi_count(dev), max_irq);
1937 if (pcs->msicount > 0 &&
1938 pci_alloc_msi(dev, &pcs->msicount) != 0)
1941 for (i = 0; i < MAX(1, pcs->msicount); i++) {
1942 pcs->irq[i].iqd = i + (pcs->msicount > 0);
1943 pcs->irq[i].irq = bus_alloc_resource_any(dev, SYS_RES_IRQ,
1944 &pcs->irq[i].iqd, RF_ACTIVE | RF_SHAREABLE);
1945 if (pcs->irq[i].irq == NULL) {
1946 device_printf(dev, "could not allocate interrupt\n");
1950 f = isp_platform_intr;
1952 f = isp_platform_intr_resp;
1954 f = isp_platform_intr_atio;
1955 if (bus_setup_intr(dev, pcs->irq[i].irq, ISP_IFLAGS, NULL,
1956 f, isp, &pcs->irq[i].ih)) {
1957 device_printf(dev, "could not setup interrupt\n");
1958 (void) bus_release_resource(dev, SYS_RES_IRQ,
1959 pcs->irq[i].iqd, pcs->irq[i].irq);
1962 if (pcs->msicount > 1) {
1963 bus_describe_intr(dev, pcs->irq[i].irq, pcs->irq[i].ih,
1966 isp->isp_nirq = i + 1;
1970 return (isp->isp_nirq == 0);
1974 isp_pci_dumpregs(ispsoftc_t *isp, const char *msg)
1976 struct isp_pcisoftc *pcs = (struct isp_pcisoftc *)isp;
1978 printf("%s: %s\n", device_get_nameunit(isp->isp_dev), msg);
1980 printf("%s:\n", device_get_nameunit(isp->isp_dev));
1982 printf(" biu_conf1=%x", ISP_READ(isp, BIU_CONF1));
1984 printf(" biu_csr=%x", ISP_READ(isp, BIU2100_CSR));
1985 printf(" biu_icr=%x biu_isr=%x biu_sema=%x ", ISP_READ(isp, BIU_ICR),
1986 ISP_READ(isp, BIU_ISR), ISP_READ(isp, BIU_SEMA));
1987 printf("risc_hccr=%x\n", ISP_READ(isp, HCCR));
1991 ISP_WRITE(isp, HCCR, HCCR_CMD_PAUSE);
1992 printf(" cdma_conf=%x cdma_sts=%x cdma_fifostat=%x\n",
1993 ISP_READ(isp, CDMA_CONF), ISP_READ(isp, CDMA_STATUS),
1994 ISP_READ(isp, CDMA_FIFO_STS));
1995 printf(" ddma_conf=%x ddma_sts=%x ddma_fifostat=%x\n",
1996 ISP_READ(isp, DDMA_CONF), ISP_READ(isp, DDMA_STATUS),
1997 ISP_READ(isp, DDMA_FIFO_STS));
1998 printf(" sxp_int=%x sxp_gross=%x sxp(scsi_ctrl)=%x\n",
1999 ISP_READ(isp, SXP_INTERRUPT),
2000 ISP_READ(isp, SXP_GROSS_ERR),
2001 ISP_READ(isp, SXP_PINS_CTRL));
2002 ISP_WRITE(isp, HCCR, HCCR_CMD_RELEASE);
2004 printf(" mbox regs: %x %x %x %x %x\n",
2005 ISP_READ(isp, OUTMAILBOX0), ISP_READ(isp, OUTMAILBOX1),
2006 ISP_READ(isp, OUTMAILBOX2), ISP_READ(isp, OUTMAILBOX3),
2007 ISP_READ(isp, OUTMAILBOX4));
2008 printf(" PCI Status Command/Status=%x\n",
2009 pci_read_config(pcs->pci_dev, PCIR_COMMAND, 1));