2 * Copyright (c) 1997-2008 by Matthew Jacob
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice immediately at the beginning of the file, without modification,
10 * this list of conditions, and the following disclaimer.
11 * 2. The name of the author may not be used to endorse or promote products
12 * derived from this software without specific prior written permission.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
18 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * PCI specific probe and attach routines for Qlogic ISP SCSI adapters.
30 #include <sys/cdefs.h>
31 __FBSDID("$FreeBSD$");
33 #include <sys/param.h>
34 #include <sys/systm.h>
35 #include <sys/kernel.h>
36 #include <sys/module.h>
37 #include <sys/linker.h>
38 #include <sys/firmware.h>
40 #include <sys/stdint.h>
41 #include <dev/pci/pcireg.h>
42 #include <dev/pci/pcivar.h>
43 #include <machine/bus.h>
44 #include <machine/resource.h>
46 #include <sys/malloc.h>
50 #include <dev/ofw/openfirm.h>
51 #include <machine/ofw_machdep.h>
54 #include <dev/isp/isp_freebsd.h>
56 static uint32_t isp_pci_rd_reg(ispsoftc_t *, int);
57 static void isp_pci_wr_reg(ispsoftc_t *, int, uint32_t);
58 static uint32_t isp_pci_rd_reg_1080(ispsoftc_t *, int);
59 static void isp_pci_wr_reg_1080(ispsoftc_t *, int, uint32_t);
60 static uint32_t isp_pci_rd_reg_2400(ispsoftc_t *, int);
61 static void isp_pci_wr_reg_2400(ispsoftc_t *, int, uint32_t);
62 static int isp_pci_rd_isr(ispsoftc_t *, uint32_t *, uint16_t *, uint16_t *);
63 static int isp_pci_rd_isr_2300(ispsoftc_t *, uint32_t *, uint16_t *, uint16_t *);
64 static int isp_pci_rd_isr_2400(ispsoftc_t *, uint32_t *, uint16_t *, uint16_t *);
65 static int isp_pci_mbxdma(ispsoftc_t *);
66 static int isp_pci_dmasetup(ispsoftc_t *, XS_T *, void *);
69 static void isp_pci_reset0(ispsoftc_t *);
70 static void isp_pci_reset1(ispsoftc_t *);
71 static void isp_pci_dumpregs(ispsoftc_t *, const char *);
73 static struct ispmdvec mdvec = {
79 isp_common_dmateardown,
84 BIU_BURST_ENABLE|BIU_PCI_CONF1_FIFO_64
87 static struct ispmdvec mdvec_1080 = {
93 isp_common_dmateardown,
98 BIU_BURST_ENABLE|BIU_PCI_CONF1_FIFO_64
101 static struct ispmdvec mdvec_12160 = {
107 isp_common_dmateardown,
112 BIU_BURST_ENABLE|BIU_PCI_CONF1_FIFO_64
115 static struct ispmdvec mdvec_2100 = {
121 isp_common_dmateardown,
127 static struct ispmdvec mdvec_2200 = {
133 isp_common_dmateardown,
139 static struct ispmdvec mdvec_2300 = {
145 isp_common_dmateardown,
151 static struct ispmdvec mdvec_2400 = {
157 isp_common_dmateardown,
163 static struct ispmdvec mdvec_2500 = {
169 isp_common_dmateardown,
175 #ifndef PCIM_CMD_INVEN
176 #define PCIM_CMD_INVEN 0x10
178 #ifndef PCIM_CMD_BUSMASTEREN
179 #define PCIM_CMD_BUSMASTEREN 0x0004
181 #ifndef PCIM_CMD_PERRESPEN
182 #define PCIM_CMD_PERRESPEN 0x0040
184 #ifndef PCIM_CMD_SEREN
185 #define PCIM_CMD_SEREN 0x0100
187 #ifndef PCIM_CMD_INTX_DISABLE
188 #define PCIM_CMD_INTX_DISABLE 0x0400
192 #define PCIR_COMMAND 0x04
195 #ifndef PCIR_CACHELNSZ
196 #define PCIR_CACHELNSZ 0x0c
199 #ifndef PCIR_LATTIMER
200 #define PCIR_LATTIMER 0x0d
204 #define PCIR_ROMADDR 0x30
207 #ifndef PCI_VENDOR_QLOGIC
208 #define PCI_VENDOR_QLOGIC 0x1077
211 #ifndef PCI_PRODUCT_QLOGIC_ISP1020
212 #define PCI_PRODUCT_QLOGIC_ISP1020 0x1020
215 #ifndef PCI_PRODUCT_QLOGIC_ISP1080
216 #define PCI_PRODUCT_QLOGIC_ISP1080 0x1080
219 #ifndef PCI_PRODUCT_QLOGIC_ISP10160
220 #define PCI_PRODUCT_QLOGIC_ISP10160 0x1016
223 #ifndef PCI_PRODUCT_QLOGIC_ISP12160
224 #define PCI_PRODUCT_QLOGIC_ISP12160 0x1216
227 #ifndef PCI_PRODUCT_QLOGIC_ISP1240
228 #define PCI_PRODUCT_QLOGIC_ISP1240 0x1240
231 #ifndef PCI_PRODUCT_QLOGIC_ISP1280
232 #define PCI_PRODUCT_QLOGIC_ISP1280 0x1280
235 #ifndef PCI_PRODUCT_QLOGIC_ISP2100
236 #define PCI_PRODUCT_QLOGIC_ISP2100 0x2100
239 #ifndef PCI_PRODUCT_QLOGIC_ISP2200
240 #define PCI_PRODUCT_QLOGIC_ISP2200 0x2200
243 #ifndef PCI_PRODUCT_QLOGIC_ISP2300
244 #define PCI_PRODUCT_QLOGIC_ISP2300 0x2300
247 #ifndef PCI_PRODUCT_QLOGIC_ISP2312
248 #define PCI_PRODUCT_QLOGIC_ISP2312 0x2312
251 #ifndef PCI_PRODUCT_QLOGIC_ISP2322
252 #define PCI_PRODUCT_QLOGIC_ISP2322 0x2322
255 #ifndef PCI_PRODUCT_QLOGIC_ISP2422
256 #define PCI_PRODUCT_QLOGIC_ISP2422 0x2422
259 #ifndef PCI_PRODUCT_QLOGIC_ISP2432
260 #define PCI_PRODUCT_QLOGIC_ISP2432 0x2432
263 #ifndef PCI_PRODUCT_QLOGIC_ISP2532
264 #define PCI_PRODUCT_QLOGIC_ISP2532 0x2532
267 #ifndef PCI_PRODUCT_QLOGIC_ISP6312
268 #define PCI_PRODUCT_QLOGIC_ISP6312 0x6312
271 #ifndef PCI_PRODUCT_QLOGIC_ISP6322
272 #define PCI_PRODUCT_QLOGIC_ISP6322 0x6322
275 #ifndef PCI_PRODUCT_QLOGIC_ISP5432
276 #define PCI_PRODUCT_QLOGIC_ISP5432 0x5432
279 #define PCI_QLOGIC_ISP5432 \
280 ((PCI_PRODUCT_QLOGIC_ISP5432 << 16) | PCI_VENDOR_QLOGIC)
282 #define PCI_QLOGIC_ISP1020 \
283 ((PCI_PRODUCT_QLOGIC_ISP1020 << 16) | PCI_VENDOR_QLOGIC)
285 #define PCI_QLOGIC_ISP1080 \
286 ((PCI_PRODUCT_QLOGIC_ISP1080 << 16) | PCI_VENDOR_QLOGIC)
288 #define PCI_QLOGIC_ISP10160 \
289 ((PCI_PRODUCT_QLOGIC_ISP10160 << 16) | PCI_VENDOR_QLOGIC)
291 #define PCI_QLOGIC_ISP12160 \
292 ((PCI_PRODUCT_QLOGIC_ISP12160 << 16) | PCI_VENDOR_QLOGIC)
294 #define PCI_QLOGIC_ISP1240 \
295 ((PCI_PRODUCT_QLOGIC_ISP1240 << 16) | PCI_VENDOR_QLOGIC)
297 #define PCI_QLOGIC_ISP1280 \
298 ((PCI_PRODUCT_QLOGIC_ISP1280 << 16) | PCI_VENDOR_QLOGIC)
300 #define PCI_QLOGIC_ISP2100 \
301 ((PCI_PRODUCT_QLOGIC_ISP2100 << 16) | PCI_VENDOR_QLOGIC)
303 #define PCI_QLOGIC_ISP2200 \
304 ((PCI_PRODUCT_QLOGIC_ISP2200 << 16) | PCI_VENDOR_QLOGIC)
306 #define PCI_QLOGIC_ISP2300 \
307 ((PCI_PRODUCT_QLOGIC_ISP2300 << 16) | PCI_VENDOR_QLOGIC)
309 #define PCI_QLOGIC_ISP2312 \
310 ((PCI_PRODUCT_QLOGIC_ISP2312 << 16) | PCI_VENDOR_QLOGIC)
312 #define PCI_QLOGIC_ISP2322 \
313 ((PCI_PRODUCT_QLOGIC_ISP2322 << 16) | PCI_VENDOR_QLOGIC)
315 #define PCI_QLOGIC_ISP2422 \
316 ((PCI_PRODUCT_QLOGIC_ISP2422 << 16) | PCI_VENDOR_QLOGIC)
318 #define PCI_QLOGIC_ISP2432 \
319 ((PCI_PRODUCT_QLOGIC_ISP2432 << 16) | PCI_VENDOR_QLOGIC)
321 #define PCI_QLOGIC_ISP2532 \
322 ((PCI_PRODUCT_QLOGIC_ISP2532 << 16) | PCI_VENDOR_QLOGIC)
324 #define PCI_QLOGIC_ISP6312 \
325 ((PCI_PRODUCT_QLOGIC_ISP6312 << 16) | PCI_VENDOR_QLOGIC)
327 #define PCI_QLOGIC_ISP6322 \
328 ((PCI_PRODUCT_QLOGIC_ISP6322 << 16) | PCI_VENDOR_QLOGIC)
331 * Odd case for some AMI raid cards... We need to *not* attach to this.
333 #define AMI_RAID_SUBVENDOR_ID 0x101e
335 #define IO_MAP_REG 0x10
336 #define MEM_MAP_REG 0x14
338 #define PCI_DFLT_LTNCY 0x40
339 #define PCI_DFLT_LNSZ 0x10
341 static int isp_pci_probe (device_t);
342 static int isp_pci_attach (device_t);
343 static int isp_pci_detach (device_t);
346 #define ISP_PCD(isp) ((struct isp_pcisoftc *)isp)->pci_dev
347 struct isp_pcisoftc {
350 struct resource * regs;
356 int16_t pci_poff[_NREG_BLKS];
362 static device_method_t isp_pci_methods[] = {
363 /* Device interface */
364 DEVMETHOD(device_probe, isp_pci_probe),
365 DEVMETHOD(device_attach, isp_pci_attach),
366 DEVMETHOD(device_detach, isp_pci_detach),
370 static driver_t isp_pci_driver = {
371 "isp", isp_pci_methods, sizeof (struct isp_pcisoftc)
373 static devclass_t isp_devclass;
374 DRIVER_MODULE(isp, pci, isp_pci_driver, isp_devclass, 0, 0);
375 MODULE_DEPEND(isp, cam, 1, 1, 1);
376 MODULE_DEPEND(isp, firmware, 1, 1, 1);
377 static int isp_nvports = 0;
380 isp_pci_probe(device_t dev)
382 switch ((pci_get_device(dev) << 16) | (pci_get_vendor(dev))) {
383 case PCI_QLOGIC_ISP1020:
384 device_set_desc(dev, "Qlogic ISP 1020/1040 PCI SCSI Adapter");
386 case PCI_QLOGIC_ISP1080:
387 device_set_desc(dev, "Qlogic ISP 1080 PCI SCSI Adapter");
389 case PCI_QLOGIC_ISP1240:
390 device_set_desc(dev, "Qlogic ISP 1240 PCI SCSI Adapter");
392 case PCI_QLOGIC_ISP1280:
393 device_set_desc(dev, "Qlogic ISP 1280 PCI SCSI Adapter");
395 case PCI_QLOGIC_ISP10160:
396 device_set_desc(dev, "Qlogic ISP 10160 PCI SCSI Adapter");
398 case PCI_QLOGIC_ISP12160:
399 if (pci_get_subvendor(dev) == AMI_RAID_SUBVENDOR_ID) {
402 device_set_desc(dev, "Qlogic ISP 12160 PCI SCSI Adapter");
404 case PCI_QLOGIC_ISP2100:
405 device_set_desc(dev, "Qlogic ISP 2100 PCI FC-AL Adapter");
407 case PCI_QLOGIC_ISP2200:
408 device_set_desc(dev, "Qlogic ISP 2200 PCI FC-AL Adapter");
410 case PCI_QLOGIC_ISP2300:
411 device_set_desc(dev, "Qlogic ISP 2300 PCI FC-AL Adapter");
413 case PCI_QLOGIC_ISP2312:
414 device_set_desc(dev, "Qlogic ISP 2312 PCI FC-AL Adapter");
416 case PCI_QLOGIC_ISP2322:
417 device_set_desc(dev, "Qlogic ISP 2322 PCI FC-AL Adapter");
419 case PCI_QLOGIC_ISP2422:
420 device_set_desc(dev, "Qlogic ISP 2422 PCI FC-AL Adapter");
422 case PCI_QLOGIC_ISP2432:
423 device_set_desc(dev, "Qlogic ISP 2432 PCI FC-AL Adapter");
425 case PCI_QLOGIC_ISP2532:
426 device_set_desc(dev, "Qlogic ISP 2532 PCI FC-AL Adapter");
428 case PCI_QLOGIC_ISP5432:
429 device_set_desc(dev, "Qlogic ISP 5432 PCI FC-AL Adapter");
431 case PCI_QLOGIC_ISP6312:
432 device_set_desc(dev, "Qlogic ISP 6312 PCI FC-AL Adapter");
434 case PCI_QLOGIC_ISP6322:
435 device_set_desc(dev, "Qlogic ISP 6322 PCI FC-AL Adapter");
440 if (isp_announced == 0 && bootverbose) {
441 printf("Qlogic ISP Driver, FreeBSD Version %d.%d, "
442 "Core Version %d.%d\n",
443 ISP_PLATFORM_VERSION_MAJOR, ISP_PLATFORM_VERSION_MINOR,
444 ISP_CORE_VERSION_MAJOR, ISP_CORE_VERSION_MINOR);
448 * XXXX: Here is where we might load the f/w module
449 * XXXX: (or increase a reference count to it).
451 return (BUS_PROBE_DEFAULT);
455 isp_get_generic_options(device_t dev, ispsoftc_t *isp)
460 * Figure out if we're supposed to skip this one.
463 if (resource_int_value(device_get_name(dev), device_get_unit(dev), "disable", &tval) == 0 && tval) {
464 device_printf(dev, "disabled at user request\n");
465 isp->isp_osinfo.disabled = 1;
470 if (resource_int_value(device_get_name(dev), device_get_unit(dev), "fwload_disable", &tval) == 0 && tval != 0) {
471 isp->isp_confopts |= ISP_CFG_NORELOAD;
474 if (resource_int_value(device_get_name(dev), device_get_unit(dev), "ignore_nvram", &tval) == 0 && tval != 0) {
475 isp->isp_confopts |= ISP_CFG_NONVRAM;
478 (void) resource_int_value(device_get_name(dev), device_get_unit(dev), "debug", &tval);
480 isp->isp_dblev = tval;
482 isp->isp_dblev = ISP_LOGWARN|ISP_LOGERR;
485 isp->isp_dblev |= ISP_LOGCONFIG|ISP_LOGINFO;
488 (void) resource_int_value(device_get_name(dev), device_get_unit(dev), "vports", &tval);
489 if (tval > 0 && tval < 127) {
493 (void) resource_int_value(device_get_name(dev), device_get_unit(dev), "autoconfig", &tval);
494 isp_autoconfig = tval;
496 (void) resource_int_value(device_get_name(dev), device_get_unit(dev), "quickboot_time", &tval);
497 isp_quickboot_time = tval;
501 isp_get_pci_options(device_t dev, int *m1, int *m2)
505 * Which we should try first - memory mapping or i/o mapping?
507 * We used to try memory first followed by i/o on alpha, otherwise
508 * the reverse, but we should just try memory first all the time now.
510 *m1 = PCIM_CMD_MEMEN;
511 *m2 = PCIM_CMD_PORTEN;
514 if (resource_int_value(device_get_name(dev), device_get_unit(dev), "prefer_iomap", &tval) == 0 && tval != 0) {
515 *m1 = PCIM_CMD_PORTEN;
516 *m2 = PCIM_CMD_MEMEN;
519 if (resource_int_value(device_get_name(dev), device_get_unit(dev), "prefer_memmap", &tval) == 0 && tval != 0) {
520 *m1 = PCIM_CMD_MEMEN;
521 *m2 = PCIM_CMD_PORTEN;
526 isp_get_specific_options(device_t dev, int chan, ispsoftc_t *isp)
531 if (resource_int_value(device_get_name(dev), device_get_unit(dev), "iid", &tval)) {
533 ISP_FC_PC(isp, chan)->default_id = 109 - chan;
536 ISP_SPI_PC(isp, chan)->iid = OF_getscsinitid(dev);
538 ISP_SPI_PC(isp, chan)->iid = 7;
543 ISP_FC_PC(isp, chan)->default_id = tval - chan;
545 ISP_SPI_PC(isp, chan)->iid = tval;
547 isp->isp_confopts |= ISP_CFG_OWNLOOPID;
551 if (resource_int_value(device_get_name(dev), device_get_unit(dev), "role", &tval) == 0) {
554 case ISP_ROLE_INITIATOR:
555 case ISP_ROLE_TARGET:
556 case ISP_ROLE_INITIATOR|ISP_ROLE_TARGET:
557 device_printf(dev, "setting role to 0x%x\n", tval);
565 tval = ISP_DEFAULT_ROLES;
569 ISP_SPI_PC(isp, chan)->def_role = tval;
572 ISP_FC_PC(isp, chan)->def_role = tval;
575 if (resource_int_value(device_get_name(dev), device_get_unit(dev), "fullduplex", &tval) == 0 && tval != 0) {
576 isp->isp_confopts |= ISP_CFG_FULL_DUPLEX;
579 if (resource_string_value(device_get_name(dev), device_get_unit(dev), "topology", (const char **) &sptr) == 0 && sptr != 0) {
580 if (strcmp(sptr, "lport") == 0) {
581 isp->isp_confopts |= ISP_CFG_LPORT;
582 } else if (strcmp(sptr, "nport") == 0) {
583 isp->isp_confopts |= ISP_CFG_NPORT;
584 } else if (strcmp(sptr, "lport-only") == 0) {
585 isp->isp_confopts |= ISP_CFG_LPORT_ONLY;
586 } else if (strcmp(sptr, "nport-only") == 0) {
587 isp->isp_confopts |= ISP_CFG_NPORT_ONLY;
592 * Because the resource_*_value functions can neither return
593 * 64 bit integer values, nor can they be directly coerced
594 * to interpret the right hand side of the assignment as
595 * you want them to interpret it, we have to force WWN
596 * hint replacement to specify WWN strings with a leading
597 * 'w' (e..g w50000000aaaa0001). Sigh.
600 tval = resource_string_value(device_get_name(dev), device_get_unit(dev), "portwwn", (const char **) &sptr);
601 if (tval == 0 && sptr != 0 && *sptr++ == 'w') {
603 ISP_FC_PC(isp, chan)->def_wwpn = strtouq(sptr, &eptr, 16);
604 if (eptr < sptr + 16 || ISP_FC_PC(isp, chan)->def_wwpn == -1) {
605 device_printf(dev, "mangled portwwn hint '%s'\n", sptr);
606 ISP_FC_PC(isp, chan)->def_wwpn = 0;
611 tval = resource_string_value(device_get_name(dev), device_get_unit(dev), "nodewwn", (const char **) &sptr);
612 if (tval == 0 && sptr != 0 && *sptr++ == 'w') {
614 ISP_FC_PC(isp, chan)->def_wwnn = strtouq(sptr, &eptr, 16);
615 if (eptr < sptr + 16 || ISP_FC_PC(isp, chan)->def_wwnn == 0) {
616 device_printf(dev, "mangled nodewwn hint '%s'\n", sptr);
617 ISP_FC_PC(isp, chan)->def_wwnn = 0;
622 (void) resource_int_value(device_get_name(dev), device_get_unit(dev), "hysteresis", &tval);
623 if (tval >= 0 && tval < 256) {
624 ISP_FC_PC(isp, chan)->hysteresis = tval;
626 ISP_FC_PC(isp, chan)->hysteresis = isp_fabric_hysteresis;
630 (void) resource_int_value(device_get_name(dev), device_get_unit(dev), "loop_down_limit", &tval);
631 if (tval >= 0 && tval < 0xffff) {
632 ISP_FC_PC(isp, chan)->loop_down_limit = tval;
634 ISP_FC_PC(isp, chan)->loop_down_limit = isp_loop_down_limit;
638 (void) resource_int_value(device_get_name(dev), device_get_unit(dev), "gone_device_time", &tval);
639 if (tval >= 0 && tval < 0xffff) {
640 ISP_FC_PC(isp, chan)->gone_device_time = tval;
642 ISP_FC_PC(isp, chan)->gone_device_time = isp_gone_device_time;
647 isp_pci_attach(device_t dev)
649 int i, m1, m2, locksetup = 0;
650 uint32_t data, cmd, linesz, did;
651 struct isp_pcisoftc *pcs;
656 pcs = device_get_softc(dev);
658 device_printf(dev, "cannot get softc\n");
661 memset(pcs, 0, sizeof (*pcs));
669 * Get Generic Options
672 isp_get_generic_options(dev, isp);
675 * Check to see if options have us disabled
677 if (isp->isp_osinfo.disabled) {
679 * But return zero to preserve unit numbering
685 * Get PCI options- which in this case are just mapping preferences.
687 isp_get_pci_options(dev, &m1, &m2);
689 linesz = PCI_DFLT_LNSZ;
690 pcs->irq = pcs->regs = NULL;
691 pcs->rgd = pcs->rtp = pcs->iqd = 0;
693 cmd = pci_read_config(dev, PCIR_COMMAND, 2);
695 pcs->rtp = (m1 == PCIM_CMD_MEMEN)? SYS_RES_MEMORY : SYS_RES_IOPORT;
696 pcs->rgd = (m1 == PCIM_CMD_MEMEN)? MEM_MAP_REG : IO_MAP_REG;
697 pcs->regs = bus_alloc_resource_any(dev, pcs->rtp, &pcs->rgd, RF_ACTIVE);
699 if (pcs->regs == NULL && (cmd & m2)) {
700 pcs->rtp = (m2 == PCIM_CMD_MEMEN)? SYS_RES_MEMORY : SYS_RES_IOPORT;
701 pcs->rgd = (m2 == PCIM_CMD_MEMEN)? MEM_MAP_REG : IO_MAP_REG;
702 pcs->regs = bus_alloc_resource_any(dev, pcs->rtp, &pcs->rgd, RF_ACTIVE);
704 if (pcs->regs == NULL) {
705 device_printf(dev, "unable to map any ports\n");
709 device_printf(dev, "using %s space register mapping\n", (pcs->rgd == IO_MAP_REG)? "I/O" : "Memory");
711 isp->isp_bus_tag = rman_get_bustag(pcs->regs);
712 isp->isp_bus_handle = rman_get_bushandle(pcs->regs);
715 pcs->pci_poff[BIU_BLOCK >> _BLK_REG_SHFT] = BIU_REGS_OFF;
716 pcs->pci_poff[MBOX_BLOCK >> _BLK_REG_SHFT] = PCI_MBOX_REGS_OFF;
717 pcs->pci_poff[SXP_BLOCK >> _BLK_REG_SHFT] = PCI_SXP_REGS_OFF;
718 pcs->pci_poff[RISC_BLOCK >> _BLK_REG_SHFT] = PCI_RISC_REGS_OFF;
719 pcs->pci_poff[DMA_BLOCK >> _BLK_REG_SHFT] = DMA_REGS_OFF;
721 switch (pci_get_devid(dev)) {
722 case PCI_QLOGIC_ISP1020:
724 isp->isp_mdvec = &mdvec;
725 isp->isp_type = ISP_HA_SCSI_UNKNOWN;
727 case PCI_QLOGIC_ISP1080:
729 isp->isp_mdvec = &mdvec_1080;
730 isp->isp_type = ISP_HA_SCSI_1080;
731 pcs->pci_poff[DMA_BLOCK >> _BLK_REG_SHFT] = ISP1080_DMA_REGS_OFF;
733 case PCI_QLOGIC_ISP1240:
735 isp->isp_mdvec = &mdvec_1080;
736 isp->isp_type = ISP_HA_SCSI_1240;
738 pcs->pci_poff[DMA_BLOCK >> _BLK_REG_SHFT] = ISP1080_DMA_REGS_OFF;
740 case PCI_QLOGIC_ISP1280:
742 isp->isp_mdvec = &mdvec_1080;
743 isp->isp_type = ISP_HA_SCSI_1280;
744 pcs->pci_poff[DMA_BLOCK >> _BLK_REG_SHFT] = ISP1080_DMA_REGS_OFF;
746 case PCI_QLOGIC_ISP10160:
748 isp->isp_mdvec = &mdvec_12160;
749 isp->isp_type = ISP_HA_SCSI_10160;
750 pcs->pci_poff[DMA_BLOCK >> _BLK_REG_SHFT] = ISP1080_DMA_REGS_OFF;
752 case PCI_QLOGIC_ISP12160:
755 isp->isp_mdvec = &mdvec_12160;
756 isp->isp_type = ISP_HA_SCSI_12160;
757 pcs->pci_poff[DMA_BLOCK >> _BLK_REG_SHFT] = ISP1080_DMA_REGS_OFF;
759 case PCI_QLOGIC_ISP2100:
761 isp->isp_mdvec = &mdvec_2100;
762 isp->isp_type = ISP_HA_FC_2100;
763 pcs->pci_poff[MBOX_BLOCK >> _BLK_REG_SHFT] = PCI_MBOX_REGS2100_OFF;
764 if (pci_get_revid(dev) < 3) {
766 * XXX: Need to get the actual revision
767 * XXX: number of the 2100 FB. At any rate,
768 * XXX: lower cache line size for early revision
774 case PCI_QLOGIC_ISP2200:
776 isp->isp_mdvec = &mdvec_2200;
777 isp->isp_type = ISP_HA_FC_2200;
778 pcs->pci_poff[MBOX_BLOCK >> _BLK_REG_SHFT] = PCI_MBOX_REGS2100_OFF;
780 case PCI_QLOGIC_ISP2300:
782 isp->isp_mdvec = &mdvec_2300;
783 isp->isp_type = ISP_HA_FC_2300;
784 pcs->pci_poff[MBOX_BLOCK >> _BLK_REG_SHFT] = PCI_MBOX_REGS2300_OFF;
786 case PCI_QLOGIC_ISP2312:
787 case PCI_QLOGIC_ISP6312:
789 isp->isp_mdvec = &mdvec_2300;
790 isp->isp_type = ISP_HA_FC_2312;
791 pcs->pci_poff[MBOX_BLOCK >> _BLK_REG_SHFT] = PCI_MBOX_REGS2300_OFF;
793 case PCI_QLOGIC_ISP2322:
794 case PCI_QLOGIC_ISP6322:
796 isp->isp_mdvec = &mdvec_2300;
797 isp->isp_type = ISP_HA_FC_2322;
798 pcs->pci_poff[MBOX_BLOCK >> _BLK_REG_SHFT] = PCI_MBOX_REGS2300_OFF;
800 case PCI_QLOGIC_ISP2422:
801 case PCI_QLOGIC_ISP2432:
803 isp->isp_nchan += isp_nvports;
804 isp->isp_mdvec = &mdvec_2400;
805 isp->isp_type = ISP_HA_FC_2400;
806 pcs->pci_poff[MBOX_BLOCK >> _BLK_REG_SHFT] = PCI_MBOX_REGS2400_OFF;
808 case PCI_QLOGIC_ISP2532:
810 isp->isp_nchan += isp_nvports;
811 isp->isp_mdvec = &mdvec_2500;
812 isp->isp_type = ISP_HA_FC_2500;
813 pcs->pci_poff[MBOX_BLOCK >> _BLK_REG_SHFT] = PCI_MBOX_REGS2400_OFF;
815 case PCI_QLOGIC_ISP5432:
817 isp->isp_mdvec = &mdvec_2500;
818 isp->isp_type = ISP_HA_FC_2500;
819 pcs->pci_poff[MBOX_BLOCK >> _BLK_REG_SHFT] = PCI_MBOX_REGS2400_OFF;
822 device_printf(dev, "unknown device type\n");
826 isp->isp_revision = pci_get_revid(dev);
829 psize = sizeof (fcparam);
830 xsize = sizeof (struct isp_fc);
832 psize = sizeof (sdparam);
833 xsize = sizeof (struct isp_spi);
835 psize *= isp->isp_nchan;
836 xsize *= isp->isp_nchan;
837 isp->isp_param = malloc(psize, M_DEVBUF, M_NOWAIT | M_ZERO);
838 if (isp->isp_param == NULL) {
839 device_printf(dev, "cannot allocate parameter data\n");
842 isp->isp_osinfo.pc.ptr = malloc(xsize, M_DEVBUF, M_NOWAIT | M_ZERO);
843 if (isp->isp_osinfo.pc.ptr == NULL) {
844 device_printf(dev, "cannot allocate parameter data\n");
849 * Now that we know who we are (roughly) get/set specific options
851 for (i = 0; i < isp->isp_nchan; i++) {
852 isp_get_specific_options(dev, i, isp);
856 * The 'it' suffix really only matters for SCSI cards in target mode.
858 isp->isp_osinfo.fw = NULL;
859 if (IS_SCSI(isp) && (ISP_SPI_PC(isp, 0)->def_role & ISP_ROLE_TARGET)) {
860 snprintf(fwname, sizeof (fwname), "isp_%04x_it", did);
861 isp->isp_osinfo.fw = firmware_get(fwname);
862 } else if (IS_24XX(isp)) {
863 snprintf(fwname, sizeof (fwname), "isp_%04x_multi", did);
864 isp->isp_osinfo.fw = firmware_get(fwname);
866 if (isp->isp_osinfo.fw == NULL) {
867 snprintf(fwname, sizeof (fwname), "isp_%04x", did);
868 isp->isp_osinfo.fw = firmware_get(fwname);
870 if (isp->isp_osinfo.fw != NULL) {
871 isp_prt(isp, ISP_LOGCONFIG, "loaded firmware %s", fwname);
872 isp->isp_mdvec->dv_ispfw = isp->isp_osinfo.fw->data;
876 * Make sure that SERR, PERR, WRITE INVALIDATE and BUSMASTER are set.
878 cmd |= PCIM_CMD_SEREN | PCIM_CMD_PERRESPEN | PCIM_CMD_BUSMASTEREN | PCIM_CMD_INVEN;
879 if (IS_2300(isp)) { /* per QLogic errata */
880 cmd &= ~PCIM_CMD_INVEN;
882 if (IS_2322(isp) || pci_get_devid(dev) == PCI_QLOGIC_ISP6312) {
883 cmd &= ~PCIM_CMD_INTX_DISABLE;
886 cmd &= ~PCIM_CMD_INTX_DISABLE;
888 pci_write_config(dev, PCIR_COMMAND, cmd, 2);
891 * Make sure the Cache Line Size register is set sensibly.
893 data = pci_read_config(dev, PCIR_CACHELNSZ, 1);
894 if (data == 0 || (linesz != PCI_DFLT_LNSZ && data != linesz)) {
895 isp_prt(isp, ISP_LOGDEBUG0, "set PCI line size to %d from %d", linesz, data);
897 pci_write_config(dev, PCIR_CACHELNSZ, data, 1);
901 * Make sure the Latency Timer is sane.
903 data = pci_read_config(dev, PCIR_LATTIMER, 1);
904 if (data < PCI_DFLT_LTNCY) {
905 data = PCI_DFLT_LTNCY;
906 isp_prt(isp, ISP_LOGDEBUG0, "set PCI latency to %d", data);
907 pci_write_config(dev, PCIR_LATTIMER, data, 1);
911 * Make sure we've disabled the ROM.
913 data = pci_read_config(dev, PCIR_ROMADDR, 4);
915 pci_write_config(dev, PCIR_ROMADDR, data, 4);
920 * NB: MSI-X needs to be disabled for the 2432 (PCI-Express)
922 if (IS_24XX(isp) || IS_2322(isp)) {
923 pcs->msicount = pci_msi_count(dev);
924 if (pcs->msicount > 1) {
927 if (pci_alloc_msi(dev, &pcs->msicount) == 0) {
933 pcs->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &pcs->iqd, RF_ACTIVE | RF_SHAREABLE);
934 if (pcs->irq == NULL) {
935 device_printf(dev, "could not allocate interrupt\n");
939 /* Make sure the lock is set up. */
940 mtx_init(&isp->isp_osinfo.lock, "isp", NULL, MTX_DEF);
943 if (isp_setup_intr(dev, pcs->irq, ISP_IFLAGS, NULL, isp_platform_intr, isp, &pcs->ih)) {
944 device_printf(dev, "could not setup interrupt\n");
949 * Last minute checks...
951 if (IS_23XX(isp) || IS_24XX(isp)) {
952 isp->isp_port = pci_get_function(dev);
956 * Make sure we're in reset state.
960 if (isp->isp_state != ISP_RESETSTATE) {
965 if (isp->isp_state == ISP_INITSTATE) {
966 isp->isp_state = ISP_RUNSTATE;
969 if (isp_attach(isp)) {
979 (void) bus_teardown_intr(dev, pcs->irq, pcs->ih);
982 mtx_destroy(&isp->isp_osinfo.lock);
985 (void) bus_release_resource(dev, SYS_RES_IRQ, pcs->iqd, pcs->irq);
988 pci_release_msi(dev);
991 (void) bus_release_resource(dev, pcs->rtp, pcs->rgd, pcs->regs);
993 if (pcs->pci_isp.isp_param) {
994 free(pcs->pci_isp.isp_param, M_DEVBUF);
995 pcs->pci_isp.isp_param = NULL;
997 if (pcs->pci_isp.isp_osinfo.pc.ptr) {
998 free(pcs->pci_isp.isp_osinfo.pc.ptr, M_DEVBUF);
999 pcs->pci_isp.isp_osinfo.pc.ptr = NULL;
1005 isp_pci_detach(device_t dev)
1007 struct isp_pcisoftc *pcs;
1011 pcs = device_get_softc(dev);
1015 isp = (ispsoftc_t *) pcs;
1016 status = isp_detach(isp);
1022 (void) bus_teardown_intr(dev, pcs->irq, pcs->ih);
1025 mtx_destroy(&isp->isp_osinfo.lock);
1026 (void) bus_release_resource(dev, SYS_RES_IRQ, pcs->iqd, pcs->irq);
1027 if (pcs->msicount) {
1028 pci_release_msi(dev);
1030 (void) bus_release_resource(dev, pcs->rtp, pcs->rgd, pcs->regs);
1031 if (pcs->pci_isp.isp_param) {
1032 free(pcs->pci_isp.isp_param, M_DEVBUF);
1033 pcs->pci_isp.isp_param = NULL;
1035 if (pcs->pci_isp.isp_osinfo.pc.ptr) {
1036 free(pcs->pci_isp.isp_osinfo.pc.ptr, M_DEVBUF);
1037 pcs->pci_isp.isp_osinfo.pc.ptr = NULL;
1042 #define IspVirt2Off(a, x) \
1043 (((struct isp_pcisoftc *)a)->pci_poff[((x) & _BLK_REG_MASK) >> \
1044 _BLK_REG_SHFT] + ((x) & 0xfff))
1046 #define BXR2(isp, off) \
1047 bus_space_read_2(isp->isp_bus_tag, isp->isp_bus_handle, off)
1048 #define BXW2(isp, off, v) \
1049 bus_space_write_2(isp->isp_bus_tag, isp->isp_bus_handle, off, v)
1050 #define BXR4(isp, off) \
1051 bus_space_read_4(isp->isp_bus_tag, isp->isp_bus_handle, off)
1052 #define BXW4(isp, off, v) \
1053 bus_space_write_4(isp->isp_bus_tag, isp->isp_bus_handle, off, v)
1056 static ISP_INLINE int
1057 isp_pci_rd_debounced(ispsoftc_t *isp, int off, uint16_t *rp)
1059 uint32_t val0, val1;
1063 val0 = BXR2(isp, IspVirt2Off(isp, off));
1064 val1 = BXR2(isp, IspVirt2Off(isp, off));
1065 } while (val0 != val1 && ++i < 1000);
1074 isp_pci_rd_isr(ispsoftc_t *isp, uint32_t *isrp, uint16_t *semap, uint16_t *mbp)
1079 if (isp_pci_rd_debounced(isp, BIU_ISR, &isr)) {
1082 if (isp_pci_rd_debounced(isp, BIU_SEMA, &sema)) {
1086 isr = BXR2(isp, IspVirt2Off(isp, BIU_ISR));
1087 sema = BXR2(isp, IspVirt2Off(isp, BIU_SEMA));
1089 isp_prt(isp, ISP_LOGDEBUG3, "ISR 0x%x SEMA 0x%x", isr, sema);
1090 isr &= INT_PENDING_MASK(isp);
1091 sema &= BIU_SEMA_LOCK;
1092 if (isr == 0 && sema == 0) {
1096 if ((*semap = sema) != 0) {
1098 if (isp_pci_rd_debounced(isp, OUTMAILBOX0, mbp)) {
1102 *mbp = BXR2(isp, IspVirt2Off(isp, OUTMAILBOX0));
1109 isp_pci_rd_isr_2300(ispsoftc_t *isp, uint32_t *isrp, uint16_t *semap, uint16_t *mbox0p)
1114 if (!(BXR2(isp, IspVirt2Off(isp, BIU_ISR) & BIU2100_ISR_RISC_INT))) {
1118 r2hisr = BXR4(isp, IspVirt2Off(isp, BIU_R2HSTSLO));
1119 isp_prt(isp, ISP_LOGDEBUG3, "RISC2HOST ISR 0x%x", r2hisr);
1120 if ((r2hisr & BIU_R2HST_INTR) == 0) {
1124 switch (r2hisr & BIU_R2HST_ISTAT_MASK) {
1125 case ISPR2HST_ROM_MBX_OK:
1126 case ISPR2HST_ROM_MBX_FAIL:
1127 case ISPR2HST_MBX_OK:
1128 case ISPR2HST_MBX_FAIL:
1129 case ISPR2HST_ASYNC_EVENT:
1130 *isrp = r2hisr & 0xffff;
1131 *mbox0p = (r2hisr >> 16);
1134 case ISPR2HST_RIO_16:
1135 *isrp = r2hisr & 0xffff;
1136 *mbox0p = ASYNC_RIO16_1;
1139 case ISPR2HST_FPOST:
1140 *isrp = r2hisr & 0xffff;
1141 *mbox0p = ASYNC_CMD_CMPLT;
1144 case ISPR2HST_FPOST_CTIO:
1145 *isrp = r2hisr & 0xffff;
1146 *mbox0p = ASYNC_CTIO_DONE;
1149 case ISPR2HST_RSPQ_UPDATE:
1150 *isrp = r2hisr & 0xffff;
1155 hccr = ISP_READ(isp, HCCR);
1156 if (hccr & HCCR_PAUSE) {
1157 ISP_WRITE(isp, HCCR, HCCR_RESET);
1158 isp_prt(isp, ISP_LOGERR, "RISC paused at interrupt (%x->%x)", hccr, ISP_READ(isp, HCCR));
1159 ISP_WRITE(isp, BIU_ICR, 0);
1161 isp_prt(isp, ISP_LOGERR, "unknown interrupt 0x%x\n", r2hisr);
1168 isp_pci_rd_isr_2400(ispsoftc_t *isp, uint32_t *isrp, uint16_t *semap, uint16_t *mbox0p)
1172 r2hisr = BXR4(isp, IspVirt2Off(isp, BIU2400_R2HSTSLO));
1173 isp_prt(isp, ISP_LOGDEBUG3, "RISC2HOST ISR 0x%x", r2hisr);
1174 if ((r2hisr & BIU2400_R2HST_INTR) == 0) {
1178 switch (r2hisr & BIU2400_R2HST_ISTAT_MASK) {
1179 case ISP2400R2HST_ROM_MBX_OK:
1180 case ISP2400R2HST_ROM_MBX_FAIL:
1181 case ISP2400R2HST_MBX_OK:
1182 case ISP2400R2HST_MBX_FAIL:
1183 case ISP2400R2HST_ASYNC_EVENT:
1184 *isrp = r2hisr & 0xffff;
1185 *mbox0p = (r2hisr >> 16);
1188 case ISP2400R2HST_RSPQ_UPDATE:
1189 case ISP2400R2HST_ATIO_RSPQ_UPDATE:
1190 case ISP2400R2HST_ATIO_RQST_UPDATE:
1191 *isrp = r2hisr & 0xffff;
1196 ISP_WRITE(isp, BIU2400_HCCR, HCCR_2400_CMD_CLEAR_RISC_INT);
1197 isp_prt(isp, ISP_LOGERR, "unknown interrupt 0x%x\n", r2hisr);
1203 isp_pci_rd_reg(ispsoftc_t *isp, int regoff)
1208 if ((regoff & _BLK_REG_MASK) == SXP_BLOCK) {
1210 * We will assume that someone has paused the RISC processor.
1212 oldconf = BXR2(isp, IspVirt2Off(isp, BIU_CONF1));
1213 BXW2(isp, IspVirt2Off(isp, BIU_CONF1), oldconf | BIU_PCI_CONF1_SXP);
1214 MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, BIU_CONF1), 2, -1);
1216 rv = BXR2(isp, IspVirt2Off(isp, regoff));
1217 if ((regoff & _BLK_REG_MASK) == SXP_BLOCK) {
1218 BXW2(isp, IspVirt2Off(isp, BIU_CONF1), oldconf);
1219 MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, BIU_CONF1), 2, -1);
1225 isp_pci_wr_reg(ispsoftc_t *isp, int regoff, uint32_t val)
1229 if ((regoff & _BLK_REG_MASK) == SXP_BLOCK) {
1231 * We will assume that someone has paused the RISC processor.
1233 oldconf = BXR2(isp, IspVirt2Off(isp, BIU_CONF1));
1234 BXW2(isp, IspVirt2Off(isp, BIU_CONF1),
1235 oldconf | BIU_PCI_CONF1_SXP);
1236 MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, BIU_CONF1), 2, -1);
1238 BXW2(isp, IspVirt2Off(isp, regoff), val);
1239 MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, regoff), 2, -1);
1240 if ((regoff & _BLK_REG_MASK) == SXP_BLOCK) {
1241 BXW2(isp, IspVirt2Off(isp, BIU_CONF1), oldconf);
1242 MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, BIU_CONF1), 2, -1);
1248 isp_pci_rd_reg_1080(ispsoftc_t *isp, int regoff)
1250 uint32_t rv, oc = 0;
1252 if ((regoff & _BLK_REG_MASK) == SXP_BLOCK ||
1253 (regoff & _BLK_REG_MASK) == (SXP_BLOCK|SXP_BANK1_SELECT)) {
1256 * We will assume that someone has paused the RISC processor.
1258 oc = BXR2(isp, IspVirt2Off(isp, BIU_CONF1));
1259 tc = oc & ~BIU_PCI1080_CONF1_DMA;
1260 if (regoff & SXP_BANK1_SELECT)
1261 tc |= BIU_PCI1080_CONF1_SXP1;
1263 tc |= BIU_PCI1080_CONF1_SXP0;
1264 BXW2(isp, IspVirt2Off(isp, BIU_CONF1), tc);
1265 MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, BIU_CONF1), 2, -1);
1266 } else if ((regoff & _BLK_REG_MASK) == DMA_BLOCK) {
1267 oc = BXR2(isp, IspVirt2Off(isp, BIU_CONF1));
1268 BXW2(isp, IspVirt2Off(isp, BIU_CONF1),
1269 oc | BIU_PCI1080_CONF1_DMA);
1270 MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, BIU_CONF1), 2, -1);
1272 rv = BXR2(isp, IspVirt2Off(isp, regoff));
1274 BXW2(isp, IspVirt2Off(isp, BIU_CONF1), oc);
1275 MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, BIU_CONF1), 2, -1);
1281 isp_pci_wr_reg_1080(ispsoftc_t *isp, int regoff, uint32_t val)
1285 if ((regoff & _BLK_REG_MASK) == SXP_BLOCK ||
1286 (regoff & _BLK_REG_MASK) == (SXP_BLOCK|SXP_BANK1_SELECT)) {
1289 * We will assume that someone has paused the RISC processor.
1291 oc = BXR2(isp, IspVirt2Off(isp, BIU_CONF1));
1292 tc = oc & ~BIU_PCI1080_CONF1_DMA;
1293 if (regoff & SXP_BANK1_SELECT)
1294 tc |= BIU_PCI1080_CONF1_SXP1;
1296 tc |= BIU_PCI1080_CONF1_SXP0;
1297 BXW2(isp, IspVirt2Off(isp, BIU_CONF1), tc);
1298 MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, BIU_CONF1), 2, -1);
1299 } else if ((regoff & _BLK_REG_MASK) == DMA_BLOCK) {
1300 oc = BXR2(isp, IspVirt2Off(isp, BIU_CONF1));
1301 BXW2(isp, IspVirt2Off(isp, BIU_CONF1),
1302 oc | BIU_PCI1080_CONF1_DMA);
1303 MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, BIU_CONF1), 2, -1);
1305 BXW2(isp, IspVirt2Off(isp, regoff), val);
1306 MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, regoff), 2, -1);
1308 BXW2(isp, IspVirt2Off(isp, BIU_CONF1), oc);
1309 MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, BIU_CONF1), 2, -1);
1314 isp_pci_rd_reg_2400(ispsoftc_t *isp, int regoff)
1317 int block = regoff & _BLK_REG_MASK;
1323 return (BXR2(isp, IspVirt2Off(isp, regoff)));
1325 isp_prt(isp, ISP_LOGWARN, "SXP_BLOCK read at 0x%x", regoff);
1326 return (0xffffffff);
1328 isp_prt(isp, ISP_LOGWARN, "RISC_BLOCK read at 0x%x", regoff);
1329 return (0xffffffff);
1331 isp_prt(isp, ISP_LOGWARN, "DMA_BLOCK read at 0x%x", regoff);
1332 return (0xffffffff);
1334 isp_prt(isp, ISP_LOGWARN, "unknown block read at 0x%x", regoff);
1335 return (0xffffffff);
1340 case BIU2400_FLASH_ADDR:
1341 case BIU2400_FLASH_DATA:
1345 case BIU2400_REQINP:
1346 case BIU2400_REQOUTP:
1347 case BIU2400_RSPINP:
1348 case BIU2400_RSPOUTP:
1349 case BIU2400_PRI_REQINP:
1350 case BIU2400_PRI_REQOUTP:
1351 case BIU2400_ATIO_RSPINP:
1352 case BIU2400_ATIO_RSPOUTP:
1357 rv = BXR4(isp, IspVirt2Off(isp, regoff));
1359 case BIU2400_R2HSTSLO:
1360 rv = BXR4(isp, IspVirt2Off(isp, regoff));
1362 case BIU2400_R2HSTSHI:
1363 rv = BXR4(isp, IspVirt2Off(isp, regoff)) >> 16;
1366 isp_prt(isp, ISP_LOGERR,
1367 "isp_pci_rd_reg_2400: unknown offset %x", regoff);
1375 isp_pci_wr_reg_2400(ispsoftc_t *isp, int regoff, uint32_t val)
1377 int block = regoff & _BLK_REG_MASK;
1383 BXW2(isp, IspVirt2Off(isp, regoff), val);
1384 MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, regoff), 2, -1);
1387 isp_prt(isp, ISP_LOGWARN, "SXP_BLOCK write at 0x%x", regoff);
1390 isp_prt(isp, ISP_LOGWARN, "RISC_BLOCK write at 0x%x", regoff);
1393 isp_prt(isp, ISP_LOGWARN, "DMA_BLOCK write at 0x%x", regoff);
1396 isp_prt(isp, ISP_LOGWARN, "unknown block write at 0x%x",
1402 case BIU2400_FLASH_ADDR:
1403 case BIU2400_FLASH_DATA:
1407 case BIU2400_REQINP:
1408 case BIU2400_REQOUTP:
1409 case BIU2400_RSPINP:
1410 case BIU2400_RSPOUTP:
1411 case BIU2400_PRI_REQINP:
1412 case BIU2400_PRI_REQOUTP:
1413 case BIU2400_ATIO_RSPINP:
1414 case BIU2400_ATIO_RSPOUTP:
1419 BXW4(isp, IspVirt2Off(isp, regoff), val);
1420 MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, regoff), 4, -1);
1423 isp_prt(isp, ISP_LOGERR,
1424 "isp_pci_wr_reg_2400: bad offset 0x%x", regoff);
1437 static void imc(void *, bus_dma_segment_t *, int, int);
1438 static void imc1(void *, bus_dma_segment_t *, int, int);
1441 imc(void *arg, bus_dma_segment_t *segs, int nseg, int error)
1443 struct imush *imushp = (struct imush *) arg;
1446 imushp->error = error;
1450 imushp->error = EINVAL;
1453 isp_prt(imushp->isp, ISP_LOGDEBUG0, "request/result area @ 0x%jx/0x%jx", (uintmax_t) segs->ds_addr, (uintmax_t) segs->ds_len);
1454 imushp->isp->isp_rquest = imushp->vbase;
1455 imushp->isp->isp_rquest_dma = segs->ds_addr;
1456 segs->ds_addr += ISP_QUEUE_SIZE(RQUEST_QUEUE_LEN(imushp->isp));
1457 imushp->vbase += ISP_QUEUE_SIZE(RQUEST_QUEUE_LEN(imushp->isp));
1458 imushp->isp->isp_result_dma = segs->ds_addr;
1459 imushp->isp->isp_result = imushp->vbase;
1461 #ifdef ISP_TARGET_MODE
1462 if (IS_24XX(imushp->isp)) {
1463 segs->ds_addr += ISP_QUEUE_SIZE(RESULT_QUEUE_LEN(imushp->isp));
1464 imushp->vbase += ISP_QUEUE_SIZE(RESULT_QUEUE_LEN(imushp->isp));
1465 imushp->isp->isp_atioq_dma = segs->ds_addr;
1466 imushp->isp->isp_atioq = imushp->vbase;
1472 imc1(void *arg, bus_dma_segment_t *segs, int nseg, int error)
1474 struct imush *imushp = (struct imush *) arg;
1476 imushp->error = error;
1480 imushp->error = EINVAL;
1483 isp_prt(imushp->isp, ISP_LOGDEBUG0, "scdma @ 0x%jx/0x%jx", (uintmax_t) segs->ds_addr, (uintmax_t) segs->ds_len);
1484 FCPARAM(imushp->isp, imushp->chan)->isp_scdma = segs->ds_addr;
1485 FCPARAM(imushp->isp, imushp->chan)->isp_scratch = imushp->vbase;
1489 isp_pci_mbxdma(ispsoftc_t *isp)
1493 int i, error, ns, cmap = 0;
1494 bus_size_t slim; /* segment size */
1495 bus_addr_t llim; /* low limit of unavailable dma */
1496 bus_addr_t hlim; /* high limit of unavailable dma */
1500 * Already been here? If so, leave...
1502 if (isp->isp_rquest) {
1507 if (isp->isp_maxcmds == 0) {
1508 isp_prt(isp, ISP_LOGERR, "maxcmds not set");
1513 hlim = BUS_SPACE_MAXADDR;
1514 if (IS_ULTRA2(isp) || IS_FC(isp) || IS_1240(isp)) {
1515 if (sizeof (bus_size_t) > 4) {
1516 slim = (bus_size_t) (1ULL << 32);
1518 slim = (bus_size_t) (1UL << 31);
1520 llim = BUS_SPACE_MAXADDR;
1522 llim = BUS_SPACE_MAXADDR_32BIT;
1526 len = isp->isp_maxcmds * sizeof (struct isp_pcmd);
1527 isp->isp_osinfo.pcmd_pool = (struct isp_pcmd *) malloc(len, M_DEVBUF, M_WAITOK | M_ZERO);
1528 if (isp->isp_osinfo.pcmd_pool == NULL) {
1529 isp_prt(isp, ISP_LOGERR, "cannot allocate pcmds");
1535 * XXX: We don't really support 64 bit target mode for parallel scsi yet
1537 #ifdef ISP_TARGET_MODE
1538 if (IS_SCSI(isp) && sizeof (bus_addr_t) > 4) {
1539 free(isp->isp_osinfo.pcmd_pool, M_DEVBUF);
1540 isp_prt(isp, ISP_LOGERR, "we cannot do DAC for SPI cards yet");
1546 if (isp_dma_tag_create(BUS_DMA_ROOTARG(ISP_PCD(isp)), 1, slim, llim, hlim, NULL, NULL, BUS_SPACE_MAXSIZE, ISP_NSEGS, slim, 0, &isp->isp_osinfo.dmat)) {
1547 free(isp->isp_osinfo.pcmd_pool, M_DEVBUF);
1549 isp_prt(isp, ISP_LOGERR, "could not create master dma tag");
1553 len = sizeof (isp_hdl_t) * isp->isp_maxcmds;
1554 isp->isp_xflist = (isp_hdl_t *) malloc(len, M_DEVBUF, M_WAITOK | M_ZERO);
1555 if (isp->isp_xflist == NULL) {
1556 free(isp->isp_osinfo.pcmd_pool, M_DEVBUF);
1558 isp_prt(isp, ISP_LOGERR, "cannot alloc xflist array");
1561 for (len = 0; len < isp->isp_maxcmds - 1; len++) {
1562 isp->isp_xflist[len].cmd = &isp->isp_xflist[len+1];
1564 isp->isp_xffree = isp->isp_xflist;
1565 #ifdef ISP_TARGET_MODE
1566 len = sizeof (isp_hdl_t) * isp->isp_maxcmds;
1567 isp->isp_tgtlist = (isp_hdl_t *) malloc(len, M_DEVBUF, M_WAITOK | M_ZERO);
1568 if (isp->isp_tgtlist == NULL) {
1569 free(isp->isp_osinfo.pcmd_pool, M_DEVBUF);
1570 free(isp->isp_xflist, M_DEVBUF);
1572 isp_prt(isp, ISP_LOGERR, "cannot alloc tgtlist array");
1575 for (len = 0; len < isp->isp_maxcmds - 1; len++) {
1576 isp->isp_tgtlist[len].cmd = &isp->isp_tgtlist[len+1];
1578 isp->isp_tgtfree = isp->isp_tgtlist;
1582 * Allocate and map the request and result queues (and ATIO queue
1583 * if we're a 2400 supporting target mode).
1585 len = ISP_QUEUE_SIZE(RQUEST_QUEUE_LEN(isp));
1586 len += ISP_QUEUE_SIZE(RESULT_QUEUE_LEN(isp));
1587 #ifdef ISP_TARGET_MODE
1589 len += ISP_QUEUE_SIZE(RESULT_QUEUE_LEN(isp));
1593 ns = (len / PAGE_SIZE) + 1;
1596 * Create a tag for the control spaces. We don't always need this
1597 * to be 32 bits, but we do this for simplicity and speed's sake.
1599 if (isp_dma_tag_create(isp->isp_osinfo.dmat, QENTRY_LEN, slim, BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, len, ns, slim, 0, &isp->isp_osinfo.cdmat)) {
1600 isp_prt(isp, ISP_LOGERR, "cannot create a dma tag for control spaces");
1601 free(isp->isp_osinfo.pcmd_pool, M_DEVBUF);
1602 free(isp->isp_xflist, M_DEVBUF);
1603 #ifdef ISP_TARGET_MODE
1604 free(isp->isp_tgtlist, M_DEVBUF);
1610 if (bus_dmamem_alloc(isp->isp_osinfo.cdmat, (void **)&base, BUS_DMA_NOWAIT | BUS_DMA_COHERENT, &isp->isp_osinfo.cdmap) != 0) {
1611 isp_prt(isp, ISP_LOGERR, "cannot allocate %d bytes of CCB memory", len);
1612 bus_dma_tag_destroy(isp->isp_osinfo.cdmat);
1613 free(isp->isp_osinfo.pcmd_pool, M_DEVBUF);
1614 free(isp->isp_xflist, M_DEVBUF);
1615 #ifdef ISP_TARGET_MODE
1616 free(isp->isp_tgtlist, M_DEVBUF);
1627 bus_dmamap_load(isp->isp_osinfo.cdmat, isp->isp_osinfo.cdmap, base, len, imc, &im, 0);
1629 isp_prt(isp, ISP_LOGERR, "error %d loading dma map for control areas", im.error);
1634 for (cmap = 0; cmap < isp->isp_nchan; cmap++) {
1635 struct isp_fc *fc = ISP_FC_PC(isp, cmap);
1636 if (isp_dma_tag_create(isp->isp_osinfo.dmat, 64, slim, BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, ISP_FC_SCRLEN, 1, slim, 0, &fc->tdmat)) {
1639 if (bus_dmamem_alloc(fc->tdmat, (void **)&base, BUS_DMA_NOWAIT | BUS_DMA_COHERENT, &fc->tdmap) != 0) {
1640 bus_dma_tag_destroy(fc->tdmat);
1647 bus_dmamap_load(fc->tdmat, fc->tdmap, base, ISP_FC_SCRLEN, imc1, &im, 0);
1649 bus_dmamem_free(fc->tdmat, base, fc->tdmap);
1650 bus_dma_tag_destroy(fc->tdmat);
1656 for (i = 0; i < isp->isp_maxcmds; i++) {
1657 struct isp_pcmd *pcmd = &isp->isp_osinfo.pcmd_pool[i];
1658 error = bus_dmamap_create(isp->isp_osinfo.dmat, 0, &pcmd->dmap);
1660 isp_prt(isp, ISP_LOGERR, "error %d creating per-cmd DMA maps", error);
1662 bus_dmamap_destroy(isp->isp_osinfo.dmat, isp->isp_osinfo.pcmd_pool[i].dmap);
1666 callout_init_mtx(&pcmd->wdog, &isp->isp_osinfo.lock, 0);
1667 if (i == isp->isp_maxcmds-1) {
1670 pcmd->next = &isp->isp_osinfo.pcmd_pool[i+1];
1673 isp->isp_osinfo.pcmd_free = &isp->isp_osinfo.pcmd_pool[0];
1678 while (--cmap >= 0) {
1679 struct isp_fc *fc = ISP_FC_PC(isp, cmap);
1680 bus_dmamem_free(fc->tdmat, base, fc->tdmap);
1681 bus_dma_tag_destroy(fc->tdmat);
1683 bus_dmamem_free(isp->isp_osinfo.cdmat, base, isp->isp_osinfo.cdmap);
1684 bus_dma_tag_destroy(isp->isp_osinfo.cdmat);
1685 free(isp->isp_xflist, M_DEVBUF);
1686 #ifdef ISP_TARGET_MODE
1687 free(isp->isp_tgtlist, M_DEVBUF);
1689 free(isp->isp_osinfo.pcmd_pool, M_DEVBUF);
1690 isp->isp_rquest = NULL;
1698 void *rq; /* original request */
1703 #define MUSHERR_NOQENTRIES -2
1705 #ifdef ISP_TARGET_MODE
1706 static void tdma2_2(void *, bus_dma_segment_t *, int, bus_size_t, int);
1707 static void tdma2(void *, bus_dma_segment_t *, int, int);
1710 tdma2_2(void *arg, bus_dma_segment_t *dm_segs, int nseg, bus_size_t mapsize, int error)
1714 mp->mapsize = mapsize;
1715 tdma2(arg, dm_segs, nseg, error);
1719 tdma2(void *arg, bus_dma_segment_t *dm_segs, int nseg, int error)
1723 struct ccb_scsiio *csio;
1727 mp = (mush_t *) arg;
1732 csio = mp->cmd_token;
1736 if (sizeof (bus_addr_t) > 4) {
1737 if (nseg >= ISP_NSEG64_MAX) {
1738 isp_prt(isp, ISP_LOGERR, "number of segments (%d) exceed maximum we can support (%d)", nseg, ISP_NSEG64_MAX);
1742 if (rq->req_header.rqs_entry_type == RQSTYPE_CTIO2) {
1743 rq->req_header.rqs_entry_type = RQSTYPE_CTIO3;
1746 if (nseg >= ISP_NSEG_MAX) {
1747 isp_prt(isp, ISP_LOGERR, "number of segments (%d) exceed maximum we can support (%d)", nseg, ISP_NSEG_MAX);
1752 if ((csio->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) {
1753 bus_dmamap_sync(isp->isp_osinfo.dmat, PISP_PCMD(csio)->dmap, BUS_DMASYNC_PREWRITE);
1754 ddir = ISP_TO_DEVICE;
1755 } else if ((csio->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_OUT) {
1756 bus_dmamap_sync(isp->isp_osinfo.dmat, PISP_PCMD(csio)->dmap, BUS_DMASYNC_PREREAD);
1757 ddir = ISP_FROM_DEVICE;
1769 if (isp_send_tgt_cmd(isp, rq, dm_segs, nseg, XS_XFRLEN(csio), ddir, &csio->sense_data, csio->sense_len) != CMD_QUEUED) {
1770 mp->error = MUSHERR_NOQENTRIES;
1775 static void dma2_2(void *, bus_dma_segment_t *, int, bus_size_t, int);
1776 static void dma2(void *, bus_dma_segment_t *, int, int);
1779 dma2_2(void *arg, bus_dma_segment_t *dm_segs, int nseg, bus_size_t mapsize, int error)
1783 mp->mapsize = mapsize;
1784 dma2(arg, dm_segs, nseg, error);
1788 dma2(void *arg, bus_dma_segment_t *dm_segs, int nseg, int error)
1792 struct ccb_scsiio *csio;
1796 mp = (mush_t *) arg;
1801 csio = mp->cmd_token;
1805 if (sizeof (bus_addr_t) > 4) {
1806 if (nseg >= ISP_NSEG64_MAX) {
1807 isp_prt(isp, ISP_LOGERR, "number of segments (%d) exceed maximum we can support (%d)", nseg, ISP_NSEG64_MAX);
1811 if (rq->req_header.rqs_entry_type == RQSTYPE_T2RQS) {
1812 rq->req_header.rqs_entry_type = RQSTYPE_T3RQS;
1813 } else if (rq->req_header.rqs_entry_type == RQSTYPE_REQUEST) {
1814 rq->req_header.rqs_entry_type = RQSTYPE_A64;
1817 if (nseg >= ISP_NSEG_MAX) {
1818 isp_prt(isp, ISP_LOGERR, "number of segments (%d) exceed maximum we can support (%d)", nseg, ISP_NSEG_MAX);
1823 if ((csio->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) {
1824 bus_dmamap_sync(isp->isp_osinfo.dmat, PISP_PCMD(csio)->dmap, BUS_DMASYNC_PREREAD);
1825 ddir = ISP_FROM_DEVICE;
1826 } else if ((csio->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_OUT) {
1827 bus_dmamap_sync(isp->isp_osinfo.dmat, PISP_PCMD(csio)->dmap, BUS_DMASYNC_PREWRITE);
1828 ddir = ISP_TO_DEVICE;
1838 if (isp_send_cmd(isp, rq, dm_segs, nseg, XS_XFRLEN(csio), ddir) != CMD_QUEUED) {
1839 mp->error = MUSHERR_NOQENTRIES;
1844 isp_pci_dmasetup(ispsoftc_t *isp, struct ccb_scsiio *csio, void *ff)
1847 void (*eptr)(void *, bus_dma_segment_t *, int, int);
1848 void (*eptr2)(void *, bus_dma_segment_t *, int, bus_size_t, int);
1852 mp->cmd_token = csio;
1857 #ifdef ISP_TARGET_MODE
1858 if (csio->ccb_h.func_code == XPT_CONT_TARGET_IO) {
1869 if ((csio->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_NONE || (csio->dxfer_len == 0)) {
1870 (*eptr)(mp, NULL, 0, 0);
1871 } else if ((csio->ccb_h.flags & CAM_SCATTER_VALID) == 0) {
1872 if ((csio->ccb_h.flags & CAM_DATA_PHYS) == 0) {
1874 error = bus_dmamap_load(isp->isp_osinfo.dmat, PISP_PCMD(csio)->dmap, csio->data_ptr, csio->dxfer_len, eptr, mp, 0);
1876 xpt_print(csio->ccb_h.path, "%s: bus_dmamap_load " "ptr %p len %d returned %d\n", __func__, csio->data_ptr, csio->dxfer_len, error);
1879 if (error == EINPROGRESS) {
1880 bus_dmamap_unload(isp->isp_osinfo.dmat, PISP_PCMD(csio)->dmap);
1882 isp_prt(isp, ISP_LOGERR, "deferred dma allocation not supported");
1883 } else if (error && mp->error == 0) {
1885 isp_prt(isp, ISP_LOGERR, "error %d in dma mapping code", error);
1890 /* Pointer to physical buffer */
1891 struct bus_dma_segment seg;
1892 seg.ds_addr = (bus_addr_t)(vm_offset_t)csio->data_ptr;
1893 seg.ds_len = csio->dxfer_len;
1894 (*eptr)(mp, &seg, 1, 0);
1897 struct bus_dma_segment *segs;
1899 if ((csio->ccb_h.flags & CAM_DATA_PHYS) != 0) {
1900 isp_prt(isp, ISP_LOGERR, "Physical segment pointers unsupported");
1902 } else if ((csio->ccb_h.flags & CAM_SG_LIST_PHYS) == 0) {
1907 * We're taking advantage of the fact that
1908 * the pointer/length sizes and layout of the iovec
1909 * structure are the same as the bus_dma_segment
1910 * structure. This might be a little dangerous,
1911 * but only if they change the structures, which
1914 KASSERT((sizeof (sguio.uio_iov) == sizeof (csio->data_ptr) &&
1915 sizeof (sguio.uio_iovcnt) >= sizeof (csio->sglist_cnt) &&
1916 sizeof (sguio.uio_resid) >= sizeof (csio->dxfer_len)), ("Ken's assumption failed"));
1917 sguio.uio_iov = (struct iovec *)csio->data_ptr;
1918 sguio.uio_iovcnt = csio->sglist_cnt;
1919 sguio.uio_resid = csio->dxfer_len;
1920 sguio.uio_segflg = UIO_SYSSPACE;
1922 error = bus_dmamap_load_uio(isp->isp_osinfo.dmat, PISP_PCMD(csio)->dmap, &sguio, eptr2, mp, 0);
1924 if (error != 0 && mp->error == 0) {
1925 isp_prt(isp, ISP_LOGERR, "error %d in dma mapping code", error);
1929 /* Just use the segments provided */
1930 segs = (struct bus_dma_segment *) csio->data_ptr;
1931 (*eptr)(mp, segs, csio->sglist_cnt, 0);
1935 int retval = CMD_COMPLETE;
1936 if (mp->error == MUSHERR_NOQENTRIES) {
1937 retval = CMD_EAGAIN;
1938 } else if (mp->error == EFBIG) {
1939 XS_SETERR(csio, CAM_REQ_TOO_BIG);
1940 } else if (mp->error == EINVAL) {
1941 XS_SETERR(csio, CAM_REQ_INVALID);
1943 XS_SETERR(csio, CAM_UNREC_HBA_ERROR);
1947 return (CMD_QUEUED);
1951 isp_pci_reset0(ispsoftc_t *isp)
1953 ISP_DISABLE_INTS(isp);
1957 isp_pci_reset1(ispsoftc_t *isp)
1959 if (!IS_24XX(isp)) {
1960 /* Make sure the BIOS is disabled */
1961 isp_pci_wr_reg(isp, HCCR, PCI_HCCR_CMD_BIOS);
1963 /* and enable interrupts */
1964 ISP_ENABLE_INTS(isp);
1968 isp_pci_dumpregs(ispsoftc_t *isp, const char *msg)
1970 struct isp_pcisoftc *pcs = (struct isp_pcisoftc *)isp;
1972 printf("%s: %s\n", device_get_nameunit(isp->isp_dev), msg);
1974 printf("%s:\n", device_get_nameunit(isp->isp_dev));
1976 printf(" biu_conf1=%x", ISP_READ(isp, BIU_CONF1));
1978 printf(" biu_csr=%x", ISP_READ(isp, BIU2100_CSR));
1979 printf(" biu_icr=%x biu_isr=%x biu_sema=%x ", ISP_READ(isp, BIU_ICR),
1980 ISP_READ(isp, BIU_ISR), ISP_READ(isp, BIU_SEMA));
1981 printf("risc_hccr=%x\n", ISP_READ(isp, HCCR));
1985 ISP_WRITE(isp, HCCR, HCCR_CMD_PAUSE);
1986 printf(" cdma_conf=%x cdma_sts=%x cdma_fifostat=%x\n",
1987 ISP_READ(isp, CDMA_CONF), ISP_READ(isp, CDMA_STATUS),
1988 ISP_READ(isp, CDMA_FIFO_STS));
1989 printf(" ddma_conf=%x ddma_sts=%x ddma_fifostat=%x\n",
1990 ISP_READ(isp, DDMA_CONF), ISP_READ(isp, DDMA_STATUS),
1991 ISP_READ(isp, DDMA_FIFO_STS));
1992 printf(" sxp_int=%x sxp_gross=%x sxp(scsi_ctrl)=%x\n",
1993 ISP_READ(isp, SXP_INTERRUPT),
1994 ISP_READ(isp, SXP_GROSS_ERR),
1995 ISP_READ(isp, SXP_PINS_CTRL));
1996 ISP_WRITE(isp, HCCR, HCCR_CMD_RELEASE);
1998 printf(" mbox regs: %x %x %x %x %x\n",
1999 ISP_READ(isp, OUTMAILBOX0), ISP_READ(isp, OUTMAILBOX1),
2000 ISP_READ(isp, OUTMAILBOX2), ISP_READ(isp, OUTMAILBOX3),
2001 ISP_READ(isp, OUTMAILBOX4));
2002 printf(" PCI Status Command/Status=%x\n",
2003 pci_read_config(pcs->pci_dev, PCIR_COMMAND, 1));