3 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
5 * Copyright (c) 2009-2018 Alexander Motin <mav@FreeBSD.org>
6 * Copyright (c) 1997-2009 by Matthew Jacob
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
19 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
23 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34 * Mailbox and Queue Entry Definitions for for Qlogic ISP SCSI adapters.
40 * Mailbox Command Opcodes
42 #define MBOX_NO_OP 0x0000
43 #define MBOX_LOAD_RAM 0x0001
44 #define MBOX_EXEC_FIRMWARE 0x0002
45 #define MBOX_DUMP_RAM 0x0003
46 #define MBOX_WRITE_RAM_WORD 0x0004
47 #define MBOX_READ_RAM_WORD 0x0005
48 #define MBOX_MAILBOX_REG_TEST 0x0006
49 #define MBOX_VERIFY_CHECKSUM 0x0007
50 #define MBOX_ABOUT_FIRMWARE 0x0008
51 #define MBOX_LOAD_RISC_RAM_2100 0x0009
53 #define MBOX_LOAD_RISC_RAM 0x000b
54 #define MBOX_DUMP_RISC_RAM 0x000c
55 #define MBOX_WRITE_RAM_WORD_EXTENDED 0x000d
56 #define MBOX_CHECK_FIRMWARE 0x000e
57 #define MBOX_READ_RAM_WORD_EXTENDED 0x000f
58 #define MBOX_INIT_REQ_QUEUE 0x0010
59 #define MBOX_INIT_RES_QUEUE 0x0011
60 #define MBOX_EXECUTE_IOCB 0x0012
61 #define MBOX_WAKE_UP 0x0013
62 #define MBOX_STOP_FIRMWARE 0x0014
63 #define MBOX_ABORT 0x0015
64 #define MBOX_ABORT_DEVICE 0x0016
65 #define MBOX_ABORT_TARGET 0x0017
66 #define MBOX_BUS_RESET 0x0018
67 #define MBOX_STOP_QUEUE 0x0019
68 #define MBOX_START_QUEUE 0x001a
69 #define MBOX_SINGLE_STEP_QUEUE 0x001b
70 #define MBOX_ABORT_QUEUE 0x001c
71 #define MBOX_GET_DEV_QUEUE_STATUS 0x001d
73 #define MBOX_GET_FIRMWARE_STATUS 0x001f
74 #define MBOX_GET_INIT_SCSI_ID 0x0020
75 #define MBOX_GET_SELECT_TIMEOUT 0x0021
76 #define MBOX_GET_RETRY_COUNT 0x0022
77 #define MBOX_GET_TAG_AGE_LIMIT 0x0023
78 #define MBOX_GET_CLOCK_RATE 0x0024
79 #define MBOX_GET_ACT_NEG_STATE 0x0025
80 #define MBOX_GET_ASYNC_DATA_SETUP_TIME 0x0026
81 #define MBOX_GET_SBUS_PARAMS 0x0027
82 #define MBOX_GET_PCI_PARAMS MBOX_GET_SBUS_PARAMS
83 #define MBOX_GET_TARGET_PARAMS 0x0028
84 #define MBOX_GET_DEV_QUEUE_PARAMS 0x0029
85 #define MBOX_GET_RESET_DELAY_PARAMS 0x002a
91 #define MBOX_SET_INIT_SCSI_ID 0x0030
92 #define MBOX_SET_SELECT_TIMEOUT 0x0031
93 #define MBOX_SET_RETRY_COUNT 0x0032
94 #define MBOX_SET_TAG_AGE_LIMIT 0x0033
95 #define MBOX_SET_CLOCK_RATE 0x0034
96 #define MBOX_SET_ACT_NEG_STATE 0x0035
97 #define MBOX_SET_ASYNC_DATA_SETUP_TIME 0x0036
98 #define MBOX_SET_SBUS_CONTROL_PARAMS 0x0037
99 #define MBOX_SET_PCI_PARAMETERS 0x0037
100 #define MBOX_SET_TARGET_PARAMS 0x0038
101 #define MBOX_SET_DEV_QUEUE_PARAMS 0x0039
102 #define MBOX_SET_RESET_DELAY_PARAMS 0x003a
108 #define MBOX_RETURN_BIOS_BLOCK_ADDR 0x0040
109 #define MBOX_WRITE_FOUR_RAM_WORDS 0x0041
110 #define MBOX_EXEC_BIOS_IOCB 0x0042
111 #define MBOX_SET_FW_FEATURES 0x004a
112 #define MBOX_GET_FW_FEATURES 0x004b
113 #define FW_FEATURE_FAST_POST 0x1
114 #define FW_FEATURE_LVD_NOTIFY 0x2
115 #define FW_FEATURE_RIO_32BIT 0x4
116 #define FW_FEATURE_RIO_16BIT 0x8
118 #define MBOX_INIT_REQ_QUEUE_A64 0x0052
119 #define MBOX_INIT_RES_QUEUE_A64 0x0053
121 #define MBOX_ENABLE_TARGET_MODE 0x0055
122 #define ENABLE_TARGET_FLAG 0x8000
123 #define ENABLE_TQING_FLAG 0x0004
124 #define ENABLE_MANDATORY_DISC 0x0002
125 #define MBOX_GET_TARGET_STATUS 0x0056
127 /* These are for the ISP2X00 FC cards */
128 #define MBOX_LOAD_FLASH_FIRMWARE 0x0003
129 #define MBOX_WRITE_FC_SERDES_REG 0x0003 /* FC only */
130 #define MBOX_READ_FC_SERDES_REG 0x0004 /* FC only */
131 #define MBOX_GET_IO_STATUS 0x0012
132 #define MBOX_SET_TRANSMIT_PARAMS 0x0019
133 #define MBOX_SET_PORT_PARAMS 0x001a
134 #define MBOX_LOAD_OP_FW_PARAMS 0x001b
135 #define MBOX_INIT_MULTIPLE_QUEUE 0x001f
136 #define MBOX_GET_LOOP_ID 0x0020
137 /* for 24XX cards, outgoing mailbox 7 has these values for F or FL topologies */
138 #define ISP24XX_INORDER 0x0100
139 #define ISP24XX_NPIV_SAN 0x0400
140 #define ISP24XX_VSAN_SAN 0x1000
141 #define ISP24XX_FC_SP_SAN 0x2000
142 #define MBOX_GET_TIMEOUT_PARAMS 0x0022
143 #define MBOX_GET_FIRMWARE_OPTIONS 0x0028
144 #define MBOX_GENERATE_SYSTEM_ERROR 0x002a
145 #define MBOX_WRITE_SFP 0x0030
146 #define MBOX_READ_SFP 0x0031
147 #define MBOX_SET_TIMEOUT_PARAMS 0x0032
148 #define MBOX_SET_FIRMWARE_OPTIONS 0x0038
149 #define MBOX_GET_SET_FC_LED_CONF 0x003b
150 #define MBOX_RESTART_NIC_FIRMWARE 0x003d /* FCoE only */
151 #define MBOX_ACCESS_CONTROL 0x003e
152 #define MBOX_LOOP_PORT_BYPASS 0x0040 /* FC only */
153 #define MBOX_LOOP_PORT_ENABLE 0x0041 /* FC only */
154 #define MBOX_GET_RESOURCE_COUNT 0x0042
155 #define MBOX_REQUEST_OFFLINE_MODE 0x0043
156 #define MBOX_DIAGNOSTIC_ECHO_TEST 0x0044
157 #define MBOX_DIAGNOSTIC_LOOPBACK 0x0045
158 #define MBOX_ENHANCED_GET_PDB 0x0047
159 #define MBOX_INIT_FIRMWARE_MULTI_ID 0x0048 /* 2400 only */
160 #define MBOX_GET_VP_DATABASE 0x0049 /* 2400 only */
161 #define MBOX_GET_VP_DATABASE_ENTRY 0x004a /* 2400 only */
162 #define MBOX_GET_FCF_LIST 0x0050 /* FCoE only */
163 #define MBOX_GET_DCBX_PARAMETERS 0x0051 /* FCoE only */
164 #define MBOX_HOST_MEMORY_COPY 0x0053
165 #define MBOX_EXEC_COMMAND_IOCB_A64 0x0054
166 #define MBOX_SEND_RNID 0x0057
167 #define MBOX_SET_PARAMETERS 0x0059
168 #define MBOX_GET_PARAMETERS 0x005a
169 #define MBOX_DRIVER_HEARTBEAT 0x005B /* FC only */
170 #define MBOX_FW_HEARTBEAT 0x005C
171 #define MBOX_GET_SET_DATA_RATE 0x005D /* >=23XX only */
172 #define MBGSD_GET_RATE 0
173 #define MBGSD_SET_RATE 1
174 #define MBGSD_SET_RATE_NOW 2 /* 24XX only */
175 #define MBGSD_1GB 0x00
176 #define MBGSD_2GB 0x01
177 #define MBGSD_AUTO 0x02
178 #define MBGSD_4GB 0x03 /* 24XX only */
179 #define MBGSD_8GB 0x04 /* 25XX only */
180 #define MBGSD_16GB 0x05 /* 26XX only */
181 #define MBGSD_32GB 0x06 /* 27XX only */
182 #define MBGSD_10GB 0x13 /* 26XX only */
183 #define MBOX_SEND_RNFT 0x005e
184 #define MBOX_INIT_FIRMWARE 0x0060
185 #define MBOX_GET_INIT_CONTROL_BLOCK 0x0061
186 #define MBOX_INIT_LIP 0x0062
187 #define MBOX_GET_FC_AL_POSITION_MAP 0x0063
188 #define MBOX_GET_PORT_DB 0x0064
189 #define MBOX_CLEAR_ACA 0x0065
190 #define MBOX_TARGET_RESET 0x0066
191 #define MBOX_CLEAR_TASK_SET 0x0067
192 #define MBOX_ABORT_TASK_SET 0x0068
193 #define MBOX_GET_FW_STATE 0x0069
194 #define MBOX_GET_PORT_NAME 0x006A
195 #define MBOX_GET_LINK_STATUS 0x006B
196 #define MBOX_INIT_LIP_RESET 0x006C
197 #define MBOX_GET_LINK_STAT_PR_DATA_CNT 0x006D
198 #define MBOX_SEND_SNS 0x006E
199 #define MBOX_FABRIC_LOGIN 0x006F
200 #define MBOX_SEND_CHANGE_REQUEST 0x0070
201 #define MBOX_FABRIC_LOGOUT 0x0071
202 #define MBOX_INIT_LIP_LOGIN 0x0072
203 #define MBOX_GET_PORT_NODE_NAME_LIST 0x0075
204 #define MBOX_SET_VENDOR_ID 0x0076
205 #define MBOX_GET_XGMAC_STATS 0x007a
206 #define MBOX_GET_ID_LIST 0x007C
207 #define MBOX_SEND_LFA 0x007d
208 #define MBOX_LUN_RESET 0x007E
210 #define ISP2100_SET_PCI_PARAM 0x00ff
212 #define MBOX_BUSY 0x04
215 * Mailbox Command Complete Status Codes
217 #define MBOX_COMMAND_COMPLETE 0x4000
218 #define MBOX_INVALID_COMMAND 0x4001
219 #define MBOX_HOST_INTERFACE_ERROR 0x4002
220 #define MBOX_TEST_FAILED 0x4003
221 #define MBOX_COMMAND_ERROR 0x4005
222 #define MBOX_COMMAND_PARAM_ERROR 0x4006
223 #define MBOX_PORT_ID_USED 0x4007
224 #define MBOX_LOOP_ID_USED 0x4008
225 #define MBOX_ALL_IDS_USED 0x4009
226 #define MBOX_NOT_LOGGED_IN 0x400A
227 #define MBOX_LINK_DOWN_ERROR 0x400B
228 #define MBOX_LOOPBACK_ERROR 0x400C
229 #define MBOX_CHECKSUM_ERROR 0x4010
230 #define MBOX_INVALID_PRODUCT_KEY 0x4020
231 /* pseudo mailbox completion codes */
232 #define MBOX_REGS_BUSY 0x6000 /* registers in use */
233 #define MBOX_TIMEOUT 0x6001 /* command timed out */
235 #define MBLOGALL 0xffffffff
236 #define MBLOGNONE 0x00000000
237 #define MBLOGMASK(x) (1 << (((x) - 1) & 0x1f))
240 * Asynchronous event status codes
242 #define ASYNC_BUS_RESET 0x8001
243 #define ASYNC_SYSTEM_ERROR 0x8002
244 #define ASYNC_RQS_XFER_ERR 0x8003
245 #define ASYNC_RSP_XFER_ERR 0x8004
246 #define ASYNC_QWAKEUP 0x8005
247 #define ASYNC_TIMEOUT_RESET 0x8006
248 #define ASYNC_DEVICE_RESET 0x8007
249 #define ASYNC_EXTMSG_UNDERRUN 0x800A
250 #define ASYNC_SCAM_INT 0x800B
251 #define ASYNC_HUNG_SCSI 0x800C
252 #define ASYNC_KILLED_BUS 0x800D
253 #define ASYNC_BUS_TRANSIT 0x800E /* LVD -> HVD, eg. */
254 #define ASYNC_LIP_OCCURRED 0x8010 /* FC only */
255 #define ASYNC_LOOP_UP 0x8011
256 #define ASYNC_LOOP_DOWN 0x8012
257 #define ASYNC_LOOP_RESET 0x8013 /* FC only */
258 #define ASYNC_PDB_CHANGED 0x8014
259 #define ASYNC_CHANGE_NOTIFY 0x8015
260 #define ASYNC_LIP_NOS_OLS_RECV 0x8016 /* FC only */
261 #define ASYNC_LIP_ERROR 0x8017 /* FC only */
262 #define ASYNC_AUTO_PLOGI_RJT 0x8018
263 #define ASYNC_SECURITY_UPDATE 0x801B
264 #define ASYNC_CMD_CMPLT 0x8020
265 #define ASYNC_CTIO_DONE 0x8021
266 #define ASYNC_RIO32_1 0x8021
267 #define ASYNC_RIO32_2 0x8022
268 #define ASYNC_IP_XMIT_DONE 0x8022
269 #define ASYNC_IP_RECV_DONE 0x8023
270 #define ASYNC_IP_BROADCAST 0x8024
271 #define ASYNC_IP_RCVQ_LOW 0x8025
272 #define ASYNC_IP_RCVQ_EMPTY 0x8026
273 #define ASYNC_IP_RECV_DONE_ALIGNED 0x8027
274 #define ASYNC_ERR_LOGGING_DISABLED 0x8029
275 #define ASYNC_PTPMODE 0x8030 /* FC only */
276 #define ASYNC_RIO16_1 0x8031
277 #define ASYNC_RIO16_2 0x8032
278 #define ASYNC_RIO16_3 0x8033
279 #define ASYNC_RIO16_4 0x8034
280 #define ASYNC_RIO16_5 0x8035
281 #define ASYNC_CONNMODE 0x8036
282 #define ISP_CONN_LOOP 1
283 #define ISP_CONN_PTP 2
284 #define ISP_CONN_BADLIP 3
285 #define ISP_CONN_FATAL 4
286 #define ISP_CONN_LOOPBACK 5
287 #define ASYNC_P2P_INIT_ERR 0x8037
288 #define ASYNC_RIOZIO_STALL 0x8040 /* there's a RIO/ZIO entry that hasn't been serviced */
289 #define ASYNC_RIO32_2_2200 0x8042 /* same as ASYNC_RIO32_2, but for 2100/2200 */
290 #define ASYNC_RCV_ERR 0x8048
292 * 2.01.31 2200 Only. Need Bit 13 in Mailbox 1 for Set Firmware Options
293 * mailbox command to enable this.
295 #define ASYNC_QFULL_SENT 0x8049
296 #define ASYNC_RJT_SENT 0x8049 /* 24XX only */
297 #define ASYNC_SEL_CLASS2_P_RJT_SENT 0x804f
298 #define ASYNC_FW_RESTART_COMPLETE 0x8060
299 #define ASYNC_TEMPERATURE_ALERT 0x8070
300 #define ASYNC_INTER_DRIVER_COMP 0x8100 /* FCoE only */
301 #define ASYNC_INTER_DRIVER_NOTIFY 0x8101 /* FCoE only */
302 #define ASYNC_INTER_DRIVER_TIME_EXT 0x8102 /* FCoE only */
303 #define ASYNC_TRANSCEIVER_INSERTION 0x8130
304 #define ASYNC_TRANSCEIVER_REMOVAL 0x8131
305 #define ASYNC_NIC_FW_STATE_CHANGE 0x8200 /* FCoE only */
306 #define ASYNC_AUTOLOAD_FW_COMPLETE 0x8400
307 #define ASYNC_AUTOLOAD_FW_FAILURE 0x8401
310 * Firmware Options. There are a lot of them.
312 * IFCOPTN - ISP Fibre Channel Option Word N
314 #define IFCOPT1_EQFQASYNC (1 << 13) /* enable QFULL notification */
315 #define IFCOPT1_EAABSRCVD (1 << 12)
316 #define IFCOPT1_RJTASYNC (1 << 11) /* enable 8018 notification */
317 #define IFCOPT1_ENAPURE (1 << 10)
318 #define IFCOPT1_ENA8017 (1 << 7)
319 #define IFCOPT1_DISGPIO67 (1 << 6)
320 #define IFCOPT1_LIPLOSSIMM (1 << 5)
321 #define IFCOPT1_DISF7SWTCH (1 << 4)
322 #define IFCOPT1_CTIO_RETRY (1 << 3)
323 #define IFCOPT1_LIPASYNC (1 << 1)
324 #define IFCOPT1_LIPF8 (1 << 0)
326 #define IFCOPT2_LOOPBACK (1 << 1)
327 #define IFCOPT2_ATIO3_ONLY (1 << 0)
329 #define IFCOPT3_NOPRLI (1 << 4) /* disable automatic sending of PRLI on local loops */
330 #define IFCOPT3_RNDASYNC (1 << 1)
333 * All IOCB Queue entries are this size
335 #define QENTRY_LEN 64
338 * Command Structure Definitions
352 #define DSTYPE_32BIT 0
353 #define DSTYPE_64BIT 1
355 uint16_t ds_type; /* 0-> ispds_t, 1-> ispds64_t */
356 uint32_t ds_segment; /* unused */
357 uint32_t ds_base; /* 32 bit address of DSD list */
362 uint8_t rqs_entry_type;
363 uint8_t rqs_entry_count;
368 /* RQS Flag definitions */
369 #define RQSFLAG_CONTINUATION 0x01
370 #define RQSFLAG_FULL 0x02
371 #define RQSFLAG_BADHEADER 0x04
372 #define RQSFLAG_BADPACKET 0x08
373 #define RQSFLAG_BADCOUNT 0x10
374 #define RQSFLAG_BADORDER 0x20
375 #define RQSFLAG_MASK 0x3f
377 /* RQS entry_type definitions */
378 #define RQSTYPE_REQUEST 0x01
379 #define RQSTYPE_DATASEG 0x02
380 #define RQSTYPE_RESPONSE 0x03
381 #define RQSTYPE_MARKER 0x04
382 #define RQSTYPE_CMDONLY 0x05
383 #define RQSTYPE_ATIO 0x06 /* Target Mode */
384 #define RQSTYPE_CTIO 0x07 /* Target Mode */
385 #define RQSTYPE_SCAM 0x08
386 #define RQSTYPE_A64 0x09
387 #define RQSTYPE_A64_CONT 0x0a
388 #define RQSTYPE_ENABLE_LUN 0x0b /* Target Mode */
389 #define RQSTYPE_MODIFY_LUN 0x0c /* Target Mode */
390 #define RQSTYPE_NOTIFY 0x0d /* Target Mode */
391 #define RQSTYPE_NOTIFY_ACK 0x0e /* Target Mode */
392 #define RQSTYPE_CTIO1 0x0f /* Target Mode */
393 #define RQSTYPE_STATUS_CONT 0x10
394 #define RQSTYPE_T2RQS 0x11
395 #define RQSTYPE_CTIO7 0x12
396 #define RQSTYPE_IP_XMIT 0x13
397 #define RQSTYPE_TSK_MGMT 0x14
398 #define RQSTYPE_T4RQS 0x15
399 #define RQSTYPE_ATIO2 0x16 /* Target Mode */
400 #define RQSTYPE_CTIO2 0x17 /* Target Mode */
401 #define RQSTYPE_T7RQS 0x18
402 #define RQSTYPE_T3RQS 0x19
403 #define RQSTYPE_IP_XMIT_64 0x1b
404 #define RQSTYPE_CTIO4 0x1e /* Target Mode */
405 #define RQSTYPE_CTIO3 0x1f /* Target Mode */
406 #define RQSTYPE_RIO1 0x21
407 #define RQSTYPE_RIO2 0x22
408 #define RQSTYPE_IP_RECV 0x23
409 #define RQSTYPE_IP_RECV_CONT 0x24
410 #define RQSTYPE_CT_PASSTHRU 0x29
411 #define RQSTYPE_MS_PASSTHRU 0x29
412 #define RQSTYPE_VP_CTRL 0x30 /* 24XX only */
413 #define RQSTYPE_VP_MODIFY 0x31 /* 24XX only */
414 #define RQSTYPE_RPT_ID_ACQ 0x32 /* 24XX only */
415 #define RQSTYPE_ABORT_IO 0x33
416 #define RQSTYPE_T6RQS 0x48
417 #define RQSTYPE_LOGIN 0x52
418 #define RQSTYPE_ABTS_RCVD 0x54 /* 24XX only */
419 #define RQSTYPE_ABTS_RSP 0x55 /* 24XX only */
430 uint16_t req_reserved;
432 uint16_t req_seg_count;
434 ispds_t req_dataseg[ISP_RQDSEG];
436 #define ISP_RQDSEG_A64 2
441 uint8_t mrk_reserved0;
443 uint16_t mrk_modifier;
446 uint8_t mrk_reserved1[48];
453 uint8_t mrk_modifier;
454 uint8_t mrk_reserved0;
455 uint8_t mrk_reserved1;
457 uint16_t mrk_reserved2;
459 uint8_t mrk_reserved3[40];
463 #define SYNC_DEVICE 0
464 #define SYNC_TARGET 1
468 #define ISP_RQDSEG_T2 3
477 uint8_t req_reserved;
479 uint16_t req_seg_count;
481 uint32_t req_totalcnt;
482 ispds_t req_dataseg[ISP_RQDSEG_T2];
492 uint8_t req_reserved;
494 uint16_t req_seg_count;
496 uint32_t req_totalcnt;
497 ispds_t req_dataseg[ISP_RQDSEG_T2];
500 #define ISP_RQDSEG_T3 2
509 uint8_t req_reserved;
511 uint16_t req_seg_count;
513 uint32_t req_totalcnt;
514 ispds64_t req_dataseg[ISP_RQDSEG_T3];
516 #define ispreq64_t ispreqt3_t /* same as.... */
525 uint8_t req_reserved;
527 uint16_t req_seg_count;
529 uint32_t req_totalcnt;
530 ispds64_t req_dataseg[ISP_RQDSEG_T3];
533 /* req_flag values */
534 #define REQFLAG_NODISCON 0x0001
535 #define REQFLAG_HTAG 0x0002
536 #define REQFLAG_OTAG 0x0004
537 #define REQFLAG_STAG 0x0008
538 #define REQFLAG_TARGET_RTN 0x0010
540 #define REQFLAG_NODATA 0x0000
541 #define REQFLAG_DATA_IN 0x0020
542 #define REQFLAG_DATA_OUT 0x0040
543 #define REQFLAG_DATA_UNKNOWN 0x0060
545 #define REQFLAG_DISARQ 0x0100
546 #define REQFLAG_FRC_ASYNC 0x0200
547 #define REQFLAG_FRC_SYNC 0x0400
548 #define REQFLAG_FRC_WIDE 0x0800
549 #define REQFLAG_NOPARITY 0x1000
550 #define REQFLAG_STOPQ 0x2000
551 #define REQFLAG_XTRASNS 0x4000
552 #define REQFLAG_PRIORITY 0x8000
561 uint16_t req_reserved;
563 uint16_t req_seg_count;
576 uint16_t req_seg_count;
577 uint16_t req_reserved;
579 uint8_t req_alen_datadir;
580 uint8_t req_task_management;
581 uint8_t req_task_attribute;
588 ispds64_t req_dataseg;
591 /* Task Management Request Function */
596 uint8_t tmf_reserved0[2];
598 uint16_t tmf_timeout;
601 uint8_t tmf_reserved1[20];
605 uint8_t tmf_reserved2[12];
608 #define ISP24XX_TMF_NOSEND 0x80000000
610 #define ISP24XX_TMF_LUN_RESET 0x00000010
611 #define ISP24XX_TMF_ABORT_TASK_SET 0x00000008
612 #define ISP24XX_TMF_CLEAR_TASK_SET 0x00000004
613 #define ISP24XX_TMF_TARGET_RESET 0x00000002
614 #define ISP24XX_TMF_CLEAR_ACA 0x00000001
616 /* I/O Abort Structure */
618 isphdr_t abrt_header;
619 uint32_t abrt_handle;
621 uint16_t abrt_options;
622 uint32_t abrt_cmd_handle;
623 uint16_t abrt_queue_number;
624 uint8_t abrt_reserved[30];
628 uint8_t abrt_reserved1[12];
631 #define ISP24XX_ABRT_NOSEND 0x01 /* don't actually send ABTS */
632 #define ISP24XX_ABRT_OKAY 0x00 /* in nphdl on return */
633 #define ISP24XX_ABRT_ENXIO 0x31 /* in nphdl on return */
638 uint32_t req_reserved;
639 ispds_t req_dataseg[ISP_CDSEG];
642 #define ISP_CDSEG64 5
645 ispds64_t req_dataseg[ISP_CDSEG64];
651 uint16_t req_scsi_status;
652 uint16_t req_completion_status;
653 uint16_t req_state_flags;
654 uint16_t req_status_flags;
656 #define req_response_len req_time /* FC only */
657 uint16_t req_sense_len;
659 uint8_t req_response[8]; /* FC only */
660 uint8_t req_sense_data[32];
664 * Status Continuation
668 uint8_t req_sense_data[60];
677 uint16_t req_completion_status;
680 uint16_t req_reserved0;
681 uint16_t req_state_flags;
682 uint16_t req_retry_delay; /* aka Status Qualifier */
683 uint16_t req_scsi_status;
684 uint32_t req_fcp_residual;
685 uint32_t req_sense_len;
686 uint32_t req_response_len;
687 uint8_t req_rsp_sense[28];
688 } isp24xx_statusreq_t;
691 * For Qlogic 2X00, the high order byte of SCSI status has
692 * additional meaning.
694 #define RQCS_CR 0x1000 /* Confirmation Request */
695 #define RQCS_RU 0x0800 /* Residual Under */
696 #define RQCS_RO 0x0400 /* Residual Over */
697 #define RQCS_RESID (RQCS_RU|RQCS_RO)
698 #define RQCS_SV 0x0200 /* Sense Length Valid */
699 #define RQCS_RV 0x0100 /* FCP Response Length Valid */
708 uint16_t ctp_nphdl; /* n-port handle */
709 uint16_t ctp_cmd_cnt; /* Command DSD count */
711 uint8_t ctp_reserved0;
713 uint16_t ctp_reserved1;
714 uint16_t ctp_rsp_cnt; /* Response DSD count */
715 uint16_t ctp_reserved2[5];
716 uint32_t ctp_rsp_bcnt; /* Response byte count */
717 uint32_t ctp_cmd_bcnt; /* Command byte count */
718 ispds64_t ctp_dataseg[2];
727 uint16_t ms_nphdl; /* handle in high byte for !2k f/w */
730 uint16_t ms_reserved1; /* low 8 bits */
732 uint16_t ms_cmd_cnt; /* Command DSD count */
733 uint16_t ms_tot_cnt; /* Total DSD Count */
734 uint8_t ms_type; /* MS type */
735 uint8_t ms_r_ctl; /* R_CTL */
736 uint16_t ms_rxid; /* RX_ID */
737 uint16_t ms_reserved2;
739 uint32_t ms_rsp_bcnt; /* Response byte count */
740 uint32_t ms_cmd_bcnt; /* Command byte count */
741 ispds64_t ms_dataseg[2];
745 * Completion Status Codes.
747 #define RQCS_COMPLETE 0x0000
748 #define RQCS_DMA_ERROR 0x0002
749 #define RQCS_RESET_OCCURRED 0x0004
750 #define RQCS_ABORTED 0x0005
751 #define RQCS_TIMEOUT 0x0006
752 #define RQCS_DATA_OVERRUN 0x0007
753 #define RQCS_DATA_UNDERRUN 0x0015
754 #define RQCS_QUEUE_FULL 0x001C
756 /* 1X00 Only Completion Codes */
757 #define RQCS_INCOMPLETE 0x0001
758 #define RQCS_TRANSPORT_ERROR 0x0003
759 #define RQCS_COMMAND_OVERRUN 0x0008
760 #define RQCS_STATUS_OVERRUN 0x0009
761 #define RQCS_BAD_MESSAGE 0x000a
762 #define RQCS_NO_MESSAGE_OUT 0x000b
763 #define RQCS_EXT_ID_FAILED 0x000c
764 #define RQCS_IDE_MSG_FAILED 0x000d
765 #define RQCS_ABORT_MSG_FAILED 0x000e
766 #define RQCS_REJECT_MSG_FAILED 0x000f
767 #define RQCS_NOP_MSG_FAILED 0x0010
768 #define RQCS_PARITY_ERROR_MSG_FAILED 0x0011
769 #define RQCS_DEVICE_RESET_MSG_FAILED 0x0012
770 #define RQCS_ID_MSG_FAILED 0x0013
771 #define RQCS_UNEXP_BUS_FREE 0x0014
772 #define RQCS_XACT_ERR1 0x0018
773 #define RQCS_XACT_ERR2 0x0019
774 #define RQCS_XACT_ERR3 0x001A
775 #define RQCS_BAD_ENTRY 0x001B
776 #define RQCS_PHASE_SKIPPED 0x001D
777 #define RQCS_ARQS_FAILED 0x001E
778 #define RQCS_WIDE_FAILED 0x001F
779 #define RQCS_SYNCXFER_FAILED 0x0020
780 #define RQCS_LVD_BUSERR 0x0021
782 /* 2X00 Only Completion Codes */
783 #define RQCS_PORT_UNAVAILABLE 0x0028
784 #define RQCS_PORT_LOGGED_OUT 0x0029
785 #define RQCS_PORT_CHANGED 0x002A
786 #define RQCS_PORT_BUSY 0x002B
788 /* 24XX Only Completion Codes */
789 #define RQCS_24XX_DRE 0x0011 /* data reassembly error */
790 #define RQCS_24XX_TABORT 0x0013 /* aborted by target */
791 #define RQCS_24XX_ENOMEM 0x002C /* f/w resource unavailable */
792 #define RQCS_24XX_TMO 0x0030 /* task management overrun */
796 * 1X00 specific State Flags
798 #define RQSF_GOT_BUS 0x0100
799 #define RQSF_GOT_TARGET 0x0200
800 #define RQSF_SENT_CDB 0x0400
801 #define RQSF_XFRD_DATA 0x0800
802 #define RQSF_GOT_STATUS 0x1000
803 #define RQSF_GOT_SENSE 0x2000
804 #define RQSF_XFER_COMPLETE 0x4000
807 * 2X00 specific State Flags
808 * (same as 1X00 except RQSF_GOT_BUS/RQSF_GOT_TARGET are not available)
810 #define RQSF_DATA_IN 0x0020
811 #define RQSF_DATA_OUT 0x0040
812 #define RQSF_STAG 0x0008
813 #define RQSF_OTAG 0x0004
814 #define RQSF_HTAG 0x0002
818 #define RQSTF_DISCONNECT 0x0001
819 #define RQSTF_SYNCHRONOUS 0x0002
820 #define RQSTF_PARITY_ERROR 0x0004
821 #define RQSTF_BUS_RESET 0x0008
822 #define RQSTF_DEVICE_RESET 0x0010
823 #define RQSTF_ABORTED 0x0020
824 #define RQSTF_TIMEOUT 0x0040
825 #define RQSTF_NEGOTIATION 0x0080
828 * 2X00 specific state flags
832 /* RQSF_GOT_STATUS */
833 /* RQSF_XFER_COMPLETE */
836 * 2X00 specific status flags
840 #define RQSTF_DMA_ERROR 0x0080
841 #define RQSTF_LOGOUT 0x2000
846 #ifndef ISP_EXEC_THROTTLE
847 #define ISP_EXEC_THROTTLE 16
851 * About Firmware returns an 'attribute' word in mailbox 6.
852 * These attributes are for 2200 and 2300.
854 #define ISP_FW_ATTR_TMODE 0x0001
855 #define ISP_FW_ATTR_SCCLUN 0x0002
856 #define ISP_FW_ATTR_FABRIC 0x0004
857 #define ISP_FW_ATTR_CLASS2 0x0008
858 #define ISP_FW_ATTR_FCTAPE 0x0010
859 #define ISP_FW_ATTR_IP 0x0020
860 #define ISP_FW_ATTR_VI 0x0040
861 #define ISP_FW_ATTR_VI_SOLARIS 0x0080
862 #define ISP_FW_ATTR_2KLOGINS 0x0100 /* just a guess... */
864 /* and these are for the 2400 */
865 #define ISP2400_FW_ATTR_CLASS2 0x0001
866 #define ISP2400_FW_ATTR_IP 0x0002
867 #define ISP2400_FW_ATTR_MULTIID 0x0004
868 #define ISP2400_FW_ATTR_SB2 0x0008
869 #define ISP2400_FW_ATTR_T10CRC 0x0010
870 #define ISP2400_FW_ATTR_VI 0x0020
871 #define ISP2400_FW_ATTR_MQ 0x0040
872 #define ISP2400_FW_ATTR_MSIX 0x0080
873 #define ISP2400_FW_ATTR_FCOE 0x0800
874 #define ISP2400_FW_ATTR_VP0 0x1000
875 #define ISP2400_FW_ATTR_EXPFW 0x2000
876 #define ISP2400_FW_ATTR_HOTFW 0x4000
877 #define ISP2400_FW_ATTR_EXTNDED 0x8000
878 #define ISP2400_FW_ATTR_EXTVP 0x00010000
879 #define ISP2400_FW_ATTR_VN2VN 0x00040000
880 #define ISP2400_FW_ATTR_EXMOFF 0x00080000
881 #define ISP2400_FW_ATTR_NPMOFF 0x00100000
882 #define ISP2400_FW_ATTR_DIFCHOP 0x00400000
883 #define ISP2400_FW_ATTR_SRIOV 0x02000000
884 #define ISP2400_FW_ATTR_ASICTMP 0x0200000000
885 #define ISP2400_FW_ATTR_ATIOMQ 0x0400000000
888 * These are either manifestly true or are dependent on f/w attributes
890 #define ISP_CAP_TMODE(isp) \
891 (IS_24XX(isp)? 1 : (isp->isp_fwattr & ISP_FW_ATTR_TMODE))
892 #define ISP_CAP_SCCFW(isp) \
893 (IS_24XX(isp)? 1 : (isp->isp_fwattr & ISP_FW_ATTR_SCCLUN))
894 #define ISP_CAP_2KLOGIN(isp) \
895 (IS_24XX(isp)? 1 : (isp->isp_fwattr & ISP_FW_ATTR_2KLOGINS))
898 * This is only true for 24XX cards with this f/w attribute
900 #define ISP_CAP_MULTI_ID(isp) \
901 (IS_24XX(isp)? (isp->isp_fwattr & ISP2400_FW_ATTR_MULTIID) : 0)
902 #define ISP_GET_VPIDX(isp, tag) \
903 (ISP_CAP_MULTI_ID(isp) ? tag : 0)
904 #define ISP_CAP_MSIX(isp) \
905 (IS_24XX(isp)? (isp->isp_fwattr & ISP2400_FW_ATTR_MSIX) : 0)
906 #define ISP_CAP_VP0(isp) \
907 (IS_24XX(isp)? (isp->isp_fwattr & ISP2400_FW_ATTR_VP0) : 0)
910 * This is true manifestly or is dependent on a f/w attribute
911 * but may or may not actually be *enabled*. In any case, it
912 * is enabled on a per-channel basis.
914 #define ISP_CAP_FCTAPE(isp) \
915 (IS_24XX(isp)? 1 : (isp->isp_fwattr & ISP_FW_ATTR_FCTAPE))
917 #define ISP_FCTAPE_ENABLED(isp, chan) \
918 (IS_24XX(isp)? (FCPARAM(isp, chan)->isp_xfwoptions & ICB2400_OPT2_FCTAPE) != 0 : (FCPARAM(isp, chan)->isp_xfwoptions & ICBXOPT_FCTAPE) != 0)
921 * Reduced Interrupt Operation Response Queue Entries
926 uint32_t req_handles[15];
931 uint16_t req_handles[30];
935 * FC (ISP2100/ISP2200/ISP2300/ISP2400) specific data structures
939 * Initialization Control Block
941 * Version One (prime) format.
945 uint8_t icb_reserved0;
946 uint16_t icb_fwoptions;
947 uint16_t icb_maxfrmlen;
948 uint16_t icb_maxalloc;
949 uint16_t icb_execthrottle;
950 uint8_t icb_retry_count;
951 uint8_t icb_retry_delay;
952 uint8_t icb_portname[8];
953 uint16_t icb_hardaddr;
954 uint8_t icb_iqdevtype;
955 uint8_t icb_logintime;
956 uint8_t icb_nodename[8];
957 uint16_t icb_rqstout;
958 uint16_t icb_rspnsin;
959 uint16_t icb_rqstqlen;
960 uint16_t icb_rsltqlen;
961 uint16_t icb_rqstaddr[4];
962 uint16_t icb_respaddr[4];
963 uint16_t icb_lunenables;
966 uint16_t icb_lunetimeout;
967 uint16_t icb_reserved1;
968 uint16_t icb_xfwoptions;
969 uint8_t icb_racctimer;
970 uint8_t icb_idelaytimer;
971 uint16_t icb_zfwoptions;
972 uint16_t icb_reserved2[13];
975 #define ICB_VERSION1 1
977 #define ICBOPT_EXTENDED 0x8000
978 #define ICBOPT_BOTH_WWNS 0x4000
979 #define ICBOPT_FULL_LOGIN 0x2000
980 #define ICBOPT_STOP_ON_QFULL 0x1000 /* 2200/2100 only */
981 #define ICBOPT_PREV_ADDRESS 0x0800
982 #define ICBOPT_SRCHDOWN 0x0400
983 #define ICBOPT_NOLIP 0x0200
984 #define ICBOPT_PDBCHANGE_AE 0x0100
985 #define ICBOPT_TGT_TYPE 0x0080
986 #define ICBOPT_INI_ADISC 0x0040
987 #define ICBOPT_INI_DISABLE 0x0020
988 #define ICBOPT_TGT_ENABLE 0x0010
989 #define ICBOPT_FAST_POST 0x0008
990 #define ICBOPT_FULL_DUPLEX 0x0004
991 #define ICBOPT_FAIRNESS 0x0002
992 #define ICBOPT_HARD_ADDRESS 0x0001
994 #define ICBXOPT_NO_LOGOUT 0x8000 /* no logout on link failure */
995 #define ICBXOPT_FCTAPE_CCQ 0x4000 /* FC-Tape Command Queueing */
996 #define ICBXOPT_FCTAPE_CONFIRM 0x2000
997 #define ICBXOPT_FCTAPE 0x1000
998 #define ICBXOPT_CLASS2_ACK0 0x0200
999 #define ICBXOPT_CLASS2 0x0100
1000 #define ICBXOPT_NO_PLAY 0x0080 /* don't play if can't get hard addr */
1001 #define ICBXOPT_TOPO_MASK 0x0070
1002 #define ICBXOPT_LOOP_ONLY 0x0000
1003 #define ICBXOPT_PTP_ONLY 0x0010
1004 #define ICBXOPT_LOOP_2_PTP 0x0020
1005 #define ICBXOPT_PTP_2_LOOP 0x0030
1007 * The lower 4 bits of the xfwoptions field are the OPERATION MODE bits.
1008 * RIO is not defined for the 23XX cards (just 2200)
1010 #define ICBXOPT_RIO_OFF 0
1011 #define ICBXOPT_RIO_16BIT 1
1012 #define ICBXOPT_RIO_32BIT 2
1013 #define ICBXOPT_RIO_16BIT_IOCB 3
1014 #define ICBXOPT_RIO_32BIT_IOCB 4
1015 #define ICBXOPT_ZIO 5
1016 #define ICBXOPT_TIMER_MASK 0x7
1018 #define ICBZOPT_RATE_MASK 0xC000
1019 #define ICBZOPT_RATE_1GB 0x0000
1020 #define ICBZOPT_RATE_AUTO 0x8000
1021 #define ICBZOPT_RATE_2GB 0x4000
1022 #define ICBZOPT_50_OHM 0x2000
1023 #define ICBZOPT_NO_LOCAL_PLOGI 0x0080
1024 #define ICBZOPT_ENA_OOF 0x0040 /* out of order frame handling */
1025 #define ICBZOPT_RSPSZ_MASK 0x0030
1026 #define ICBZOPT_RSPSZ_24 0x0000
1027 #define ICBZOPT_RSPSZ_12 0x0010
1028 #define ICBZOPT_RSPSZ_24A 0x0020
1029 #define ICBZOPT_RSPSZ_32 0x0030
1030 #define ICBZOPT_SOFTID 0x0002
1031 #define ICBZOPT_ENA_RDXFR_RDY 0x0001
1033 /* 2400 F/W options */
1034 #define ICB2400_OPT1_BOTH_WWNS 0x00004000
1035 #define ICB2400_OPT1_FULL_LOGIN 0x00002000
1036 #define ICB2400_OPT1_PREV_ADDRESS 0x00000800
1037 #define ICB2400_OPT1_SRCHDOWN 0x00000400
1038 #define ICB2400_OPT1_NOLIP 0x00000200
1039 #define ICB2400_OPT1_INI_DISABLE 0x00000020
1040 #define ICB2400_OPT1_TGT_ENABLE 0x00000010
1041 #define ICB2400_OPT1_FULL_DUPLEX 0x00000004
1042 #define ICB2400_OPT1_FAIRNESS 0x00000002
1043 #define ICB2400_OPT1_HARD_ADDRESS 0x00000001
1045 #define ICB2400_OPT2_ENA_ATIOMQ 0x08000000
1046 #define ICB2400_OPT2_ENA_IHA 0x04000000
1047 #define ICB2400_OPT2_QOS 0x02000000
1048 #define ICB2400_OPT2_IOCBS 0x01000000
1049 #define ICB2400_OPT2_ENA_IHR 0x00400000
1050 #define ICB2400_OPT2_ENA_VMS 0x00200000
1051 #define ICB2400_OPT2_ENA_TA 0x00100000
1052 #define ICB2400_OPT2_TPRLIC 0x00004000
1053 #define ICB2400_OPT2_FCTAPE 0x00001000
1054 #define ICB2400_OPT2_FCSP 0x00000800
1055 #define ICB2400_OPT2_CLASS2_ACK0 0x00000200
1056 #define ICB2400_OPT2_CLASS2 0x00000100
1057 #define ICB2400_OPT2_NO_PLAY 0x00000080
1058 #define ICB2400_OPT2_TOPO_MASK 0x00000070
1059 #define ICB2400_OPT2_LOOP_ONLY 0x00000000
1060 #define ICB2400_OPT2_PTP_ONLY 0x00000010
1061 #define ICB2400_OPT2_LOOP_2_PTP 0x00000020
1062 #define ICB2400_OPT2_TIMER_MASK 0x0000000f
1063 #define ICB2400_OPT2_ZIO 0x00000005
1064 #define ICB2400_OPT2_ZIO1 0x00000006
1066 #define ICB2400_OPT3_NO_CTXDIS 0x40000000
1067 #define ICB2400_OPT3_ENA_ETH_RESP 0x08000000
1068 #define ICB2400_OPT3_ENA_ETH_ATIO 0x04000000
1069 #define ICB2400_OPT3_ENA_MFCF 0x00020000
1070 #define ICB2400_OPT3_SKIP_4GB 0x00010000
1071 #define ICB2400_OPT3_RATE_MASK 0x0000E000
1072 #define ICB2400_OPT3_RATE_1GB 0x00000000
1073 #define ICB2400_OPT3_RATE_2GB 0x00002000
1074 #define ICB2400_OPT3_RATE_AUTO 0x00004000
1075 #define ICB2400_OPT3_RATE_4GB 0x00006000
1076 #define ICB2400_OPT3_RATE_8GB 0x00008000
1077 #define ICB2400_OPT3_RATE_16GB 0x0000A000
1078 #define ICB2400_OPT3_RATE_32GB 0x0000C000
1079 #define ICB2400_OPT3_ENA_OOF_XFRDY 0x00000200
1080 #define ICB2400_OPT3_NO_N2N_LOGI 0x00000100
1081 #define ICB2400_OPT3_NO_LOCAL_PLOGI 0x00000080
1082 #define ICB2400_OPT3_ENA_OOF 0x00000040
1083 /* note that a response size flag of zero is reserved! */
1084 #define ICB2400_OPT3_RSPSZ_MASK 0x00000030
1085 #define ICB2400_OPT3_RSPSZ_12 0x00000010
1086 #define ICB2400_OPT3_RSPSZ_24 0x00000020
1087 #define ICB2400_OPT3_RSPSZ_32 0x00000030
1088 #define ICB2400_OPT3_SOFTID 0x00000002
1090 #define ICB_MIN_FRMLEN 256
1091 #define ICB_MAX_FRMLEN 2112
1092 #define ICB_DFLT_FRMLEN 1024
1093 #define ICB_DFLT_ALLOC 256
1094 #define ICB_DFLT_THROTTLE 16
1095 #define ICB_DFLT_RDELAY 5
1096 #define ICB_DFLT_RCOUNT 3
1098 #define ICB_LOGIN_TOV 10
1099 #define ICB_LUN_ENABLE_TOV 15
1103 * And somebody at QLogic had a great idea that you could just change
1104 * the structure *and* keep the version number the same as the other cards.
1107 uint16_t icb_version;
1108 uint16_t icb_reserved0;
1109 uint16_t icb_maxfrmlen;
1110 uint16_t icb_execthrottle;
1111 uint16_t icb_xchgcnt;
1112 uint16_t icb_hardaddr;
1113 uint8_t icb_portname[8];
1114 uint8_t icb_nodename[8];
1115 uint16_t icb_rspnsin;
1116 uint16_t icb_rqstout;
1117 uint16_t icb_retry_count;
1118 uint16_t icb_priout;
1119 uint16_t icb_rsltqlen;
1120 uint16_t icb_rqstqlen;
1121 uint16_t icb_ldn_nols;
1122 uint16_t icb_prqstqlen;
1123 uint16_t icb_rqstaddr[4];
1124 uint16_t icb_respaddr[4];
1125 uint16_t icb_priaddr[4];
1126 uint16_t icb_msixresp;
1127 uint16_t icb_msixatio;
1128 uint16_t icb_reserved1[2];
1129 uint16_t icb_atio_in;
1130 uint16_t icb_atioqlen;
1131 uint16_t icb_atioqaddr[4];
1132 uint16_t icb_idelaytimer;
1133 uint16_t icb_logintime;
1134 uint32_t icb_fwoptions1;
1135 uint32_t icb_fwoptions2;
1136 uint32_t icb_fwoptions3;
1138 uint16_t icb_reserved2[3];
1139 uint16_t icb_enodemac[3];
1140 uint16_t icb_disctime;
1141 uint16_t icb_reserved3[4];
1144 #define RQRSP_ADDR0015 0
1145 #define RQRSP_ADDR1631 1
1146 #define RQRSP_ADDR3247 2
1147 #define RQRSP_ADDR4863 3
1159 #define MAKE_NODE_NAME_FROM_WWN(array, wwn) \
1160 array[ICB_NNM0] = (uint8_t) ((wwn >> 0) & 0xff), \
1161 array[ICB_NNM1] = (uint8_t) ((wwn >> 8) & 0xff), \
1162 array[ICB_NNM2] = (uint8_t) ((wwn >> 16) & 0xff), \
1163 array[ICB_NNM3] = (uint8_t) ((wwn >> 24) & 0xff), \
1164 array[ICB_NNM4] = (uint8_t) ((wwn >> 32) & 0xff), \
1165 array[ICB_NNM5] = (uint8_t) ((wwn >> 40) & 0xff), \
1166 array[ICB_NNM6] = (uint8_t) ((wwn >> 48) & 0xff), \
1167 array[ICB_NNM7] = (uint8_t) ((wwn >> 56) & 0xff)
1169 #define MAKE_WWN_FROM_NODE_NAME(wwn, array) \
1170 wwn = ((uint64_t) array[ICB_NNM0]) | \
1171 ((uint64_t) array[ICB_NNM1] << 8) | \
1172 ((uint64_t) array[ICB_NNM2] << 16) | \
1173 ((uint64_t) array[ICB_NNM3] << 24) | \
1174 ((uint64_t) array[ICB_NNM4] << 32) | \
1175 ((uint64_t) array[ICB_NNM5] << 40) | \
1176 ((uint64_t) array[ICB_NNM6] << 48) | \
1177 ((uint64_t) array[ICB_NNM7] << 56)
1181 * For MULTI_ID firmware, this describes a
1182 * virtual port entity for getting status.
1185 uint16_t vp_port_status;
1186 uint8_t vp_port_options;
1187 uint8_t vp_port_loopid;
1188 uint8_t vp_port_portname[8];
1189 uint8_t vp_port_nodename[8];
1190 uint16_t vp_port_portid_lo; /* not present when trailing icb */
1191 uint16_t vp_port_portid_hi; /* not present when trailing icb */
1194 #define ICB2400_VPOPT_ENA_SNSLOGIN 0x00000040 /* Enable SNS Login and SCR for Virtual Ports */
1195 #define ICB2400_VPOPT_TGT_DISABLE 0x00000020 /* Target Mode Disabled */
1196 #define ICB2400_VPOPT_INI_ENABLE 0x00000010 /* Initiator Mode Enabled */
1197 #define ICB2400_VPOPT_ENABLED 0x00000008 /* VP Enabled */
1198 #define ICB2400_VPOPT_NOPLAY 0x00000004 /* ID Not Acquired */
1199 #define ICB2400_VPOPT_PREV_ADDRESS 0x00000002 /* Previously Assigned ID */
1200 #define ICB2400_VPOPT_HARD_ADDRESS 0x00000001 /* Hard Assigned ID */
1202 #define ICB2400_VPOPT_WRITE_SIZE 20
1205 * For MULTI_ID firmware, we append this structure
1206 * to the isp_icb_2400_t above, followed by a list
1207 * structures that are *most* of the vp_port_info_t.
1211 uint16_t vp_global_options;
1212 } isp_icb_2400_vpinfo_t;
1214 #define ICB2400_VPINFO_OFF 0x80 /* offset from start of ICB */
1215 #define ICB2400_VPINFO_PORT_OFF(chan) \
1216 (ICB2400_VPINFO_OFF + \
1217 sizeof (isp_icb_2400_vpinfo_t) + ((chan) * ICB2400_VPOPT_WRITE_SIZE))
1219 #define ICB2400_VPGOPT_FCA 0x01 /* Assume Clean Address bit in FLOGI ACC set (works only in static configurations) */
1220 #define ICB2400_VPGOPT_MID_DISABLE 0x02 /* when set, connection mode2 will work with NPIV-capable switched */
1221 #define ICB2400_VPGOPT_VP0_DECOUPLE 0x04 /* Allow VP0 decoupling if firmware supports it */
1222 #define ICB2400_VPGOPT_SUSP_FDISK 0x10 /* Suspend FDISC for Enabled VPs */
1223 #define ICB2400_VPGOPT_GEN_RIDA 0x20 /* Generate RIDA if FLOGI Fails */
1226 isphdr_t vp_ctrl_hdr;
1227 uint32_t vp_ctrl_handle;
1228 uint16_t vp_ctrl_index_fail;
1229 uint16_t vp_ctrl_status;
1230 uint16_t vp_ctrl_command;
1231 uint16_t vp_ctrl_vp_count;
1232 uint16_t vp_ctrl_idmap[16];
1233 uint16_t vp_ctrl_reserved[7];
1234 uint16_t vp_ctrl_fcf_index;
1237 #define VP_CTRL_CMD_ENABLE_VP 0x00
1238 #define VP_CTRL_CMD_DISABLE_VP 0x08
1239 #define VP_CTRL_CMD_DISABLE_VP_REINIT_LINK 0x09
1240 #define VP_CTRL_CMD_DISABLE_VP_LOGO 0x0A
1241 #define VP_CTRL_CMD_DISABLE_VP_LOGO_ALL 0x0B
1244 * We can use this structure for modifying either one or two VP ports after initialization
1247 isphdr_t vp_mod_hdr;
1248 uint32_t vp_mod_hdl;
1249 uint16_t vp_mod_reserved0;
1250 uint16_t vp_mod_status;
1253 uint8_t vp_mod_idx0;
1254 uint8_t vp_mod_idx1;
1262 uint8_t vp_mod_reserved2[8];
1265 #define VP_STS_OK 0x00
1266 #define VP_STS_ERR 0x01
1267 #define VP_CNT_ERR 0x02
1268 #define VP_GEN_ERR 0x03
1269 #define VP_IDX_ERR 0x04
1270 #define VP_STS_BSY 0x05
1272 #define VP_MODIFY 0x00
1273 #define VP_MODIFY_ENA 0x01
1274 #define VP_MODIFY_OPT 0x02
1275 #define VP_RESUME 0x03
1278 * Port Data Base Element
1282 uint16_t pdb_options;
1285 uint8_t pdb_hardaddr_bits[4];
1286 uint8_t pdb_portid_bits[4];
1287 uint8_t pdb_nodename[8];
1288 uint8_t pdb_portname[8];
1289 uint16_t pdb_execthrottle;
1290 uint16_t pdb_exec_count;
1291 uint8_t pdb_retry_count;
1292 uint8_t pdb_retry_delay;
1293 uint16_t pdb_resalloc;
1294 uint16_t pdb_curalloc;
1297 uint16_t pdb_tl_next;
1298 uint16_t pdb_tl_last;
1299 uint16_t pdb_features; /* PLOGI, Common Service */
1300 uint16_t pdb_pconcurrnt; /* PLOGI, Common Service */
1301 uint16_t pdb_roi; /* PLOGI, Common Service */
1303 uint8_t pdb_initiator; /* PLOGI, Class 3 Control Flags */
1304 uint16_t pdb_rdsiz; /* PLOGI, Class 3 */
1305 uint16_t pdb_ncseq; /* PLOGI, Class 3 */
1306 uint16_t pdb_noseq; /* PLOGI, Class 3 */
1307 uint16_t pdb_labrtflg;
1308 uint16_t pdb_lstopflg;
1309 uint16_t pdb_sqhead;
1310 uint16_t pdb_sqtail;
1311 uint16_t pdb_ptimer;
1312 uint16_t pdb_nxt_seqid;
1313 uint16_t pdb_fcount;
1314 uint16_t pdb_prli_len;
1315 uint16_t pdb_prli_svc0;
1316 uint16_t pdb_prli_svc3;
1317 uint16_t pdb_loopid;
1318 uint16_t pdb_il_ptr;
1319 uint16_t pdb_sl_ptr;
1322 #define PDB_OPTIONS_XMITTING (1<<11)
1323 #define PDB_OPTIONS_LNKXMIT (1<<10)
1324 #define PDB_OPTIONS_ABORTED (1<<9)
1325 #define PDB_OPTIONS_ADISC (1<<1)
1327 #define PDB_STATE_DISCOVERY 0
1328 #define PDB_STATE_WDISC_ACK 1
1329 #define PDB_STATE_PLOGI 2
1330 #define PDB_STATE_PLOGI_ACK 3
1331 #define PDB_STATE_PRLI 4
1332 #define PDB_STATE_PRLI_ACK 5
1333 #define PDB_STATE_LOGGED_IN 6
1334 #define PDB_STATE_PORT_UNAVAIL 7
1335 #define PDB_STATE_PRLO 8
1336 #define PDB_STATE_PRLO_ACK 9
1337 #define PDB_STATE_PLOGO 10
1338 #define PDB_STATE_PLOG_ACK 11
1340 #define SVC3_ROLE_MASK 0x30
1341 #define SVC3_ROLE_SHIFT 4
1343 #define BITS2WORD(x) ((x)[0] << 16 | (x)[3] << 8 | (x)[2])
1344 #define BITS2WORD_24XX(x) ((x)[0] << 16 | (x)[1] << 8 | (x)[2])
1347 * Port Data Base Element- 24XX cards
1351 uint8_t pdb_curstate;
1352 uint8_t pdb_laststate;
1353 uint8_t pdb_hardaddr_bits[4];
1354 uint8_t pdb_portid_bits[4];
1355 #define pdb_nxt_seqid_2400 pdb_portid_bits[3]
1356 uint16_t pdb_retry_timer;
1357 uint16_t pdb_handle;
1358 uint16_t pdb_rcv_dsize;
1359 uint16_t pdb_reserved0;
1360 uint16_t pdb_prli_svc0;
1361 uint16_t pdb_prli_svc3;
1362 uint8_t pdb_portname[8];
1363 uint8_t pdb_nodename[8];
1364 uint8_t pdb_reserved1[24];
1367 #define PDB2400_TID_SUPPORTED 0x4000
1368 #define PDB2400_FC_TAPE 0x0080
1369 #define PDB2400_CLASS2_ACK0 0x0040
1370 #define PDB2400_FCP_CONF 0x0020
1371 #define PDB2400_CLASS2 0x0010
1372 #define PDB2400_ADDR_VALID 0x0002
1374 #define PDB2400_STATE_PLOGI_PEND 0x03
1375 #define PDB2400_STATE_PLOGI_DONE 0x04
1376 #define PDB2400_STATE_PRLI_PEND 0x05
1377 #define PDB2400_STATE_LOGGED_IN 0x06
1378 #define PDB2400_STATE_PORT_UNAVAIL 0x07
1379 #define PDB2400_STATE_PRLO_PEND 0x09
1380 #define PDB2400_STATE_LOGO_PEND 0x0B
1383 * Common elements from the above two structures that are actually useful to us.
1387 uint16_t prli_word0;
1388 uint16_t prli_word3;
1391 uint8_t portname[8];
1392 uint8_t nodename[8];
1396 * Port/Node Name List Element
1399 uint8_t pnnle_name[8];
1400 uint16_t pnnle_handle;
1401 uint16_t pnnle_reserved;
1404 #define PNNL_OPTIONS_NODE_NAMES (1<<0)
1405 #define PNNL_OPTIONS_PORT_DATA (1<<2)
1406 #define PNNL_OPTIONS_INITIATORS (1<<3)
1409 * Port and N-Port Handle List Element
1412 uint16_t pnhle_port_id_lo;
1413 uint16_t pnhle_port_id_hi_handle;
1417 uint16_t pnhle_port_id_lo;
1418 uint16_t pnhle_port_id_hi;
1419 uint16_t pnhle_handle;
1423 uint16_t pnhle_port_id_lo;
1424 uint16_t pnhle_port_id_hi;
1425 uint16_t pnhle_handle;
1426 uint16_t pnhle_reserved;
1430 * Port Database Changed Async Event information for 24XX cards
1433 #define PDB24XX_AE_GLOBAL 0xFFFF
1436 #define PDB24XX_AE_OK 0x00
1437 #define PDB24XX_AE_IMPL_LOGO_1 0x01
1438 #define PDB24XX_AE_IMPL_LOGO_2 0x02
1439 #define PDB24XX_AE_IMPL_LOGO_3 0x03
1440 #define PDB24XX_AE_PLOGI_RCVD 0x04
1441 #define PDB24XX_AE_PLOGI_RJT 0x05
1442 #define PDB24XX_AE_PRLI_RCVD 0x06
1443 #define PDB24XX_AE_PRLI_RJT 0x07
1444 #define PDB24XX_AE_TPRLO 0x08
1445 #define PDB24XX_AE_TPRLO_RJT 0x09
1446 #define PDB24XX_AE_PRLO_RCVD 0x0a
1447 #define PDB24XX_AE_LOGO_RCVD 0x0b
1448 #define PDB24XX_AE_TOPO_CHG 0x0c
1449 #define PDB24XX_AE_NPORT_CHG 0x0d
1450 #define PDB24XX_AE_FLOGI_RJT 0x0e
1451 #define PDB24XX_AE_BAD_FANN 0x0f
1452 #define PDB24XX_AE_FLOGI_TIMO 0x10
1453 #define PDB24XX_AE_ABX_LOGO 0x11
1454 #define PDB24XX_AE_PLOGI_DONE 0x12
1455 #define PDB24XX_AE_PRLI_DONE 0x13
1456 #define PDB24XX_AE_OPN_1 0x14
1457 #define PDB24XX_AE_OPN_2 0x15
1458 #define PDB24XX_AE_TXERR 0x16
1459 #define PDB24XX_AE_FORCED_LOGO 0x17
1460 #define PDB24XX_AE_DISC_TIMO 0x18
1463 * Genericized Port Login/Logout software structure
1472 /* the flags to use are those for PLOGX_FLG_* below */
1475 * ISP24XX- Login/Logout Port IOCB
1478 isphdr_t plogx_header;
1479 uint32_t plogx_handle;
1480 uint16_t plogx_status;
1481 uint16_t plogx_nphdl;
1482 uint16_t plogx_flags;
1483 uint16_t plogx_vphdl; /* low 8 bits */
1484 uint16_t plogx_portlo; /* low 16 bits */
1485 uint16_t plogx_rspsz_porthi;
1492 #define PLOGX_STATUS_OK 0x00
1493 #define PLOGX_STATUS_UNAVAIL 0x28
1494 #define PLOGX_STATUS_LOGOUT 0x29
1495 #define PLOGX_STATUS_IOCBERR 0x31
1497 #define PLOGX_IOCBERR_NOLINK 0x01
1498 #define PLOGX_IOCBERR_NOIOCB 0x02
1499 #define PLOGX_IOCBERR_NOXGHG 0x03
1500 #define PLOGX_IOCBERR_FAILED 0x04 /* further info in IOPARM 1 */
1501 #define PLOGX_IOCBERR_NOFABRIC 0x05
1502 #define PLOGX_IOCBERR_NOTREADY 0x07
1503 #define PLOGX_IOCBERR_NOLOGIN 0x09 /* further info in IOPARM 1 */
1504 #define PLOGX_IOCBERR_NOPCB 0x0a
1505 #define PLOGX_IOCBERR_REJECT 0x18 /* further info in IOPARM 1 */
1506 #define PLOGX_IOCBERR_EINVAL 0x19 /* further info in IOPARM 1 */
1507 #define PLOGX_IOCBERR_PORTUSED 0x1a /* further info in IOPARM 1 */
1508 #define PLOGX_IOCBERR_HNDLUSED 0x1b /* further info in IOPARM 1 */
1509 #define PLOGX_IOCBERR_NOHANDLE 0x1c
1510 #define PLOGX_IOCBERR_NOFLOGI 0x1f /* further info in IOPARM 1 */
1512 #define PLOGX_FLG_CMD_MASK 0xf
1513 #define PLOGX_FLG_CMD_PLOGI 0
1514 #define PLOGX_FLG_CMD_PRLI 1
1515 #define PLOGX_FLG_CMD_PDISC 2
1516 #define PLOGX_FLG_CMD_LOGO 8
1517 #define PLOGX_FLG_CMD_PRLO 9
1518 #define PLOGX_FLG_CMD_TPRLO 10
1520 #define PLOGX_FLG_COND_PLOGI 0x10 /* if with PLOGI */
1521 #define PLOGX_FLG_IMPLICIT 0x10 /* if with LOGO, PRLO, TPRLO */
1522 #define PLOGX_FLG_SKIP_PRLI 0x20 /* if with PLOGI */
1523 #define PLOGX_FLG_IMPLICIT_LOGO_ALL 0x20 /* if with LOGO */
1524 #define PLOGX_FLG_EXPLICIT_LOGO 0x40 /* if with LOGO */
1525 #define PLOGX_FLG_COMMON_FEATURES 0x80 /* if with PLOGI */
1526 #define PLOGX_FLG_FREE_NPHDL 0x80 /* if with with LOGO */
1528 #define PLOGX_FLG_CLASS2 0x100 /* if with PLOGI */
1529 #define PLOGX_FLG_FCP2_OVERRIDE 0x200 /* if with PRLOG, PRLI */
1532 * Report ID Acquisistion (24XX multi-id firmware)
1535 isphdr_t ridacq_hdr;
1536 uint32_t ridacq_handle;
1537 uint8_t ridacq_vp_acquired;
1538 uint8_t ridacq_vp_setup;
1539 uint8_t ridacq_vp_index;
1540 uint8_t ridacq_vp_status;
1541 uint16_t ridacq_vp_port_lo;
1542 uint8_t ridacq_vp_port_hi;
1543 uint8_t ridacq_format; /* 0 or 1 */
1544 uint16_t ridacq_map[8];
1545 uint8_t ridacq_reserved1[32];
1548 #define RIDACQ_STS_COMPLETE 0
1549 #define RIDACQ_STS_UNACQUIRED 1
1550 #define RIDACQ_STS_CHANGED 2
1551 #define RIDACQ_STS_SNS_TIMEOUT 3
1552 #define RIDACQ_STS_SNS_REJECTED 4
1553 #define RIDACQ_STS_SCR_TIMEOUT 5
1554 #define RIDACQ_STS_SCR_REJECTED 6
1557 * Simple Name Server Data Structures
1559 #define SNS_GA_NXT 0x100
1560 #define SNS_GPN_ID 0x112
1561 #define SNS_GNN_ID 0x113
1562 #define SNS_GFT_ID 0x117
1563 #define SNS_GFF_ID 0x11F
1564 #define SNS_GID_FT 0x171
1565 #define SNS_GID_PT 0x1A1
1566 #define SNS_RFT_ID 0x217
1567 #define SNS_RSPN_ID 0x218
1568 #define SNS_RFF_ID 0x21F
1569 #define SNS_RSNN_NN 0x239
1571 uint16_t snscb_rblen; /* response buffer length (words) */
1572 uint16_t snscb_reserved0;
1573 uint16_t snscb_addr[4]; /* response buffer address */
1574 uint16_t snscb_sblen; /* subcommand buffer length (words) */
1575 uint16_t snscb_reserved1;
1576 uint16_t snscb_data[]; /* variable data */
1577 } sns_screq_t; /* Subcommand Request Structure */
1580 uint16_t snscb_rblen; /* response buffer length (words) */
1581 uint16_t snscb_reserved0;
1582 uint16_t snscb_addr[4]; /* response buffer address */
1583 uint16_t snscb_sblen; /* subcommand buffer length (words) */
1584 uint16_t snscb_reserved1;
1586 uint16_t snscb_reserved2;
1587 uint32_t snscb_reserved3;
1588 uint32_t snscb_port;
1590 #define SNS_GA_NXT_REQ_SIZE (sizeof (sns_ga_nxt_req_t))
1592 typedef struct { /* Used for GFT_ID, GFF_ID, etc. */
1593 uint16_t snscb_rblen; /* response buffer length (words) */
1594 uint16_t snscb_reserved0;
1595 uint16_t snscb_addr[4]; /* response buffer address */
1596 uint16_t snscb_sblen; /* subcommand buffer length (words) */
1597 uint16_t snscb_reserved1;
1599 uint16_t snscb_mword_div_2;
1600 uint32_t snscb_reserved3;
1601 uint32_t snscb_portid;
1603 #define SNS_GXX_ID_REQ_SIZE (sizeof (sns_gxx_id_req_t))
1606 uint16_t snscb_rblen; /* response buffer length (words) */
1607 uint16_t snscb_reserved0;
1608 uint16_t snscb_addr[4]; /* response buffer address */
1609 uint16_t snscb_sblen; /* subcommand buffer length (words) */
1610 uint16_t snscb_reserved1;
1612 uint16_t snscb_mword_div_2;
1613 uint32_t snscb_reserved3;
1614 uint32_t snscb_fc4_type;
1616 #define SNS_GID_FT_REQ_SIZE (sizeof (sns_gid_ft_req_t))
1619 uint16_t snscb_rblen; /* response buffer length (words) */
1620 uint16_t snscb_reserved0;
1621 uint16_t snscb_addr[4]; /* response buffer address */
1622 uint16_t snscb_sblen; /* subcommand buffer length (words) */
1623 uint16_t snscb_reserved1;
1625 uint16_t snscb_mword_div_2;
1626 uint32_t snscb_reserved3;
1627 uint8_t snscb_port_type;
1628 uint8_t snscb_domain;
1630 uint8_t snscb_flags;
1632 #define SNS_GID_PT_REQ_SIZE (sizeof (sns_gid_pt_req_t))
1635 uint16_t snscb_rblen; /* response buffer length (words) */
1636 uint16_t snscb_reserved0;
1637 uint16_t snscb_addr[4]; /* response buffer address */
1638 uint16_t snscb_sblen; /* subcommand buffer length (words) */
1639 uint16_t snscb_reserved1;
1641 uint16_t snscb_reserved2;
1642 uint32_t snscb_reserved3;
1643 uint32_t snscb_port;
1644 uint32_t snscb_fc4_types[8];
1646 #define SNS_RFT_ID_REQ_SIZE (sizeof (sns_rft_id_req_t))
1649 ct_hdr_t snscb_cthdr;
1650 uint8_t snscb_port_type;
1651 uint8_t snscb_port_id[3];
1652 uint8_t snscb_portname[8];
1653 uint16_t snscb_data[]; /* variable data */
1654 } sns_scrsp_t; /* Subcommand Response Structure */
1657 ct_hdr_t snscb_cthdr;
1658 uint8_t snscb_port_type;
1659 uint8_t snscb_port_id[3];
1660 uint8_t snscb_portname[8];
1661 uint8_t snscb_pnlen; /* symbolic port name length */
1662 uint8_t snscb_pname[255]; /* symbolic port name */
1663 uint8_t snscb_nodename[8];
1664 uint8_t snscb_nnlen; /* symbolic node name length */
1665 uint8_t snscb_nname[255]; /* symbolic node name */
1666 uint8_t snscb_ipassoc[8];
1667 uint8_t snscb_ipaddr[16];
1668 uint8_t snscb_svc_class[4];
1669 uint8_t snscb_fc4_types[32];
1670 uint8_t snscb_fpname[8];
1671 uint8_t snscb_reserved;
1672 uint8_t snscb_hardaddr[3];
1673 } sns_ga_nxt_rsp_t; /* Subcommand Response Structure */
1674 #define SNS_GA_NXT_RESP_SIZE (sizeof (sns_ga_nxt_rsp_t))
1677 ct_hdr_t snscb_cthdr;
1678 uint8_t snscb_wwn[8];
1680 #define SNS_GXN_ID_RESP_SIZE (sizeof (sns_gxn_id_rsp_t))
1683 ct_hdr_t snscb_cthdr;
1684 uint32_t snscb_fc4_types[8];
1686 #define SNS_GFT_ID_RESP_SIZE (sizeof (sns_gft_id_rsp_t))
1689 ct_hdr_t snscb_cthdr;
1690 uint32_t snscb_fc4_features[32];
1692 #define SNS_GFF_ID_RESP_SIZE (sizeof (sns_gff_id_rsp_t))
1694 typedef struct { /* Used for GID_FT, GID_PT, etc. */
1695 ct_hdr_t snscb_cthdr;
1701 #define SNS_GID_XX_RESP_SIZE(x) ((sizeof (sns_gid_xx_rsp_t)) + ((x - 1) << 2))
1704 * Other Misc Structures
1707 /* ELS Pass Through */
1710 uint32_t els_handle;
1711 uint16_t els_status;
1713 uint16_t els_xmit_dsd_count; /* outgoing only */
1717 uint16_t els_recv_dsd_count; /* outgoing only */
1719 uint8_t els_reserved1;
1721 uint8_t els_did_mid;
1723 uint8_t els_reserved2;
1724 uint16_t els_reserved3;
1725 uint16_t els_ctl_flags;
1728 uint32_t _els_bytecnt;
1729 uint32_t _els_subcode1;
1730 uint32_t _els_subcode2;
1731 uint8_t _els_reserved4[20];
1734 uint32_t _els_recv_bytecnt;
1735 uint32_t _els_xmit_bytecnt;
1736 uint32_t _els_xmit_dsd_length;
1737 uint16_t _els_xmit_dsd_a1500;
1738 uint16_t _els_xmit_dsd_a3116;
1739 uint16_t _els_xmit_dsd_a4732;
1740 uint16_t _els_xmit_dsd_a6348;
1741 uint32_t _els_recv_dsd_length;
1742 uint16_t _els_recv_dsd_a1500;
1743 uint16_t _els_recv_dsd_a3116;
1744 uint16_t _els_recv_dsd_a4732;
1745 uint16_t _els_recv_dsd_a6348;
1748 #define els_bytecnt inout.in._els_bytecnt
1749 #define els_subcode1 inout.in._els_subcode1
1750 #define els_subcode2 inout.in._els_subcode2
1751 #define els_reserved4 inout.in._els_reserved4
1752 #define els_recv_bytecnt inout.out._els_recv_bytecnt
1753 #define els_xmit_bytecnt inout.out._els_xmit_bytecnt
1754 #define els_xmit_dsd_length inout.out._els_xmit_dsd_length
1755 #define els_xmit_dsd_a1500 inout.out._els_xmit_dsd_a1500
1756 #define els_xmit_dsd_a3116 inout.out._els_xmit_dsd_a3116
1757 #define els_xmit_dsd_a4732 inout.out._els_xmit_dsd_a4732
1758 #define els_xmit_dsd_a6348 inout.out._els_xmit_dsd_a6348
1759 #define els_recv_dsd_length inout.out._els_recv_dsd_length
1760 #define els_recv_dsd_a1500 inout.out._els_recv_dsd_a1500
1761 #define els_recv_dsd_a3116 inout.out._els_recv_dsd_a3116
1762 #define els_recv_dsd_a4732 inout.out._els_recv_dsd_a4732
1763 #define els_recv_dsd_a6348 inout.out._els_recv_dsd_a6348
1767 * A handy package structure for running FC-SCSI commands internally
1778 uint32_t data_length;
1786 uint32_t data_residual;
1789 uint16_t sense_length;
1790 uint8_t sense_data[32];
1796 * Target Mode related definitions
1798 #define QLTM_SENSELEN 18 /* non-FC cards only */
1799 #define QLTM_SVALID 0x80
1802 * Structure for Enable Lun and Modify Lun queue entries
1806 uint32_t le_reserved;
1809 uint8_t le_ops; /* Modify LUN only */
1810 uint8_t le_tgt; /* Not for FC */
1811 uint32_t le_flags; /* Not for FC */
1813 uint8_t le_reserved2;
1814 uint8_t le_cmd_count;
1815 uint8_t le_in_count;
1816 uint8_t le_cdb6len; /* Not for FC */
1817 uint8_t le_cdb7len; /* Not for FC */
1818 uint16_t le_timeout;
1819 uint16_t le_reserved3[20];
1825 #define LUN_TQAE 0x00000002 /* bit1 Tagged Queue Action Enable */
1826 #define LUN_DSSM 0x01000000 /* bit24 Disable Sending SDP Message */
1827 #define LUN_DISAD 0x02000000 /* bit25 Disable autodisconnect */
1828 #define LUN_DM 0x40000000 /* bit30 Disconnects Mandatory */
1833 #define LUN_CCINCR 0x01 /* increment command count */
1834 #define LUN_CCDECR 0x02 /* decrement command count */
1835 #define LUN_ININCR 0x40 /* increment immed. notify count */
1836 #define LUN_INDECR 0x80 /* decrement immed. notify count */
1841 #define LUN_OK 0x01 /* we be rockin' */
1842 #define LUN_ERR 0x04 /* request completed with error */
1843 #define LUN_INVAL 0x06 /* invalid request */
1844 #define LUN_NOCAP 0x16 /* can't provide requested capability */
1845 #define LUN_ENABLED 0x3E /* LUN already enabled */
1848 * Immediate Notify Entry structure
1850 #define IN_MSGLEN 8 /* 8 bytes */
1851 #define IN_RSVDLEN 8 /* 8 words */
1854 uint32_t in_reserved;
1855 uint8_t in_lun; /* lun */
1856 uint8_t in_iid; /* initiator */
1857 uint8_t in_reserved2;
1858 uint8_t in_tgt; /* target */
1862 uint8_t in_tag_val; /* tag value */
1863 uint8_t in_tag_type; /* tag type */
1864 uint16_t in_seqid; /* sequence id */
1865 uint8_t in_msg[IN_MSGLEN]; /* SCSI message bytes */
1866 uint16_t in_reserved3[IN_RSVDLEN];
1867 uint8_t in_sense[QLTM_SENSELEN];/* suggested sense data */
1872 uint32_t in_reserved;
1873 uint8_t in_lun; /* lun */
1874 uint8_t in_iid; /* initiator */
1876 uint32_t in_reserved2;
1878 uint16_t in_task_flags;
1879 uint16_t in_seqid; /* sequence id */
1884 uint32_t in_reserved;
1885 uint16_t in_iid; /* initiator */
1887 uint32_t in_reserved2;
1889 uint16_t in_task_flags;
1890 uint16_t in_seqid; /* sequence id */
1894 * Values for the in_status field
1896 #define IN_REJECT 0x0D /* Message Reject message received */
1897 #define IN_RESET 0x0E /* Bus Reset occurred */
1898 #define IN_NO_RCAP 0x16 /* requested capability not available */
1899 #define IN_IDE_RECEIVED 0x33 /* Initiator Detected Error msg received */
1900 #define IN_RSRC_UNAVAIL 0x34 /* resource unavailable */
1901 #define IN_MSG_RECEIVED 0x36 /* SCSI message received */
1902 #define IN_ABORT_TASK 0x20 /* task named in RX_ID is being aborted (FC) */
1903 #define IN_PORT_LOGOUT 0x29 /* port has logged out (FC) */
1904 #define IN_PORT_CHANGED 0x2A /* port changed */
1905 #define IN_GLOBAL_LOGO 0x2E /* all ports logged out */
1906 #define IN_NO_NEXUS 0x3B /* Nexus not established */
1907 #define IN_SRR_RCVD 0x45 /* SRR received */
1910 * Values for the in_task_flags field- should only get one at a time!
1912 #define TASK_FLAGS_RESERVED_MASK (0xe700)
1913 #define TASK_FLAGS_CLEAR_ACA (1<<14)
1914 #define TASK_FLAGS_TARGET_RESET (1<<13)
1915 #define TASK_FLAGS_LUN_RESET (1<<12)
1916 #define TASK_FLAGS_CLEAR_TASK_SET (1<<10)
1917 #define TASK_FLAGS_ABORT_TASK_SET (1<<9)
1920 * ISP24XX Immediate Notify
1924 uint32_t in_reserved;
1926 uint16_t in_reserved1;
1928 uint16_t in_srr_rxid;
1930 uint8_t in_status_subcode;
1931 uint8_t in_fwhandle;
1933 uint16_t in_srr_reloff_lo;
1934 uint16_t in_srr_reloff_hi;
1936 uint16_t in_srr_oxid;
1938 * If bit 2 is set in in_flags, the N-Port and
1939 * handle tags are valid. If the received ELS is
1940 * a LOGO, then these tags contain the N Port ID
1941 * from the LOGO payload. If the received ELS
1942 * request is TPRLO, these tags contain the
1943 * Third Party Originator N Port ID.
1945 uint16_t in_nport_id_hi;
1946 #define in_prli_options in_nport_id_hi
1947 uint8_t in_nport_id_lo;
1948 uint8_t in_reserved3;
1949 uint16_t in_np_handle;
1950 uint8_t in_reserved4[12];
1951 uint8_t in_reserved5;
1953 uint32_t in_reserved6;
1954 uint16_t in_portid_lo;
1955 uint8_t in_portid_hi;
1956 uint8_t in_reserved7;
1957 uint16_t in_reserved8;
1959 } in_fcentry_24xx_t;
1961 #define IN24XX_FLAG_PUREX_IOCB 0x1
1962 #define IN24XX_FLAG_GLOBAL_LOGOUT 0x2
1963 #define IN24XX_FLAG_NPHDL_VALID 0x4
1964 #define IN24XX_FLAG_N2N_PRLI 0x8
1965 #define IN24XX_FLAG_PN_NN_VALID 0x10
1967 #define IN24XX_LIP_RESET 0x0E
1968 #define IN24XX_LINK_RESET 0x0F
1969 #define IN24XX_PORT_LOGOUT 0x29
1970 #define IN24XX_PORT_CHANGED 0x2A
1971 #define IN24XX_LINK_FAILED 0x2E
1972 #define IN24XX_SRR_RCVD 0x45
1973 #define IN24XX_ELS_RCVD 0x46 /*
1974 * login-affectin ELS received- check
1975 * subcode for specific opcode
1979 * For f/w > 4.0.25, these offsets in the Immediate Notify contain
1980 * the WWNN/WWPN if the ELS is PLOGI, PDISC or ADISC. The WWN is in
1981 * Big Endian format.
1983 #define IN24XX_PRLI_WWNN_OFF 0x18
1984 #define IN24XX_PRLI_WWPN_OFF 0x28
1985 #define IN24XX_PLOGI_WWNN_OFF 0x20
1986 #define IN24XX_PLOGI_WWPN_OFF 0x28
1989 * For f/w > 4.0.25, this offset in the Immediate Notify contain
1990 * the WWPN if the ELS is LOGO. The WWN is in Big Endian format.
1992 #define IN24XX_LOGO_WWPN_OFF 0x28
1995 * Immediate Notify Status Subcodes for IN24XX_PORT_LOGOUT
1997 #define IN24XX_PORT_LOGOUT_PDISC_TMO 0x00
1998 #define IN24XX_PORT_LOGOUT_UXPR_DISC 0x01
1999 #define IN24XX_PORT_LOGOUT_OWN_OPN 0x02
2000 #define IN24XX_PORT_LOGOUT_OWN_OPN_SFT 0x03
2001 #define IN24XX_PORT_LOGOUT_ABTS_TMO 0x04
2002 #define IN24XX_PORT_LOGOUT_DISC_RJT 0x05
2003 #define IN24XX_PORT_LOGOUT_LOGIN_NEEDED 0x06
2004 #define IN24XX_PORT_LOGOUT_BAD_DISC 0x07
2005 #define IN24XX_PORT_LOGOUT_LOST_ALPA 0x08
2006 #define IN24XX_PORT_LOGOUT_XMIT_FAILURE 0x09
2009 * Immediate Notify Status Subcodes for IN24XX_PORT_CHANGED
2011 #define IN24XX_PORT_CHANGED_BADFAN 0x00
2012 #define IN24XX_PORT_CHANGED_TOPO_CHANGE 0x01
2013 #define IN24XX_PORT_CHANGED_FLOGI_ACC 0x02
2014 #define IN24XX_PORT_CHANGED_FLOGI_RJT 0x03
2015 #define IN24XX_PORT_CHANGED_TIMEOUT 0x04
2016 #define IN24XX_PORT_CHANGED_PORT_CHANGE 0x05
2019 * Notify Acknowledge Entry structure
2021 #define NA_RSVDLEN 22
2024 uint32_t na_reserved;
2025 uint8_t na_lun; /* lun */
2026 uint8_t na_iid; /* initiator */
2027 uint8_t na_reserved2;
2028 uint8_t na_tgt; /* target */
2032 uint16_t na_seqid; /* sequence id */
2033 uint16_t na_reserved3[NA_RSVDLEN];
2037 * Value for the na_event field
2039 #define NA_RST_CLRD 0x80 /* Clear an async event notification */
2040 #define NA_OK 0x01 /* Notify Acknowledge Succeeded */
2041 #define NA_INVALID 0x06 /* Invalid Notify Acknowledge */
2043 #define NA2_RSVDLEN 21
2046 uint32_t na_reserved;
2047 uint8_t na_reserved1;
2048 uint8_t na_iid; /* initiator loop id */
2049 uint16_t na_response;
2051 uint16_t na_reserved2;
2053 uint16_t na_task_flags;
2054 uint16_t na_seqid; /* sequence id */
2055 uint16_t na_reserved3[NA2_RSVDLEN];
2060 uint32_t na_reserved;
2061 uint16_t na_iid; /* initiator loop id */
2062 uint16_t na_response; /* response code */
2064 uint16_t na_reserved2;
2066 uint16_t na_task_flags;
2067 uint16_t na_seqid; /* sequence id */
2068 uint16_t na_reserved3[NA2_RSVDLEN];
2071 #define NAFC_RCOUNT 0x80 /* increment resource count */
2072 #define NAFC_RST_CLRD 0x20 /* Clear LIP Reset */
2073 #define NAFC_TVALID 0x10 /* task mangement response code is valid */
2076 * ISP24XX Notify Acknowledge
2083 uint16_t na_reserved1;
2085 uint16_t na_srr_rxid;
2087 uint8_t na_status_subcode;
2088 uint8_t na_fwhandle;
2090 uint16_t na_srr_reloff_lo;
2091 uint16_t na_srr_reloff_hi;
2093 uint16_t na_srr_flags;
2094 uint8_t na_reserved3[18];
2095 uint8_t na_reserved4;
2097 uint8_t na_srr_reject_vunique;
2098 uint8_t na_srr_reject_explanation;
2099 uint8_t na_srr_reject_code;
2100 uint8_t na_reserved5;
2101 uint8_t na_reserved6[6];
2103 } na_fcentry_24xx_t;
2106 * Accept Target I/O Entry structure
2108 #define ATIO_CDBLEN 26
2112 uint16_t at_reserved;
2114 uint8_t at_lun; /* lun */
2115 uint8_t at_iid; /* initiator */
2116 uint8_t at_cdblen; /* cdb length */
2117 uint8_t at_tgt; /* target */
2119 uint8_t at_status; /* firmware status */
2120 uint8_t at_scsi_status; /* scsi status */
2121 uint8_t at_tag_val; /* tag value */
2122 uint8_t at_tag_type; /* tag type */
2123 uint8_t at_cdb[ATIO_CDBLEN]; /* received CDB */
2124 uint8_t at_sense[QLTM_SENSELEN];/* suggested sense data */
2130 #define AT_NODISC 0x00008000 /* disconnect disabled */
2131 #define AT_TQAE 0x00000002 /* Tagged Queue Action enabled */
2136 #define AT_PATH_INVALID 0x07 /* ATIO sent to firmware for disabled lun */
2137 #define AT_RESET 0x0E /* SCSI Bus Reset Occurred */
2138 #define AT_PHASE_ERROR 0x14 /* Bus phase sequence error */
2139 #define AT_NOCAP 0x16 /* Requested capability not available */
2140 #define AT_BDR_MSG 0x17 /* Bus Device Reset msg received */
2141 #define AT_CDB 0x3D /* CDB received */
2143 * Macros to create and fetch and test concatenated handle and tag value macros
2146 #define AT_MAKE_TAGID(tid, aep) \
2147 tid = aep->at_handle; \
2148 if (aep->at_flags & AT_TQAE) { \
2149 tid |= (aep->at_tag_val << 16); \
2153 #define CT_MAKE_TAGID(tid, ct) \
2154 tid = ct->ct_fwhandle; \
2155 if (ct->ct_flags & CT_TQAE) { \
2156 tid |= (ct->ct_tag_val << 16); \
2160 #define AT_HAS_TAG(val) ((val) & (1 << 24))
2161 #define AT_GET_TAG(val) (((val) >> 16) & 0xff)
2162 #define AT_GET_HANDLE(val) ((val) & 0xffff)
2164 #define IN_MAKE_TAGID(tid, inp) \
2165 tid = inp->in_seqid; \
2166 tid |= (inp->in_tag_val << 16); \
2170 * Accept Target I/O Entry structure, Type 2
2172 #define ATIO2_CDBLEN 16
2176 uint32_t at_reserved;
2177 uint8_t at_lun; /* lun or reserved */
2178 uint8_t at_iid; /* initiator */
2179 uint16_t at_rxid; /* response ID */
2181 uint16_t at_status; /* firmware status */
2182 uint8_t at_crn; /* command reference number */
2183 uint8_t at_taskcodes;
2184 uint8_t at_taskflags;
2185 uint8_t at_execodes;
2186 uint8_t at_cdb[ATIO2_CDBLEN]; /* received CDB */
2187 uint32_t at_datalen; /* allocated data len */
2188 uint16_t at_scclun; /* SCC Lun or reserved */
2189 uint16_t at_wwpn[4]; /* WWPN of initiator */
2190 uint16_t at_reserved2[6];
2196 uint32_t at_reserved;
2197 uint16_t at_iid; /* initiator */
2198 uint16_t at_rxid; /* response ID */
2200 uint16_t at_status; /* firmware status */
2201 uint8_t at_crn; /* command reference number */
2202 uint8_t at_taskcodes;
2203 uint8_t at_taskflags;
2204 uint8_t at_execodes;
2205 uint8_t at_cdb[ATIO2_CDBLEN]; /* received CDB */
2206 uint32_t at_datalen; /* allocated data len */
2207 uint16_t at_scclun; /* SCC Lun or reserved */
2208 uint16_t at_wwpn[4]; /* WWPN of initiator */
2209 uint16_t at_reserved2[6];
2213 #define ATIO2_WWPN_OFFSET 0x2A
2214 #define ATIO2_OXID_OFFSET 0x3E
2216 #define ATIO2_TC_ATTR_MASK 0x7
2217 #define ATIO2_TC_ATTR_SIMPLEQ 0
2218 #define ATIO2_TC_ATTR_HEADOFQ 1
2219 #define ATIO2_TC_ATTR_ORDERED 2
2220 #define ATIO2_TC_ATTR_ACAQ 4
2221 #define ATIO2_TC_ATTR_UNTAGGED 5
2223 #define ATIO2_EX_WRITE 0x1
2224 #define ATIO2_EX_READ 0x2
2226 * Macros to create and fetch and test concatenated handle and tag value macros
2228 #define AT2_MAKE_TAGID(tid, bus, inst, aep) \
2229 tid = aep->at_rxid; \
2230 tid |= (((uint64_t)inst) << 32); \
2231 tid |= (((uint64_t)bus) << 48)
2233 #define CT2_MAKE_TAGID(tid, bus, inst, ct) \
2234 tid = ct->ct_rxid; \
2235 tid |= (((uint64_t)inst) << 32); \
2236 tid |= (((uint64_t)(bus & 0xff)) << 48)
2238 #define AT2_HAS_TAG(val) 1
2239 #define AT2_GET_TAG(val) ((val) & 0xffffffff)
2240 #define AT2_GET_INST(val) (((val) >> 32) & 0xffff)
2241 #define AT2_GET_HANDLE AT2_GET_TAG
2242 #define AT2_GET_BUS(val) (((val) >> 48) & 0xff)
2244 #define FC_HAS_TAG AT2_HAS_TAG
2245 #define FC_GET_TAG AT2_GET_TAG
2246 #define FC_GET_INST AT2_GET_INST
2247 #define FC_GET_HANDLE AT2_GET_HANDLE
2249 #define IN_FC_MAKE_TAGID(tid, bus, inst, seqid) \
2251 tid |= (((uint64_t)inst) << 32); \
2252 tid |= (((uint64_t)(bus & 0xff)) << 48)
2254 #define FC_TAG_INSERT_INST(tid, inst) \
2255 tid &= ~0x0000ffff00000000ull; \
2256 tid |= (((uint64_t)inst) << 32)
2259 * 24XX ATIO Definition
2261 * This is *quite* different from other entry types.
2262 * First of all, it has its own queue it comes in on.
2264 * Secondly, it doesn't have a normal header.
2266 * Thirdly, it's just a passthru of the FCP CMND IU
2267 * which is recorded in big endian mode.
2273 * Task attribute in high four bits,
2274 * the rest is the FCP CMND IU Length.
2275 * NB: the command can extend past the
2276 * length for a single queue entry.
2281 fcp_cmnd_iu_t at_cmnd;
2283 #define AT7_NORESRC_RXID 0xffffffff
2287 * Continue Target I/O Entry structure
2288 * Request from driver. The response from the
2289 * ISP firmware is the same except that the last 18
2290 * bytes are overwritten by suggested sense data if
2291 * the 'autosense valid' bit is set in the status byte.
2295 uint16_t ct_syshandle;
2296 uint16_t ct_fwhandle; /* required by f/w */
2297 uint8_t ct_lun; /* lun */
2298 uint8_t ct_iid; /* initiator id */
2299 uint8_t ct_reserved2;
2300 uint8_t ct_tgt; /* our target id */
2302 uint8_t ct_status; /* isp status */
2303 uint8_t ct_scsi_status; /* scsi status */
2304 uint8_t ct_tag_val; /* tag value */
2305 uint8_t ct_tag_type; /* tag type */
2306 uint32_t ct_xfrlen; /* transfer length */
2307 uint32_t ct_resid; /* residual length */
2308 uint16_t ct_timeout;
2309 uint16_t ct_seg_count;
2310 ispds_t ct_dataseg[ISP_RQDSEG];
2314 * For some of the dual port SCSI adapters, port (bus #) is reported
2315 * in the MSbit of ct_iid. Bit fields are a bit too awkward here.
2317 * Note that this does not apply to FC adapters at all which can and
2318 * do report IIDs between 0x81 && 0xfe (or 0x7ff) which represent devices
2319 * that have logged in across a SCSI fabric.
2321 #define GET_IID_VAL(x) (x & 0x3f)
2322 #define GET_BUS_VAL(x) ((x >> 7) & 0x1)
2323 #define SET_IID_VAL(y, x) y = ((y & ~0x3f) | (x & 0x3f))
2324 #define SET_BUS_VAL(y, x) y = ((y & 0x3f) | ((x & 0x1) << 7))
2329 #define CT_TQAE 0x00000002 /* bit 1, Tagged Queue Action enable */
2330 #define CT_DATA_IN 0x00000040 /* bits 6&7, Data direction - *to* initiator */
2331 #define CT_DATA_OUT 0x00000080 /* bits 6&7, Data direction - *from* initiator */
2332 #define CT_NO_DATA 0x000000C0 /* bits 6&7, Data direction */
2333 #define CT_CCINCR 0x00000100 /* bit 8, autoincrement atio count */
2334 #define CT_DATAMASK 0x000000C0 /* bits 6&7, Data direction */
2335 #define CT_INISYNCWIDE 0x00004000 /* bit 14, Do Sync/Wide Negotiation */
2336 #define CT_NODISC 0x00008000 /* bit 15, Disconnects disabled */
2337 #define CT_DSDP 0x01000000 /* bit 24, Disable Save Data Pointers */
2338 #define CT_SENDRDP 0x04000000 /* bit 26, Send Restore Pointers msg */
2339 #define CT_SENDSTATUS 0x80000000 /* bit 31, Send SCSI status byte */
2343 * - set by the firmware when it returns the CTIO
2345 #define CT_OK 0x01 /* completed without error */
2346 #define CT_ABORTED 0x02 /* aborted by host */
2347 #define CT_ERR 0x04 /* see sense data for error */
2348 #define CT_INVAL 0x06 /* request for disabled lun */
2349 #define CT_NOPATH 0x07 /* invalid ITL nexus */
2350 #define CT_INVRXID 0x08 /* (FC only) Invalid RX_ID */
2351 #define CT_DATA_OVER 0x09 /* (FC only) Data Overrun */
2352 #define CT_RSELTMO 0x0A /* reselection timeout after 2 tries */
2353 #define CT_TIMEOUT 0x0B /* timed out */
2354 #define CT_RESET 0x0E /* SCSI Bus Reset occurred */
2355 #define CT_PARITY 0x0F /* Uncorrectable Parity Error */
2356 #define CT_BUS_ERROR 0x10 /* (FC Only) DMA PCI Error */
2357 #define CT_PANIC 0x13 /* Unrecoverable Error */
2358 #define CT_PHASE_ERROR 0x14 /* Bus phase sequence error */
2359 #define CT_DATA_UNDER 0x15 /* (FC only) Data Underrun */
2360 #define CT_BDR_MSG 0x17 /* Bus Device Reset msg received */
2361 #define CT_TERMINATED 0x19 /* due to Terminate Transfer mbox cmd */
2362 #define CT_PORTUNAVAIL 0x28 /* port not available */
2363 #define CT_LOGOUT 0x29 /* port logout */
2364 #define CT_PORTCHANGED 0x2A /* port changed */
2365 #define CT_IDE 0x33 /* Initiator Detected Error */
2366 #define CT_NOACK 0x35 /* Outstanding Immed. Notify. entry */
2367 #define CT_SRR 0x45 /* SRR Received */
2368 #define CT_LUN_RESET 0x48 /* Lun Reset Received */
2370 #define CT_HBA_RESET 0xffff /* pseudo error - command destroyed by HBA reset*/
2373 * When the firmware returns a CTIO entry, it may overwrite the last
2374 * part of the structure with sense data. This starts at offset 0x2E
2375 * into the entry, which is in the middle of ct_dataseg[1]. Rather
2376 * than define a new struct for this, I'm just using the sense data
2379 #define CTIO_SENSE_OFFSET 0x2E
2382 * Entry length in u_longs. All entries are the same size so
2383 * any one will do as the numerator.
2385 #define UINT32_ENTRY_SIZE (sizeof(at_entry_t)/sizeof(uint32_t))
2388 * QLA2100 CTIO (type 2) entry
2390 #define MAXRESPLEN 26
2393 uint32_t ct_syshandle;
2394 uint8_t ct_lun; /* lun */
2395 uint8_t ct_iid; /* initiator id */
2396 uint16_t ct_rxid; /* response ID */
2398 uint16_t ct_status; /* isp status */
2399 uint16_t ct_timeout;
2400 uint16_t ct_seg_count;
2401 uint32_t ct_reloff; /* relative offset */
2402 uint32_t ct_resid; /* residual length */
2405 * The three different modes that the target driver
2406 * can set the CTIO{2,3,4} up as.
2408 * The first is for sending FCP_DATA_IUs as well as
2409 * (optionally) sending a terminal SCSI status FCP_RSP_IU.
2411 * The second is for sending SCSI sense data in an FCP_RSP_IU.
2412 * Note that no FCP_DATA_IUs will be sent.
2414 * The third is for sending FCP_RSP_IUs as built specifically
2415 * in system memory as located by the isp_dataseg.
2419 uint16_t _reserved2;
2420 uint16_t ct_scsi_status;
2423 ispds_t ct_dataseg[ISP_RQDSEG_T2];
2424 ispds64_t ct_dataseg64[ISP_RQDSEG_T3];
2425 ispdslist_t ct_dslist;
2430 uint16_t _reserved2;
2431 uint16_t ct_senselen;
2432 uint16_t ct_scsi_status;
2433 uint16_t ct_resplen;
2434 uint8_t ct_resp[MAXRESPLEN];
2438 uint16_t _reserved2;
2439 uint16_t _reserved3;
2440 uint32_t ct_datalen;
2442 ispds_t ct_fcp_rsp_iudata_32;
2443 ispds64_t ct_fcp_rsp_iudata_64;
2451 uint32_t ct_syshandle;
2452 uint16_t ct_iid; /* initiator id */
2453 uint16_t ct_rxid; /* response ID */
2455 uint16_t ct_status; /* isp status */
2456 uint16_t ct_timeout;
2457 uint16_t ct_seg_count;
2458 uint32_t ct_reloff; /* relative offset */
2459 uint32_t ct_resid; /* residual length */
2463 uint16_t _reserved2;
2464 uint16_t ct_scsi_status;
2467 ispds_t ct_dataseg[ISP_RQDSEG_T2];
2468 ispds64_t ct_dataseg64[ISP_RQDSEG_T3];
2469 ispdslist_t ct_dslist;
2474 uint16_t _reserved2;
2475 uint16_t ct_senselen;
2476 uint16_t ct_scsi_status;
2477 uint16_t ct_resplen;
2478 uint8_t ct_resp[MAXRESPLEN];
2482 uint16_t _reserved2;
2483 uint16_t _reserved3;
2484 uint32_t ct_datalen;
2486 ispds_t ct_fcp_rsp_iudata_32;
2487 ispds64_t ct_fcp_rsp_iudata_64;
2494 * ct_flags values for CTIO2
2496 #define CT2_FLAG_MODE0 0x0000
2497 #define CT2_FLAG_MODE1 0x0001
2498 #define CT2_FLAG_MODE2 0x0002
2499 #define CT2_FLAG_MMASK 0x0003
2500 #define CT2_DATA_IN 0x0040 /* *to* initiator */
2501 #define CT2_DATA_OUT 0x0080 /* *from* initiator */
2502 #define CT2_NO_DATA 0x00C0
2503 #define CT2_DATAMASK 0x00C0
2504 #define CT2_CCINCR 0x0100
2505 #define CT2_FASTPOST 0x0200
2506 #define CT2_CONFIRM 0x2000
2507 #define CT2_TERMINATE 0x4000
2508 #define CT2_SENDSTATUS 0x8000
2511 * ct_status values are (mostly) the same as that for ct_entry.
2515 * ct_scsi_status values- the low 8 bits are the normal SCSI status
2516 * we know and love. The upper 8 bits are validity markers for FCP_RSP_IU
2519 #define CT2_RSPLEN_VALID 0x0100
2520 #define CT2_SNSLEN_VALID 0x0200
2521 #define CT2_DATA_OVER 0x0400
2522 #define CT2_DATA_UNDER 0x0800
2527 #define MAXRESPLEN_24XX 24
2530 uint32_t ct_syshandle;
2531 uint16_t ct_nphdl; /* status on returned CTIOs */
2532 uint16_t ct_timeout;
2533 uint16_t ct_seg_count;
2536 uint16_t ct_iid_lo; /* low 16 bits of portid */
2537 uint8_t ct_iid_hi; /* hi 8 bits of portid */
2538 uint8_t ct_reserved;
2540 uint16_t ct_senselen; /* mode 1 only */
2542 uint32_t ct_resid; /* residual length */
2544 uint16_t ct_scsi_status; /* modes 0 && 1 only */
2554 uint16_t ct_resplen;
2556 uint8_t ct_resp[MAXRESPLEN_24XX];
2561 uint32_t ct_datalen;
2563 ispds64_t ct_fcp_rsp_iudata;
2569 * ct_flags values for CTIO7
2571 #define CT7_NO_DATA 0x0000
2572 #define CT7_DATA_OUT 0x0001 /* *from* initiator */
2573 #define CT7_DATA_IN 0x0002 /* *to* initiator */
2574 #define CT7_DATAMASK 0x3
2575 #define CT7_DSD_ENABLE 0x0004
2576 #define CT7_CONF_STSFD 0x0010
2577 #define CT7_EXPLCT_CONF 0x0020
2578 #define CT7_FLAG_MODE0 0x0000
2579 #define CT7_FLAG_MODE1 0x0040
2580 #define CT7_FLAG_MODE2 0x0080
2581 #define CT7_FLAG_MMASK 0x00C0
2582 #define CT7_NOACK 0x0100
2583 #define CT7_TASK_ATTR_SHIFT 9
2584 #define CT7_CONFIRM 0x2000
2585 #define CT7_TERMINATE 0x4000
2586 #define CT7_SENDSTATUS 0x8000
2589 * Type 7 CTIO status codes
2591 #define CT7_OK 0x01 /* completed without error */
2592 #define CT7_ABORTED 0x02 /* aborted by host */
2593 #define CT7_ERR 0x04 /* see sense data for error */
2594 #define CT7_INVAL 0x06 /* request for disabled lun */
2595 #define CT7_INVRXID 0x08 /* Invalid RX_ID */
2596 #define CT7_DATA_OVER 0x09 /* Data Overrun */
2597 #define CT7_TIMEOUT 0x0B /* timed out */
2598 #define CT7_RESET 0x0E /* LIP Rset Received */
2599 #define CT7_BUS_ERROR 0x10 /* DMA PCI Error */
2600 #define CT7_REASSY_ERR 0x11 /* DMA reassembly error */
2601 #define CT7_DATA_UNDER 0x15 /* Data Underrun */
2602 #define CT7_PORTUNAVAIL 0x28 /* port not available */
2603 #define CT7_LOGOUT 0x29 /* port logout */
2604 #define CT7_PORTCHANGED 0x2A /* port changed */
2605 #define CT7_SRR 0x45 /* SRR Received */
2608 * Other 24XX related target IOCBs
2615 isphdr_t abts_header;
2616 uint8_t abts_reserved0[6];
2617 uint16_t abts_nphdl;
2618 uint16_t abts_reserved1;
2620 uint32_t abts_rxid_abts;
2621 uint16_t abts_did_lo;
2622 uint8_t abts_did_hi;
2624 uint16_t abts_sid_lo;
2625 uint8_t abts_sid_hi;
2626 uint8_t abts_cs_ctl;
2627 uint16_t abts_fs_ctl;
2630 uint16_t abts_seq_cnt;
2631 uint8_t abts_df_ctl;
2632 uint8_t abts_seq_id;
2633 uint16_t abts_rx_id;
2634 uint16_t abts_ox_id;
2635 uint32_t abts_param;
2636 uint8_t abts_reserved2[16];
2637 uint32_t abts_rxid_task;
2641 isphdr_t abts_rsp_header;
2642 uint32_t abts_rsp_handle;
2643 uint16_t abts_rsp_status;
2644 uint16_t abts_rsp_nphdl;
2645 uint16_t abts_rsp_ctl_flags;
2646 uint16_t abts_rsp_sof;
2647 uint32_t abts_rsp_rxid_abts;
2648 uint16_t abts_rsp_did_lo;
2649 uint8_t abts_rsp_did_hi;
2650 uint8_t abts_rsp_r_ctl;
2651 uint16_t abts_rsp_sid_lo;
2652 uint8_t abts_rsp_sid_hi;
2653 uint8_t abts_rsp_cs_ctl;
2654 uint16_t abts_rsp_f_ctl_lo;
2655 uint8_t abts_rsp_f_ctl_hi;
2656 uint8_t abts_rsp_type;
2657 uint16_t abts_rsp_seq_cnt;
2658 uint8_t abts_rsp_df_ctl;
2659 uint8_t abts_rsp_seq_id;
2660 uint16_t abts_rsp_rx_id;
2661 uint16_t abts_rsp_ox_id;
2662 uint32_t abts_rsp_param;
2666 uint8_t last_seq_id;
2667 uint8_t seq_id_valid;
2668 uint16_t aborted_rx_id;
2669 uint16_t aborted_ox_id;
2670 uint16_t high_seq_cnt;
2671 uint16_t low_seq_cnt;
2672 uint8_t reserved2[4];
2675 uint8_t vendor_unique;
2676 uint8_t explanation;
2679 uint8_t reserved2[12];
2682 uint8_t reserved[8];
2686 uint8_t reserved[16];
2688 uint32_t abts_rsp_rxid_task;
2691 /* terminate this ABTS exchange */
2692 #define ISP24XX_ABTS_RSP_TERMINATE 0x01
2694 #define ISP24XX_ABTS_RSP_COMPLETE 0x00
2695 #define ISP24XX_ABTS_RSP_RESET 0x04
2696 #define ISP24XX_ABTS_RSP_ABORTED 0x05
2697 #define ISP24XX_ABTS_RSP_TIMEOUT 0x06
2698 #define ISP24XX_ABTS_RSP_INVXID 0x08
2699 #define ISP24XX_ABTS_RSP_LOGOUT 0x29
2700 #define ISP24XX_ABTS_RSP_SUBCODE 0x31
2702 #define ISP24XX_NO_TASK 0xffffffff
2707 * These are the limits of the number of dma segments we
2708 * can deal with based not on the size of the segment counter
2709 * (which is 16 bits), but on the size of the number of
2710 * queue entries field (which is 8 bits). We assume no
2711 * segments in the first queue entry, so we can either
2712 * have 7 dma segments per continuation entry or 5
2713 * (for 64 bit dma).. multiplying out by 254....
2715 #define ISP_NSEG_MAX 1778
2716 #define ISP_NSEG64_MAX 1270
2718 #endif /* _ISPMBOX_H */