3 * Mailbox and Queue Entry Definitions for for Qlogic ISP SCSI adapters.
5 * Copyright (c) 1997, 1998, 1999, 2000 by Matthew Jacob
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
11 * 1. Redistributions of source code must retain the above copyright
12 * notice immediately at the beginning of the file, without modification,
13 * this list of conditions, and the following disclaimer.
14 * 2. The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
21 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34 * Mailbox Command Opcodes
36 #define MBOX_NO_OP 0x0000
37 #define MBOX_LOAD_RAM 0x0001
38 #define MBOX_EXEC_FIRMWARE 0x0002
39 #define MBOX_DUMP_RAM 0x0003
40 #define MBOX_WRITE_RAM_WORD 0x0004
41 #define MBOX_READ_RAM_WORD 0x0005
42 #define MBOX_MAILBOX_REG_TEST 0x0006
43 #define MBOX_VERIFY_CHECKSUM 0x0007
44 #define MBOX_ABOUT_FIRMWARE 0x0008
50 #define MBOX_CHECK_FIRMWARE 0x000e
51 #define MBOX_READ_RAM_WORD_EXTENDED 0x000f
52 #define MBOX_INIT_REQ_QUEUE 0x0010
53 #define MBOX_INIT_RES_QUEUE 0x0011
54 #define MBOX_EXECUTE_IOCB 0x0012
55 #define MBOX_WAKE_UP 0x0013
56 #define MBOX_STOP_FIRMWARE 0x0014
57 #define MBOX_ABORT 0x0015
58 #define MBOX_ABORT_DEVICE 0x0016
59 #define MBOX_ABORT_TARGET 0x0017
60 #define MBOX_BUS_RESET 0x0018
61 #define MBOX_STOP_QUEUE 0x0019
62 #define MBOX_START_QUEUE 0x001a
63 #define MBOX_SINGLE_STEP_QUEUE 0x001b
64 #define MBOX_ABORT_QUEUE 0x001c
65 #define MBOX_GET_DEV_QUEUE_STATUS 0x001d
67 #define MBOX_GET_FIRMWARE_STATUS 0x001f
68 #define MBOX_GET_INIT_SCSI_ID 0x0020
69 #define MBOX_GET_SELECT_TIMEOUT 0x0021
70 #define MBOX_GET_RETRY_COUNT 0x0022
71 #define MBOX_GET_TAG_AGE_LIMIT 0x0023
72 #define MBOX_GET_CLOCK_RATE 0x0024
73 #define MBOX_GET_ACT_NEG_STATE 0x0025
74 #define MBOX_GET_ASYNC_DATA_SETUP_TIME 0x0026
75 #define MBOX_GET_SBUS_PARAMS 0x0027
76 #define MBOX_GET_PCI_PARAMS MBOX_GET_SBUS_PARAMS
77 #define MBOX_GET_TARGET_PARAMS 0x0028
78 #define MBOX_GET_DEV_QUEUE_PARAMS 0x0029
79 #define MBOX_GET_RESET_DELAY_PARAMS 0x002a
85 #define MBOX_SET_INIT_SCSI_ID 0x0030
86 #define MBOX_SET_SELECT_TIMEOUT 0x0031
87 #define MBOX_SET_RETRY_COUNT 0x0032
88 #define MBOX_SET_TAG_AGE_LIMIT 0x0033
89 #define MBOX_SET_CLOCK_RATE 0x0034
90 #define MBOX_SET_ACT_NEG_STATE 0x0035
91 #define MBOX_SET_ASYNC_DATA_SETUP_TIME 0x0036
92 #define MBOX_SET_SBUS_CONTROL_PARAMS 0x0037
93 #define MBOX_SET_PCI_PARAMETERS 0x0037
94 #define MBOX_SET_TARGET_PARAMS 0x0038
95 #define MBOX_SET_DEV_QUEUE_PARAMS 0x0039
96 #define MBOX_SET_RESET_DELAY_PARAMS 0x003a
102 #define MBOX_RETURN_BIOS_BLOCK_ADDR 0x0040
103 #define MBOX_WRITE_FOUR_RAM_WORDS 0x0041
104 #define MBOX_EXEC_BIOS_IOCB 0x0042
105 #define MBOX_SET_FW_FEATURES 0x004a
106 #define MBOX_GET_FW_FEATURES 0x004b
107 #define FW_FEATURE_FAST_POST 0x1
108 #define FW_FEATURE_LVD_NOTIFY 0x2
109 #define FW_FEATURE_RIO_32BIT 0x4
110 #define FW_FEATURE_RIO_16BIT 0x8
112 #define MBOX_INIT_REQ_QUEUE_A64 0x0052
113 #define MBOX_INIT_RES_QUEUE_A64 0x0053
115 #define MBOX_ENABLE_TARGET_MODE 0x0055
116 #define ENABLE_TARGET_FLAG 0x8000
117 #define ENABLE_TQING_FLAG 0x0004
118 #define ENABLE_MANDATORY_DISC 0x0002
119 #define MBOX_GET_TARGET_STATUS 0x0056
121 /* These are for the ISP2X00 FC cards */
122 #define MBOX_GET_LOOP_ID 0x0020
123 #define MBOX_GET_FIRMWARE_OPTIONS 0x0028
124 #define MBOX_SET_FIRMWARE_OPTIONS 0x0038
125 #define MBOX_GET_RESOURCE_COUNT 0x0042
126 #define MBOX_ENHANCED_GET_PDB 0x0047
127 #define MBOX_EXEC_COMMAND_IOCB_A64 0x0054
128 #define MBOX_INIT_FIRMWARE 0x0060
129 #define MBOX_GET_INIT_CONTROL_BLOCK 0x0061
130 #define MBOX_INIT_LIP 0x0062
131 #define MBOX_GET_FC_AL_POSITION_MAP 0x0063
132 #define MBOX_GET_PORT_DB 0x0064
133 #define MBOX_CLEAR_ACA 0x0065
134 #define MBOX_TARGET_RESET 0x0066
135 #define MBOX_CLEAR_TASK_SET 0x0067
136 #define MBOX_ABORT_TASK_SET 0x0068
137 #define MBOX_GET_FW_STATE 0x0069
138 #define MBOX_GET_PORT_NAME 0x006A
139 #define MBOX_GET_LINK_STATUS 0x006B
140 #define MBOX_INIT_LIP_RESET 0x006C
141 #define MBOX_SEND_SNS 0x006E
142 #define MBOX_FABRIC_LOGIN 0x006F
143 #define MBOX_SEND_CHANGE_REQUEST 0x0070
144 #define MBOX_FABRIC_LOGOUT 0x0071
145 #define MBOX_INIT_LIP_LOGIN 0x0072
147 #define MBOX_DRIVER_HEARTBEAT 0x005B
148 #define MBOX_FW_HEARTBEAT 0x005C
150 #define MBOX_GET_SET_DATA_RATE 0x005D /* 23XX only */
151 #define MBGSD_GET_RATE 0
152 #define MBGSD_SET_RATE 1
153 #define MBGSD_ONEGB 0
154 #define MBGSD_TWOGB 1
158 #define ISP2100_SET_PCI_PARAM 0x00ff
160 #define MBOX_BUSY 0x04
167 * Mailbox Command Complete Status Codes
169 #define MBOX_COMMAND_COMPLETE 0x4000
170 #define MBOX_INVALID_COMMAND 0x4001
171 #define MBOX_HOST_INTERFACE_ERROR 0x4002
172 #define MBOX_TEST_FAILED 0x4003
173 #define MBOX_COMMAND_ERROR 0x4005
174 #define MBOX_COMMAND_PARAM_ERROR 0x4006
175 #define MBOX_PORT_ID_USED 0x4007
176 #define MBOX_LOOP_ID_USED 0x4008
177 #define MBOX_ALL_IDS_USED 0x4009
178 #define MBOX_NOT_LOGGED_IN 0x400A
179 #define MBLOGALL 0x000f
180 #define MBLOGNONE 0x0000
181 #define MBLOGMASK(x) ((x) & 0xf)
184 * Asynchronous event status codes
186 #define ASYNC_BUS_RESET 0x8001
187 #define ASYNC_SYSTEM_ERROR 0x8002
188 #define ASYNC_RQS_XFER_ERR 0x8003
189 #define ASYNC_RSP_XFER_ERR 0x8004
190 #define ASYNC_QWAKEUP 0x8005
191 #define ASYNC_TIMEOUT_RESET 0x8006
192 #define ASYNC_DEVICE_RESET 0x8007
193 #define ASYNC_EXTMSG_UNDERRUN 0x800A
194 #define ASYNC_SCAM_INT 0x800B
195 #define ASYNC_HUNG_SCSI 0x800C
196 #define ASYNC_KILLED_BUS 0x800D
197 #define ASYNC_BUS_TRANSIT 0x800E /* LVD -> HVD, eg. */
198 #define ASYNC_LIP_OCCURRED 0x8010
199 #define ASYNC_LOOP_UP 0x8011
200 #define ASYNC_LOOP_DOWN 0x8012
201 #define ASYNC_LOOP_RESET 0x8013
202 #define ASYNC_PDB_CHANGED 0x8014
203 #define ASYNC_CHANGE_NOTIFY 0x8015
204 #define ASYNC_LIP_F8 0x8016
205 #define ASYNC_CMD_CMPLT 0x8020
206 #define ASYNC_CTIO_DONE 0x8021
207 #define ASYNC_IP_XMIT_DONE 0x8022
208 #define ASYNC_IP_RECV_DONE 0x8023
209 #define ASYNC_IP_BROADCAST 0x8024
210 #define ASYNC_IP_RCVQ_LOW 0x8025
211 #define ASYNC_IP_RCVQ_EMPTY 0x8026
212 #define ASYNC_IP_RECV_DONE_ALIGNED 0x8027
213 #define ASYNC_PTPMODE 0x8030
214 #define ASYNC_RIO1 0x8031
215 #define ASYNC_RIO2 0x8032
216 #define ASYNC_RIO3 0x8033
217 #define ASYNC_RIO4 0x8034
218 #define ASYNC_RIO5 0x8035
219 #define ASYNC_CONNMODE 0x8036
220 #define ISP_CONN_LOOP 1
221 #define ISP_CONN_PTP 2
222 #define ISP_CONN_BADLIP 3
223 #define ISP_CONN_FATAL 4
224 #define ISP_CONN_LOOPBACK 5
225 #define ASYNC_RIO_RESP 0x8040
226 #define ASYNC_RIO_COMP 0x8042
228 * 2.01.31 2200 Only. Need Bit 13 in Mailbox 1 for Set Firmware Options
229 * mailbox command to enable this.
231 #define ASYNC_QFULL_SENT 0x8049
237 #define WRITE_REQUEST_QUEUE_IN_POINTER(isp, value) \
238 ISP_WRITE(isp, isp->isp_rqstinrp, value)
240 #define READ_REQUEST_QUEUE_OUT_POINTER(isp) \
241 ISP_READ(isp, isp->isp_rqstoutrp)
243 #define READ_RESPONSE_QUEUE_IN_POINTER(isp) \
244 ISP_READ(isp, isp->isp_respinrp)
246 #define WRITE_RESPONSE_QUEUE_OUT_POINTER(isp, value) \
247 ISP_WRITE(isp, isp->isp_respoutrp, value)
250 * Command Structure Definitions
264 #define DSTYPE_32BIT 0
265 #define DSTYPE_64BIT 1
267 u_int16_t ds_type; /* 0-> ispds_t, 1-> ispds64_t */
268 u_int32_t ds_segment; /* unused */
269 u_int32_t ds_base; /* 32 bit address of DSD list */
274 * These elements get swizzled around for SBus instances.
276 #define ISP_SWAP8(a, b) { \
283 u_int8_t rqs_entry_type;
284 u_int8_t rqs_entry_count;
289 /* RQS Flag definitions */
290 #define RQSFLAG_CONTINUATION 0x01
291 #define RQSFLAG_FULL 0x02
292 #define RQSFLAG_BADHEADER 0x04
293 #define RQSFLAG_BADPACKET 0x08
295 /* RQS entry_type definitions */
296 #define RQSTYPE_REQUEST 0x01
297 #define RQSTYPE_DATASEG 0x02
298 #define RQSTYPE_RESPONSE 0x03
299 #define RQSTYPE_MARKER 0x04
300 #define RQSTYPE_CMDONLY 0x05
301 #define RQSTYPE_ATIO 0x06 /* Target Mode */
302 #define RQSTYPE_CTIO 0x07 /* Target Mode */
303 #define RQSTYPE_SCAM 0x08
304 #define RQSTYPE_A64 0x09
305 #define RQSTYPE_A64_CONT 0x0a
306 #define RQSTYPE_ENABLE_LUN 0x0b /* Target Mode */
307 #define RQSTYPE_MODIFY_LUN 0x0c /* Target Mode */
308 #define RQSTYPE_NOTIFY 0x0d /* Target Mode */
309 #define RQSTYPE_NOTIFY_ACK 0x0e /* Target Mode */
310 #define RQSTYPE_CTIO1 0x0f /* Target Mode */
311 #define RQSTYPE_STATUS_CONT 0x10
312 #define RQSTYPE_T2RQS 0x11
313 #define RQSTYPE_IP_XMIT 0x13
314 #define RQSTYPE_T4RQS 0x15
315 #define RQSTYPE_ATIO2 0x16 /* Target Mode */
316 #define RQSTYPE_CTIO2 0x17 /* Target Mode */
317 #define RQSTYPE_CSET0 0x18
318 #define RQSTYPE_T3RQS 0x19
319 #define RQSTYPE_IP_XMIT_64 0x1b
320 #define RQSTYPE_CTIO4 0x1e /* Target Mode */
321 #define RQSTYPE_CTIO3 0x1f /* Target Mode */
322 #define RQSTYPE_RIO1 0x21
323 #define RQSTYPE_RIO2 0x22
324 #define RQSTYPE_IP_RECV 0x23
325 #define RQSTYPE_IP_RECV_CONT 0x24
331 u_int32_t req_handle;
332 u_int8_t req_lun_trn;
334 u_int16_t req_cdblen;
335 #define req_modifier req_cdblen /* marker packet */
337 u_int16_t req_reserved;
339 u_int16_t req_seg_count;
340 u_int8_t req_cdb[12];
341 ispds_t req_dataseg[ISP_RQDSEG];
344 #define ispreq64_t ispreqt3_t /* same as.... */
345 #define ISP_RQDSEG_A64 2
348 * A request packet can also be a marker packet.
350 #define SYNC_DEVICE 0
351 #define SYNC_TARGET 1
354 #define ISP_RQDSEG_T2 3
357 u_int32_t req_handle;
358 u_int8_t req_lun_trn;
360 u_int16_t req_scclun;
364 u_int16_t req_seg_count;
365 u_int8_t req_cdb[16];
366 u_int32_t req_totalcnt;
367 ispds_t req_dataseg[ISP_RQDSEG_T2];
370 #define ISP_RQDSEG_T3 2
373 u_int32_t req_handle;
374 u_int8_t req_lun_trn;
376 u_int16_t req_scclun;
380 u_int16_t req_seg_count;
381 u_int8_t req_cdb[16];
382 u_int32_t req_totalcnt;
383 ispds64_t req_dataseg[ISP_RQDSEG_T3];
386 /* req_flag values */
387 #define REQFLAG_NODISCON 0x0001
388 #define REQFLAG_HTAG 0x0002
389 #define REQFLAG_OTAG 0x0004
390 #define REQFLAG_STAG 0x0008
391 #define REQFLAG_TARGET_RTN 0x0010
393 #define REQFLAG_NODATA 0x0000
394 #define REQFLAG_DATA_IN 0x0020
395 #define REQFLAG_DATA_OUT 0x0040
396 #define REQFLAG_DATA_UNKNOWN 0x0060
398 #define REQFLAG_DISARQ 0x0100
399 #define REQFLAG_FRC_ASYNC 0x0200
400 #define REQFLAG_FRC_SYNC 0x0400
401 #define REQFLAG_FRC_WIDE 0x0800
402 #define REQFLAG_NOPARITY 0x1000
403 #define REQFLAG_STOPQ 0x2000
404 #define REQFLAG_XTRASNS 0x4000
405 #define REQFLAG_PRIORITY 0x8000
409 u_int32_t req_handle;
410 u_int8_t req_lun_trn;
412 u_int16_t req_cdblen;
416 u_int16_t req_seg_count;
417 u_int8_t req_cdb[44];
424 ispds_t req_dataseg[ISP_CDSEG];
427 #define ISP_CDSEG64 5
430 ispds64_t req_dataseg[ISP_CDSEG64];
435 u_int32_t req_handle;
436 u_int16_t req_scsi_status;
437 u_int16_t req_completion_status;
438 u_int16_t req_state_flags;
439 u_int16_t req_status_flags;
441 #define req_response_len req_time /* FC only */
442 u_int16_t req_sense_len;
444 u_int8_t req_response[8]; /* FC only */
445 u_int8_t req_sense_data[32];
450 u_int8_t req_sense_data[60];
454 * For Qlogic 2X00, the high order byte of SCSI status has
455 * additional meaning.
457 #define RQCS_RU 0x800 /* Residual Under */
458 #define RQCS_RO 0x400 /* Residual Over */
459 #define RQCS_RESID (RQCS_RU|RQCS_RO)
460 #define RQCS_SV 0x200 /* Sense Length Valid */
461 #define RQCS_RV 0x100 /* FCP Response Length Valid */
464 * Completion Status Codes.
466 #define RQCS_COMPLETE 0x0000
467 #define RQCS_DMA_ERROR 0x0002
468 #define RQCS_RESET_OCCURRED 0x0004
469 #define RQCS_ABORTED 0x0005
470 #define RQCS_TIMEOUT 0x0006
471 #define RQCS_DATA_OVERRUN 0x0007
472 #define RQCS_DATA_UNDERRUN 0x0015
473 #define RQCS_QUEUE_FULL 0x001C
475 /* 1X00 Only Completion Codes */
476 #define RQCS_INCOMPLETE 0x0001
477 #define RQCS_TRANSPORT_ERROR 0x0003
478 #define RQCS_COMMAND_OVERRUN 0x0008
479 #define RQCS_STATUS_OVERRUN 0x0009
480 #define RQCS_BAD_MESSAGE 0x000a
481 #define RQCS_NO_MESSAGE_OUT 0x000b
482 #define RQCS_EXT_ID_FAILED 0x000c
483 #define RQCS_IDE_MSG_FAILED 0x000d
484 #define RQCS_ABORT_MSG_FAILED 0x000e
485 #define RQCS_REJECT_MSG_FAILED 0x000f
486 #define RQCS_NOP_MSG_FAILED 0x0010
487 #define RQCS_PARITY_ERROR_MSG_FAILED 0x0011
488 #define RQCS_DEVICE_RESET_MSG_FAILED 0x0012
489 #define RQCS_ID_MSG_FAILED 0x0013
490 #define RQCS_UNEXP_BUS_FREE 0x0014
491 #define RQCS_XACT_ERR1 0x0018
492 #define RQCS_XACT_ERR2 0x0019
493 #define RQCS_XACT_ERR3 0x001A
494 #define RQCS_BAD_ENTRY 0x001B
495 #define RQCS_PHASE_SKIPPED 0x001D
496 #define RQCS_ARQS_FAILED 0x001E
497 #define RQCS_WIDE_FAILED 0x001F
498 #define RQCS_SYNCXFER_FAILED 0x0020
499 #define RQCS_LVD_BUSERR 0x0021
501 /* 2X00 Only Completion Codes */
502 #define RQCS_PORT_UNAVAILABLE 0x0028
503 #define RQCS_PORT_LOGGED_OUT 0x0029
504 #define RQCS_PORT_CHANGED 0x002A
505 #define RQCS_PORT_BUSY 0x002B
508 * 1X00 specific State Flags
510 #define RQSF_GOT_BUS 0x0100
511 #define RQSF_GOT_TARGET 0x0200
512 #define RQSF_SENT_CDB 0x0400
513 #define RQSF_XFRD_DATA 0x0800
514 #define RQSF_GOT_STATUS 0x1000
515 #define RQSF_GOT_SENSE 0x2000
516 #define RQSF_XFER_COMPLETE 0x4000
519 * 2X00 specific State Flags
520 * (same as 1X00 except RQSF_GOT_BUS/RQSF_GOT_TARGET are not available)
522 #define RQSF_DATA_IN 0x0020
523 #define RQSF_DATA_OUT 0x0040
524 #define RQSF_STAG 0x0008
525 #define RQSF_OTAG 0x0004
526 #define RQSF_HTAG 0x0002
530 #define RQSTF_DISCONNECT 0x0001
531 #define RQSTF_SYNCHRONOUS 0x0002
532 #define RQSTF_PARITY_ERROR 0x0004
533 #define RQSTF_BUS_RESET 0x0008
534 #define RQSTF_DEVICE_RESET 0x0010
535 #define RQSTF_ABORTED 0x0020
536 #define RQSTF_TIMEOUT 0x0040
537 #define RQSTF_NEGOTIATION 0x0080
540 * 2X00 specific state flags
544 /* RQSF_GOT_STATUS */
545 /* RQSF_XFER_COMPLETE */
548 * 2X00 specific status flags
552 #define RQSTF_DMA_ERROR 0x0080
553 #define RQSTF_LOGOUT 0x2000
558 #ifndef ISP_EXEC_THROTTLE
559 #define ISP_EXEC_THROTTLE 16
563 * About Firmware returns an 'attribute' word in mailbox 6.
565 #define ISP_FW_ATTR_TMODE 0x01
566 #define ISP_FW_ATTR_SCCLUN 0x02
567 #define ISP_FW_ATTR_FABRIC 0x04
568 #define ISP_FW_ATTR_CLASS2 0x08
569 #define ISP_FW_ATTR_FCTAPE 0x10
570 #define ISP_FW_ATTR_IP 0x20
573 * Reduced Interrupt Operation Response Queue Entreis
578 u_int32_t req_handles[15];
583 u_int16_t req_handles[30];
587 * FC (ISP2100) specific data structures
591 * Initialization Control Block
593 * Version One (prime) format.
595 typedef struct isp_icb {
596 u_int8_t icb_version;
598 u_int16_t icb_fwoptions;
599 u_int16_t icb_maxfrmlen;
600 u_int16_t icb_maxalloc;
601 u_int16_t icb_execthrottle;
602 u_int8_t icb_retry_count;
603 u_int8_t icb_retry_delay;
604 u_int8_t icb_portname[8];
605 u_int16_t icb_hardaddr;
606 u_int8_t icb_iqdevtype;
607 u_int8_t icb_logintime;
608 u_int8_t icb_nodename[8];
609 u_int16_t icb_rqstout;
610 u_int16_t icb_rspnsin;
611 u_int16_t icb_rqstqlen;
612 u_int16_t icb_rsltqlen;
613 u_int16_t icb_rqstaddr[4];
614 u_int16_t icb_respaddr[4];
615 u_int16_t icb_lunenables;
618 u_int16_t icb_lunetimeout;
619 u_int16_t _reserved1;
620 u_int16_t icb_xfwoptions;
621 u_int8_t icb_racctimer;
622 u_int8_t icb_idelaytimer;
623 u_int16_t icb_zfwoptions;
624 u_int16_t _reserved2[13];
626 #define ICB_VERSION1 1
628 #define ICBOPT_HARD_ADDRESS 0x0001
629 #define ICBOPT_FAIRNESS 0x0002
630 #define ICBOPT_FULL_DUPLEX 0x0004
631 #define ICBOPT_FAST_POST 0x0008
632 #define ICBOPT_TGT_ENABLE 0x0010
633 #define ICBOPT_INI_DISABLE 0x0020
634 #define ICBOPT_INI_ADISC 0x0040
635 #define ICBOPT_INI_TGTTYPE 0x0080
636 #define ICBOPT_PDBCHANGE_AE 0x0100
637 #define ICBOPT_NOLIP 0x0200
638 #define ICBOPT_SRCHDOWN 0x0400
639 #define ICBOPT_PREVLOOP 0x0800
640 #define ICBOPT_STOP_ON_QFULL 0x1000
641 #define ICBOPT_FULL_LOGIN 0x2000
642 #define ICBOPT_BOTH_WWNS 0x4000
643 #define ICBOPT_EXTENDED 0x8000
645 #define ICBXOPT_CLASS2_ACK0 0x0200
646 #define ICBXOPT_CLASS2 0x0100
647 #define ICBXOPT_LOOP_ONLY (0 << 4)
648 #define ICBXOPT_PTP_ONLY (1 << 4)
649 #define ICBXOPT_LOOP_2_PTP (2 << 4)
650 #define ICBXOPT_PTP_2_LOOP (3 << 4)
653 * The lower 4 bits of the xfwoptions field are the OPERATION MODE bits.
654 * RIO is not defined for the 23XX cards
656 #define ICBXOPT_RIO_OFF 0
657 #define ICBXOPT_RIO_16BIT 1
658 #define ICBXOPT_RIO_32BIT 2
659 #define ICBXOPT_RIO_16BIT_IOCB 3
660 #define ICBXOPT_RIO_32BIT_IOCB 4
661 #define ICBXOPT_ZIO 5
663 #define ICBZOPT_ENA_RDXFR_RDY 0x01
664 #define ICBZOPT_ENA_OOF (1 << 6) /* out of order frame handling */
665 /* These 3 only apply to the 2300 */
666 #define ICBZOPT_RATE_ONEGB (MBGSD_ONEGB << 14)
667 #define ICBZOPT_RATE_TWOGB (MBGSD_TWOGB << 14)
668 #define ICBZOPT_RATE_AUTO (MBGSD_AUTO << 14)
671 #define ICB_MIN_FRMLEN 256
672 #define ICB_MAX_FRMLEN 2112
673 #define ICB_DFLT_FRMLEN 1024
674 #define ICB_DFLT_ALLOC 256
675 #define ICB_DFLT_THROTTLE 16
676 #define ICB_DFLT_RDELAY 5
677 #define ICB_DFLT_RCOUNT 3
680 #define RQRSP_ADDR0015 0
681 #define RQRSP_ADDR1631 1
682 #define RQRSP_ADDR3247 2
683 #define RQRSP_ADDR4863 3
695 #define MAKE_NODE_NAME_FROM_WWN(array, wwn) \
696 array[ICB_NNM0] = (u_int8_t) ((wwn >> 0) & 0xff), \
697 array[ICB_NNM1] = (u_int8_t) ((wwn >> 8) & 0xff), \
698 array[ICB_NNM2] = (u_int8_t) ((wwn >> 16) & 0xff), \
699 array[ICB_NNM3] = (u_int8_t) ((wwn >> 24) & 0xff), \
700 array[ICB_NNM4] = (u_int8_t) ((wwn >> 32) & 0xff), \
701 array[ICB_NNM5] = (u_int8_t) ((wwn >> 40) & 0xff), \
702 array[ICB_NNM6] = (u_int8_t) ((wwn >> 48) & 0xff), \
703 array[ICB_NNM7] = (u_int8_t) ((wwn >> 56) & 0xff)
705 #define MAKE_WWN_FROM_NODE_NAME(wwn, array) \
706 wwn = ((u_int64_t) array[ICB_NNM0]) | \
707 ((u_int64_t) array[ICB_NNM1] << 8) | \
708 ((u_int64_t) array[ICB_NNM2] << 16) | \
709 ((u_int64_t) array[ICB_NNM3] << 24) | \
710 ((u_int64_t) array[ICB_NNM4] << 32) | \
711 ((u_int64_t) array[ICB_NNM5] << 40) | \
712 ((u_int64_t) array[ICB_NNM6] << 48) | \
713 ((u_int64_t) array[ICB_NNM7] << 56)
718 * This is an at most 128 byte map that returns either
719 * the LILP or Firmware generated list of ports.
721 * We deviate a bit from the returned qlogic format to
722 * use an extra bit to say whether this was a LILP or
732 * Port Data Base Element
736 u_int16_t pdb_options;
739 #define BITS2WORD(x) ((x)[0] << 16 | (x)[3] << 8 | (x)[2])
740 u_int8_t pdb_hardaddr_bits[4];
741 u_int8_t pdb_portid_bits[4];
742 u_int8_t pdb_nodename[8];
743 u_int8_t pdb_portname[8];
744 u_int16_t pdb_execthrottle;
745 u_int16_t pdb_exec_count;
746 u_int8_t pdb_retry_count;
747 u_int8_t pdb_retry_delay;
748 u_int16_t pdb_resalloc;
749 u_int16_t pdb_curalloc;
752 u_int16_t pdb_tl_next;
753 u_int16_t pdb_tl_last;
754 u_int16_t pdb_features; /* PLOGI, Common Service */
755 u_int16_t pdb_pconcurrnt; /* PLOGI, Common Service */
756 u_int16_t pdb_roi; /* PLOGI, Common Service */
758 u_int8_t pdb_initiator; /* PLOGI, Class 3 Control Flags */
759 u_int16_t pdb_rdsiz; /* PLOGI, Class 3 */
760 u_int16_t pdb_ncseq; /* PLOGI, Class 3 */
761 u_int16_t pdb_noseq; /* PLOGI, Class 3 */
762 u_int16_t pdb_labrtflg;
763 u_int16_t pdb_lstopflg;
764 u_int16_t pdb_sqhead;
765 u_int16_t pdb_sqtail;
766 u_int16_t pdb_ptimer;
767 u_int16_t pdb_nxt_seqid;
768 u_int16_t pdb_fcount;
769 u_int16_t pdb_prli_len;
770 u_int16_t pdb_prli_svc0;
771 u_int16_t pdb_prli_svc3;
772 u_int16_t pdb_loopid;
773 u_int16_t pdb_il_ptr;
774 u_int16_t pdb_sl_ptr;
777 #define PDB_OPTIONS_XMITTING (1<<11)
778 #define PDB_OPTIONS_LNKXMIT (1<<10)
779 #define PDB_OPTIONS_ABORTED (1<<9)
780 #define PDB_OPTIONS_ADISC (1<<1)
782 #define PDB_STATE_DISCOVERY 0
783 #define PDB_STATE_WDISC_ACK 1
784 #define PDB_STATE_PLOGI 2
785 #define PDB_STATE_PLOGI_ACK 3
786 #define PDB_STATE_PRLI 4
787 #define PDB_STATE_PRLI_ACK 5
788 #define PDB_STATE_LOGGED_IN 6
789 #define PDB_STATE_PORT_UNAVAIL 7
790 #define PDB_STATE_PRLO 8
791 #define PDB_STATE_PRLO_ACK 9
792 #define PDB_STATE_PLOGO 10
793 #define PDB_STATE_PLOG_ACK 11
795 #define SVC3_TGT_ROLE 0x10
796 #define SVC3_INI_ROLE 0x20
797 #define SVC3_ROLE_MASK 0x30
798 #define SVC3_ROLE_SHIFT 4
803 * This is as the QLogic f/w documentations defines it- which is just opposite,
804 * bit wise, from what the specification defines it as. Additionally, the
805 * ct_response and ct_resid (really from FC-GS-2) need to be byte swapped.
809 u_int8_t ct_revision;
810 u_int8_t ct_portid[3];
811 u_int8_t ct_fcs_type;
812 u_int8_t ct_fcs_subtype;
815 u_int16_t ct_response;
819 u_int8_t ct_explanation;
822 #define FS_ACC 0x8002
823 #define FS_RJT 0x8001
825 #define FC4_IP 5 /* ISO/EEC 8802-2 LLC/SNAP "Out of Order Delivery" */
826 #define FC4_SCSI 8 /* SCSI-3 via Fivre Channel Protocol (FCP) */
827 #define FC4_FC_SVC 0x20 /* Fibre Channel Services */
829 #define SNS_GA_NXT 0x100
830 #define SNS_GPN_ID 0x112
831 #define SNS_GNN_ID 0x113
832 #define SNS_GFF_ID 0x11F
833 #define SNS_GID_FT 0x171
834 #define SNS_RFT_ID 0x217
836 u_int16_t snscb_rblen; /* response buffer length (words) */
837 u_int16_t snscb_res0;
838 u_int16_t snscb_addr[4]; /* response buffer address */
839 u_int16_t snscb_sblen; /* subcommand buffer length (words) */
840 u_int16_t snscb_res1;
841 u_int16_t snscb_data[1]; /* variable data */
842 } sns_screq_t; /* Subcommand Request Structure */
845 u_int16_t snscb_rblen; /* response buffer length (words) */
846 u_int16_t snscb_res0;
847 u_int16_t snscb_addr[4]; /* response buffer address */
848 u_int16_t snscb_sblen; /* subcommand buffer length (words) */
849 u_int16_t snscb_res1;
851 u_int16_t snscb_res2;
852 u_int32_t snscb_res3;
853 u_int32_t snscb_port;
855 #define SNS_GA_NXT_REQ_SIZE (sizeof (sns_ga_nxt_req_t))
858 u_int16_t snscb_rblen; /* response buffer length (words) */
859 u_int16_t snscb_res0;
860 u_int16_t snscb_addr[4]; /* response buffer address */
861 u_int16_t snscb_sblen; /* subcommand buffer length (words) */
862 u_int16_t snscb_res1;
864 u_int16_t snscb_res2;
865 u_int32_t snscb_res3;
866 u_int32_t snscb_portid;
868 #define SNS_GXN_ID_REQ_SIZE (sizeof (sns_gxn_id_req_t))
871 u_int16_t snscb_rblen; /* response buffer length (words) */
872 u_int16_t snscb_res0;
873 u_int16_t snscb_addr[4]; /* response buffer address */
874 u_int16_t snscb_sblen; /* subcommand buffer length (words) */
875 u_int16_t snscb_res1;
877 u_int16_t snscb_mword_div_2;
878 u_int32_t snscb_res3;
879 u_int32_t snscb_fc4_type;
881 #define SNS_GID_FT_REQ_SIZE (sizeof (sns_gid_ft_req_t))
884 u_int16_t snscb_rblen; /* response buffer length (words) */
885 u_int16_t snscb_res0;
886 u_int16_t snscb_addr[4]; /* response buffer address */
887 u_int16_t snscb_sblen; /* subcommand buffer length (words) */
888 u_int16_t snscb_res1;
890 u_int16_t snscb_res2;
891 u_int32_t snscb_res3;
892 u_int32_t snscb_port;
893 u_int32_t snscb_fc4_types[8];
895 #define SNS_RFT_ID_REQ_SIZE (sizeof (sns_rft_id_req_t))
898 ct_hdr_t snscb_cthdr;
899 u_int8_t snscb_port_type;
900 u_int8_t snscb_port_id[3];
901 u_int8_t snscb_portname[8];
902 u_int16_t snscb_data[1]; /* variable data */
903 } sns_scrsp_t; /* Subcommand Response Structure */
906 ct_hdr_t snscb_cthdr;
907 u_int8_t snscb_port_type;
908 u_int8_t snscb_port_id[3];
909 u_int8_t snscb_portname[8];
910 u_int8_t snscb_pnlen; /* symbolic port name length */
911 u_int8_t snscb_pname[255]; /* symbolic port name */
912 u_int8_t snscb_nodename[8];
913 u_int8_t snscb_nnlen; /* symbolic node name length */
914 u_int8_t snscb_nname[255]; /* symbolic node name */
915 u_int8_t snscb_ipassoc[8];
916 u_int8_t snscb_ipaddr[16];
917 u_int8_t snscb_svc_class[4];
918 u_int8_t snscb_fc4_types[32];
919 u_int8_t snscb_fpname[8];
920 u_int8_t snscb_reserved;
921 u_int8_t snscb_hardaddr[3];
922 } sns_ga_nxt_rsp_t; /* Subcommand Response Structure */
923 #define SNS_GA_NXT_RESP_SIZE (sizeof (sns_ga_nxt_rsp_t))
926 ct_hdr_t snscb_cthdr;
927 u_int8_t snscb_wwn[8];
929 #define SNS_GXN_ID_RESP_SIZE (sizeof (sns_gxn_id_rsp_t))
932 ct_hdr_t snscb_cthdr;
933 u_int32_t snscb_fc4_features[32];
935 #define SNS_GFF_ID_RESP_SIZE (sizeof (sns_gff_id_rsp_t))
938 ct_hdr_t snscb_cthdr;
944 #define SNS_GID_FT_RESP_SIZE(x) ((sizeof (sns_gid_ft_rsp_t)) + ((x - 1) << 2))
946 #define SNS_RFT_ID_RESP_SIZE (sizeof (ct_hdr_t))
948 #endif /* _ISPMBOX_H */