4 * Copyright (c) 2004, 2005
5 * Damien Bergamini <damien.bergamini@free.fr>. All rights reserved.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice unmodified, this list of conditions, and the following
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 #define IWI_CMD_RING_COUNT 16
31 #define IWI_TX_RING_COUNT 64
32 #define IWI_RX_RING_COUNT 32
34 #define IWI_TX_DESC_SIZE (sizeof (struct iwi_tx_desc))
35 #define IWI_CMD_DESC_SIZE (sizeof (struct iwi_cmd_desc))
37 #define IWI_CSR_INTR 0x0008
38 #define IWI_CSR_INTR_MASK 0x000c
39 #define IWI_CSR_INDIRECT_ADDR 0x0010
40 #define IWI_CSR_INDIRECT_DATA 0x0014
41 #define IWI_CSR_AUTOINC_ADDR 0x0018
42 #define IWI_CSR_AUTOINC_DATA 0x001c
43 #define IWI_CSR_RST 0x0020
44 #define IWI_CSR_CTL 0x0024
45 #define IWI_CSR_IO 0x0030
46 #define IWI_CSR_CMD_BASE 0x0200
47 #define IWI_CSR_CMD_SIZE 0x0204
48 #define IWI_CSR_TX1_BASE 0x0208
49 #define IWI_CSR_TX1_SIZE 0x020c
50 #define IWI_CSR_TX2_BASE 0x0210
51 #define IWI_CSR_TX2_SIZE 0x0214
52 #define IWI_CSR_TX3_BASE 0x0218
53 #define IWI_CSR_TX3_SIZE 0x021c
54 #define IWI_CSR_TX4_BASE 0x0220
55 #define IWI_CSR_TX4_SIZE 0x0224
56 #define IWI_CSR_CMD_RIDX 0x0280
57 #define IWI_CSR_TX1_RIDX 0x0284
58 #define IWI_CSR_TX2_RIDX 0x0288
59 #define IWI_CSR_TX3_RIDX 0x028c
60 #define IWI_CSR_TX4_RIDX 0x0290
61 #define IWI_CSR_RX_RIDX 0x02a0
62 #define IWI_CSR_RX_BASE 0x0500
63 #define IWI_CSR_TABLE0_SIZE 0x0700
64 #define IWI_CSR_TABLE0_BASE 0x0704
65 #define IWI_CSR_NODE_BASE 0x0c0c
66 #define IWI_CSR_CMD_WIDX 0x0f80
67 #define IWI_CSR_TX1_WIDX 0x0f84
68 #define IWI_CSR_TX2_WIDX 0x0f88
69 #define IWI_CSR_TX3_WIDX 0x0f8c
70 #define IWI_CSR_TX4_WIDX 0x0f90
71 #define IWI_CSR_RX_WIDX 0x0fa0
72 #define IWI_CSR_READ_INT 0x0ff4
75 #define IWI_CSR_CURRENT_TX_RATE IWI_CSR_TABLE0_BASE
77 /* flags for IWI_CSR_INTR */
78 #define IWI_INTR_RX_DONE 0x00000002
79 #define IWI_INTR_CMD_DONE 0x00000800
80 #define IWI_INTR_TX1_DONE 0x00001000
81 #define IWI_INTR_TX2_DONE 0x00002000
82 #define IWI_INTR_TX3_DONE 0x00004000
83 #define IWI_INTR_TX4_DONE 0x00008000
84 #define IWI_INTR_FW_INITED 0x01000000
85 #define IWI_INTR_RADIO_OFF 0x04000000
86 #define IWI_INTR_FATAL_ERROR 0x40000000
87 #define IWI_INTR_PARITY_ERROR 0x80000000
89 #define IWI_INTR_MASK \
90 (IWI_INTR_RX_DONE | IWI_INTR_CMD_DONE | IWI_INTR_TX1_DONE | \
91 IWI_INTR_TX2_DONE | IWI_INTR_TX3_DONE | IWI_INTR_TX4_DONE | \
92 IWI_INTR_FW_INITED | IWI_INTR_RADIO_OFF | \
93 IWI_INTR_FATAL_ERROR | IWI_INTR_PARITY_ERROR)
95 /* flags for IWI_CSR_RST */
96 #define IWI_RST_PRINCETON_RESET 0x00000001
97 #define IWI_RST_STANDBY 0x00000004
98 #define IWI_RST_LED_ACTIVITY 0x00000010 /* tx/rx traffic led */
99 #define IWI_RST_LED_ASSOCIATED 0x00000020 /* station associated led */
100 #define IWI_RST_LED_OFDM 0x00000040 /* ofdm/cck led */
101 #define IWI_RST_SOFT_RESET 0x00000080
102 #define IWI_RST_MASTER_DISABLED 0x00000100
103 #define IWI_RST_STOP_MASTER 0x00000200
104 #define IWI_RST_GATE_ODMA 0x02000000
105 #define IWI_RST_GATE_IDMA 0x04000000
106 #define IWI_RST_GATE_ADMA 0x20000000
108 /* flags for IWI_CSR_CTL */
109 #define IWI_CTL_CLOCK_READY 0x00000001
110 #define IWI_CTL_ALLOW_STANDBY 0x00000002
111 #define IWI_CTL_INIT 0x00000004
113 /* flags for IWI_CSR_IO */
114 #define IWI_IO_RADIO_ENABLED 0x00010000
116 /* flags for IWI_CSR_READ_INT */
117 #define IWI_READ_INT_INIT_HOST 0x20000000
119 /* constants for command blocks */
120 #define IWI_CB_DEFAULT_CTL 0x8cea0000
121 #define IWI_CB_MAXDATALEN 8191
123 /* supported rates */
124 #define IWI_RATE_DS1 10
125 #define IWI_RATE_DS2 20
126 #define IWI_RATE_DS5 55
127 #define IWI_RATE_DS11 110
128 #define IWI_RATE_OFDM6 13
129 #define IWI_RATE_OFDM9 15
130 #define IWI_RATE_OFDM12 5
131 #define IWI_RATE_OFDM18 7
132 #define IWI_RATE_OFDM24 9
133 #define IWI_RATE_OFDM36 11
134 #define IWI_RATE_OFDM48 1
135 #define IWI_RATE_OFDM54 3
138 * Old version firmware images start with this header,
139 * fields are in little endian (le32) format.
141 struct iwi_firmware_ohdr {
145 #define IWI_FW_REQ_MAJOR 2
146 #define IWI_FW_REQ_MINOR 4
147 #define IWI_FW_GET_MAJOR(ver) ((ver) & 0xff)
148 #define IWI_FW_GET_MINOR(ver) (((ver) & 0xff00) >> 8)
150 #define IWI_FW_MODE_UCODE 0
151 #define IWI_FW_MODE_BOOT 0
152 #define IWI_FW_MODE_BSS 0
153 #define IWI_FW_MODE_IBSS 1
154 #define IWI_FW_MODE_MONITOR 2
157 * New version firmware images contain boot, ucode and firmware
158 * all in one chunk. The header at the beginning gives the version
159 * and the size of each (sub)image, in le32 format.
161 struct iwi_firmware_hdr {
162 uint32_t version; /* version stamp */
163 uint32_t bsize; /* size of boot image */
164 uint32_t usize; /* size of ucode image */
165 uint32_t fsize; /* size of firmware image */
170 #define IWI_HDR_TYPE_DATA 0
171 #define IWI_HDR_TYPE_COMMAND 1
172 #define IWI_HDR_TYPE_NOTIF 3
173 #define IWI_HDR_TYPE_FRAME 9
177 #define IWI_HDR_FLAG_IRQ 0x04
183 uint32_t reserved[2];
185 #define IWI_NOTIF_TYPE_SUCCESS 0
186 #define IWI_NOTIF_TYPE_UNSPECIFIED 1 /* unspecified failure */
187 #define IWI_NOTIF_TYPE_ASSOCIATION 10
188 #define IWI_NOTIF_TYPE_AUTHENTICATION 11
189 #define IWI_NOTIF_TYPE_SCAN_CHANNEL 12
190 #define IWI_NOTIF_TYPE_SCAN_COMPLETE 13
191 #define IWI_NOTIF_TYPE_FRAG_LENGTH 14
192 #define IWI_NOTIF_TYPE_LINK_QUALITY 15 /* "link deterioration" */
193 #define IWI_NOTIF_TYPE_BEACON 17 /* beacon state, e.g. miss */
194 #define IWI_NOTIF_TYPE_TGI_TX_KEY 18 /* WPA transmit key */
195 #define IWI_NOTIF_TYPE_CALIBRATION 20
196 #define IWI_NOTIF_TYPE_NOISE 25
202 /* structure for notification IWI_NOTIF_TYPE_AUTHENTICATION */
203 struct iwi_notif_authentication {
205 #define IWI_AUTH_FAIL 0
206 #define IWI_AUTH_SENT_1 1 /* tx first frame */
207 #define IWI_AUTH_RECV_2 2 /* rx second frame */
208 #define IWI_AUTH_SEQ1_PASS 3 /* 1st exchange passed */
209 #define IWI_AUTH_SEQ1_FAIL 4 /* 1st exchange failed */
210 #define IWI_AUTH_SUCCESS 9
213 /* structure for notification IWI_NOTIF_TYPE_ASSOCIATION */
214 struct iwi_notif_association {
216 #define IWI_ASSOC_INIT 0
217 #define IWI_ASSOC_SUCCESS 12
221 /* structure for notification IWI_NOTIF_TYPE_SCAN_CHANNEL */
222 struct iwi_notif_scan_channel {
224 uint8_t reserved[47];
227 /* structure for notification IWI_NOTIF_TYPE_SCAN_COMPLETE */
228 struct iwi_notif_scan_complete {
235 /* structure for notification IWI_NOTIF_TYPE_BEACON */
236 struct iwi_notif_beacon_state {
238 #define IWI_BEACON_MISS 1
242 /* received frame header */
244 uint32_t reserved1[2];
255 uint8_t reserved2[2];
259 /* header for transmission */
263 uint8_t station; /* adhoc sta #, 0 for bss */
264 uint8_t reserved2[3];
266 #define IWI_DATA_CMD_TX 0x0b
272 #define IWI_DATA_FLAG_SHPREAMBLE 0x04
273 #define IWI_DATA_FLAG_NO_WEP 0x20
274 #define IWI_DATA_FLAG_NEED_ACK 0x80
277 #define IWI_DATA_XFLAG_QOS 0x10
280 uint8_t wepkey[IEEE80211_KEYBUF_SIZE];
283 uint8_t reserved3[10];
284 struct ieee80211_qosframe_addr4 wh;
289 #define IWI_MAX_NSEG 6
290 uint32_t seg_addr[IWI_MAX_NSEG];
291 uint16_t seg_len[IWI_MAX_NSEG];
295 struct iwi_cmd_desc {
298 #define IWI_CMD_ENABLE 2
299 #define IWI_CMD_SET_CONFIG 6
300 #define IWI_CMD_SET_ESSID 8
301 #define IWI_CMD_SET_MAC_ADDRESS 11
302 #define IWI_CMD_SET_RTS_THRESHOLD 15
303 #define IWI_CMD_SET_FRAG_THRESHOLD 16
304 #define IWI_CMD_SET_POWER_MODE 17
305 #define IWI_CMD_SET_WEP_KEY 18
306 #define IWI_CMD_SCAN 20
307 #define IWI_CMD_ASSOCIATE 21
308 #define IWI_CMD_SET_RATES 22
309 #define IWI_CMD_ABORT_SCAN 23
310 #define IWI_CMD_SET_WME_PARAMS 25
311 #define IWI_CMD_SCAN_EXT 26
312 #define IWI_CMD_SET_OPTIE 31
313 #define IWI_CMD_DISABLE 33
314 #define IWI_CMD_SET_IV 34
315 #define IWI_CMD_SET_TX_POWER 35
316 #define IWI_CMD_SET_SENSITIVITY 42
317 #define IWI_CMD_SET_WMEIE 84
324 /* node information (IBSS) */
325 struct iwi_ibssnode {
326 uint8_t bssid[IEEE80211_ADDR_LEN];
330 /* constants for 'mode' fields */
331 #define IWI_MODE_11A 0
332 #define IWI_MODE_11B 1
333 #define IWI_MODE_11G 2
335 /* possible values for command IWI_CMD_SET_POWER_MODE */
336 #define IWI_POWER_MODE_CAM 0 /* no power save */
337 #define IWI_POWER_MODE_PSP 3
338 #define IWI_POWER_MODE_MAX 5 /* max power save operation */
340 /* structure for command IWI_CMD_SET_RATES */
345 #define IWI_RATESET_TYPE_NEGOTIATED 0
346 #define IWI_RATESET_TYPE_SUPPORTED 1
349 #define IWI_RATESET_SIZE 12
350 uint8_t rates[IWI_RATESET_SIZE];
353 /* structure for command IWI_CMD_SET_TX_POWER */
360 #define IWI_TXPOWER_MAX 20
361 #define IWI_TXPOWER_RATIO (IEEE80211_TXPOWER_MAX / IWI_TXPOWER_MAX)
365 /* structure for command IWI_CMD_ASSOCIATE */
366 struct iwi_associate {
367 uint8_t chan; /* channel # */
368 uint8_t auth; /* type and key */
369 #define IWI_AUTH_OPEN 0
370 #define IWI_AUTH_SHARED 1
371 #define IWI_AUTH_NONE 3
373 uint8_t type; /* request */
374 #define IWI_HC_ASSOC 0
375 #define IWI_HC_REASSOC 1
376 #define IWI_HC_DISASSOC 2
377 #define IWI_HC_IBSS_START 3
378 #define IWI_HC_IBSS_RECONF 4
379 #define IWI_HC_DISASSOC_QUIET 5
382 #define IWI_POLICY_WME 1
383 #define IWI_POLICY_WPA 2
385 uint8_t plen; /* preamble length */
386 uint8_t mode; /* 11a, 11b, or 11g */
387 uint8_t bssid[IEEE80211_ADDR_LEN];
388 uint8_t tstamp[8]; /* tsf for beacon sync */
390 uint16_t lintval; /* listen interval */
391 uint16_t intval; /* beacon interval */
392 uint8_t dst[IEEE80211_ADDR_LEN];
393 uint16_t atim_window;
399 #define IWI_SCAN_CHANNELS 54
401 /* structure for command IWI_CMD_SCAN */
404 uint16_t dwelltime; /* channel dwell time (ms) */
405 uint8_t channels[IWI_SCAN_CHANNELS];
406 #define IWI_CHAN_5GHZ (0 << 6)
407 #define IWI_CHAN_2GHZ (1 << 6)
412 /* scan type codes */
413 #define IWI_SCAN_TYPE_PASSIVE_STOP 0 /* passive, stop on first beacon */
414 #define IWI_SCAN_TYPE_PASSIVE 1 /* passive, full dwell on channel */
415 #define IWI_SCAN_TYPE_DIRECTED 2 /* active, directed probe req */
416 #define IWI_SCAN_TYPE_BROADCAST 3 /* active, bcast probe req */
417 #define IWI_SCAN_TYPE_BDIRECTED 4 /* active, directed+bcast probe */
418 #define IWI_SCAN_TYPES 5
420 /* scan result codes */
421 #define IWI_SCAN_COMPLETED 1 /* scan compeleted sucessfully */
422 #define IWI_SCAN_ABORTED 2 /* scan was aborted by the driver */
424 /* structure for command IWI_CMD_SCAN_EXT */
425 struct iwi_scan_ext {
426 uint32_t full_scan_index;
427 uint8_t channels[IWI_SCAN_CHANNELS];
428 uint8_t scan_type[IWI_SCAN_CHANNELS / 2];
430 uint16_t dwell_time[IWI_SCAN_TYPES];
433 /* structure for command IWI_CMD_SET_CONFIG */
434 struct iwi_configuration {
435 uint8_t bluetooth_coexistence;
437 uint8_t answer_pbreq; /* answer bcast ssid probe req frames */
438 uint8_t allow_invalid_frames; /* accept data frames w/ errors */
439 uint8_t multicast_enabled; /* accept frames w/ any bssid */
440 uint8_t drop_unicast_unencrypted;
441 uint8_t disable_unicast_decryption;
442 uint8_t drop_multicast_unencrypted;
443 uint8_t disable_multicast_decryption;
444 uint8_t antenna; /* antenna diversity */
445 #define IWI_ANTENNA_AUTO 0 /* firmware selects best antenna */
446 #define IWI_ANTENNA_A 1 /* use antenna A only */
447 #define IWI_ANTENNA_B 3 /* use antenna B only */
448 #define IWI_ANTENNA_SLOWDIV 2 /* slow diversity algorithm */
449 uint8_t include_crc; /* include crc in rx'd frames */
450 uint8_t use_protection; /* auto-detect 11g operation */
451 uint8_t protection_ctsonly; /* use CTS-to-self protection */
452 uint8_t enable_multicast_filtering;
453 uint8_t bluetooth_threshold; /* collision threshold */
454 uint8_t silence_threshold; /* silence over/under threshold */
455 uint8_t allow_beacon_and_probe_resp;/* accept frames w/ any bssid */
456 uint8_t allow_mgt; /* accept frames w/ any bssid */
457 uint8_t noise_reported; /* report noise stats to host */
461 /* structure for command IWI_CMD_SET_WEP_KEY */
464 #define IWI_WEP_KEY_CMD_SETKEY 0x08
469 uint8_t key[IEEE80211_KEYBUF_SIZE];
472 /* structure for command IWI_CMD_SET_WME_PARAMS */
473 struct iwi_wme_params {
474 uint16_t cwmin[WME_NUM_AC];
475 uint16_t cwmax[WME_NUM_AC];
476 uint8_t aifsn[WME_NUM_AC];
477 uint8_t acm[WME_NUM_AC];
478 uint16_t burst[WME_NUM_AC];
481 /* structure for command IWI_CMD_SET_SENSITIVTY */
482 struct iwi_sensitivity {
483 uint16_t rssi; /* beacon rssi in dBm */
484 #define IWI_RSSI_TO_DBM 112
488 #define IWI_MEM_EEPROM_EVENT 0x00300004
489 #define IWI_MEM_EEPROM_CTL 0x00300040
491 #define IWI_EEPROM_MAC 0x21
492 #define IWI_EEPROM_NIC 0x25 /* nic type (lsb) */
493 #define IWI_EEPROM_SKU 0x25 /* nic type (msb) */
495 #define IWI_EEPROM_DELAY 1 /* minimum hold time (microsecond) */
497 #define IWI_EEPROM_C (1 << 0) /* Serial Clock */
498 #define IWI_EEPROM_S (1 << 1) /* Chip Select */
499 #define IWI_EEPROM_D (1 << 2) /* Serial data input */
500 #define IWI_EEPROM_Q (1 << 4) /* Serial data output */
502 #define IWI_EEPROM_SHIFT_D 2
503 #define IWI_EEPROM_SHIFT_Q 4
506 * control and status registers access macros
508 #define CSR_READ_1(sc, reg) \
509 bus_space_read_1((sc)->sc_st, (sc)->sc_sh, (reg))
511 #define CSR_READ_2(sc, reg) \
512 bus_space_read_2((sc)->sc_st, (sc)->sc_sh, (reg))
514 #define CSR_READ_4(sc, reg) \
515 bus_space_read_4((sc)->sc_st, (sc)->sc_sh, (reg))
517 #define CSR_READ_REGION_4(sc, offset, datap, count) \
518 bus_space_read_region_4((sc)->sc_st, (sc)->sc_sh, (offset), \
521 #define CSR_WRITE_1(sc, reg, val) \
522 bus_space_write_1((sc)->sc_st, (sc)->sc_sh, (reg), (val))
524 #define CSR_WRITE_2(sc, reg, val) \
525 bus_space_write_2((sc)->sc_st, (sc)->sc_sh, (reg), (val))
527 #define CSR_WRITE_4(sc, reg, val) \
528 bus_space_write_4((sc)->sc_st, (sc)->sc_sh, (reg), (val))
530 #define CSR_WRITE_REGION_1(sc, offset, datap, count) \
531 bus_space_write_region_1((sc)->sc_st, (sc)->sc_sh, (offset), \
535 * indirect memory space access macros
537 #define MEM_WRITE_1(sc, addr, val) do { \
538 CSR_WRITE_4((sc), IWI_CSR_INDIRECT_ADDR, (addr)); \
539 CSR_WRITE_1((sc), IWI_CSR_INDIRECT_DATA, (val)); \
540 } while (/* CONSTCOND */0)
542 #define MEM_WRITE_2(sc, addr, val) do { \
543 CSR_WRITE_4((sc), IWI_CSR_INDIRECT_ADDR, (addr)); \
544 CSR_WRITE_2((sc), IWI_CSR_INDIRECT_DATA, (val)); \
545 } while (/* CONSTCOND */0)
547 #define MEM_WRITE_4(sc, addr, val) do { \
548 CSR_WRITE_4((sc), IWI_CSR_INDIRECT_ADDR, (addr)); \
549 CSR_WRITE_4((sc), IWI_CSR_INDIRECT_DATA, (val)); \
550 } while (/* CONSTCOND */0)
552 #define MEM_WRITE_MULTI_1(sc, addr, buf, len) do { \
553 CSR_WRITE_4((sc), IWI_CSR_INDIRECT_ADDR, (addr)); \
554 CSR_WRITE_MULTI_1((sc), IWI_CSR_INDIRECT_DATA, (buf), (len)); \
555 } while (/* CONSTCOND */0)
558 * EEPROM access macro
560 #define IWI_EEPROM_CTL(sc, val) do { \
561 MEM_WRITE_4((sc), IWI_MEM_EEPROM_CTL, (val)); \
562 DELAY(IWI_EEPROM_DELAY); \
563 } while (/* CONSTCOND */0)