4 * Copyright (c) 2004, 2005
5 * Damien Bergamini <damien.bergamini@free.fr>. All rights reserved.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice unmodified, this list of conditions, and the following
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 #define IWI_CMD_RING_COUNT 16
31 #define IWI_TX_RING_COUNT 64
32 #define IWI_RX_RING_COUNT 32
34 #define IWI_TX_DESC_SIZE (sizeof (struct iwi_tx_desc))
35 #define IWI_CMD_DESC_SIZE (sizeof (struct iwi_cmd_desc))
37 #define IWI_CSR_INTR 0x0008
38 #define IWI_CSR_INTR_MASK 0x000c
39 #define IWI_CSR_INDIRECT_ADDR 0x0010
40 #define IWI_CSR_INDIRECT_DATA 0x0014
41 #define IWI_CSR_AUTOINC_ADDR 0x0018
42 #define IWI_CSR_AUTOINC_DATA 0x001c
43 #define IWI_CSR_RST 0x0020
44 #define IWI_CSR_CTL 0x0024
45 #define IWI_CSR_IO 0x0030
46 #define IWI_CSR_CMD_BASE 0x0200
47 #define IWI_CSR_CMD_SIZE 0x0204
48 #define IWI_CSR_TX1_BASE 0x0208
49 #define IWI_CSR_TX1_SIZE 0x020c
50 #define IWI_CSR_TX2_BASE 0x0210
51 #define IWI_CSR_TX2_SIZE 0x0214
52 #define IWI_CSR_TX3_BASE 0x0218
53 #define IWI_CSR_TX3_SIZE 0x021c
54 #define IWI_CSR_TX4_BASE 0x0220
55 #define IWI_CSR_TX4_SIZE 0x0224
56 #define IWI_CSR_CMD_RIDX 0x0280
57 #define IWI_CSR_TX1_RIDX 0x0284
58 #define IWI_CSR_TX2_RIDX 0x0288
59 #define IWI_CSR_TX3_RIDX 0x028c
60 #define IWI_CSR_TX4_RIDX 0x0290
61 #define IWI_CSR_RX_RIDX 0x02a0
62 #define IWI_CSR_RX_BASE 0x0500
63 #define IWI_CSR_TABLE0_SIZE 0x0700
64 #define IWI_CSR_TABLE0_BASE 0x0704
65 #define IWI_CSR_NODE_BASE 0x0c0c
66 #define IWI_CSR_CMD_WIDX 0x0f80
67 #define IWI_CSR_TX1_WIDX 0x0f84
68 #define IWI_CSR_TX2_WIDX 0x0f88
69 #define IWI_CSR_TX3_WIDX 0x0f8c
70 #define IWI_CSR_TX4_WIDX 0x0f90
71 #define IWI_CSR_RX_WIDX 0x0fa0
72 #define IWI_CSR_READ_INT 0x0ff4
75 #define IWI_CSR_CURRENT_TX_RATE IWI_CSR_TABLE0_BASE
77 /* flags for IWI_CSR_INTR */
78 #define IWI_INTR_RX_DONE 0x00000002
79 #define IWI_INTR_CMD_DONE 0x00000800
80 #define IWI_INTR_TX1_DONE 0x00001000
81 #define IWI_INTR_TX2_DONE 0x00002000
82 #define IWI_INTR_TX3_DONE 0x00004000
83 #define IWI_INTR_TX4_DONE 0x00008000
84 #define IWI_INTR_FW_INITED 0x01000000
85 #define IWI_INTR_RADIO_OFF 0x04000000
86 #define IWI_INTR_FATAL_ERROR 0x40000000
87 #define IWI_INTR_PARITY_ERROR 0x80000000
89 #define IWI_INTR_MASK \
90 (IWI_INTR_RX_DONE | IWI_INTR_CMD_DONE | IWI_INTR_TX1_DONE | \
91 IWI_INTR_TX2_DONE | IWI_INTR_TX3_DONE | IWI_INTR_TX4_DONE | \
92 IWI_INTR_FW_INITED | IWI_INTR_RADIO_OFF | \
93 IWI_INTR_FATAL_ERROR | IWI_INTR_PARITY_ERROR)
95 /* flags for IWI_CSR_RST */
96 #define IWI_RST_PRINCETON_RESET 0x00000001
97 #define IWI_RST_STANDBY 0x00000004
98 #define IWI_RST_LED_ACTIVITY 0x00000010 /* tx/rx traffic led */
99 #define IWI_RST_LED_ASSOCIATED 0x00000020 /* station associated led */
100 #define IWI_RST_LED_OFDM 0x00000040 /* ofdm/cck led */
101 #define IWI_RST_SOFT_RESET 0x00000080
102 #define IWI_RST_MASTER_DISABLED 0x00000100
103 #define IWI_RST_STOP_MASTER 0x00000200
104 #define IWI_RST_GATE_ODMA 0x02000000
105 #define IWI_RST_GATE_IDMA 0x04000000
106 #define IWI_RST_GATE_ADMA 0x20000000
108 /* flags for IWI_CSR_CTL */
109 #define IWI_CTL_CLOCK_READY 0x00000001
110 #define IWI_CTL_ALLOW_STANDBY 0x00000002
111 #define IWI_CTL_INIT 0x00000004
113 /* flags for IWI_CSR_IO */
114 #define IWI_IO_RADIO_ENABLED 0x00010000
116 /* flags for IWI_CSR_READ_INT */
117 #define IWI_READ_INT_INIT_HOST 0x20000000
119 /* constants for command blocks */
120 #define IWI_CB_DEFAULT_CTL 0x8cea0000
121 #define IWI_CB_MAXDATALEN 8191
123 /* supported rates */
124 #define IWI_RATE_DS1 10
125 #define IWI_RATE_DS2 20
126 #define IWI_RATE_DS5 55
127 #define IWI_RATE_DS11 110
128 #define IWI_RATE_OFDM6 13
129 #define IWI_RATE_OFDM9 15
130 #define IWI_RATE_OFDM12 5
131 #define IWI_RATE_OFDM18 7
132 #define IWI_RATE_OFDM24 9
133 #define IWI_RATE_OFDM36 11
134 #define IWI_RATE_OFDM48 1
135 #define IWI_RATE_OFDM54 3
138 * Old version firmware images start with this header,
139 * fields are in little endian (le32) format.
141 struct iwi_firmware_ohdr {
145 #define IWI_FW_REQ_MAJOR 2
146 #define IWI_FW_REQ_MINOR 4
147 #define IWI_FW_GET_MAJOR(ver) ((ver) & 0xff)
148 #define IWI_FW_GET_MINOR(ver) (((ver) & 0xff00) >> 8)
150 #define IWI_FW_MODE_UCODE 0
151 #define IWI_FW_MODE_BOOT 0
152 #define IWI_FW_MODE_BSS 0
153 #define IWI_FW_MODE_IBSS 1
154 #define IWI_FW_MODE_MONITOR 2
157 * New version firmware images contain boot, ucode and firmware
158 * all in one chunk. The header at the beginning gives the version
159 * and the size of each (sub)image, in le32 format.
161 struct iwi_firmware_hdr {
162 uint32_t version; /* version stamp */
163 uint32_t bsize; /* size of boot image */
164 uint32_t usize; /* size of ucode image */
165 uint32_t fsize; /* size of firmware image */
170 #define IWI_HDR_TYPE_DATA 0
171 #define IWI_HDR_TYPE_COMMAND 1
172 #define IWI_HDR_TYPE_NOTIF 3
173 #define IWI_HDR_TYPE_FRAME 9
177 #define IWI_HDR_FLAG_IRQ 0x04
183 uint32_t reserved[2];
185 #define IWI_NOTIF_TYPE_SUCCESS 0
186 #define IWI_NOTIF_TYPE_UNSPECIFIED 1 /* unspecified failure */
187 #define IWI_NOTIF_TYPE_ASSOCIATION 10
188 #define IWI_NOTIF_TYPE_AUTHENTICATION 11
189 #define IWI_NOTIF_TYPE_SCAN_CHANNEL 12
190 #define IWI_NOTIF_TYPE_SCAN_COMPLETE 13
191 #define IWI_NOTIF_TYPE_FRAG_LENGTH 14
192 #define IWI_NOTIF_TYPE_LINK_QUALITY 15 /* "link deterioration" */
193 #define IWI_NOTIF_TYPE_BEACON 17 /* beacon state, e.g. miss */
194 #define IWI_NOTIF_TYPE_TGI_TX_KEY 18 /* WPA transmit key */
195 #define IWI_NOTIF_TYPE_CALIBRATION 20
196 #define IWI_NOTIF_TYPE_NOISE 25
202 /* structure for notification IWI_NOTIF_TYPE_AUTHENTICATION */
203 struct iwi_notif_authentication {
205 #define IWI_AUTH_FAIL 0
206 #define IWI_AUTH_SENT_1 1 /* tx first frame */
207 #define IWI_AUTH_RECV_2 2 /* rx second frame */
208 #define IWI_AUTH_SEQ1_PASS 3 /* 1st exchange passed */
209 #define IWI_AUTH_SEQ1_FAIL 4 /* 1st exchange failed */
210 #define IWI_AUTH_SUCCESS 9
213 /* structure for notification IWI_NOTIF_TYPE_ASSOCIATION */
214 struct iwi_notif_association {
216 #define IWI_ASSOC_INIT 0
217 #define IWI_ASSOC_SUCCESS 12
221 /* structure for notification IWI_NOTIF_TYPE_SCAN_CHANNEL */
222 struct iwi_notif_scan_channel {
224 /* XXX this is iwi_cmd_stats, and a u8 reserved field */
225 uint8_t reserved[47];
228 /* structure for notification IWI_NOTIF_TYPE_SCAN_COMPLETE */
229 struct iwi_notif_scan_complete {
236 /* structure for notification IWI_NOTIF_TYPE_BEACON */
237 struct iwi_notif_beacon_state {
239 #define IWI_BEACON_MISS 1
243 /* structure(s) for notification IWI_NOTIF_TYPE_LINK_QUALITY */
245 #define RX_FREE_BUFFERS 32
246 #define RX_LOW_WATERMARK 8
248 #define SUP_RATE_11A_MAX_NUM_CHANNELS 8
249 #define SUP_RATE_11B_MAX_NUM_CHANNELS 4
250 #define SUP_RATE_11G_MAX_NUM_CHANNELS 12
252 // Used for passing to driver number of successes and failures per rate
253 struct iwi_rate_histogram {
255 uint32_t a[SUP_RATE_11A_MAX_NUM_CHANNELS];
256 uint32_t b[SUP_RATE_11B_MAX_NUM_CHANNELS];
257 uint32_t g[SUP_RATE_11G_MAX_NUM_CHANNELS];
260 uint32_t a[SUP_RATE_11A_MAX_NUM_CHANNELS];
261 uint32_t b[SUP_RATE_11B_MAX_NUM_CHANNELS];
262 uint32_t g[SUP_RATE_11G_MAX_NUM_CHANNELS];
266 /* statistics command response */
267 struct iwi_cmd_stats {
272 uint16_t wrong_bssid;
274 uint16_t bad_mac_header;
275 uint16_t reserved_frame_types;
278 uint16_t invalid_cts;
279 uint16_t invalid_acks;
280 uint16_t long_distance_ina_fina;
281 uint16_t dsp_silence_unreachable;
282 uint16_t accumulated_rssi;
283 uint16_t rx_ovfl_frame_tossed;
284 uint16_t rssi_silence_threshold;
285 uint16_t rx_ovfl_frame_supplied;
286 uint16_t last_rx_frame_signal;
287 uint16_t last_rx_frame_noise;
288 uint16_t rx_autodetec_no_ofdm;
289 uint16_t rx_autodetec_no_barker;
293 #define SILENCE_OVER_THRESH (1)
294 #define SILENCE_UNDER_THRESH (2)
296 struct iwi_notif_link_quality {
297 struct iwi_cmd_stats stats;
300 struct iwi_rate_histogram histogram;
301 uint8_t silence_notification_type; /* SILENCE_OVER/UNDER_THRESH */
302 uint16_t silence_count;
305 /* received frame header */
307 uint32_t reserved1[2];
318 uint8_t reserved2[2];
322 /* header for transmission */
326 uint8_t station; /* adhoc sta #, 0 for bss */
327 uint8_t reserved2[3];
329 #define IWI_DATA_CMD_TX 0x0b
335 #define IWI_DATA_FLAG_SHPREAMBLE 0x04
336 #define IWI_DATA_FLAG_NO_WEP 0x20
337 #define IWI_DATA_FLAG_NEED_ACK 0x80
340 #define IWI_DATA_XFLAG_QOS 0x10
343 uint8_t wepkey[IEEE80211_KEYBUF_SIZE];
346 uint8_t reserved3[10];
347 struct ieee80211_qosframe_addr4 wh;
352 #define IWI_MAX_NSEG 6
353 uint32_t seg_addr[IWI_MAX_NSEG];
354 uint16_t seg_len[IWI_MAX_NSEG];
358 struct iwi_cmd_desc {
361 #define IWI_CMD_ENABLE 2
362 #define IWI_CMD_SET_CONFIG 6
363 #define IWI_CMD_SET_ESSID 8
364 #define IWI_CMD_SET_MAC_ADDRESS 11
365 #define IWI_CMD_SET_RTS_THRESHOLD 15
366 #define IWI_CMD_SET_FRAG_THRESHOLD 16
367 #define IWI_CMD_SET_POWER_MODE 17
368 #define IWI_CMD_SET_WEP_KEY 18
369 #define IWI_CMD_SCAN 20
370 #define IWI_CMD_ASSOCIATE 21
371 #define IWI_CMD_SET_RATES 22
372 #define IWI_CMD_ABORT_SCAN 23
373 #define IWI_CMD_SET_WME_PARAMS 25
374 #define IWI_CMD_SCAN_EXT 26
375 #define IWI_CMD_SET_OPTIE 31
376 #define IWI_CMD_DISABLE 33
377 #define IWI_CMD_SET_IV 34
378 #define IWI_CMD_SET_TX_POWER 35
379 #define IWI_CMD_SET_SENSITIVITY 42
380 #define IWI_CMD_SET_WMEIE 84
387 /* node information (IBSS) */
388 struct iwi_ibssnode {
389 uint8_t bssid[IEEE80211_ADDR_LEN];
393 /* constants for 'mode' fields */
394 #define IWI_MODE_11A 0
395 #define IWI_MODE_11B 1
396 #define IWI_MODE_11G 2
398 /* possible values for command IWI_CMD_SET_POWER_MODE */
399 #define IWI_POWER_MODE_CAM 0 /* no power save */
400 #define IWI_POWER_MODE_PSP 3
401 #define IWI_POWER_MODE_MAX 5 /* max power save operation */
403 /* structure for command IWI_CMD_SET_RATES */
408 #define IWI_RATESET_TYPE_NEGOTIATED 0
409 #define IWI_RATESET_TYPE_SUPPORTED 1
412 #define IWI_RATESET_SIZE 12
413 uint8_t rates[IWI_RATESET_SIZE];
416 /* structure for command IWI_CMD_SET_TX_POWER */
423 #define IWI_TXPOWER_MAX 20
424 #define IWI_TXPOWER_RATIO (IEEE80211_TXPOWER_MAX / IWI_TXPOWER_MAX)
428 /* structure for command IWI_CMD_ASSOCIATE */
429 struct iwi_associate {
430 uint8_t chan; /* channel # */
431 uint8_t auth; /* type and key */
432 #define IWI_AUTH_OPEN 0
433 #define IWI_AUTH_SHARED 1
434 #define IWI_AUTH_NONE 3
436 uint8_t type; /* request */
437 #define IWI_HC_ASSOC 0
438 #define IWI_HC_REASSOC 1
439 #define IWI_HC_DISASSOC 2
440 #define IWI_HC_IBSS_START 3
441 #define IWI_HC_IBSS_RECONF 4
442 #define IWI_HC_DISASSOC_QUIET 5
445 #define IWI_POLICY_WME 1
446 #define IWI_POLICY_WPA 2
448 uint8_t plen; /* preamble length */
449 uint8_t mode; /* 11a, 11b, or 11g */
450 uint8_t bssid[IEEE80211_ADDR_LEN];
451 uint8_t tstamp[8]; /* tsf for beacon sync */
453 uint16_t lintval; /* listen interval */
454 uint16_t intval; /* beacon interval */
455 uint8_t dst[IEEE80211_ADDR_LEN];
456 uint16_t atim_window;
462 #define IWI_SCAN_CHANNELS 54
464 /* structure for command IWI_CMD_SCAN */
467 uint16_t dwelltime; /* channel dwell time (ms) */
468 uint8_t channels[IWI_SCAN_CHANNELS];
469 #define IWI_CHAN_5GHZ (0 << 6)
470 #define IWI_CHAN_2GHZ (1 << 6)
475 /* scan type codes */
476 #define IWI_SCAN_TYPE_PASSIVE_STOP 0 /* passive, stop on first beacon */
477 #define IWI_SCAN_TYPE_PASSIVE 1 /* passive, full dwell on channel */
478 #define IWI_SCAN_TYPE_DIRECTED 2 /* active, directed probe req */
479 #define IWI_SCAN_TYPE_BROADCAST 3 /* active, bcast probe req */
480 #define IWI_SCAN_TYPE_BDIRECTED 4 /* active, directed+bcast probe */
481 #define IWI_SCAN_TYPES 5
483 /* scan result codes */
484 #define IWI_SCAN_COMPLETED 1 /* scan compeleted successfully */
485 #define IWI_SCAN_ABORTED 2 /* scan was aborted by the driver */
487 /* structure for command IWI_CMD_SCAN_EXT */
488 struct iwi_scan_ext {
489 uint32_t full_scan_index;
490 uint8_t channels[IWI_SCAN_CHANNELS];
491 uint8_t scan_type[IWI_SCAN_CHANNELS / 2];
493 uint16_t dwell_time[IWI_SCAN_TYPES];
496 /* structure for command IWI_CMD_SET_CONFIG */
497 struct iwi_configuration {
498 uint8_t bluetooth_coexistence;
500 uint8_t answer_pbreq; /* answer bcast ssid probe req frames */
501 uint8_t allow_invalid_frames; /* accept data frames w/ errors */
502 uint8_t multicast_enabled; /* accept frames w/ any bssid */
503 uint8_t drop_unicast_unencrypted;
504 uint8_t disable_unicast_decryption;
505 uint8_t drop_multicast_unencrypted;
506 uint8_t disable_multicast_decryption;
507 uint8_t antenna; /* antenna diversity */
508 #define IWI_ANTENNA_AUTO 0 /* firmware selects best antenna */
509 #define IWI_ANTENNA_A 1 /* use antenna A only */
510 #define IWI_ANTENNA_B 3 /* use antenna B only */
511 #define IWI_ANTENNA_SLOWDIV 2 /* slow diversity algorithm */
512 uint8_t include_crc; /* include crc in rx'd frames */
513 uint8_t use_protection; /* auto-detect 11g operation */
514 uint8_t protection_ctsonly; /* use CTS-to-self protection */
515 uint8_t enable_multicast_filtering;
516 uint8_t bluetooth_threshold; /* collision threshold */
517 uint8_t silence_threshold; /* silence over/under threshold */
518 uint8_t allow_beacon_and_probe_resp;/* accept frames w/ any bssid */
519 uint8_t allow_mgt; /* accept frames w/ any bssid */
520 uint8_t noise_reported; /* report noise stats to host */
524 /* structure for command IWI_CMD_SET_WEP_KEY */
527 #define IWI_WEP_KEY_CMD_SETKEY 0x08
532 uint8_t key[IEEE80211_KEYBUF_SIZE];
535 /* structure for command IWI_CMD_SET_WME_PARAMS */
536 struct iwi_wme_params {
537 uint16_t cwmin[WME_NUM_AC];
538 uint16_t cwmax[WME_NUM_AC];
539 uint8_t aifsn[WME_NUM_AC];
540 uint8_t acm[WME_NUM_AC];
541 uint16_t burst[WME_NUM_AC];
544 /* structure for command IWI_CMD_SET_SENSITIVTY */
545 struct iwi_sensitivity {
546 uint16_t rssi; /* beacon rssi in dBm */
547 #define IWI_RSSI_TO_DBM 112
551 #define IWI_MEM_EEPROM_EVENT 0x00300004
552 #define IWI_MEM_EEPROM_CTL 0x00300040
554 #define IWI_EEPROM_MAC 0x21
555 #define IWI_EEPROM_NIC 0x25 /* nic type (lsb) */
556 #define IWI_EEPROM_SKU 0x25 /* nic type (msb) */
558 #define IWI_EEPROM_DELAY 1 /* minimum hold time (microsecond) */
560 #define IWI_EEPROM_C (1 << 0) /* Serial Clock */
561 #define IWI_EEPROM_S (1 << 1) /* Chip Select */
562 #define IWI_EEPROM_D (1 << 2) /* Serial data input */
563 #define IWI_EEPROM_Q (1 << 4) /* Serial data output */
565 #define IWI_EEPROM_SHIFT_D 2
566 #define IWI_EEPROM_SHIFT_Q 4
569 * control and status registers access macros
571 #define CSR_READ_1(sc, reg) \
572 bus_space_read_1((sc)->sc_st, (sc)->sc_sh, (reg))
574 #define CSR_READ_2(sc, reg) \
575 bus_space_read_2((sc)->sc_st, (sc)->sc_sh, (reg))
577 #define CSR_READ_4(sc, reg) \
578 bus_space_read_4((sc)->sc_st, (sc)->sc_sh, (reg))
580 #define CSR_READ_REGION_4(sc, offset, datap, count) \
581 bus_space_read_region_4((sc)->sc_st, (sc)->sc_sh, (offset), \
584 #define CSR_WRITE_1(sc, reg, val) \
585 bus_space_write_1((sc)->sc_st, (sc)->sc_sh, (reg), (val))
587 #define CSR_WRITE_2(sc, reg, val) \
588 bus_space_write_2((sc)->sc_st, (sc)->sc_sh, (reg), (val))
590 #define CSR_WRITE_4(sc, reg, val) \
591 bus_space_write_4((sc)->sc_st, (sc)->sc_sh, (reg), (val))
593 #define CSR_WRITE_REGION_1(sc, offset, datap, count) \
594 bus_space_write_region_1((sc)->sc_st, (sc)->sc_sh, (offset), \
598 * indirect memory space access macros
600 #define MEM_WRITE_1(sc, addr, val) do { \
601 CSR_WRITE_4((sc), IWI_CSR_INDIRECT_ADDR, (addr)); \
602 CSR_WRITE_1((sc), IWI_CSR_INDIRECT_DATA, (val)); \
603 } while (/* CONSTCOND */0)
605 #define MEM_WRITE_2(sc, addr, val) do { \
606 CSR_WRITE_4((sc), IWI_CSR_INDIRECT_ADDR, (addr)); \
607 CSR_WRITE_2((sc), IWI_CSR_INDIRECT_DATA, (val)); \
608 } while (/* CONSTCOND */0)
610 #define MEM_WRITE_4(sc, addr, val) do { \
611 CSR_WRITE_4((sc), IWI_CSR_INDIRECT_ADDR, (addr)); \
612 CSR_WRITE_4((sc), IWI_CSR_INDIRECT_DATA, (val)); \
613 } while (/* CONSTCOND */0)
615 #define MEM_WRITE_MULTI_1(sc, addr, buf, len) do { \
616 CSR_WRITE_4((sc), IWI_CSR_INDIRECT_ADDR, (addr)); \
617 CSR_WRITE_MULTI_1((sc), IWI_CSR_INDIRECT_DATA, (buf), (len)); \
618 } while (/* CONSTCOND */0)
621 * EEPROM access macro
623 #define IWI_EEPROM_CTL(sc, val) do { \
624 MEM_WRITE_4((sc), IWI_MEM_EEPROM_CTL, (val)); \
625 DELAY(IWI_EEPROM_DELAY); \
626 } while (/* CONSTCOND */0)