4 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
6 * Copyright (c) 2004, 2005
7 * Damien Bergamini <damien.bergamini@free.fr>. All rights reserved.
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
12 * 1. Redistributions of source code must retain the above copyright
13 * notice unmodified, this list of conditions, and the following
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
23 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 #define IWI_CMD_RING_COUNT 16
33 #define IWI_TX_RING_COUNT 64
34 #define IWI_RX_RING_COUNT 32
36 #define IWI_TX_DESC_SIZE (sizeof (struct iwi_tx_desc))
37 #define IWI_CMD_DESC_SIZE (sizeof (struct iwi_cmd_desc))
39 #define IWI_CSR_INTR 0x0008
40 #define IWI_CSR_INTR_MASK 0x000c
41 #define IWI_CSR_INDIRECT_ADDR 0x0010
42 #define IWI_CSR_INDIRECT_DATA 0x0014
43 #define IWI_CSR_AUTOINC_ADDR 0x0018
44 #define IWI_CSR_AUTOINC_DATA 0x001c
45 #define IWI_CSR_RST 0x0020
46 #define IWI_CSR_CTL 0x0024
47 #define IWI_CSR_IO 0x0030
48 #define IWI_CSR_CMD_BASE 0x0200
49 #define IWI_CSR_CMD_SIZE 0x0204
50 #define IWI_CSR_TX1_BASE 0x0208
51 #define IWI_CSR_TX1_SIZE 0x020c
52 #define IWI_CSR_TX2_BASE 0x0210
53 #define IWI_CSR_TX2_SIZE 0x0214
54 #define IWI_CSR_TX3_BASE 0x0218
55 #define IWI_CSR_TX3_SIZE 0x021c
56 #define IWI_CSR_TX4_BASE 0x0220
57 #define IWI_CSR_TX4_SIZE 0x0224
58 #define IWI_CSR_CMD_RIDX 0x0280
59 #define IWI_CSR_TX1_RIDX 0x0284
60 #define IWI_CSR_TX2_RIDX 0x0288
61 #define IWI_CSR_TX3_RIDX 0x028c
62 #define IWI_CSR_TX4_RIDX 0x0290
63 #define IWI_CSR_RX_RIDX 0x02a0
64 #define IWI_CSR_RX_BASE 0x0500
65 #define IWI_CSR_TABLE0_SIZE 0x0700
66 #define IWI_CSR_TABLE0_BASE 0x0704
67 #define IWI_CSR_NODE_BASE 0x0c0c
68 #define IWI_CSR_CMD_WIDX 0x0f80
69 #define IWI_CSR_TX1_WIDX 0x0f84
70 #define IWI_CSR_TX2_WIDX 0x0f88
71 #define IWI_CSR_TX3_WIDX 0x0f8c
72 #define IWI_CSR_TX4_WIDX 0x0f90
73 #define IWI_CSR_RX_WIDX 0x0fa0
74 #define IWI_CSR_READ_INT 0x0ff4
77 #define IWI_CSR_CURRENT_TX_RATE IWI_CSR_TABLE0_BASE
79 /* flags for IWI_CSR_INTR */
80 #define IWI_INTR_RX_DONE 0x00000002
81 #define IWI_INTR_CMD_DONE 0x00000800
82 #define IWI_INTR_TX1_DONE 0x00001000
83 #define IWI_INTR_TX2_DONE 0x00002000
84 #define IWI_INTR_TX3_DONE 0x00004000
85 #define IWI_INTR_TX4_DONE 0x00008000
86 #define IWI_INTR_FW_INITED 0x01000000
87 #define IWI_INTR_RADIO_OFF 0x04000000
88 #define IWI_INTR_FATAL_ERROR 0x40000000
89 #define IWI_INTR_PARITY_ERROR 0x80000000
91 #define IWI_INTR_MASK \
92 (IWI_INTR_RX_DONE | IWI_INTR_CMD_DONE | IWI_INTR_TX1_DONE | \
93 IWI_INTR_TX2_DONE | IWI_INTR_TX3_DONE | IWI_INTR_TX4_DONE | \
94 IWI_INTR_FW_INITED | IWI_INTR_RADIO_OFF | \
95 IWI_INTR_FATAL_ERROR | IWI_INTR_PARITY_ERROR)
97 /* flags for IWI_CSR_RST */
98 #define IWI_RST_PRINCETON_RESET 0x00000001
99 #define IWI_RST_STANDBY 0x00000004
100 #define IWI_RST_LED_ACTIVITY 0x00000010 /* tx/rx traffic led */
101 #define IWI_RST_LED_ASSOCIATED 0x00000020 /* station associated led */
102 #define IWI_RST_LED_OFDM 0x00000040 /* ofdm/cck led */
103 #define IWI_RST_SOFT_RESET 0x00000080
104 #define IWI_RST_MASTER_DISABLED 0x00000100
105 #define IWI_RST_STOP_MASTER 0x00000200
106 #define IWI_RST_GATE_ODMA 0x02000000
107 #define IWI_RST_GATE_IDMA 0x04000000
108 #define IWI_RST_GATE_ADMA 0x20000000
110 /* flags for IWI_CSR_CTL */
111 #define IWI_CTL_CLOCK_READY 0x00000001
112 #define IWI_CTL_ALLOW_STANDBY 0x00000002
113 #define IWI_CTL_INIT 0x00000004
115 /* flags for IWI_CSR_IO */
116 #define IWI_IO_RADIO_ENABLED 0x00010000
118 /* flags for IWI_CSR_READ_INT */
119 #define IWI_READ_INT_INIT_HOST 0x20000000
121 /* constants for command blocks */
122 #define IWI_CB_DEFAULT_CTL 0x8cea0000
123 #define IWI_CB_MAXDATALEN 8191
125 /* supported rates */
126 #define IWI_RATE_DS1 10
127 #define IWI_RATE_DS2 20
128 #define IWI_RATE_DS5 55
129 #define IWI_RATE_DS11 110
130 #define IWI_RATE_OFDM6 13
131 #define IWI_RATE_OFDM9 15
132 #define IWI_RATE_OFDM12 5
133 #define IWI_RATE_OFDM18 7
134 #define IWI_RATE_OFDM24 9
135 #define IWI_RATE_OFDM36 11
136 #define IWI_RATE_OFDM48 1
137 #define IWI_RATE_OFDM54 3
140 * Old version firmware images start with this header,
141 * fields are in little endian (le32) format.
143 struct iwi_firmware_ohdr {
147 #define IWI_FW_REQ_MAJOR 2
148 #define IWI_FW_REQ_MINOR 4
149 #define IWI_FW_GET_MAJOR(ver) ((ver) & 0xff)
150 #define IWI_FW_GET_MINOR(ver) (((ver) & 0xff00) >> 8)
152 #define IWI_FW_MODE_UCODE 0
153 #define IWI_FW_MODE_BOOT 0
154 #define IWI_FW_MODE_BSS 0
155 #define IWI_FW_MODE_IBSS 1
156 #define IWI_FW_MODE_MONITOR 2
159 * New version firmware images contain boot, ucode and firmware
160 * all in one chunk. The header at the beginning gives the version
161 * and the size of each (sub)image, in le32 format.
163 struct iwi_firmware_hdr {
164 uint32_t version; /* version stamp */
165 uint32_t bsize; /* size of boot image */
166 uint32_t usize; /* size of ucode image */
167 uint32_t fsize; /* size of firmware image */
172 #define IWI_HDR_TYPE_DATA 0
173 #define IWI_HDR_TYPE_COMMAND 1
174 #define IWI_HDR_TYPE_NOTIF 3
175 #define IWI_HDR_TYPE_FRAME 9
179 #define IWI_HDR_FLAG_IRQ 0x04
185 uint32_t reserved[2];
187 #define IWI_NOTIF_TYPE_SUCCESS 0
188 #define IWI_NOTIF_TYPE_UNSPECIFIED 1 /* unspecified failure */
189 #define IWI_NOTIF_TYPE_ASSOCIATION 10
190 #define IWI_NOTIF_TYPE_AUTHENTICATION 11
191 #define IWI_NOTIF_TYPE_SCAN_CHANNEL 12
192 #define IWI_NOTIF_TYPE_SCAN_COMPLETE 13
193 #define IWI_NOTIF_TYPE_FRAG_LENGTH 14
194 #define IWI_NOTIF_TYPE_LINK_QUALITY 15 /* "link deterioration" */
195 #define IWI_NOTIF_TYPE_BEACON 17 /* beacon state, e.g. miss */
196 #define IWI_NOTIF_TYPE_TGI_TX_KEY 18 /* WPA transmit key */
197 #define IWI_NOTIF_TYPE_CALIBRATION 20
198 #define IWI_NOTIF_TYPE_NOISE 25
204 /* structure for notification IWI_NOTIF_TYPE_AUTHENTICATION */
205 struct iwi_notif_authentication {
207 #define IWI_AUTH_FAIL 0
208 #define IWI_AUTH_SENT_1 1 /* tx first frame */
209 #define IWI_AUTH_RECV_2 2 /* rx second frame */
210 #define IWI_AUTH_SEQ1_PASS 3 /* 1st exchange passed */
211 #define IWI_AUTH_SEQ1_FAIL 4 /* 1st exchange failed */
212 #define IWI_AUTH_SUCCESS 9
215 /* structure for notification IWI_NOTIF_TYPE_ASSOCIATION */
216 struct iwi_notif_association {
218 #define IWI_ASSOC_INIT 0
219 #define IWI_ASSOC_SUCCESS 12
223 /* structure for notification IWI_NOTIF_TYPE_SCAN_CHANNEL */
224 struct iwi_notif_scan_channel {
226 /* XXX this is iwi_cmd_stats, and a u8 reserved field */
227 uint8_t reserved[47];
230 /* structure for notification IWI_NOTIF_TYPE_SCAN_COMPLETE */
231 struct iwi_notif_scan_complete {
238 /* structure for notification IWI_NOTIF_TYPE_BEACON */
239 struct iwi_notif_beacon_state {
241 #define IWI_BEACON_MISS 1
245 /* structure(s) for notification IWI_NOTIF_TYPE_LINK_QUALITY */
247 #define RX_FREE_BUFFERS 32
248 #define RX_LOW_WATERMARK 8
250 #define SUP_RATE_11A_MAX_NUM_CHANNELS 8
251 #define SUP_RATE_11B_MAX_NUM_CHANNELS 4
252 #define SUP_RATE_11G_MAX_NUM_CHANNELS 12
254 // Used for passing to driver number of successes and failures per rate
255 struct iwi_rate_histogram {
257 uint32_t a[SUP_RATE_11A_MAX_NUM_CHANNELS];
258 uint32_t b[SUP_RATE_11B_MAX_NUM_CHANNELS];
259 uint32_t g[SUP_RATE_11G_MAX_NUM_CHANNELS];
262 uint32_t a[SUP_RATE_11A_MAX_NUM_CHANNELS];
263 uint32_t b[SUP_RATE_11B_MAX_NUM_CHANNELS];
264 uint32_t g[SUP_RATE_11G_MAX_NUM_CHANNELS];
268 /* statistics command response */
269 struct iwi_cmd_stats {
274 uint16_t wrong_bssid;
276 uint16_t bad_mac_header;
277 uint16_t reserved_frame_types;
280 uint16_t invalid_cts;
281 uint16_t invalid_acks;
282 uint16_t long_distance_ina_fina;
283 uint16_t dsp_silence_unreachable;
284 uint16_t accumulated_rssi;
285 uint16_t rx_ovfl_frame_tossed;
286 uint16_t rssi_silence_threshold;
287 uint16_t rx_ovfl_frame_supplied;
288 uint16_t last_rx_frame_signal;
289 uint16_t last_rx_frame_noise;
290 uint16_t rx_autodetec_no_ofdm;
291 uint16_t rx_autodetec_no_barker;
295 #define SILENCE_OVER_THRESH (1)
296 #define SILENCE_UNDER_THRESH (2)
298 struct iwi_notif_link_quality {
299 struct iwi_cmd_stats stats;
302 struct iwi_rate_histogram histogram;
303 uint8_t silence_notification_type; /* SILENCE_OVER/UNDER_THRESH */
304 uint16_t silence_count;
307 /* received frame header */
309 uint32_t reserved1[2];
320 uint8_t reserved2[2];
324 /* header for transmission */
328 uint8_t station; /* adhoc sta #, 0 for bss */
329 uint8_t reserved2[3];
331 #define IWI_DATA_CMD_TX 0x0b
337 #define IWI_DATA_FLAG_SHPREAMBLE 0x04
338 #define IWI_DATA_FLAG_NO_WEP 0x20
339 #define IWI_DATA_FLAG_NEED_ACK 0x80
342 #define IWI_DATA_XFLAG_QOS 0x10
345 uint8_t wepkey[IEEE80211_KEYBUF_SIZE];
348 uint8_t reserved3[10];
349 struct ieee80211_qosframe_addr4 wh;
354 #define IWI_MAX_NSEG 6
355 uint32_t seg_addr[IWI_MAX_NSEG];
356 uint16_t seg_len[IWI_MAX_NSEG];
360 struct iwi_cmd_desc {
363 #define IWI_CMD_ENABLE 2
364 #define IWI_CMD_SET_CONFIG 6
365 #define IWI_CMD_SET_ESSID 8
366 #define IWI_CMD_SET_MAC_ADDRESS 11
367 #define IWI_CMD_SET_RTS_THRESHOLD 15
368 #define IWI_CMD_SET_FRAG_THRESHOLD 16
369 #define IWI_CMD_SET_POWER_MODE 17
370 #define IWI_CMD_SET_WEP_KEY 18
371 #define IWI_CMD_SCAN 20
372 #define IWI_CMD_ASSOCIATE 21
373 #define IWI_CMD_SET_RATES 22
374 #define IWI_CMD_ABORT_SCAN 23
375 #define IWI_CMD_SET_WME_PARAMS 25
376 #define IWI_CMD_SCAN_EXT 26
377 #define IWI_CMD_SET_OPTIE 31
378 #define IWI_CMD_DISABLE 33
379 #define IWI_CMD_SET_IV 34
380 #define IWI_CMD_SET_TX_POWER 35
381 #define IWI_CMD_SET_SENSITIVITY 42
382 #define IWI_CMD_SET_WMEIE 84
389 /* node information (IBSS) */
390 struct iwi_ibssnode {
391 uint8_t bssid[IEEE80211_ADDR_LEN];
395 /* constants for 'mode' fields */
396 #define IWI_MODE_11A 0
397 #define IWI_MODE_11B 1
398 #define IWI_MODE_11G 2
400 /* possible values for command IWI_CMD_SET_POWER_MODE */
401 #define IWI_POWER_MODE_CAM 0 /* no power save */
402 #define IWI_POWER_MODE_PSP 3
403 #define IWI_POWER_MODE_MAX 5 /* max power save operation */
405 /* structure for command IWI_CMD_SET_RATES */
410 #define IWI_RATESET_TYPE_NEGOTIATED 0
411 #define IWI_RATESET_TYPE_SUPPORTED 1
414 #define IWI_RATESET_SIZE 12
415 uint8_t rates[IWI_RATESET_SIZE];
418 /* structure for command IWI_CMD_SET_TX_POWER */
425 #define IWI_TXPOWER_MAX 20
426 #define IWI_TXPOWER_RATIO (IEEE80211_TXPOWER_MAX / IWI_TXPOWER_MAX)
430 /* structure for command IWI_CMD_ASSOCIATE */
431 struct iwi_associate {
432 uint8_t chan; /* channel # */
433 uint8_t auth; /* type and key */
434 #define IWI_AUTH_OPEN 0
435 #define IWI_AUTH_SHARED 1
436 #define IWI_AUTH_NONE 3
438 uint8_t type; /* request */
439 #define IWI_HC_ASSOC 0
440 #define IWI_HC_REASSOC 1
441 #define IWI_HC_DISASSOC 2
442 #define IWI_HC_IBSS_START 3
443 #define IWI_HC_IBSS_RECONF 4
444 #define IWI_HC_DISASSOC_QUIET 5
447 #define IWI_POLICY_WME 1
448 #define IWI_POLICY_WPA 2
450 uint8_t plen; /* preamble length */
451 uint8_t mode; /* 11a, 11b, or 11g */
452 uint8_t bssid[IEEE80211_ADDR_LEN];
453 uint8_t tstamp[8]; /* tsf for beacon sync */
455 uint16_t lintval; /* listen interval */
456 uint16_t intval; /* beacon interval */
457 uint8_t dst[IEEE80211_ADDR_LEN];
458 uint16_t atim_window;
464 #define IWI_SCAN_CHANNELS 54
466 /* structure for command IWI_CMD_SCAN */
469 uint16_t dwelltime; /* channel dwell time (ms) */
470 uint8_t channels[IWI_SCAN_CHANNELS];
471 #define IWI_CHAN_5GHZ (0 << 6)
472 #define IWI_CHAN_2GHZ (1 << 6)
477 /* scan type codes */
478 #define IWI_SCAN_TYPE_PASSIVE_STOP 0 /* passive, stop on first beacon */
479 #define IWI_SCAN_TYPE_PASSIVE 1 /* passive, full dwell on channel */
480 #define IWI_SCAN_TYPE_DIRECTED 2 /* active, directed probe req */
481 #define IWI_SCAN_TYPE_BROADCAST 3 /* active, bcast probe req */
482 #define IWI_SCAN_TYPE_BDIRECTED 4 /* active, directed+bcast probe */
483 #define IWI_SCAN_TYPES 5
485 /* scan result codes */
486 #define IWI_SCAN_COMPLETED 1 /* scan compeleted successfully */
487 #define IWI_SCAN_ABORTED 2 /* scan was aborted by the driver */
489 /* structure for command IWI_CMD_SCAN_EXT */
490 struct iwi_scan_ext {
491 uint32_t full_scan_index;
492 uint8_t channels[IWI_SCAN_CHANNELS];
493 uint8_t scan_type[IWI_SCAN_CHANNELS / 2];
495 uint16_t dwell_time[IWI_SCAN_TYPES];
498 /* structure for command IWI_CMD_SET_CONFIG */
499 struct iwi_configuration {
500 uint8_t bluetooth_coexistence;
502 uint8_t answer_pbreq; /* answer bcast ssid probe req frames */
503 uint8_t allow_invalid_frames; /* accept data frames w/ errors */
504 uint8_t multicast_enabled; /* accept frames w/ any bssid */
505 uint8_t drop_unicast_unencrypted;
506 uint8_t disable_unicast_decryption;
507 uint8_t drop_multicast_unencrypted;
508 uint8_t disable_multicast_decryption;
509 uint8_t antenna; /* antenna diversity */
510 #define IWI_ANTENNA_AUTO 0 /* firmware selects best antenna */
511 #define IWI_ANTENNA_A 1 /* use antenna A only */
512 #define IWI_ANTENNA_B 3 /* use antenna B only */
513 #define IWI_ANTENNA_SLOWDIV 2 /* slow diversity algorithm */
514 uint8_t include_crc; /* include crc in rx'd frames */
515 uint8_t use_protection; /* auto-detect 11g operation */
516 uint8_t protection_ctsonly; /* use CTS-to-self protection */
517 uint8_t enable_multicast_filtering;
518 uint8_t bluetooth_threshold; /* collision threshold */
519 uint8_t silence_threshold; /* silence over/under threshold */
520 uint8_t allow_beacon_and_probe_resp;/* accept frames w/ any bssid */
521 uint8_t allow_mgt; /* accept frames w/ any bssid */
522 uint8_t noise_reported; /* report noise stats to host */
526 /* structure for command IWI_CMD_SET_WEP_KEY */
529 #define IWI_WEP_KEY_CMD_SETKEY 0x08
534 uint8_t key[IEEE80211_KEYBUF_SIZE];
537 /* structure for command IWI_CMD_SET_WME_PARAMS */
538 struct iwi_wme_params {
539 uint16_t cwmin[WME_NUM_AC];
540 uint16_t cwmax[WME_NUM_AC];
541 uint8_t aifsn[WME_NUM_AC];
542 uint8_t acm[WME_NUM_AC];
543 uint16_t burst[WME_NUM_AC];
546 /* structure for command IWI_CMD_SET_SENSITIVTY */
547 struct iwi_sensitivity {
548 uint16_t rssi; /* beacon rssi in dBm */
549 #define IWI_RSSI_TO_DBM 112
553 #define IWI_MEM_EEPROM_EVENT 0x00300004
554 #define IWI_MEM_EEPROM_CTL 0x00300040
556 #define IWI_EEPROM_MAC 0x21
557 #define IWI_EEPROM_NIC 0x25 /* nic type (lsb) */
558 #define IWI_EEPROM_SKU 0x25 /* nic type (msb) */
560 #define IWI_EEPROM_DELAY 1 /* minimum hold time (microsecond) */
562 #define IWI_EEPROM_C (1 << 0) /* Serial Clock */
563 #define IWI_EEPROM_S (1 << 1) /* Chip Select */
564 #define IWI_EEPROM_D (1 << 2) /* Serial data input */
565 #define IWI_EEPROM_Q (1 << 4) /* Serial data output */
567 #define IWI_EEPROM_SHIFT_D 2
568 #define IWI_EEPROM_SHIFT_Q 4
571 * control and status registers access macros
573 #define CSR_READ_1(sc, reg) \
574 bus_space_read_1((sc)->sc_st, (sc)->sc_sh, (reg))
576 #define CSR_READ_2(sc, reg) \
577 bus_space_read_2((sc)->sc_st, (sc)->sc_sh, (reg))
579 #define CSR_READ_4(sc, reg) \
580 bus_space_read_4((sc)->sc_st, (sc)->sc_sh, (reg))
582 #define CSR_READ_REGION_4(sc, offset, datap, count) \
583 bus_space_read_region_4((sc)->sc_st, (sc)->sc_sh, (offset), \
586 #define CSR_WRITE_1(sc, reg, val) \
587 bus_space_write_1((sc)->sc_st, (sc)->sc_sh, (reg), (val))
589 #define CSR_WRITE_2(sc, reg, val) \
590 bus_space_write_2((sc)->sc_st, (sc)->sc_sh, (reg), (val))
592 #define CSR_WRITE_4(sc, reg, val) \
593 bus_space_write_4((sc)->sc_st, (sc)->sc_sh, (reg), (val))
595 #define CSR_WRITE_REGION_1(sc, offset, datap, count) \
596 bus_space_write_region_1((sc)->sc_st, (sc)->sc_sh, (offset), \
600 * indirect memory space access macros
602 #define MEM_WRITE_1(sc, addr, val) do { \
603 CSR_WRITE_4((sc), IWI_CSR_INDIRECT_ADDR, (addr)); \
604 CSR_WRITE_1((sc), IWI_CSR_INDIRECT_DATA, (val)); \
605 } while (/* CONSTCOND */0)
607 #define MEM_WRITE_2(sc, addr, val) do { \
608 CSR_WRITE_4((sc), IWI_CSR_INDIRECT_ADDR, (addr)); \
609 CSR_WRITE_2((sc), IWI_CSR_INDIRECT_DATA, (val)); \
610 } while (/* CONSTCOND */0)
612 #define MEM_WRITE_4(sc, addr, val) do { \
613 CSR_WRITE_4((sc), IWI_CSR_INDIRECT_ADDR, (addr)); \
614 CSR_WRITE_4((sc), IWI_CSR_INDIRECT_DATA, (val)); \
615 } while (/* CONSTCOND */0)
617 #define MEM_WRITE_MULTI_1(sc, addr, buf, len) do { \
618 CSR_WRITE_4((sc), IWI_CSR_INDIRECT_ADDR, (addr)); \
619 CSR_WRITE_MULTI_1((sc), IWI_CSR_INDIRECT_DATA, (buf), (len)); \
620 } while (/* CONSTCOND */0)
623 * EEPROM access macro
625 #define IWI_EEPROM_CTL(sc, val) do { \
626 MEM_WRITE_4((sc), IWI_MEM_EEPROM_CTL, (val)); \
627 DELAY(IWI_EEPROM_DELAY); \
628 } while (/* CONSTCOND */0)