2 * Copyright (c) 2007-2009 Damien Bergamini <damien.bergamini@free.fr>
3 * Copyright (c) 2008 Benjamin Close <benjsc@FreeBSD.org>
4 * Copyright (c) 2008 Sam Leffler, Errno Consulting
5 * Copyright (c) 2011 Intel Corporation
6 * Copyright (c) 2013 Cedric GROSS <c.gross@kreiz-it.fr>
7 * Copyright (c) 2013 Adrian Chadd <adrian@FreeBSD.org>
9 * Permission to use, copy, modify, and distribute this software for any
10 * purpose with or without fee is hereby granted, provided that the above
11 * copyright notice and this permission notice appear in all copies.
13 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
14 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
15 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
16 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
17 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
18 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
19 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
23 * Driver for Intel WiFi Link 4965 and 1000/5000/6000 Series 802.11 network
27 #include <sys/cdefs.h>
28 __FBSDID("$FreeBSD$");
33 #include <sys/param.h>
34 #include <sys/sockio.h>
35 #include <sys/sysctl.h>
37 #include <sys/kernel.h>
38 #include <sys/socket.h>
39 #include <sys/systm.h>
40 #include <sys/malloc.h>
44 #include <sys/endian.h>
45 #include <sys/firmware.h>
46 #include <sys/limits.h>
47 #include <sys/module.h>
49 #include <sys/queue.h>
50 #include <sys/taskqueue.h>
52 #include <machine/bus.h>
53 #include <machine/resource.h>
54 #include <machine/clock.h>
56 #include <dev/pci/pcireg.h>
57 #include <dev/pci/pcivar.h>
60 #include <net/if_var.h>
61 #include <net/if_dl.h>
62 #include <net/if_media.h>
64 #include <netinet/in.h>
65 #include <netinet/if_ether.h>
67 #include <net80211/ieee80211_var.h>
68 #include <net80211/ieee80211_radiotap.h>
69 #include <net80211/ieee80211_regdomain.h>
70 #include <net80211/ieee80211_ratectl.h>
72 #include <dev/iwn/if_iwnreg.h>
73 #include <dev/iwn/if_iwnvar.h>
74 #include <dev/iwn/if_iwn_devid.h>
75 #include <dev/iwn/if_iwn_chip_cfg.h>
76 #include <dev/iwn/if_iwn_debug.h>
77 #include <dev/iwn/if_iwn_ioctl.h>
85 static const struct iwn_ident iwn_ident_table[] = {
86 { 0x8086, IWN_DID_6x05_1, "Intel Centrino Advanced-N 6205" },
87 { 0x8086, IWN_DID_1000_1, "Intel Centrino Wireless-N 1000" },
88 { 0x8086, IWN_DID_1000_2, "Intel Centrino Wireless-N 1000" },
89 { 0x8086, IWN_DID_6x05_2, "Intel Centrino Advanced-N 6205" },
90 { 0x8086, IWN_DID_6050_1, "Intel Centrino Advanced-N + WiMAX 6250" },
91 { 0x8086, IWN_DID_6050_2, "Intel Centrino Advanced-N + WiMAX 6250" },
92 { 0x8086, IWN_DID_x030_1, "Intel Centrino Wireless-N 1030" },
93 { 0x8086, IWN_DID_x030_2, "Intel Centrino Wireless-N 1030" },
94 { 0x8086, IWN_DID_x030_3, "Intel Centrino Advanced-N 6230" },
95 { 0x8086, IWN_DID_x030_4, "Intel Centrino Advanced-N 6230" },
96 { 0x8086, IWN_DID_6150_1, "Intel Centrino Wireless-N + WiMAX 6150" },
97 { 0x8086, IWN_DID_6150_2, "Intel Centrino Wireless-N + WiMAX 6150" },
98 { 0x8086, IWN_DID_2x00_1, "Intel(R) Centrino(R) Wireless-N 2200 BGN" },
99 { 0x8086, IWN_DID_2x00_2, "Intel(R) Centrino(R) Wireless-N 2200 BGN" },
100 /* XXX 2200D is IWN_SDID_2x00_4; there's no way to express this here! */
101 { 0x8086, IWN_DID_2x30_1, "Intel Centrino Wireless-N 2230" },
102 { 0x8086, IWN_DID_2x30_2, "Intel Centrino Wireless-N 2230" },
103 { 0x8086, IWN_DID_130_1, "Intel Centrino Wireless-N 130" },
104 { 0x8086, IWN_DID_130_2, "Intel Centrino Wireless-N 130" },
105 { 0x8086, IWN_DID_100_1, "Intel Centrino Wireless-N 100" },
106 { 0x8086, IWN_DID_100_2, "Intel Centrino Wireless-N 100" },
107 { 0x8086, IWN_DID_105_1, "Intel Centrino Wireless-N 105" },
108 { 0x8086, IWN_DID_105_2, "Intel Centrino Wireless-N 105" },
109 { 0x8086, IWN_DID_135_1, "Intel Centrino Wireless-N 135" },
110 { 0x8086, IWN_DID_135_2, "Intel Centrino Wireless-N 135" },
111 { 0x8086, IWN_DID_4965_1, "Intel Wireless WiFi Link 4965" },
112 { 0x8086, IWN_DID_6x00_1, "Intel Centrino Ultimate-N 6300" },
113 { 0x8086, IWN_DID_6x00_2, "Intel Centrino Advanced-N 6200" },
114 { 0x8086, IWN_DID_4965_2, "Intel Wireless WiFi Link 4965" },
115 { 0x8086, IWN_DID_4965_3, "Intel Wireless WiFi Link 4965" },
116 { 0x8086, IWN_DID_5x00_1, "Intel WiFi Link 5100" },
117 { 0x8086, IWN_DID_4965_4, "Intel Wireless WiFi Link 4965" },
118 { 0x8086, IWN_DID_5x00_3, "Intel Ultimate N WiFi Link 5300" },
119 { 0x8086, IWN_DID_5x00_4, "Intel Ultimate N WiFi Link 5300" },
120 { 0x8086, IWN_DID_5x00_2, "Intel WiFi Link 5100" },
121 { 0x8086, IWN_DID_6x00_3, "Intel Centrino Ultimate-N 6300" },
122 { 0x8086, IWN_DID_6x00_4, "Intel Centrino Advanced-N 6200" },
123 { 0x8086, IWN_DID_5x50_1, "Intel WiMAX/WiFi Link 5350" },
124 { 0x8086, IWN_DID_5x50_2, "Intel WiMAX/WiFi Link 5350" },
125 { 0x8086, IWN_DID_5x50_3, "Intel WiMAX/WiFi Link 5150" },
126 { 0x8086, IWN_DID_5x50_4, "Intel WiMAX/WiFi Link 5150" },
127 { 0x8086, IWN_DID_6035_1, "Intel Centrino Advanced 6235" },
128 { 0x8086, IWN_DID_6035_2, "Intel Centrino Advanced 6235" },
132 static int iwn_probe(device_t);
133 static int iwn_attach(device_t);
134 static void iwn4965_attach(struct iwn_softc *, uint16_t);
135 static void iwn5000_attach(struct iwn_softc *, uint16_t);
136 static int iwn_config_specific(struct iwn_softc *, uint16_t);
137 static void iwn_radiotap_attach(struct iwn_softc *);
138 static void iwn_sysctlattach(struct iwn_softc *);
139 static struct ieee80211vap *iwn_vap_create(struct ieee80211com *,
140 const char [IFNAMSIZ], int, enum ieee80211_opmode, int,
141 const uint8_t [IEEE80211_ADDR_LEN],
142 const uint8_t [IEEE80211_ADDR_LEN]);
143 static void iwn_vap_delete(struct ieee80211vap *);
144 static int iwn_detach(device_t);
145 static int iwn_shutdown(device_t);
146 static int iwn_suspend(device_t);
147 static int iwn_resume(device_t);
148 static int iwn_nic_lock(struct iwn_softc *);
149 static int iwn_eeprom_lock(struct iwn_softc *);
150 static int iwn_init_otprom(struct iwn_softc *);
151 static int iwn_read_prom_data(struct iwn_softc *, uint32_t, void *, int);
152 static void iwn_dma_map_addr(void *, bus_dma_segment_t *, int, int);
153 static int iwn_dma_contig_alloc(struct iwn_softc *, struct iwn_dma_info *,
154 void **, bus_size_t, bus_size_t);
155 static void iwn_dma_contig_free(struct iwn_dma_info *);
156 static int iwn_alloc_sched(struct iwn_softc *);
157 static void iwn_free_sched(struct iwn_softc *);
158 static int iwn_alloc_kw(struct iwn_softc *);
159 static void iwn_free_kw(struct iwn_softc *);
160 static int iwn_alloc_ict(struct iwn_softc *);
161 static void iwn_free_ict(struct iwn_softc *);
162 static int iwn_alloc_fwmem(struct iwn_softc *);
163 static void iwn_free_fwmem(struct iwn_softc *);
164 static int iwn_alloc_rx_ring(struct iwn_softc *, struct iwn_rx_ring *);
165 static void iwn_reset_rx_ring(struct iwn_softc *, struct iwn_rx_ring *);
166 static void iwn_free_rx_ring(struct iwn_softc *, struct iwn_rx_ring *);
167 static int iwn_alloc_tx_ring(struct iwn_softc *, struct iwn_tx_ring *,
169 static void iwn_reset_tx_ring(struct iwn_softc *, struct iwn_tx_ring *);
170 static void iwn_free_tx_ring(struct iwn_softc *, struct iwn_tx_ring *);
171 static void iwn_check_tx_ring(struct iwn_softc *, int);
172 static void iwn5000_ict_reset(struct iwn_softc *);
173 static int iwn_read_eeprom(struct iwn_softc *,
174 uint8_t macaddr[IEEE80211_ADDR_LEN]);
175 static void iwn4965_read_eeprom(struct iwn_softc *);
177 static void iwn4965_print_power_group(struct iwn_softc *, int);
179 static void iwn5000_read_eeprom(struct iwn_softc *);
180 static uint32_t iwn_eeprom_channel_flags(struct iwn_eeprom_chan *);
181 static void iwn_read_eeprom_band(struct iwn_softc *, int, int, int *,
182 struct ieee80211_channel[]);
183 static void iwn_read_eeprom_ht40(struct iwn_softc *, int, int, int *,
184 struct ieee80211_channel[]);
185 static void iwn_read_eeprom_channels(struct iwn_softc *, int, uint32_t);
186 static struct iwn_eeprom_chan *iwn_find_eeprom_channel(struct iwn_softc *,
187 struct ieee80211_channel *);
188 static void iwn_getradiocaps(struct ieee80211com *, int, int *,
189 struct ieee80211_channel[]);
190 static int iwn_setregdomain(struct ieee80211com *,
191 struct ieee80211_regdomain *, int,
192 struct ieee80211_channel[]);
193 static void iwn_read_eeprom_enhinfo(struct iwn_softc *);
194 static struct ieee80211_node *iwn_node_alloc(struct ieee80211vap *,
195 const uint8_t mac[IEEE80211_ADDR_LEN]);
196 static void iwn_newassoc(struct ieee80211_node *, int);
197 static int iwn_media_change(struct ifnet *);
198 static int iwn_newstate(struct ieee80211vap *, enum ieee80211_state, int);
199 static void iwn_calib_timeout(void *);
200 static void iwn_rx_phy(struct iwn_softc *, struct iwn_rx_desc *);
201 static void iwn_rx_done(struct iwn_softc *, struct iwn_rx_desc *,
202 struct iwn_rx_data *);
203 static void iwn_agg_tx_complete(struct iwn_softc *, struct iwn_tx_ring *,
205 static void iwn_rx_compressed_ba(struct iwn_softc *, struct iwn_rx_desc *);
206 static void iwn5000_rx_calib_results(struct iwn_softc *,
207 struct iwn_rx_desc *);
208 static void iwn_rx_statistics(struct iwn_softc *, struct iwn_rx_desc *);
209 static void iwn4965_tx_done(struct iwn_softc *, struct iwn_rx_desc *,
210 struct iwn_rx_data *);
211 static void iwn5000_tx_done(struct iwn_softc *, struct iwn_rx_desc *,
212 struct iwn_rx_data *);
213 static void iwn_adj_ampdu_ptr(struct iwn_softc *, struct iwn_tx_ring *);
214 static void iwn_tx_done(struct iwn_softc *, struct iwn_rx_desc *, int, int,
216 static int iwn_ampdu_check_bitmap(uint64_t, int, int);
217 static int iwn_ampdu_index_check(struct iwn_softc *, struct iwn_tx_ring *,
219 static void iwn_ampdu_tx_done(struct iwn_softc *, int, int, int, void *);
220 static void iwn_cmd_done(struct iwn_softc *, struct iwn_rx_desc *);
221 static void iwn_notif_intr(struct iwn_softc *);
222 static void iwn_wakeup_intr(struct iwn_softc *);
223 static void iwn_rftoggle_task(void *, int);
224 static void iwn_fatal_intr(struct iwn_softc *);
225 static void iwn_intr(void *);
226 static void iwn4965_update_sched(struct iwn_softc *, int, int, uint8_t,
228 static void iwn5000_update_sched(struct iwn_softc *, int, int, uint8_t,
231 static void iwn5000_reset_sched(struct iwn_softc *, int, int);
233 static int iwn_tx_data(struct iwn_softc *, struct mbuf *,
234 struct ieee80211_node *);
235 static int iwn_tx_data_raw(struct iwn_softc *, struct mbuf *,
236 struct ieee80211_node *,
237 const struct ieee80211_bpf_params *params);
238 static int iwn_tx_cmd(struct iwn_softc *, struct mbuf *,
239 struct ieee80211_node *, struct iwn_tx_ring *);
240 static void iwn_xmit_task(void *arg0, int pending);
241 static int iwn_raw_xmit(struct ieee80211_node *, struct mbuf *,
242 const struct ieee80211_bpf_params *);
243 static int iwn_transmit(struct ieee80211com *, struct mbuf *);
244 static void iwn_scan_timeout(void *);
245 static void iwn_watchdog(void *);
246 static int iwn_ioctl(struct ieee80211com *, u_long , void *);
247 static void iwn_parent(struct ieee80211com *);
248 static int iwn_cmd(struct iwn_softc *, int, const void *, int, int);
249 static int iwn4965_add_node(struct iwn_softc *, struct iwn_node_info *,
251 static int iwn5000_add_node(struct iwn_softc *, struct iwn_node_info *,
253 static int iwn_set_link_quality(struct iwn_softc *,
254 struct ieee80211_node *);
255 static int iwn_add_broadcast_node(struct iwn_softc *, int);
256 static int iwn_updateedca(struct ieee80211com *);
257 static void iwn_set_promisc(struct iwn_softc *);
258 static void iwn_update_promisc(struct ieee80211com *);
259 static void iwn_update_mcast(struct ieee80211com *);
260 static void iwn_set_led(struct iwn_softc *, uint8_t, uint8_t, uint8_t);
261 static int iwn_set_critical_temp(struct iwn_softc *);
262 static int iwn_set_timing(struct iwn_softc *, struct ieee80211_node *);
263 static void iwn4965_power_calibration(struct iwn_softc *, int);
264 static int iwn4965_set_txpower(struct iwn_softc *, int);
265 static int iwn5000_set_txpower(struct iwn_softc *, int);
266 static int iwn4965_get_rssi(struct iwn_softc *, struct iwn_rx_stat *);
267 static int iwn5000_get_rssi(struct iwn_softc *, struct iwn_rx_stat *);
268 static int iwn_get_noise(const struct iwn_rx_general_stats *);
269 static int iwn4965_get_temperature(struct iwn_softc *);
270 static int iwn5000_get_temperature(struct iwn_softc *);
271 static int iwn_init_sensitivity(struct iwn_softc *);
272 static void iwn_collect_noise(struct iwn_softc *,
273 const struct iwn_rx_general_stats *);
274 static int iwn4965_init_gains(struct iwn_softc *);
275 static int iwn5000_init_gains(struct iwn_softc *);
276 static int iwn4965_set_gains(struct iwn_softc *);
277 static int iwn5000_set_gains(struct iwn_softc *);
278 static void iwn_tune_sensitivity(struct iwn_softc *,
279 const struct iwn_rx_stats *);
280 static void iwn_save_stats_counters(struct iwn_softc *,
281 const struct iwn_stats *);
282 static int iwn_send_sensitivity(struct iwn_softc *);
283 static void iwn_check_rx_recovery(struct iwn_softc *, struct iwn_stats *);
284 static int iwn_set_pslevel(struct iwn_softc *, int, int, int);
285 static int iwn_send_btcoex(struct iwn_softc *);
286 static int iwn_send_advanced_btcoex(struct iwn_softc *);
287 static int iwn5000_runtime_calib(struct iwn_softc *);
288 static int iwn_check_bss_filter(struct iwn_softc *);
289 static int iwn4965_rxon_assoc(struct iwn_softc *, int);
290 static int iwn5000_rxon_assoc(struct iwn_softc *, int);
291 static int iwn_send_rxon(struct iwn_softc *, int, int);
292 static int iwn_config(struct iwn_softc *);
293 static int iwn_scan(struct iwn_softc *, struct ieee80211vap *,
294 struct ieee80211_scan_state *, struct ieee80211_channel *);
295 static int iwn_auth(struct iwn_softc *, struct ieee80211vap *vap);
296 static int iwn_run(struct iwn_softc *, struct ieee80211vap *vap);
297 static int iwn_ampdu_rx_start(struct ieee80211_node *,
298 struct ieee80211_rx_ampdu *, int, int, int);
299 static void iwn_ampdu_rx_stop(struct ieee80211_node *,
300 struct ieee80211_rx_ampdu *);
301 static int iwn_addba_request(struct ieee80211_node *,
302 struct ieee80211_tx_ampdu *, int, int, int);
303 static int iwn_addba_response(struct ieee80211_node *,
304 struct ieee80211_tx_ampdu *, int, int, int);
305 static int iwn_ampdu_tx_start(struct ieee80211com *,
306 struct ieee80211_node *, uint8_t);
307 static void iwn_ampdu_tx_stop(struct ieee80211_node *,
308 struct ieee80211_tx_ampdu *);
309 static void iwn4965_ampdu_tx_start(struct iwn_softc *,
310 struct ieee80211_node *, int, uint8_t, uint16_t);
311 static void iwn4965_ampdu_tx_stop(struct iwn_softc *, int,
313 static void iwn5000_ampdu_tx_start(struct iwn_softc *,
314 struct ieee80211_node *, int, uint8_t, uint16_t);
315 static void iwn5000_ampdu_tx_stop(struct iwn_softc *, int,
317 static int iwn5000_query_calibration(struct iwn_softc *);
318 static int iwn5000_send_calibration(struct iwn_softc *);
319 static int iwn5000_send_wimax_coex(struct iwn_softc *);
320 static int iwn5000_crystal_calib(struct iwn_softc *);
321 static int iwn5000_temp_offset_calib(struct iwn_softc *);
322 static int iwn5000_temp_offset_calibv2(struct iwn_softc *);
323 static int iwn4965_post_alive(struct iwn_softc *);
324 static int iwn5000_post_alive(struct iwn_softc *);
325 static int iwn4965_load_bootcode(struct iwn_softc *, const uint8_t *,
327 static int iwn4965_load_firmware(struct iwn_softc *);
328 static int iwn5000_load_firmware_section(struct iwn_softc *, uint32_t,
329 const uint8_t *, int);
330 static int iwn5000_load_firmware(struct iwn_softc *);
331 static int iwn_read_firmware_leg(struct iwn_softc *,
332 struct iwn_fw_info *);
333 static int iwn_read_firmware_tlv(struct iwn_softc *,
334 struct iwn_fw_info *, uint16_t);
335 static int iwn_read_firmware(struct iwn_softc *);
336 static void iwn_unload_firmware(struct iwn_softc *);
337 static int iwn_clock_wait(struct iwn_softc *);
338 static int iwn_apm_init(struct iwn_softc *);
339 static void iwn_apm_stop_master(struct iwn_softc *);
340 static void iwn_apm_stop(struct iwn_softc *);
341 static int iwn4965_nic_config(struct iwn_softc *);
342 static int iwn5000_nic_config(struct iwn_softc *);
343 static int iwn_hw_prepare(struct iwn_softc *);
344 static int iwn_hw_init(struct iwn_softc *);
345 static void iwn_hw_stop(struct iwn_softc *);
346 static void iwn_panicked(void *, int);
347 static int iwn_init_locked(struct iwn_softc *);
348 static int iwn_init(struct iwn_softc *);
349 static void iwn_stop_locked(struct iwn_softc *);
350 static void iwn_stop(struct iwn_softc *);
351 static void iwn_scan_start(struct ieee80211com *);
352 static void iwn_scan_end(struct ieee80211com *);
353 static void iwn_set_channel(struct ieee80211com *);
354 static void iwn_scan_curchan(struct ieee80211_scan_state *, unsigned long);
355 static void iwn_scan_mindwell(struct ieee80211_scan_state *);
357 static char *iwn_get_csr_string(int);
358 static void iwn_debug_register(struct iwn_softc *);
361 static device_method_t iwn_methods[] = {
362 /* Device interface */
363 DEVMETHOD(device_probe, iwn_probe),
364 DEVMETHOD(device_attach, iwn_attach),
365 DEVMETHOD(device_detach, iwn_detach),
366 DEVMETHOD(device_shutdown, iwn_shutdown),
367 DEVMETHOD(device_suspend, iwn_suspend),
368 DEVMETHOD(device_resume, iwn_resume),
373 static driver_t iwn_driver = {
376 sizeof(struct iwn_softc)
378 static devclass_t iwn_devclass;
380 DRIVER_MODULE(iwn, pci, iwn_driver, iwn_devclass, NULL, NULL);
381 MODULE_PNP_INFO("U16:vendor;U16:device;D:#", pci, iwn, iwn_ident_table,
382 nitems(iwn_ident_table) - 1);
383 MODULE_VERSION(iwn, 1);
385 MODULE_DEPEND(iwn, firmware, 1, 1, 1);
386 MODULE_DEPEND(iwn, pci, 1, 1, 1);
387 MODULE_DEPEND(iwn, wlan, 1, 1, 1);
389 static d_ioctl_t iwn_cdev_ioctl;
390 static d_open_t iwn_cdev_open;
391 static d_close_t iwn_cdev_close;
393 static struct cdevsw iwn_cdevsw = {
394 .d_version = D_VERSION,
396 .d_open = iwn_cdev_open,
397 .d_close = iwn_cdev_close,
398 .d_ioctl = iwn_cdev_ioctl,
403 iwn_probe(device_t dev)
405 const struct iwn_ident *ident;
407 for (ident = iwn_ident_table; ident->name != NULL; ident++) {
408 if (pci_get_vendor(dev) == ident->vendor &&
409 pci_get_device(dev) == ident->device) {
410 device_set_desc(dev, ident->name);
411 return (BUS_PROBE_DEFAULT);
418 iwn_is_3stream_device(struct iwn_softc *sc)
420 /* XXX for now only 5300, until the 5350 can be tested */
421 if (sc->hw_type == IWN_HW_REV_TYPE_5300)
427 iwn_attach(device_t dev)
429 struct iwn_softc *sc = device_get_softc(dev);
430 struct ieee80211com *ic;
436 error = resource_int_value(device_get_name(sc->sc_dev),
437 device_get_unit(sc->sc_dev), "debug", &(sc->sc_debug));
444 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: begin\n",__func__);
447 * Get the offset of the PCI Express Capability Structure in PCI
448 * Configuration Space.
450 error = pci_find_cap(dev, PCIY_EXPRESS, &sc->sc_cap_off);
452 device_printf(dev, "PCIe capability structure not found!\n");
456 /* Clear device-specific "PCI retry timeout" register (41h). */
457 pci_write_config(dev, 0x41, 0, 1);
459 /* Enable bus-mastering. */
460 pci_enable_busmaster(dev);
463 sc->mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
465 if (sc->mem == NULL) {
466 device_printf(dev, "can't map mem space\n");
470 sc->sc_st = rman_get_bustag(sc->mem);
471 sc->sc_sh = rman_get_bushandle(sc->mem);
475 if (pci_alloc_msi(dev, &i) == 0)
477 /* Install interrupt handler. */
478 sc->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, RF_ACTIVE |
479 (rid != 0 ? 0 : RF_SHAREABLE));
480 if (sc->irq == NULL) {
481 device_printf(dev, "can't map interrupt\n");
488 /* Read hardware revision and attach. */
489 sc->hw_type = (IWN_READ(sc, IWN_HW_REV) >> IWN_HW_REV_TYPE_SHIFT)
490 & IWN_HW_REV_TYPE_MASK;
491 sc->subdevice_id = pci_get_subdevice(dev);
494 * 4965 versus 5000 and later have different methods.
495 * Let's set those up first.
497 if (sc->hw_type == IWN_HW_REV_TYPE_4965)
498 iwn4965_attach(sc, pci_get_device(dev));
500 iwn5000_attach(sc, pci_get_device(dev));
503 * Next, let's setup the various parameters of each NIC.
505 error = iwn_config_specific(sc, pci_get_device(dev));
507 device_printf(dev, "could not attach device, error %d\n",
512 if ((error = iwn_hw_prepare(sc)) != 0) {
513 device_printf(dev, "hardware not ready, error %d\n", error);
517 /* Allocate DMA memory for firmware transfers. */
518 if ((error = iwn_alloc_fwmem(sc)) != 0) {
520 "could not allocate memory for firmware, error %d\n",
525 /* Allocate "Keep Warm" page. */
526 if ((error = iwn_alloc_kw(sc)) != 0) {
528 "could not allocate keep warm page, error %d\n", error);
532 /* Allocate ICT table for 5000 Series. */
533 if (sc->hw_type != IWN_HW_REV_TYPE_4965 &&
534 (error = iwn_alloc_ict(sc)) != 0) {
535 device_printf(dev, "could not allocate ICT table, error %d\n",
540 /* Allocate TX scheduler "rings". */
541 if ((error = iwn_alloc_sched(sc)) != 0) {
543 "could not allocate TX scheduler rings, error %d\n", error);
547 /* Allocate TX rings (16 on 4965AGN, 20 on >=5000). */
548 for (i = 0; i < sc->ntxqs; i++) {
549 if ((error = iwn_alloc_tx_ring(sc, &sc->txq[i], i)) != 0) {
551 "could not allocate TX ring %d, error %d\n", i,
557 /* Allocate RX ring. */
558 if ((error = iwn_alloc_rx_ring(sc, &sc->rxq)) != 0) {
559 device_printf(dev, "could not allocate RX ring, error %d\n",
564 /* Clear pending interrupts. */
565 IWN_WRITE(sc, IWN_INT, 0xffffffff);
569 ic->ic_name = device_get_nameunit(dev);
570 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */
571 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */
573 /* Set device capabilities. */
575 IEEE80211_C_STA /* station mode supported */
576 | IEEE80211_C_MONITOR /* monitor mode supported */
578 | IEEE80211_C_BGSCAN /* background scanning */
580 | IEEE80211_C_TXPMGT /* tx power management */
581 | IEEE80211_C_SHSLOT /* short slot time supported */
583 | IEEE80211_C_SHPREAMBLE /* short preamble supported */
585 | IEEE80211_C_IBSS /* ibss/adhoc mode */
587 | IEEE80211_C_WME /* WME */
588 | IEEE80211_C_PMGT /* Station-side power mgmt */
591 /* Read MAC address, channels, etc from EEPROM. */
592 if ((error = iwn_read_eeprom(sc, ic->ic_macaddr)) != 0) {
593 device_printf(dev, "could not read EEPROM, error %d\n",
598 /* Count the number of available chains. */
600 ((sc->txchainmask >> 2) & 1) +
601 ((sc->txchainmask >> 1) & 1) +
602 ((sc->txchainmask >> 0) & 1);
604 ((sc->rxchainmask >> 2) & 1) +
605 ((sc->rxchainmask >> 1) & 1) +
606 ((sc->rxchainmask >> 0) & 1);
608 device_printf(dev, "MIMO %dT%dR, %.4s, address %6D\n",
609 sc->ntxchains, sc->nrxchains, sc->eeprom_domain,
610 ic->ic_macaddr, ":");
613 if (sc->sc_flags & IWN_FLAG_HAS_11N) {
614 ic->ic_rxstream = sc->nrxchains;
615 ic->ic_txstream = sc->ntxchains;
618 * Some of the 3 antenna devices (ie, the 4965) only supports
619 * 2x2 operation. So correct the number of streams if
620 * it's not a 3-stream device.
622 if (! iwn_is_3stream_device(sc)) {
623 if (ic->ic_rxstream > 2)
625 if (ic->ic_txstream > 2)
630 IEEE80211_HTCAP_SMPS_OFF /* SMPS mode disabled */
631 | IEEE80211_HTCAP_SHORTGI20 /* short GI in 20MHz */
632 | IEEE80211_HTCAP_CHWIDTH40 /* 40MHz channel width*/
633 | IEEE80211_HTCAP_SHORTGI40 /* short GI in 40MHz */
635 | IEEE80211_HTCAP_GREENFIELD
636 #if IWN_RBUF_SIZE == 8192
637 | IEEE80211_HTCAP_MAXAMSDU_7935 /* max A-MSDU length */
639 | IEEE80211_HTCAP_MAXAMSDU_3839 /* max A-MSDU length */
642 /* s/w capabilities */
643 | IEEE80211_HTC_HT /* HT operation */
644 | IEEE80211_HTC_AMPDU /* tx A-MPDU */
646 | IEEE80211_HTC_AMSDU /* tx A-MSDU */
651 ieee80211_ifattach(ic);
652 ic->ic_vap_create = iwn_vap_create;
653 ic->ic_ioctl = iwn_ioctl;
654 ic->ic_parent = iwn_parent;
655 ic->ic_vap_delete = iwn_vap_delete;
656 ic->ic_transmit = iwn_transmit;
657 ic->ic_raw_xmit = iwn_raw_xmit;
658 ic->ic_node_alloc = iwn_node_alloc;
659 sc->sc_ampdu_rx_start = ic->ic_ampdu_rx_start;
660 ic->ic_ampdu_rx_start = iwn_ampdu_rx_start;
661 sc->sc_ampdu_rx_stop = ic->ic_ampdu_rx_stop;
662 ic->ic_ampdu_rx_stop = iwn_ampdu_rx_stop;
663 sc->sc_addba_request = ic->ic_addba_request;
664 ic->ic_addba_request = iwn_addba_request;
665 sc->sc_addba_response = ic->ic_addba_response;
666 ic->ic_addba_response = iwn_addba_response;
667 sc->sc_addba_stop = ic->ic_addba_stop;
668 ic->ic_addba_stop = iwn_ampdu_tx_stop;
669 ic->ic_newassoc = iwn_newassoc;
670 ic->ic_wme.wme_update = iwn_updateedca;
671 ic->ic_update_promisc = iwn_update_promisc;
672 ic->ic_update_mcast = iwn_update_mcast;
673 ic->ic_scan_start = iwn_scan_start;
674 ic->ic_scan_end = iwn_scan_end;
675 ic->ic_set_channel = iwn_set_channel;
676 ic->ic_scan_curchan = iwn_scan_curchan;
677 ic->ic_scan_mindwell = iwn_scan_mindwell;
678 ic->ic_getradiocaps = iwn_getradiocaps;
679 ic->ic_setregdomain = iwn_setregdomain;
681 iwn_radiotap_attach(sc);
683 callout_init_mtx(&sc->calib_to, &sc->sc_mtx, 0);
684 callout_init_mtx(&sc->scan_timeout, &sc->sc_mtx, 0);
685 callout_init_mtx(&sc->watchdog_to, &sc->sc_mtx, 0);
686 TASK_INIT(&sc->sc_rftoggle_task, 0, iwn_rftoggle_task, sc);
687 TASK_INIT(&sc->sc_panic_task, 0, iwn_panicked, sc);
688 TASK_INIT(&sc->sc_xmit_task, 0, iwn_xmit_task, sc);
690 mbufq_init(&sc->sc_xmit_queue, 1024);
692 sc->sc_tq = taskqueue_create("iwn_taskq", M_WAITOK,
693 taskqueue_thread_enqueue, &sc->sc_tq);
694 error = taskqueue_start_threads(&sc->sc_tq, 1, 0, "iwn_taskq");
696 device_printf(dev, "can't start threads, error %d\n", error);
700 iwn_sysctlattach(sc);
703 * Hook our interrupt after all initialization is complete.
705 error = bus_setup_intr(dev, sc->irq, INTR_TYPE_NET | INTR_MPSAFE,
706 NULL, iwn_intr, sc, &sc->sc_ih);
708 device_printf(dev, "can't establish interrupt, error %d\n",
714 device_printf(sc->sc_dev, "%s: rx_stats=%d, rx_stats_bt=%d\n",
716 sizeof(struct iwn_stats),
717 sizeof(struct iwn_stats_bt));
721 ieee80211_announce(ic);
722 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
724 /* Add debug ioctl right at the end */
725 sc->sc_cdev = make_dev(&iwn_cdevsw, device_get_unit(dev),
726 UID_ROOT, GID_WHEEL, 0600, "%s", device_get_nameunit(dev));
727 if (sc->sc_cdev == NULL) {
728 device_printf(dev, "failed to create debug character device\n");
730 sc->sc_cdev->si_drv1 = sc;
735 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end in error\n",__func__);
740 * Define specific configuration based on device id and subdevice id
741 * pid : PCI device id
744 iwn_config_specific(struct iwn_softc *sc, uint16_t pid)
753 sc->base_params = &iwn4965_base_params;
754 sc->limits = &iwn4965_sensitivity_limits;
755 sc->fwname = "iwn4965fw";
756 /* Override chains masks, ROM is known to be broken. */
757 sc->txchainmask = IWN_ANT_AB;
758 sc->rxchainmask = IWN_ANT_ABC;
759 /* Enable normal btcoex */
760 sc->sc_flags |= IWN_FLAG_BTCOEX;
765 switch(sc->subdevice_id) {
766 case IWN_SDID_1000_1:
767 case IWN_SDID_1000_2:
768 case IWN_SDID_1000_3:
769 case IWN_SDID_1000_4:
770 case IWN_SDID_1000_5:
771 case IWN_SDID_1000_6:
772 case IWN_SDID_1000_7:
773 case IWN_SDID_1000_8:
774 case IWN_SDID_1000_9:
775 case IWN_SDID_1000_10:
776 case IWN_SDID_1000_11:
777 case IWN_SDID_1000_12:
778 sc->limits = &iwn1000_sensitivity_limits;
779 sc->base_params = &iwn1000_base_params;
780 sc->fwname = "iwn1000fw";
783 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
784 "0x%04x rev %d not supported (subdevice)\n", pid,
785 sc->subdevice_id,sc->hw_type);
794 sc->fwname = "iwn6000fw";
795 sc->limits = &iwn6000_sensitivity_limits;
796 switch(sc->subdevice_id) {
797 case IWN_SDID_6x00_1:
798 case IWN_SDID_6x00_2:
799 case IWN_SDID_6x00_8:
801 sc->base_params = &iwn_6000_base_params;
803 case IWN_SDID_6x00_3:
804 case IWN_SDID_6x00_6:
805 case IWN_SDID_6x00_9:
807 case IWN_SDID_6x00_4:
808 case IWN_SDID_6x00_7:
809 case IWN_SDID_6x00_10:
811 case IWN_SDID_6x00_5:
813 sc->base_params = &iwn_6000i_base_params;
814 sc->sc_flags |= IWN_FLAG_INTERNAL_PA;
815 sc->txchainmask = IWN_ANT_BC;
816 sc->rxchainmask = IWN_ANT_BC;
819 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
820 "0x%04x rev %d not supported (subdevice)\n", pid,
821 sc->subdevice_id,sc->hw_type);
828 switch(sc->subdevice_id) {
829 case IWN_SDID_6x05_1:
830 case IWN_SDID_6x05_4:
831 case IWN_SDID_6x05_6:
833 case IWN_SDID_6x05_2:
834 case IWN_SDID_6x05_5:
835 case IWN_SDID_6x05_7:
837 case IWN_SDID_6x05_3:
839 case IWN_SDID_6x05_8:
840 case IWN_SDID_6x05_9:
841 //iwl6005_2agn_sff_cfg
842 case IWN_SDID_6x05_10:
844 case IWN_SDID_6x05_11:
845 //iwl6005_2agn_mow1_cfg
846 case IWN_SDID_6x05_12:
847 //iwl6005_2agn_mow2_cfg
848 sc->fwname = "iwn6000g2afw";
849 sc->limits = &iwn6000_sensitivity_limits;
850 sc->base_params = &iwn_6000g2_base_params;
853 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
854 "0x%04x rev %d not supported (subdevice)\n", pid,
855 sc->subdevice_id,sc->hw_type);
862 switch(sc->subdevice_id) {
863 case IWN_SDID_6035_1:
864 case IWN_SDID_6035_2:
865 case IWN_SDID_6035_3:
866 case IWN_SDID_6035_4:
867 case IWN_SDID_6035_5:
868 sc->fwname = "iwn6000g2bfw";
869 sc->limits = &iwn6235_sensitivity_limits;
870 sc->base_params = &iwn_6235_base_params;
873 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
874 "0x%04x rev %d not supported (subdevice)\n", pid,
875 sc->subdevice_id,sc->hw_type);
879 /* 6x50 WiFi/WiMax Series */
882 switch(sc->subdevice_id) {
883 case IWN_SDID_6050_1:
884 case IWN_SDID_6050_3:
885 case IWN_SDID_6050_5:
887 case IWN_SDID_6050_2:
888 case IWN_SDID_6050_4:
889 case IWN_SDID_6050_6:
891 sc->fwname = "iwn6050fw";
892 sc->txchainmask = IWN_ANT_AB;
893 sc->rxchainmask = IWN_ANT_AB;
894 sc->limits = &iwn6000_sensitivity_limits;
895 sc->base_params = &iwn_6050_base_params;
898 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
899 "0x%04x rev %d not supported (subdevice)\n", pid,
900 sc->subdevice_id,sc->hw_type);
904 /* 6150 WiFi/WiMax Series */
907 switch(sc->subdevice_id) {
908 case IWN_SDID_6150_1:
909 case IWN_SDID_6150_3:
910 case IWN_SDID_6150_5:
912 case IWN_SDID_6150_2:
913 case IWN_SDID_6150_4:
914 case IWN_SDID_6150_6:
916 sc->fwname = "iwn6050fw";
917 sc->limits = &iwn6000_sensitivity_limits;
918 sc->base_params = &iwn_6150_base_params;
921 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
922 "0x%04x rev %d not supported (subdevice)\n", pid,
923 sc->subdevice_id,sc->hw_type);
927 /* 6030 Series and 1030 Series */
932 switch(sc->subdevice_id) {
933 case IWN_SDID_x030_1:
934 case IWN_SDID_x030_3:
935 case IWN_SDID_x030_5:
937 case IWN_SDID_x030_2:
938 case IWN_SDID_x030_4:
939 case IWN_SDID_x030_6:
941 case IWN_SDID_x030_7:
942 case IWN_SDID_x030_10:
943 case IWN_SDID_x030_14:
945 case IWN_SDID_x030_8:
946 case IWN_SDID_x030_11:
947 case IWN_SDID_x030_15:
949 case IWN_SDID_x030_9:
950 case IWN_SDID_x030_12:
951 case IWN_SDID_x030_16:
953 case IWN_SDID_x030_13:
955 sc->fwname = "iwn6000g2bfw";
956 sc->limits = &iwn6000_sensitivity_limits;
957 sc->base_params = &iwn_6000g2b_base_params;
960 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
961 "0x%04x rev %d not supported (subdevice)\n", pid,
962 sc->subdevice_id,sc->hw_type);
966 /* 130 Series WiFi */
967 /* XXX: This series will need adjustment for rate.
968 * see rx_with_siso_diversity in linux kernel
972 switch(sc->subdevice_id) {
981 sc->fwname = "iwn6000g2bfw";
982 sc->limits = &iwn6000_sensitivity_limits;
983 sc->base_params = &iwn_6000g2b_base_params;
986 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
987 "0x%04x rev %d not supported (subdevice)\n", pid,
988 sc->subdevice_id,sc->hw_type);
992 /* 100 Series WiFi */
995 switch(sc->subdevice_id) {
1000 case IWN_SDID_100_5:
1001 case IWN_SDID_100_6:
1002 sc->limits = &iwn1000_sensitivity_limits;
1003 sc->base_params = &iwn1000_base_params;
1004 sc->fwname = "iwn100fw";
1007 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
1008 "0x%04x rev %d not supported (subdevice)\n", pid,
1009 sc->subdevice_id,sc->hw_type);
1015 /* XXX: This series will need adjustment for rate.
1016 * see rx_with_siso_diversity in linux kernel
1020 switch(sc->subdevice_id) {
1021 case IWN_SDID_105_1:
1022 case IWN_SDID_105_2:
1023 case IWN_SDID_105_3:
1025 case IWN_SDID_105_4:
1027 sc->limits = &iwn2030_sensitivity_limits;
1028 sc->base_params = &iwn2000_base_params;
1029 sc->fwname = "iwn105fw";
1032 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
1033 "0x%04x rev %d not supported (subdevice)\n", pid,
1034 sc->subdevice_id,sc->hw_type);
1040 /* XXX: This series will need adjustment for rate.
1041 * see rx_with_siso_diversity in linux kernel
1045 switch(sc->subdevice_id) {
1046 case IWN_SDID_135_1:
1047 case IWN_SDID_135_2:
1048 case IWN_SDID_135_3:
1049 sc->limits = &iwn2030_sensitivity_limits;
1050 sc->base_params = &iwn2030_base_params;
1051 sc->fwname = "iwn135fw";
1054 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
1055 "0x%04x rev %d not supported (subdevice)\n", pid,
1056 sc->subdevice_id,sc->hw_type);
1062 case IWN_DID_2x00_1:
1063 case IWN_DID_2x00_2:
1064 switch(sc->subdevice_id) {
1065 case IWN_SDID_2x00_1:
1066 case IWN_SDID_2x00_2:
1067 case IWN_SDID_2x00_3:
1069 case IWN_SDID_2x00_4:
1070 //iwl2000_2bgn_d_cfg
1071 sc->limits = &iwn2030_sensitivity_limits;
1072 sc->base_params = &iwn2000_base_params;
1073 sc->fwname = "iwn2000fw";
1076 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
1077 "0x%04x rev %d not supported (subdevice) \n",
1078 pid, sc->subdevice_id, sc->hw_type);
1083 case IWN_DID_2x30_1:
1084 case IWN_DID_2x30_2:
1085 switch(sc->subdevice_id) {
1086 case IWN_SDID_2x30_1:
1087 case IWN_SDID_2x30_3:
1088 case IWN_SDID_2x30_5:
1090 case IWN_SDID_2x30_2:
1091 case IWN_SDID_2x30_4:
1092 case IWN_SDID_2x30_6:
1094 sc->limits = &iwn2030_sensitivity_limits;
1095 sc->base_params = &iwn2030_base_params;
1096 sc->fwname = "iwn2030fw";
1099 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
1100 "0x%04x rev %d not supported (subdevice)\n", pid,
1101 sc->subdevice_id,sc->hw_type);
1106 case IWN_DID_5x00_1:
1107 case IWN_DID_5x00_2:
1108 case IWN_DID_5x00_3:
1109 case IWN_DID_5x00_4:
1110 sc->limits = &iwn5000_sensitivity_limits;
1111 sc->base_params = &iwn5000_base_params;
1112 sc->fwname = "iwn5000fw";
1113 switch(sc->subdevice_id) {
1114 case IWN_SDID_5x00_1:
1115 case IWN_SDID_5x00_2:
1116 case IWN_SDID_5x00_3:
1117 case IWN_SDID_5x00_4:
1118 case IWN_SDID_5x00_9:
1119 case IWN_SDID_5x00_10:
1120 case IWN_SDID_5x00_11:
1121 case IWN_SDID_5x00_12:
1122 case IWN_SDID_5x00_17:
1123 case IWN_SDID_5x00_18:
1124 case IWN_SDID_5x00_19:
1125 case IWN_SDID_5x00_20:
1127 sc->txchainmask = IWN_ANT_B;
1128 sc->rxchainmask = IWN_ANT_AB;
1130 case IWN_SDID_5x00_5:
1131 case IWN_SDID_5x00_6:
1132 case IWN_SDID_5x00_13:
1133 case IWN_SDID_5x00_14:
1134 case IWN_SDID_5x00_21:
1135 case IWN_SDID_5x00_22:
1137 sc->txchainmask = IWN_ANT_B;
1138 sc->rxchainmask = IWN_ANT_AB;
1140 case IWN_SDID_5x00_7:
1141 case IWN_SDID_5x00_8:
1142 case IWN_SDID_5x00_15:
1143 case IWN_SDID_5x00_16:
1144 case IWN_SDID_5x00_23:
1145 case IWN_SDID_5x00_24:
1147 sc->txchainmask = IWN_ANT_B;
1148 sc->rxchainmask = IWN_ANT_AB;
1150 case IWN_SDID_5x00_25:
1151 case IWN_SDID_5x00_26:
1152 case IWN_SDID_5x00_27:
1153 case IWN_SDID_5x00_28:
1154 case IWN_SDID_5x00_29:
1155 case IWN_SDID_5x00_30:
1156 case IWN_SDID_5x00_31:
1157 case IWN_SDID_5x00_32:
1158 case IWN_SDID_5x00_33:
1159 case IWN_SDID_5x00_34:
1160 case IWN_SDID_5x00_35:
1161 case IWN_SDID_5x00_36:
1163 sc->txchainmask = IWN_ANT_ABC;
1164 sc->rxchainmask = IWN_ANT_ABC;
1167 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
1168 "0x%04x rev %d not supported (subdevice)\n", pid,
1169 sc->subdevice_id,sc->hw_type);
1174 case IWN_DID_5x50_1:
1175 case IWN_DID_5x50_2:
1176 case IWN_DID_5x50_3:
1177 case IWN_DID_5x50_4:
1178 sc->limits = &iwn5000_sensitivity_limits;
1179 sc->base_params = &iwn5000_base_params;
1180 sc->fwname = "iwn5000fw";
1181 switch(sc->subdevice_id) {
1182 case IWN_SDID_5x50_1:
1183 case IWN_SDID_5x50_2:
1184 case IWN_SDID_5x50_3:
1186 sc->limits = &iwn5000_sensitivity_limits;
1187 sc->base_params = &iwn5000_base_params;
1188 sc->fwname = "iwn5000fw";
1190 case IWN_SDID_5x50_4:
1191 case IWN_SDID_5x50_5:
1192 case IWN_SDID_5x50_8:
1193 case IWN_SDID_5x50_9:
1194 case IWN_SDID_5x50_10:
1195 case IWN_SDID_5x50_11:
1197 case IWN_SDID_5x50_6:
1198 case IWN_SDID_5x50_7:
1199 case IWN_SDID_5x50_12:
1200 case IWN_SDID_5x50_13:
1202 sc->limits = &iwn5000_sensitivity_limits;
1203 sc->fwname = "iwn5150fw";
1204 sc->base_params = &iwn_5x50_base_params;
1207 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
1208 "0x%04x rev %d not supported (subdevice)\n", pid,
1209 sc->subdevice_id,sc->hw_type);
1214 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id : 0x%04x"
1215 "rev 0x%08x not supported (device)\n", pid, sc->subdevice_id,
1223 iwn4965_attach(struct iwn_softc *sc, uint16_t pid)
1225 struct iwn_ops *ops = &sc->ops;
1227 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
1229 ops->load_firmware = iwn4965_load_firmware;
1230 ops->read_eeprom = iwn4965_read_eeprom;
1231 ops->post_alive = iwn4965_post_alive;
1232 ops->nic_config = iwn4965_nic_config;
1233 ops->update_sched = iwn4965_update_sched;
1234 ops->get_temperature = iwn4965_get_temperature;
1235 ops->get_rssi = iwn4965_get_rssi;
1236 ops->set_txpower = iwn4965_set_txpower;
1237 ops->init_gains = iwn4965_init_gains;
1238 ops->set_gains = iwn4965_set_gains;
1239 ops->rxon_assoc = iwn4965_rxon_assoc;
1240 ops->add_node = iwn4965_add_node;
1241 ops->tx_done = iwn4965_tx_done;
1242 ops->ampdu_tx_start = iwn4965_ampdu_tx_start;
1243 ops->ampdu_tx_stop = iwn4965_ampdu_tx_stop;
1244 sc->ntxqs = IWN4965_NTXQUEUES;
1245 sc->firstaggqueue = IWN4965_FIRSTAGGQUEUE;
1246 sc->ndmachnls = IWN4965_NDMACHNLS;
1247 sc->broadcast_id = IWN4965_ID_BROADCAST;
1248 sc->rxonsz = IWN4965_RXONSZ;
1249 sc->schedsz = IWN4965_SCHEDSZ;
1250 sc->fw_text_maxsz = IWN4965_FW_TEXT_MAXSZ;
1251 sc->fw_data_maxsz = IWN4965_FW_DATA_MAXSZ;
1252 sc->fwsz = IWN4965_FWSZ;
1253 sc->sched_txfact_addr = IWN4965_SCHED_TXFACT;
1254 sc->limits = &iwn4965_sensitivity_limits;
1255 sc->fwname = "iwn4965fw";
1256 /* Override chains masks, ROM is known to be broken. */
1257 sc->txchainmask = IWN_ANT_AB;
1258 sc->rxchainmask = IWN_ANT_ABC;
1259 /* Enable normal btcoex */
1260 sc->sc_flags |= IWN_FLAG_BTCOEX;
1262 DPRINTF(sc, IWN_DEBUG_TRACE, "%s: end\n",__func__);
1266 iwn5000_attach(struct iwn_softc *sc, uint16_t pid)
1268 struct iwn_ops *ops = &sc->ops;
1270 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
1272 ops->load_firmware = iwn5000_load_firmware;
1273 ops->read_eeprom = iwn5000_read_eeprom;
1274 ops->post_alive = iwn5000_post_alive;
1275 ops->nic_config = iwn5000_nic_config;
1276 ops->update_sched = iwn5000_update_sched;
1277 ops->get_temperature = iwn5000_get_temperature;
1278 ops->get_rssi = iwn5000_get_rssi;
1279 ops->set_txpower = iwn5000_set_txpower;
1280 ops->init_gains = iwn5000_init_gains;
1281 ops->set_gains = iwn5000_set_gains;
1282 ops->rxon_assoc = iwn5000_rxon_assoc;
1283 ops->add_node = iwn5000_add_node;
1284 ops->tx_done = iwn5000_tx_done;
1285 ops->ampdu_tx_start = iwn5000_ampdu_tx_start;
1286 ops->ampdu_tx_stop = iwn5000_ampdu_tx_stop;
1287 sc->ntxqs = IWN5000_NTXQUEUES;
1288 sc->firstaggqueue = IWN5000_FIRSTAGGQUEUE;
1289 sc->ndmachnls = IWN5000_NDMACHNLS;
1290 sc->broadcast_id = IWN5000_ID_BROADCAST;
1291 sc->rxonsz = IWN5000_RXONSZ;
1292 sc->schedsz = IWN5000_SCHEDSZ;
1293 sc->fw_text_maxsz = IWN5000_FW_TEXT_MAXSZ;
1294 sc->fw_data_maxsz = IWN5000_FW_DATA_MAXSZ;
1295 sc->fwsz = IWN5000_FWSZ;
1296 sc->sched_txfact_addr = IWN5000_SCHED_TXFACT;
1297 sc->reset_noise_gain = IWN5000_PHY_CALIB_RESET_NOISE_GAIN;
1298 sc->noise_gain = IWN5000_PHY_CALIB_NOISE_GAIN;
1300 DPRINTF(sc, IWN_DEBUG_TRACE, "%s: end\n",__func__);
1304 * Attach the interface to 802.11 radiotap.
1307 iwn_radiotap_attach(struct iwn_softc *sc)
1310 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
1311 ieee80211_radiotap_attach(&sc->sc_ic,
1312 &sc->sc_txtap.wt_ihdr, sizeof(sc->sc_txtap),
1313 IWN_TX_RADIOTAP_PRESENT,
1314 &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap),
1315 IWN_RX_RADIOTAP_PRESENT);
1316 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
1320 iwn_sysctlattach(struct iwn_softc *sc)
1323 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->sc_dev);
1324 struct sysctl_oid *tree = device_get_sysctl_tree(sc->sc_dev);
1326 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
1327 "debug", CTLFLAG_RW, &sc->sc_debug, sc->sc_debug,
1328 "control debugging printfs");
1332 static struct ieee80211vap *
1333 iwn_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit,
1334 enum ieee80211_opmode opmode, int flags,
1335 const uint8_t bssid[IEEE80211_ADDR_LEN],
1336 const uint8_t mac[IEEE80211_ADDR_LEN])
1338 struct iwn_softc *sc = ic->ic_softc;
1339 struct iwn_vap *ivp;
1340 struct ieee80211vap *vap;
1342 if (!TAILQ_EMPTY(&ic->ic_vaps)) /* only one at a time */
1345 ivp = malloc(sizeof(struct iwn_vap), M_80211_VAP, M_WAITOK | M_ZERO);
1347 ieee80211_vap_setup(ic, vap, name, unit, opmode, flags, bssid);
1348 ivp->ctx = IWN_RXON_BSS_CTX;
1349 vap->iv_bmissthreshold = 10; /* override default */
1350 /* Override with driver methods. */
1351 ivp->iv_newstate = vap->iv_newstate;
1352 vap->iv_newstate = iwn_newstate;
1353 sc->ivap[IWN_RXON_BSS_CTX] = vap;
1354 vap->iv_ampdu_rxmax = IEEE80211_HTCAP_MAXRXAMPDU_64K;
1355 vap->iv_ampdu_density = IEEE80211_HTCAP_MPDUDENSITY_4; /* 4uS */
1357 ieee80211_ratectl_init(vap);
1358 /* Complete setup. */
1359 ieee80211_vap_attach(vap, iwn_media_change, ieee80211_media_status,
1361 ic->ic_opmode = opmode;
1366 iwn_vap_delete(struct ieee80211vap *vap)
1368 struct iwn_vap *ivp = IWN_VAP(vap);
1370 ieee80211_ratectl_deinit(vap);
1371 ieee80211_vap_detach(vap);
1372 free(ivp, M_80211_VAP);
1376 iwn_xmit_queue_drain(struct iwn_softc *sc)
1379 struct ieee80211_node *ni;
1381 IWN_LOCK_ASSERT(sc);
1382 while ((m = mbufq_dequeue(&sc->sc_xmit_queue)) != NULL) {
1383 ni = (struct ieee80211_node *)m->m_pkthdr.rcvif;
1384 ieee80211_free_node(ni);
1390 iwn_xmit_queue_enqueue(struct iwn_softc *sc, struct mbuf *m)
1393 IWN_LOCK_ASSERT(sc);
1394 return (mbufq_enqueue(&sc->sc_xmit_queue, m));
1398 iwn_detach(device_t dev)
1400 struct iwn_softc *sc = device_get_softc(dev);
1403 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
1405 if (sc->sc_ic.ic_softc != NULL) {
1406 /* Free the mbuf queue and node references */
1408 iwn_xmit_queue_drain(sc);
1413 taskqueue_drain_all(sc->sc_tq);
1414 taskqueue_free(sc->sc_tq);
1416 callout_drain(&sc->watchdog_to);
1417 callout_drain(&sc->scan_timeout);
1418 callout_drain(&sc->calib_to);
1419 ieee80211_ifdetach(&sc->sc_ic);
1422 /* Uninstall interrupt handler. */
1423 if (sc->irq != NULL) {
1424 bus_teardown_intr(dev, sc->irq, sc->sc_ih);
1425 bus_release_resource(dev, SYS_RES_IRQ, rman_get_rid(sc->irq),
1427 pci_release_msi(dev);
1430 /* Free DMA resources. */
1431 iwn_free_rx_ring(sc, &sc->rxq);
1432 for (qid = 0; qid < sc->ntxqs; qid++)
1433 iwn_free_tx_ring(sc, &sc->txq[qid]);
1436 if (sc->ict != NULL)
1440 if (sc->mem != NULL)
1441 bus_release_resource(dev, SYS_RES_MEMORY,
1442 rman_get_rid(sc->mem), sc->mem);
1445 destroy_dev(sc->sc_cdev);
1449 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n", __func__);
1450 IWN_LOCK_DESTROY(sc);
1455 iwn_shutdown(device_t dev)
1457 struct iwn_softc *sc = device_get_softc(dev);
1464 iwn_suspend(device_t dev)
1466 struct iwn_softc *sc = device_get_softc(dev);
1468 ieee80211_suspend_all(&sc->sc_ic);
1473 iwn_resume(device_t dev)
1475 struct iwn_softc *sc = device_get_softc(dev);
1477 /* Clear device-specific "PCI retry timeout" register (41h). */
1478 pci_write_config(dev, 0x41, 0, 1);
1480 ieee80211_resume_all(&sc->sc_ic);
1485 iwn_nic_lock(struct iwn_softc *sc)
1489 /* Request exclusive access to NIC. */
1490 IWN_SETBITS(sc, IWN_GP_CNTRL, IWN_GP_CNTRL_MAC_ACCESS_REQ);
1492 /* Spin until we actually get the lock. */
1493 for (ntries = 0; ntries < 1000; ntries++) {
1494 if ((IWN_READ(sc, IWN_GP_CNTRL) &
1495 (IWN_GP_CNTRL_MAC_ACCESS_ENA | IWN_GP_CNTRL_SLEEP)) ==
1496 IWN_GP_CNTRL_MAC_ACCESS_ENA)
1503 static __inline void
1504 iwn_nic_unlock(struct iwn_softc *sc)
1506 IWN_CLRBITS(sc, IWN_GP_CNTRL, IWN_GP_CNTRL_MAC_ACCESS_REQ);
1509 static __inline uint32_t
1510 iwn_prph_read(struct iwn_softc *sc, uint32_t addr)
1512 IWN_WRITE(sc, IWN_PRPH_RADDR, IWN_PRPH_DWORD | addr);
1513 IWN_BARRIER_READ_WRITE(sc);
1514 return IWN_READ(sc, IWN_PRPH_RDATA);
1517 static __inline void
1518 iwn_prph_write(struct iwn_softc *sc, uint32_t addr, uint32_t data)
1520 IWN_WRITE(sc, IWN_PRPH_WADDR, IWN_PRPH_DWORD | addr);
1521 IWN_BARRIER_WRITE(sc);
1522 IWN_WRITE(sc, IWN_PRPH_WDATA, data);
1525 static __inline void
1526 iwn_prph_setbits(struct iwn_softc *sc, uint32_t addr, uint32_t mask)
1528 iwn_prph_write(sc, addr, iwn_prph_read(sc, addr) | mask);
1531 static __inline void
1532 iwn_prph_clrbits(struct iwn_softc *sc, uint32_t addr, uint32_t mask)
1534 iwn_prph_write(sc, addr, iwn_prph_read(sc, addr) & ~mask);
1537 static __inline void
1538 iwn_prph_write_region_4(struct iwn_softc *sc, uint32_t addr,
1539 const uint32_t *data, int count)
1541 for (; count > 0; count--, data++, addr += 4)
1542 iwn_prph_write(sc, addr, *data);
1545 static __inline uint32_t
1546 iwn_mem_read(struct iwn_softc *sc, uint32_t addr)
1548 IWN_WRITE(sc, IWN_MEM_RADDR, addr);
1549 IWN_BARRIER_READ_WRITE(sc);
1550 return IWN_READ(sc, IWN_MEM_RDATA);
1553 static __inline void
1554 iwn_mem_write(struct iwn_softc *sc, uint32_t addr, uint32_t data)
1556 IWN_WRITE(sc, IWN_MEM_WADDR, addr);
1557 IWN_BARRIER_WRITE(sc);
1558 IWN_WRITE(sc, IWN_MEM_WDATA, data);
1561 static __inline void
1562 iwn_mem_write_2(struct iwn_softc *sc, uint32_t addr, uint16_t data)
1566 tmp = iwn_mem_read(sc, addr & ~3);
1568 tmp = (tmp & 0x0000ffff) | data << 16;
1570 tmp = (tmp & 0xffff0000) | data;
1571 iwn_mem_write(sc, addr & ~3, tmp);
1574 static __inline void
1575 iwn_mem_read_region_4(struct iwn_softc *sc, uint32_t addr, uint32_t *data,
1578 for (; count > 0; count--, addr += 4)
1579 *data++ = iwn_mem_read(sc, addr);
1582 static __inline void
1583 iwn_mem_set_region_4(struct iwn_softc *sc, uint32_t addr, uint32_t val,
1586 for (; count > 0; count--, addr += 4)
1587 iwn_mem_write(sc, addr, val);
1591 iwn_eeprom_lock(struct iwn_softc *sc)
1595 for (i = 0; i < 100; i++) {
1596 /* Request exclusive access to EEPROM. */
1597 IWN_SETBITS(sc, IWN_HW_IF_CONFIG,
1598 IWN_HW_IF_CONFIG_EEPROM_LOCKED);
1600 /* Spin until we actually get the lock. */
1601 for (ntries = 0; ntries < 100; ntries++) {
1602 if (IWN_READ(sc, IWN_HW_IF_CONFIG) &
1603 IWN_HW_IF_CONFIG_EEPROM_LOCKED)
1608 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end timeout\n", __func__);
1612 static __inline void
1613 iwn_eeprom_unlock(struct iwn_softc *sc)
1615 IWN_CLRBITS(sc, IWN_HW_IF_CONFIG, IWN_HW_IF_CONFIG_EEPROM_LOCKED);
1619 * Initialize access by host to One Time Programmable ROM.
1620 * NB: This kind of ROM can be found on 1000 or 6000 Series only.
1623 iwn_init_otprom(struct iwn_softc *sc)
1625 uint16_t prev, base, next;
1628 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
1630 /* Wait for clock stabilization before accessing prph. */
1631 if ((error = iwn_clock_wait(sc)) != 0)
1634 if ((error = iwn_nic_lock(sc)) != 0)
1636 iwn_prph_setbits(sc, IWN_APMG_PS, IWN_APMG_PS_RESET_REQ);
1638 iwn_prph_clrbits(sc, IWN_APMG_PS, IWN_APMG_PS_RESET_REQ);
1641 /* Set auto clock gate disable bit for HW with OTP shadow RAM. */
1642 if (sc->base_params->shadow_ram_support) {
1643 IWN_SETBITS(sc, IWN_DBG_LINK_PWR_MGMT,
1644 IWN_RESET_LINK_PWR_MGMT_DIS);
1646 IWN_CLRBITS(sc, IWN_EEPROM_GP, IWN_EEPROM_GP_IF_OWNER);
1647 /* Clear ECC status. */
1648 IWN_SETBITS(sc, IWN_OTP_GP,
1649 IWN_OTP_GP_ECC_CORR_STTS | IWN_OTP_GP_ECC_UNCORR_STTS);
1652 * Find the block before last block (contains the EEPROM image)
1653 * for HW without OTP shadow RAM.
1655 if (! sc->base_params->shadow_ram_support) {
1656 /* Switch to absolute addressing mode. */
1657 IWN_CLRBITS(sc, IWN_OTP_GP, IWN_OTP_GP_RELATIVE_ACCESS);
1659 for (count = 0; count < sc->base_params->max_ll_items;
1661 error = iwn_read_prom_data(sc, base, &next, 2);
1664 if (next == 0) /* End of linked-list. */
1667 base = le16toh(next);
1669 if (count == 0 || count == sc->base_params->max_ll_items)
1671 /* Skip "next" word. */
1672 sc->prom_base = prev + 1;
1675 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
1681 iwn_read_prom_data(struct iwn_softc *sc, uint32_t addr, void *data, int count)
1683 uint8_t *out = data;
1687 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
1689 addr += sc->prom_base;
1690 for (; count > 0; count -= 2, addr++) {
1691 IWN_WRITE(sc, IWN_EEPROM, addr << 2);
1692 for (ntries = 0; ntries < 10; ntries++) {
1693 val = IWN_READ(sc, IWN_EEPROM);
1694 if (val & IWN_EEPROM_READ_VALID)
1699 device_printf(sc->sc_dev,
1700 "timeout reading ROM at 0x%x\n", addr);
1703 if (sc->sc_flags & IWN_FLAG_HAS_OTPROM) {
1704 /* OTPROM, check for ECC errors. */
1705 tmp = IWN_READ(sc, IWN_OTP_GP);
1706 if (tmp & IWN_OTP_GP_ECC_UNCORR_STTS) {
1707 device_printf(sc->sc_dev,
1708 "OTPROM ECC error at 0x%x\n", addr);
1711 if (tmp & IWN_OTP_GP_ECC_CORR_STTS) {
1712 /* Correctable ECC error, clear bit. */
1713 IWN_SETBITS(sc, IWN_OTP_GP,
1714 IWN_OTP_GP_ECC_CORR_STTS);
1722 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
1728 iwn_dma_map_addr(void *arg, bus_dma_segment_t *segs, int nsegs, int error)
1732 KASSERT(nsegs == 1, ("too many DMA segments, %d should be 1", nsegs));
1733 *(bus_addr_t *)arg = segs[0].ds_addr;
1737 iwn_dma_contig_alloc(struct iwn_softc *sc, struct iwn_dma_info *dma,
1738 void **kvap, bus_size_t size, bus_size_t alignment)
1745 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), alignment,
1746 0, BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, size,
1747 1, size, 0, NULL, NULL, &dma->tag);
1751 error = bus_dmamem_alloc(dma->tag, (void **)&dma->vaddr,
1752 BUS_DMA_NOWAIT | BUS_DMA_ZERO | BUS_DMA_COHERENT, &dma->map);
1756 error = bus_dmamap_load(dma->tag, dma->map, dma->vaddr, size,
1757 iwn_dma_map_addr, &dma->paddr, BUS_DMA_NOWAIT);
1761 bus_dmamap_sync(dma->tag, dma->map, BUS_DMASYNC_PREWRITE);
1768 fail: iwn_dma_contig_free(dma);
1773 iwn_dma_contig_free(struct iwn_dma_info *dma)
1775 if (dma->vaddr != NULL) {
1776 bus_dmamap_sync(dma->tag, dma->map,
1777 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
1778 bus_dmamap_unload(dma->tag, dma->map);
1779 bus_dmamem_free(dma->tag, dma->vaddr, dma->map);
1782 if (dma->tag != NULL) {
1783 bus_dma_tag_destroy(dma->tag);
1789 iwn_alloc_sched(struct iwn_softc *sc)
1791 /* TX scheduler rings must be aligned on a 1KB boundary. */
1792 return iwn_dma_contig_alloc(sc, &sc->sched_dma, (void **)&sc->sched,
1797 iwn_free_sched(struct iwn_softc *sc)
1799 iwn_dma_contig_free(&sc->sched_dma);
1803 iwn_alloc_kw(struct iwn_softc *sc)
1805 /* "Keep Warm" page must be aligned on a 4KB boundary. */
1806 return iwn_dma_contig_alloc(sc, &sc->kw_dma, NULL, 4096, 4096);
1810 iwn_free_kw(struct iwn_softc *sc)
1812 iwn_dma_contig_free(&sc->kw_dma);
1816 iwn_alloc_ict(struct iwn_softc *sc)
1818 /* ICT table must be aligned on a 4KB boundary. */
1819 return iwn_dma_contig_alloc(sc, &sc->ict_dma, (void **)&sc->ict,
1820 IWN_ICT_SIZE, 4096);
1824 iwn_free_ict(struct iwn_softc *sc)
1826 iwn_dma_contig_free(&sc->ict_dma);
1830 iwn_alloc_fwmem(struct iwn_softc *sc)
1832 /* Must be aligned on a 16-byte boundary. */
1833 return iwn_dma_contig_alloc(sc, &sc->fw_dma, NULL, sc->fwsz, 16);
1837 iwn_free_fwmem(struct iwn_softc *sc)
1839 iwn_dma_contig_free(&sc->fw_dma);
1843 iwn_alloc_rx_ring(struct iwn_softc *sc, struct iwn_rx_ring *ring)
1850 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
1852 /* Allocate RX descriptors (256-byte aligned). */
1853 size = IWN_RX_RING_COUNT * sizeof (uint32_t);
1854 error = iwn_dma_contig_alloc(sc, &ring->desc_dma, (void **)&ring->desc,
1857 device_printf(sc->sc_dev,
1858 "%s: could not allocate RX ring DMA memory, error %d\n",
1863 /* Allocate RX status area (16-byte aligned). */
1864 error = iwn_dma_contig_alloc(sc, &ring->stat_dma, (void **)&ring->stat,
1865 sizeof (struct iwn_rx_status), 16);
1867 device_printf(sc->sc_dev,
1868 "%s: could not allocate RX status DMA memory, error %d\n",
1873 /* Create RX buffer DMA tag. */
1874 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 1, 0,
1875 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL,
1876 IWN_RBUF_SIZE, 1, IWN_RBUF_SIZE, 0, NULL, NULL, &ring->data_dmat);
1878 device_printf(sc->sc_dev,
1879 "%s: could not create RX buf DMA tag, error %d\n",
1885 * Allocate and map RX buffers.
1887 for (i = 0; i < IWN_RX_RING_COUNT; i++) {
1888 struct iwn_rx_data *data = &ring->data[i];
1891 error = bus_dmamap_create(ring->data_dmat, 0, &data->map);
1893 device_printf(sc->sc_dev,
1894 "%s: could not create RX buf DMA map, error %d\n",
1899 data->m = m_getjcl(M_NOWAIT, MT_DATA, M_PKTHDR,
1901 if (data->m == NULL) {
1902 device_printf(sc->sc_dev,
1903 "%s: could not allocate RX mbuf\n", __func__);
1908 error = bus_dmamap_load(ring->data_dmat, data->map,
1909 mtod(data->m, void *), IWN_RBUF_SIZE, iwn_dma_map_addr,
1910 &paddr, BUS_DMA_NOWAIT);
1911 if (error != 0 && error != EFBIG) {
1912 device_printf(sc->sc_dev,
1913 "%s: can't map mbuf, error %d\n", __func__,
1918 bus_dmamap_sync(ring->data_dmat, data->map,
1919 BUS_DMASYNC_PREREAD);
1921 /* Set physical address of RX buffer (256-byte aligned). */
1922 ring->desc[i] = htole32(paddr >> 8);
1925 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
1926 BUS_DMASYNC_PREWRITE);
1928 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
1932 fail: iwn_free_rx_ring(sc, ring);
1934 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end in error\n",__func__);
1940 iwn_reset_rx_ring(struct iwn_softc *sc, struct iwn_rx_ring *ring)
1944 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
1946 if (iwn_nic_lock(sc) == 0) {
1947 IWN_WRITE(sc, IWN_FH_RX_CONFIG, 0);
1948 for (ntries = 0; ntries < 1000; ntries++) {
1949 if (IWN_READ(sc, IWN_FH_RX_STATUS) &
1950 IWN_FH_RX_STATUS_IDLE)
1957 sc->last_rx_valid = 0;
1961 iwn_free_rx_ring(struct iwn_softc *sc, struct iwn_rx_ring *ring)
1965 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s \n", __func__);
1967 iwn_dma_contig_free(&ring->desc_dma);
1968 iwn_dma_contig_free(&ring->stat_dma);
1970 for (i = 0; i < IWN_RX_RING_COUNT; i++) {
1971 struct iwn_rx_data *data = &ring->data[i];
1973 if (data->m != NULL) {
1974 bus_dmamap_sync(ring->data_dmat, data->map,
1975 BUS_DMASYNC_POSTREAD);
1976 bus_dmamap_unload(ring->data_dmat, data->map);
1980 if (data->map != NULL)
1981 bus_dmamap_destroy(ring->data_dmat, data->map);
1983 if (ring->data_dmat != NULL) {
1984 bus_dma_tag_destroy(ring->data_dmat);
1985 ring->data_dmat = NULL;
1990 iwn_alloc_tx_ring(struct iwn_softc *sc, struct iwn_tx_ring *ring, int qid)
2000 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
2002 /* Allocate TX descriptors (256-byte aligned). */
2003 size = IWN_TX_RING_COUNT * sizeof (struct iwn_tx_desc);
2004 error = iwn_dma_contig_alloc(sc, &ring->desc_dma, (void **)&ring->desc,
2007 device_printf(sc->sc_dev,
2008 "%s: could not allocate TX ring DMA memory, error %d\n",
2013 size = IWN_TX_RING_COUNT * sizeof (struct iwn_tx_cmd);
2014 error = iwn_dma_contig_alloc(sc, &ring->cmd_dma, (void **)&ring->cmd,
2017 device_printf(sc->sc_dev,
2018 "%s: could not allocate TX cmd DMA memory, error %d\n",
2023 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 1, 0,
2024 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES,
2025 IWN_MAX_SCATTER - 1, MCLBYTES, 0, NULL, NULL, &ring->data_dmat);
2027 device_printf(sc->sc_dev,
2028 "%s: could not create TX buf DMA tag, error %d\n",
2033 paddr = ring->cmd_dma.paddr;
2034 for (i = 0; i < IWN_TX_RING_COUNT; i++) {
2035 struct iwn_tx_data *data = &ring->data[i];
2037 data->cmd_paddr = paddr;
2038 data->scratch_paddr = paddr + 12;
2039 paddr += sizeof (struct iwn_tx_cmd);
2041 error = bus_dmamap_create(ring->data_dmat, 0, &data->map);
2043 device_printf(sc->sc_dev,
2044 "%s: could not create TX buf DMA map, error %d\n",
2050 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
2054 fail: iwn_free_tx_ring(sc, ring);
2055 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end in error\n", __func__);
2060 iwn_reset_tx_ring(struct iwn_softc *sc, struct iwn_tx_ring *ring)
2064 DPRINTF(sc, IWN_DEBUG_TRACE, "->doing %s \n", __func__);
2066 for (i = 0; i < IWN_TX_RING_COUNT; i++) {
2067 struct iwn_tx_data *data = &ring->data[i];
2069 if (data->m != NULL) {
2070 bus_dmamap_sync(ring->data_dmat, data->map,
2071 BUS_DMASYNC_POSTWRITE);
2072 bus_dmamap_unload(ring->data_dmat, data->map);
2076 if (data->ni != NULL) {
2077 ieee80211_free_node(data->ni);
2081 data->long_retries = 0;
2083 /* Clear TX descriptors. */
2084 memset(ring->desc, 0, ring->desc_dma.size);
2085 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
2086 BUS_DMASYNC_PREWRITE);
2087 sc->qfullmsk &= ~(1 << ring->qid);
2093 iwn_free_tx_ring(struct iwn_softc *sc, struct iwn_tx_ring *ring)
2097 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s \n", __func__);
2099 iwn_dma_contig_free(&ring->desc_dma);
2100 iwn_dma_contig_free(&ring->cmd_dma);
2102 for (i = 0; i < IWN_TX_RING_COUNT; i++) {
2103 struct iwn_tx_data *data = &ring->data[i];
2105 if (data->m != NULL) {
2106 bus_dmamap_sync(ring->data_dmat, data->map,
2107 BUS_DMASYNC_POSTWRITE);
2108 bus_dmamap_unload(ring->data_dmat, data->map);
2111 if (data->map != NULL)
2112 bus_dmamap_destroy(ring->data_dmat, data->map);
2114 if (ring->data_dmat != NULL) {
2115 bus_dma_tag_destroy(ring->data_dmat);
2116 ring->data_dmat = NULL;
2121 iwn_check_tx_ring(struct iwn_softc *sc, int qid)
2123 struct iwn_tx_ring *ring = &sc->txq[qid];
2125 KASSERT(ring->queued >= 0, ("%s: ring->queued (%d) for queue %d < 0!",
2126 __func__, ring->queued, qid));
2128 if (qid >= sc->firstaggqueue) {
2129 struct iwn_ops *ops = &sc->ops;
2130 struct ieee80211_tx_ampdu *tap = sc->qid2tap[qid];
2132 if (ring->queued == 0 && !IEEE80211_AMPDU_RUNNING(tap)) {
2133 uint16_t ssn = tap->txa_start & 0xfff;
2134 uint8_t tid = tap->txa_tid;
2135 int *res = tap->txa_private;
2138 ops->ampdu_tx_stop(sc, qid, tid, ssn);
2141 sc->qid2tap[qid] = NULL;
2142 free(res, M_DEVBUF);
2146 if (ring->queued < IWN_TX_RING_LOMARK) {
2147 sc->qfullmsk &= ~(1 << qid);
2149 if (ring->queued == 0)
2150 sc->sc_tx_timer = 0;
2152 sc->sc_tx_timer = 5;
2157 iwn5000_ict_reset(struct iwn_softc *sc)
2159 /* Disable interrupts. */
2160 IWN_WRITE(sc, IWN_INT_MASK, 0);
2162 /* Reset ICT table. */
2163 memset(sc->ict, 0, IWN_ICT_SIZE);
2166 bus_dmamap_sync(sc->ict_dma.tag, sc->ict_dma.map,
2167 BUS_DMASYNC_PREWRITE);
2169 /* Set physical address of ICT table (4KB aligned). */
2170 DPRINTF(sc, IWN_DEBUG_RESET, "%s: enabling ICT\n", __func__);
2171 IWN_WRITE(sc, IWN_DRAM_INT_TBL, IWN_DRAM_INT_TBL_ENABLE |
2172 IWN_DRAM_INT_TBL_WRAP_CHECK | sc->ict_dma.paddr >> 12);
2174 /* Enable periodic RX interrupt. */
2175 sc->int_mask |= IWN_INT_RX_PERIODIC;
2176 /* Switch to ICT interrupt mode in driver. */
2177 sc->sc_flags |= IWN_FLAG_USE_ICT;
2179 /* Re-enable interrupts. */
2180 IWN_WRITE(sc, IWN_INT, 0xffffffff);
2181 IWN_WRITE(sc, IWN_INT_MASK, sc->int_mask);
2185 iwn_read_eeprom(struct iwn_softc *sc, uint8_t macaddr[IEEE80211_ADDR_LEN])
2187 struct iwn_ops *ops = &sc->ops;
2191 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
2193 /* Check whether adapter has an EEPROM or an OTPROM. */
2194 if (sc->hw_type >= IWN_HW_REV_TYPE_1000 &&
2195 (IWN_READ(sc, IWN_OTP_GP) & IWN_OTP_GP_DEV_SEL_OTP))
2196 sc->sc_flags |= IWN_FLAG_HAS_OTPROM;
2197 DPRINTF(sc, IWN_DEBUG_RESET, "%s found\n",
2198 (sc->sc_flags & IWN_FLAG_HAS_OTPROM) ? "OTPROM" : "EEPROM");
2200 /* Adapter has to be powered on for EEPROM access to work. */
2201 if ((error = iwn_apm_init(sc)) != 0) {
2202 device_printf(sc->sc_dev,
2203 "%s: could not power ON adapter, error %d\n", __func__,
2208 if ((IWN_READ(sc, IWN_EEPROM_GP) & 0x7) == 0) {
2209 device_printf(sc->sc_dev, "%s: bad ROM signature\n", __func__);
2212 if ((error = iwn_eeprom_lock(sc)) != 0) {
2213 device_printf(sc->sc_dev, "%s: could not lock ROM, error %d\n",
2217 if (sc->sc_flags & IWN_FLAG_HAS_OTPROM) {
2218 if ((error = iwn_init_otprom(sc)) != 0) {
2219 device_printf(sc->sc_dev,
2220 "%s: could not initialize OTPROM, error %d\n",
2226 iwn_read_prom_data(sc, IWN_EEPROM_SKU_CAP, &val, 2);
2227 DPRINTF(sc, IWN_DEBUG_RESET, "SKU capabilities=0x%04x\n", le16toh(val));
2228 /* Check if HT support is bonded out. */
2229 if (val & htole16(IWN_EEPROM_SKU_CAP_11N))
2230 sc->sc_flags |= IWN_FLAG_HAS_11N;
2232 iwn_read_prom_data(sc, IWN_EEPROM_RFCFG, &val, 2);
2233 sc->rfcfg = le16toh(val);
2234 DPRINTF(sc, IWN_DEBUG_RESET, "radio config=0x%04x\n", sc->rfcfg);
2235 /* Read Tx/Rx chains from ROM unless it's known to be broken. */
2236 if (sc->txchainmask == 0)
2237 sc->txchainmask = IWN_RFCFG_TXANTMSK(sc->rfcfg);
2238 if (sc->rxchainmask == 0)
2239 sc->rxchainmask = IWN_RFCFG_RXANTMSK(sc->rfcfg);
2241 /* Read MAC address. */
2242 iwn_read_prom_data(sc, IWN_EEPROM_MAC, macaddr, 6);
2244 /* Read adapter-specific information from EEPROM. */
2245 ops->read_eeprom(sc);
2247 iwn_apm_stop(sc); /* Power OFF adapter. */
2249 iwn_eeprom_unlock(sc);
2251 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
2257 iwn4965_read_eeprom(struct iwn_softc *sc)
2263 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
2265 /* Read regulatory domain (4 ASCII characters). */
2266 iwn_read_prom_data(sc, IWN4965_EEPROM_DOMAIN, sc->eeprom_domain, 4);
2268 /* Read the list of authorized channels (20MHz & 40MHz). */
2269 for (i = 0; i < IWN_NBANDS - 1; i++) {
2270 addr = iwn4965_regulatory_bands[i];
2271 iwn_read_eeprom_channels(sc, i, addr);
2274 /* Read maximum allowed TX power for 2GHz and 5GHz bands. */
2275 iwn_read_prom_data(sc, IWN4965_EEPROM_MAXPOW, &val, 2);
2276 sc->maxpwr2GHz = val & 0xff;
2277 sc->maxpwr5GHz = val >> 8;
2278 /* Check that EEPROM values are within valid range. */
2279 if (sc->maxpwr5GHz < 20 || sc->maxpwr5GHz > 50)
2280 sc->maxpwr5GHz = 38;
2281 if (sc->maxpwr2GHz < 20 || sc->maxpwr2GHz > 50)
2282 sc->maxpwr2GHz = 38;
2283 DPRINTF(sc, IWN_DEBUG_RESET, "maxpwr 2GHz=%d 5GHz=%d\n",
2284 sc->maxpwr2GHz, sc->maxpwr5GHz);
2286 /* Read samples for each TX power group. */
2287 iwn_read_prom_data(sc, IWN4965_EEPROM_BANDS, sc->bands,
2290 /* Read voltage at which samples were taken. */
2291 iwn_read_prom_data(sc, IWN4965_EEPROM_VOLTAGE, &val, 2);
2292 sc->eeprom_voltage = (int16_t)le16toh(val);
2293 DPRINTF(sc, IWN_DEBUG_RESET, "voltage=%d (in 0.3V)\n",
2294 sc->eeprom_voltage);
2297 /* Print samples. */
2298 if (sc->sc_debug & IWN_DEBUG_ANY) {
2299 for (i = 0; i < IWN_NBANDS - 1; i++)
2300 iwn4965_print_power_group(sc, i);
2304 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
2309 iwn4965_print_power_group(struct iwn_softc *sc, int i)
2311 struct iwn4965_eeprom_band *band = &sc->bands[i];
2312 struct iwn4965_eeprom_chan_samples *chans = band->chans;
2315 printf("===band %d===\n", i);
2316 printf("chan lo=%d, chan hi=%d\n", band->lo, band->hi);
2317 printf("chan1 num=%d\n", chans[0].num);
2318 for (c = 0; c < 2; c++) {
2319 for (j = 0; j < IWN_NSAMPLES; j++) {
2320 printf("chain %d, sample %d: temp=%d gain=%d "
2321 "power=%d pa_det=%d\n", c, j,
2322 chans[0].samples[c][j].temp,
2323 chans[0].samples[c][j].gain,
2324 chans[0].samples[c][j].power,
2325 chans[0].samples[c][j].pa_det);
2328 printf("chan2 num=%d\n", chans[1].num);
2329 for (c = 0; c < 2; c++) {
2330 for (j = 0; j < IWN_NSAMPLES; j++) {
2331 printf("chain %d, sample %d: temp=%d gain=%d "
2332 "power=%d pa_det=%d\n", c, j,
2333 chans[1].samples[c][j].temp,
2334 chans[1].samples[c][j].gain,
2335 chans[1].samples[c][j].power,
2336 chans[1].samples[c][j].pa_det);
2343 iwn5000_read_eeprom(struct iwn_softc *sc)
2345 struct iwn5000_eeprom_calib_hdr hdr;
2347 uint32_t base, addr;
2351 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
2353 /* Read regulatory domain (4 ASCII characters). */
2354 iwn_read_prom_data(sc, IWN5000_EEPROM_REG, &val, 2);
2355 base = le16toh(val);
2356 iwn_read_prom_data(sc, base + IWN5000_EEPROM_DOMAIN,
2357 sc->eeprom_domain, 4);
2359 /* Read the list of authorized channels (20MHz & 40MHz). */
2360 for (i = 0; i < IWN_NBANDS - 1; i++) {
2361 addr = base + sc->base_params->regulatory_bands[i];
2362 iwn_read_eeprom_channels(sc, i, addr);
2365 /* Read enhanced TX power information for 6000 Series. */
2366 if (sc->base_params->enhanced_TX_power)
2367 iwn_read_eeprom_enhinfo(sc);
2369 iwn_read_prom_data(sc, IWN5000_EEPROM_CAL, &val, 2);
2370 base = le16toh(val);
2371 iwn_read_prom_data(sc, base, &hdr, sizeof hdr);
2372 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
2373 "%s: calib version=%u pa type=%u voltage=%u\n", __func__,
2374 hdr.version, hdr.pa_type, le16toh(hdr.volt));
2375 sc->calib_ver = hdr.version;
2377 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSETv2) {
2378 sc->eeprom_voltage = le16toh(hdr.volt);
2379 iwn_read_prom_data(sc, base + IWN5000_EEPROM_TEMP, &val, 2);
2380 sc->eeprom_temp_high=le16toh(val);
2381 iwn_read_prom_data(sc, base + IWN5000_EEPROM_VOLT, &val, 2);
2382 sc->eeprom_temp = le16toh(val);
2385 if (sc->hw_type == IWN_HW_REV_TYPE_5150) {
2386 /* Compute temperature offset. */
2387 iwn_read_prom_data(sc, base + IWN5000_EEPROM_TEMP, &val, 2);
2388 sc->eeprom_temp = le16toh(val);
2389 iwn_read_prom_data(sc, base + IWN5000_EEPROM_VOLT, &val, 2);
2390 volt = le16toh(val);
2391 sc->temp_off = sc->eeprom_temp - (volt / -5);
2392 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "temp=%d volt=%d offset=%dK\n",
2393 sc->eeprom_temp, volt, sc->temp_off);
2395 /* Read crystal calibration. */
2396 iwn_read_prom_data(sc, base + IWN5000_EEPROM_CRYSTAL,
2397 &sc->eeprom_crystal, sizeof (uint32_t));
2398 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "crystal calibration 0x%08x\n",
2399 le32toh(sc->eeprom_crystal));
2402 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
2407 * Translate EEPROM flags to net80211.
2410 iwn_eeprom_channel_flags(struct iwn_eeprom_chan *channel)
2415 if ((channel->flags & IWN_EEPROM_CHAN_ACTIVE) == 0)
2416 nflags |= IEEE80211_CHAN_PASSIVE;
2417 if ((channel->flags & IWN_EEPROM_CHAN_IBSS) == 0)
2418 nflags |= IEEE80211_CHAN_NOADHOC;
2419 if (channel->flags & IWN_EEPROM_CHAN_RADAR) {
2420 nflags |= IEEE80211_CHAN_DFS;
2421 /* XXX apparently IBSS may still be marked */
2422 nflags |= IEEE80211_CHAN_NOADHOC;
2429 iwn_read_eeprom_band(struct iwn_softc *sc, int n, int maxchans, int *nchans,
2430 struct ieee80211_channel chans[])
2432 struct iwn_eeprom_chan *channels = sc->eeprom_channels[n];
2433 const struct iwn_chan_band *band = &iwn_bands[n];
2434 uint8_t bands[IEEE80211_MODE_BYTES];
2436 int i, error, nflags;
2438 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
2440 memset(bands, 0, sizeof(bands));
2442 setbit(bands, IEEE80211_MODE_11B);
2443 setbit(bands, IEEE80211_MODE_11G);
2444 if (sc->sc_flags & IWN_FLAG_HAS_11N)
2445 setbit(bands, IEEE80211_MODE_11NG);
2447 setbit(bands, IEEE80211_MODE_11A);
2448 if (sc->sc_flags & IWN_FLAG_HAS_11N)
2449 setbit(bands, IEEE80211_MODE_11NA);
2452 for (i = 0; i < band->nchan; i++) {
2453 if (!(channels[i].flags & IWN_EEPROM_CHAN_VALID)) {
2454 DPRINTF(sc, IWN_DEBUG_RESET,
2455 "skip chan %d flags 0x%x maxpwr %d\n",
2456 band->chan[i], channels[i].flags,
2457 channels[i].maxpwr);
2461 chan = band->chan[i];
2462 nflags = iwn_eeprom_channel_flags(&channels[i]);
2463 error = ieee80211_add_channel(chans, maxchans, nchans,
2464 chan, 0, channels[i].maxpwr, nflags, bands);
2468 /* Save maximum allowed TX power for this channel. */
2470 sc->maxpwr[chan] = channels[i].maxpwr;
2472 DPRINTF(sc, IWN_DEBUG_RESET,
2473 "add chan %d flags 0x%x maxpwr %d\n", chan,
2474 channels[i].flags, channels[i].maxpwr);
2477 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
2482 iwn_read_eeprom_ht40(struct iwn_softc *sc, int n, int maxchans, int *nchans,
2483 struct ieee80211_channel chans[])
2485 struct iwn_eeprom_chan *channels = sc->eeprom_channels[n];
2486 const struct iwn_chan_band *band = &iwn_bands[n];
2488 int i, error, nflags;
2490 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s start\n", __func__);
2492 if (!(sc->sc_flags & IWN_FLAG_HAS_11N)) {
2493 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end no 11n\n", __func__);
2497 for (i = 0; i < band->nchan; i++) {
2498 if (!(channels[i].flags & IWN_EEPROM_CHAN_VALID)) {
2499 DPRINTF(sc, IWN_DEBUG_RESET,
2500 "skip chan %d flags 0x%x maxpwr %d\n",
2501 band->chan[i], channels[i].flags,
2502 channels[i].maxpwr);
2506 chan = band->chan[i];
2507 nflags = iwn_eeprom_channel_flags(&channels[i]);
2508 nflags |= (n == 5 ? IEEE80211_CHAN_G : IEEE80211_CHAN_A);
2509 error = ieee80211_add_channel_ht40(chans, maxchans, nchans,
2510 chan, channels[i].maxpwr, nflags);
2513 device_printf(sc->sc_dev,
2514 "%s: no entry for channel %d\n", __func__, chan);
2517 DPRINTF(sc, IWN_DEBUG_RESET,
2518 "%s: skip chan %d, extension channel not found\n",
2522 device_printf(sc->sc_dev,
2523 "%s: channel table is full!\n", __func__);
2526 DPRINTF(sc, IWN_DEBUG_RESET,
2527 "add ht40 chan %d flags 0x%x maxpwr %d\n",
2528 chan, channels[i].flags, channels[i].maxpwr);
2535 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
2540 iwn_read_eeprom_channels(struct iwn_softc *sc, int n, uint32_t addr)
2542 struct ieee80211com *ic = &sc->sc_ic;
2544 iwn_read_prom_data(sc, addr, &sc->eeprom_channels[n],
2545 iwn_bands[n].nchan * sizeof (struct iwn_eeprom_chan));
2548 iwn_read_eeprom_band(sc, n, IEEE80211_CHAN_MAX, &ic->ic_nchans,
2551 iwn_read_eeprom_ht40(sc, n, IEEE80211_CHAN_MAX, &ic->ic_nchans,
2554 ieee80211_sort_channels(ic->ic_channels, ic->ic_nchans);
2557 static struct iwn_eeprom_chan *
2558 iwn_find_eeprom_channel(struct iwn_softc *sc, struct ieee80211_channel *c)
2560 int band, chan, i, j;
2562 if (IEEE80211_IS_CHAN_HT40(c)) {
2563 band = IEEE80211_IS_CHAN_5GHZ(c) ? 6 : 5;
2564 if (IEEE80211_IS_CHAN_HT40D(c))
2565 chan = c->ic_extieee;
2568 for (i = 0; i < iwn_bands[band].nchan; i++) {
2569 if (iwn_bands[band].chan[i] == chan)
2570 return &sc->eeprom_channels[band][i];
2573 for (j = 0; j < 5; j++) {
2574 for (i = 0; i < iwn_bands[j].nchan; i++) {
2575 if (iwn_bands[j].chan[i] == c->ic_ieee &&
2576 ((j == 0) ^ IEEE80211_IS_CHAN_A(c)) == 1)
2577 return &sc->eeprom_channels[j][i];
2585 iwn_getradiocaps(struct ieee80211com *ic,
2586 int maxchans, int *nchans, struct ieee80211_channel chans[])
2588 struct iwn_softc *sc = ic->ic_softc;
2591 /* Parse the list of authorized channels. */
2592 for (i = 0; i < 5 && *nchans < maxchans; i++)
2593 iwn_read_eeprom_band(sc, i, maxchans, nchans, chans);
2594 for (i = 5; i < IWN_NBANDS - 1 && *nchans < maxchans; i++)
2595 iwn_read_eeprom_ht40(sc, i, maxchans, nchans, chans);
2599 * Enforce flags read from EEPROM.
2602 iwn_setregdomain(struct ieee80211com *ic, struct ieee80211_regdomain *rd,
2603 int nchan, struct ieee80211_channel chans[])
2605 struct iwn_softc *sc = ic->ic_softc;
2608 for (i = 0; i < nchan; i++) {
2609 struct ieee80211_channel *c = &chans[i];
2610 struct iwn_eeprom_chan *channel;
2612 channel = iwn_find_eeprom_channel(sc, c);
2613 if (channel == NULL) {
2614 ic_printf(ic, "%s: invalid channel %u freq %u/0x%x\n",
2615 __func__, c->ic_ieee, c->ic_freq, c->ic_flags);
2618 c->ic_flags |= iwn_eeprom_channel_flags(channel);
2625 iwn_read_eeprom_enhinfo(struct iwn_softc *sc)
2627 struct iwn_eeprom_enhinfo enhinfo[35];
2628 struct ieee80211com *ic = &sc->sc_ic;
2629 struct ieee80211_channel *c;
2635 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
2637 iwn_read_prom_data(sc, IWN5000_EEPROM_REG, &val, 2);
2638 base = le16toh(val);
2639 iwn_read_prom_data(sc, base + IWN6000_EEPROM_ENHINFO,
2640 enhinfo, sizeof enhinfo);
2642 for (i = 0; i < nitems(enhinfo); i++) {
2643 flags = enhinfo[i].flags;
2644 if (!(flags & IWN_ENHINFO_VALID))
2645 continue; /* Skip invalid entries. */
2648 if (sc->txchainmask & IWN_ANT_A)
2649 maxpwr = MAX(maxpwr, enhinfo[i].chain[0]);
2650 if (sc->txchainmask & IWN_ANT_B)
2651 maxpwr = MAX(maxpwr, enhinfo[i].chain[1]);
2652 if (sc->txchainmask & IWN_ANT_C)
2653 maxpwr = MAX(maxpwr, enhinfo[i].chain[2]);
2654 if (sc->ntxchains == 2)
2655 maxpwr = MAX(maxpwr, enhinfo[i].mimo2);
2656 else if (sc->ntxchains == 3)
2657 maxpwr = MAX(maxpwr, enhinfo[i].mimo3);
2659 for (j = 0; j < ic->ic_nchans; j++) {
2660 c = &ic->ic_channels[j];
2661 if ((flags & IWN_ENHINFO_5GHZ)) {
2662 if (!IEEE80211_IS_CHAN_A(c))
2664 } else if ((flags & IWN_ENHINFO_OFDM)) {
2665 if (!IEEE80211_IS_CHAN_G(c))
2667 } else if (!IEEE80211_IS_CHAN_B(c))
2669 if ((flags & IWN_ENHINFO_HT40)) {
2670 if (!IEEE80211_IS_CHAN_HT40(c))
2673 if (IEEE80211_IS_CHAN_HT40(c))
2676 if (enhinfo[i].chan != 0 &&
2677 enhinfo[i].chan != c->ic_ieee)
2680 DPRINTF(sc, IWN_DEBUG_RESET,
2681 "channel %d(%x), maxpwr %d\n", c->ic_ieee,
2682 c->ic_flags, maxpwr / 2);
2683 c->ic_maxregpower = maxpwr / 2;
2684 c->ic_maxpower = maxpwr;
2688 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
2692 static struct ieee80211_node *
2693 iwn_node_alloc(struct ieee80211vap *vap, const uint8_t mac[IEEE80211_ADDR_LEN])
2695 struct iwn_node *wn;
2697 wn = malloc(sizeof (struct iwn_node), M_80211_NODE, M_NOWAIT | M_ZERO);
2701 wn->id = IWN_ID_UNDEFINED;
2709 switch (rate & 0xff) {
2710 case 12: return 0xd;
2711 case 18: return 0xf;
2712 case 24: return 0x5;
2713 case 36: return 0x7;
2714 case 48: return 0x9;
2715 case 72: return 0xb;
2716 case 96: return 0x1;
2717 case 108: return 0x3;
2721 case 22: return 110;
2726 static __inline uint8_t
2727 plcp2rate(const uint8_t rate_plcp)
2729 switch (rate_plcp) {
2730 case 0xd: return 12;
2731 case 0xf: return 18;
2732 case 0x5: return 24;
2733 case 0x7: return 36;
2734 case 0x9: return 48;
2735 case 0xb: return 72;
2736 case 0x1: return 96;
2737 case 0x3: return 108;
2741 case 110: return 22;
2747 iwn_get_1stream_tx_antmask(struct iwn_softc *sc)
2750 return IWN_LSB(sc->txchainmask);
2754 iwn_get_2stream_tx_antmask(struct iwn_softc *sc)
2759 * The '2 stream' setup is a bit .. odd.
2761 * For NICs that support only 1 antenna, default to IWN_ANT_AB or
2762 * the firmware panics (eg Intel 5100.)
2764 * For NICs that support two antennas, we use ANT_AB.
2766 * For NICs that support three antennas, we use the two that
2767 * wasn't the default one.
2769 * XXX TODO: if bluetooth (full concurrent) is enabled, restrict
2770 * this to only one antenna.
2773 /* Default - transmit on the other antennas */
2774 tx = (sc->txchainmask & ~IWN_LSB(sc->txchainmask));
2776 /* Now, if it's zero, set it to IWN_ANT_AB, so to not panic firmware */
2781 * If the NIC is a two-stream TX NIC, configure the TX mask to
2782 * the default chainmask
2784 else if (sc->ntxchains == 2)
2785 tx = sc->txchainmask;
2793 * Calculate the required PLCP value from the given rate,
2794 * to the given node.
2796 * This will take the node configuration (eg 11n, rate table
2797 * setup, etc) into consideration.
2800 iwn_rate_to_plcp(struct iwn_softc *sc, struct ieee80211_node *ni,
2803 struct ieee80211com *ic = ni->ni_ic;
2808 * If it's an MCS rate, let's set the plcp correctly
2809 * and set the relevant flags based on the node config.
2811 if (rate & IEEE80211_RATE_MCS) {
2813 * Set the initial PLCP value to be between 0->31 for
2814 * MCS 0 -> MCS 31, then set the "I'm an MCS rate!"
2817 plcp = IEEE80211_RV(rate) | IWN_RFLAG_MCS;
2820 * XXX the following should only occur if both
2821 * the local configuration _and_ the remote node
2822 * advertise these capabilities. Thus this code
2827 * Set the channel width and guard interval.
2829 if (IEEE80211_IS_CHAN_HT40(ni->ni_chan)) {
2830 plcp |= IWN_RFLAG_HT40;
2831 if (ni->ni_htcap & IEEE80211_HTCAP_SHORTGI40)
2832 plcp |= IWN_RFLAG_SGI;
2833 } else if (ni->ni_htcap & IEEE80211_HTCAP_SHORTGI20) {
2834 plcp |= IWN_RFLAG_SGI;
2838 * Ensure the selected rate matches the link quality
2839 * table entries being used.
2842 plcp |= IWN_RFLAG_ANT(sc->txchainmask);
2843 else if (rate > 0x87)
2844 plcp |= IWN_RFLAG_ANT(iwn_get_2stream_tx_antmask(sc));
2846 plcp |= IWN_RFLAG_ANT(iwn_get_1stream_tx_antmask(sc));
2849 * Set the initial PLCP - fine for both
2850 * OFDM and CCK rates.
2852 plcp = rate2plcp(rate);
2854 /* Set CCK flag if it's CCK */
2856 /* XXX It would be nice to have a method
2857 * to map the ridx -> phy table entry
2858 * so we could just query that, rather than
2859 * this hack to check against IWN_RIDX_OFDM6.
2861 ridx = ieee80211_legacy_rate_lookup(ic->ic_rt,
2862 rate & IEEE80211_RATE_VAL);
2863 if (ridx < IWN_RIDX_OFDM6 &&
2864 IEEE80211_IS_CHAN_2GHZ(ni->ni_chan))
2865 plcp |= IWN_RFLAG_CCK;
2867 /* Set antenna configuration */
2868 /* XXX TODO: is this the right antenna to use for legacy? */
2869 plcp |= IWN_RFLAG_ANT(iwn_get_1stream_tx_antmask(sc));
2872 DPRINTF(sc, IWN_DEBUG_TXRATE, "%s: rate=0x%02x, plcp=0x%08x\n",
2877 return (htole32(plcp));
2881 iwn_newassoc(struct ieee80211_node *ni, int isnew)
2883 /* Doesn't do anything at the moment */
2887 iwn_media_change(struct ifnet *ifp)
2891 error = ieee80211_media_change(ifp);
2892 /* NB: only the fixed rate can change and that doesn't need a reset */
2893 return (error == ENETRESET ? 0 : error);
2897 iwn_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg)
2899 struct iwn_vap *ivp = IWN_VAP(vap);
2900 struct ieee80211com *ic = vap->iv_ic;
2901 struct iwn_softc *sc = ic->ic_softc;
2904 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
2906 DPRINTF(sc, IWN_DEBUG_STATE, "%s: %s -> %s\n", __func__,
2907 ieee80211_state_name[vap->iv_state], ieee80211_state_name[nstate]);
2909 IEEE80211_UNLOCK(ic);
2911 callout_stop(&sc->calib_to);
2913 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX];
2916 case IEEE80211_S_ASSOC:
2917 if (vap->iv_state != IEEE80211_S_RUN)
2920 case IEEE80211_S_AUTH:
2921 if (vap->iv_state == IEEE80211_S_AUTH)
2925 * !AUTH -> AUTH transition requires state reset to handle
2926 * reassociations correctly.
2928 sc->rxon->associd = 0;
2929 sc->rxon->filter &= ~htole32(IWN_FILTER_BSS);
2930 sc->calib.state = IWN_CALIB_STATE_INIT;
2932 /* Wait until we hear a beacon before we transmit */
2933 if (IEEE80211_IS_CHAN_PASSIVE(ic->ic_curchan))
2934 sc->sc_beacon_wait = 1;
2936 if ((error = iwn_auth(sc, vap)) != 0) {
2937 device_printf(sc->sc_dev,
2938 "%s: could not move to auth state\n", __func__);
2942 case IEEE80211_S_RUN:
2944 * RUN -> RUN transition; Just restart the timers.
2946 if (vap->iv_state == IEEE80211_S_RUN) {
2951 /* Wait until we hear a beacon before we transmit */
2952 if (IEEE80211_IS_CHAN_PASSIVE(ic->ic_curchan))
2953 sc->sc_beacon_wait = 1;
2956 * !RUN -> RUN requires setting the association id
2957 * which is done with a firmware cmd. We also defer
2958 * starting the timers until that work is done.
2960 if ((error = iwn_run(sc, vap)) != 0) {
2961 device_printf(sc->sc_dev,
2962 "%s: could not move to run state\n", __func__);
2966 case IEEE80211_S_INIT:
2967 sc->calib.state = IWN_CALIB_STATE_INIT;
2969 * Purge the xmit queue so we don't have old frames
2970 * during a new association attempt.
2972 sc->sc_beacon_wait = 0;
2973 iwn_xmit_queue_drain(sc);
2982 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end in error\n", __func__);
2986 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
2988 return ivp->iv_newstate(vap, nstate, arg);
2992 iwn_calib_timeout(void *arg)
2994 struct iwn_softc *sc = arg;
2996 IWN_LOCK_ASSERT(sc);
2998 /* Force automatic TX power calibration every 60 secs. */
2999 if (++sc->calib_cnt >= 120) {
3002 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s\n",
3003 "sending request for statistics");
3004 (void)iwn_cmd(sc, IWN_CMD_GET_STATISTICS, &flags,
3008 callout_reset(&sc->calib_to, msecs_to_ticks(500), iwn_calib_timeout,
3013 * Process an RX_PHY firmware notification. This is usually immediately
3014 * followed by an MPDU_RX_DONE notification.
3017 iwn_rx_phy(struct iwn_softc *sc, struct iwn_rx_desc *desc)
3019 struct iwn_rx_stat *stat = (struct iwn_rx_stat *)(desc + 1);
3021 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: received PHY stats\n", __func__);
3023 /* Save RX statistics, they will be used on MPDU_RX_DONE. */
3024 memcpy(&sc->last_rx_stat, stat, sizeof (*stat));
3025 sc->last_rx_valid = 1;
3029 * Process an RX_DONE (4965AGN only) or MPDU_RX_DONE firmware notification.
3030 * Each MPDU_RX_DONE notification must be preceded by an RX_PHY one.
3033 iwn_rx_done(struct iwn_softc *sc, struct iwn_rx_desc *desc,
3034 struct iwn_rx_data *data)
3036 struct epoch_tracker et;
3037 struct iwn_ops *ops = &sc->ops;
3038 struct ieee80211com *ic = &sc->sc_ic;
3039 struct iwn_rx_ring *ring = &sc->rxq;
3040 struct ieee80211_frame_min *wh;
3041 struct ieee80211_node *ni;
3042 struct mbuf *m, *m1;
3043 struct iwn_rx_stat *stat;
3047 int error, len, rssi, nf;
3049 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
3051 if (desc->type == IWN_MPDU_RX_DONE) {
3052 /* Check for prior RX_PHY notification. */
3053 if (!sc->last_rx_valid) {
3054 DPRINTF(sc, IWN_DEBUG_ANY,
3055 "%s: missing RX_PHY\n", __func__);
3058 stat = &sc->last_rx_stat;
3060 stat = (struct iwn_rx_stat *)(desc + 1);
3062 if (stat->cfg_phy_len > IWN_STAT_MAXLEN) {
3063 device_printf(sc->sc_dev,
3064 "%s: invalid RX statistic header, len %d\n", __func__,
3068 if (desc->type == IWN_MPDU_RX_DONE) {
3069 struct iwn_rx_mpdu *mpdu = (struct iwn_rx_mpdu *)(desc + 1);
3070 head = (caddr_t)(mpdu + 1);
3071 len = le16toh(mpdu->len);
3073 head = (caddr_t)(stat + 1) + stat->cfg_phy_len;
3074 len = le16toh(stat->len);
3077 flags = le32toh(*(uint32_t *)(head + len));
3079 /* Discard frames with a bad FCS early. */
3080 if ((flags & IWN_RX_NOERROR) != IWN_RX_NOERROR) {
3081 DPRINTF(sc, IWN_DEBUG_RECV, "%s: RX flags error %x\n",
3083 counter_u64_add(ic->ic_ierrors, 1);
3086 /* Discard frames that are too short. */
3087 if (len < sizeof (struct ieee80211_frame_ack)) {
3088 DPRINTF(sc, IWN_DEBUG_RECV, "%s: frame too short: %d\n",
3090 counter_u64_add(ic->ic_ierrors, 1);
3094 m1 = m_getjcl(M_NOWAIT, MT_DATA, M_PKTHDR, IWN_RBUF_SIZE);
3096 DPRINTF(sc, IWN_DEBUG_ANY, "%s: no mbuf to restock ring\n",
3098 counter_u64_add(ic->ic_ierrors, 1);
3101 bus_dmamap_unload(ring->data_dmat, data->map);
3103 error = bus_dmamap_load(ring->data_dmat, data->map, mtod(m1, void *),
3104 IWN_RBUF_SIZE, iwn_dma_map_addr, &paddr, BUS_DMA_NOWAIT);
3105 if (error != 0 && error != EFBIG) {
3106 device_printf(sc->sc_dev,
3107 "%s: bus_dmamap_load failed, error %d\n", __func__, error);
3110 /* Try to reload the old mbuf. */
3111 error = bus_dmamap_load(ring->data_dmat, data->map,
3112 mtod(data->m, void *), IWN_RBUF_SIZE, iwn_dma_map_addr,
3113 &paddr, BUS_DMA_NOWAIT);
3114 if (error != 0 && error != EFBIG) {
3115 panic("%s: could not load old RX mbuf", __func__);
3117 bus_dmamap_sync(ring->data_dmat, data->map,
3118 BUS_DMASYNC_PREREAD);
3119 /* Physical address may have changed. */
3120 ring->desc[ring->cur] = htole32(paddr >> 8);
3121 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
3122 BUS_DMASYNC_PREWRITE);
3123 counter_u64_add(ic->ic_ierrors, 1);
3127 bus_dmamap_sync(ring->data_dmat, data->map,
3128 BUS_DMASYNC_PREREAD);
3132 /* Update RX descriptor. */
3133 ring->desc[ring->cur] = htole32(paddr >> 8);
3134 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
3135 BUS_DMASYNC_PREWRITE);
3137 /* Finalize mbuf. */
3139 m->m_pkthdr.len = m->m_len = len;
3141 /* Grab a reference to the source node. */
3142 wh = mtod(m, struct ieee80211_frame_min *);
3143 if (len >= sizeof(struct ieee80211_frame_min))
3144 ni = ieee80211_find_rxnode(ic, wh);
3147 nf = (ni != NULL && ni->ni_vap->iv_state == IEEE80211_S_RUN &&
3148 (ic->ic_flags & IEEE80211_F_SCAN) == 0) ? sc->noise : -95;
3150 rssi = ops->get_rssi(sc, stat);
3152 if (ieee80211_radiotap_active(ic)) {
3153 struct iwn_rx_radiotap_header *tap = &sc->sc_rxtap;
3154 uint32_t rate = le32toh(stat->rate);
3157 if (stat->flags & htole16(IWN_STAT_FLAG_SHPREAMBLE))
3158 tap->wr_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
3159 tap->wr_dbm_antsignal = (int8_t)rssi;
3160 tap->wr_dbm_antnoise = (int8_t)nf;
3161 tap->wr_tsft = stat->tstamp;
3162 if (rate & IWN_RFLAG_MCS) {
3163 tap->wr_rate = rate & IWN_RFLAG_RATE_MCS;
3164 tap->wr_rate |= IEEE80211_RATE_MCS;
3166 tap->wr_rate = plcp2rate(rate & IWN_RFLAG_RATE);
3170 * If it's a beacon and we're waiting, then do the
3171 * wakeup. This should unblock raw_xmit/start.
3173 if (sc->sc_beacon_wait) {
3174 uint8_t type, subtype;
3175 /* NB: Re-assign wh */
3176 wh = mtod(m, struct ieee80211_frame_min *);
3177 type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK;
3178 subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
3180 * This assumes at this point we've received our own
3183 DPRINTF(sc, IWN_DEBUG_TRACE,
3184 "%s: beacon_wait, type=%d, subtype=%d\n",
3185 __func__, type, subtype);
3186 if (type == IEEE80211_FC0_TYPE_MGT &&
3187 subtype == IEEE80211_FC0_SUBTYPE_BEACON) {
3188 DPRINTF(sc, IWN_DEBUG_TRACE | IWN_DEBUG_XMIT,
3189 "%s: waking things up\n", __func__);
3190 /* queue taskqueue to transmit! */
3191 taskqueue_enqueue(sc->sc_tq, &sc->sc_xmit_task);
3196 NET_EPOCH_ENTER(et);
3198 /* Send the frame to the 802.11 layer. */
3200 if (ni->ni_flags & IEEE80211_NODE_HT)
3201 m->m_flags |= M_AMPDU;
3202 (void)ieee80211_input(ni, m, rssi - nf, nf);
3203 /* Node is no longer needed. */
3204 ieee80211_free_node(ni);
3206 (void)ieee80211_input_all(ic, m, rssi - nf, nf);
3211 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
3216 iwn_agg_tx_complete(struct iwn_softc *sc, struct iwn_tx_ring *ring, int tid,
3217 int idx, int success)
3219 struct ieee80211_ratectl_tx_status *txs = &sc->sc_txs;
3220 struct iwn_tx_data *data = &ring->data[idx];
3221 struct iwn_node *wn;
3223 struct ieee80211_node *ni;
3225 KASSERT(data->ni != NULL, ("idx %d: no node", idx));
3226 KASSERT(data->m != NULL, ("idx %d: no mbuf", idx));
3228 /* Unmap and free mbuf. */
3229 bus_dmamap_sync(ring->data_dmat, data->map,
3230 BUS_DMASYNC_POSTWRITE);
3231 bus_dmamap_unload(ring->data_dmat, data->map);
3232 m = data->m, data->m = NULL;
3233 ni = data->ni, data->ni = NULL;
3237 /* XXX causes significant performance degradation. */
3238 txs->flags = IEEE80211_RATECTL_STATUS_SHORT_RETRY |
3239 IEEE80211_RATECTL_STATUS_LONG_RETRY;
3240 txs->long_retries = data->long_retries - 1;
3242 txs->flags = IEEE80211_RATECTL_STATUS_SHORT_RETRY;
3244 txs->short_retries = wn->agg[tid].short_retries;
3246 txs->status = IEEE80211_RATECTL_TX_SUCCESS;
3248 txs->status = IEEE80211_RATECTL_TX_FAIL_UNSPECIFIED;
3250 wn->agg[tid].short_retries = 0;
3251 data->long_retries = 0;
3253 DPRINTF(sc, IWN_DEBUG_AMPDU, "%s: freeing m %p ni %p idx %d qid %d\n",
3254 __func__, m, ni, idx, ring->qid);
3255 ieee80211_ratectl_tx_complete(ni, txs);
3256 ieee80211_tx_complete(ni, m, !success);
3259 /* Process an incoming Compressed BlockAck. */
3261 iwn_rx_compressed_ba(struct iwn_softc *sc, struct iwn_rx_desc *desc)
3263 struct iwn_tx_ring *ring;
3264 struct iwn_tx_data *data;
3265 struct iwn_node *wn;
3266 struct iwn_compressed_ba *ba = (struct iwn_compressed_ba *)(desc + 1);
3267 struct ieee80211_tx_ampdu *tap;
3273 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
3275 qid = le16toh(ba->qid);
3276 tap = sc->qid2tap[qid];
3277 ring = &sc->txq[qid];
3279 wn = (void *)tap->txa_ni;
3281 DPRINTF(sc, IWN_DEBUG_AMPDU, "%s: qid %d tid %d seq %04X ssn %04X\n"
3282 "bitmap: ba %016jX wn %016jX, start %d\n",
3283 __func__, qid, tid, le16toh(ba->seq), le16toh(ba->ssn),
3284 (uintmax_t)le64toh(ba->bitmap), (uintmax_t)wn->agg[tid].bitmap,
3285 wn->agg[tid].startidx);
3287 if (wn->agg[tid].bitmap == 0)
3290 shift = wn->agg[tid].startidx - ((le16toh(ba->seq) >> 4) & 0xff);
3295 * Walk the bitmap and calculate how many successful attempts
3298 * Yes, the rate control code doesn't know these are A-MPDU
3299 * subframes; due to that long_retries stats are not used here.
3301 bitmap = le64toh(ba->bitmap);
3306 bitmap &= wn->agg[tid].bitmap;
3307 wn->agg[tid].bitmap = 0;
3309 for (i = wn->agg[tid].startidx;
3311 bitmap >>= 1, i = (i + 1) % IWN_TX_RING_COUNT) {
3312 if ((bitmap & 1) == 0)
3315 data = &ring->data[i];
3316 if (__predict_false(data->m == NULL)) {
3318 * There is no frame; skip this entry.
3320 * NB: it is "ok" to have both
3321 * 'tx done' + 'compressed BA' replies for frame
3322 * with STATE_SCD_QUERY status.
3324 DPRINTF(sc, IWN_DEBUG_AMPDU,
3325 "%s: ring %d: no entry %d\n", __func__, qid, i);
3330 iwn_agg_tx_complete(sc, ring, tid, i, 1);
3333 ring->queued -= tx_ok;
3334 iwn_check_tx_ring(sc, qid);
3336 DPRINTF(sc, IWN_DEBUG_TRACE | IWN_DEBUG_AMPDU,
3337 "->%s: end; %d ok\n",__func__, tx_ok);
3341 * Process a CALIBRATION_RESULT notification sent by the initialization
3342 * firmware on response to a CMD_CALIB_CONFIG command (5000 only).
3345 iwn5000_rx_calib_results(struct iwn_softc *sc, struct iwn_rx_desc *desc)
3347 struct iwn_phy_calib *calib = (struct iwn_phy_calib *)(desc + 1);
3350 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
3352 /* Runtime firmware should not send such a notification. */
3353 if (sc->sc_flags & IWN_FLAG_CALIB_DONE){
3354 DPRINTF(sc, IWN_DEBUG_TRACE,
3355 "->%s received after calib done\n", __func__);
3358 len = (le32toh(desc->len) & 0x3fff) - 4;
3360 switch (calib->code) {
3361 case IWN5000_PHY_CALIB_DC:
3362 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_DC)
3365 case IWN5000_PHY_CALIB_LO:
3366 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_LO)
3369 case IWN5000_PHY_CALIB_TX_IQ:
3370 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TX_IQ)
3373 case IWN5000_PHY_CALIB_TX_IQ_PERIODIC:
3374 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TX_IQ_PERIODIC)
3377 case IWN5000_PHY_CALIB_BASE_BAND:
3378 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_BASE_BAND)
3382 if (idx == -1) /* Ignore other results. */
3385 /* Save calibration result. */
3386 if (sc->calibcmd[idx].buf != NULL)
3387 free(sc->calibcmd[idx].buf, M_DEVBUF);
3388 sc->calibcmd[idx].buf = malloc(len, M_DEVBUF, M_NOWAIT);
3389 if (sc->calibcmd[idx].buf == NULL) {
3390 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
3391 "not enough memory for calibration result %d\n",
3395 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
3396 "saving calibration result idx=%d, code=%d len=%d\n", idx, calib->code, len);
3397 sc->calibcmd[idx].len = len;
3398 memcpy(sc->calibcmd[idx].buf, calib, len);
3402 iwn_stats_update(struct iwn_softc *sc, struct iwn_calib_state *calib,
3403 struct iwn_stats *stats, int len)
3405 struct iwn_stats_bt *stats_bt;
3406 struct iwn_stats *lstats;
3409 * First - check whether the length is the bluetooth or normal.
3411 * If it's normal - just copy it and bump out.
3412 * Otherwise we have to convert things.
3415 if (len == sizeof(struct iwn_stats) + 4) {
3416 memcpy(&sc->last_stat, stats, sizeof(struct iwn_stats));
3417 sc->last_stat_valid = 1;
3422 * If it's not the bluetooth size - log, then just copy.
3424 if (len != sizeof(struct iwn_stats_bt) + 4) {
3425 DPRINTF(sc, IWN_DEBUG_STATS,
3426 "%s: size of rx statistics (%d) not an expected size!\n",
3429 memcpy(&sc->last_stat, stats, sizeof(struct iwn_stats));
3430 sc->last_stat_valid = 1;
3437 stats_bt = (struct iwn_stats_bt *) stats;
3438 lstats = &sc->last_stat;
3441 lstats->flags = stats_bt->flags;
3443 memcpy(&lstats->rx.ofdm, &stats_bt->rx_bt.ofdm,
3444 sizeof(struct iwn_rx_phy_stats));
3445 memcpy(&lstats->rx.cck, &stats_bt->rx_bt.cck,
3446 sizeof(struct iwn_rx_phy_stats));
3447 memcpy(&lstats->rx.general, &stats_bt->rx_bt.general_bt.common,
3448 sizeof(struct iwn_rx_general_stats));
3449 memcpy(&lstats->rx.ht, &stats_bt->rx_bt.ht,
3450 sizeof(struct iwn_rx_ht_phy_stats));
3452 memcpy(&lstats->tx, &stats_bt->tx,
3453 sizeof(struct iwn_tx_stats));
3455 memcpy(&lstats->general, &stats_bt->general,
3456 sizeof(struct iwn_general_stats));
3458 /* XXX TODO: Squirrel away the extra bluetooth stats somewhere */
3459 sc->last_stat_valid = 1;
3463 * Process an RX_STATISTICS or BEACON_STATISTICS firmware notification.
3464 * The latter is sent by the firmware after each received beacon.
3467 iwn_rx_statistics(struct iwn_softc *sc, struct iwn_rx_desc *desc)
3469 struct iwn_ops *ops = &sc->ops;
3470 struct ieee80211com *ic = &sc->sc_ic;
3471 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
3472 struct iwn_calib_state *calib = &sc->calib;
3473 struct iwn_stats *stats = (struct iwn_stats *)(desc + 1);
3474 struct iwn_stats *lstats;
3477 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
3479 /* Ignore statistics received during a scan. */
3480 if (vap->iv_state != IEEE80211_S_RUN ||
3481 (ic->ic_flags & IEEE80211_F_SCAN)){
3482 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s received during calib\n",
3487 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_STATS,
3488 "%s: received statistics, cmd %d, len %d\n",
3489 __func__, desc->type, le16toh(desc->len));
3490 sc->calib_cnt = 0; /* Reset TX power calibration timeout. */
3493 * Collect/track general statistics for reporting.
3495 * This takes care of ensuring that the bluetooth sized message
3496 * will be correctly converted to the legacy sized message.
3498 iwn_stats_update(sc, calib, stats, le16toh(desc->len));
3501 * And now, let's take a reference of it to use!
3503 lstats = &sc->last_stat;
3505 /* Test if temperature has changed. */
3506 if (lstats->general.temp != sc->rawtemp) {
3507 /* Convert "raw" temperature to degC. */
3508 sc->rawtemp = stats->general.temp;
3509 temp = ops->get_temperature(sc);
3510 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: temperature %d\n",
3513 /* Update TX power if need be (4965AGN only). */
3514 if (sc->hw_type == IWN_HW_REV_TYPE_4965)
3515 iwn4965_power_calibration(sc, temp);
3518 if (desc->type != IWN_BEACON_STATISTICS)
3519 return; /* Reply to a statistics request. */
3521 sc->noise = iwn_get_noise(&lstats->rx.general);
3522 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: noise %d\n", __func__, sc->noise);
3524 /* Test that RSSI and noise are present in stats report. */
3525 if (le32toh(lstats->rx.general.flags) != 1) {
3526 DPRINTF(sc, IWN_DEBUG_ANY, "%s\n",
3527 "received statistics without RSSI");
3531 if (calib->state == IWN_CALIB_STATE_ASSOC)
3532 iwn_collect_noise(sc, &lstats->rx.general);
3533 else if (calib->state == IWN_CALIB_STATE_RUN) {
3534 iwn_tune_sensitivity(sc, &lstats->rx);
3536 * XXX TODO: Only run the RX recovery if we're associated!
3538 iwn_check_rx_recovery(sc, lstats);
3539 iwn_save_stats_counters(sc, lstats);
3542 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
3546 * Save the relevant statistic counters for the next calibration
3550 iwn_save_stats_counters(struct iwn_softc *sc, const struct iwn_stats *rs)
3552 struct iwn_calib_state *calib = &sc->calib;
3554 /* Save counters values for next call. */
3555 calib->bad_plcp_cck = le32toh(rs->rx.cck.bad_plcp);
3556 calib->fa_cck = le32toh(rs->rx.cck.fa);
3557 calib->bad_plcp_ht = le32toh(rs->rx.ht.bad_plcp);
3558 calib->bad_plcp_ofdm = le32toh(rs->rx.ofdm.bad_plcp);
3559 calib->fa_ofdm = le32toh(rs->rx.ofdm.fa);
3561 /* Last time we received these tick values */
3562 sc->last_calib_ticks = ticks;
3566 * Process a TX_DONE firmware notification. Unfortunately, the 4965AGN
3567 * and 5000 adapters have different incompatible TX status formats.
3570 iwn4965_tx_done(struct iwn_softc *sc, struct iwn_rx_desc *desc,
3571 struct iwn_rx_data *data)
3573 struct iwn4965_tx_stat *stat = (struct iwn4965_tx_stat *)(desc + 1);
3574 int qid = desc->qid & IWN_RX_DESC_QID_MSK;
3576 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: "
3577 "qid %d idx %d RTS retries %d ACK retries %d nkill %d rate %x duration %d status %x\n",
3578 __func__, desc->qid, desc->idx,
3582 stat->rate, le16toh(stat->duration),
3583 le32toh(stat->status));
3585 if (qid >= sc->firstaggqueue && stat->nframes != 1) {
3586 iwn_ampdu_tx_done(sc, qid, stat->nframes, stat->rtsfailcnt,
3589 iwn_tx_done(sc, desc, stat->rtsfailcnt, stat->ackfailcnt,
3590 le32toh(stat->status) & 0xff);
3595 iwn5000_tx_done(struct iwn_softc *sc, struct iwn_rx_desc *desc,
3596 struct iwn_rx_data *data)
3598 struct iwn5000_tx_stat *stat = (struct iwn5000_tx_stat *)(desc + 1);
3599 int qid = desc->qid & IWN_RX_DESC_QID_MSK;
3601 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: "
3602 "qid %d idx %d RTS retries %d ACK retries %d nkill %d rate %x duration %d status %x\n",
3603 __func__, desc->qid, desc->idx,
3607 stat->rate, le16toh(stat->duration),
3608 le32toh(stat->status));
3611 /* Reset TX scheduler slot. */
3612 iwn5000_reset_sched(sc, qid, desc->idx);
3615 if (qid >= sc->firstaggqueue && stat->nframes != 1) {
3616 iwn_ampdu_tx_done(sc, qid, stat->nframes, stat->rtsfailcnt,
3619 iwn_tx_done(sc, desc, stat->rtsfailcnt, stat->ackfailcnt,
3620 le16toh(stat->status) & 0xff);
3625 iwn_adj_ampdu_ptr(struct iwn_softc *sc, struct iwn_tx_ring *ring)
3629 for (i = ring->read; i != ring->cur; i = (i + 1) % IWN_TX_RING_COUNT) {
3630 struct iwn_tx_data *data = &ring->data[i];
3632 if (data->m != NULL)
3642 * Adapter-independent backend for TX_DONE firmware notifications.
3645 iwn_tx_done(struct iwn_softc *sc, struct iwn_rx_desc *desc, int rtsfailcnt,
3646 int ackfailcnt, uint8_t status)
3648 struct ieee80211_ratectl_tx_status *txs = &sc->sc_txs;
3649 struct iwn_tx_ring *ring = &sc->txq[desc->qid & IWN_RX_DESC_QID_MSK];
3650 struct iwn_tx_data *data = &ring->data[desc->idx];
3652 struct ieee80211_node *ni;
3654 if (__predict_false(data->m == NULL &&
3655 ring->qid >= sc->firstaggqueue)) {
3657 * There is no frame; skip this entry.
3659 DPRINTF(sc, IWN_DEBUG_AMPDU, "%s: ring %d: no entry %d\n",
3660 __func__, ring->qid, desc->idx);
3664 KASSERT(data->ni != NULL, ("no node"));
3665 KASSERT(data->m != NULL, ("no mbuf"));
3667 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
3669 /* Unmap and free mbuf. */
3670 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_POSTWRITE);
3671 bus_dmamap_unload(ring->data_dmat, data->map);
3672 m = data->m, data->m = NULL;
3673 ni = data->ni, data->ni = NULL;
3675 data->long_retries = 0;
3677 if (ring->qid >= sc->firstaggqueue)
3678 iwn_adj_ampdu_ptr(sc, ring);
3681 * XXX f/w may hang (device timeout) when desc->idx - ring->read == 64
3682 * (aggregation queues only).
3686 iwn_check_tx_ring(sc, ring->qid);
3689 * Update rate control statistics for the node.
3691 txs->flags = IEEE80211_RATECTL_STATUS_SHORT_RETRY |
3692 IEEE80211_RATECTL_STATUS_LONG_RETRY;
3693 txs->short_retries = rtsfailcnt;
3694 txs->long_retries = ackfailcnt;
3695 if (!(status & IWN_TX_FAIL))
3696 txs->status = IEEE80211_RATECTL_TX_SUCCESS;
3699 case IWN_TX_FAIL_SHORT_LIMIT:
3700 txs->status = IEEE80211_RATECTL_TX_FAIL_SHORT;
3702 case IWN_TX_FAIL_LONG_LIMIT:
3703 txs->status = IEEE80211_RATECTL_TX_FAIL_LONG;
3705 case IWN_TX_STATUS_FAIL_LIFE_EXPIRE:
3706 txs->status = IEEE80211_RATECTL_TX_FAIL_EXPIRED;
3709 txs->status = IEEE80211_RATECTL_TX_FAIL_UNSPECIFIED;
3713 ieee80211_ratectl_tx_complete(ni, txs);
3716 * Channels marked for "radar" require traffic to be received
3717 * to unlock before we can transmit. Until traffic is seen
3718 * any attempt to transmit is returned immediately with status
3719 * set to IWN_TX_FAIL_TX_LOCKED. Unfortunately this can easily
3720 * happen on first authenticate after scanning. To workaround
3721 * this we ignore a failure of this sort in AUTH state so the
3722 * 802.11 layer will fall back to using a timeout to wait for
3723 * the AUTH reply. This allows the firmware time to see
3724 * traffic so a subsequent retry of AUTH succeeds. It's
3725 * unclear why the firmware does not maintain state for
3726 * channels recently visited as this would allow immediate
3727 * use of the channel after a scan (where we see traffic).
3729 if (status == IWN_TX_FAIL_TX_LOCKED &&
3730 ni->ni_vap->iv_state == IEEE80211_S_AUTH)
3731 ieee80211_tx_complete(ni, m, 0);
3733 ieee80211_tx_complete(ni, m,
3734 (status & IWN_TX_FAIL) != 0);
3736 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
3740 * Process a "command done" firmware notification. This is where we wakeup
3741 * processes waiting for a synchronous command completion.
3744 iwn_cmd_done(struct iwn_softc *sc, struct iwn_rx_desc *desc)
3746 struct iwn_tx_ring *ring;
3747 struct iwn_tx_data *data;
3750 if (sc->sc_flags & IWN_FLAG_PAN_SUPPORT)
3751 cmd_queue_num = IWN_PAN_CMD_QUEUE;
3753 cmd_queue_num = IWN_CMD_QUEUE_NUM;
3755 if ((desc->qid & IWN_RX_DESC_QID_MSK) != cmd_queue_num)
3756 return; /* Not a command ack. */
3758 ring = &sc->txq[cmd_queue_num];
3759 data = &ring->data[desc->idx];
3761 /* If the command was mapped in an mbuf, free it. */
3762 if (data->m != NULL) {
3763 bus_dmamap_sync(ring->data_dmat, data->map,
3764 BUS_DMASYNC_POSTWRITE);
3765 bus_dmamap_unload(ring->data_dmat, data->map);
3769 wakeup(&ring->desc[desc->idx]);
3773 iwn_ampdu_check_bitmap(uint64_t bitmap, int start, int idx)
3780 shift = 0x100 - bit;
3782 } else if (bit <= -64)
3789 if (bit - shift >= 64)
3792 return ((bitmap & (1ULL << (bit - shift))) != 0);
3796 * Firmware bug workaround: in case if 'retries' counter
3797 * overflows 'seqno' field will be incremented:
3798 * status|sequence|status|sequence|status|sequence
3799 * 0000 0A48 0001 0A49 0000 0A6A
3800 * 1000 0A48 1000 0A49 1000 0A6A
3801 * 2000 0A48 2000 0A49 2000 0A6A
3803 * E000 0A48 E000 0A49 E000 0A6A
3804 * F000 0A48 F000 0A49 F000 0A6A
3805 * 0000 0A49 0000 0A49 0000 0A6B
3806 * 1000 0A49 1000 0A49 1000 0A6B
3808 * D000 0A49 D000 0A49 D000 0A6B
3809 * E000 0A49 E001 0A49 E000 0A6B
3810 * F000 0A49 F001 0A49 F000 0A6B
3811 * 0000 0A4A 0000 0A4B 0000 0A6A
3812 * 1000 0A4A 1000 0A4B 1000 0A6A
3815 * Odd 'seqno' numbers are incremened by 2 every 2 overflows.
3816 * For even 'seqno' % 4 != 0 overflow is cyclic (0 -> +1 -> 0).
3817 * Not checked with nretries >= 64.
3821 iwn_ampdu_index_check(struct iwn_softc *sc, struct iwn_tx_ring *ring,
3822 uint64_t bitmap, int start, int idx)
3824 struct ieee80211com *ic = &sc->sc_ic;
3825 struct iwn_tx_data *data;
3826 int diff, min_retries, max_retries, new_idx, loop_end;
3828 new_idx = idx - IWN_LONG_RETRY_LIMIT_LOG;
3830 new_idx += IWN_TX_RING_COUNT;
3833 * Corner case: check if retry count is not too big;
3834 * reset device otherwise.
3836 if (!iwn_ampdu_check_bitmap(bitmap, start, new_idx)) {
3837 data = &ring->data[new_idx];
3838 if (data->long_retries > IWN_LONG_RETRY_LIMIT) {
3839 device_printf(sc->sc_dev,
3840 "%s: retry count (%d) for idx %d/%d overflow, "
3841 "resetting...\n", __func__, data->long_retries,
3842 ring->qid, new_idx);
3843 ieee80211_restart_all(ic);
3848 /* Correct index if needed. */
3851 data = &ring->data[new_idx];
3852 diff = idx - new_idx;
3854 diff += IWN_TX_RING_COUNT;
3856 min_retries = IWN_LONG_RETRY_FW_OVERFLOW * diff;
3857 if ((new_idx % 2) == 0)
3858 max_retries = IWN_LONG_RETRY_FW_OVERFLOW * (diff + 1);
3860 max_retries = IWN_LONG_RETRY_FW_OVERFLOW * (diff + 2);
3862 if (!iwn_ampdu_check_bitmap(bitmap, start, new_idx) &&
3863 ((data->long_retries >= min_retries &&
3864 data->long_retries < max_retries) ||
3866 (new_idx & 0x03) == 0x02 &&
3867 data->long_retries >= IWN_LONG_RETRY_FW_OVERFLOW))) {
3868 DPRINTF(sc, IWN_DEBUG_AMPDU,
3869 "%s: correcting index %d -> %d in queue %d"
3870 " (retries %d)\n", __func__, idx, new_idx,
3871 ring->qid, data->long_retries);
3875 new_idx = (new_idx + 1) % IWN_TX_RING_COUNT;
3876 } while (new_idx != loop_end);
3882 iwn_ampdu_tx_done(struct iwn_softc *sc, int qid, int nframes, int rtsfailcnt,
3885 struct iwn_tx_ring *ring = &sc->txq[qid];
3886 struct ieee80211_tx_ampdu *tap = sc->qid2tap[qid];
3887 struct iwn_node *wn = (void *)tap->txa_ni;
3888 struct iwn_tx_data *data;
3889 uint64_t bitmap = 0;
3890 uint16_t *aggstatus = stat;
3891 uint8_t tid = tap->txa_tid;
3892 int bit, i, idx, shift, start, tx_err;
3894 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
3896 start = le16toh(*(aggstatus + nframes * 2)) & 0xff;
3898 for (i = 0; i < nframes; i++) {
3899 uint16_t status = le16toh(aggstatus[i * 2]);
3901 if (status & IWN_AGG_TX_STATE_IGNORE_MASK)
3904 idx = le16toh(aggstatus[i * 2 + 1]) & 0xff;
3905 data = &ring->data[idx];
3906 if (data->remapped) {
3907 idx = iwn_ampdu_index_check(sc, ring, bitmap, start, idx);
3909 /* skip error (device will be restarted anyway). */
3913 /* Index may have changed. */
3914 data = &ring->data[idx];
3918 * XXX Sometimes (rarely) some frames are excluded from events.
3919 * XXX Due to that long_retries counter may be wrong.
3921 data->long_retries &= ~0x0f;
3922 data->long_retries += IWN_AGG_TX_TRY_COUNT(status) + 1;
3924 if (data->long_retries >= IWN_LONG_RETRY_FW_OVERFLOW) {
3925 int diff, wrong_idx;
3927 diff = data->long_retries / IWN_LONG_RETRY_FW_OVERFLOW;
3928 wrong_idx = (idx + diff) % IWN_TX_RING_COUNT;
3931 * Mark the entry so the above code will check it
3934 ring->data[wrong_idx].remapped = 1;
3937 if (status & IWN_AGG_TX_STATE_UNDERRUN_MSK) {
3939 * NB: count retries but postpone - it was not
3948 shift = 0x100 - bit;
3950 } else if (bit <= -64)
3956 bitmap = bitmap << shift;
3957 bitmap |= 1ULL << bit;
3959 wn->agg[tid].startidx = start;
3960 wn->agg[tid].bitmap = bitmap;
3961 wn->agg[tid].short_retries = rtsfailcnt;
3963 DPRINTF(sc, IWN_DEBUG_AMPDU, "%s: nframes %d start %d bitmap %016jX\n",
3964 __func__, nframes, start, (uintmax_t)bitmap);
3969 i != wn->agg[tid].startidx;
3970 i = (i + 1) % IWN_TX_RING_COUNT) {
3971 data = &ring->data[i];
3973 if (data->m == NULL)
3977 iwn_agg_tx_complete(sc, ring, tid, i, 0);
3980 ring->read = wn->agg[tid].startidx;
3981 ring->queued -= tx_err;
3983 iwn_check_tx_ring(sc, qid);
3985 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
3989 * Process an INT_FH_RX or INT_SW_RX interrupt.
3992 iwn_notif_intr(struct iwn_softc *sc)
3994 struct iwn_ops *ops = &sc->ops;
3995 struct ieee80211com *ic = &sc->sc_ic;
3996 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
4000 bus_dmamap_sync(sc->rxq.stat_dma.tag, sc->rxq.stat_dma.map,
4001 BUS_DMASYNC_POSTREAD);
4003 hw = le16toh(sc->rxq.stat->closed_count) & 0xfff;
4004 while (sc->rxq.cur != hw) {
4005 struct iwn_rx_data *data = &sc->rxq.data[sc->rxq.cur];
4006 struct iwn_rx_desc *desc;
4008 bus_dmamap_sync(sc->rxq.data_dmat, data->map,
4009 BUS_DMASYNC_POSTREAD);
4010 desc = mtod(data->m, struct iwn_rx_desc *);
4012 DPRINTF(sc, IWN_DEBUG_RECV,
4013 "%s: cur=%d; qid %x idx %d flags %x type %d(%s) len %d\n",
4014 __func__, sc->rxq.cur, desc->qid & IWN_RX_DESC_QID_MSK,
4015 desc->idx, desc->flags, desc->type,
4016 iwn_intr_str(desc->type), le16toh(desc->len));
4018 if (!(desc->qid & IWN_UNSOLICITED_RX_NOTIF)) /* Reply to a command. */
4019 iwn_cmd_done(sc, desc);
4021 switch (desc->type) {
4023 iwn_rx_phy(sc, desc);
4026 case IWN_RX_DONE: /* 4965AGN only. */
4027 case IWN_MPDU_RX_DONE:
4028 /* An 802.11 frame has been received. */
4029 iwn_rx_done(sc, desc, data);
4031 is_stopped = (sc->sc_flags & IWN_FLAG_RUNNING) == 0;
4032 if (__predict_false(is_stopped))
4037 case IWN_RX_COMPRESSED_BA:
4038 /* A Compressed BlockAck has been received. */
4039 iwn_rx_compressed_ba(sc, desc);
4043 /* An 802.11 frame has been transmitted. */
4044 ops->tx_done(sc, desc, data);
4047 case IWN_RX_STATISTICS:
4048 case IWN_BEACON_STATISTICS:
4049 iwn_rx_statistics(sc, desc);
4052 case IWN_BEACON_MISSED:
4054 struct iwn_beacon_missed *miss =
4055 (struct iwn_beacon_missed *)(desc + 1);
4058 misses = le32toh(miss->consecutive);
4060 DPRINTF(sc, IWN_DEBUG_STATE,
4061 "%s: beacons missed %d/%d\n", __func__,
4062 misses, le32toh(miss->total));
4064 * If more than 5 consecutive beacons are missed,
4065 * reinitialize the sensitivity state machine.
4067 if (vap->iv_state == IEEE80211_S_RUN &&
4068 (ic->ic_flags & IEEE80211_F_SCAN) == 0) {
4070 (void)iwn_init_sensitivity(sc);
4071 if (misses >= vap->iv_bmissthreshold) {
4073 ieee80211_beacon_miss(ic);
4076 is_stopped = (sc->sc_flags &
4077 IWN_FLAG_RUNNING) == 0;
4078 if (__predict_false(is_stopped))
4086 struct iwn_ucode_info *uc =
4087 (struct iwn_ucode_info *)(desc + 1);
4089 /* The microcontroller is ready. */
4090 DPRINTF(sc, IWN_DEBUG_RESET,
4091 "microcode alive notification version=%d.%d "
4092 "subtype=%x alive=%x\n", uc->major, uc->minor,
4093 uc->subtype, le32toh(uc->valid));
4095 if (le32toh(uc->valid) != 1) {
4096 device_printf(sc->sc_dev,
4097 "microcontroller initialization failed");
4100 if (uc->subtype == IWN_UCODE_INIT) {
4101 /* Save microcontroller report. */
4102 memcpy(&sc->ucode_info, uc, sizeof (*uc));
4104 /* Save the address of the error log in SRAM. */
4105 sc->errptr = le32toh(uc->errptr);
4109 case IWN_STATE_CHANGED:
4112 * State change allows hardware switch change to be
4113 * noted. However, we handle this in iwn_intr as we
4114 * get both the enable/disble intr.
4116 uint32_t *status = (uint32_t *)(desc + 1);
4117 DPRINTF(sc, IWN_DEBUG_INTR | IWN_DEBUG_STATE,
4118 "state changed to %x\n",
4122 case IWN_START_SCAN:
4124 struct iwn_start_scan *scan =
4125 (struct iwn_start_scan *)(desc + 1);
4126 DPRINTF(sc, IWN_DEBUG_ANY,
4127 "%s: scanning channel %d status %x\n",
4128 __func__, scan->chan, le32toh(scan->status));
4135 struct iwn_stop_scan *scan =
4136 (struct iwn_stop_scan *)(desc + 1);
4137 DPRINTF(sc, IWN_DEBUG_STATE | IWN_DEBUG_SCAN,
4138 "scan finished nchan=%d status=%d chan=%d\n",
4139 scan->nchan, scan->status, scan->chan);
4141 sc->sc_is_scanning = 0;
4142 callout_stop(&sc->scan_timeout);
4144 ieee80211_scan_next(vap);
4147 is_stopped = (sc->sc_flags & IWN_FLAG_RUNNING) == 0;
4148 if (__predict_false(is_stopped))
4153 case IWN5000_CALIBRATION_RESULT:
4154 iwn5000_rx_calib_results(sc, desc);
4157 case IWN5000_CALIBRATION_DONE:
4158 sc->sc_flags |= IWN_FLAG_CALIB_DONE;
4163 sc->rxq.cur = (sc->rxq.cur + 1) % IWN_RX_RING_COUNT;
4166 /* Tell the firmware what we have processed. */
4167 hw = (hw == 0) ? IWN_RX_RING_COUNT - 1 : hw - 1;
4168 IWN_WRITE(sc, IWN_FH_RX_WPTR, hw & ~7);
4172 * Process an INT_WAKEUP interrupt raised when the microcontroller wakes up
4173 * from power-down sleep mode.
4176 iwn_wakeup_intr(struct iwn_softc *sc)
4180 DPRINTF(sc, IWN_DEBUG_RESET, "%s: ucode wakeup from power-down sleep\n",
4183 /* Wakeup RX and TX rings. */
4184 IWN_WRITE(sc, IWN_FH_RX_WPTR, sc->rxq.cur & ~7);
4185 for (qid = 0; qid < sc->ntxqs; qid++) {
4186 struct iwn_tx_ring *ring = &sc->txq[qid];
4187 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | ring->cur);
4192 iwn_rftoggle_task(void *arg, int npending)
4194 struct iwn_softc *sc = arg;
4195 struct ieee80211com *ic = &sc->sc_ic;
4199 tmp = IWN_READ(sc, IWN_GP_CNTRL);
4202 device_printf(sc->sc_dev, "RF switch: radio %s\n",
4203 (tmp & IWN_GP_CNTRL_RFKILL) ? "enabled" : "disabled");
4204 if (!(tmp & IWN_GP_CNTRL_RFKILL)) {
4205 ieee80211_suspend_all(ic);
4207 /* Enable interrupts to get RF toggle notification. */
4209 IWN_WRITE(sc, IWN_INT, 0xffffffff);
4210 IWN_WRITE(sc, IWN_INT_MASK, sc->int_mask);
4213 ieee80211_resume_all(ic);
4217 * Dump the error log of the firmware when a firmware panic occurs. Although
4218 * we can't debug the firmware because it is neither open source nor free, it
4219 * can help us to identify certain classes of problems.
4222 iwn_fatal_intr(struct iwn_softc *sc)
4224 struct iwn_fw_dump dump;
4227 IWN_LOCK_ASSERT(sc);
4229 /* Force a complete recalibration on next init. */
4230 sc->sc_flags &= ~IWN_FLAG_CALIB_DONE;
4232 /* Check that the error log address is valid. */
4233 if (sc->errptr < IWN_FW_DATA_BASE ||
4234 sc->errptr + sizeof (dump) >
4235 IWN_FW_DATA_BASE + sc->fw_data_maxsz) {
4236 printf("%s: bad firmware error log address 0x%08x\n", __func__,
4240 if (iwn_nic_lock(sc) != 0) {
4241 printf("%s: could not read firmware error log\n", __func__);
4244 /* Read firmware error log from SRAM. */
4245 iwn_mem_read_region_4(sc, sc->errptr, (uint32_t *)&dump,
4246 sizeof (dump) / sizeof (uint32_t));
4249 if (dump.valid == 0) {
4250 printf("%s: firmware error log is empty\n", __func__);
4253 printf("firmware error log:\n");
4254 printf(" error type = \"%s\" (0x%08X)\n",
4255 (dump.id < nitems(iwn_fw_errmsg)) ?
4256 iwn_fw_errmsg[dump.id] : "UNKNOWN",
4258 printf(" program counter = 0x%08X\n", dump.pc);
4259 printf(" source line = 0x%08X\n", dump.src_line);
4260 printf(" error data = 0x%08X%08X\n",
4261 dump.error_data[0], dump.error_data[1]);
4262 printf(" branch link = 0x%08X%08X\n",
4263 dump.branch_link[0], dump.branch_link[1]);
4264 printf(" interrupt link = 0x%08X%08X\n",
4265 dump.interrupt_link[0], dump.interrupt_link[1]);
4266 printf(" time = %u\n", dump.time[0]);
4268 /* Dump driver status (TX and RX rings) while we're here. */
4269 printf("driver status:\n");
4270 for (i = 0; i < sc->ntxqs; i++) {
4271 struct iwn_tx_ring *ring = &sc->txq[i];
4272 printf(" tx ring %2d: qid=%-2d cur=%-3d queued=%-3d\n",
4273 i, ring->qid, ring->cur, ring->queued);
4275 printf(" rx ring: cur=%d\n", sc->rxq.cur);
4281 struct iwn_softc *sc = arg;
4282 uint32_t r1, r2, tmp;
4286 /* Disable interrupts. */
4287 IWN_WRITE(sc, IWN_INT_MASK, 0);
4289 /* Read interrupts from ICT (fast) or from registers (slow). */
4290 if (sc->sc_flags & IWN_FLAG_USE_ICT) {
4291 bus_dmamap_sync(sc->ict_dma.tag, sc->ict_dma.map,
4292 BUS_DMASYNC_POSTREAD);
4294 while (sc->ict[sc->ict_cur] != 0) {
4295 tmp |= sc->ict[sc->ict_cur];
4296 sc->ict[sc->ict_cur] = 0; /* Acknowledge. */
4297 sc->ict_cur = (sc->ict_cur + 1) % IWN_ICT_COUNT;
4300 if (tmp == 0xffffffff) /* Shouldn't happen. */
4302 else if (tmp & 0xc0000) /* Workaround a HW bug. */
4304 r1 = (tmp & 0xff00) << 16 | (tmp & 0xff);
4305 r2 = 0; /* Unused. */
4307 r1 = IWN_READ(sc, IWN_INT);
4308 if (r1 == 0xffffffff || (r1 & 0xfffffff0) == 0xa5a5a5a0) {
4310 return; /* Hardware gone! */
4312 r2 = IWN_READ(sc, IWN_FH_INT);
4315 DPRINTF(sc, IWN_DEBUG_INTR, "interrupt reg1=0x%08x reg2=0x%08x\n"
4318 if (r1 == 0 && r2 == 0)
4319 goto done; /* Interrupt not for us. */
4321 /* Acknowledge interrupts. */
4322 IWN_WRITE(sc, IWN_INT, r1);
4323 if (!(sc->sc_flags & IWN_FLAG_USE_ICT))
4324 IWN_WRITE(sc, IWN_FH_INT, r2);
4326 if (r1 & IWN_INT_RF_TOGGLED) {
4327 taskqueue_enqueue(sc->sc_tq, &sc->sc_rftoggle_task);
4330 if (r1 & IWN_INT_CT_REACHED) {
4331 device_printf(sc->sc_dev, "%s: critical temperature reached!\n",
4334 if (r1 & (IWN_INT_SW_ERR | IWN_INT_HW_ERR)) {
4335 device_printf(sc->sc_dev, "%s: fatal firmware error\n",
4338 iwn_debug_register(sc);
4340 /* Dump firmware error log and stop. */
4343 taskqueue_enqueue(sc->sc_tq, &sc->sc_panic_task);
4346 if ((r1 & (IWN_INT_FH_RX | IWN_INT_SW_RX | IWN_INT_RX_PERIODIC)) ||
4347 (r2 & IWN_FH_INT_RX)) {
4348 if (sc->sc_flags & IWN_FLAG_USE_ICT) {
4349 if (r1 & (IWN_INT_FH_RX | IWN_INT_SW_RX))
4350 IWN_WRITE(sc, IWN_FH_INT, IWN_FH_INT_RX);
4351 IWN_WRITE_1(sc, IWN_INT_PERIODIC,
4352 IWN_INT_PERIODIC_DIS);
4354 if (r1 & (IWN_INT_FH_RX | IWN_INT_SW_RX)) {
4355 IWN_WRITE_1(sc, IWN_INT_PERIODIC,
4356 IWN_INT_PERIODIC_ENA);
4362 if ((r1 & IWN_INT_FH_TX) || (r2 & IWN_FH_INT_TX)) {
4363 if (sc->sc_flags & IWN_FLAG_USE_ICT)
4364 IWN_WRITE(sc, IWN_FH_INT, IWN_FH_INT_TX);
4365 wakeup(sc); /* FH DMA transfer completed. */
4368 if (r1 & IWN_INT_ALIVE)
4369 wakeup(sc); /* Firmware is alive. */
4371 if (r1 & IWN_INT_WAKEUP)
4372 iwn_wakeup_intr(sc);
4375 /* Re-enable interrupts. */
4376 if (sc->sc_flags & IWN_FLAG_RUNNING)
4377 IWN_WRITE(sc, IWN_INT_MASK, sc->int_mask);
4383 * Update TX scheduler ring when transmitting an 802.11 frame (4965AGN and
4384 * 5000 adapters use a slightly different format).
4387 iwn4965_update_sched(struct iwn_softc *sc, int qid, int idx, uint8_t id,
4390 uint16_t *w = &sc->sched[qid * IWN4965_SCHED_COUNT + idx];
4392 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
4394 *w = htole16(len + 8);
4395 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
4396 BUS_DMASYNC_PREWRITE);
4397 if (idx < IWN_SCHED_WINSZ) {
4398 *(w + IWN_TX_RING_COUNT) = *w;
4399 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
4400 BUS_DMASYNC_PREWRITE);
4405 iwn5000_update_sched(struct iwn_softc *sc, int qid, int idx, uint8_t id,
4408 uint16_t *w = &sc->sched[qid * IWN5000_SCHED_COUNT + idx];
4410 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
4412 *w = htole16(id << 12 | (len + 8));
4413 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
4414 BUS_DMASYNC_PREWRITE);
4415 if (idx < IWN_SCHED_WINSZ) {
4416 *(w + IWN_TX_RING_COUNT) = *w;
4417 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
4418 BUS_DMASYNC_PREWRITE);
4424 iwn5000_reset_sched(struct iwn_softc *sc, int qid, int idx)
4426 uint16_t *w = &sc->sched[qid * IWN5000_SCHED_COUNT + idx];
4428 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
4430 *w = (*w & htole16(0xf000)) | htole16(1);
4431 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
4432 BUS_DMASYNC_PREWRITE);
4433 if (idx < IWN_SCHED_WINSZ) {
4434 *(w + IWN_TX_RING_COUNT) = *w;
4435 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
4436 BUS_DMASYNC_PREWRITE);
4442 * Check whether OFDM 11g protection will be enabled for the given rate.
4444 * The original driver code only enabled protection for OFDM rates.
4445 * It didn't check to see whether it was operating in 11a or 11bg mode.
4448 iwn_check_rate_needs_protection(struct iwn_softc *sc,
4449 struct ieee80211vap *vap, uint8_t rate)
4451 struct ieee80211com *ic = vap->iv_ic;
4454 * Not in 2GHz mode? Then there's no need to enable OFDM
4457 if (! IEEE80211_IS_CHAN_2GHZ(ic->ic_curchan)) {
4462 * 11bg protection not enabled? Then don't use it.
4464 if ((ic->ic_flags & IEEE80211_F_USEPROT) == 0)
4468 * If it's an 11n rate - no protection.
4469 * We'll do it via a specific 11n check.
4471 if (rate & IEEE80211_RATE_MCS) {
4476 * Do a rate table lookup. If the PHY is CCK,
4477 * don't do protection.
4479 if (ieee80211_rate2phytype(ic->ic_rt, rate) == IEEE80211_T_CCK)
4483 * Yup, enable protection.
4489 * return a value between 0 and IWN_MAX_TX_RETRIES-1 as an index into
4490 * the link quality table that reflects this particular entry.
4493 iwn_tx_rate_to_linkq_offset(struct iwn_softc *sc, struct ieee80211_node *ni,
4496 struct ieee80211_rateset *rs;
4503 * Figure out if we're using 11n or not here.
4505 if (IEEE80211_IS_CHAN_HT(ni->ni_chan) && ni->ni_htrates.rs_nrates > 0)
4511 * Use the correct rate table.
4514 rs = (struct ieee80211_rateset *) &ni->ni_htrates;
4515 nr = ni->ni_htrates.rs_nrates;
4522 * Find the relevant link quality entry in the table.
4524 for (i = 0; i < nr && i < IWN_MAX_TX_RETRIES - 1 ; i++) {
4526 * The link quality table index starts at 0 == highest
4527 * rate, so we walk the rate table backwards.
4529 cmp_rate = rs->rs_rates[(nr - 1) - i];
4530 if (rate & IEEE80211_RATE_MCS)
4531 cmp_rate |= IEEE80211_RATE_MCS;
4534 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: idx %d: nr=%d, rate=0x%02x, rateentry=0x%02x\n",
4542 if (cmp_rate == rate)
4546 /* Failed? Start at the end */
4547 return (IWN_MAX_TX_RETRIES - 1);
4551 iwn_tx_data(struct iwn_softc *sc, struct mbuf *m, struct ieee80211_node *ni)
4553 const struct ieee80211_txparam *tp = ni->ni_txparms;
4554 struct ieee80211vap *vap = ni->ni_vap;
4555 struct ieee80211com *ic = ni->ni_ic;
4556 struct iwn_node *wn = (void *)ni;
4557 struct iwn_tx_ring *ring;
4558 struct iwn_tx_cmd *cmd;
4559 struct iwn_cmd_data *tx;
4560 struct ieee80211_frame *wh;
4561 struct ieee80211_key *k = NULL;
4565 int ac, totlen, rate;
4567 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
4569 IWN_LOCK_ASSERT(sc);
4571 wh = mtod(m, struct ieee80211_frame *);
4572 type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK;
4574 /* Select EDCA Access Category and TX ring for this frame. */
4575 if (IEEE80211_QOS_HAS_SEQ(wh)) {
4576 qos = ((const struct ieee80211_qosframe *)wh)->i_qos[0];
4577 tid = qos & IEEE80211_QOS_TID;
4583 /* Choose a TX rate index. */
4584 if (type == IEEE80211_FC0_TYPE_MGT ||
4585 type == IEEE80211_FC0_TYPE_CTL ||
4586 (m->m_flags & M_EAPOL) != 0)
4587 rate = tp->mgmtrate;
4588 else if (IEEE80211_IS_MULTICAST(wh->i_addr1))
4589 rate = tp->mcastrate;
4590 else if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE)
4591 rate = tp->ucastrate;
4593 /* XXX pass pktlen */
4594 (void) ieee80211_ratectl_rate(ni, NULL, 0);
4595 rate = ni->ni_txrate;
4599 * XXX TODO: Group addressed frames aren't aggregated and must
4600 * go to the normal non-aggregation queue, and have a NONQOS TID
4601 * assigned from net80211.
4604 ac = M_WME_GETAC(m);
4605 if (m->m_flags & M_AMPDU_MPDU) {
4606 struct ieee80211_tx_ampdu *tap = &ni->ni_tx_ampdu[ac];
4608 if (!IEEE80211_AMPDU_RUNNING(tap))
4611 ac = *(int *)tap->txa_private;
4614 /* Encrypt the frame if need be. */
4615 if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) {
4616 /* Retrieve key for TX. */
4617 k = ieee80211_crypto_encap(ni, m);
4621 /* 802.11 header may have moved. */
4622 wh = mtod(m, struct ieee80211_frame *);
4624 totlen = m->m_pkthdr.len;
4626 if (ieee80211_radiotap_active_vap(vap)) {
4627 struct iwn_tx_radiotap_header *tap = &sc->sc_txtap;
4630 tap->wt_rate = rate;
4632 tap->wt_flags |= IEEE80211_RADIOTAP_F_WEP;
4634 ieee80211_radiotap_tx(vap, m);
4638 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
4639 /* Unicast frame, check if an ACK is expected. */
4640 if (!qos || (qos & IEEE80211_QOS_ACKPOLICY) !=
4641 IEEE80211_QOS_ACKPOLICY_NOACK)
4642 flags |= IWN_TX_NEED_ACK;
4645 (IEEE80211_FC0_TYPE_MASK | IEEE80211_FC0_SUBTYPE_MASK)) ==
4646 (IEEE80211_FC0_TYPE_CTL | IEEE80211_FC0_SUBTYPE_BAR))
4647 flags |= IWN_TX_IMM_BA; /* Cannot happen yet. */
4649 if (wh->i_fc[1] & IEEE80211_FC1_MORE_FRAG)
4650 flags |= IWN_TX_MORE_FRAG; /* Cannot happen yet. */
4652 /* Check if frame must be protected using RTS/CTS or CTS-to-self. */
4653 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
4654 /* NB: Group frames are sent using CCK in 802.11b/g. */
4655 if (totlen + IEEE80211_CRC_LEN > vap->iv_rtsthreshold) {
4656 flags |= IWN_TX_NEED_RTS;
4657 } else if (iwn_check_rate_needs_protection(sc, vap, rate)) {
4658 if (ic->ic_protmode == IEEE80211_PROT_CTSONLY)
4659 flags |= IWN_TX_NEED_CTS;
4660 else if (ic->ic_protmode == IEEE80211_PROT_RTSCTS)
4661 flags |= IWN_TX_NEED_RTS;
4662 } else if ((rate & IEEE80211_RATE_MCS) &&
4663 (ic->ic_htprotmode == IEEE80211_PROT_RTSCTS)) {
4664 flags |= IWN_TX_NEED_RTS;
4667 /* XXX HT protection? */
4669 if (flags & (IWN_TX_NEED_RTS | IWN_TX_NEED_CTS)) {
4670 if (sc->hw_type != IWN_HW_REV_TYPE_4965) {
4671 /* 5000 autoselects RTS/CTS or CTS-to-self. */
4672 flags &= ~(IWN_TX_NEED_RTS | IWN_TX_NEED_CTS);
4673 flags |= IWN_TX_NEED_PROTECTION;
4675 flags |= IWN_TX_FULL_TXOP;
4679 ring = &sc->txq[ac];
4680 if (m->m_flags & M_AMPDU_MPDU) {
4681 uint16_t seqno = ni->ni_txseqs[tid];
4683 if (ring->queued > IWN_TX_RING_COUNT / 2 &&
4684 (ring->cur + 1) % IWN_TX_RING_COUNT == ring->read) {
4685 DPRINTF(sc, IWN_DEBUG_AMPDU, "%s: no more space "
4686 "(queued %d) left in %d queue!\n",
4687 __func__, ring->queued, ac);
4692 * Queue this frame to the hardware ring that we've
4693 * negotiated AMPDU TX on.
4695 * Note that the sequence number must match the TX slot
4698 if ((seqno % 256) != ring->cur) {
4699 device_printf(sc->sc_dev,
4700 "%s: m=%p: seqno (%d) (%d) != ring index (%d) !\n",
4707 /* XXX until D9195 will not be committed */
4708 ni->ni_txseqs[tid] &= ~0xff;
4709 ni->ni_txseqs[tid] += ring->cur;
4710 seqno = ni->ni_txseqs[tid];
4713 *(uint16_t *)wh->i_seq =
4714 htole16(seqno << IEEE80211_SEQ_SEQ_SHIFT);
4715 ni->ni_txseqs[tid]++;
4718 /* Prepare TX firmware command. */
4719 cmd = &ring->cmd[ring->cur];
4720 tx = (struct iwn_cmd_data *)cmd->data;
4722 /* NB: No need to clear tx, all fields are reinitialized here. */
4723 tx->scratch = 0; /* clear "scratch" area */
4725 if (IEEE80211_IS_MULTICAST(wh->i_addr1) ||
4726 type != IEEE80211_FC0_TYPE_DATA)
4727 tx->id = sc->broadcast_id;
4731 if (type == IEEE80211_FC0_TYPE_MGT) {
4732 uint8_t subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
4734 /* Tell HW to set timestamp in probe responses. */
4735 if (subtype == IEEE80211_FC0_SUBTYPE_PROBE_RESP)
4736 flags |= IWN_TX_INSERT_TSTAMP;
4737 if (subtype == IEEE80211_FC0_SUBTYPE_ASSOC_REQ ||
4738 subtype == IEEE80211_FC0_SUBTYPE_REASSOC_REQ)
4739 tx->timeout = htole16(3);
4741 tx->timeout = htole16(2);
4743 tx->timeout = htole16(0);
4745 if (tx->id == sc->broadcast_id) {
4746 /* Group or management frame. */
4749 tx->linkq = iwn_tx_rate_to_linkq_offset(sc, ni, rate);
4750 flags |= IWN_TX_LINKQ; /* enable MRR */
4754 tx->rts_ntries = 60;
4755 tx->data_ntries = 15;
4756 tx->lifetime = htole32(IWN_LIFETIME_INFINITE);
4757 tx->rate = iwn_rate_to_plcp(sc, ni, rate);
4759 tx->flags = htole32(flags);
4761 return (iwn_tx_cmd(sc, m, ni, ring));
4765 iwn_tx_data_raw(struct iwn_softc *sc, struct mbuf *m,
4766 struct ieee80211_node *ni, const struct ieee80211_bpf_params *params)
4768 struct ieee80211vap *vap = ni->ni_vap;
4769 struct iwn_tx_cmd *cmd;
4770 struct iwn_cmd_data *tx;
4771 struct ieee80211_frame *wh;
4772 struct iwn_tx_ring *ring;
4777 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
4779 IWN_LOCK_ASSERT(sc);
4781 wh = mtod(m, struct ieee80211_frame *);
4782 type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK;
4784 ac = params->ibp_pri & 3;
4786 /* Choose a TX rate. */
4787 rate = params->ibp_rate0;
4790 if ((params->ibp_flags & IEEE80211_BPF_NOACK) == 0)
4791 flags |= IWN_TX_NEED_ACK;
4792 if (params->ibp_flags & IEEE80211_BPF_RTS) {
4793 if (sc->hw_type != IWN_HW_REV_TYPE_4965) {
4794 /* 5000 autoselects RTS/CTS or CTS-to-self. */
4795 flags &= ~IWN_TX_NEED_RTS;
4796 flags |= IWN_TX_NEED_PROTECTION;
4798 flags |= IWN_TX_NEED_RTS | IWN_TX_FULL_TXOP;
4800 if (params->ibp_flags & IEEE80211_BPF_CTS) {
4801 if (sc->hw_type != IWN_HW_REV_TYPE_4965) {
4802 /* 5000 autoselects RTS/CTS or CTS-to-self. */
4803 flags &= ~IWN_TX_NEED_CTS;
4804 flags |= IWN_TX_NEED_PROTECTION;
4806 flags |= IWN_TX_NEED_CTS | IWN_TX_FULL_TXOP;
4809 if (ieee80211_radiotap_active_vap(vap)) {
4810 struct iwn_tx_radiotap_header *tap = &sc->sc_txtap;
4813 tap->wt_rate = rate;
4815 ieee80211_radiotap_tx(vap, m);
4818 ring = &sc->txq[ac];
4819 cmd = &ring->cmd[ring->cur];
4821 tx = (struct iwn_cmd_data *)cmd->data;
4822 /* NB: No need to clear tx, all fields are reinitialized here. */
4823 tx->scratch = 0; /* clear "scratch" area */
4825 if (type == IEEE80211_FC0_TYPE_MGT) {
4826 uint8_t subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
4828 /* Tell HW to set timestamp in probe responses. */
4829 if (subtype == IEEE80211_FC0_SUBTYPE_PROBE_RESP)
4830 flags |= IWN_TX_INSERT_TSTAMP;
4832 if (subtype == IEEE80211_FC0_SUBTYPE_ASSOC_REQ ||
4833 subtype == IEEE80211_FC0_SUBTYPE_REASSOC_REQ)
4834 tx->timeout = htole16(3);
4836 tx->timeout = htole16(2);
4838 tx->timeout = htole16(0);
4841 tx->id = sc->broadcast_id;
4842 tx->rts_ntries = params->ibp_try1;
4843 tx->data_ntries = params->ibp_try0;
4844 tx->lifetime = htole32(IWN_LIFETIME_INFINITE);
4845 tx->rate = iwn_rate_to_plcp(sc, ni, rate);
4847 tx->flags = htole32(flags);
4849 /* Group or management frame. */
4852 return (iwn_tx_cmd(sc, m, ni, ring));
4856 iwn_tx_cmd(struct iwn_softc *sc, struct mbuf *m, struct ieee80211_node *ni,
4857 struct iwn_tx_ring *ring)
4859 struct iwn_ops *ops = &sc->ops;
4860 struct iwn_tx_cmd *cmd;
4861 struct iwn_cmd_data *tx;
4862 struct ieee80211_frame *wh;
4863 struct iwn_tx_desc *desc;
4864 struct iwn_tx_data *data;
4865 bus_dma_segment_t *seg, segs[IWN_MAX_SCATTER];
4868 int totlen, error, pad, nsegs = 0, i;
4870 wh = mtod(m, struct ieee80211_frame *);
4871 hdrlen = ieee80211_anyhdrsize(wh);
4872 totlen = m->m_pkthdr.len;
4874 desc = &ring->desc[ring->cur];
4875 data = &ring->data[ring->cur];
4877 if (__predict_false(data->m != NULL || data->ni != NULL)) {
4878 device_printf(sc->sc_dev, "%s: ni (%p) or m (%p) for idx %d "
4879 "in queue %d is not NULL!\n", __func__, data->ni, data->m,
4880 ring->cur, ring->qid);
4884 /* Prepare TX firmware command. */
4885 cmd = &ring->cmd[ring->cur];
4886 cmd->code = IWN_CMD_TX_DATA;
4888 cmd->qid = ring->qid;
4889 cmd->idx = ring->cur;
4891 tx = (struct iwn_cmd_data *)cmd->data;
4892 tx->len = htole16(totlen);
4894 /* Set physical address of "scratch area". */
4895 tx->loaddr = htole32(IWN_LOADDR(data->scratch_paddr));
4896 tx->hiaddr = IWN_HIADDR(data->scratch_paddr);
4898 /* First segment length must be a multiple of 4. */
4899 tx->flags |= htole32(IWN_TX_NEED_PADDING);
4900 pad = 4 - (hdrlen & 3);
4904 /* Copy 802.11 header in TX command. */
4905 memcpy((uint8_t *)(tx + 1), wh, hdrlen);
4907 /* Trim 802.11 header. */
4910 error = bus_dmamap_load_mbuf_sg(ring->data_dmat, data->map, m, segs,
4911 &nsegs, BUS_DMA_NOWAIT);
4913 if (error != EFBIG) {
4914 device_printf(sc->sc_dev,
4915 "%s: can't map mbuf (error %d)\n", __func__, error);
4918 /* Too many DMA segments, linearize mbuf. */
4919 m1 = m_collapse(m, M_NOWAIT, IWN_MAX_SCATTER - 1);
4921 device_printf(sc->sc_dev,
4922 "%s: could not defrag mbuf\n", __func__);
4927 error = bus_dmamap_load_mbuf_sg(ring->data_dmat, data->map, m,
4928 segs, &nsegs, BUS_DMA_NOWAIT);
4932 * NB: Do not return error;
4933 * original mbuf does not exist anymore.
4935 device_printf(sc->sc_dev,
4936 "%s: can't map mbuf (error %d)\n",
4938 if_inc_counter(ni->ni_vap->iv_ifp,
4939 IFCOUNTER_OERRORS, 1);
4940 ieee80211_free_node(ni);
4949 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: qid %d idx %d len %d nsegs %d "
4951 __func__, ring->qid, ring->cur, totlen, nsegs, tx->rate);
4953 /* Fill TX descriptor. */
4956 desc->nsegs += nsegs;
4957 /* First DMA segment is used by the TX command. */
4958 desc->segs[0].addr = htole32(IWN_LOADDR(data->cmd_paddr));
4959 desc->segs[0].len = htole16(IWN_HIADDR(data->cmd_paddr) |
4960 (4 + sizeof (*tx) + hdrlen + pad) << 4);
4961 /* Other DMA segments are for data payload. */
4963 for (i = 1; i <= nsegs; i++) {
4964 desc->segs[i].addr = htole32(IWN_LOADDR(seg->ds_addr));
4965 desc->segs[i].len = htole16(IWN_HIADDR(seg->ds_addr) |
4970 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_PREWRITE);
4971 bus_dmamap_sync(ring->cmd_dma.tag, ring->cmd_dma.map,
4972 BUS_DMASYNC_PREWRITE);
4973 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
4974 BUS_DMASYNC_PREWRITE);
4976 /* Update TX scheduler. */
4977 if (ring->qid >= sc->firstaggqueue)
4978 ops->update_sched(sc, ring->qid, ring->cur, tx->id, totlen);
4981 ring->cur = (ring->cur + 1) % IWN_TX_RING_COUNT;
4982 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, ring->qid << 8 | ring->cur);
4984 /* Mark TX ring as full if we reach a certain threshold. */
4985 if (++ring->queued > IWN_TX_RING_HIMARK)
4986 sc->qfullmsk |= 1 << ring->qid;
4988 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
4994 iwn_xmit_task(void *arg0, int pending)
4996 struct iwn_softc *sc = arg0;
4997 struct ieee80211_node *ni;
5000 struct ieee80211_bpf_params p;
5003 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: called\n", __func__);
5007 * Dequeue frames, attempt to transmit,
5008 * then disable beaconwait when we're done.
5010 while ((m = mbufq_dequeue(&sc->sc_xmit_queue)) != NULL) {
5012 ni = (struct ieee80211_node *)m->m_pkthdr.rcvif;
5014 /* Get xmit params if appropriate */
5015 if (ieee80211_get_xmit_params(m, &p) == 0)
5018 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: m=%p, have_p=%d\n",
5019 __func__, m, have_p);
5021 /* If we have xmit params, use them */
5023 error = iwn_tx_data_raw(sc, m, ni, &p);
5025 error = iwn_tx_data(sc, m, ni);
5028 if_inc_counter(ni->ni_vap->iv_ifp,
5029 IFCOUNTER_OERRORS, 1);
5030 ieee80211_free_node(ni);
5035 sc->sc_beacon_wait = 0;
5040 * raw frame xmit - free node/reference if failed.
5043 iwn_raw_xmit(struct ieee80211_node *ni, struct mbuf *m,
5044 const struct ieee80211_bpf_params *params)
5046 struct ieee80211com *ic = ni->ni_ic;
5047 struct iwn_softc *sc = ic->ic_softc;
5050 DPRINTF(sc, IWN_DEBUG_XMIT | IWN_DEBUG_TRACE, "->%s begin\n", __func__);
5053 if ((sc->sc_flags & IWN_FLAG_RUNNING) == 0) {
5059 /* queue frame if we have to */
5060 if (sc->sc_beacon_wait) {
5061 if (iwn_xmit_queue_enqueue(sc, m) != 0) {
5066 /* Queued, so just return OK */
5071 if (params == NULL) {
5073 * Legacy path; interpret frame contents to decide
5074 * precisely how to send the frame.
5076 error = iwn_tx_data(sc, m, ni);
5079 * Caller supplied explicit parameters to use in
5080 * sending the frame.
5082 error = iwn_tx_data_raw(sc, m, ni, params);
5085 sc->sc_tx_timer = 5;
5091 DPRINTF(sc, IWN_DEBUG_TRACE | IWN_DEBUG_XMIT, "->%s: end\n",__func__);
5097 * transmit - don't free mbuf if failed; don't free node ref if failed.
5100 iwn_transmit(struct ieee80211com *ic, struct mbuf *m)
5102 struct iwn_softc *sc = ic->ic_softc;
5103 struct ieee80211_node *ni;
5106 ni = (struct ieee80211_node *)m->m_pkthdr.rcvif;
5109 if ((sc->sc_flags & IWN_FLAG_RUNNING) == 0 || sc->sc_beacon_wait) {
5119 error = iwn_tx_data(sc, m, ni);
5121 sc->sc_tx_timer = 5;
5127 iwn_scan_timeout(void *arg)
5129 struct iwn_softc *sc = arg;
5130 struct ieee80211com *ic = &sc->sc_ic;
5132 ic_printf(ic, "scan timeout\n");
5133 ieee80211_restart_all(ic);
5137 iwn_watchdog(void *arg)
5139 struct iwn_softc *sc = arg;
5140 struct ieee80211com *ic = &sc->sc_ic;
5142 IWN_LOCK_ASSERT(sc);
5144 KASSERT(sc->sc_flags & IWN_FLAG_RUNNING, ("not running"));
5146 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5148 if (sc->sc_tx_timer > 0) {
5149 if (--sc->sc_tx_timer == 0) {
5150 ic_printf(ic, "device timeout\n");
5151 ieee80211_restart_all(ic);
5155 callout_reset(&sc->watchdog_to, hz, iwn_watchdog, sc);
5159 iwn_cdev_open(struct cdev *dev, int flags, int type, struct thread *td)
5166 iwn_cdev_close(struct cdev *dev, int flags, int type, struct thread *td)
5173 iwn_cdev_ioctl(struct cdev *dev, unsigned long cmd, caddr_t data, int fflag,
5177 struct iwn_softc *sc = dev->si_drv1;
5178 struct iwn_ioctl_data *d;
5180 rc = priv_check(td, PRIV_DRIVER);
5186 d = (struct iwn_ioctl_data *) data;
5188 /* XXX validate permissions/memory/etc? */
5189 rc = copyout(&sc->last_stat, d->dst_addr, sizeof(struct iwn_stats));
5194 memset(&sc->last_stat, 0, sizeof(struct iwn_stats));
5205 iwn_ioctl(struct ieee80211com *ic, u_long cmd, void *data)
5212 iwn_parent(struct ieee80211com *ic)
5214 struct iwn_softc *sc = ic->ic_softc;
5215 struct ieee80211vap *vap;
5218 if (ic->ic_nrunning > 0) {
5219 error = iwn_init(sc);
5223 ieee80211_start_all(ic);
5226 /* radio is disabled via RFkill switch */
5227 taskqueue_enqueue(sc->sc_tq, &sc->sc_rftoggle_task);
5230 vap = TAILQ_FIRST(&ic->ic_vaps);
5232 ieee80211_stop(vap);
5240 * Send a command to the firmware.
5243 iwn_cmd(struct iwn_softc *sc, int code, const void *buf, int size, int async)
5245 struct iwn_tx_ring *ring;
5246 struct iwn_tx_desc *desc;
5247 struct iwn_tx_data *data;
5248 struct iwn_tx_cmd *cmd;
5254 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
5257 IWN_LOCK_ASSERT(sc);
5259 if (sc->sc_flags & IWN_FLAG_PAN_SUPPORT)
5260 cmd_queue_num = IWN_PAN_CMD_QUEUE;
5262 cmd_queue_num = IWN_CMD_QUEUE_NUM;
5264 ring = &sc->txq[cmd_queue_num];
5265 desc = &ring->desc[ring->cur];
5266 data = &ring->data[ring->cur];
5269 if (size > sizeof cmd->data) {
5270 /* Command is too large to fit in a descriptor. */
5271 if (totlen > MCLBYTES)
5273 m = m_getjcl(M_NOWAIT, MT_DATA, M_PKTHDR, MJUMPAGESIZE);
5276 cmd = mtod(m, struct iwn_tx_cmd *);
5277 error = bus_dmamap_load(ring->data_dmat, data->map, cmd,
5278 totlen, iwn_dma_map_addr, &paddr, BUS_DMA_NOWAIT);
5285 cmd = &ring->cmd[ring->cur];
5286 paddr = data->cmd_paddr;
5291 cmd->qid = ring->qid;
5292 cmd->idx = ring->cur;
5293 memcpy(cmd->data, buf, size);
5296 desc->segs[0].addr = htole32(IWN_LOADDR(paddr));
5297 desc->segs[0].len = htole16(IWN_HIADDR(paddr) | totlen << 4);
5299 DPRINTF(sc, IWN_DEBUG_CMD, "%s: %s (0x%x) flags %d qid %d idx %d\n",
5300 __func__, iwn_intr_str(cmd->code), cmd->code,
5301 cmd->flags, cmd->qid, cmd->idx);
5303 if (size > sizeof cmd->data) {
5304 bus_dmamap_sync(ring->data_dmat, data->map,
5305 BUS_DMASYNC_PREWRITE);
5307 bus_dmamap_sync(ring->cmd_dma.tag, ring->cmd_dma.map,
5308 BUS_DMASYNC_PREWRITE);
5310 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
5311 BUS_DMASYNC_PREWRITE);
5313 /* Kick command ring. */
5314 ring->cur = (ring->cur + 1) % IWN_TX_RING_COUNT;
5315 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, ring->qid << 8 | ring->cur);
5317 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
5319 return async ? 0 : msleep(desc, &sc->sc_mtx, PCATCH, "iwncmd", hz);
5323 iwn4965_add_node(struct iwn_softc *sc, struct iwn_node_info *node, int async)
5325 struct iwn4965_node_info hnode;
5328 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5331 * We use the node structure for 5000 Series internally (it is
5332 * a superset of the one for 4965AGN). We thus copy the common
5333 * fields before sending the command.
5335 src = (caddr_t)node;
5336 dst = (caddr_t)&hnode;
5337 memcpy(dst, src, 48);
5338 /* Skip TSC, RX MIC and TX MIC fields from ``src''. */
5339 memcpy(dst + 48, src + 72, 20);
5340 return iwn_cmd(sc, IWN_CMD_ADD_NODE, &hnode, sizeof hnode, async);
5344 iwn5000_add_node(struct iwn_softc *sc, struct iwn_node_info *node, int async)
5347 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5349 /* Direct mapping. */
5350 return iwn_cmd(sc, IWN_CMD_ADD_NODE, node, sizeof (*node), async);
5354 iwn_set_link_quality(struct iwn_softc *sc, struct ieee80211_node *ni)
5356 struct iwn_node *wn = (void *)ni;
5357 struct ieee80211_rateset *rs;
5358 struct iwn_cmd_link_quality linkq;
5359 int i, rate, txrate;
5362 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
5364 memset(&linkq, 0, sizeof linkq);
5366 linkq.antmsk_1stream = iwn_get_1stream_tx_antmask(sc);
5367 linkq.antmsk_2stream = iwn_get_2stream_tx_antmask(sc);
5369 linkq.ampdu_max = 32; /* XXX negotiated? */
5370 linkq.ampdu_threshold = 3;
5371 linkq.ampdu_limit = htole16(4000); /* 4ms */
5373 DPRINTF(sc, IWN_DEBUG_XMIT,
5374 "%s: 1stream antenna=0x%02x, 2stream antenna=0x%02x, ntxstreams=%d\n",
5376 linkq.antmsk_1stream,
5377 linkq.antmsk_2stream,
5381 * Are we using 11n rates? Ensure the channel is
5382 * 11n _and_ we have some 11n rates, or don't
5385 if (IEEE80211_IS_CHAN_HT(ni->ni_chan) && ni->ni_htrates.rs_nrates > 0) {
5386 rs = (struct ieee80211_rateset *) &ni->ni_htrates;
5393 /* Start at highest available bit-rate. */
5395 * XXX this is all very dirty!
5398 txrate = ni->ni_htrates.rs_nrates - 1;
5400 txrate = rs->rs_nrates - 1;
5401 for (i = 0; i < IWN_MAX_TX_RETRIES; i++) {
5405 * XXX TODO: ensure the last two slots are the two lowest
5406 * rate entries, just for now.
5408 if (i == 14 || i == 15)
5412 rate = IEEE80211_RATE_MCS | rs->rs_rates[txrate];
5414 rate = IEEE80211_RV(rs->rs_rates[txrate]);
5416 /* Do rate -> PLCP config mapping */
5417 plcp = iwn_rate_to_plcp(sc, ni, rate);
5418 linkq.retry[i] = plcp;
5419 DPRINTF(sc, IWN_DEBUG_XMIT,
5420 "%s: i=%d, txrate=%d, rate=0x%02x, plcp=0x%08x\n",
5428 * The mimo field is an index into the table which
5429 * indicates the first index where it and subsequent entries
5430 * will not be using MIMO.
5432 * Since we're filling linkq from 0..15 and we're filling
5433 * from the highest MCS rates to the lowest rates, if we
5434 * _are_ doing a dual-stream rate, set mimo to idx+1 (ie,
5435 * the next entry.) That way if the next entry is a non-MIMO
5436 * entry, we're already pointing at it.
5438 if ((le32toh(plcp) & IWN_RFLAG_MCS) &&
5439 IEEE80211_RV(le32toh(plcp)) > 7)
5442 /* Next retry at immediate lower bit-rate. */
5447 * If we reached the end of the list and indeed we hit
5448 * all MIMO rates (eg 5300 doing MCS23-15) then yes,
5449 * set mimo to 15. Setting it to 16 panics the firmware.
5451 if (linkq.mimo > 15)
5454 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: mimo = %d\n", __func__, linkq.mimo);
5456 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
5458 return iwn_cmd(sc, IWN_CMD_LINK_QUALITY, &linkq, sizeof linkq, 1);
5462 * Broadcast node is used to send group-addressed and management frames.
5465 iwn_add_broadcast_node(struct iwn_softc *sc, int async)
5467 struct iwn_ops *ops = &sc->ops;
5468 struct ieee80211com *ic = &sc->sc_ic;
5469 struct iwn_node_info node;
5470 struct iwn_cmd_link_quality linkq;
5474 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
5476 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX];
5478 memset(&node, 0, sizeof node);
5479 IEEE80211_ADDR_COPY(node.macaddr, ieee80211broadcastaddr);
5480 node.id = sc->broadcast_id;
5481 DPRINTF(sc, IWN_DEBUG_RESET, "%s: adding broadcast node\n", __func__);
5482 if ((error = ops->add_node(sc, &node, async)) != 0)
5485 /* Use the first valid TX antenna. */
5486 txant = IWN_LSB(sc->txchainmask);
5488 memset(&linkq, 0, sizeof linkq);
5489 linkq.id = sc->broadcast_id;
5490 linkq.antmsk_1stream = iwn_get_1stream_tx_antmask(sc);
5491 linkq.antmsk_2stream = iwn_get_2stream_tx_antmask(sc);
5492 linkq.ampdu_max = 64;
5493 linkq.ampdu_threshold = 3;
5494 linkq.ampdu_limit = htole16(4000); /* 4ms */
5496 /* Use lowest mandatory bit-rate. */
5497 /* XXX rate table lookup? */
5498 if (IEEE80211_IS_CHAN_5GHZ(ic->ic_curchan))
5499 linkq.retry[0] = htole32(0xd);
5501 linkq.retry[0] = htole32(10 | IWN_RFLAG_CCK);
5502 linkq.retry[0] |= htole32(IWN_RFLAG_ANT(txant));
5503 /* Use same bit-rate for all TX retries. */
5504 for (i = 1; i < IWN_MAX_TX_RETRIES; i++) {
5505 linkq.retry[i] = linkq.retry[0];
5508 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
5510 return iwn_cmd(sc, IWN_CMD_LINK_QUALITY, &linkq, sizeof linkq, async);
5514 iwn_updateedca(struct ieee80211com *ic)
5516 #define IWN_EXP2(x) ((1 << (x)) - 1) /* CWmin = 2^ECWmin - 1 */
5517 struct iwn_softc *sc = ic->ic_softc;
5518 struct iwn_edca_params cmd;
5519 struct chanAccParams chp;
5522 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
5524 ieee80211_wme_ic_getparams(ic, &chp);
5526 memset(&cmd, 0, sizeof cmd);
5527 cmd.flags = htole32(IWN_EDCA_UPDATE);
5530 for (aci = 0; aci < WME_NUM_AC; aci++) {
5531 const struct wmeParams *ac = &chp.cap_wmeParams[aci];
5532 cmd.ac[aci].aifsn = ac->wmep_aifsn;
5533 cmd.ac[aci].cwmin = htole16(IWN_EXP2(ac->wmep_logcwmin));
5534 cmd.ac[aci].cwmax = htole16(IWN_EXP2(ac->wmep_logcwmax));
5535 cmd.ac[aci].txoplimit =
5536 htole16(IEEE80211_TXOP_TO_US(ac->wmep_txopLimit));
5538 IEEE80211_UNLOCK(ic);
5541 (void)iwn_cmd(sc, IWN_CMD_EDCA_PARAMS, &cmd, sizeof cmd, 1);
5544 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
5551 iwn_set_promisc(struct iwn_softc *sc)
5553 struct ieee80211com *ic = &sc->sc_ic;
5554 uint32_t promisc_filter;
5556 promisc_filter = IWN_FILTER_CTL | IWN_FILTER_PROMISC;
5557 if (ic->ic_promisc > 0 || ic->ic_opmode == IEEE80211_M_MONITOR)
5558 sc->rxon->filter |= htole32(promisc_filter);
5560 sc->rxon->filter &= ~htole32(promisc_filter);
5564 iwn_update_promisc(struct ieee80211com *ic)
5566 struct iwn_softc *sc = ic->ic_softc;
5569 if (ic->ic_opmode == IEEE80211_M_MONITOR)
5570 return; /* nothing to do */
5573 if (!(sc->sc_flags & IWN_FLAG_RUNNING)) {
5578 iwn_set_promisc(sc);
5579 if ((error = iwn_send_rxon(sc, 1, 1)) != 0) {
5580 device_printf(sc->sc_dev,
5581 "%s: could not send RXON, error %d\n",
5588 iwn_update_mcast(struct ieee80211com *ic)
5594 iwn_set_led(struct iwn_softc *sc, uint8_t which, uint8_t off, uint8_t on)
5596 struct iwn_cmd_led led;
5598 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5601 /* XXX don't set LEDs during scan? */
5602 if (sc->sc_is_scanning)
5606 /* Clear microcode LED ownership. */
5607 IWN_CLRBITS(sc, IWN_LED, IWN_LED_BSM_CTRL);
5610 led.unit = htole32(10000); /* on/off in unit of 100ms */
5613 (void)iwn_cmd(sc, IWN_CMD_SET_LED, &led, sizeof led, 1);
5617 * Set the critical temperature at which the firmware will stop the radio
5621 iwn_set_critical_temp(struct iwn_softc *sc)
5623 struct iwn_critical_temp crit;
5626 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5628 IWN_WRITE(sc, IWN_UCODE_GP1_CLR, IWN_UCODE_GP1_CTEMP_STOP_RF);
5630 if (sc->hw_type == IWN_HW_REV_TYPE_5150)
5631 temp = (IWN_CTOK(110) - sc->temp_off) * -5;
5632 else if (sc->hw_type == IWN_HW_REV_TYPE_4965)
5633 temp = IWN_CTOK(110);
5636 memset(&crit, 0, sizeof crit);
5637 crit.tempR = htole32(temp);
5638 DPRINTF(sc, IWN_DEBUG_RESET, "setting critical temp to %d\n", temp);
5639 return iwn_cmd(sc, IWN_CMD_SET_CRITICAL_TEMP, &crit, sizeof crit, 0);
5643 iwn_set_timing(struct iwn_softc *sc, struct ieee80211_node *ni)
5645 struct iwn_cmd_timing cmd;
5648 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5650 memset(&cmd, 0, sizeof cmd);
5651 memcpy(&cmd.tstamp, ni->ni_tstamp.data, sizeof (uint64_t));
5652 cmd.bintval = htole16(ni->ni_intval);
5653 cmd.lintval = htole16(10);
5655 /* Compute remaining time until next beacon. */
5656 val = (uint64_t)ni->ni_intval * IEEE80211_DUR_TU;
5657 mod = le64toh(cmd.tstamp) % val;
5658 cmd.binitval = htole32((uint32_t)(val - mod));
5660 DPRINTF(sc, IWN_DEBUG_RESET, "timing bintval=%u tstamp=%ju, init=%u\n",
5661 ni->ni_intval, le64toh(cmd.tstamp), (uint32_t)(val - mod));
5663 return iwn_cmd(sc, IWN_CMD_TIMING, &cmd, sizeof cmd, 1);
5667 iwn4965_power_calibration(struct iwn_softc *sc, int temp)
5670 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5672 /* Adjust TX power if need be (delta >= 3 degC). */
5673 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: temperature %d->%d\n",
5674 __func__, sc->temp, temp);
5675 if (abs(temp - sc->temp) >= 3) {
5676 /* Record temperature of last calibration. */
5678 (void)iwn4965_set_txpower(sc, 1);
5683 * Set TX power for current channel (each rate has its own power settings).
5684 * This function takes into account the regulatory information from EEPROM,
5685 * the current temperature and the current voltage.
5688 iwn4965_set_txpower(struct iwn_softc *sc, int async)
5690 /* Fixed-point arithmetic division using a n-bit fractional part. */
5691 #define fdivround(a, b, n) \
5692 ((((1 << n) * (a)) / (b) + (1 << n) / 2) / (1 << n))
5693 /* Linear interpolation. */
5694 #define interpolate(x, x1, y1, x2, y2, n) \
5695 ((y1) + fdivround(((int)(x) - (x1)) * ((y2) - (y1)), (x2) - (x1), n))
5697 static const int tdiv[IWN_NATTEN_GROUPS] = { 9, 8, 8, 8, 6 };
5698 struct iwn_ucode_info *uc = &sc->ucode_info;
5699 struct iwn4965_cmd_txpower cmd;
5700 struct iwn4965_eeprom_chan_samples *chans;
5701 const uint8_t *rf_gain, *dsp_gain;
5702 int32_t vdiff, tdiff;
5703 int i, is_chan_5ghz, c, grp, maxpwr;
5706 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX];
5707 /* Retrieve current channel from last RXON. */
5708 chan = sc->rxon->chan;
5709 is_chan_5ghz = (sc->rxon->flags & htole32(IWN_RXON_24GHZ)) == 0;
5710 DPRINTF(sc, IWN_DEBUG_RESET, "setting TX power for channel %d\n",
5713 memset(&cmd, 0, sizeof cmd);
5714 cmd.band = is_chan_5ghz ? 0 : 1;
5718 maxpwr = sc->maxpwr5GHz;
5719 rf_gain = iwn4965_rf_gain_5ghz;
5720 dsp_gain = iwn4965_dsp_gain_5ghz;
5722 maxpwr = sc->maxpwr2GHz;
5723 rf_gain = iwn4965_rf_gain_2ghz;
5724 dsp_gain = iwn4965_dsp_gain_2ghz;
5727 /* Compute voltage compensation. */
5728 vdiff = ((int32_t)le32toh(uc->volt) - sc->eeprom_voltage) / 7;
5733 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
5734 "%s: voltage compensation=%d (UCODE=%d, EEPROM=%d)\n",
5735 __func__, vdiff, le32toh(uc->volt), sc->eeprom_voltage);
5737 /* Get channel attenuation group. */
5738 if (chan <= 20) /* 1-20 */
5740 else if (chan <= 43) /* 34-43 */
5742 else if (chan <= 70) /* 44-70 */
5744 else if (chan <= 124) /* 71-124 */
5748 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
5749 "%s: chan %d, attenuation group=%d\n", __func__, chan, grp);
5751 /* Get channel sub-band. */
5752 for (i = 0; i < IWN_NBANDS; i++)
5753 if (sc->bands[i].lo != 0 &&
5754 sc->bands[i].lo <= chan && chan <= sc->bands[i].hi)
5756 if (i == IWN_NBANDS) /* Can't happen in real-life. */
5758 chans = sc->bands[i].chans;
5759 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
5760 "%s: chan %d sub-band=%d\n", __func__, chan, i);
5762 for (c = 0; c < 2; c++) {
5763 uint8_t power, gain, temp;
5764 int maxchpwr, pwr, ridx, idx;
5766 power = interpolate(chan,
5767 chans[0].num, chans[0].samples[c][1].power,
5768 chans[1].num, chans[1].samples[c][1].power, 1);
5769 gain = interpolate(chan,
5770 chans[0].num, chans[0].samples[c][1].gain,
5771 chans[1].num, chans[1].samples[c][1].gain, 1);
5772 temp = interpolate(chan,
5773 chans[0].num, chans[0].samples[c][1].temp,
5774 chans[1].num, chans[1].samples[c][1].temp, 1);
5775 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
5776 "%s: Tx chain %d: power=%d gain=%d temp=%d\n",
5777 __func__, c, power, gain, temp);
5779 /* Compute temperature compensation. */
5780 tdiff = ((sc->temp - temp) * 2) / tdiv[grp];
5781 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
5782 "%s: temperature compensation=%d (current=%d, EEPROM=%d)\n",
5783 __func__, tdiff, sc->temp, temp);
5785 for (ridx = 0; ridx <= IWN_RIDX_MAX; ridx++) {
5786 /* Convert dBm to half-dBm. */
5787 maxchpwr = sc->maxpwr[chan] * 2;
5789 maxchpwr -= 6; /* MIMO 2T: -3dB */
5793 /* Adjust TX power based on rate. */
5794 if ((ridx % 8) == 5)
5795 pwr -= 15; /* OFDM48: -7.5dB */
5796 else if ((ridx % 8) == 6)
5797 pwr -= 17; /* OFDM54: -8.5dB */
5798 else if ((ridx % 8) == 7)
5799 pwr -= 20; /* OFDM60: -10dB */
5801 pwr -= 10; /* Others: -5dB */
5803 /* Do not exceed channel max TX power. */
5807 idx = gain - (pwr - power) - tdiff - vdiff;
5808 if ((ridx / 8) & 1) /* MIMO */
5809 idx += (int32_t)le32toh(uc->atten[grp][c]);
5812 idx += 9; /* 5GHz */
5813 if (ridx == IWN_RIDX_MAX)
5816 /* Make sure idx stays in a valid range. */
5819 else if (idx > IWN4965_MAX_PWR_INDEX)
5820 idx = IWN4965_MAX_PWR_INDEX;
5822 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
5823 "%s: Tx chain %d, rate idx %d: power=%d\n",
5824 __func__, c, ridx, idx);
5825 cmd.power[ridx].rf_gain[c] = rf_gain[idx];
5826 cmd.power[ridx].dsp_gain[c] = dsp_gain[idx];
5830 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
5831 "%s: set tx power for chan %d\n", __func__, chan);
5832 return iwn_cmd(sc, IWN_CMD_TXPOWER, &cmd, sizeof cmd, async);
5839 iwn5000_set_txpower(struct iwn_softc *sc, int async)
5841 struct iwn5000_cmd_txpower cmd;
5844 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5847 * TX power calibration is handled automatically by the firmware
5850 memset(&cmd, 0, sizeof cmd);
5851 cmd.global_limit = 2 * IWN5000_TXPOWER_MAX_DBM; /* 16 dBm */
5852 cmd.flags = IWN5000_TXPOWER_NO_CLOSED;
5853 cmd.srv_limit = IWN5000_TXPOWER_AUTO;
5854 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_XMIT,
5855 "%s: setting TX power; rev=%d\n",
5857 IWN_UCODE_API(sc->ucode_rev));
5858 if (IWN_UCODE_API(sc->ucode_rev) == 1)
5859 cmdid = IWN_CMD_TXPOWER_DBM_V1;
5861 cmdid = IWN_CMD_TXPOWER_DBM;
5862 return iwn_cmd(sc, cmdid, &cmd, sizeof cmd, async);
5866 * Retrieve the maximum RSSI (in dBm) among receivers.
5869 iwn4965_get_rssi(struct iwn_softc *sc, struct iwn_rx_stat *stat)
5871 struct iwn4965_rx_phystat *phy = (void *)stat->phybuf;
5875 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5877 mask = (le16toh(phy->antenna) >> 4) & IWN_ANT_ABC;
5878 agc = (le16toh(phy->agc) >> 7) & 0x7f;
5881 if (mask & IWN_ANT_A)
5882 rssi = MAX(rssi, phy->rssi[0]);
5883 if (mask & IWN_ANT_B)
5884 rssi = MAX(rssi, phy->rssi[2]);
5885 if (mask & IWN_ANT_C)
5886 rssi = MAX(rssi, phy->rssi[4]);
5888 DPRINTF(sc, IWN_DEBUG_RECV,
5889 "%s: agc %d mask 0x%x rssi %d %d %d result %d\n", __func__, agc,
5890 mask, phy->rssi[0], phy->rssi[2], phy->rssi[4],
5891 rssi - agc - IWN_RSSI_TO_DBM);
5892 return rssi - agc - IWN_RSSI_TO_DBM;
5896 iwn5000_get_rssi(struct iwn_softc *sc, struct iwn_rx_stat *stat)
5898 struct iwn5000_rx_phystat *phy = (void *)stat->phybuf;
5902 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5904 agc = (le32toh(phy->agc) >> 9) & 0x7f;
5906 rssi = MAX(le16toh(phy->rssi[0]) & 0xff,
5907 le16toh(phy->rssi[1]) & 0xff);
5908 rssi = MAX(le16toh(phy->rssi[2]) & 0xff, rssi);
5910 DPRINTF(sc, IWN_DEBUG_RECV,
5911 "%s: agc %d rssi %d %d %d result %d\n", __func__, agc,
5912 phy->rssi[0], phy->rssi[1], phy->rssi[2],
5913 rssi - agc - IWN_RSSI_TO_DBM);
5914 return rssi - agc - IWN_RSSI_TO_DBM;
5918 * Retrieve the average noise (in dBm) among receivers.
5921 iwn_get_noise(const struct iwn_rx_general_stats *stats)
5923 int i, total, nbant, noise;
5926 for (i = 0; i < 3; i++) {
5927 if ((noise = le32toh(stats->noise[i]) & 0xff) == 0)
5932 /* There should be at least one antenna but check anyway. */
5933 return (nbant == 0) ? -127 : (total / nbant) - 107;
5937 * Compute temperature (in degC) from last received statistics.
5940 iwn4965_get_temperature(struct iwn_softc *sc)
5942 struct iwn_ucode_info *uc = &sc->ucode_info;
5943 int32_t r1, r2, r3, r4, temp;
5945 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5947 r1 = le32toh(uc->temp[0].chan20MHz);
5948 r2 = le32toh(uc->temp[1].chan20MHz);
5949 r3 = le32toh(uc->temp[2].chan20MHz);
5950 r4 = le32toh(sc->rawtemp);
5952 if (r1 == r3) /* Prevents division by 0 (should not happen). */
5955 /* Sign-extend 23-bit R4 value to 32-bit. */
5956 r4 = ((r4 & 0xffffff) ^ 0x800000) - 0x800000;
5957 /* Compute temperature in Kelvin. */
5958 temp = (259 * (r4 - r2)) / (r3 - r1);
5959 temp = (temp * 97) / 100 + 8;
5961 DPRINTF(sc, IWN_DEBUG_ANY, "temperature %dK/%dC\n", temp,
5963 return IWN_KTOC(temp);
5967 iwn5000_get_temperature(struct iwn_softc *sc)
5971 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5974 * Temperature is not used by the driver for 5000 Series because
5975 * TX power calibration is handled by firmware.
5977 temp = le32toh(sc->rawtemp);
5978 if (sc->hw_type == IWN_HW_REV_TYPE_5150) {
5979 temp = (temp / -5) + sc->temp_off;
5980 temp = IWN_KTOC(temp);
5986 * Initialize sensitivity calibration state machine.
5989 iwn_init_sensitivity(struct iwn_softc *sc)
5991 struct iwn_ops *ops = &sc->ops;
5992 struct iwn_calib_state *calib = &sc->calib;
5996 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5998 /* Reset calibration state machine. */
5999 memset(calib, 0, sizeof (*calib));
6000 calib->state = IWN_CALIB_STATE_INIT;
6001 calib->cck_state = IWN_CCK_STATE_HIFA;
6002 /* Set initial correlation values. */
6003 calib->ofdm_x1 = sc->limits->min_ofdm_x1;
6004 calib->ofdm_mrc_x1 = sc->limits->min_ofdm_mrc_x1;
6005 calib->ofdm_x4 = sc->limits->min_ofdm_x4;
6006 calib->ofdm_mrc_x4 = sc->limits->min_ofdm_mrc_x4;
6007 calib->cck_x4 = 125;
6008 calib->cck_mrc_x4 = sc->limits->min_cck_mrc_x4;
6009 calib->energy_cck = sc->limits->energy_cck;
6011 /* Write initial sensitivity. */
6012 if ((error = iwn_send_sensitivity(sc)) != 0)
6015 /* Write initial gains. */
6016 if ((error = ops->init_gains(sc)) != 0)
6019 /* Request statistics at each beacon interval. */
6021 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: sending request for statistics\n",
6023 return iwn_cmd(sc, IWN_CMD_GET_STATISTICS, &flags, sizeof flags, 1);
6027 * Collect noise and RSSI statistics for the first 20 beacons received
6028 * after association and use them to determine connected antennas and
6029 * to set differential gains.
6032 iwn_collect_noise(struct iwn_softc *sc,
6033 const struct iwn_rx_general_stats *stats)
6035 struct iwn_ops *ops = &sc->ops;
6036 struct iwn_calib_state *calib = &sc->calib;
6037 struct ieee80211com *ic = &sc->sc_ic;
6041 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
6043 /* Accumulate RSSI and noise for all 3 antennas. */
6044 for (i = 0; i < 3; i++) {
6045 calib->rssi[i] += le32toh(stats->rssi[i]) & 0xff;
6046 calib->noise[i] += le32toh(stats->noise[i]) & 0xff;
6048 /* NB: We update differential gains only once after 20 beacons. */
6049 if (++calib->nbeacons < 20)
6052 /* Determine highest average RSSI. */
6053 val = MAX(calib->rssi[0], calib->rssi[1]);
6054 val = MAX(calib->rssi[2], val);
6056 /* Determine which antennas are connected. */
6057 sc->chainmask = sc->rxchainmask;
6058 for (i = 0; i < 3; i++)
6059 if (val - calib->rssi[i] > 15 * 20)
6060 sc->chainmask &= ~(1 << i);
6061 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_XMIT,
6062 "%s: RX chains mask: theoretical=0x%x, actual=0x%x\n",
6063 __func__, sc->rxchainmask, sc->chainmask);
6065 /* If none of the TX antennas are connected, keep at least one. */
6066 if ((sc->chainmask & sc->txchainmask) == 0)
6067 sc->chainmask |= IWN_LSB(sc->txchainmask);
6069 (void)ops->set_gains(sc);
6070 calib->state = IWN_CALIB_STATE_RUN;
6073 /* XXX Disable RX chains with no antennas connected. */
6074 sc->rxon->rxchain = htole16(IWN_RXCHAIN_SEL(sc->chainmask));
6075 if (sc->sc_is_scanning)
6076 device_printf(sc->sc_dev,
6077 "%s: is_scanning set, before RXON\n",
6079 (void)iwn_cmd(sc, IWN_CMD_RXON, sc->rxon, sc->rxonsz, 1);
6082 /* Enable power-saving mode if requested by user. */
6083 if (ic->ic_flags & IEEE80211_F_PMGTON)
6084 (void)iwn_set_pslevel(sc, 0, 3, 1);
6086 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
6091 iwn4965_init_gains(struct iwn_softc *sc)
6093 struct iwn_phy_calib_gain cmd;
6095 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
6097 memset(&cmd, 0, sizeof cmd);
6098 cmd.code = IWN4965_PHY_CALIB_DIFF_GAIN;
6099 /* Differential gains initially set to 0 for all 3 antennas. */
6100 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
6101 "%s: setting initial differential gains\n", __func__);
6102 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 1);
6106 iwn5000_init_gains(struct iwn_softc *sc)
6108 struct iwn_phy_calib cmd;
6110 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
6112 memset(&cmd, 0, sizeof cmd);
6113 cmd.code = sc->reset_noise_gain;
6116 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
6117 "%s: setting initial differential gains\n", __func__);
6118 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 1);
6122 iwn4965_set_gains(struct iwn_softc *sc)
6124 struct iwn_calib_state *calib = &sc->calib;
6125 struct iwn_phy_calib_gain cmd;
6126 int i, delta, noise;
6128 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
6130 /* Get minimal noise among connected antennas. */
6131 noise = INT_MAX; /* NB: There's at least one antenna. */
6132 for (i = 0; i < 3; i++)
6133 if (sc->chainmask & (1 << i))
6134 noise = MIN(calib->noise[i], noise);
6136 memset(&cmd, 0, sizeof cmd);
6137 cmd.code = IWN4965_PHY_CALIB_DIFF_GAIN;
6138 /* Set differential gains for connected antennas. */
6139 for (i = 0; i < 3; i++) {
6140 if (sc->chainmask & (1 << i)) {
6141 /* Compute attenuation (in unit of 1.5dB). */
6142 delta = (noise - (int32_t)calib->noise[i]) / 30;
6143 /* NB: delta <= 0 */
6144 /* Limit to [-4.5dB,0]. */
6145 cmd.gain[i] = MIN(abs(delta), 3);
6147 cmd.gain[i] |= 1 << 2; /* sign bit */
6150 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
6151 "setting differential gains Ant A/B/C: %x/%x/%x (%x)\n",
6152 cmd.gain[0], cmd.gain[1], cmd.gain[2], sc->chainmask);
6153 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 1);
6157 iwn5000_set_gains(struct iwn_softc *sc)
6159 struct iwn_calib_state *calib = &sc->calib;
6160 struct iwn_phy_calib_gain cmd;
6161 int i, ant, div, delta;
6163 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
6165 /* We collected 20 beacons and !=6050 need a 1.5 factor. */
6166 div = (sc->hw_type == IWN_HW_REV_TYPE_6050) ? 20 : 30;
6168 memset(&cmd, 0, sizeof cmd);
6169 cmd.code = sc->noise_gain;
6172 /* Get first available RX antenna as referential. */
6173 ant = IWN_LSB(sc->rxchainmask);
6174 /* Set differential gains for other antennas. */
6175 for (i = ant + 1; i < 3; i++) {
6176 if (sc->chainmask & (1 << i)) {
6177 /* The delta is relative to antenna "ant". */
6178 delta = ((int32_t)calib->noise[ant] -
6179 (int32_t)calib->noise[i]) / div;
6180 /* Limit to [-4.5dB,+4.5dB]. */
6181 cmd.gain[i - 1] = MIN(abs(delta), 3);
6183 cmd.gain[i - 1] |= 1 << 2; /* sign bit */
6186 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_XMIT,
6187 "setting differential gains Ant B/C: %x/%x (%x)\n",
6188 cmd.gain[0], cmd.gain[1], sc->chainmask);
6189 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 1);
6193 * Tune RF RX sensitivity based on the number of false alarms detected
6194 * during the last beacon period.
6197 iwn_tune_sensitivity(struct iwn_softc *sc, const struct iwn_rx_stats *stats)
6199 #define inc(val, inc, max) \
6200 if ((val) < (max)) { \
6201 if ((val) < (max) - (inc)) \
6207 #define dec(val, dec, min) \
6208 if ((val) > (min)) { \
6209 if ((val) > (min) + (dec)) \
6216 const struct iwn_sensitivity_limits *limits = sc->limits;
6217 struct iwn_calib_state *calib = &sc->calib;
6218 uint32_t val, rxena, fa;
6219 uint32_t energy[3], energy_min;
6220 uint8_t noise[3], noise_ref;
6221 int i, needs_update = 0;
6223 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
6225 /* Check that we've been enabled long enough. */
6226 if ((rxena = le32toh(stats->general.load)) == 0){
6227 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end not so long\n", __func__);
6231 /* Compute number of false alarms since last call for OFDM. */
6232 fa = le32toh(stats->ofdm.bad_plcp) - calib->bad_plcp_ofdm;
6233 fa += le32toh(stats->ofdm.fa) - calib->fa_ofdm;
6234 fa *= 200 * IEEE80211_DUR_TU; /* 200TU */
6236 if (fa > 50 * rxena) {
6237 /* High false alarm count, decrease sensitivity. */
6238 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
6239 "%s: OFDM high false alarm count: %u\n", __func__, fa);
6240 inc(calib->ofdm_x1, 1, limits->max_ofdm_x1);
6241 inc(calib->ofdm_mrc_x1, 1, limits->max_ofdm_mrc_x1);
6242 inc(calib->ofdm_x4, 1, limits->max_ofdm_x4);
6243 inc(calib->ofdm_mrc_x4, 1, limits->max_ofdm_mrc_x4);
6245 } else if (fa < 5 * rxena) {
6246 /* Low false alarm count, increase sensitivity. */
6247 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
6248 "%s: OFDM low false alarm count: %u\n", __func__, fa);
6249 dec(calib->ofdm_x1, 1, limits->min_ofdm_x1);
6250 dec(calib->ofdm_mrc_x1, 1, limits->min_ofdm_mrc_x1);
6251 dec(calib->ofdm_x4, 1, limits->min_ofdm_x4);
6252 dec(calib->ofdm_mrc_x4, 1, limits->min_ofdm_mrc_x4);
6255 /* Compute maximum noise among 3 receivers. */
6256 for (i = 0; i < 3; i++)
6257 noise[i] = (le32toh(stats->general.noise[i]) >> 8) & 0xff;
6258 val = MAX(noise[0], noise[1]);
6259 val = MAX(noise[2], val);
6260 /* Insert it into our samples table. */
6261 calib->noise_samples[calib->cur_noise_sample] = val;
6262 calib->cur_noise_sample = (calib->cur_noise_sample + 1) % 20;
6264 /* Compute maximum noise among last 20 samples. */
6265 noise_ref = calib->noise_samples[0];
6266 for (i = 1; i < 20; i++)
6267 noise_ref = MAX(noise_ref, calib->noise_samples[i]);
6269 /* Compute maximum energy among 3 receivers. */
6270 for (i = 0; i < 3; i++)
6271 energy[i] = le32toh(stats->general.energy[i]);
6272 val = MIN(energy[0], energy[1]);
6273 val = MIN(energy[2], val);
6274 /* Insert it into our samples table. */
6275 calib->energy_samples[calib->cur_energy_sample] = val;
6276 calib->cur_energy_sample = (calib->cur_energy_sample + 1) % 10;
6278 /* Compute minimum energy among last 10 samples. */
6279 energy_min = calib->energy_samples[0];
6280 for (i = 1; i < 10; i++)
6281 energy_min = MAX(energy_min, calib->energy_samples[i]);
6284 /* Compute number of false alarms since last call for CCK. */
6285 fa = le32toh(stats->cck.bad_plcp) - calib->bad_plcp_cck;
6286 fa += le32toh(stats->cck.fa) - calib->fa_cck;
6287 fa *= 200 * IEEE80211_DUR_TU; /* 200TU */
6289 if (fa > 50 * rxena) {
6290 /* High false alarm count, decrease sensitivity. */
6291 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
6292 "%s: CCK high false alarm count: %u\n", __func__, fa);
6293 calib->cck_state = IWN_CCK_STATE_HIFA;
6296 if (calib->cck_x4 > 160) {
6297 calib->noise_ref = noise_ref;
6298 if (calib->energy_cck > 2)
6299 dec(calib->energy_cck, 2, energy_min);
6301 if (calib->cck_x4 < 160) {
6302 calib->cck_x4 = 161;
6305 inc(calib->cck_x4, 3, limits->max_cck_x4);
6307 inc(calib->cck_mrc_x4, 3, limits->max_cck_mrc_x4);
6309 } else if (fa < 5 * rxena) {
6310 /* Low false alarm count, increase sensitivity. */
6311 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
6312 "%s: CCK low false alarm count: %u\n", __func__, fa);
6313 calib->cck_state = IWN_CCK_STATE_LOFA;
6316 if (calib->cck_state != IWN_CCK_STATE_INIT &&
6317 (((int32_t)calib->noise_ref - (int32_t)noise_ref) > 2 ||
6318 calib->low_fa > 100)) {
6319 inc(calib->energy_cck, 2, limits->min_energy_cck);
6320 dec(calib->cck_x4, 3, limits->min_cck_x4);
6321 dec(calib->cck_mrc_x4, 3, limits->min_cck_mrc_x4);
6324 /* Not worth to increase or decrease sensitivity. */
6325 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
6326 "%s: CCK normal false alarm count: %u\n", __func__, fa);
6328 calib->noise_ref = noise_ref;
6330 if (calib->cck_state == IWN_CCK_STATE_HIFA) {
6331 /* Previous interval had many false alarms. */
6332 dec(calib->energy_cck, 8, energy_min);
6334 calib->cck_state = IWN_CCK_STATE_INIT;
6338 (void)iwn_send_sensitivity(sc);
6340 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
6347 iwn_send_sensitivity(struct iwn_softc *sc)
6349 struct iwn_calib_state *calib = &sc->calib;
6350 struct iwn_enhanced_sensitivity_cmd cmd;
6353 memset(&cmd, 0, sizeof cmd);
6354 len = sizeof (struct iwn_sensitivity_cmd);
6355 cmd.which = IWN_SENSITIVITY_WORKTBL;
6356 /* OFDM modulation. */
6357 cmd.corr_ofdm_x1 = htole16(calib->ofdm_x1);
6358 cmd.corr_ofdm_mrc_x1 = htole16(calib->ofdm_mrc_x1);
6359 cmd.corr_ofdm_x4 = htole16(calib->ofdm_x4);
6360 cmd.corr_ofdm_mrc_x4 = htole16(calib->ofdm_mrc_x4);
6361 cmd.energy_ofdm = htole16(sc->limits->energy_ofdm);
6362 cmd.energy_ofdm_th = htole16(62);
6363 /* CCK modulation. */
6364 cmd.corr_cck_x4 = htole16(calib->cck_x4);
6365 cmd.corr_cck_mrc_x4 = htole16(calib->cck_mrc_x4);
6366 cmd.energy_cck = htole16(calib->energy_cck);
6367 /* Barker modulation: use default values. */
6368 cmd.corr_barker = htole16(190);
6369 cmd.corr_barker_mrc = htole16(sc->limits->barker_mrc);
6371 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
6372 "%s: set sensitivity %d/%d/%d/%d/%d/%d/%d\n", __func__,
6373 calib->ofdm_x1, calib->ofdm_mrc_x1, calib->ofdm_x4,
6374 calib->ofdm_mrc_x4, calib->cck_x4,
6375 calib->cck_mrc_x4, calib->energy_cck);
6377 if (!(sc->sc_flags & IWN_FLAG_ENH_SENS))
6379 /* Enhanced sensitivity settings. */
6380 len = sizeof (struct iwn_enhanced_sensitivity_cmd);
6381 cmd.ofdm_det_slope_mrc = htole16(668);
6382 cmd.ofdm_det_icept_mrc = htole16(4);
6383 cmd.ofdm_det_slope = htole16(486);
6384 cmd.ofdm_det_icept = htole16(37);
6385 cmd.cck_det_slope_mrc = htole16(853);
6386 cmd.cck_det_icept_mrc = htole16(4);
6387 cmd.cck_det_slope = htole16(476);
6388 cmd.cck_det_icept = htole16(99);
6390 return iwn_cmd(sc, IWN_CMD_SET_SENSITIVITY, &cmd, len, 1);
6394 * Look at the increase of PLCP errors over time; if it exceeds
6395 * a programmed threshold then trigger an RF retune.
6398 iwn_check_rx_recovery(struct iwn_softc *sc, struct iwn_stats *rs)
6400 int32_t delta_ofdm, delta_ht, delta_cck;
6401 struct iwn_calib_state *calib = &sc->calib;
6402 int delta_ticks, cur_ticks;
6407 * Calculate the difference between the current and
6408 * previous statistics.
6410 delta_cck = le32toh(rs->rx.cck.bad_plcp) - calib->bad_plcp_cck;
6411 delta_ofdm = le32toh(rs->rx.ofdm.bad_plcp) - calib->bad_plcp_ofdm;
6412 delta_ht = le32toh(rs->rx.ht.bad_plcp) - calib->bad_plcp_ht;
6415 * Calculate the delta in time between successive statistics
6416 * messages. Yes, it can roll over; so we make sure that
6417 * this doesn't happen.
6419 * XXX go figure out what to do about rollover
6420 * XXX go figure out what to do if ticks rolls over to -ve instead!
6421 * XXX go stab signed integer overflow undefined-ness in the face.
6424 delta_ticks = cur_ticks - sc->last_calib_ticks;
6427 * If any are negative, then the firmware likely reset; so just
6428 * bail. We'll pick this up next time.
6430 if (delta_cck < 0 || delta_ofdm < 0 || delta_ht < 0 || delta_ticks < 0)
6434 * delta_ticks is in ticks; we need to convert it up to milliseconds
6435 * so we can do some useful math with it.
6437 delta_msec = ticks_to_msecs(delta_ticks);
6440 * Calculate what our threshold is given the current delta_msec.
6442 thresh = sc->base_params->plcp_err_threshold * delta_msec;
6444 DPRINTF(sc, IWN_DEBUG_STATE,
6445 "%s: time delta: %d; cck=%d, ofdm=%d, ht=%d, total=%d, thresh=%d\n",
6451 (delta_msec + delta_cck + delta_ofdm + delta_ht),
6455 * If we need a retune, then schedule a single channel scan
6456 * to a channel that isn't the currently active one!
6458 * The math from linux iwlwifi:
6460 * if ((delta * 100 / msecs) > threshold)
6462 if (thresh > 0 && (delta_cck + delta_ofdm + delta_ht) * 100 > thresh) {
6463 DPRINTF(sc, IWN_DEBUG_ANY,
6464 "%s: PLCP error threshold raw (%d) comparison (%d) "
6465 "over limit (%d); retune!\n",
6467 (delta_cck + delta_ofdm + delta_ht),
6468 (delta_cck + delta_ofdm + delta_ht) * 100,
6474 * Set STA mode power saving level (between 0 and 5).
6475 * Level 0 is CAM (Continuously Aware Mode), 5 is for maximum power saving.
6478 iwn_set_pslevel(struct iwn_softc *sc, int dtim, int level, int async)
6480 struct iwn_pmgt_cmd cmd;
6481 const struct iwn_pmgt *pmgt;
6482 uint32_t max, skip_dtim;
6486 DPRINTF(sc, IWN_DEBUG_PWRSAVE,
6487 "%s: dtim=%d, level=%d, async=%d\n",
6493 /* Select which PS parameters to use. */
6495 pmgt = &iwn_pmgt[0][level];
6496 else if (dtim <= 10)
6497 pmgt = &iwn_pmgt[1][level];
6499 pmgt = &iwn_pmgt[2][level];
6501 memset(&cmd, 0, sizeof cmd);
6502 if (level != 0) /* not CAM */
6503 cmd.flags |= htole16(IWN_PS_ALLOW_SLEEP);
6505 cmd.flags |= htole16(IWN_PS_FAST_PD);
6506 /* Retrieve PCIe Active State Power Management (ASPM). */
6507 reg = pci_read_config(sc->sc_dev, sc->sc_cap_off + PCIER_LINK_CTL, 4);
6508 if (!(reg & PCIEM_LINK_CTL_ASPMC_L0S)) /* L0s Entry disabled. */
6509 cmd.flags |= htole16(IWN_PS_PCI_PMGT);
6510 cmd.rxtimeout = htole32(pmgt->rxtimeout * 1024);
6511 cmd.txtimeout = htole32(pmgt->txtimeout * 1024);
6517 skip_dtim = pmgt->skip_dtim;
6518 if (skip_dtim != 0) {
6519 cmd.flags |= htole16(IWN_PS_SLEEP_OVER_DTIM);
6520 max = pmgt->intval[4];
6521 if (max == (uint32_t)-1)
6522 max = dtim * (skip_dtim + 1);
6523 else if (max > dtim)
6524 max = rounddown(max, dtim);
6527 for (i = 0; i < 5; i++)
6528 cmd.intval[i] = htole32(MIN(max, pmgt->intval[i]));
6530 DPRINTF(sc, IWN_DEBUG_RESET, "setting power saving level to %d\n",
6532 return iwn_cmd(sc, IWN_CMD_SET_POWER_MODE, &cmd, sizeof cmd, async);
6536 iwn_send_btcoex(struct iwn_softc *sc)
6538 struct iwn_bluetooth cmd;
6540 memset(&cmd, 0, sizeof cmd);
6541 cmd.flags = IWN_BT_COEX_CHAN_ANN | IWN_BT_COEX_BT_PRIO;
6542 cmd.lead_time = IWN_BT_LEAD_TIME_DEF;
6543 cmd.max_kill = IWN_BT_MAX_KILL_DEF;
6544 DPRINTF(sc, IWN_DEBUG_RESET, "%s: configuring bluetooth coexistence\n",
6546 return iwn_cmd(sc, IWN_CMD_BT_COEX, &cmd, sizeof(cmd), 0);
6550 iwn_send_advanced_btcoex(struct iwn_softc *sc)
6552 static const uint32_t btcoex_3wire[12] = {
6553 0xaaaaaaaa, 0xaaaaaaaa, 0xaeaaaaaa, 0xaaaaaaaa,
6554 0xcc00ff28, 0x0000aaaa, 0xcc00aaaa, 0x0000aaaa,
6555 0xc0004000, 0x00004000, 0xf0005000, 0xf0005000,
6557 struct iwn6000_btcoex_config btconfig;
6558 struct iwn2000_btcoex_config btconfig2k;
6559 struct iwn_btcoex_priotable btprio;
6560 struct iwn_btcoex_prot btprot;
6564 memset(&btconfig, 0, sizeof btconfig);
6565 memset(&btconfig2k, 0, sizeof btconfig2k);
6567 flags = IWN_BT_FLAG_COEX6000_MODE_3W <<
6568 IWN_BT_FLAG_COEX6000_MODE_SHIFT; // Done as is in linux kernel 3.2
6570 if (sc->base_params->bt_sco_disable)
6571 flags &= ~IWN_BT_FLAG_SYNC_2_BT_DISABLE;
6573 flags |= IWN_BT_FLAG_SYNC_2_BT_DISABLE;
6575 flags |= IWN_BT_FLAG_COEX6000_CHAN_INHIBITION;
6577 /* Default flags result is 145 as old value */
6580 * Flags value has to be review. Values must change if we
6581 * which to disable it
6583 if (sc->base_params->bt_session_2) {
6584 btconfig2k.flags = flags;
6585 btconfig2k.max_kill = 5;
6586 btconfig2k.bt3_t7_timer = 1;
6587 btconfig2k.kill_ack = htole32(0xffff0000);
6588 btconfig2k.kill_cts = htole32(0xffff0000);
6589 btconfig2k.sample_time = 2;
6590 btconfig2k.bt3_t2_timer = 0xc;
6592 for (i = 0; i < 12; i++)
6593 btconfig2k.lookup_table[i] = htole32(btcoex_3wire[i]);
6594 btconfig2k.valid = htole16(0xff);
6595 btconfig2k.prio_boost = htole32(0xf0);
6596 DPRINTF(sc, IWN_DEBUG_RESET,
6597 "%s: configuring advanced bluetooth coexistence"
6598 " session 2, flags : 0x%x\n",
6601 error = iwn_cmd(sc, IWN_CMD_BT_COEX, &btconfig2k,
6602 sizeof(btconfig2k), 1);
6604 btconfig.flags = flags;
6605 btconfig.max_kill = 5;
6606 btconfig.bt3_t7_timer = 1;
6607 btconfig.kill_ack = htole32(0xffff0000);
6608 btconfig.kill_cts = htole32(0xffff0000);
6609 btconfig.sample_time = 2;
6610 btconfig.bt3_t2_timer = 0xc;
6612 for (i = 0; i < 12; i++)
6613 btconfig.lookup_table[i] = htole32(btcoex_3wire[i]);
6614 btconfig.valid = htole16(0xff);
6615 btconfig.prio_boost = 0xf0;
6616 DPRINTF(sc, IWN_DEBUG_RESET,
6617 "%s: configuring advanced bluetooth coexistence,"
6621 error = iwn_cmd(sc, IWN_CMD_BT_COEX, &btconfig,
6622 sizeof(btconfig), 1);
6628 memset(&btprio, 0, sizeof btprio);
6629 btprio.calib_init1 = 0x6;
6630 btprio.calib_init2 = 0x7;
6631 btprio.calib_periodic_low1 = 0x2;
6632 btprio.calib_periodic_low2 = 0x3;
6633 btprio.calib_periodic_high1 = 0x4;
6634 btprio.calib_periodic_high2 = 0x5;
6636 btprio.scan52 = 0x8;
6637 btprio.scan24 = 0xa;
6638 error = iwn_cmd(sc, IWN_CMD_BT_COEX_PRIOTABLE, &btprio, sizeof(btprio),
6643 /* Force BT state machine change. */
6644 memset(&btprot, 0, sizeof btprot);
6647 error = iwn_cmd(sc, IWN_CMD_BT_COEX_PROT, &btprot, sizeof(btprot), 1);
6651 return iwn_cmd(sc, IWN_CMD_BT_COEX_PROT, &btprot, sizeof(btprot), 1);
6655 iwn5000_runtime_calib(struct iwn_softc *sc)
6657 struct iwn5000_calib_config cmd;
6659 memset(&cmd, 0, sizeof cmd);
6660 cmd.ucode.once.enable = 0xffffffff;
6661 cmd.ucode.once.start = IWN5000_CALIB_DC;
6662 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
6663 "%s: configuring runtime calibration\n", __func__);
6664 return iwn_cmd(sc, IWN5000_CMD_CALIB_CONFIG, &cmd, sizeof(cmd), 0);
6668 iwn_get_rxon_ht_flags(struct iwn_softc *sc, struct ieee80211_channel *c)
6670 struct ieee80211com *ic = &sc->sc_ic;
6671 uint32_t htflags = 0;
6673 if (! IEEE80211_IS_CHAN_HT(c))
6676 htflags |= IWN_RXON_HT_PROTMODE(ic->ic_curhtprotmode);
6678 if (IEEE80211_IS_CHAN_HT40(c)) {
6679 switch (ic->ic_curhtprotmode) {
6680 case IEEE80211_HTINFO_OPMODE_HT20PR:
6681 htflags |= IWN_RXON_HT_MODEPURE40;
6684 htflags |= IWN_RXON_HT_MODEMIXED;
6688 if (IEEE80211_IS_CHAN_HT40D(c))
6689 htflags |= IWN_RXON_HT_HT40MINUS;
6695 iwn_check_bss_filter(struct iwn_softc *sc)
6697 return ((sc->rxon->filter & htole32(IWN_FILTER_BSS)) != 0);
6701 iwn4965_rxon_assoc(struct iwn_softc *sc, int async)
6703 struct iwn4965_rxon_assoc cmd;
6704 struct iwn_rxon *rxon = sc->rxon;
6706 cmd.flags = rxon->flags;
6707 cmd.filter = rxon->filter;
6708 cmd.ofdm_mask = rxon->ofdm_mask;
6709 cmd.cck_mask = rxon->cck_mask;
6710 cmd.ht_single_mask = rxon->ht_single_mask;
6711 cmd.ht_dual_mask = rxon->ht_dual_mask;
6712 cmd.rxchain = rxon->rxchain;
6715 return (iwn_cmd(sc, IWN_CMD_RXON_ASSOC, &cmd, sizeof(cmd), async));
6719 iwn5000_rxon_assoc(struct iwn_softc *sc, int async)
6721 struct iwn5000_rxon_assoc cmd;
6722 struct iwn_rxon *rxon = sc->rxon;
6724 cmd.flags = rxon->flags;
6725 cmd.filter = rxon->filter;
6726 cmd.ofdm_mask = rxon->ofdm_mask;
6727 cmd.cck_mask = rxon->cck_mask;
6729 cmd.ht_single_mask = rxon->ht_single_mask;
6730 cmd.ht_dual_mask = rxon->ht_dual_mask;
6731 cmd.ht_triple_mask = rxon->ht_triple_mask;
6733 cmd.rxchain = rxon->rxchain;
6734 cmd.acquisition = rxon->acquisition;
6737 return (iwn_cmd(sc, IWN_CMD_RXON_ASSOC, &cmd, sizeof(cmd), async));
6741 iwn_send_rxon(struct iwn_softc *sc, int assoc, int async)
6743 struct iwn_ops *ops = &sc->ops;
6746 IWN_LOCK_ASSERT(sc);
6748 if (assoc && iwn_check_bss_filter(sc) != 0) {
6749 error = ops->rxon_assoc(sc, async);
6751 device_printf(sc->sc_dev,
6752 "%s: RXON_ASSOC command failed, error %d\n",
6757 if (sc->sc_is_scanning)
6758 device_printf(sc->sc_dev,
6759 "%s: is_scanning set, before RXON\n",
6762 error = iwn_cmd(sc, IWN_CMD_RXON, sc->rxon, sc->rxonsz, async);
6764 device_printf(sc->sc_dev,
6765 "%s: RXON command failed, error %d\n",
6771 * Reconfiguring RXON clears the firmware nodes table so
6772 * we must add the broadcast node again.
6774 if (iwn_check_bss_filter(sc) == 0 &&
6775 (error = iwn_add_broadcast_node(sc, async)) != 0) {
6776 device_printf(sc->sc_dev,
6777 "%s: could not add broadcast node, error %d\n",
6783 /* Configuration has changed, set TX power accordingly. */
6784 if ((error = ops->set_txpower(sc, async)) != 0) {
6785 device_printf(sc->sc_dev,
6786 "%s: could not set TX power, error %d\n",
6795 iwn_config(struct iwn_softc *sc)
6797 struct ieee80211com *ic = &sc->sc_ic;
6798 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
6799 const uint8_t *macaddr;
6804 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
6806 if ((sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSET)
6807 && (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSETv2)) {
6808 device_printf(sc->sc_dev,"%s: temp_offset and temp_offsetv2 are"
6809 " exclusive each together. Review NIC config file. Conf"
6810 " : 0x%08x Flags : 0x%08x \n", __func__,
6811 sc->base_params->calib_need,
6812 (IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSET |
6813 IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSETv2));
6817 /* Compute temperature calib if needed. Will be send by send calib */
6818 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSET) {
6819 error = iwn5000_temp_offset_calib(sc);
6821 device_printf(sc->sc_dev,
6822 "%s: could not set temperature offset\n", __func__);
6825 } else if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSETv2) {
6826 error = iwn5000_temp_offset_calibv2(sc);
6828 device_printf(sc->sc_dev,
6829 "%s: could not compute temperature offset v2\n",
6835 if (sc->hw_type == IWN_HW_REV_TYPE_6050) {
6836 /* Configure runtime DC calibration. */
6837 error = iwn5000_runtime_calib(sc);
6839 device_printf(sc->sc_dev,
6840 "%s: could not configure runtime calibration\n",
6846 /* Configure valid TX chains for >=5000 Series. */
6847 if (sc->hw_type != IWN_HW_REV_TYPE_4965 &&
6848 IWN_UCODE_API(sc->ucode_rev) > 1) {
6849 txmask = htole32(sc->txchainmask);
6850 DPRINTF(sc, IWN_DEBUG_RESET | IWN_DEBUG_XMIT,
6851 "%s: configuring valid TX chains 0x%x\n", __func__, txmask);
6852 error = iwn_cmd(sc, IWN5000_CMD_TX_ANT_CONFIG, &txmask,
6855 device_printf(sc->sc_dev,
6856 "%s: could not configure valid TX chains, "
6857 "error %d\n", __func__, error);
6862 /* Configure bluetooth coexistence. */
6865 /* Configure bluetooth coexistence if needed. */
6866 if (sc->base_params->bt_mode == IWN_BT_ADVANCED)
6867 error = iwn_send_advanced_btcoex(sc);
6868 if (sc->base_params->bt_mode == IWN_BT_SIMPLE)
6869 error = iwn_send_btcoex(sc);
6872 device_printf(sc->sc_dev,
6873 "%s: could not configure bluetooth coexistence, error %d\n",
6878 /* Set mode, channel, RX filter and enable RX. */
6879 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX];
6880 memset(sc->rxon, 0, sizeof (struct iwn_rxon));
6881 macaddr = vap ? vap->iv_myaddr : ic->ic_macaddr;
6882 IEEE80211_ADDR_COPY(sc->rxon->myaddr, macaddr);
6883 IEEE80211_ADDR_COPY(sc->rxon->wlap, macaddr);
6884 sc->rxon->chan = ieee80211_chan2ieee(ic, ic->ic_curchan);
6885 sc->rxon->flags = htole32(IWN_RXON_TSF | IWN_RXON_CTS_TO_SELF);
6886 if (IEEE80211_IS_CHAN_2GHZ(ic->ic_curchan))
6887 sc->rxon->flags |= htole32(IWN_RXON_AUTO | IWN_RXON_24GHZ);
6889 sc->rxon->filter = htole32(IWN_FILTER_MULTICAST);
6890 switch (ic->ic_opmode) {
6891 case IEEE80211_M_STA:
6892 sc->rxon->mode = IWN_MODE_STA;
6894 case IEEE80211_M_MONITOR:
6895 sc->rxon->mode = IWN_MODE_MONITOR;
6898 /* Should not get there. */
6901 iwn_set_promisc(sc);
6902 sc->rxon->cck_mask = 0x0f; /* not yet negotiated */
6903 sc->rxon->ofdm_mask = 0xff; /* not yet negotiated */
6904 sc->rxon->ht_single_mask = 0xff;
6905 sc->rxon->ht_dual_mask = 0xff;
6906 sc->rxon->ht_triple_mask = 0xff;
6908 * In active association mode, ensure that
6909 * all the receive chains are enabled.
6911 * Since we're not yet doing SMPS, don't allow the
6912 * number of idle RX chains to be less than the active
6916 IWN_RXCHAIN_VALID(sc->rxchainmask) |
6917 IWN_RXCHAIN_MIMO_COUNT(sc->nrxchains) |
6918 IWN_RXCHAIN_IDLE_COUNT(sc->nrxchains);
6919 sc->rxon->rxchain = htole16(rxchain);
6920 DPRINTF(sc, IWN_DEBUG_RESET | IWN_DEBUG_XMIT,
6921 "%s: rxchainmask=0x%x, nrxchains=%d\n",
6926 sc->rxon->flags |= htole32(iwn_get_rxon_ht_flags(sc, ic->ic_curchan));
6928 DPRINTF(sc, IWN_DEBUG_RESET,
6929 "%s: setting configuration; flags=0x%08x\n",
6930 __func__, le32toh(sc->rxon->flags));
6931 if ((error = iwn_send_rxon(sc, 0, 0)) != 0) {
6932 device_printf(sc->sc_dev, "%s: could not send RXON\n",
6937 if ((error = iwn_set_critical_temp(sc)) != 0) {
6938 device_printf(sc->sc_dev,
6939 "%s: could not set critical temperature\n", __func__);
6943 /* Set power saving level to CAM during initialization. */
6944 if ((error = iwn_set_pslevel(sc, 0, 0, 0)) != 0) {
6945 device_printf(sc->sc_dev,
6946 "%s: could not set power saving level\n", __func__);
6950 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
6956 iwn_get_active_dwell_time(struct iwn_softc *sc,
6957 struct ieee80211_channel *c, uint8_t n_probes)
6959 /* No channel? Default to 2GHz settings */
6960 if (c == NULL || IEEE80211_IS_CHAN_2GHZ(c)) {
6961 return (IWN_ACTIVE_DWELL_TIME_2GHZ +
6962 IWN_ACTIVE_DWELL_FACTOR_2GHZ * (n_probes + 1));
6965 /* 5GHz dwell time */
6966 return (IWN_ACTIVE_DWELL_TIME_5GHZ +
6967 IWN_ACTIVE_DWELL_FACTOR_5GHZ * (n_probes + 1));
6971 * Limit the total dwell time to 85% of the beacon interval.
6973 * Returns the dwell time in milliseconds.
6976 iwn_limit_dwell(struct iwn_softc *sc, uint16_t dwell_time)
6978 struct ieee80211com *ic = &sc->sc_ic;
6979 struct ieee80211vap *vap = NULL;
6982 /* bintval is in TU (1.024mS) */
6983 if (! TAILQ_EMPTY(&ic->ic_vaps)) {
6984 vap = TAILQ_FIRST(&ic->ic_vaps);
6985 bintval = vap->iv_bss->ni_intval;
6989 * If it's non-zero, we should calculate the minimum of
6990 * it and the DWELL_BASE.
6992 * XXX Yes, the math should take into account that bintval
6993 * is 1.024mS, not 1mS..
6996 DPRINTF(sc, IWN_DEBUG_SCAN,
7000 return (MIN(IWN_PASSIVE_DWELL_BASE, ((bintval * 85) / 100)));
7003 /* No association context? Default */
7004 return (IWN_PASSIVE_DWELL_BASE);
7008 iwn_get_passive_dwell_time(struct iwn_softc *sc, struct ieee80211_channel *c)
7012 if (c == NULL || IEEE80211_IS_CHAN_2GHZ(c)) {
7013 passive = IWN_PASSIVE_DWELL_BASE + IWN_PASSIVE_DWELL_TIME_2GHZ;
7015 passive = IWN_PASSIVE_DWELL_BASE + IWN_PASSIVE_DWELL_TIME_5GHZ;
7018 /* Clamp to the beacon interval if we're associated */
7019 return (iwn_limit_dwell(sc, passive));
7023 iwn_scan(struct iwn_softc *sc, struct ieee80211vap *vap,
7024 struct ieee80211_scan_state *ss, struct ieee80211_channel *c)
7026 struct ieee80211com *ic = &sc->sc_ic;
7027 struct ieee80211_node *ni = vap->iv_bss;
7028 struct iwn_scan_hdr *hdr;
7029 struct iwn_cmd_data *tx;
7030 struct iwn_scan_essid *essid;
7031 struct iwn_scan_chan *chan;
7032 struct ieee80211_frame *wh;
7033 struct ieee80211_rateset *rs;
7039 uint16_t dwell_active, dwell_passive;
7040 uint32_t extra, scan_service_time;
7042 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
7045 * We are absolutely not allowed to send a scan command when another
7046 * scan command is pending.
7048 if (sc->sc_is_scanning) {
7049 device_printf(sc->sc_dev, "%s: called whilst scanning!\n",
7054 /* Assign the scan channel */
7057 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX];
7058 buf = malloc(IWN_SCAN_MAXSZ, M_DEVBUF, M_NOWAIT | M_ZERO);
7060 device_printf(sc->sc_dev,
7061 "%s: could not allocate buffer for scan command\n",
7065 hdr = (struct iwn_scan_hdr *)buf;
7067 * Move to the next channel if no frames are received within 10ms
7068 * after sending the probe request.
7070 hdr->quiet_time = htole16(10); /* timeout in milliseconds */
7071 hdr->quiet_threshold = htole16(1); /* min # of packets */
7073 * Max needs to be greater than active and passive and quiet!
7074 * It's also in microseconds!
7076 hdr->max_svc = htole32(250 * 1024);
7079 * Reset scan: interval=100
7080 * Normal scan: interval=becaon interval
7081 * suspend_time: 100 (TU)
7084 extra = (100 /* suspend_time */ / 100 /* beacon interval */) << 22;
7085 //scan_service_time = extra | ((100 /* susp */ % 100 /* int */) * 1024);
7086 scan_service_time = (4 << 22) | (100 * 1024); /* Hardcode for now! */
7087 hdr->pause_svc = htole32(scan_service_time);
7089 /* Select antennas for scanning. */
7091 IWN_RXCHAIN_VALID(sc->rxchainmask) |
7092 IWN_RXCHAIN_FORCE_MIMO_SEL(sc->rxchainmask) |
7093 IWN_RXCHAIN_DRIVER_FORCE;
7094 if (IEEE80211_IS_CHAN_A(c) &&
7095 sc->hw_type == IWN_HW_REV_TYPE_4965) {
7096 /* Ant A must be avoided in 5GHz because of an HW bug. */
7097 rxchain |= IWN_RXCHAIN_FORCE_SEL(IWN_ANT_B);
7098 } else /* Use all available RX antennas. */
7099 rxchain |= IWN_RXCHAIN_FORCE_SEL(sc->rxchainmask);
7100 hdr->rxchain = htole16(rxchain);
7101 hdr->filter = htole32(IWN_FILTER_MULTICAST | IWN_FILTER_BEACON);
7103 tx = (struct iwn_cmd_data *)(hdr + 1);
7104 tx->flags = htole32(IWN_TX_AUTO_SEQ);
7105 tx->id = sc->broadcast_id;
7106 tx->lifetime = htole32(IWN_LIFETIME_INFINITE);
7108 if (IEEE80211_IS_CHAN_5GHZ(c)) {
7109 /* Send probe requests at 6Mbps. */
7110 tx->rate = htole32(0xd);
7111 rs = &ic->ic_sup_rates[IEEE80211_MODE_11A];
7113 hdr->flags = htole32(IWN_RXON_24GHZ | IWN_RXON_AUTO);
7114 if (sc->hw_type == IWN_HW_REV_TYPE_4965 &&
7115 sc->rxon->associd && sc->rxon->chan > 14)
7116 tx->rate = htole32(0xd);
7118 /* Send probe requests at 1Mbps. */
7119 tx->rate = htole32(10 | IWN_RFLAG_CCK);
7121 rs = &ic->ic_sup_rates[IEEE80211_MODE_11G];
7123 /* Use the first valid TX antenna. */
7124 txant = IWN_LSB(sc->txchainmask);
7125 tx->rate |= htole32(IWN_RFLAG_ANT(txant));
7128 * Only do active scanning if we're announcing a probe request
7129 * for a given SSID (or more, if we ever add it to the driver.)
7134 * If we're scanning for a specific SSID, add it to the command.
7136 * XXX maybe look at adding support for scanning multiple SSIDs?
7138 essid = (struct iwn_scan_essid *)(tx + 1);
7140 if (ss->ss_ssid[0].len != 0) {
7141 essid[0].id = IEEE80211_ELEMID_SSID;
7142 essid[0].len = ss->ss_ssid[0].len;
7143 memcpy(essid[0].data, ss->ss_ssid[0].ssid, ss->ss_ssid[0].len);
7146 DPRINTF(sc, IWN_DEBUG_SCAN, "%s: ssid_len=%d, ssid=%*s\n",
7150 ss->ss_ssid[0].ssid);
7152 if (ss->ss_nssid > 0)
7157 * Build a probe request frame. Most of the following code is a
7158 * copy & paste of what is done in net80211.
7160 wh = (struct ieee80211_frame *)(essid + 20);
7161 wh->i_fc[0] = IEEE80211_FC0_VERSION_0 | IEEE80211_FC0_TYPE_MGT |
7162 IEEE80211_FC0_SUBTYPE_PROBE_REQ;
7163 wh->i_fc[1] = IEEE80211_FC1_DIR_NODS;
7164 IEEE80211_ADDR_COPY(wh->i_addr1, vap->iv_ifp->if_broadcastaddr);
7165 IEEE80211_ADDR_COPY(wh->i_addr2, IF_LLADDR(vap->iv_ifp));
7166 IEEE80211_ADDR_COPY(wh->i_addr3, vap->iv_ifp->if_broadcastaddr);
7167 *(uint16_t *)&wh->i_dur[0] = 0; /* filled by HW */
7168 *(uint16_t *)&wh->i_seq[0] = 0; /* filled by HW */
7170 frm = (uint8_t *)(wh + 1);
7171 frm = ieee80211_add_ssid(frm, NULL, 0);
7172 frm = ieee80211_add_rates(frm, rs);
7173 if (rs->rs_nrates > IEEE80211_RATE_SIZE)
7174 frm = ieee80211_add_xrates(frm, rs);
7175 if (ic->ic_htcaps & IEEE80211_HTC_HT)
7176 frm = ieee80211_add_htcap(frm, ni);
7178 /* Set length of probe request. */
7179 tx->len = htole16(frm - (uint8_t *)wh);
7182 * If active scanning is requested but a certain channel is
7183 * marked passive, we can do active scanning if we detect
7186 * There is an issue with some firmware versions that triggers
7187 * a sysassert on a "good CRC threshold" of zero (== disabled),
7188 * on a radar channel even though this means that we should NOT
7191 * The "good CRC threshold" is the number of frames that we
7192 * need to receive during our dwell time on a channel before
7193 * sending out probes -- setting this to a huge value will
7194 * mean we never reach it, but at the same time work around
7195 * the aforementioned issue. Thus use IWL_GOOD_CRC_TH_NEVER
7196 * here instead of IWL_GOOD_CRC_TH_DISABLED.
7198 * This was fixed in later versions along with some other
7199 * scan changes, and the threshold behaves as a flag in those
7204 * If we're doing active scanning, set the crc_threshold
7205 * to a suitable value. This is different to active veruss
7206 * passive scanning depending upon the channel flags; the
7207 * firmware will obey that particular check for us.
7209 if (sc->tlv_feature_flags & IWN_UCODE_TLV_FLAGS_NEWSCAN)
7210 hdr->crc_threshold = is_active ?
7211 IWN_GOOD_CRC_TH_DEFAULT : IWN_GOOD_CRC_TH_DISABLED;
7213 hdr->crc_threshold = is_active ?
7214 IWN_GOOD_CRC_TH_DEFAULT : IWN_GOOD_CRC_TH_NEVER;
7216 chan = (struct iwn_scan_chan *)frm;
7217 chan->chan = htole16(ieee80211_chan2ieee(ic, c));
7219 if (ss->ss_nssid > 0)
7220 chan->flags |= htole32(IWN_CHAN_NPBREQS(1));
7221 chan->dsp_gain = 0x6e;
7224 * Set the passive/active flag depending upon the channel mode.
7225 * XXX TODO: take the is_active flag into account as well?
7227 if (c->ic_flags & IEEE80211_CHAN_PASSIVE)
7228 chan->flags |= htole32(IWN_CHAN_PASSIVE);
7230 chan->flags |= htole32(IWN_CHAN_ACTIVE);
7233 * Calculate the active/passive dwell times.
7236 dwell_active = iwn_get_active_dwell_time(sc, c, ss->ss_nssid);
7237 dwell_passive = iwn_get_passive_dwell_time(sc, c);
7239 /* Make sure they're valid */
7240 if (dwell_passive <= dwell_active)
7241 dwell_passive = dwell_active + 1;
7243 chan->active = htole16(dwell_active);
7244 chan->passive = htole16(dwell_passive);
7246 if (IEEE80211_IS_CHAN_5GHZ(c))
7247 chan->rf_gain = 0x3b;
7249 chan->rf_gain = 0x28;
7251 DPRINTF(sc, IWN_DEBUG_STATE,
7252 "%s: chan %u flags 0x%x rf_gain 0x%x "
7253 "dsp_gain 0x%x active %d passive %d scan_svc_time %d crc 0x%x "
7254 "isactive=%d numssid=%d\n", __func__,
7255 chan->chan, chan->flags, chan->rf_gain, chan->dsp_gain,
7256 dwell_active, dwell_passive, scan_service_time,
7257 hdr->crc_threshold, is_active, ss->ss_nssid);
7261 buflen = (uint8_t *)chan - buf;
7262 hdr->len = htole16(buflen);
7264 if (sc->sc_is_scanning) {
7265 device_printf(sc->sc_dev,
7266 "%s: called with is_scanning set!\n",
7269 sc->sc_is_scanning = 1;
7271 DPRINTF(sc, IWN_DEBUG_STATE, "sending scan command nchan=%d\n",
7273 error = iwn_cmd(sc, IWN_CMD_SCAN, buf, buflen, 1);
7274 free(buf, M_DEVBUF);
7276 callout_reset(&sc->scan_timeout, 5*hz, iwn_scan_timeout, sc);
7278 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
7284 iwn_auth(struct iwn_softc *sc, struct ieee80211vap *vap)
7286 struct ieee80211com *ic = &sc->sc_ic;
7287 struct ieee80211_node *ni = vap->iv_bss;
7290 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
7292 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX];
7293 /* Update adapter configuration. */
7294 IEEE80211_ADDR_COPY(sc->rxon->bssid, ni->ni_bssid);
7295 sc->rxon->chan = ieee80211_chan2ieee(ic, ni->ni_chan);
7296 sc->rxon->flags = htole32(IWN_RXON_TSF | IWN_RXON_CTS_TO_SELF);
7297 if (IEEE80211_IS_CHAN_2GHZ(ni->ni_chan))
7298 sc->rxon->flags |= htole32(IWN_RXON_AUTO | IWN_RXON_24GHZ);
7299 if (ic->ic_flags & IEEE80211_F_SHSLOT)
7300 sc->rxon->flags |= htole32(IWN_RXON_SHSLOT);
7301 if (ic->ic_flags & IEEE80211_F_SHPREAMBLE)
7302 sc->rxon->flags |= htole32(IWN_RXON_SHPREAMBLE);
7303 if (IEEE80211_IS_CHAN_A(ni->ni_chan)) {
7304 sc->rxon->cck_mask = 0;
7305 sc->rxon->ofdm_mask = 0x15;
7306 } else if (IEEE80211_IS_CHAN_B(ni->ni_chan)) {
7307 sc->rxon->cck_mask = 0x03;
7308 sc->rxon->ofdm_mask = 0;
7310 /* Assume 802.11b/g. */
7311 sc->rxon->cck_mask = 0x03;
7312 sc->rxon->ofdm_mask = 0x15;
7316 sc->rxon->flags |= htole32(iwn_get_rxon_ht_flags(sc, ic->ic_curchan));
7318 DPRINTF(sc, IWN_DEBUG_STATE, "rxon chan %d flags %x cck %x ofdm %x\n",
7319 sc->rxon->chan, sc->rxon->flags, sc->rxon->cck_mask,
7320 sc->rxon->ofdm_mask);
7322 if ((error = iwn_send_rxon(sc, 0, 1)) != 0) {
7323 device_printf(sc->sc_dev, "%s: could not send RXON\n",
7328 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
7334 iwn_run(struct iwn_softc *sc, struct ieee80211vap *vap)
7336 struct iwn_ops *ops = &sc->ops;
7337 struct ieee80211com *ic = &sc->sc_ic;
7338 struct ieee80211_node *ni = vap->iv_bss;
7339 struct iwn_node_info node;
7342 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
7344 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX];
7345 if (ic->ic_opmode == IEEE80211_M_MONITOR) {
7346 /* Link LED blinks while monitoring. */
7347 iwn_set_led(sc, IWN_LED_LINK, 5, 5);
7350 if ((error = iwn_set_timing(sc, ni)) != 0) {
7351 device_printf(sc->sc_dev,
7352 "%s: could not set timing, error %d\n", __func__, error);
7356 /* Update adapter configuration. */
7357 IEEE80211_ADDR_COPY(sc->rxon->bssid, ni->ni_bssid);
7358 sc->rxon->associd = htole16(IEEE80211_AID(ni->ni_associd));
7359 sc->rxon->chan = ieee80211_chan2ieee(ic, ni->ni_chan);
7360 sc->rxon->flags = htole32(IWN_RXON_TSF | IWN_RXON_CTS_TO_SELF);
7361 if (IEEE80211_IS_CHAN_2GHZ(ni->ni_chan))
7362 sc->rxon->flags |= htole32(IWN_RXON_AUTO | IWN_RXON_24GHZ);
7363 if (ic->ic_flags & IEEE80211_F_SHSLOT)
7364 sc->rxon->flags |= htole32(IWN_RXON_SHSLOT);
7365 if (ic->ic_flags & IEEE80211_F_SHPREAMBLE)
7366 sc->rxon->flags |= htole32(IWN_RXON_SHPREAMBLE);
7367 if (IEEE80211_IS_CHAN_A(ni->ni_chan)) {
7368 sc->rxon->cck_mask = 0;
7369 sc->rxon->ofdm_mask = 0x15;
7370 } else if (IEEE80211_IS_CHAN_B(ni->ni_chan)) {
7371 sc->rxon->cck_mask = 0x03;
7372 sc->rxon->ofdm_mask = 0;
7374 /* Assume 802.11b/g. */
7375 sc->rxon->cck_mask = 0x0f;
7376 sc->rxon->ofdm_mask = 0x15;
7379 sc->rxon->flags |= htole32(iwn_get_rxon_ht_flags(sc, ni->ni_chan));
7380 sc->rxon->filter |= htole32(IWN_FILTER_BSS);
7381 DPRINTF(sc, IWN_DEBUG_STATE, "rxon chan %d flags %x, curhtprotmode=%d\n",
7382 sc->rxon->chan, le32toh(sc->rxon->flags), ic->ic_curhtprotmode);
7384 if ((error = iwn_send_rxon(sc, 0, 1)) != 0) {
7385 device_printf(sc->sc_dev, "%s: could not send RXON\n",
7390 /* Fake a join to initialize the TX rate. */
7391 ((struct iwn_node *)ni)->id = IWN_ID_BSS;
7392 iwn_newassoc(ni, 1);
7395 memset(&node, 0, sizeof node);
7396 IEEE80211_ADDR_COPY(node.macaddr, ni->ni_macaddr);
7397 node.id = IWN_ID_BSS;
7398 if (IEEE80211_IS_CHAN_HT(ni->ni_chan)) {
7399 switch (ni->ni_htcap & IEEE80211_HTCAP_SMPS) {
7400 case IEEE80211_HTCAP_SMPS_ENA:
7401 node.htflags |= htole32(IWN_SMPS_MIMO_DIS);
7403 case IEEE80211_HTCAP_SMPS_DYNAMIC:
7404 node.htflags |= htole32(IWN_SMPS_MIMO_PROT);
7407 node.htflags |= htole32(IWN_AMDPU_SIZE_FACTOR(3) |
7408 IWN_AMDPU_DENSITY(5)); /* 4us */
7409 if (IEEE80211_IS_CHAN_HT40(ni->ni_chan))
7410 node.htflags |= htole32(IWN_NODE_HT40);
7412 DPRINTF(sc, IWN_DEBUG_STATE, "%s: adding BSS node\n", __func__);
7413 error = ops->add_node(sc, &node, 1);
7415 device_printf(sc->sc_dev,
7416 "%s: could not add BSS node, error %d\n", __func__, error);
7419 DPRINTF(sc, IWN_DEBUG_STATE, "%s: setting link quality for node %d\n",
7421 if ((error = iwn_set_link_quality(sc, ni)) != 0) {
7422 device_printf(sc->sc_dev,
7423 "%s: could not setup link quality for node %d, error %d\n",
7424 __func__, node.id, error);
7428 if ((error = iwn_init_sensitivity(sc)) != 0) {
7429 device_printf(sc->sc_dev,
7430 "%s: could not set sensitivity, error %d\n", __func__,
7434 /* Start periodic calibration timer. */
7435 sc->calib.state = IWN_CALIB_STATE_ASSOC;
7437 callout_reset(&sc->calib_to, msecs_to_ticks(500), iwn_calib_timeout,
7440 /* Link LED always on while associated. */
7441 iwn_set_led(sc, IWN_LED_LINK, 0, 1);
7443 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
7449 * This function is called by upper layer when an ADDBA request is received
7450 * from another STA and before the ADDBA response is sent.
7453 iwn_ampdu_rx_start(struct ieee80211_node *ni, struct ieee80211_rx_ampdu *rap,
7454 int baparamset, int batimeout, int baseqctl)
7456 #define MS(_v, _f) (((_v) & _f) >> _f##_S)
7457 struct iwn_softc *sc = ni->ni_ic->ic_softc;
7458 struct iwn_ops *ops = &sc->ops;
7459 struct iwn_node *wn = (void *)ni;
7460 struct iwn_node_info node;
7465 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7467 tid = MS(le16toh(baparamset), IEEE80211_BAPS_TID);
7468 ssn = MS(le16toh(baseqctl), IEEE80211_BASEQ_START);
7470 if (wn->id == IWN_ID_UNDEFINED)
7473 memset(&node, 0, sizeof node);
7475 node.control = IWN_NODE_UPDATE;
7476 node.flags = IWN_FLAG_SET_ADDBA;
7477 node.addba_tid = tid;
7478 node.addba_ssn = htole16(ssn);
7479 DPRINTF(sc, IWN_DEBUG_RECV, "ADDBA RA=%d TID=%d SSN=%d\n",
7481 error = ops->add_node(sc, &node, 1);
7484 return sc->sc_ampdu_rx_start(ni, rap, baparamset, batimeout, baseqctl);
7489 * This function is called by upper layer on teardown of an HT-immediate
7490 * Block Ack agreement (eg. uppon receipt of a DELBA frame).
7493 iwn_ampdu_rx_stop(struct ieee80211_node *ni, struct ieee80211_rx_ampdu *rap)
7495 struct ieee80211com *ic = ni->ni_ic;
7496 struct iwn_softc *sc = ic->ic_softc;
7497 struct iwn_ops *ops = &sc->ops;
7498 struct iwn_node *wn = (void *)ni;
7499 struct iwn_node_info node;
7502 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7504 if (wn->id == IWN_ID_UNDEFINED)
7507 /* XXX: tid as an argument */
7508 for (tid = 0; tid < WME_NUM_TID; tid++) {
7509 if (&ni->ni_rx_ampdu[tid] == rap)
7513 memset(&node, 0, sizeof node);
7515 node.control = IWN_NODE_UPDATE;
7516 node.flags = IWN_FLAG_SET_DELBA;
7517 node.delba_tid = tid;
7518 DPRINTF(sc, IWN_DEBUG_RECV, "DELBA RA=%d TID=%d\n", wn->id, tid);
7519 (void)ops->add_node(sc, &node, 1);
7521 sc->sc_ampdu_rx_stop(ni, rap);
7525 iwn_addba_request(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap,
7526 int dialogtoken, int baparamset, int batimeout)
7528 struct iwn_softc *sc = ni->ni_ic->ic_softc;
7531 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7533 for (qid = sc->firstaggqueue; qid < sc->ntxqs; qid++) {
7534 if (sc->qid2tap[qid] == NULL)
7537 if (qid == sc->ntxqs) {
7538 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: not free aggregation queue\n",
7542 tap->txa_private = malloc(sizeof(int), M_DEVBUF, M_NOWAIT);
7543 if (tap->txa_private == NULL) {
7544 device_printf(sc->sc_dev,
7545 "%s: failed to alloc TX aggregation structure\n", __func__);
7548 sc->qid2tap[qid] = tap;
7549 *(int *)tap->txa_private = qid;
7550 return sc->sc_addba_request(ni, tap, dialogtoken, baparamset,
7555 iwn_addba_response(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap,
7556 int code, int baparamset, int batimeout)
7558 struct iwn_softc *sc = ni->ni_ic->ic_softc;
7559 int qid = *(int *)tap->txa_private;
7560 uint8_t tid = tap->txa_tid;
7563 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7565 if (code == IEEE80211_STATUS_SUCCESS) {
7566 ni->ni_txseqs[tid] = tap->txa_start & 0xfff;
7567 ret = iwn_ampdu_tx_start(ni->ni_ic, ni, tid);
7571 sc->qid2tap[qid] = NULL;
7572 free(tap->txa_private, M_DEVBUF);
7573 tap->txa_private = NULL;
7575 return sc->sc_addba_response(ni, tap, code, baparamset, batimeout);
7579 * This function is called by upper layer when an ADDBA response is received
7583 iwn_ampdu_tx_start(struct ieee80211com *ic, struct ieee80211_node *ni,
7586 struct ieee80211_tx_ampdu *tap = &ni->ni_tx_ampdu[tid];
7587 struct iwn_softc *sc = ni->ni_ic->ic_softc;
7588 struct iwn_ops *ops = &sc->ops;
7589 struct iwn_node *wn = (void *)ni;
7590 struct iwn_node_info node;
7593 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7595 if (wn->id == IWN_ID_UNDEFINED)
7598 /* Enable TX for the specified RA/TID. */
7599 wn->disable_tid &= ~(1 << tid);
7600 memset(&node, 0, sizeof node);
7602 node.control = IWN_NODE_UPDATE;
7603 node.flags = IWN_FLAG_SET_DISABLE_TID;
7604 node.disable_tid = htole16(wn->disable_tid);
7605 error = ops->add_node(sc, &node, 1);
7609 if ((error = iwn_nic_lock(sc)) != 0)
7611 qid = *(int *)tap->txa_private;
7612 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: ra=%d tid=%d ssn=%d qid=%d\n",
7613 __func__, wn->id, tid, tap->txa_start, qid);
7614 ops->ampdu_tx_start(sc, ni, qid, tid, tap->txa_start & 0xfff);
7617 iwn_set_link_quality(sc, ni);
7622 iwn_ampdu_tx_stop(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap)
7624 struct iwn_softc *sc = ni->ni_ic->ic_softc;
7625 struct iwn_ops *ops = &sc->ops;
7626 uint8_t tid = tap->txa_tid;
7629 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7631 sc->sc_addba_stop(ni, tap);
7633 if (tap->txa_private == NULL)
7636 qid = *(int *)tap->txa_private;
7637 if (sc->txq[qid].queued != 0)
7639 if (iwn_nic_lock(sc) != 0)
7641 ops->ampdu_tx_stop(sc, qid, tid, tap->txa_start & 0xfff);
7643 sc->qid2tap[qid] = NULL;
7644 free(tap->txa_private, M_DEVBUF);
7645 tap->txa_private = NULL;
7649 iwn4965_ampdu_tx_start(struct iwn_softc *sc, struct ieee80211_node *ni,
7650 int qid, uint8_t tid, uint16_t ssn)
7652 struct iwn_node *wn = (void *)ni;
7654 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7656 /* Stop TX scheduler while we're changing its configuration. */
7657 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid),
7658 IWN4965_TXQ_STATUS_CHGACT);
7660 /* Assign RA/TID translation to the queue. */
7661 iwn_mem_write_2(sc, sc->sched_base + IWN4965_SCHED_TRANS_TBL(qid),
7664 /* Enable chain-building mode for the queue. */
7665 iwn_prph_setbits(sc, IWN4965_SCHED_QCHAIN_SEL, 1 << qid);
7667 /* Set starting sequence number from the ADDBA request. */
7668 sc->txq[qid].cur = sc->txq[qid].read = (ssn & 0xff);
7669 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | (ssn & 0xff));
7670 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_RDPTR(qid), ssn);
7672 /* Set scheduler window size. */
7673 iwn_mem_write(sc, sc->sched_base + IWN4965_SCHED_QUEUE_OFFSET(qid),
7675 /* Set scheduler frame limit. */
7676 iwn_mem_write(sc, sc->sched_base + IWN4965_SCHED_QUEUE_OFFSET(qid) + 4,
7677 IWN_SCHED_LIMIT << 16);
7679 /* Enable interrupts for the queue. */
7680 iwn_prph_setbits(sc, IWN4965_SCHED_INTR_MASK, 1 << qid);
7682 /* Mark the queue as active. */
7683 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid),
7684 IWN4965_TXQ_STATUS_ACTIVE | IWN4965_TXQ_STATUS_AGGR_ENA |
7685 iwn_tid2fifo[tid] << 1);
7689 iwn4965_ampdu_tx_stop(struct iwn_softc *sc, int qid, uint8_t tid, uint16_t ssn)
7691 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7693 /* Stop TX scheduler while we're changing its configuration. */
7694 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid),
7695 IWN4965_TXQ_STATUS_CHGACT);
7697 /* Set starting sequence number from the ADDBA request. */
7698 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | (ssn & 0xff));
7699 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_RDPTR(qid), ssn);
7701 /* Disable interrupts for the queue. */
7702 iwn_prph_clrbits(sc, IWN4965_SCHED_INTR_MASK, 1 << qid);
7704 /* Mark the queue as inactive. */
7705 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid),
7706 IWN4965_TXQ_STATUS_INACTIVE | iwn_tid2fifo[tid] << 1);
7710 iwn5000_ampdu_tx_start(struct iwn_softc *sc, struct ieee80211_node *ni,
7711 int qid, uint8_t tid, uint16_t ssn)
7713 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7715 struct iwn_node *wn = (void *)ni;
7717 /* Stop TX scheduler while we're changing its configuration. */
7718 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
7719 IWN5000_TXQ_STATUS_CHGACT);
7721 /* Assign RA/TID translation to the queue. */
7722 iwn_mem_write_2(sc, sc->sched_base + IWN5000_SCHED_TRANS_TBL(qid),
7725 /* Enable chain-building mode for the queue. */
7726 iwn_prph_setbits(sc, IWN5000_SCHED_QCHAIN_SEL, 1 << qid);
7728 /* Enable aggregation for the queue. */
7729 iwn_prph_setbits(sc, IWN5000_SCHED_AGGR_SEL, 1 << qid);
7731 /* Set starting sequence number from the ADDBA request. */
7732 sc->txq[qid].cur = sc->txq[qid].read = (ssn & 0xff);
7733 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | (ssn & 0xff));
7734 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_RDPTR(qid), ssn);
7736 /* Set scheduler window size and frame limit. */
7737 iwn_mem_write(sc, sc->sched_base + IWN5000_SCHED_QUEUE_OFFSET(qid) + 4,
7738 IWN_SCHED_LIMIT << 16 | IWN_SCHED_WINSZ);
7740 /* Enable interrupts for the queue. */
7741 iwn_prph_setbits(sc, IWN5000_SCHED_INTR_MASK, 1 << qid);
7743 /* Mark the queue as active. */
7744 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
7745 IWN5000_TXQ_STATUS_ACTIVE | iwn_tid2fifo[tid]);
7749 iwn5000_ampdu_tx_stop(struct iwn_softc *sc, int qid, uint8_t tid, uint16_t ssn)
7751 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7753 /* Stop TX scheduler while we're changing its configuration. */
7754 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
7755 IWN5000_TXQ_STATUS_CHGACT);
7757 /* Disable aggregation for the queue. */
7758 iwn_prph_clrbits(sc, IWN5000_SCHED_AGGR_SEL, 1 << qid);
7760 /* Set starting sequence number from the ADDBA request. */
7761 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | (ssn & 0xff));
7762 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_RDPTR(qid), ssn);
7764 /* Disable interrupts for the queue. */
7765 iwn_prph_clrbits(sc, IWN5000_SCHED_INTR_MASK, 1 << qid);
7767 /* Mark the queue as inactive. */
7768 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
7769 IWN5000_TXQ_STATUS_INACTIVE | iwn_tid2fifo[tid]);
7773 * Query calibration tables from the initialization firmware. We do this
7774 * only once at first boot. Called from a process context.
7777 iwn5000_query_calibration(struct iwn_softc *sc)
7779 struct iwn5000_calib_config cmd;
7782 memset(&cmd, 0, sizeof cmd);
7783 cmd.ucode.once.enable = htole32(0xffffffff);
7784 cmd.ucode.once.start = htole32(0xffffffff);
7785 cmd.ucode.once.send = htole32(0xffffffff);
7786 cmd.ucode.flags = htole32(0xffffffff);
7787 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: sending calibration query\n",
7789 error = iwn_cmd(sc, IWN5000_CMD_CALIB_CONFIG, &cmd, sizeof cmd, 0);
7793 /* Wait at most two seconds for calibration to complete. */
7794 if (!(sc->sc_flags & IWN_FLAG_CALIB_DONE))
7795 error = msleep(sc, &sc->sc_mtx, PCATCH, "iwncal", 2 * hz);
7800 * Send calibration results to the runtime firmware. These results were
7801 * obtained on first boot from the initialization firmware.
7804 iwn5000_send_calibration(struct iwn_softc *sc)
7808 for (idx = 0; idx < IWN5000_PHY_CALIB_MAX_RESULT; idx++) {
7809 if (!(sc->base_params->calib_need & (1<<idx))) {
7810 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
7811 "No need of calib %d\n",
7813 continue; /* no need for this calib */
7815 if (sc->calibcmd[idx].buf == NULL) {
7816 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
7817 "Need calib idx : %d but no available data\n",
7822 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
7823 "send calibration result idx=%d len=%d\n", idx,
7824 sc->calibcmd[idx].len);
7825 error = iwn_cmd(sc, IWN_CMD_PHY_CALIB, sc->calibcmd[idx].buf,
7826 sc->calibcmd[idx].len, 0);
7828 device_printf(sc->sc_dev,
7829 "%s: could not send calibration result, error %d\n",
7838 iwn5000_send_wimax_coex(struct iwn_softc *sc)
7840 struct iwn5000_wimax_coex wimax;
7843 if (sc->hw_type == IWN_HW_REV_TYPE_6050) {
7844 /* Enable WiMAX coexistence for combo adapters. */
7846 IWN_WIMAX_COEX_ASSOC_WA_UNMASK |
7847 IWN_WIMAX_COEX_UNASSOC_WA_UNMASK |
7848 IWN_WIMAX_COEX_STA_TABLE_VALID |
7849 IWN_WIMAX_COEX_ENABLE;
7850 memcpy(wimax.events, iwn6050_wimax_events,
7851 sizeof iwn6050_wimax_events);
7855 /* Disable WiMAX coexistence. */
7857 memset(wimax.events, 0, sizeof wimax.events);
7859 DPRINTF(sc, IWN_DEBUG_RESET, "%s: Configuring WiMAX coexistence\n",
7861 return iwn_cmd(sc, IWN5000_CMD_WIMAX_COEX, &wimax, sizeof wimax, 0);
7865 iwn5000_crystal_calib(struct iwn_softc *sc)
7867 struct iwn5000_phy_calib_crystal cmd;
7869 memset(&cmd, 0, sizeof cmd);
7870 cmd.code = IWN5000_PHY_CALIB_CRYSTAL;
7873 cmd.cap_pin[0] = le32toh(sc->eeprom_crystal) & 0xff;
7874 cmd.cap_pin[1] = (le32toh(sc->eeprom_crystal) >> 16) & 0xff;
7875 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "sending crystal calibration %d, %d\n",
7876 cmd.cap_pin[0], cmd.cap_pin[1]);
7877 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 0);
7881 iwn5000_temp_offset_calib(struct iwn_softc *sc)
7883 struct iwn5000_phy_calib_temp_offset cmd;
7885 memset(&cmd, 0, sizeof cmd);
7886 cmd.code = IWN5000_PHY_CALIB_TEMP_OFFSET;
7889 if (sc->eeprom_temp != 0)
7890 cmd.offset = htole16(sc->eeprom_temp);
7892 cmd.offset = htole16(IWN_DEFAULT_TEMP_OFFSET);
7893 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "setting radio sensor offset to %d\n",
7894 le16toh(cmd.offset));
7895 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 0);
7899 iwn5000_temp_offset_calibv2(struct iwn_softc *sc)
7901 struct iwn5000_phy_calib_temp_offsetv2 cmd;
7903 memset(&cmd, 0, sizeof cmd);
7904 cmd.code = IWN5000_PHY_CALIB_TEMP_OFFSET;
7907 if (sc->eeprom_temp != 0) {
7908 cmd.offset_low = htole16(sc->eeprom_temp);
7909 cmd.offset_high = htole16(sc->eeprom_temp_high);
7911 cmd.offset_low = htole16(IWN_DEFAULT_TEMP_OFFSET);
7912 cmd.offset_high = htole16(IWN_DEFAULT_TEMP_OFFSET);
7914 cmd.burnt_voltage_ref = htole16(sc->eeprom_voltage);
7916 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
7917 "setting radio sensor low offset to %d, high offset to %d, voltage to %d\n",
7918 le16toh(cmd.offset_low),
7919 le16toh(cmd.offset_high),
7920 le16toh(cmd.burnt_voltage_ref));
7922 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 0);
7926 * This function is called after the runtime firmware notifies us of its
7927 * readiness (called in a process context).
7930 iwn4965_post_alive(struct iwn_softc *sc)
7934 if ((error = iwn_nic_lock(sc)) != 0)
7937 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7939 /* Clear TX scheduler state in SRAM. */
7940 sc->sched_base = iwn_prph_read(sc, IWN_SCHED_SRAM_ADDR);
7941 iwn_mem_set_region_4(sc, sc->sched_base + IWN4965_SCHED_CTX_OFF, 0,
7942 IWN4965_SCHED_CTX_LEN / sizeof (uint32_t));
7944 /* Set physical address of TX scheduler rings (1KB aligned). */
7945 iwn_prph_write(sc, IWN4965_SCHED_DRAM_ADDR, sc->sched_dma.paddr >> 10);
7947 IWN_SETBITS(sc, IWN_FH_TX_CHICKEN, IWN_FH_TX_CHICKEN_SCHED_RETRY);
7949 /* Disable chain mode for all our 16 queues. */
7950 iwn_prph_write(sc, IWN4965_SCHED_QCHAIN_SEL, 0);
7952 for (qid = 0; qid < IWN4965_NTXQUEUES; qid++) {
7953 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_RDPTR(qid), 0);
7954 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | 0);
7956 /* Set scheduler window size. */
7957 iwn_mem_write(sc, sc->sched_base +
7958 IWN4965_SCHED_QUEUE_OFFSET(qid), IWN_SCHED_WINSZ);
7959 /* Set scheduler frame limit. */
7960 iwn_mem_write(sc, sc->sched_base +
7961 IWN4965_SCHED_QUEUE_OFFSET(qid) + 4,
7962 IWN_SCHED_LIMIT << 16);
7965 /* Enable interrupts for all our 16 queues. */
7966 iwn_prph_write(sc, IWN4965_SCHED_INTR_MASK, 0xffff);
7967 /* Identify TX FIFO rings (0-7). */
7968 iwn_prph_write(sc, IWN4965_SCHED_TXFACT, 0xff);
7970 /* Mark TX rings (4 EDCA + cmd + 2 HCCA) as active. */
7971 for (qid = 0; qid < 7; qid++) {
7972 static uint8_t qid2fifo[] = { 3, 2, 1, 0, 4, 5, 6 };
7973 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid),
7974 IWN4965_TXQ_STATUS_ACTIVE | qid2fifo[qid] << 1);
7981 * This function is called after the initialization or runtime firmware
7982 * notifies us of its readiness (called in a process context).
7985 iwn5000_post_alive(struct iwn_softc *sc)
7989 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
7991 /* Switch to using ICT interrupt mode. */
7992 iwn5000_ict_reset(sc);
7994 if ((error = iwn_nic_lock(sc)) != 0){
7995 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end in error\n", __func__);
7999 /* Clear TX scheduler state in SRAM. */
8000 sc->sched_base = iwn_prph_read(sc, IWN_SCHED_SRAM_ADDR);
8001 iwn_mem_set_region_4(sc, sc->sched_base + IWN5000_SCHED_CTX_OFF, 0,
8002 IWN5000_SCHED_CTX_LEN / sizeof (uint32_t));
8004 /* Set physical address of TX scheduler rings (1KB aligned). */
8005 iwn_prph_write(sc, IWN5000_SCHED_DRAM_ADDR, sc->sched_dma.paddr >> 10);
8007 IWN_SETBITS(sc, IWN_FH_TX_CHICKEN, IWN_FH_TX_CHICKEN_SCHED_RETRY);
8009 /* Enable chain mode for all queues, except command queue. */
8010 if (sc->sc_flags & IWN_FLAG_PAN_SUPPORT)
8011 iwn_prph_write(sc, IWN5000_SCHED_QCHAIN_SEL, 0xfffdf);
8013 iwn_prph_write(sc, IWN5000_SCHED_QCHAIN_SEL, 0xfffef);
8014 iwn_prph_write(sc, IWN5000_SCHED_AGGR_SEL, 0);
8016 for (qid = 0; qid < IWN5000_NTXQUEUES; qid++) {
8017 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_RDPTR(qid), 0);
8018 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | 0);
8020 iwn_mem_write(sc, sc->sched_base +
8021 IWN5000_SCHED_QUEUE_OFFSET(qid), 0);
8022 /* Set scheduler window size and frame limit. */
8023 iwn_mem_write(sc, sc->sched_base +
8024 IWN5000_SCHED_QUEUE_OFFSET(qid) + 4,
8025 IWN_SCHED_LIMIT << 16 | IWN_SCHED_WINSZ);
8028 /* Enable interrupts for all our 20 queues. */
8029 iwn_prph_write(sc, IWN5000_SCHED_INTR_MASK, 0xfffff);
8030 /* Identify TX FIFO rings (0-7). */
8031 iwn_prph_write(sc, IWN5000_SCHED_TXFACT, 0xff);
8033 /* Mark TX rings (4 EDCA + cmd + 2 HCCA) as active. */
8034 if (sc->sc_flags & IWN_FLAG_PAN_SUPPORT) {
8035 /* Mark TX rings as active. */
8036 for (qid = 0; qid < 11; qid++) {
8037 static uint8_t qid2fifo[] = { 3, 2, 1, 0, 0, 4, 2, 5, 4, 7, 5 };
8038 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
8039 IWN5000_TXQ_STATUS_ACTIVE | qid2fifo[qid]);
8042 /* Mark TX rings (4 EDCA + cmd + 2 HCCA) as active. */
8043 for (qid = 0; qid < 7; qid++) {
8044 static uint8_t qid2fifo[] = { 3, 2, 1, 0, 7, 5, 6 };
8045 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
8046 IWN5000_TXQ_STATUS_ACTIVE | qid2fifo[qid]);
8051 /* Configure WiMAX coexistence for combo adapters. */
8052 error = iwn5000_send_wimax_coex(sc);
8054 device_printf(sc->sc_dev,
8055 "%s: could not configure WiMAX coexistence, error %d\n",
8059 if (sc->hw_type != IWN_HW_REV_TYPE_5150) {
8060 /* Perform crystal calibration. */
8061 error = iwn5000_crystal_calib(sc);
8063 device_printf(sc->sc_dev,
8064 "%s: crystal calibration failed, error %d\n",
8069 if (!(sc->sc_flags & IWN_FLAG_CALIB_DONE)) {
8070 /* Query calibration from the initialization firmware. */
8071 if ((error = iwn5000_query_calibration(sc)) != 0) {
8072 device_printf(sc->sc_dev,
8073 "%s: could not query calibration, error %d\n",
8078 * We have the calibration results now, reboot with the
8079 * runtime firmware (call ourselves recursively!)
8082 error = iwn_hw_init(sc);
8084 /* Send calibration results to runtime firmware. */
8085 error = iwn5000_send_calibration(sc);
8088 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
8094 * The firmware boot code is small and is intended to be copied directly into
8095 * the NIC internal memory (no DMA transfer).
8098 iwn4965_load_bootcode(struct iwn_softc *sc, const uint8_t *ucode, int size)
8102 size /= sizeof (uint32_t);
8104 if ((error = iwn_nic_lock(sc)) != 0)
8107 /* Copy microcode image into NIC memory. */
8108 iwn_prph_write_region_4(sc, IWN_BSM_SRAM_BASE,
8109 (const uint32_t *)ucode, size);
8111 iwn_prph_write(sc, IWN_BSM_WR_MEM_SRC, 0);
8112 iwn_prph_write(sc, IWN_BSM_WR_MEM_DST, IWN_FW_TEXT_BASE);
8113 iwn_prph_write(sc, IWN_BSM_WR_DWCOUNT, size);
8115 /* Start boot load now. */
8116 iwn_prph_write(sc, IWN_BSM_WR_CTRL, IWN_BSM_WR_CTRL_START);
8118 /* Wait for transfer to complete. */
8119 for (ntries = 0; ntries < 1000; ntries++) {
8120 if (!(iwn_prph_read(sc, IWN_BSM_WR_CTRL) &
8121 IWN_BSM_WR_CTRL_START))
8125 if (ntries == 1000) {
8126 device_printf(sc->sc_dev, "%s: could not load boot firmware\n",
8132 /* Enable boot after power up. */
8133 iwn_prph_write(sc, IWN_BSM_WR_CTRL, IWN_BSM_WR_CTRL_START_EN);
8140 iwn4965_load_firmware(struct iwn_softc *sc)
8142 struct iwn_fw_info *fw = &sc->fw;
8143 struct iwn_dma_info *dma = &sc->fw_dma;
8146 /* Copy initialization sections into pre-allocated DMA-safe memory. */
8147 memcpy(dma->vaddr, fw->init.data, fw->init.datasz);
8148 bus_dmamap_sync(dma->tag, dma->map, BUS_DMASYNC_PREWRITE);
8149 memcpy(dma->vaddr + IWN4965_FW_DATA_MAXSZ,
8150 fw->init.text, fw->init.textsz);
8151 bus_dmamap_sync(dma->tag, dma->map, BUS_DMASYNC_PREWRITE);
8153 /* Tell adapter where to find initialization sections. */
8154 if ((error = iwn_nic_lock(sc)) != 0)
8156 iwn_prph_write(sc, IWN_BSM_DRAM_DATA_ADDR, dma->paddr >> 4);
8157 iwn_prph_write(sc, IWN_BSM_DRAM_DATA_SIZE, fw->init.datasz);
8158 iwn_prph_write(sc, IWN_BSM_DRAM_TEXT_ADDR,
8159 (dma->paddr + IWN4965_FW_DATA_MAXSZ) >> 4);
8160 iwn_prph_write(sc, IWN_BSM_DRAM_TEXT_SIZE, fw->init.textsz);
8163 /* Load firmware boot code. */
8164 error = iwn4965_load_bootcode(sc, fw->boot.text, fw->boot.textsz);
8166 device_printf(sc->sc_dev, "%s: could not load boot firmware\n",
8170 /* Now press "execute". */
8171 IWN_WRITE(sc, IWN_RESET, 0);
8173 /* Wait at most one second for first alive notification. */
8174 if ((error = msleep(sc, &sc->sc_mtx, PCATCH, "iwninit", hz)) != 0) {
8175 device_printf(sc->sc_dev,
8176 "%s: timeout waiting for adapter to initialize, error %d\n",
8181 /* Retrieve current temperature for initial TX power calibration. */
8182 sc->rawtemp = sc->ucode_info.temp[3].chan20MHz;
8183 sc->temp = iwn4965_get_temperature(sc);
8185 /* Copy runtime sections into pre-allocated DMA-safe memory. */
8186 memcpy(dma->vaddr, fw->main.data, fw->main.datasz);
8187 bus_dmamap_sync(dma->tag, dma->map, BUS_DMASYNC_PREWRITE);
8188 memcpy(dma->vaddr + IWN4965_FW_DATA_MAXSZ,
8189 fw->main.text, fw->main.textsz);
8190 bus_dmamap_sync(dma->tag, dma->map, BUS_DMASYNC_PREWRITE);
8192 /* Tell adapter where to find runtime sections. */
8193 if ((error = iwn_nic_lock(sc)) != 0)
8195 iwn_prph_write(sc, IWN_BSM_DRAM_DATA_ADDR, dma->paddr >> 4);
8196 iwn_prph_write(sc, IWN_BSM_DRAM_DATA_SIZE, fw->main.datasz);
8197 iwn_prph_write(sc, IWN_BSM_DRAM_TEXT_ADDR,
8198 (dma->paddr + IWN4965_FW_DATA_MAXSZ) >> 4);
8199 iwn_prph_write(sc, IWN_BSM_DRAM_TEXT_SIZE,
8200 IWN_FW_UPDATED | fw->main.textsz);
8207 iwn5000_load_firmware_section(struct iwn_softc *sc, uint32_t dst,
8208 const uint8_t *section, int size)
8210 struct iwn_dma_info *dma = &sc->fw_dma;
8213 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8215 /* Copy firmware section into pre-allocated DMA-safe memory. */
8216 memcpy(dma->vaddr, section, size);
8217 bus_dmamap_sync(dma->tag, dma->map, BUS_DMASYNC_PREWRITE);
8219 if ((error = iwn_nic_lock(sc)) != 0)
8222 IWN_WRITE(sc, IWN_FH_TX_CONFIG(IWN_SRVC_DMACHNL),
8223 IWN_FH_TX_CONFIG_DMA_PAUSE);
8225 IWN_WRITE(sc, IWN_FH_SRAM_ADDR(IWN_SRVC_DMACHNL), dst);
8226 IWN_WRITE(sc, IWN_FH_TFBD_CTRL0(IWN_SRVC_DMACHNL),
8227 IWN_LOADDR(dma->paddr));
8228 IWN_WRITE(sc, IWN_FH_TFBD_CTRL1(IWN_SRVC_DMACHNL),
8229 IWN_HIADDR(dma->paddr) << 28 | size);
8230 IWN_WRITE(sc, IWN_FH_TXBUF_STATUS(IWN_SRVC_DMACHNL),
8231 IWN_FH_TXBUF_STATUS_TBNUM(1) |
8232 IWN_FH_TXBUF_STATUS_TBIDX(1) |
8233 IWN_FH_TXBUF_STATUS_TFBD_VALID);
8235 /* Kick Flow Handler to start DMA transfer. */
8236 IWN_WRITE(sc, IWN_FH_TX_CONFIG(IWN_SRVC_DMACHNL),
8237 IWN_FH_TX_CONFIG_DMA_ENA | IWN_FH_TX_CONFIG_CIRQ_HOST_ENDTFD);
8241 /* Wait at most five seconds for FH DMA transfer to complete. */
8242 return msleep(sc, &sc->sc_mtx, PCATCH, "iwninit", 5 * hz);
8246 iwn5000_load_firmware(struct iwn_softc *sc)
8248 struct iwn_fw_part *fw;
8251 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8253 /* Load the initialization firmware on first boot only. */
8254 fw = (sc->sc_flags & IWN_FLAG_CALIB_DONE) ?
8255 &sc->fw.main : &sc->fw.init;
8257 error = iwn5000_load_firmware_section(sc, IWN_FW_TEXT_BASE,
8258 fw->text, fw->textsz);
8260 device_printf(sc->sc_dev,
8261 "%s: could not load firmware %s section, error %d\n",
8262 __func__, ".text", error);
8265 error = iwn5000_load_firmware_section(sc, IWN_FW_DATA_BASE,
8266 fw->data, fw->datasz);
8268 device_printf(sc->sc_dev,
8269 "%s: could not load firmware %s section, error %d\n",
8270 __func__, ".data", error);
8274 /* Now press "execute". */
8275 IWN_WRITE(sc, IWN_RESET, 0);
8280 * Extract text and data sections from a legacy firmware image.
8283 iwn_read_firmware_leg(struct iwn_softc *sc, struct iwn_fw_info *fw)
8285 const uint32_t *ptr;
8289 ptr = (const uint32_t *)fw->data;
8290 rev = le32toh(*ptr++);
8292 sc->ucode_rev = rev;
8294 /* Check firmware API version. */
8295 if (IWN_FW_API(rev) <= 1) {
8296 device_printf(sc->sc_dev,
8297 "%s: bad firmware, need API version >=2\n", __func__);
8300 if (IWN_FW_API(rev) >= 3) {
8301 /* Skip build number (version 2 header). */
8305 if (fw->size < hdrlen) {
8306 device_printf(sc->sc_dev, "%s: firmware too short: %zu bytes\n",
8307 __func__, fw->size);
8310 fw->main.textsz = le32toh(*ptr++);
8311 fw->main.datasz = le32toh(*ptr++);
8312 fw->init.textsz = le32toh(*ptr++);
8313 fw->init.datasz = le32toh(*ptr++);
8314 fw->boot.textsz = le32toh(*ptr++);
8316 /* Check that all firmware sections fit. */
8317 if (fw->size < hdrlen + fw->main.textsz + fw->main.datasz +
8318 fw->init.textsz + fw->init.datasz + fw->boot.textsz) {
8319 device_printf(sc->sc_dev, "%s: firmware too short: %zu bytes\n",
8320 __func__, fw->size);
8324 /* Get pointers to firmware sections. */
8325 fw->main.text = (const uint8_t *)ptr;
8326 fw->main.data = fw->main.text + fw->main.textsz;
8327 fw->init.text = fw->main.data + fw->main.datasz;
8328 fw->init.data = fw->init.text + fw->init.textsz;
8329 fw->boot.text = fw->init.data + fw->init.datasz;
8334 * Extract text and data sections from a TLV firmware image.
8337 iwn_read_firmware_tlv(struct iwn_softc *sc, struct iwn_fw_info *fw,
8340 const struct iwn_fw_tlv_hdr *hdr;
8341 const struct iwn_fw_tlv *tlv;
8342 const uint8_t *ptr, *end;
8346 if (fw->size < sizeof (*hdr)) {
8347 device_printf(sc->sc_dev, "%s: firmware too short: %zu bytes\n",
8348 __func__, fw->size);
8351 hdr = (const struct iwn_fw_tlv_hdr *)fw->data;
8352 if (hdr->signature != htole32(IWN_FW_SIGNATURE)) {
8353 device_printf(sc->sc_dev, "%s: bad firmware signature 0x%08x\n",
8354 __func__, le32toh(hdr->signature));
8357 DPRINTF(sc, IWN_DEBUG_RESET, "FW: \"%.64s\", build 0x%x\n", hdr->descr,
8358 le32toh(hdr->build));
8359 sc->ucode_rev = le32toh(hdr->rev);
8362 * Select the closest supported alternative that is less than
8363 * or equal to the specified one.
8365 altmask = le64toh(hdr->altmask);
8366 while (alt > 0 && !(altmask & (1ULL << alt)))
8367 alt--; /* Downgrade. */
8368 DPRINTF(sc, IWN_DEBUG_RESET, "using alternative %d\n", alt);
8370 ptr = (const uint8_t *)(hdr + 1);
8371 end = (const uint8_t *)(fw->data + fw->size);
8373 /* Parse type-length-value fields. */
8374 while (ptr + sizeof (*tlv) <= end) {
8375 tlv = (const struct iwn_fw_tlv *)ptr;
8376 len = le32toh(tlv->len);
8378 ptr += sizeof (*tlv);
8379 if (ptr + len > end) {
8380 device_printf(sc->sc_dev,
8381 "%s: firmware too short: %zu bytes\n", __func__,
8385 /* Skip other alternatives. */
8386 if (tlv->alt != 0 && tlv->alt != htole16(alt))
8389 switch (le16toh(tlv->type)) {
8390 case IWN_FW_TLV_MAIN_TEXT:
8391 fw->main.text = ptr;
8392 fw->main.textsz = len;
8394 case IWN_FW_TLV_MAIN_DATA:
8395 fw->main.data = ptr;
8396 fw->main.datasz = len;
8398 case IWN_FW_TLV_INIT_TEXT:
8399 fw->init.text = ptr;
8400 fw->init.textsz = len;
8402 case IWN_FW_TLV_INIT_DATA:
8403 fw->init.data = ptr;
8404 fw->init.datasz = len;
8406 case IWN_FW_TLV_BOOT_TEXT:
8407 fw->boot.text = ptr;
8408 fw->boot.textsz = len;
8410 case IWN_FW_TLV_ENH_SENS:
8412 sc->sc_flags |= IWN_FLAG_ENH_SENS;
8414 case IWN_FW_TLV_PHY_CALIB:
8415 tmp = le32toh(*ptr);
8417 sc->reset_noise_gain = tmp;
8418 sc->noise_gain = tmp + 1;
8421 case IWN_FW_TLV_PAN:
8422 sc->sc_flags |= IWN_FLAG_PAN_SUPPORT;
8423 DPRINTF(sc, IWN_DEBUG_RESET,
8424 "PAN Support found: %d\n", 1);
8426 case IWN_FW_TLV_FLAGS:
8427 if (len < sizeof(uint32_t))
8429 if (len % sizeof(uint32_t))
8431 sc->tlv_feature_flags = le32toh(*ptr);
8432 DPRINTF(sc, IWN_DEBUG_RESET,
8433 "%s: feature: 0x%08x\n",
8435 sc->tlv_feature_flags);
8437 case IWN_FW_TLV_PBREQ_MAXLEN:
8438 case IWN_FW_TLV_RUNT_EVTLOG_PTR:
8439 case IWN_FW_TLV_RUNT_EVTLOG_SIZE:
8440 case IWN_FW_TLV_RUNT_ERRLOG_PTR:
8441 case IWN_FW_TLV_INIT_EVTLOG_PTR:
8442 case IWN_FW_TLV_INIT_EVTLOG_SIZE:
8443 case IWN_FW_TLV_INIT_ERRLOG_PTR:
8444 case IWN_FW_TLV_WOWLAN_INST:
8445 case IWN_FW_TLV_WOWLAN_DATA:
8446 DPRINTF(sc, IWN_DEBUG_RESET,
8447 "TLV type %d recognized but not handled\n",
8448 le16toh(tlv->type));
8451 DPRINTF(sc, IWN_DEBUG_RESET,
8452 "TLV type %d not handled\n", le16toh(tlv->type));
8455 next: /* TLV fields are 32-bit aligned. */
8456 ptr += (len + 3) & ~3;
8462 iwn_read_firmware(struct iwn_softc *sc)
8464 struct iwn_fw_info *fw = &sc->fw;
8467 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8471 memset(fw, 0, sizeof (*fw));
8473 /* Read firmware image from filesystem. */
8474 sc->fw_fp = firmware_get(sc->fwname);
8475 if (sc->fw_fp == NULL) {
8476 device_printf(sc->sc_dev, "%s: could not read firmware %s\n",
8477 __func__, sc->fwname);
8483 fw->size = sc->fw_fp->datasize;
8484 fw->data = (const uint8_t *)sc->fw_fp->data;
8485 if (fw->size < sizeof (uint32_t)) {
8486 device_printf(sc->sc_dev, "%s: firmware too short: %zu bytes\n",
8487 __func__, fw->size);
8492 /* Retrieve text and data sections. */
8493 if (*(const uint32_t *)fw->data != 0) /* Legacy image. */
8494 error = iwn_read_firmware_leg(sc, fw);
8496 error = iwn_read_firmware_tlv(sc, fw, 1);
8498 device_printf(sc->sc_dev,
8499 "%s: could not read firmware sections, error %d\n",
8504 device_printf(sc->sc_dev, "%s: ucode rev=0x%08x\n", __func__, sc->ucode_rev);
8506 /* Make sure text and data sections fit in hardware memory. */
8507 if (fw->main.textsz > sc->fw_text_maxsz ||
8508 fw->main.datasz > sc->fw_data_maxsz ||
8509 fw->init.textsz > sc->fw_text_maxsz ||
8510 fw->init.datasz > sc->fw_data_maxsz ||
8511 fw->boot.textsz > IWN_FW_BOOT_TEXT_MAXSZ ||
8512 (fw->boot.textsz & 3) != 0) {
8513 device_printf(sc->sc_dev, "%s: firmware sections too large\n",
8519 /* We can proceed with loading the firmware. */
8522 fail: iwn_unload_firmware(sc);
8527 iwn_unload_firmware(struct iwn_softc *sc)
8529 firmware_put(sc->fw_fp, FIRMWARE_UNLOAD);
8534 iwn_clock_wait(struct iwn_softc *sc)
8538 /* Set "initialization complete" bit. */
8539 IWN_SETBITS(sc, IWN_GP_CNTRL, IWN_GP_CNTRL_INIT_DONE);
8541 /* Wait for clock stabilization. */
8542 for (ntries = 0; ntries < 2500; ntries++) {
8543 if (IWN_READ(sc, IWN_GP_CNTRL) & IWN_GP_CNTRL_MAC_CLOCK_READY)
8547 device_printf(sc->sc_dev,
8548 "%s: timeout waiting for clock stabilization\n", __func__);
8553 iwn_apm_init(struct iwn_softc *sc)
8558 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8560 /* Disable L0s exit timer (NMI bug workaround). */
8561 IWN_SETBITS(sc, IWN_GIO_CHICKEN, IWN_GIO_CHICKEN_DIS_L0S_TIMER);
8562 /* Don't wait for ICH L0s (ICH bug workaround). */
8563 IWN_SETBITS(sc, IWN_GIO_CHICKEN, IWN_GIO_CHICKEN_L1A_NO_L0S_RX);
8565 /* Set FH wait threshold to max (HW bug under stress workaround). */
8566 IWN_SETBITS(sc, IWN_DBG_HPET_MEM, 0xffff0000);
8568 /* Enable HAP INTA to move adapter from L1a to L0s. */
8569 IWN_SETBITS(sc, IWN_HW_IF_CONFIG, IWN_HW_IF_CONFIG_HAP_WAKE_L1A);
8571 /* Retrieve PCIe Active State Power Management (ASPM). */
8572 reg = pci_read_config(sc->sc_dev, sc->sc_cap_off + PCIER_LINK_CTL, 4);
8573 /* Workaround for HW instability in PCIe L0->L0s->L1 transition. */
8574 if (reg & PCIEM_LINK_CTL_ASPMC_L1) /* L1 Entry enabled. */
8575 IWN_SETBITS(sc, IWN_GIO, IWN_GIO_L0S_ENA);
8577 IWN_CLRBITS(sc, IWN_GIO, IWN_GIO_L0S_ENA);
8579 if (sc->base_params->pll_cfg_val)
8580 IWN_SETBITS(sc, IWN_ANA_PLL, sc->base_params->pll_cfg_val);
8582 /* Wait for clock stabilization before accessing prph. */
8583 if ((error = iwn_clock_wait(sc)) != 0)
8586 if ((error = iwn_nic_lock(sc)) != 0)
8588 if (sc->hw_type == IWN_HW_REV_TYPE_4965) {
8589 /* Enable DMA and BSM (Bootstrap State Machine). */
8590 iwn_prph_write(sc, IWN_APMG_CLK_EN,
8591 IWN_APMG_CLK_CTRL_DMA_CLK_RQT |
8592 IWN_APMG_CLK_CTRL_BSM_CLK_RQT);
8595 iwn_prph_write(sc, IWN_APMG_CLK_EN,
8596 IWN_APMG_CLK_CTRL_DMA_CLK_RQT);
8599 /* Disable L1-Active. */
8600 iwn_prph_setbits(sc, IWN_APMG_PCI_STT, IWN_APMG_PCI_STT_L1A_DIS);
8607 iwn_apm_stop_master(struct iwn_softc *sc)
8611 /* Stop busmaster DMA activity. */
8612 IWN_SETBITS(sc, IWN_RESET, IWN_RESET_STOP_MASTER);
8613 for (ntries = 0; ntries < 100; ntries++) {
8614 if (IWN_READ(sc, IWN_RESET) & IWN_RESET_MASTER_DISABLED)
8618 device_printf(sc->sc_dev, "%s: timeout waiting for master\n", __func__);
8622 iwn_apm_stop(struct iwn_softc *sc)
8624 iwn_apm_stop_master(sc);
8626 /* Reset the entire device. */
8627 IWN_SETBITS(sc, IWN_RESET, IWN_RESET_SW);
8629 /* Clear "initialization complete" bit. */
8630 IWN_CLRBITS(sc, IWN_GP_CNTRL, IWN_GP_CNTRL_INIT_DONE);
8634 iwn4965_nic_config(struct iwn_softc *sc)
8636 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8638 if (IWN_RFCFG_TYPE(sc->rfcfg) == 1) {
8640 * I don't believe this to be correct but this is what the
8641 * vendor driver is doing. Probably the bits should not be
8642 * shifted in IWN_RFCFG_*.
8644 IWN_SETBITS(sc, IWN_HW_IF_CONFIG,
8645 IWN_RFCFG_TYPE(sc->rfcfg) |
8646 IWN_RFCFG_STEP(sc->rfcfg) |
8647 IWN_RFCFG_DASH(sc->rfcfg));
8649 IWN_SETBITS(sc, IWN_HW_IF_CONFIG,
8650 IWN_HW_IF_CONFIG_RADIO_SI | IWN_HW_IF_CONFIG_MAC_SI);
8655 iwn5000_nic_config(struct iwn_softc *sc)
8660 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8662 if (IWN_RFCFG_TYPE(sc->rfcfg) < 3) {
8663 IWN_SETBITS(sc, IWN_HW_IF_CONFIG,
8664 IWN_RFCFG_TYPE(sc->rfcfg) |
8665 IWN_RFCFG_STEP(sc->rfcfg) |
8666 IWN_RFCFG_DASH(sc->rfcfg));
8668 IWN_SETBITS(sc, IWN_HW_IF_CONFIG,
8669 IWN_HW_IF_CONFIG_RADIO_SI | IWN_HW_IF_CONFIG_MAC_SI);
8671 if ((error = iwn_nic_lock(sc)) != 0)
8673 iwn_prph_setbits(sc, IWN_APMG_PS, IWN_APMG_PS_EARLY_PWROFF_DIS);
8675 if (sc->hw_type == IWN_HW_REV_TYPE_1000) {
8677 * Select first Switching Voltage Regulator (1.32V) to
8678 * solve a stability issue related to noisy DC2DC line
8679 * in the silicon of 1000 Series.
8681 tmp = iwn_prph_read(sc, IWN_APMG_DIGITAL_SVR);
8682 tmp &= ~IWN_APMG_DIGITAL_SVR_VOLTAGE_MASK;
8683 tmp |= IWN_APMG_DIGITAL_SVR_VOLTAGE_1_32;
8684 iwn_prph_write(sc, IWN_APMG_DIGITAL_SVR, tmp);
8688 if (sc->sc_flags & IWN_FLAG_INTERNAL_PA) {
8689 /* Use internal power amplifier only. */
8690 IWN_WRITE(sc, IWN_GP_DRIVER, IWN_GP_DRIVER_RADIO_2X2_IPA);
8692 if (sc->base_params->additional_nic_config && sc->calib_ver >= 6) {
8693 /* Indicate that ROM calibration version is >=6. */
8694 IWN_SETBITS(sc, IWN_GP_DRIVER, IWN_GP_DRIVER_CALIB_VER6);
8696 if (sc->base_params->additional_gp_drv_bit)
8697 IWN_SETBITS(sc, IWN_GP_DRIVER,
8698 sc->base_params->additional_gp_drv_bit);
8703 * Take NIC ownership over Intel Active Management Technology (AMT).
8706 iwn_hw_prepare(struct iwn_softc *sc)
8710 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8712 /* Check if hardware is ready. */
8713 IWN_SETBITS(sc, IWN_HW_IF_CONFIG, IWN_HW_IF_CONFIG_NIC_READY);
8714 for (ntries = 0; ntries < 5; ntries++) {
8715 if (IWN_READ(sc, IWN_HW_IF_CONFIG) &
8716 IWN_HW_IF_CONFIG_NIC_READY)
8721 /* Hardware not ready, force into ready state. */
8722 IWN_SETBITS(sc, IWN_HW_IF_CONFIG, IWN_HW_IF_CONFIG_PREPARE);
8723 for (ntries = 0; ntries < 15000; ntries++) {
8724 if (!(IWN_READ(sc, IWN_HW_IF_CONFIG) &
8725 IWN_HW_IF_CONFIG_PREPARE_DONE))
8729 if (ntries == 15000)
8732 /* Hardware should be ready now. */
8733 IWN_SETBITS(sc, IWN_HW_IF_CONFIG, IWN_HW_IF_CONFIG_NIC_READY);
8734 for (ntries = 0; ntries < 5; ntries++) {
8735 if (IWN_READ(sc, IWN_HW_IF_CONFIG) &
8736 IWN_HW_IF_CONFIG_NIC_READY)
8744 iwn_hw_init(struct iwn_softc *sc)
8746 struct iwn_ops *ops = &sc->ops;
8747 int error, chnl, qid;
8749 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
8751 /* Clear pending interrupts. */
8752 IWN_WRITE(sc, IWN_INT, 0xffffffff);
8754 if ((error = iwn_apm_init(sc)) != 0) {
8755 device_printf(sc->sc_dev,
8756 "%s: could not power ON adapter, error %d\n", __func__,
8761 /* Select VMAIN power source. */
8762 if ((error = iwn_nic_lock(sc)) != 0)
8764 iwn_prph_clrbits(sc, IWN_APMG_PS, IWN_APMG_PS_PWR_SRC_MASK);
8767 /* Perform adapter-specific initialization. */
8768 if ((error = ops->nic_config(sc)) != 0)
8771 /* Initialize RX ring. */
8772 if ((error = iwn_nic_lock(sc)) != 0)
8774 IWN_WRITE(sc, IWN_FH_RX_CONFIG, 0);
8775 IWN_WRITE(sc, IWN_FH_RX_WPTR, 0);
8776 /* Set physical address of RX ring (256-byte aligned). */
8777 IWN_WRITE(sc, IWN_FH_RX_BASE, sc->rxq.desc_dma.paddr >> 8);
8778 /* Set physical address of RX status (16-byte aligned). */
8779 IWN_WRITE(sc, IWN_FH_STATUS_WPTR, sc->rxq.stat_dma.paddr >> 4);
8781 IWN_WRITE(sc, IWN_FH_RX_CONFIG,
8782 IWN_FH_RX_CONFIG_ENA |
8783 IWN_FH_RX_CONFIG_IGN_RXF_EMPTY | /* HW bug workaround */
8784 IWN_FH_RX_CONFIG_IRQ_DST_HOST |
8785 IWN_FH_RX_CONFIG_SINGLE_FRAME |
8786 IWN_FH_RX_CONFIG_RB_TIMEOUT(0) |
8787 IWN_FH_RX_CONFIG_NRBD(IWN_RX_RING_COUNT_LOG));
8789 IWN_WRITE(sc, IWN_FH_RX_WPTR, (IWN_RX_RING_COUNT - 1) & ~7);
8791 if ((error = iwn_nic_lock(sc)) != 0)
8794 /* Initialize TX scheduler. */
8795 iwn_prph_write(sc, sc->sched_txfact_addr, 0);
8797 /* Set physical address of "keep warm" page (16-byte aligned). */
8798 IWN_WRITE(sc, IWN_FH_KW_ADDR, sc->kw_dma.paddr >> 4);
8800 /* Initialize TX rings. */
8801 for (qid = 0; qid < sc->ntxqs; qid++) {
8802 struct iwn_tx_ring *txq = &sc->txq[qid];
8804 /* Set physical address of TX ring (256-byte aligned). */
8805 IWN_WRITE(sc, IWN_FH_CBBC_QUEUE(qid),
8806 txq->desc_dma.paddr >> 8);
8810 /* Enable DMA channels. */
8811 for (chnl = 0; chnl < sc->ndmachnls; chnl++) {
8812 IWN_WRITE(sc, IWN_FH_TX_CONFIG(chnl),
8813 IWN_FH_TX_CONFIG_DMA_ENA |
8814 IWN_FH_TX_CONFIG_DMA_CREDIT_ENA);
8817 /* Clear "radio off" and "commands blocked" bits. */
8818 IWN_WRITE(sc, IWN_UCODE_GP1_CLR, IWN_UCODE_GP1_RFKILL);
8819 IWN_WRITE(sc, IWN_UCODE_GP1_CLR, IWN_UCODE_GP1_CMD_BLOCKED);
8821 /* Clear pending interrupts. */
8822 IWN_WRITE(sc, IWN_INT, 0xffffffff);
8823 /* Enable interrupt coalescing. */
8824 IWN_WRITE(sc, IWN_INT_COALESCING, 512 / 8);
8825 /* Enable interrupts. */
8826 IWN_WRITE(sc, IWN_INT_MASK, sc->int_mask);
8828 /* _Really_ make sure "radio off" bit is cleared! */
8829 IWN_WRITE(sc, IWN_UCODE_GP1_CLR, IWN_UCODE_GP1_RFKILL);
8830 IWN_WRITE(sc, IWN_UCODE_GP1_CLR, IWN_UCODE_GP1_RFKILL);
8832 /* Enable shadow registers. */
8833 if (sc->base_params->shadow_reg_enable)
8834 IWN_SETBITS(sc, IWN_SHADOW_REG_CTRL, 0x800fffff);
8836 if ((error = ops->load_firmware(sc)) != 0) {
8837 device_printf(sc->sc_dev,
8838 "%s: could not load firmware, error %d\n", __func__,
8842 /* Wait at most one second for firmware alive notification. */
8843 if ((error = msleep(sc, &sc->sc_mtx, PCATCH, "iwninit", hz)) != 0) {
8844 device_printf(sc->sc_dev,
8845 "%s: timeout waiting for adapter to initialize, error %d\n",
8849 /* Do post-firmware initialization. */
8851 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
8853 return ops->post_alive(sc);
8857 iwn_hw_stop(struct iwn_softc *sc)
8859 int chnl, qid, ntries;
8861 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8863 IWN_WRITE(sc, IWN_RESET, IWN_RESET_NEVO);
8865 /* Disable interrupts. */
8866 IWN_WRITE(sc, IWN_INT_MASK, 0);
8867 IWN_WRITE(sc, IWN_INT, 0xffffffff);
8868 IWN_WRITE(sc, IWN_FH_INT, 0xffffffff);
8869 sc->sc_flags &= ~IWN_FLAG_USE_ICT;
8871 /* Make sure we no longer hold the NIC lock. */
8874 /* Stop TX scheduler. */
8875 iwn_prph_write(sc, sc->sched_txfact_addr, 0);
8877 /* Stop all DMA channels. */
8878 if (iwn_nic_lock(sc) == 0) {
8879 for (chnl = 0; chnl < sc->ndmachnls; chnl++) {
8880 IWN_WRITE(sc, IWN_FH_TX_CONFIG(chnl), 0);
8881 for (ntries = 0; ntries < 200; ntries++) {
8882 if (IWN_READ(sc, IWN_FH_TX_STATUS) &
8883 IWN_FH_TX_STATUS_IDLE(chnl))
8892 iwn_reset_rx_ring(sc, &sc->rxq);
8894 /* Reset all TX rings. */
8895 for (qid = 0; qid < sc->ntxqs; qid++)
8896 iwn_reset_tx_ring(sc, &sc->txq[qid]);
8898 if (iwn_nic_lock(sc) == 0) {
8899 iwn_prph_write(sc, IWN_APMG_CLK_DIS,
8900 IWN_APMG_CLK_CTRL_DMA_CLK_RQT);
8904 /* Power OFF adapter. */
8909 iwn_panicked(void *arg0, int pending)
8911 struct iwn_softc *sc = arg0;
8912 struct ieee80211com *ic = &sc->sc_ic;
8913 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
8919 printf("%s: null vap\n", __func__);
8923 device_printf(sc->sc_dev, "%s: controller panicked, iv_state = %d; "
8924 "restarting\n", __func__, vap->iv_state);
8927 * This is not enough work. We need to also reinitialise
8928 * the correct transmit state for aggregation enabled queues,
8929 * which has a very specific requirement of
8930 * ring index = 802.11 seqno % 256. If we don't do this (which
8931 * we definitely don't!) then the firmware will just panic again.
8934 ieee80211_restart_all(ic);
8938 iwn_stop_locked(sc);
8939 if ((error = iwn_init_locked(sc)) != 0) {
8940 device_printf(sc->sc_dev,
8941 "%s: could not init hardware\n", __func__);
8944 if (vap->iv_state >= IEEE80211_S_AUTH &&
8945 (error = iwn_auth(sc, vap)) != 0) {
8946 device_printf(sc->sc_dev,
8947 "%s: could not move to auth state\n", __func__);
8949 if (vap->iv_state >= IEEE80211_S_RUN &&
8950 (error = iwn_run(sc, vap)) != 0) {
8951 device_printf(sc->sc_dev,
8952 "%s: could not move to run state\n", __func__);
8961 iwn_init_locked(struct iwn_softc *sc)
8965 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
8967 IWN_LOCK_ASSERT(sc);
8969 if (sc->sc_flags & IWN_FLAG_RUNNING)
8972 sc->sc_flags |= IWN_FLAG_RUNNING;
8974 if ((error = iwn_hw_prepare(sc)) != 0) {
8975 device_printf(sc->sc_dev, "%s: hardware not ready, error %d\n",
8980 /* Initialize interrupt mask to default value. */
8981 sc->int_mask = IWN_INT_MASK_DEF;
8982 sc->sc_flags &= ~IWN_FLAG_USE_ICT;
8984 /* Check that the radio is not disabled by hardware switch. */
8985 if (!(IWN_READ(sc, IWN_GP_CNTRL) & IWN_GP_CNTRL_RFKILL)) {
8986 iwn_stop_locked(sc);
8987 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
8992 /* Read firmware images from the filesystem. */
8993 if ((error = iwn_read_firmware(sc)) != 0) {
8994 device_printf(sc->sc_dev,
8995 "%s: could not read firmware, error %d\n", __func__,
9000 /* Initialize hardware and upload firmware. */
9001 error = iwn_hw_init(sc);
9002 iwn_unload_firmware(sc);
9004 device_printf(sc->sc_dev,
9005 "%s: could not initialize hardware, error %d\n", __func__,
9010 /* Configure adapter now that it is ready. */
9011 if ((error = iwn_config(sc)) != 0) {
9012 device_printf(sc->sc_dev,
9013 "%s: could not configure device, error %d\n", __func__,
9018 callout_reset(&sc->watchdog_to, hz, iwn_watchdog, sc);
9021 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
9026 iwn_stop_locked(sc);
9028 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end in error\n",__func__);
9034 iwn_init(struct iwn_softc *sc)
9039 error = iwn_init_locked(sc);
9046 iwn_stop_locked(struct iwn_softc *sc)
9049 IWN_LOCK_ASSERT(sc);
9051 if (!(sc->sc_flags & IWN_FLAG_RUNNING))
9054 sc->sc_is_scanning = 0;
9055 sc->sc_tx_timer = 0;
9056 callout_stop(&sc->watchdog_to);
9057 callout_stop(&sc->scan_timeout);
9058 callout_stop(&sc->calib_to);
9059 sc->sc_flags &= ~IWN_FLAG_RUNNING;
9061 /* Power OFF hardware. */
9066 iwn_stop(struct iwn_softc *sc)
9069 iwn_stop_locked(sc);
9074 * Callback from net80211 to start a scan.
9077 iwn_scan_start(struct ieee80211com *ic)
9079 struct iwn_softc *sc = ic->ic_softc;
9082 /* make the link LED blink while we're scanning */
9083 iwn_set_led(sc, IWN_LED_LINK, 20, 2);
9088 * Callback from net80211 to terminate a scan.
9091 iwn_scan_end(struct ieee80211com *ic)
9093 struct iwn_softc *sc = ic->ic_softc;
9094 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
9097 if (vap->iv_state == IEEE80211_S_RUN) {
9098 /* Set link LED to ON status if we are associated */
9099 iwn_set_led(sc, IWN_LED_LINK, 0, 1);
9105 * Callback from net80211 to force a channel change.
9108 iwn_set_channel(struct ieee80211com *ic)
9110 struct iwn_softc *sc = ic->ic_softc;
9113 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
9117 * Only need to set the channel in Monitor mode. AP scanning and auth
9118 * are already taken care of by their respective firmware commands.
9120 if (ic->ic_opmode == IEEE80211_M_MONITOR) {
9121 error = iwn_config(sc);
9123 device_printf(sc->sc_dev,
9124 "%s: error %d settting channel\n", __func__, error);
9130 * Callback from net80211 to start scanning of the current channel.
9133 iwn_scan_curchan(struct ieee80211_scan_state *ss, unsigned long maxdwell)
9135 struct ieee80211vap *vap = ss->ss_vap;
9136 struct ieee80211com *ic = vap->iv_ic;
9137 struct iwn_softc *sc = ic->ic_softc;
9141 error = iwn_scan(sc, vap, ss, ic->ic_curchan);
9144 ieee80211_cancel_scan(vap);
9148 * Callback from net80211 to handle the minimum dwell time being met.
9149 * The intent is to terminate the scan but we just let the firmware
9150 * notify us when it's finished as we have no safe way to abort it.
9153 iwn_scan_mindwell(struct ieee80211_scan_state *ss)
9155 /* NB: don't try to abort scan; wait for firmware to finish */
9158 #define IWN_DESC(x) case x: return #x
9161 * Translate CSR code to string
9163 static char *iwn_get_csr_string(int csr)
9166 IWN_DESC(IWN_HW_IF_CONFIG);
9167 IWN_DESC(IWN_INT_COALESCING);
9169 IWN_DESC(IWN_INT_MASK);
9170 IWN_DESC(IWN_FH_INT);
9171 IWN_DESC(IWN_GPIO_IN);
9172 IWN_DESC(IWN_RESET);
9173 IWN_DESC(IWN_GP_CNTRL);
9174 IWN_DESC(IWN_HW_REV);
9175 IWN_DESC(IWN_EEPROM);
9176 IWN_DESC(IWN_EEPROM_GP);
9177 IWN_DESC(IWN_OTP_GP);
9179 IWN_DESC(IWN_GP_UCODE);
9180 IWN_DESC(IWN_GP_DRIVER);
9181 IWN_DESC(IWN_UCODE_GP1);
9182 IWN_DESC(IWN_UCODE_GP2);
9184 IWN_DESC(IWN_DRAM_INT_TBL);
9185 IWN_DESC(IWN_GIO_CHICKEN);
9186 IWN_DESC(IWN_ANA_PLL);
9187 IWN_DESC(IWN_HW_REV_WA);
9188 IWN_DESC(IWN_DBG_HPET_MEM);
9190 return "UNKNOWN CSR";
9195 * This function print firmware register
9198 iwn_debug_register(struct iwn_softc *sc)
9201 static const uint32_t csr_tbl[] = {
9226 DPRINTF(sc, IWN_DEBUG_REGISTER,
9227 "CSR values: (2nd byte of IWN_INT_COALESCING is IWN_INT_PERIODIC)%s",
9229 for (i = 0; i < nitems(csr_tbl); i++){
9230 DPRINTF(sc, IWN_DEBUG_REGISTER," %10s: 0x%08x ",
9231 iwn_get_csr_string(csr_tbl[i]), IWN_READ(sc, csr_tbl[i]));
9233 DPRINTF(sc, IWN_DEBUG_REGISTER,"%s","\n");
9235 DPRINTF(sc, IWN_DEBUG_REGISTER,"%s","\n");