2 * Copyright (c) 2007-2009 Damien Bergamini <damien.bergamini@free.fr>
3 * Copyright (c) 2008 Benjamin Close <benjsc@FreeBSD.org>
4 * Copyright (c) 2008 Sam Leffler, Errno Consulting
5 * Copyright (c) 2011 Intel Corporation
6 * Copyright (c) 2013 Cedric GROSS <c.gross@kreiz-it.fr>
7 * Copyright (c) 2013 Adrian Chadd <adrian@FreeBSD.org>
9 * Permission to use, copy, modify, and distribute this software for any
10 * purpose with or without fee is hereby granted, provided that the above
11 * copyright notice and this permission notice appear in all copies.
13 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
14 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
15 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
16 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
17 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
18 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
19 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
23 * Driver for Intel WiFi Link 4965 and 1000/5000/6000 Series 802.11 network
27 #include <sys/cdefs.h>
28 __FBSDID("$FreeBSD$");
33 #include <sys/param.h>
34 #include <sys/sockio.h>
35 #include <sys/sysctl.h>
37 #include <sys/kernel.h>
38 #include <sys/socket.h>
39 #include <sys/systm.h>
40 #include <sys/malloc.h>
44 #include <sys/endian.h>
45 #include <sys/firmware.h>
46 #include <sys/limits.h>
47 #include <sys/module.h>
49 #include <sys/queue.h>
50 #include <sys/taskqueue.h>
52 #include <machine/bus.h>
53 #include <machine/resource.h>
54 #include <machine/clock.h>
56 #include <dev/pci/pcireg.h>
57 #include <dev/pci/pcivar.h>
60 #include <net/if_var.h>
61 #include <net/if_dl.h>
62 #include <net/if_media.h>
64 #include <netinet/in.h>
65 #include <netinet/if_ether.h>
67 #include <net80211/ieee80211_var.h>
68 #include <net80211/ieee80211_radiotap.h>
69 #include <net80211/ieee80211_regdomain.h>
70 #include <net80211/ieee80211_ratectl.h>
72 #include <dev/iwn/if_iwnreg.h>
73 #include <dev/iwn/if_iwnvar.h>
74 #include <dev/iwn/if_iwn_devid.h>
75 #include <dev/iwn/if_iwn_chip_cfg.h>
76 #include <dev/iwn/if_iwn_debug.h>
77 #include <dev/iwn/if_iwn_ioctl.h>
85 static const struct iwn_ident iwn_ident_table[] = {
86 { 0x8086, IWN_DID_6x05_1, "Intel Centrino Advanced-N 6205" },
87 { 0x8086, IWN_DID_1000_1, "Intel Centrino Wireless-N 1000" },
88 { 0x8086, IWN_DID_1000_2, "Intel Centrino Wireless-N 1000" },
89 { 0x8086, IWN_DID_6x05_2, "Intel Centrino Advanced-N 6205" },
90 { 0x8086, IWN_DID_6050_1, "Intel Centrino Advanced-N + WiMAX 6250" },
91 { 0x8086, IWN_DID_6050_2, "Intel Centrino Advanced-N + WiMAX 6250" },
92 { 0x8086, IWN_DID_x030_1, "Intel Centrino Wireless-N 1030" },
93 { 0x8086, IWN_DID_x030_2, "Intel Centrino Wireless-N 1030" },
94 { 0x8086, IWN_DID_x030_3, "Intel Centrino Advanced-N 6230" },
95 { 0x8086, IWN_DID_x030_4, "Intel Centrino Advanced-N 6230" },
96 { 0x8086, IWN_DID_6150_1, "Intel Centrino Wireless-N + WiMAX 6150" },
97 { 0x8086, IWN_DID_6150_2, "Intel Centrino Wireless-N + WiMAX 6150" },
98 { 0x8086, IWN_DID_2x00_1, "Intel(R) Centrino(R) Wireless-N 2200 BGN" },
99 { 0x8086, IWN_DID_2x00_2, "Intel(R) Centrino(R) Wireless-N 2200 BGN" },
100 /* XXX 2200D is IWN_SDID_2x00_4; there's no way to express this here! */
101 { 0x8086, IWN_DID_2x30_1, "Intel Centrino Wireless-N 2230" },
102 { 0x8086, IWN_DID_2x30_2, "Intel Centrino Wireless-N 2230" },
103 { 0x8086, IWN_DID_130_1, "Intel Centrino Wireless-N 130" },
104 { 0x8086, IWN_DID_130_2, "Intel Centrino Wireless-N 130" },
105 { 0x8086, IWN_DID_100_1, "Intel Centrino Wireless-N 100" },
106 { 0x8086, IWN_DID_100_2, "Intel Centrino Wireless-N 100" },
107 { 0x8086, IWN_DID_105_1, "Intel Centrino Wireless-N 105" },
108 { 0x8086, IWN_DID_105_2, "Intel Centrino Wireless-N 105" },
109 { 0x8086, IWN_DID_135_1, "Intel Centrino Wireless-N 135" },
110 { 0x8086, IWN_DID_135_2, "Intel Centrino Wireless-N 135" },
111 { 0x8086, IWN_DID_4965_1, "Intel Wireless WiFi Link 4965" },
112 { 0x8086, IWN_DID_6x00_1, "Intel Centrino Ultimate-N 6300" },
113 { 0x8086, IWN_DID_6x00_2, "Intel Centrino Advanced-N 6200" },
114 { 0x8086, IWN_DID_4965_2, "Intel Wireless WiFi Link 4965" },
115 { 0x8086, IWN_DID_4965_3, "Intel Wireless WiFi Link 4965" },
116 { 0x8086, IWN_DID_5x00_1, "Intel WiFi Link 5100" },
117 { 0x8086, IWN_DID_4965_4, "Intel Wireless WiFi Link 4965" },
118 { 0x8086, IWN_DID_5x00_3, "Intel Ultimate N WiFi Link 5300" },
119 { 0x8086, IWN_DID_5x00_4, "Intel Ultimate N WiFi Link 5300" },
120 { 0x8086, IWN_DID_5x00_2, "Intel WiFi Link 5100" },
121 { 0x8086, IWN_DID_6x00_3, "Intel Centrino Ultimate-N 6300" },
122 { 0x8086, IWN_DID_6x00_4, "Intel Centrino Advanced-N 6200" },
123 { 0x8086, IWN_DID_5x50_1, "Intel WiMAX/WiFi Link 5350" },
124 { 0x8086, IWN_DID_5x50_2, "Intel WiMAX/WiFi Link 5350" },
125 { 0x8086, IWN_DID_5x50_3, "Intel WiMAX/WiFi Link 5150" },
126 { 0x8086, IWN_DID_5x50_4, "Intel WiMAX/WiFi Link 5150" },
127 { 0x8086, IWN_DID_6035_1, "Intel Centrino Advanced 6235" },
128 { 0x8086, IWN_DID_6035_2, "Intel Centrino Advanced 6235" },
132 static int iwn_probe(device_t);
133 static int iwn_attach(device_t);
134 static int iwn4965_attach(struct iwn_softc *, uint16_t);
135 static int iwn5000_attach(struct iwn_softc *, uint16_t);
136 static int iwn_config_specific(struct iwn_softc *, uint16_t);
137 static void iwn_radiotap_attach(struct iwn_softc *);
138 static void iwn_sysctlattach(struct iwn_softc *);
139 static struct ieee80211vap *iwn_vap_create(struct ieee80211com *,
140 const char [IFNAMSIZ], int, enum ieee80211_opmode, int,
141 const uint8_t [IEEE80211_ADDR_LEN],
142 const uint8_t [IEEE80211_ADDR_LEN]);
143 static void iwn_vap_delete(struct ieee80211vap *);
144 static int iwn_detach(device_t);
145 static int iwn_shutdown(device_t);
146 static int iwn_suspend(device_t);
147 static int iwn_resume(device_t);
148 static int iwn_nic_lock(struct iwn_softc *);
149 static int iwn_eeprom_lock(struct iwn_softc *);
150 static int iwn_init_otprom(struct iwn_softc *);
151 static int iwn_read_prom_data(struct iwn_softc *, uint32_t, void *, int);
152 static void iwn_dma_map_addr(void *, bus_dma_segment_t *, int, int);
153 static int iwn_dma_contig_alloc(struct iwn_softc *, struct iwn_dma_info *,
154 void **, bus_size_t, bus_size_t);
155 static void iwn_dma_contig_free(struct iwn_dma_info *);
156 static int iwn_alloc_sched(struct iwn_softc *);
157 static void iwn_free_sched(struct iwn_softc *);
158 static int iwn_alloc_kw(struct iwn_softc *);
159 static void iwn_free_kw(struct iwn_softc *);
160 static int iwn_alloc_ict(struct iwn_softc *);
161 static void iwn_free_ict(struct iwn_softc *);
162 static int iwn_alloc_fwmem(struct iwn_softc *);
163 static void iwn_free_fwmem(struct iwn_softc *);
164 static int iwn_alloc_rx_ring(struct iwn_softc *, struct iwn_rx_ring *);
165 static void iwn_reset_rx_ring(struct iwn_softc *, struct iwn_rx_ring *);
166 static void iwn_free_rx_ring(struct iwn_softc *, struct iwn_rx_ring *);
167 static int iwn_alloc_tx_ring(struct iwn_softc *, struct iwn_tx_ring *,
169 static void iwn_reset_tx_ring(struct iwn_softc *, struct iwn_tx_ring *);
170 static void iwn_free_tx_ring(struct iwn_softc *, struct iwn_tx_ring *);
171 static void iwn5000_ict_reset(struct iwn_softc *);
172 static int iwn_read_eeprom(struct iwn_softc *,
173 uint8_t macaddr[IEEE80211_ADDR_LEN]);
174 static void iwn4965_read_eeprom(struct iwn_softc *);
176 static void iwn4965_print_power_group(struct iwn_softc *, int);
178 static void iwn5000_read_eeprom(struct iwn_softc *);
179 static uint32_t iwn_eeprom_channel_flags(struct iwn_eeprom_chan *);
180 static void iwn_read_eeprom_band(struct iwn_softc *, int, int, int *,
181 struct ieee80211_channel[]);
182 static void iwn_read_eeprom_ht40(struct iwn_softc *, int, int, int *,
183 struct ieee80211_channel[]);
184 static void iwn_read_eeprom_channels(struct iwn_softc *, int, uint32_t);
185 static struct iwn_eeprom_chan *iwn_find_eeprom_channel(struct iwn_softc *,
186 struct ieee80211_channel *);
187 static void iwn_getradiocaps(struct ieee80211com *, int, int *,
188 struct ieee80211_channel[]);
189 static int iwn_setregdomain(struct ieee80211com *,
190 struct ieee80211_regdomain *, int,
191 struct ieee80211_channel[]);
192 static void iwn_read_eeprom_enhinfo(struct iwn_softc *);
193 static struct ieee80211_node *iwn_node_alloc(struct ieee80211vap *,
194 const uint8_t mac[IEEE80211_ADDR_LEN]);
195 static void iwn_newassoc(struct ieee80211_node *, int);
196 static int iwn_media_change(struct ifnet *);
197 static int iwn_newstate(struct ieee80211vap *, enum ieee80211_state, int);
198 static void iwn_calib_timeout(void *);
199 static void iwn_rx_phy(struct iwn_softc *, struct iwn_rx_desc *,
200 struct iwn_rx_data *);
201 static void iwn_rx_done(struct iwn_softc *, struct iwn_rx_desc *,
202 struct iwn_rx_data *);
203 static void iwn_rx_compressed_ba(struct iwn_softc *, struct iwn_rx_desc *,
204 struct iwn_rx_data *);
205 static void iwn5000_rx_calib_results(struct iwn_softc *,
206 struct iwn_rx_desc *, struct iwn_rx_data *);
207 static void iwn_rx_statistics(struct iwn_softc *, struct iwn_rx_desc *,
208 struct iwn_rx_data *);
209 static void iwn4965_tx_done(struct iwn_softc *, struct iwn_rx_desc *,
210 struct iwn_rx_data *);
211 static void iwn5000_tx_done(struct iwn_softc *, struct iwn_rx_desc *,
212 struct iwn_rx_data *);
213 static void iwn_tx_done(struct iwn_softc *, struct iwn_rx_desc *, int,
215 static void iwn_ampdu_tx_done(struct iwn_softc *, int, int, int, int, void *);
216 static void iwn_cmd_done(struct iwn_softc *, struct iwn_rx_desc *);
217 static void iwn_notif_intr(struct iwn_softc *);
218 static void iwn_wakeup_intr(struct iwn_softc *);
219 static void iwn_rftoggle_intr(struct iwn_softc *);
220 static void iwn_fatal_intr(struct iwn_softc *);
221 static void iwn_intr(void *);
222 static void iwn4965_update_sched(struct iwn_softc *, int, int, uint8_t,
224 static void iwn5000_update_sched(struct iwn_softc *, int, int, uint8_t,
227 static void iwn5000_reset_sched(struct iwn_softc *, int, int);
229 static int iwn_tx_data(struct iwn_softc *, struct mbuf *,
230 struct ieee80211_node *);
231 static int iwn_tx_data_raw(struct iwn_softc *, struct mbuf *,
232 struct ieee80211_node *,
233 const struct ieee80211_bpf_params *params);
234 static void iwn_xmit_task(void *arg0, int pending);
235 static int iwn_raw_xmit(struct ieee80211_node *, struct mbuf *,
236 const struct ieee80211_bpf_params *);
237 static int iwn_transmit(struct ieee80211com *, struct mbuf *);
238 static void iwn_watchdog(void *);
239 static int iwn_ioctl(struct ieee80211com *, u_long , void *);
240 static void iwn_parent(struct ieee80211com *);
241 static int iwn_cmd(struct iwn_softc *, int, const void *, int, int);
242 static int iwn4965_add_node(struct iwn_softc *, struct iwn_node_info *,
244 static int iwn5000_add_node(struct iwn_softc *, struct iwn_node_info *,
246 static int iwn_set_link_quality(struct iwn_softc *,
247 struct ieee80211_node *);
248 static int iwn_add_broadcast_node(struct iwn_softc *, int);
249 static int iwn_updateedca(struct ieee80211com *);
250 static void iwn_update_mcast(struct ieee80211com *);
251 static void iwn_set_led(struct iwn_softc *, uint8_t, uint8_t, uint8_t);
252 static int iwn_set_critical_temp(struct iwn_softc *);
253 static int iwn_set_timing(struct iwn_softc *, struct ieee80211_node *);
254 static void iwn4965_power_calibration(struct iwn_softc *, int);
255 static int iwn4965_set_txpower(struct iwn_softc *,
256 struct ieee80211_channel *, int);
257 static int iwn5000_set_txpower(struct iwn_softc *,
258 struct ieee80211_channel *, int);
259 static int iwn4965_get_rssi(struct iwn_softc *, struct iwn_rx_stat *);
260 static int iwn5000_get_rssi(struct iwn_softc *, struct iwn_rx_stat *);
261 static int iwn_get_noise(const struct iwn_rx_general_stats *);
262 static int iwn4965_get_temperature(struct iwn_softc *);
263 static int iwn5000_get_temperature(struct iwn_softc *);
264 static int iwn_init_sensitivity(struct iwn_softc *);
265 static void iwn_collect_noise(struct iwn_softc *,
266 const struct iwn_rx_general_stats *);
267 static int iwn4965_init_gains(struct iwn_softc *);
268 static int iwn5000_init_gains(struct iwn_softc *);
269 static int iwn4965_set_gains(struct iwn_softc *);
270 static int iwn5000_set_gains(struct iwn_softc *);
271 static void iwn_tune_sensitivity(struct iwn_softc *,
272 const struct iwn_rx_stats *);
273 static void iwn_save_stats_counters(struct iwn_softc *,
274 const struct iwn_stats *);
275 static int iwn_send_sensitivity(struct iwn_softc *);
276 static void iwn_check_rx_recovery(struct iwn_softc *, struct iwn_stats *);
277 static int iwn_set_pslevel(struct iwn_softc *, int, int, int);
278 static int iwn_send_btcoex(struct iwn_softc *);
279 static int iwn_send_advanced_btcoex(struct iwn_softc *);
280 static int iwn5000_runtime_calib(struct iwn_softc *);
281 static int iwn_config(struct iwn_softc *);
282 static int iwn_scan(struct iwn_softc *, struct ieee80211vap *,
283 struct ieee80211_scan_state *, struct ieee80211_channel *);
284 static int iwn_auth(struct iwn_softc *, struct ieee80211vap *vap);
285 static int iwn_run(struct iwn_softc *, struct ieee80211vap *vap);
286 static int iwn_ampdu_rx_start(struct ieee80211_node *,
287 struct ieee80211_rx_ampdu *, int, int, int);
288 static void iwn_ampdu_rx_stop(struct ieee80211_node *,
289 struct ieee80211_rx_ampdu *);
290 static int iwn_addba_request(struct ieee80211_node *,
291 struct ieee80211_tx_ampdu *, int, int, int);
292 static int iwn_addba_response(struct ieee80211_node *,
293 struct ieee80211_tx_ampdu *, int, int, int);
294 static int iwn_ampdu_tx_start(struct ieee80211com *,
295 struct ieee80211_node *, uint8_t);
296 static void iwn_ampdu_tx_stop(struct ieee80211_node *,
297 struct ieee80211_tx_ampdu *);
298 static void iwn4965_ampdu_tx_start(struct iwn_softc *,
299 struct ieee80211_node *, int, uint8_t, uint16_t);
300 static void iwn4965_ampdu_tx_stop(struct iwn_softc *, int,
302 static void iwn5000_ampdu_tx_start(struct iwn_softc *,
303 struct ieee80211_node *, int, uint8_t, uint16_t);
304 static void iwn5000_ampdu_tx_stop(struct iwn_softc *, int,
306 static int iwn5000_query_calibration(struct iwn_softc *);
307 static int iwn5000_send_calibration(struct iwn_softc *);
308 static int iwn5000_send_wimax_coex(struct iwn_softc *);
309 static int iwn5000_crystal_calib(struct iwn_softc *);
310 static int iwn5000_temp_offset_calib(struct iwn_softc *);
311 static int iwn5000_temp_offset_calibv2(struct iwn_softc *);
312 static int iwn4965_post_alive(struct iwn_softc *);
313 static int iwn5000_post_alive(struct iwn_softc *);
314 static int iwn4965_load_bootcode(struct iwn_softc *, const uint8_t *,
316 static int iwn4965_load_firmware(struct iwn_softc *);
317 static int iwn5000_load_firmware_section(struct iwn_softc *, uint32_t,
318 const uint8_t *, int);
319 static int iwn5000_load_firmware(struct iwn_softc *);
320 static int iwn_read_firmware_leg(struct iwn_softc *,
321 struct iwn_fw_info *);
322 static int iwn_read_firmware_tlv(struct iwn_softc *,
323 struct iwn_fw_info *, uint16_t);
324 static int iwn_read_firmware(struct iwn_softc *);
325 static void iwn_unload_firmware(struct iwn_softc *);
326 static int iwn_clock_wait(struct iwn_softc *);
327 static int iwn_apm_init(struct iwn_softc *);
328 static void iwn_apm_stop_master(struct iwn_softc *);
329 static void iwn_apm_stop(struct iwn_softc *);
330 static int iwn4965_nic_config(struct iwn_softc *);
331 static int iwn5000_nic_config(struct iwn_softc *);
332 static int iwn_hw_prepare(struct iwn_softc *);
333 static int iwn_hw_init(struct iwn_softc *);
334 static void iwn_hw_stop(struct iwn_softc *);
335 static void iwn_radio_on(void *, int);
336 static void iwn_radio_off(void *, int);
337 static void iwn_panicked(void *, int);
338 static void iwn_init_locked(struct iwn_softc *);
339 static void iwn_init(struct iwn_softc *);
340 static void iwn_stop_locked(struct iwn_softc *);
341 static void iwn_stop(struct iwn_softc *);
342 static void iwn_scan_start(struct ieee80211com *);
343 static void iwn_scan_end(struct ieee80211com *);
344 static void iwn_set_channel(struct ieee80211com *);
345 static void iwn_scan_curchan(struct ieee80211_scan_state *, unsigned long);
346 static void iwn_scan_mindwell(struct ieee80211_scan_state *);
348 static char *iwn_get_csr_string(int);
349 static void iwn_debug_register(struct iwn_softc *);
352 static device_method_t iwn_methods[] = {
353 /* Device interface */
354 DEVMETHOD(device_probe, iwn_probe),
355 DEVMETHOD(device_attach, iwn_attach),
356 DEVMETHOD(device_detach, iwn_detach),
357 DEVMETHOD(device_shutdown, iwn_shutdown),
358 DEVMETHOD(device_suspend, iwn_suspend),
359 DEVMETHOD(device_resume, iwn_resume),
364 static driver_t iwn_driver = {
367 sizeof(struct iwn_softc)
369 static devclass_t iwn_devclass;
371 DRIVER_MODULE(iwn, pci, iwn_driver, iwn_devclass, NULL, NULL);
373 MODULE_VERSION(iwn, 1);
375 MODULE_DEPEND(iwn, firmware, 1, 1, 1);
376 MODULE_DEPEND(iwn, pci, 1, 1, 1);
377 MODULE_DEPEND(iwn, wlan, 1, 1, 1);
379 static d_ioctl_t iwn_cdev_ioctl;
380 static d_open_t iwn_cdev_open;
381 static d_close_t iwn_cdev_close;
383 static struct cdevsw iwn_cdevsw = {
384 .d_version = D_VERSION,
386 .d_open = iwn_cdev_open,
387 .d_close = iwn_cdev_close,
388 .d_ioctl = iwn_cdev_ioctl,
393 iwn_probe(device_t dev)
395 const struct iwn_ident *ident;
397 for (ident = iwn_ident_table; ident->name != NULL; ident++) {
398 if (pci_get_vendor(dev) == ident->vendor &&
399 pci_get_device(dev) == ident->device) {
400 device_set_desc(dev, ident->name);
401 return (BUS_PROBE_DEFAULT);
408 iwn_is_3stream_device(struct iwn_softc *sc)
410 /* XXX for now only 5300, until the 5350 can be tested */
411 if (sc->hw_type == IWN_HW_REV_TYPE_5300)
417 iwn_attach(device_t dev)
419 struct iwn_softc *sc = device_get_softc(dev);
420 struct ieee80211com *ic;
426 error = resource_int_value(device_get_name(sc->sc_dev),
427 device_get_unit(sc->sc_dev), "debug", &(sc->sc_debug));
434 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: begin\n",__func__);
437 * Get the offset of the PCI Express Capability Structure in PCI
438 * Configuration Space.
440 error = pci_find_cap(dev, PCIY_EXPRESS, &sc->sc_cap_off);
442 device_printf(dev, "PCIe capability structure not found!\n");
446 /* Clear device-specific "PCI retry timeout" register (41h). */
447 pci_write_config(dev, 0x41, 0, 1);
449 /* Enable bus-mastering. */
450 pci_enable_busmaster(dev);
453 sc->mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
455 if (sc->mem == NULL) {
456 device_printf(dev, "can't map mem space\n");
460 sc->sc_st = rman_get_bustag(sc->mem);
461 sc->sc_sh = rman_get_bushandle(sc->mem);
465 if (pci_alloc_msi(dev, &i) == 0)
467 /* Install interrupt handler. */
468 sc->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, RF_ACTIVE |
469 (rid != 0 ? 0 : RF_SHAREABLE));
470 if (sc->irq == NULL) {
471 device_printf(dev, "can't map interrupt\n");
478 /* Read hardware revision and attach. */
479 sc->hw_type = (IWN_READ(sc, IWN_HW_REV) >> IWN_HW_REV_TYPE_SHIFT)
480 & IWN_HW_REV_TYPE_MASK;
481 sc->subdevice_id = pci_get_subdevice(dev);
484 * 4965 versus 5000 and later have different methods.
485 * Let's set those up first.
487 if (sc->hw_type == IWN_HW_REV_TYPE_4965)
488 error = iwn4965_attach(sc, pci_get_device(dev));
490 error = iwn5000_attach(sc, pci_get_device(dev));
492 device_printf(dev, "could not attach device, error %d\n",
498 * Next, let's setup the various parameters of each NIC.
500 error = iwn_config_specific(sc, pci_get_device(dev));
502 device_printf(dev, "could not attach device, error %d\n",
507 if ((error = iwn_hw_prepare(sc)) != 0) {
508 device_printf(dev, "hardware not ready, error %d\n", error);
512 /* Allocate DMA memory for firmware transfers. */
513 if ((error = iwn_alloc_fwmem(sc)) != 0) {
515 "could not allocate memory for firmware, error %d\n",
520 /* Allocate "Keep Warm" page. */
521 if ((error = iwn_alloc_kw(sc)) != 0) {
523 "could not allocate keep warm page, error %d\n", error);
527 /* Allocate ICT table for 5000 Series. */
528 if (sc->hw_type != IWN_HW_REV_TYPE_4965 &&
529 (error = iwn_alloc_ict(sc)) != 0) {
530 device_printf(dev, "could not allocate ICT table, error %d\n",
535 /* Allocate TX scheduler "rings". */
536 if ((error = iwn_alloc_sched(sc)) != 0) {
538 "could not allocate TX scheduler rings, error %d\n", error);
542 /* Allocate TX rings (16 on 4965AGN, 20 on >=5000). */
543 for (i = 0; i < sc->ntxqs; i++) {
544 if ((error = iwn_alloc_tx_ring(sc, &sc->txq[i], i)) != 0) {
546 "could not allocate TX ring %d, error %d\n", i,
552 /* Allocate RX ring. */
553 if ((error = iwn_alloc_rx_ring(sc, &sc->rxq)) != 0) {
554 device_printf(dev, "could not allocate RX ring, error %d\n",
559 /* Clear pending interrupts. */
560 IWN_WRITE(sc, IWN_INT, 0xffffffff);
564 ic->ic_name = device_get_nameunit(dev);
565 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */
566 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */
568 /* Set device capabilities. */
570 IEEE80211_C_STA /* station mode supported */
571 | IEEE80211_C_MONITOR /* monitor mode supported */
573 | IEEE80211_C_BGSCAN /* background scanning */
575 | IEEE80211_C_TXPMGT /* tx power management */
576 | IEEE80211_C_SHSLOT /* short slot time supported */
578 | IEEE80211_C_SHPREAMBLE /* short preamble supported */
580 | IEEE80211_C_IBSS /* ibss/adhoc mode */
582 | IEEE80211_C_WME /* WME */
583 | IEEE80211_C_PMGT /* Station-side power mgmt */
586 /* Read MAC address, channels, etc from EEPROM. */
587 if ((error = iwn_read_eeprom(sc, ic->ic_macaddr)) != 0) {
588 device_printf(dev, "could not read EEPROM, error %d\n",
593 /* Count the number of available chains. */
595 ((sc->txchainmask >> 2) & 1) +
596 ((sc->txchainmask >> 1) & 1) +
597 ((sc->txchainmask >> 0) & 1);
599 ((sc->rxchainmask >> 2) & 1) +
600 ((sc->rxchainmask >> 1) & 1) +
601 ((sc->rxchainmask >> 0) & 1);
603 device_printf(dev, "MIMO %dT%dR, %.4s, address %6D\n",
604 sc->ntxchains, sc->nrxchains, sc->eeprom_domain,
605 ic->ic_macaddr, ":");
608 if (sc->sc_flags & IWN_FLAG_HAS_11N) {
609 ic->ic_rxstream = sc->nrxchains;
610 ic->ic_txstream = sc->ntxchains;
613 * Some of the 3 antenna devices (ie, the 4965) only supports
614 * 2x2 operation. So correct the number of streams if
615 * it's not a 3-stream device.
617 if (! iwn_is_3stream_device(sc)) {
618 if (ic->ic_rxstream > 2)
620 if (ic->ic_txstream > 2)
625 IEEE80211_HTCAP_SMPS_OFF /* SMPS mode disabled */
626 | IEEE80211_HTCAP_SHORTGI20 /* short GI in 20MHz */
627 | IEEE80211_HTCAP_CHWIDTH40 /* 40MHz channel width*/
628 | IEEE80211_HTCAP_SHORTGI40 /* short GI in 40MHz */
630 | IEEE80211_HTCAP_GREENFIELD
631 #if IWN_RBUF_SIZE == 8192
632 | IEEE80211_HTCAP_MAXAMSDU_7935 /* max A-MSDU length */
634 | IEEE80211_HTCAP_MAXAMSDU_3839 /* max A-MSDU length */
637 /* s/w capabilities */
638 | IEEE80211_HTC_HT /* HT operation */
639 | IEEE80211_HTC_AMPDU /* tx A-MPDU */
641 | IEEE80211_HTC_AMSDU /* tx A-MSDU */
646 ieee80211_ifattach(ic);
647 ic->ic_vap_create = iwn_vap_create;
648 ic->ic_ioctl = iwn_ioctl;
649 ic->ic_parent = iwn_parent;
650 ic->ic_vap_delete = iwn_vap_delete;
651 ic->ic_transmit = iwn_transmit;
652 ic->ic_raw_xmit = iwn_raw_xmit;
653 ic->ic_node_alloc = iwn_node_alloc;
654 sc->sc_ampdu_rx_start = ic->ic_ampdu_rx_start;
655 ic->ic_ampdu_rx_start = iwn_ampdu_rx_start;
656 sc->sc_ampdu_rx_stop = ic->ic_ampdu_rx_stop;
657 ic->ic_ampdu_rx_stop = iwn_ampdu_rx_stop;
658 sc->sc_addba_request = ic->ic_addba_request;
659 ic->ic_addba_request = iwn_addba_request;
660 sc->sc_addba_response = ic->ic_addba_response;
661 ic->ic_addba_response = iwn_addba_response;
662 sc->sc_addba_stop = ic->ic_addba_stop;
663 ic->ic_addba_stop = iwn_ampdu_tx_stop;
664 ic->ic_newassoc = iwn_newassoc;
665 ic->ic_wme.wme_update = iwn_updateedca;
666 ic->ic_update_mcast = iwn_update_mcast;
667 ic->ic_scan_start = iwn_scan_start;
668 ic->ic_scan_end = iwn_scan_end;
669 ic->ic_set_channel = iwn_set_channel;
670 ic->ic_scan_curchan = iwn_scan_curchan;
671 ic->ic_scan_mindwell = iwn_scan_mindwell;
672 ic->ic_getradiocaps = iwn_getradiocaps;
673 ic->ic_setregdomain = iwn_setregdomain;
675 iwn_radiotap_attach(sc);
677 callout_init_mtx(&sc->calib_to, &sc->sc_mtx, 0);
678 callout_init_mtx(&sc->watchdog_to, &sc->sc_mtx, 0);
679 TASK_INIT(&sc->sc_radioon_task, 0, iwn_radio_on, sc);
680 TASK_INIT(&sc->sc_radiooff_task, 0, iwn_radio_off, sc);
681 TASK_INIT(&sc->sc_panic_task, 0, iwn_panicked, sc);
682 TASK_INIT(&sc->sc_xmit_task, 0, iwn_xmit_task, sc);
684 mbufq_init(&sc->sc_xmit_queue, 1024);
686 sc->sc_tq = taskqueue_create("iwn_taskq", M_WAITOK,
687 taskqueue_thread_enqueue, &sc->sc_tq);
688 error = taskqueue_start_threads(&sc->sc_tq, 1, 0, "iwn_taskq");
690 device_printf(dev, "can't start threads, error %d\n", error);
694 iwn_sysctlattach(sc);
697 * Hook our interrupt after all initialization is complete.
699 error = bus_setup_intr(dev, sc->irq, INTR_TYPE_NET | INTR_MPSAFE,
700 NULL, iwn_intr, sc, &sc->sc_ih);
702 device_printf(dev, "can't establish interrupt, error %d\n",
708 device_printf(sc->sc_dev, "%s: rx_stats=%d, rx_stats_bt=%d\n",
710 sizeof(struct iwn_stats),
711 sizeof(struct iwn_stats_bt));
715 ieee80211_announce(ic);
716 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
718 /* Add debug ioctl right at the end */
719 sc->sc_cdev = make_dev(&iwn_cdevsw, device_get_unit(dev),
720 UID_ROOT, GID_WHEEL, 0600, "%s", device_get_nameunit(dev));
721 if (sc->sc_cdev == NULL) {
722 device_printf(dev, "failed to create debug character device\n");
724 sc->sc_cdev->si_drv1 = sc;
729 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end in error\n",__func__);
734 * Define specific configuration based on device id and subdevice id
735 * pid : PCI device id
738 iwn_config_specific(struct iwn_softc *sc, uint16_t pid)
747 sc->base_params = &iwn4965_base_params;
748 sc->limits = &iwn4965_sensitivity_limits;
749 sc->fwname = "iwn4965fw";
750 /* Override chains masks, ROM is known to be broken. */
751 sc->txchainmask = IWN_ANT_AB;
752 sc->rxchainmask = IWN_ANT_ABC;
753 /* Enable normal btcoex */
754 sc->sc_flags |= IWN_FLAG_BTCOEX;
759 switch(sc->subdevice_id) {
760 case IWN_SDID_1000_1:
761 case IWN_SDID_1000_2:
762 case IWN_SDID_1000_3:
763 case IWN_SDID_1000_4:
764 case IWN_SDID_1000_5:
765 case IWN_SDID_1000_6:
766 case IWN_SDID_1000_7:
767 case IWN_SDID_1000_8:
768 case IWN_SDID_1000_9:
769 case IWN_SDID_1000_10:
770 case IWN_SDID_1000_11:
771 case IWN_SDID_1000_12:
772 sc->limits = &iwn1000_sensitivity_limits;
773 sc->base_params = &iwn1000_base_params;
774 sc->fwname = "iwn1000fw";
777 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
778 "0x%04x rev %d not supported (subdevice)\n", pid,
779 sc->subdevice_id,sc->hw_type);
788 sc->fwname = "iwn6000fw";
789 sc->limits = &iwn6000_sensitivity_limits;
790 switch(sc->subdevice_id) {
791 case IWN_SDID_6x00_1:
792 case IWN_SDID_6x00_2:
793 case IWN_SDID_6x00_8:
795 sc->base_params = &iwn_6000_base_params;
797 case IWN_SDID_6x00_3:
798 case IWN_SDID_6x00_6:
799 case IWN_SDID_6x00_9:
801 case IWN_SDID_6x00_4:
802 case IWN_SDID_6x00_7:
803 case IWN_SDID_6x00_10:
805 case IWN_SDID_6x00_5:
807 sc->base_params = &iwn_6000i_base_params;
808 sc->sc_flags |= IWN_FLAG_INTERNAL_PA;
809 sc->txchainmask = IWN_ANT_BC;
810 sc->rxchainmask = IWN_ANT_BC;
813 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
814 "0x%04x rev %d not supported (subdevice)\n", pid,
815 sc->subdevice_id,sc->hw_type);
822 switch(sc->subdevice_id) {
823 case IWN_SDID_6x05_1:
824 case IWN_SDID_6x05_4:
825 case IWN_SDID_6x05_6:
827 case IWN_SDID_6x05_2:
828 case IWN_SDID_6x05_5:
829 case IWN_SDID_6x05_7:
831 case IWN_SDID_6x05_3:
833 case IWN_SDID_6x05_8:
834 case IWN_SDID_6x05_9:
835 //iwl6005_2agn_sff_cfg
836 case IWN_SDID_6x05_10:
838 case IWN_SDID_6x05_11:
839 //iwl6005_2agn_mow1_cfg
840 case IWN_SDID_6x05_12:
841 //iwl6005_2agn_mow2_cfg
842 sc->fwname = "iwn6000g2afw";
843 sc->limits = &iwn6000_sensitivity_limits;
844 sc->base_params = &iwn_6000g2_base_params;
847 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
848 "0x%04x rev %d not supported (subdevice)\n", pid,
849 sc->subdevice_id,sc->hw_type);
856 switch(sc->subdevice_id) {
857 case IWN_SDID_6035_1:
858 case IWN_SDID_6035_2:
859 case IWN_SDID_6035_3:
860 case IWN_SDID_6035_4:
861 sc->fwname = "iwn6000g2bfw";
862 sc->limits = &iwn6235_sensitivity_limits;
863 sc->base_params = &iwn_6235_base_params;
866 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
867 "0x%04x rev %d not supported (subdevice)\n", pid,
868 sc->subdevice_id,sc->hw_type);
872 /* 6x50 WiFi/WiMax Series */
875 switch(sc->subdevice_id) {
876 case IWN_SDID_6050_1:
877 case IWN_SDID_6050_3:
878 case IWN_SDID_6050_5:
880 case IWN_SDID_6050_2:
881 case IWN_SDID_6050_4:
882 case IWN_SDID_6050_6:
884 sc->fwname = "iwn6050fw";
885 sc->txchainmask = IWN_ANT_AB;
886 sc->rxchainmask = IWN_ANT_AB;
887 sc->limits = &iwn6000_sensitivity_limits;
888 sc->base_params = &iwn_6050_base_params;
891 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
892 "0x%04x rev %d not supported (subdevice)\n", pid,
893 sc->subdevice_id,sc->hw_type);
897 /* 6150 WiFi/WiMax Series */
900 switch(sc->subdevice_id) {
901 case IWN_SDID_6150_1:
902 case IWN_SDID_6150_3:
903 case IWN_SDID_6150_5:
905 case IWN_SDID_6150_2:
906 case IWN_SDID_6150_4:
907 case IWN_SDID_6150_6:
909 sc->fwname = "iwn6050fw";
910 sc->limits = &iwn6000_sensitivity_limits;
911 sc->base_params = &iwn_6150_base_params;
914 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
915 "0x%04x rev %d not supported (subdevice)\n", pid,
916 sc->subdevice_id,sc->hw_type);
920 /* 6030 Series and 1030 Series */
925 switch(sc->subdevice_id) {
926 case IWN_SDID_x030_1:
927 case IWN_SDID_x030_3:
928 case IWN_SDID_x030_5:
930 case IWN_SDID_x030_2:
931 case IWN_SDID_x030_4:
932 case IWN_SDID_x030_6:
934 case IWN_SDID_x030_7:
935 case IWN_SDID_x030_10:
936 case IWN_SDID_x030_14:
938 case IWN_SDID_x030_8:
939 case IWN_SDID_x030_11:
940 case IWN_SDID_x030_15:
942 case IWN_SDID_x030_9:
943 case IWN_SDID_x030_12:
944 case IWN_SDID_x030_16:
946 case IWN_SDID_x030_13:
948 sc->fwname = "iwn6000g2bfw";
949 sc->limits = &iwn6000_sensitivity_limits;
950 sc->base_params = &iwn_6000g2b_base_params;
953 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
954 "0x%04x rev %d not supported (subdevice)\n", pid,
955 sc->subdevice_id,sc->hw_type);
959 /* 130 Series WiFi */
960 /* XXX: This series will need adjustment for rate.
961 * see rx_with_siso_diversity in linux kernel
965 switch(sc->subdevice_id) {
974 sc->fwname = "iwn6000g2bfw";
975 sc->limits = &iwn6000_sensitivity_limits;
976 sc->base_params = &iwn_6000g2b_base_params;
979 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
980 "0x%04x rev %d not supported (subdevice)\n", pid,
981 sc->subdevice_id,sc->hw_type);
985 /* 100 Series WiFi */
988 switch(sc->subdevice_id) {
995 sc->limits = &iwn1000_sensitivity_limits;
996 sc->base_params = &iwn1000_base_params;
997 sc->fwname = "iwn100fw";
1000 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
1001 "0x%04x rev %d not supported (subdevice)\n", pid,
1002 sc->subdevice_id,sc->hw_type);
1008 /* XXX: This series will need adjustment for rate.
1009 * see rx_with_siso_diversity in linux kernel
1013 switch(sc->subdevice_id) {
1014 case IWN_SDID_105_1:
1015 case IWN_SDID_105_2:
1016 case IWN_SDID_105_3:
1018 case IWN_SDID_105_4:
1020 sc->limits = &iwn2030_sensitivity_limits;
1021 sc->base_params = &iwn2000_base_params;
1022 sc->fwname = "iwn105fw";
1025 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
1026 "0x%04x rev %d not supported (subdevice)\n", pid,
1027 sc->subdevice_id,sc->hw_type);
1033 /* XXX: This series will need adjustment for rate.
1034 * see rx_with_siso_diversity in linux kernel
1038 switch(sc->subdevice_id) {
1039 case IWN_SDID_135_1:
1040 case IWN_SDID_135_2:
1041 case IWN_SDID_135_3:
1042 sc->limits = &iwn2030_sensitivity_limits;
1043 sc->base_params = &iwn2030_base_params;
1044 sc->fwname = "iwn135fw";
1047 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
1048 "0x%04x rev %d not supported (subdevice)\n", pid,
1049 sc->subdevice_id,sc->hw_type);
1055 case IWN_DID_2x00_1:
1056 case IWN_DID_2x00_2:
1057 switch(sc->subdevice_id) {
1058 case IWN_SDID_2x00_1:
1059 case IWN_SDID_2x00_2:
1060 case IWN_SDID_2x00_3:
1062 case IWN_SDID_2x00_4:
1063 //iwl2000_2bgn_d_cfg
1064 sc->limits = &iwn2030_sensitivity_limits;
1065 sc->base_params = &iwn2000_base_params;
1066 sc->fwname = "iwn2000fw";
1069 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
1070 "0x%04x rev %d not supported (subdevice) \n",
1071 pid, sc->subdevice_id, sc->hw_type);
1076 case IWN_DID_2x30_1:
1077 case IWN_DID_2x30_2:
1078 switch(sc->subdevice_id) {
1079 case IWN_SDID_2x30_1:
1080 case IWN_SDID_2x30_3:
1081 case IWN_SDID_2x30_5:
1083 case IWN_SDID_2x30_2:
1084 case IWN_SDID_2x30_4:
1085 case IWN_SDID_2x30_6:
1087 sc->limits = &iwn2030_sensitivity_limits;
1088 sc->base_params = &iwn2030_base_params;
1089 sc->fwname = "iwn2030fw";
1092 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
1093 "0x%04x rev %d not supported (subdevice)\n", pid,
1094 sc->subdevice_id,sc->hw_type);
1099 case IWN_DID_5x00_1:
1100 case IWN_DID_5x00_2:
1101 case IWN_DID_5x00_3:
1102 case IWN_DID_5x00_4:
1103 sc->limits = &iwn5000_sensitivity_limits;
1104 sc->base_params = &iwn5000_base_params;
1105 sc->fwname = "iwn5000fw";
1106 switch(sc->subdevice_id) {
1107 case IWN_SDID_5x00_1:
1108 case IWN_SDID_5x00_2:
1109 case IWN_SDID_5x00_3:
1110 case IWN_SDID_5x00_4:
1111 case IWN_SDID_5x00_9:
1112 case IWN_SDID_5x00_10:
1113 case IWN_SDID_5x00_11:
1114 case IWN_SDID_5x00_12:
1115 case IWN_SDID_5x00_17:
1116 case IWN_SDID_5x00_18:
1117 case IWN_SDID_5x00_19:
1118 case IWN_SDID_5x00_20:
1120 sc->txchainmask = IWN_ANT_B;
1121 sc->rxchainmask = IWN_ANT_AB;
1123 case IWN_SDID_5x00_5:
1124 case IWN_SDID_5x00_6:
1125 case IWN_SDID_5x00_13:
1126 case IWN_SDID_5x00_14:
1127 case IWN_SDID_5x00_21:
1128 case IWN_SDID_5x00_22:
1130 sc->txchainmask = IWN_ANT_B;
1131 sc->rxchainmask = IWN_ANT_AB;
1133 case IWN_SDID_5x00_7:
1134 case IWN_SDID_5x00_8:
1135 case IWN_SDID_5x00_15:
1136 case IWN_SDID_5x00_16:
1137 case IWN_SDID_5x00_23:
1138 case IWN_SDID_5x00_24:
1140 sc->txchainmask = IWN_ANT_B;
1141 sc->rxchainmask = IWN_ANT_AB;
1143 case IWN_SDID_5x00_25:
1144 case IWN_SDID_5x00_26:
1145 case IWN_SDID_5x00_27:
1146 case IWN_SDID_5x00_28:
1147 case IWN_SDID_5x00_29:
1148 case IWN_SDID_5x00_30:
1149 case IWN_SDID_5x00_31:
1150 case IWN_SDID_5x00_32:
1151 case IWN_SDID_5x00_33:
1152 case IWN_SDID_5x00_34:
1153 case IWN_SDID_5x00_35:
1154 case IWN_SDID_5x00_36:
1156 sc->txchainmask = IWN_ANT_ABC;
1157 sc->rxchainmask = IWN_ANT_ABC;
1160 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
1161 "0x%04x rev %d not supported (subdevice)\n", pid,
1162 sc->subdevice_id,sc->hw_type);
1167 case IWN_DID_5x50_1:
1168 case IWN_DID_5x50_2:
1169 case IWN_DID_5x50_3:
1170 case IWN_DID_5x50_4:
1171 sc->limits = &iwn5000_sensitivity_limits;
1172 sc->base_params = &iwn5000_base_params;
1173 sc->fwname = "iwn5000fw";
1174 switch(sc->subdevice_id) {
1175 case IWN_SDID_5x50_1:
1176 case IWN_SDID_5x50_2:
1177 case IWN_SDID_5x50_3:
1179 sc->limits = &iwn5000_sensitivity_limits;
1180 sc->base_params = &iwn5000_base_params;
1181 sc->fwname = "iwn5000fw";
1183 case IWN_SDID_5x50_4:
1184 case IWN_SDID_5x50_5:
1185 case IWN_SDID_5x50_8:
1186 case IWN_SDID_5x50_9:
1187 case IWN_SDID_5x50_10:
1188 case IWN_SDID_5x50_11:
1190 case IWN_SDID_5x50_6:
1191 case IWN_SDID_5x50_7:
1192 case IWN_SDID_5x50_12:
1193 case IWN_SDID_5x50_13:
1195 sc->limits = &iwn5000_sensitivity_limits;
1196 sc->fwname = "iwn5150fw";
1197 sc->base_params = &iwn_5x50_base_params;
1200 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
1201 "0x%04x rev %d not supported (subdevice)\n", pid,
1202 sc->subdevice_id,sc->hw_type);
1207 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id : 0x%04x"
1208 "rev 0x%08x not supported (device)\n", pid, sc->subdevice_id,
1216 iwn4965_attach(struct iwn_softc *sc, uint16_t pid)
1218 struct iwn_ops *ops = &sc->ops;
1220 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
1221 ops->load_firmware = iwn4965_load_firmware;
1222 ops->read_eeprom = iwn4965_read_eeprom;
1223 ops->post_alive = iwn4965_post_alive;
1224 ops->nic_config = iwn4965_nic_config;
1225 ops->update_sched = iwn4965_update_sched;
1226 ops->get_temperature = iwn4965_get_temperature;
1227 ops->get_rssi = iwn4965_get_rssi;
1228 ops->set_txpower = iwn4965_set_txpower;
1229 ops->init_gains = iwn4965_init_gains;
1230 ops->set_gains = iwn4965_set_gains;
1231 ops->add_node = iwn4965_add_node;
1232 ops->tx_done = iwn4965_tx_done;
1233 ops->ampdu_tx_start = iwn4965_ampdu_tx_start;
1234 ops->ampdu_tx_stop = iwn4965_ampdu_tx_stop;
1235 sc->ntxqs = IWN4965_NTXQUEUES;
1236 sc->firstaggqueue = IWN4965_FIRSTAGGQUEUE;
1237 sc->ndmachnls = IWN4965_NDMACHNLS;
1238 sc->broadcast_id = IWN4965_ID_BROADCAST;
1239 sc->rxonsz = IWN4965_RXONSZ;
1240 sc->schedsz = IWN4965_SCHEDSZ;
1241 sc->fw_text_maxsz = IWN4965_FW_TEXT_MAXSZ;
1242 sc->fw_data_maxsz = IWN4965_FW_DATA_MAXSZ;
1243 sc->fwsz = IWN4965_FWSZ;
1244 sc->sched_txfact_addr = IWN4965_SCHED_TXFACT;
1245 sc->limits = &iwn4965_sensitivity_limits;
1246 sc->fwname = "iwn4965fw";
1247 /* Override chains masks, ROM is known to be broken. */
1248 sc->txchainmask = IWN_ANT_AB;
1249 sc->rxchainmask = IWN_ANT_ABC;
1250 /* Enable normal btcoex */
1251 sc->sc_flags |= IWN_FLAG_BTCOEX;
1253 DPRINTF(sc, IWN_DEBUG_TRACE, "%s: end\n",__func__);
1259 iwn5000_attach(struct iwn_softc *sc, uint16_t pid)
1261 struct iwn_ops *ops = &sc->ops;
1263 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
1265 ops->load_firmware = iwn5000_load_firmware;
1266 ops->read_eeprom = iwn5000_read_eeprom;
1267 ops->post_alive = iwn5000_post_alive;
1268 ops->nic_config = iwn5000_nic_config;
1269 ops->update_sched = iwn5000_update_sched;
1270 ops->get_temperature = iwn5000_get_temperature;
1271 ops->get_rssi = iwn5000_get_rssi;
1272 ops->set_txpower = iwn5000_set_txpower;
1273 ops->init_gains = iwn5000_init_gains;
1274 ops->set_gains = iwn5000_set_gains;
1275 ops->add_node = iwn5000_add_node;
1276 ops->tx_done = iwn5000_tx_done;
1277 ops->ampdu_tx_start = iwn5000_ampdu_tx_start;
1278 ops->ampdu_tx_stop = iwn5000_ampdu_tx_stop;
1279 sc->ntxqs = IWN5000_NTXQUEUES;
1280 sc->firstaggqueue = IWN5000_FIRSTAGGQUEUE;
1281 sc->ndmachnls = IWN5000_NDMACHNLS;
1282 sc->broadcast_id = IWN5000_ID_BROADCAST;
1283 sc->rxonsz = IWN5000_RXONSZ;
1284 sc->schedsz = IWN5000_SCHEDSZ;
1285 sc->fw_text_maxsz = IWN5000_FW_TEXT_MAXSZ;
1286 sc->fw_data_maxsz = IWN5000_FW_DATA_MAXSZ;
1287 sc->fwsz = IWN5000_FWSZ;
1288 sc->sched_txfact_addr = IWN5000_SCHED_TXFACT;
1289 sc->reset_noise_gain = IWN5000_PHY_CALIB_RESET_NOISE_GAIN;
1290 sc->noise_gain = IWN5000_PHY_CALIB_NOISE_GAIN;
1296 * Attach the interface to 802.11 radiotap.
1299 iwn_radiotap_attach(struct iwn_softc *sc)
1302 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
1303 ieee80211_radiotap_attach(&sc->sc_ic,
1304 &sc->sc_txtap.wt_ihdr, sizeof(sc->sc_txtap),
1305 IWN_TX_RADIOTAP_PRESENT,
1306 &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap),
1307 IWN_RX_RADIOTAP_PRESENT);
1308 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
1312 iwn_sysctlattach(struct iwn_softc *sc)
1315 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->sc_dev);
1316 struct sysctl_oid *tree = device_get_sysctl_tree(sc->sc_dev);
1318 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
1319 "debug", CTLFLAG_RW, &sc->sc_debug, sc->sc_debug,
1320 "control debugging printfs");
1324 static struct ieee80211vap *
1325 iwn_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit,
1326 enum ieee80211_opmode opmode, int flags,
1327 const uint8_t bssid[IEEE80211_ADDR_LEN],
1328 const uint8_t mac[IEEE80211_ADDR_LEN])
1330 struct iwn_softc *sc = ic->ic_softc;
1331 struct iwn_vap *ivp;
1332 struct ieee80211vap *vap;
1334 if (!TAILQ_EMPTY(&ic->ic_vaps)) /* only one at a time */
1337 ivp = malloc(sizeof(struct iwn_vap), M_80211_VAP, M_WAITOK | M_ZERO);
1339 ieee80211_vap_setup(ic, vap, name, unit, opmode, flags, bssid);
1340 ivp->ctx = IWN_RXON_BSS_CTX;
1341 vap->iv_bmissthreshold = 10; /* override default */
1342 /* Override with driver methods. */
1343 ivp->iv_newstate = vap->iv_newstate;
1344 vap->iv_newstate = iwn_newstate;
1345 sc->ivap[IWN_RXON_BSS_CTX] = vap;
1347 ieee80211_ratectl_init(vap);
1348 /* Complete setup. */
1349 ieee80211_vap_attach(vap, iwn_media_change, ieee80211_media_status,
1351 ic->ic_opmode = opmode;
1356 iwn_vap_delete(struct ieee80211vap *vap)
1358 struct iwn_vap *ivp = IWN_VAP(vap);
1360 ieee80211_ratectl_deinit(vap);
1361 ieee80211_vap_detach(vap);
1362 free(ivp, M_80211_VAP);
1366 iwn_xmit_queue_drain(struct iwn_softc *sc)
1369 struct ieee80211_node *ni;
1371 IWN_LOCK_ASSERT(sc);
1372 while ((m = mbufq_dequeue(&sc->sc_xmit_queue)) != NULL) {
1373 ni = (struct ieee80211_node *)m->m_pkthdr.rcvif;
1374 ieee80211_free_node(ni);
1380 iwn_xmit_queue_enqueue(struct iwn_softc *sc, struct mbuf *m)
1383 IWN_LOCK_ASSERT(sc);
1384 return (mbufq_enqueue(&sc->sc_xmit_queue, m));
1388 iwn_detach(device_t dev)
1390 struct iwn_softc *sc = device_get_softc(dev);
1393 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
1395 if (sc->sc_ic.ic_softc != NULL) {
1396 /* Free the mbuf queue and node references */
1398 iwn_xmit_queue_drain(sc);
1401 ieee80211_draintask(&sc->sc_ic, &sc->sc_radioon_task);
1402 ieee80211_draintask(&sc->sc_ic, &sc->sc_radiooff_task);
1405 taskqueue_drain_all(sc->sc_tq);
1406 taskqueue_free(sc->sc_tq);
1408 callout_drain(&sc->watchdog_to);
1409 callout_drain(&sc->calib_to);
1410 ieee80211_ifdetach(&sc->sc_ic);
1413 /* Uninstall interrupt handler. */
1414 if (sc->irq != NULL) {
1415 bus_teardown_intr(dev, sc->irq, sc->sc_ih);
1416 bus_release_resource(dev, SYS_RES_IRQ, rman_get_rid(sc->irq),
1418 pci_release_msi(dev);
1421 /* Free DMA resources. */
1422 iwn_free_rx_ring(sc, &sc->rxq);
1423 for (qid = 0; qid < sc->ntxqs; qid++)
1424 iwn_free_tx_ring(sc, &sc->txq[qid]);
1427 if (sc->ict != NULL)
1431 if (sc->mem != NULL)
1432 bus_release_resource(dev, SYS_RES_MEMORY,
1433 rman_get_rid(sc->mem), sc->mem);
1436 destroy_dev(sc->sc_cdev);
1440 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n", __func__);
1441 IWN_LOCK_DESTROY(sc);
1446 iwn_shutdown(device_t dev)
1448 struct iwn_softc *sc = device_get_softc(dev);
1455 iwn_suspend(device_t dev)
1457 struct iwn_softc *sc = device_get_softc(dev);
1459 ieee80211_suspend_all(&sc->sc_ic);
1464 iwn_resume(device_t dev)
1466 struct iwn_softc *sc = device_get_softc(dev);
1468 /* Clear device-specific "PCI retry timeout" register (41h). */
1469 pci_write_config(dev, 0x41, 0, 1);
1471 ieee80211_resume_all(&sc->sc_ic);
1476 iwn_nic_lock(struct iwn_softc *sc)
1480 /* Request exclusive access to NIC. */
1481 IWN_SETBITS(sc, IWN_GP_CNTRL, IWN_GP_CNTRL_MAC_ACCESS_REQ);
1483 /* Spin until we actually get the lock. */
1484 for (ntries = 0; ntries < 1000; ntries++) {
1485 if ((IWN_READ(sc, IWN_GP_CNTRL) &
1486 (IWN_GP_CNTRL_MAC_ACCESS_ENA | IWN_GP_CNTRL_SLEEP)) ==
1487 IWN_GP_CNTRL_MAC_ACCESS_ENA)
1494 static __inline void
1495 iwn_nic_unlock(struct iwn_softc *sc)
1497 IWN_CLRBITS(sc, IWN_GP_CNTRL, IWN_GP_CNTRL_MAC_ACCESS_REQ);
1500 static __inline uint32_t
1501 iwn_prph_read(struct iwn_softc *sc, uint32_t addr)
1503 IWN_WRITE(sc, IWN_PRPH_RADDR, IWN_PRPH_DWORD | addr);
1504 IWN_BARRIER_READ_WRITE(sc);
1505 return IWN_READ(sc, IWN_PRPH_RDATA);
1508 static __inline void
1509 iwn_prph_write(struct iwn_softc *sc, uint32_t addr, uint32_t data)
1511 IWN_WRITE(sc, IWN_PRPH_WADDR, IWN_PRPH_DWORD | addr);
1512 IWN_BARRIER_WRITE(sc);
1513 IWN_WRITE(sc, IWN_PRPH_WDATA, data);
1516 static __inline void
1517 iwn_prph_setbits(struct iwn_softc *sc, uint32_t addr, uint32_t mask)
1519 iwn_prph_write(sc, addr, iwn_prph_read(sc, addr) | mask);
1522 static __inline void
1523 iwn_prph_clrbits(struct iwn_softc *sc, uint32_t addr, uint32_t mask)
1525 iwn_prph_write(sc, addr, iwn_prph_read(sc, addr) & ~mask);
1528 static __inline void
1529 iwn_prph_write_region_4(struct iwn_softc *sc, uint32_t addr,
1530 const uint32_t *data, int count)
1532 for (; count > 0; count--, data++, addr += 4)
1533 iwn_prph_write(sc, addr, *data);
1536 static __inline uint32_t
1537 iwn_mem_read(struct iwn_softc *sc, uint32_t addr)
1539 IWN_WRITE(sc, IWN_MEM_RADDR, addr);
1540 IWN_BARRIER_READ_WRITE(sc);
1541 return IWN_READ(sc, IWN_MEM_RDATA);
1544 static __inline void
1545 iwn_mem_write(struct iwn_softc *sc, uint32_t addr, uint32_t data)
1547 IWN_WRITE(sc, IWN_MEM_WADDR, addr);
1548 IWN_BARRIER_WRITE(sc);
1549 IWN_WRITE(sc, IWN_MEM_WDATA, data);
1552 static __inline void
1553 iwn_mem_write_2(struct iwn_softc *sc, uint32_t addr, uint16_t data)
1557 tmp = iwn_mem_read(sc, addr & ~3);
1559 tmp = (tmp & 0x0000ffff) | data << 16;
1561 tmp = (tmp & 0xffff0000) | data;
1562 iwn_mem_write(sc, addr & ~3, tmp);
1565 static __inline void
1566 iwn_mem_read_region_4(struct iwn_softc *sc, uint32_t addr, uint32_t *data,
1569 for (; count > 0; count--, addr += 4)
1570 *data++ = iwn_mem_read(sc, addr);
1573 static __inline void
1574 iwn_mem_set_region_4(struct iwn_softc *sc, uint32_t addr, uint32_t val,
1577 for (; count > 0; count--, addr += 4)
1578 iwn_mem_write(sc, addr, val);
1582 iwn_eeprom_lock(struct iwn_softc *sc)
1586 for (i = 0; i < 100; i++) {
1587 /* Request exclusive access to EEPROM. */
1588 IWN_SETBITS(sc, IWN_HW_IF_CONFIG,
1589 IWN_HW_IF_CONFIG_EEPROM_LOCKED);
1591 /* Spin until we actually get the lock. */
1592 for (ntries = 0; ntries < 100; ntries++) {
1593 if (IWN_READ(sc, IWN_HW_IF_CONFIG) &
1594 IWN_HW_IF_CONFIG_EEPROM_LOCKED)
1599 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end timeout\n", __func__);
1603 static __inline void
1604 iwn_eeprom_unlock(struct iwn_softc *sc)
1606 IWN_CLRBITS(sc, IWN_HW_IF_CONFIG, IWN_HW_IF_CONFIG_EEPROM_LOCKED);
1610 * Initialize access by host to One Time Programmable ROM.
1611 * NB: This kind of ROM can be found on 1000 or 6000 Series only.
1614 iwn_init_otprom(struct iwn_softc *sc)
1616 uint16_t prev, base, next;
1619 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
1621 /* Wait for clock stabilization before accessing prph. */
1622 if ((error = iwn_clock_wait(sc)) != 0)
1625 if ((error = iwn_nic_lock(sc)) != 0)
1627 iwn_prph_setbits(sc, IWN_APMG_PS, IWN_APMG_PS_RESET_REQ);
1629 iwn_prph_clrbits(sc, IWN_APMG_PS, IWN_APMG_PS_RESET_REQ);
1632 /* Set auto clock gate disable bit for HW with OTP shadow RAM. */
1633 if (sc->base_params->shadow_ram_support) {
1634 IWN_SETBITS(sc, IWN_DBG_LINK_PWR_MGMT,
1635 IWN_RESET_LINK_PWR_MGMT_DIS);
1637 IWN_CLRBITS(sc, IWN_EEPROM_GP, IWN_EEPROM_GP_IF_OWNER);
1638 /* Clear ECC status. */
1639 IWN_SETBITS(sc, IWN_OTP_GP,
1640 IWN_OTP_GP_ECC_CORR_STTS | IWN_OTP_GP_ECC_UNCORR_STTS);
1643 * Find the block before last block (contains the EEPROM image)
1644 * for HW without OTP shadow RAM.
1646 if (! sc->base_params->shadow_ram_support) {
1647 /* Switch to absolute addressing mode. */
1648 IWN_CLRBITS(sc, IWN_OTP_GP, IWN_OTP_GP_RELATIVE_ACCESS);
1650 for (count = 0; count < sc->base_params->max_ll_items;
1652 error = iwn_read_prom_data(sc, base, &next, 2);
1655 if (next == 0) /* End of linked-list. */
1658 base = le16toh(next);
1660 if (count == 0 || count == sc->base_params->max_ll_items)
1662 /* Skip "next" word. */
1663 sc->prom_base = prev + 1;
1666 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
1672 iwn_read_prom_data(struct iwn_softc *sc, uint32_t addr, void *data, int count)
1674 uint8_t *out = data;
1678 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
1680 addr += sc->prom_base;
1681 for (; count > 0; count -= 2, addr++) {
1682 IWN_WRITE(sc, IWN_EEPROM, addr << 2);
1683 for (ntries = 0; ntries < 10; ntries++) {
1684 val = IWN_READ(sc, IWN_EEPROM);
1685 if (val & IWN_EEPROM_READ_VALID)
1690 device_printf(sc->sc_dev,
1691 "timeout reading ROM at 0x%x\n", addr);
1694 if (sc->sc_flags & IWN_FLAG_HAS_OTPROM) {
1695 /* OTPROM, check for ECC errors. */
1696 tmp = IWN_READ(sc, IWN_OTP_GP);
1697 if (tmp & IWN_OTP_GP_ECC_UNCORR_STTS) {
1698 device_printf(sc->sc_dev,
1699 "OTPROM ECC error at 0x%x\n", addr);
1702 if (tmp & IWN_OTP_GP_ECC_CORR_STTS) {
1703 /* Correctable ECC error, clear bit. */
1704 IWN_SETBITS(sc, IWN_OTP_GP,
1705 IWN_OTP_GP_ECC_CORR_STTS);
1713 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
1719 iwn_dma_map_addr(void *arg, bus_dma_segment_t *segs, int nsegs, int error)
1723 KASSERT(nsegs == 1, ("too many DMA segments, %d should be 1", nsegs));
1724 *(bus_addr_t *)arg = segs[0].ds_addr;
1728 iwn_dma_contig_alloc(struct iwn_softc *sc, struct iwn_dma_info *dma,
1729 void **kvap, bus_size_t size, bus_size_t alignment)
1736 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), alignment,
1737 0, BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, size,
1738 1, size, 0, NULL, NULL, &dma->tag);
1742 error = bus_dmamem_alloc(dma->tag, (void **)&dma->vaddr,
1743 BUS_DMA_NOWAIT | BUS_DMA_ZERO | BUS_DMA_COHERENT, &dma->map);
1747 error = bus_dmamap_load(dma->tag, dma->map, dma->vaddr, size,
1748 iwn_dma_map_addr, &dma->paddr, BUS_DMA_NOWAIT);
1752 bus_dmamap_sync(dma->tag, dma->map, BUS_DMASYNC_PREWRITE);
1759 fail: iwn_dma_contig_free(dma);
1764 iwn_dma_contig_free(struct iwn_dma_info *dma)
1766 if (dma->vaddr != NULL) {
1767 bus_dmamap_sync(dma->tag, dma->map,
1768 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
1769 bus_dmamap_unload(dma->tag, dma->map);
1770 bus_dmamem_free(dma->tag, dma->vaddr, dma->map);
1773 if (dma->tag != NULL) {
1774 bus_dma_tag_destroy(dma->tag);
1780 iwn_alloc_sched(struct iwn_softc *sc)
1782 /* TX scheduler rings must be aligned on a 1KB boundary. */
1783 return iwn_dma_contig_alloc(sc, &sc->sched_dma, (void **)&sc->sched,
1788 iwn_free_sched(struct iwn_softc *sc)
1790 iwn_dma_contig_free(&sc->sched_dma);
1794 iwn_alloc_kw(struct iwn_softc *sc)
1796 /* "Keep Warm" page must be aligned on a 4KB boundary. */
1797 return iwn_dma_contig_alloc(sc, &sc->kw_dma, NULL, 4096, 4096);
1801 iwn_free_kw(struct iwn_softc *sc)
1803 iwn_dma_contig_free(&sc->kw_dma);
1807 iwn_alloc_ict(struct iwn_softc *sc)
1809 /* ICT table must be aligned on a 4KB boundary. */
1810 return iwn_dma_contig_alloc(sc, &sc->ict_dma, (void **)&sc->ict,
1811 IWN_ICT_SIZE, 4096);
1815 iwn_free_ict(struct iwn_softc *sc)
1817 iwn_dma_contig_free(&sc->ict_dma);
1821 iwn_alloc_fwmem(struct iwn_softc *sc)
1823 /* Must be aligned on a 16-byte boundary. */
1824 return iwn_dma_contig_alloc(sc, &sc->fw_dma, NULL, sc->fwsz, 16);
1828 iwn_free_fwmem(struct iwn_softc *sc)
1830 iwn_dma_contig_free(&sc->fw_dma);
1834 iwn_alloc_rx_ring(struct iwn_softc *sc, struct iwn_rx_ring *ring)
1841 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
1843 /* Allocate RX descriptors (256-byte aligned). */
1844 size = IWN_RX_RING_COUNT * sizeof (uint32_t);
1845 error = iwn_dma_contig_alloc(sc, &ring->desc_dma, (void **)&ring->desc,
1848 device_printf(sc->sc_dev,
1849 "%s: could not allocate RX ring DMA memory, error %d\n",
1854 /* Allocate RX status area (16-byte aligned). */
1855 error = iwn_dma_contig_alloc(sc, &ring->stat_dma, (void **)&ring->stat,
1856 sizeof (struct iwn_rx_status), 16);
1858 device_printf(sc->sc_dev,
1859 "%s: could not allocate RX status DMA memory, error %d\n",
1864 /* Create RX buffer DMA tag. */
1865 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 1, 0,
1866 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL,
1867 IWN_RBUF_SIZE, 1, IWN_RBUF_SIZE, 0, NULL, NULL, &ring->data_dmat);
1869 device_printf(sc->sc_dev,
1870 "%s: could not create RX buf DMA tag, error %d\n",
1876 * Allocate and map RX buffers.
1878 for (i = 0; i < IWN_RX_RING_COUNT; i++) {
1879 struct iwn_rx_data *data = &ring->data[i];
1882 error = bus_dmamap_create(ring->data_dmat, 0, &data->map);
1884 device_printf(sc->sc_dev,
1885 "%s: could not create RX buf DMA map, error %d\n",
1890 data->m = m_getjcl(M_NOWAIT, MT_DATA, M_PKTHDR,
1892 if (data->m == NULL) {
1893 device_printf(sc->sc_dev,
1894 "%s: could not allocate RX mbuf\n", __func__);
1899 error = bus_dmamap_load(ring->data_dmat, data->map,
1900 mtod(data->m, void *), IWN_RBUF_SIZE, iwn_dma_map_addr,
1901 &paddr, BUS_DMA_NOWAIT);
1902 if (error != 0 && error != EFBIG) {
1903 device_printf(sc->sc_dev,
1904 "%s: can't map mbuf, error %d\n", __func__,
1909 /* Set physical address of RX buffer (256-byte aligned). */
1910 ring->desc[i] = htole32(paddr >> 8);
1913 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
1914 BUS_DMASYNC_PREWRITE);
1916 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
1920 fail: iwn_free_rx_ring(sc, ring);
1922 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end in error\n",__func__);
1928 iwn_reset_rx_ring(struct iwn_softc *sc, struct iwn_rx_ring *ring)
1932 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
1934 if (iwn_nic_lock(sc) == 0) {
1935 IWN_WRITE(sc, IWN_FH_RX_CONFIG, 0);
1936 for (ntries = 0; ntries < 1000; ntries++) {
1937 if (IWN_READ(sc, IWN_FH_RX_STATUS) &
1938 IWN_FH_RX_STATUS_IDLE)
1945 sc->last_rx_valid = 0;
1949 iwn_free_rx_ring(struct iwn_softc *sc, struct iwn_rx_ring *ring)
1953 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s \n", __func__);
1955 iwn_dma_contig_free(&ring->desc_dma);
1956 iwn_dma_contig_free(&ring->stat_dma);
1958 for (i = 0; i < IWN_RX_RING_COUNT; i++) {
1959 struct iwn_rx_data *data = &ring->data[i];
1961 if (data->m != NULL) {
1962 bus_dmamap_sync(ring->data_dmat, data->map,
1963 BUS_DMASYNC_POSTREAD);
1964 bus_dmamap_unload(ring->data_dmat, data->map);
1968 if (data->map != NULL)
1969 bus_dmamap_destroy(ring->data_dmat, data->map);
1971 if (ring->data_dmat != NULL) {
1972 bus_dma_tag_destroy(ring->data_dmat);
1973 ring->data_dmat = NULL;
1978 iwn_alloc_tx_ring(struct iwn_softc *sc, struct iwn_tx_ring *ring, int qid)
1988 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
1990 /* Allocate TX descriptors (256-byte aligned). */
1991 size = IWN_TX_RING_COUNT * sizeof (struct iwn_tx_desc);
1992 error = iwn_dma_contig_alloc(sc, &ring->desc_dma, (void **)&ring->desc,
1995 device_printf(sc->sc_dev,
1996 "%s: could not allocate TX ring DMA memory, error %d\n",
2001 size = IWN_TX_RING_COUNT * sizeof (struct iwn_tx_cmd);
2002 error = iwn_dma_contig_alloc(sc, &ring->cmd_dma, (void **)&ring->cmd,
2005 device_printf(sc->sc_dev,
2006 "%s: could not allocate TX cmd DMA memory, error %d\n",
2011 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 1, 0,
2012 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES,
2013 IWN_MAX_SCATTER - 1, MCLBYTES, 0, NULL, NULL, &ring->data_dmat);
2015 device_printf(sc->sc_dev,
2016 "%s: could not create TX buf DMA tag, error %d\n",
2021 paddr = ring->cmd_dma.paddr;
2022 for (i = 0; i < IWN_TX_RING_COUNT; i++) {
2023 struct iwn_tx_data *data = &ring->data[i];
2025 data->cmd_paddr = paddr;
2026 data->scratch_paddr = paddr + 12;
2027 paddr += sizeof (struct iwn_tx_cmd);
2029 error = bus_dmamap_create(ring->data_dmat, 0, &data->map);
2031 device_printf(sc->sc_dev,
2032 "%s: could not create TX buf DMA map, error %d\n",
2038 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
2042 fail: iwn_free_tx_ring(sc, ring);
2043 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end in error\n", __func__);
2048 iwn_reset_tx_ring(struct iwn_softc *sc, struct iwn_tx_ring *ring)
2052 DPRINTF(sc, IWN_DEBUG_TRACE, "->doing %s \n", __func__);
2054 for (i = 0; i < IWN_TX_RING_COUNT; i++) {
2055 struct iwn_tx_data *data = &ring->data[i];
2057 if (data->m != NULL) {
2058 bus_dmamap_sync(ring->data_dmat, data->map,
2059 BUS_DMASYNC_POSTWRITE);
2060 bus_dmamap_unload(ring->data_dmat, data->map);
2064 if (data->ni != NULL) {
2065 ieee80211_free_node(data->ni);
2069 /* Clear TX descriptors. */
2070 memset(ring->desc, 0, ring->desc_dma.size);
2071 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
2072 BUS_DMASYNC_PREWRITE);
2073 sc->qfullmsk &= ~(1 << ring->qid);
2079 iwn_free_tx_ring(struct iwn_softc *sc, struct iwn_tx_ring *ring)
2083 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s \n", __func__);
2085 iwn_dma_contig_free(&ring->desc_dma);
2086 iwn_dma_contig_free(&ring->cmd_dma);
2088 for (i = 0; i < IWN_TX_RING_COUNT; i++) {
2089 struct iwn_tx_data *data = &ring->data[i];
2091 if (data->m != NULL) {
2092 bus_dmamap_sync(ring->data_dmat, data->map,
2093 BUS_DMASYNC_POSTWRITE);
2094 bus_dmamap_unload(ring->data_dmat, data->map);
2097 if (data->map != NULL)
2098 bus_dmamap_destroy(ring->data_dmat, data->map);
2100 if (ring->data_dmat != NULL) {
2101 bus_dma_tag_destroy(ring->data_dmat);
2102 ring->data_dmat = NULL;
2107 iwn5000_ict_reset(struct iwn_softc *sc)
2109 /* Disable interrupts. */
2110 IWN_WRITE(sc, IWN_INT_MASK, 0);
2112 /* Reset ICT table. */
2113 memset(sc->ict, 0, IWN_ICT_SIZE);
2116 /* Set physical address of ICT table (4KB aligned). */
2117 DPRINTF(sc, IWN_DEBUG_RESET, "%s: enabling ICT\n", __func__);
2118 IWN_WRITE(sc, IWN_DRAM_INT_TBL, IWN_DRAM_INT_TBL_ENABLE |
2119 IWN_DRAM_INT_TBL_WRAP_CHECK | sc->ict_dma.paddr >> 12);
2121 /* Enable periodic RX interrupt. */
2122 sc->int_mask |= IWN_INT_RX_PERIODIC;
2123 /* Switch to ICT interrupt mode in driver. */
2124 sc->sc_flags |= IWN_FLAG_USE_ICT;
2126 /* Re-enable interrupts. */
2127 IWN_WRITE(sc, IWN_INT, 0xffffffff);
2128 IWN_WRITE(sc, IWN_INT_MASK, sc->int_mask);
2132 iwn_read_eeprom(struct iwn_softc *sc, uint8_t macaddr[IEEE80211_ADDR_LEN])
2134 struct iwn_ops *ops = &sc->ops;
2138 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
2140 /* Check whether adapter has an EEPROM or an OTPROM. */
2141 if (sc->hw_type >= IWN_HW_REV_TYPE_1000 &&
2142 (IWN_READ(sc, IWN_OTP_GP) & IWN_OTP_GP_DEV_SEL_OTP))
2143 sc->sc_flags |= IWN_FLAG_HAS_OTPROM;
2144 DPRINTF(sc, IWN_DEBUG_RESET, "%s found\n",
2145 (sc->sc_flags & IWN_FLAG_HAS_OTPROM) ? "OTPROM" : "EEPROM");
2147 /* Adapter has to be powered on for EEPROM access to work. */
2148 if ((error = iwn_apm_init(sc)) != 0) {
2149 device_printf(sc->sc_dev,
2150 "%s: could not power ON adapter, error %d\n", __func__,
2155 if ((IWN_READ(sc, IWN_EEPROM_GP) & 0x7) == 0) {
2156 device_printf(sc->sc_dev, "%s: bad ROM signature\n", __func__);
2159 if ((error = iwn_eeprom_lock(sc)) != 0) {
2160 device_printf(sc->sc_dev, "%s: could not lock ROM, error %d\n",
2164 if (sc->sc_flags & IWN_FLAG_HAS_OTPROM) {
2165 if ((error = iwn_init_otprom(sc)) != 0) {
2166 device_printf(sc->sc_dev,
2167 "%s: could not initialize OTPROM, error %d\n",
2173 iwn_read_prom_data(sc, IWN_EEPROM_SKU_CAP, &val, 2);
2174 DPRINTF(sc, IWN_DEBUG_RESET, "SKU capabilities=0x%04x\n", le16toh(val));
2175 /* Check if HT support is bonded out. */
2176 if (val & htole16(IWN_EEPROM_SKU_CAP_11N))
2177 sc->sc_flags |= IWN_FLAG_HAS_11N;
2179 iwn_read_prom_data(sc, IWN_EEPROM_RFCFG, &val, 2);
2180 sc->rfcfg = le16toh(val);
2181 DPRINTF(sc, IWN_DEBUG_RESET, "radio config=0x%04x\n", sc->rfcfg);
2182 /* Read Tx/Rx chains from ROM unless it's known to be broken. */
2183 if (sc->txchainmask == 0)
2184 sc->txchainmask = IWN_RFCFG_TXANTMSK(sc->rfcfg);
2185 if (sc->rxchainmask == 0)
2186 sc->rxchainmask = IWN_RFCFG_RXANTMSK(sc->rfcfg);
2188 /* Read MAC address. */
2189 iwn_read_prom_data(sc, IWN_EEPROM_MAC, macaddr, 6);
2191 /* Read adapter-specific information from EEPROM. */
2192 ops->read_eeprom(sc);
2194 iwn_apm_stop(sc); /* Power OFF adapter. */
2196 iwn_eeprom_unlock(sc);
2198 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
2204 iwn4965_read_eeprom(struct iwn_softc *sc)
2210 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
2212 /* Read regulatory domain (4 ASCII characters). */
2213 iwn_read_prom_data(sc, IWN4965_EEPROM_DOMAIN, sc->eeprom_domain, 4);
2215 /* Read the list of authorized channels (20MHz ones only). */
2216 for (i = 0; i < IWN_NBANDS - 1; i++) {
2217 addr = iwn4965_regulatory_bands[i];
2218 iwn_read_eeprom_channels(sc, i, addr);
2221 /* Read maximum allowed TX power for 2GHz and 5GHz bands. */
2222 iwn_read_prom_data(sc, IWN4965_EEPROM_MAXPOW, &val, 2);
2223 sc->maxpwr2GHz = val & 0xff;
2224 sc->maxpwr5GHz = val >> 8;
2225 /* Check that EEPROM values are within valid range. */
2226 if (sc->maxpwr5GHz < 20 || sc->maxpwr5GHz > 50)
2227 sc->maxpwr5GHz = 38;
2228 if (sc->maxpwr2GHz < 20 || sc->maxpwr2GHz > 50)
2229 sc->maxpwr2GHz = 38;
2230 DPRINTF(sc, IWN_DEBUG_RESET, "maxpwr 2GHz=%d 5GHz=%d\n",
2231 sc->maxpwr2GHz, sc->maxpwr5GHz);
2233 /* Read samples for each TX power group. */
2234 iwn_read_prom_data(sc, IWN4965_EEPROM_BANDS, sc->bands,
2237 /* Read voltage at which samples were taken. */
2238 iwn_read_prom_data(sc, IWN4965_EEPROM_VOLTAGE, &val, 2);
2239 sc->eeprom_voltage = (int16_t)le16toh(val);
2240 DPRINTF(sc, IWN_DEBUG_RESET, "voltage=%d (in 0.3V)\n",
2241 sc->eeprom_voltage);
2244 /* Print samples. */
2245 if (sc->sc_debug & IWN_DEBUG_ANY) {
2246 for (i = 0; i < IWN_NBANDS - 1; i++)
2247 iwn4965_print_power_group(sc, i);
2251 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
2256 iwn4965_print_power_group(struct iwn_softc *sc, int i)
2258 struct iwn4965_eeprom_band *band = &sc->bands[i];
2259 struct iwn4965_eeprom_chan_samples *chans = band->chans;
2262 printf("===band %d===\n", i);
2263 printf("chan lo=%d, chan hi=%d\n", band->lo, band->hi);
2264 printf("chan1 num=%d\n", chans[0].num);
2265 for (c = 0; c < 2; c++) {
2266 for (j = 0; j < IWN_NSAMPLES; j++) {
2267 printf("chain %d, sample %d: temp=%d gain=%d "
2268 "power=%d pa_det=%d\n", c, j,
2269 chans[0].samples[c][j].temp,
2270 chans[0].samples[c][j].gain,
2271 chans[0].samples[c][j].power,
2272 chans[0].samples[c][j].pa_det);
2275 printf("chan2 num=%d\n", chans[1].num);
2276 for (c = 0; c < 2; c++) {
2277 for (j = 0; j < IWN_NSAMPLES; j++) {
2278 printf("chain %d, sample %d: temp=%d gain=%d "
2279 "power=%d pa_det=%d\n", c, j,
2280 chans[1].samples[c][j].temp,
2281 chans[1].samples[c][j].gain,
2282 chans[1].samples[c][j].power,
2283 chans[1].samples[c][j].pa_det);
2290 iwn5000_read_eeprom(struct iwn_softc *sc)
2292 struct iwn5000_eeprom_calib_hdr hdr;
2294 uint32_t base, addr;
2298 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
2300 /* Read regulatory domain (4 ASCII characters). */
2301 iwn_read_prom_data(sc, IWN5000_EEPROM_REG, &val, 2);
2302 base = le16toh(val);
2303 iwn_read_prom_data(sc, base + IWN5000_EEPROM_DOMAIN,
2304 sc->eeprom_domain, 4);
2306 /* Read the list of authorized channels (20MHz ones only). */
2307 for (i = 0; i < IWN_NBANDS - 1; i++) {
2308 addr = base + sc->base_params->regulatory_bands[i];
2309 iwn_read_eeprom_channels(sc, i, addr);
2312 /* Read enhanced TX power information for 6000 Series. */
2313 if (sc->base_params->enhanced_TX_power)
2314 iwn_read_eeprom_enhinfo(sc);
2316 iwn_read_prom_data(sc, IWN5000_EEPROM_CAL, &val, 2);
2317 base = le16toh(val);
2318 iwn_read_prom_data(sc, base, &hdr, sizeof hdr);
2319 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
2320 "%s: calib version=%u pa type=%u voltage=%u\n", __func__,
2321 hdr.version, hdr.pa_type, le16toh(hdr.volt));
2322 sc->calib_ver = hdr.version;
2324 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSETv2) {
2325 sc->eeprom_voltage = le16toh(hdr.volt);
2326 iwn_read_prom_data(sc, base + IWN5000_EEPROM_TEMP, &val, 2);
2327 sc->eeprom_temp_high=le16toh(val);
2328 iwn_read_prom_data(sc, base + IWN5000_EEPROM_VOLT, &val, 2);
2329 sc->eeprom_temp = le16toh(val);
2332 if (sc->hw_type == IWN_HW_REV_TYPE_5150) {
2333 /* Compute temperature offset. */
2334 iwn_read_prom_data(sc, base + IWN5000_EEPROM_TEMP, &val, 2);
2335 sc->eeprom_temp = le16toh(val);
2336 iwn_read_prom_data(sc, base + IWN5000_EEPROM_VOLT, &val, 2);
2337 volt = le16toh(val);
2338 sc->temp_off = sc->eeprom_temp - (volt / -5);
2339 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "temp=%d volt=%d offset=%dK\n",
2340 sc->eeprom_temp, volt, sc->temp_off);
2342 /* Read crystal calibration. */
2343 iwn_read_prom_data(sc, base + IWN5000_EEPROM_CRYSTAL,
2344 &sc->eeprom_crystal, sizeof (uint32_t));
2345 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "crystal calibration 0x%08x\n",
2346 le32toh(sc->eeprom_crystal));
2349 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
2354 * Translate EEPROM flags to net80211.
2357 iwn_eeprom_channel_flags(struct iwn_eeprom_chan *channel)
2362 if ((channel->flags & IWN_EEPROM_CHAN_ACTIVE) == 0)
2363 nflags |= IEEE80211_CHAN_PASSIVE;
2364 if ((channel->flags & IWN_EEPROM_CHAN_IBSS) == 0)
2365 nflags |= IEEE80211_CHAN_NOADHOC;
2366 if (channel->flags & IWN_EEPROM_CHAN_RADAR) {
2367 nflags |= IEEE80211_CHAN_DFS;
2368 /* XXX apparently IBSS may still be marked */
2369 nflags |= IEEE80211_CHAN_NOADHOC;
2376 iwn_read_eeprom_band(struct iwn_softc *sc, int n, int maxchans, int *nchans,
2377 struct ieee80211_channel chans[])
2379 struct iwn_eeprom_chan *channels = sc->eeprom_channels[n];
2380 const struct iwn_chan_band *band = &iwn_bands[n];
2381 uint8_t bands[IEEE80211_MODE_BYTES];
2383 int i, error, nflags;
2385 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
2387 memset(bands, 0, sizeof(bands));
2389 setbit(bands, IEEE80211_MODE_11B);
2390 setbit(bands, IEEE80211_MODE_11G);
2391 if (sc->sc_flags & IWN_FLAG_HAS_11N)
2392 setbit(bands, IEEE80211_MODE_11NG);
2394 setbit(bands, IEEE80211_MODE_11A);
2395 if (sc->sc_flags & IWN_FLAG_HAS_11N)
2396 setbit(bands, IEEE80211_MODE_11NA);
2399 for (i = 0; i < band->nchan; i++) {
2400 if (!(channels[i].flags & IWN_EEPROM_CHAN_VALID)) {
2401 DPRINTF(sc, IWN_DEBUG_RESET,
2402 "skip chan %d flags 0x%x maxpwr %d\n",
2403 band->chan[i], channels[i].flags,
2404 channels[i].maxpwr);
2408 chan = band->chan[i];
2409 nflags = iwn_eeprom_channel_flags(&channels[i]);
2410 error = ieee80211_add_channel(chans, maxchans, nchans,
2411 chan, 0, channels[i].maxpwr, nflags, bands);
2415 /* Save maximum allowed TX power for this channel. */
2417 sc->maxpwr[chan] = channels[i].maxpwr;
2419 DPRINTF(sc, IWN_DEBUG_RESET,
2420 "add chan %d flags 0x%x maxpwr %d\n", chan,
2421 channels[i].flags, channels[i].maxpwr);
2424 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
2429 iwn_read_eeprom_ht40(struct iwn_softc *sc, int n, int maxchans, int *nchans,
2430 struct ieee80211_channel chans[])
2432 struct iwn_eeprom_chan *channels = sc->eeprom_channels[n];
2433 const struct iwn_chan_band *band = &iwn_bands[n];
2435 int i, error, nflags;
2437 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s start\n", __func__);
2439 if (!(sc->sc_flags & IWN_FLAG_HAS_11N)) {
2440 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end no 11n\n", __func__);
2444 for (i = 0; i < band->nchan; i++) {
2445 if (!(channels[i].flags & IWN_EEPROM_CHAN_VALID)) {
2446 DPRINTF(sc, IWN_DEBUG_RESET,
2447 "skip chan %d flags 0x%x maxpwr %d\n",
2448 band->chan[i], channels[i].flags,
2449 channels[i].maxpwr);
2453 chan = band->chan[i];
2454 nflags = iwn_eeprom_channel_flags(&channels[i]);
2455 nflags |= (n == 5 ? IEEE80211_CHAN_G : IEEE80211_CHAN_A);
2456 error = ieee80211_add_channel_ht40(chans, maxchans, nchans,
2457 chan, channels[i].maxpwr, nflags);
2460 device_printf(sc->sc_dev,
2461 "%s: no entry for channel %d\n", __func__, chan);
2464 DPRINTF(sc, IWN_DEBUG_RESET,
2465 "%s: skip chan %d, extension channel not found\n",
2469 device_printf(sc->sc_dev,
2470 "%s: channel table is full!\n", __func__);
2473 DPRINTF(sc, IWN_DEBUG_RESET,
2474 "add ht40 chan %d flags 0x%x maxpwr %d\n",
2475 chan, channels[i].flags, channels[i].maxpwr);
2482 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
2487 iwn_read_eeprom_channels(struct iwn_softc *sc, int n, uint32_t addr)
2489 struct ieee80211com *ic = &sc->sc_ic;
2491 iwn_read_prom_data(sc, addr, &sc->eeprom_channels[n],
2492 iwn_bands[n].nchan * sizeof (struct iwn_eeprom_chan));
2495 iwn_read_eeprom_band(sc, n, IEEE80211_CHAN_MAX, &ic->ic_nchans,
2498 iwn_read_eeprom_ht40(sc, n, IEEE80211_CHAN_MAX, &ic->ic_nchans,
2501 ieee80211_sort_channels(ic->ic_channels, ic->ic_nchans);
2504 static struct iwn_eeprom_chan *
2505 iwn_find_eeprom_channel(struct iwn_softc *sc, struct ieee80211_channel *c)
2507 int band, chan, i, j;
2509 if (IEEE80211_IS_CHAN_HT40(c)) {
2510 band = IEEE80211_IS_CHAN_5GHZ(c) ? 6 : 5;
2511 if (IEEE80211_IS_CHAN_HT40D(c))
2512 chan = c->ic_extieee;
2515 for (i = 0; i < iwn_bands[band].nchan; i++) {
2516 if (iwn_bands[band].chan[i] == chan)
2517 return &sc->eeprom_channels[band][i];
2520 for (j = 0; j < 5; j++) {
2521 for (i = 0; i < iwn_bands[j].nchan; i++) {
2522 if (iwn_bands[j].chan[i] == c->ic_ieee &&
2523 ((j == 0) ^ IEEE80211_IS_CHAN_A(c)) == 1)
2524 return &sc->eeprom_channels[j][i];
2532 iwn_getradiocaps(struct ieee80211com *ic,
2533 int maxchans, int *nchans, struct ieee80211_channel chans[])
2535 struct iwn_softc *sc = ic->ic_softc;
2538 /* Parse the list of authorized channels. */
2539 for (i = 0; i < 5 && *nchans < maxchans; i++)
2540 iwn_read_eeprom_band(sc, i, maxchans, nchans, chans);
2541 for (i = 5; i < IWN_NBANDS - 1 && *nchans < maxchans; i++)
2542 iwn_read_eeprom_ht40(sc, i, maxchans, nchans, chans);
2546 * Enforce flags read from EEPROM.
2549 iwn_setregdomain(struct ieee80211com *ic, struct ieee80211_regdomain *rd,
2550 int nchan, struct ieee80211_channel chans[])
2552 struct iwn_softc *sc = ic->ic_softc;
2555 for (i = 0; i < nchan; i++) {
2556 struct ieee80211_channel *c = &chans[i];
2557 struct iwn_eeprom_chan *channel;
2559 channel = iwn_find_eeprom_channel(sc, c);
2560 if (channel == NULL) {
2561 ic_printf(ic, "%s: invalid channel %u freq %u/0x%x\n",
2562 __func__, c->ic_ieee, c->ic_freq, c->ic_flags);
2565 c->ic_flags |= iwn_eeprom_channel_flags(channel);
2572 iwn_read_eeprom_enhinfo(struct iwn_softc *sc)
2574 struct iwn_eeprom_enhinfo enhinfo[35];
2575 struct ieee80211com *ic = &sc->sc_ic;
2576 struct ieee80211_channel *c;
2582 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
2584 iwn_read_prom_data(sc, IWN5000_EEPROM_REG, &val, 2);
2585 base = le16toh(val);
2586 iwn_read_prom_data(sc, base + IWN6000_EEPROM_ENHINFO,
2587 enhinfo, sizeof enhinfo);
2589 for (i = 0; i < nitems(enhinfo); i++) {
2590 flags = enhinfo[i].flags;
2591 if (!(flags & IWN_ENHINFO_VALID))
2592 continue; /* Skip invalid entries. */
2595 if (sc->txchainmask & IWN_ANT_A)
2596 maxpwr = MAX(maxpwr, enhinfo[i].chain[0]);
2597 if (sc->txchainmask & IWN_ANT_B)
2598 maxpwr = MAX(maxpwr, enhinfo[i].chain[1]);
2599 if (sc->txchainmask & IWN_ANT_C)
2600 maxpwr = MAX(maxpwr, enhinfo[i].chain[2]);
2601 if (sc->ntxchains == 2)
2602 maxpwr = MAX(maxpwr, enhinfo[i].mimo2);
2603 else if (sc->ntxchains == 3)
2604 maxpwr = MAX(maxpwr, enhinfo[i].mimo3);
2606 for (j = 0; j < ic->ic_nchans; j++) {
2607 c = &ic->ic_channels[j];
2608 if ((flags & IWN_ENHINFO_5GHZ)) {
2609 if (!IEEE80211_IS_CHAN_A(c))
2611 } else if ((flags & IWN_ENHINFO_OFDM)) {
2612 if (!IEEE80211_IS_CHAN_G(c))
2614 } else if (!IEEE80211_IS_CHAN_B(c))
2616 if ((flags & IWN_ENHINFO_HT40)) {
2617 if (!IEEE80211_IS_CHAN_HT40(c))
2620 if (IEEE80211_IS_CHAN_HT40(c))
2623 if (enhinfo[i].chan != 0 &&
2624 enhinfo[i].chan != c->ic_ieee)
2627 DPRINTF(sc, IWN_DEBUG_RESET,
2628 "channel %d(%x), maxpwr %d\n", c->ic_ieee,
2629 c->ic_flags, maxpwr / 2);
2630 c->ic_maxregpower = maxpwr / 2;
2631 c->ic_maxpower = maxpwr;
2635 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
2639 static struct ieee80211_node *
2640 iwn_node_alloc(struct ieee80211vap *vap, const uint8_t mac[IEEE80211_ADDR_LEN])
2642 return malloc(sizeof (struct iwn_node), M_80211_NODE,M_NOWAIT | M_ZERO);
2648 switch (rate & 0xff) {
2649 case 12: return 0xd;
2650 case 18: return 0xf;
2651 case 24: return 0x5;
2652 case 36: return 0x7;
2653 case 48: return 0x9;
2654 case 72: return 0xb;
2655 case 96: return 0x1;
2656 case 108: return 0x3;
2660 case 22: return 110;
2666 iwn_get_1stream_tx_antmask(struct iwn_softc *sc)
2669 return IWN_LSB(sc->txchainmask);
2673 iwn_get_2stream_tx_antmask(struct iwn_softc *sc)
2678 * The '2 stream' setup is a bit .. odd.
2680 * For NICs that support only 1 antenna, default to IWN_ANT_AB or
2681 * the firmware panics (eg Intel 5100.)
2683 * For NICs that support two antennas, we use ANT_AB.
2685 * For NICs that support three antennas, we use the two that
2686 * wasn't the default one.
2688 * XXX TODO: if bluetooth (full concurrent) is enabled, restrict
2689 * this to only one antenna.
2692 /* Default - transmit on the other antennas */
2693 tx = (sc->txchainmask & ~IWN_LSB(sc->txchainmask));
2695 /* Now, if it's zero, set it to IWN_ANT_AB, so to not panic firmware */
2700 * If the NIC is a two-stream TX NIC, configure the TX mask to
2701 * the default chainmask
2703 else if (sc->ntxchains == 2)
2704 tx = sc->txchainmask;
2712 * Calculate the required PLCP value from the given rate,
2713 * to the given node.
2715 * This will take the node configuration (eg 11n, rate table
2716 * setup, etc) into consideration.
2719 iwn_rate_to_plcp(struct iwn_softc *sc, struct ieee80211_node *ni,
2722 struct ieee80211com *ic = ni->ni_ic;
2727 * If it's an MCS rate, let's set the plcp correctly
2728 * and set the relevant flags based on the node config.
2730 if (rate & IEEE80211_RATE_MCS) {
2732 * Set the initial PLCP value to be between 0->31 for
2733 * MCS 0 -> MCS 31, then set the "I'm an MCS rate!"
2736 plcp = IEEE80211_RV(rate) | IWN_RFLAG_MCS;
2739 * XXX the following should only occur if both
2740 * the local configuration _and_ the remote node
2741 * advertise these capabilities. Thus this code
2746 * Set the channel width and guard interval.
2748 if (IEEE80211_IS_CHAN_HT40(ni->ni_chan)) {
2749 plcp |= IWN_RFLAG_HT40;
2750 if (ni->ni_htcap & IEEE80211_HTCAP_SHORTGI40)
2751 plcp |= IWN_RFLAG_SGI;
2752 } else if (ni->ni_htcap & IEEE80211_HTCAP_SHORTGI20) {
2753 plcp |= IWN_RFLAG_SGI;
2757 * Ensure the selected rate matches the link quality
2758 * table entries being used.
2761 plcp |= IWN_RFLAG_ANT(sc->txchainmask);
2762 else if (rate > 0x87)
2763 plcp |= IWN_RFLAG_ANT(iwn_get_2stream_tx_antmask(sc));
2765 plcp |= IWN_RFLAG_ANT(iwn_get_1stream_tx_antmask(sc));
2768 * Set the initial PLCP - fine for both
2769 * OFDM and CCK rates.
2771 plcp = rate2plcp(rate);
2773 /* Set CCK flag if it's CCK */
2775 /* XXX It would be nice to have a method
2776 * to map the ridx -> phy table entry
2777 * so we could just query that, rather than
2778 * this hack to check against IWN_RIDX_OFDM6.
2780 ridx = ieee80211_legacy_rate_lookup(ic->ic_rt,
2781 rate & IEEE80211_RATE_VAL);
2782 if (ridx < IWN_RIDX_OFDM6 &&
2783 IEEE80211_IS_CHAN_2GHZ(ni->ni_chan))
2784 plcp |= IWN_RFLAG_CCK;
2786 /* Set antenna configuration */
2787 /* XXX TODO: is this the right antenna to use for legacy? */
2788 plcp |= IWN_RFLAG_ANT(iwn_get_1stream_tx_antmask(sc));
2791 DPRINTF(sc, IWN_DEBUG_TXRATE, "%s: rate=0x%02x, plcp=0x%08x\n",
2796 return (htole32(plcp));
2800 iwn_newassoc(struct ieee80211_node *ni, int isnew)
2802 /* Doesn't do anything at the moment */
2806 iwn_media_change(struct ifnet *ifp)
2810 error = ieee80211_media_change(ifp);
2811 /* NB: only the fixed rate can change and that doesn't need a reset */
2812 return (error == ENETRESET ? 0 : error);
2816 iwn_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg)
2818 struct iwn_vap *ivp = IWN_VAP(vap);
2819 struct ieee80211com *ic = vap->iv_ic;
2820 struct iwn_softc *sc = ic->ic_softc;
2823 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
2825 DPRINTF(sc, IWN_DEBUG_STATE, "%s: %s -> %s\n", __func__,
2826 ieee80211_state_name[vap->iv_state], ieee80211_state_name[nstate]);
2828 IEEE80211_UNLOCK(ic);
2830 callout_stop(&sc->calib_to);
2832 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX];
2835 case IEEE80211_S_ASSOC:
2836 if (vap->iv_state != IEEE80211_S_RUN)
2839 case IEEE80211_S_AUTH:
2840 if (vap->iv_state == IEEE80211_S_AUTH)
2844 * !AUTH -> AUTH transition requires state reset to handle
2845 * reassociations correctly.
2847 sc->rxon->associd = 0;
2848 sc->rxon->filter &= ~htole32(IWN_FILTER_BSS);
2849 sc->calib.state = IWN_CALIB_STATE_INIT;
2851 /* Wait until we hear a beacon before we transmit */
2852 if (IEEE80211_IS_CHAN_PASSIVE(ic->ic_curchan))
2853 sc->sc_beacon_wait = 1;
2855 if ((error = iwn_auth(sc, vap)) != 0) {
2856 device_printf(sc->sc_dev,
2857 "%s: could not move to auth state\n", __func__);
2861 case IEEE80211_S_RUN:
2863 * RUN -> RUN transition; Just restart the timers.
2865 if (vap->iv_state == IEEE80211_S_RUN) {
2870 /* Wait until we hear a beacon before we transmit */
2871 if (IEEE80211_IS_CHAN_PASSIVE(ic->ic_curchan))
2872 sc->sc_beacon_wait = 1;
2875 * !RUN -> RUN requires setting the association id
2876 * which is done with a firmware cmd. We also defer
2877 * starting the timers until that work is done.
2879 if ((error = iwn_run(sc, vap)) != 0) {
2880 device_printf(sc->sc_dev,
2881 "%s: could not move to run state\n", __func__);
2885 case IEEE80211_S_INIT:
2886 sc->calib.state = IWN_CALIB_STATE_INIT;
2888 * Purge the xmit queue so we don't have old frames
2889 * during a new association attempt.
2891 sc->sc_beacon_wait = 0;
2892 iwn_xmit_queue_drain(sc);
2901 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end in error\n", __func__);
2905 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
2907 return ivp->iv_newstate(vap, nstate, arg);
2911 iwn_calib_timeout(void *arg)
2913 struct iwn_softc *sc = arg;
2915 IWN_LOCK_ASSERT(sc);
2917 /* Force automatic TX power calibration every 60 secs. */
2918 if (++sc->calib_cnt >= 120) {
2921 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s\n",
2922 "sending request for statistics");
2923 (void)iwn_cmd(sc, IWN_CMD_GET_STATISTICS, &flags,
2927 callout_reset(&sc->calib_to, msecs_to_ticks(500), iwn_calib_timeout,
2932 * Process an RX_PHY firmware notification. This is usually immediately
2933 * followed by an MPDU_RX_DONE notification.
2936 iwn_rx_phy(struct iwn_softc *sc, struct iwn_rx_desc *desc,
2937 struct iwn_rx_data *data)
2939 struct iwn_rx_stat *stat = (struct iwn_rx_stat *)(desc + 1);
2941 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: received PHY stats\n", __func__);
2942 bus_dmamap_sync(sc->rxq.data_dmat, data->map, BUS_DMASYNC_POSTREAD);
2944 /* Save RX statistics, they will be used on MPDU_RX_DONE. */
2945 memcpy(&sc->last_rx_stat, stat, sizeof (*stat));
2946 sc->last_rx_valid = 1;
2950 * Process an RX_DONE (4965AGN only) or MPDU_RX_DONE firmware notification.
2951 * Each MPDU_RX_DONE notification must be preceded by an RX_PHY one.
2954 iwn_rx_done(struct iwn_softc *sc, struct iwn_rx_desc *desc,
2955 struct iwn_rx_data *data)
2957 struct iwn_ops *ops = &sc->ops;
2958 struct ieee80211com *ic = &sc->sc_ic;
2959 struct iwn_rx_ring *ring = &sc->rxq;
2960 struct ieee80211_frame *wh;
2961 struct ieee80211_node *ni;
2962 struct mbuf *m, *m1;
2963 struct iwn_rx_stat *stat;
2967 int error, len, rssi, nf;
2969 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
2971 if (desc->type == IWN_MPDU_RX_DONE) {
2972 /* Check for prior RX_PHY notification. */
2973 if (!sc->last_rx_valid) {
2974 DPRINTF(sc, IWN_DEBUG_ANY,
2975 "%s: missing RX_PHY\n", __func__);
2978 stat = &sc->last_rx_stat;
2980 stat = (struct iwn_rx_stat *)(desc + 1);
2982 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_POSTREAD);
2984 if (stat->cfg_phy_len > IWN_STAT_MAXLEN) {
2985 device_printf(sc->sc_dev,
2986 "%s: invalid RX statistic header, len %d\n", __func__,
2990 if (desc->type == IWN_MPDU_RX_DONE) {
2991 struct iwn_rx_mpdu *mpdu = (struct iwn_rx_mpdu *)(desc + 1);
2992 head = (caddr_t)(mpdu + 1);
2993 len = le16toh(mpdu->len);
2995 head = (caddr_t)(stat + 1) + stat->cfg_phy_len;
2996 len = le16toh(stat->len);
2999 flags = le32toh(*(uint32_t *)(head + len));
3001 /* Discard frames with a bad FCS early. */
3002 if ((flags & IWN_RX_NOERROR) != IWN_RX_NOERROR) {
3003 DPRINTF(sc, IWN_DEBUG_RECV, "%s: RX flags error %x\n",
3005 counter_u64_add(ic->ic_ierrors, 1);
3008 /* Discard frames that are too short. */
3009 if (len < sizeof (struct ieee80211_frame_ack)) {
3010 DPRINTF(sc, IWN_DEBUG_RECV, "%s: frame too short: %d\n",
3012 counter_u64_add(ic->ic_ierrors, 1);
3016 m1 = m_getjcl(M_NOWAIT, MT_DATA, M_PKTHDR, IWN_RBUF_SIZE);
3018 DPRINTF(sc, IWN_DEBUG_ANY, "%s: no mbuf to restock ring\n",
3020 counter_u64_add(ic->ic_ierrors, 1);
3023 bus_dmamap_unload(ring->data_dmat, data->map);
3025 error = bus_dmamap_load(ring->data_dmat, data->map, mtod(m1, void *),
3026 IWN_RBUF_SIZE, iwn_dma_map_addr, &paddr, BUS_DMA_NOWAIT);
3027 if (error != 0 && error != EFBIG) {
3028 device_printf(sc->sc_dev,
3029 "%s: bus_dmamap_load failed, error %d\n", __func__, error);
3032 /* Try to reload the old mbuf. */
3033 error = bus_dmamap_load(ring->data_dmat, data->map,
3034 mtod(data->m, void *), IWN_RBUF_SIZE, iwn_dma_map_addr,
3035 &paddr, BUS_DMA_NOWAIT);
3036 if (error != 0 && error != EFBIG) {
3037 panic("%s: could not load old RX mbuf", __func__);
3039 /* Physical address may have changed. */
3040 ring->desc[ring->cur] = htole32(paddr >> 8);
3041 bus_dmamap_sync(ring->data_dmat, ring->desc_dma.map,
3042 BUS_DMASYNC_PREWRITE);
3043 counter_u64_add(ic->ic_ierrors, 1);
3049 /* Update RX descriptor. */
3050 ring->desc[ring->cur] = htole32(paddr >> 8);
3051 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
3052 BUS_DMASYNC_PREWRITE);
3054 /* Finalize mbuf. */
3056 m->m_pkthdr.len = m->m_len = len;
3058 /* Grab a reference to the source node. */
3059 wh = mtod(m, struct ieee80211_frame *);
3060 if (len >= sizeof(struct ieee80211_frame_min))
3061 ni = ieee80211_find_rxnode(ic, (struct ieee80211_frame_min *)wh);
3064 nf = (ni != NULL && ni->ni_vap->iv_state == IEEE80211_S_RUN &&
3065 (ic->ic_flags & IEEE80211_F_SCAN) == 0) ? sc->noise : -95;
3067 rssi = ops->get_rssi(sc, stat);
3069 if (ieee80211_radiotap_active(ic)) {
3070 struct iwn_rx_radiotap_header *tap = &sc->sc_rxtap;
3073 if (stat->flags & htole16(IWN_STAT_FLAG_SHPREAMBLE))
3074 tap->wr_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
3075 tap->wr_dbm_antsignal = (int8_t)rssi;
3076 tap->wr_dbm_antnoise = (int8_t)nf;
3077 tap->wr_tsft = stat->tstamp;
3078 switch (stat->rate) {
3080 case 10: tap->wr_rate = 2; break;
3081 case 20: tap->wr_rate = 4; break;
3082 case 55: tap->wr_rate = 11; break;
3083 case 110: tap->wr_rate = 22; break;
3085 case 0xd: tap->wr_rate = 12; break;
3086 case 0xf: tap->wr_rate = 18; break;
3087 case 0x5: tap->wr_rate = 24; break;
3088 case 0x7: tap->wr_rate = 36; break;
3089 case 0x9: tap->wr_rate = 48; break;
3090 case 0xb: tap->wr_rate = 72; break;
3091 case 0x1: tap->wr_rate = 96; break;
3092 case 0x3: tap->wr_rate = 108; break;
3093 /* Unknown rate: should not happen. */
3094 default: tap->wr_rate = 0;
3099 * If it's a beacon and we're waiting, then do the
3100 * wakeup. This should unblock raw_xmit/start.
3102 if (sc->sc_beacon_wait) {
3103 uint8_t type, subtype;
3104 /* NB: Re-assign wh */
3105 wh = mtod(m, struct ieee80211_frame *);
3106 type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK;
3107 subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
3109 * This assumes at this point we've received our own
3112 DPRINTF(sc, IWN_DEBUG_TRACE,
3113 "%s: beacon_wait, type=%d, subtype=%d\n",
3114 __func__, type, subtype);
3115 if (type == IEEE80211_FC0_TYPE_MGT &&
3116 subtype == IEEE80211_FC0_SUBTYPE_BEACON) {
3117 DPRINTF(sc, IWN_DEBUG_TRACE | IWN_DEBUG_XMIT,
3118 "%s: waking things up\n", __func__);
3119 /* queue taskqueue to transmit! */
3120 taskqueue_enqueue(sc->sc_tq, &sc->sc_xmit_task);
3126 /* Send the frame to the 802.11 layer. */
3128 if (ni->ni_flags & IEEE80211_NODE_HT)
3129 m->m_flags |= M_AMPDU;
3130 (void)ieee80211_input(ni, m, rssi - nf, nf);
3131 /* Node is no longer needed. */
3132 ieee80211_free_node(ni);
3134 (void)ieee80211_input_all(ic, m, rssi - nf, nf);
3138 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
3142 /* Process an incoming Compressed BlockAck. */
3144 iwn_rx_compressed_ba(struct iwn_softc *sc, struct iwn_rx_desc *desc,
3145 struct iwn_rx_data *data)
3147 struct iwn_ops *ops = &sc->ops;
3148 struct iwn_node *wn;
3149 struct ieee80211_node *ni;
3150 struct iwn_compressed_ba *ba = (struct iwn_compressed_ba *)(desc + 1);
3151 struct iwn_tx_ring *txq;
3152 struct iwn_tx_data *txdata;
3153 struct ieee80211_tx_ampdu *tap;
3158 int ackfailcnt = 0, i, lastidx, qid, *res, shift;
3159 int tx_ok = 0, tx_err = 0;
3161 DPRINTF(sc, IWN_DEBUG_TRACE | IWN_DEBUG_XMIT, "->%s begin\n", __func__);
3163 bus_dmamap_sync(sc->rxq.data_dmat, data->map, BUS_DMASYNC_POSTREAD);
3165 qid = le16toh(ba->qid);
3166 txq = &sc->txq[ba->qid];
3167 tap = sc->qid2tap[ba->qid];
3169 wn = (void *)tap->txa_ni;
3173 if (!IEEE80211_AMPDU_RUNNING(tap)) {
3174 res = tap->txa_private;
3175 ssn = tap->txa_start & 0xfff;
3178 for (lastidx = le16toh(ba->ssn) & 0xff; txq->read != lastidx;) {
3179 txdata = &txq->data[txq->read];
3181 /* Unmap and free mbuf. */
3182 bus_dmamap_sync(txq->data_dmat, txdata->map,
3183 BUS_DMASYNC_POSTWRITE);
3184 bus_dmamap_unload(txq->data_dmat, txdata->map);
3185 m = txdata->m, txdata->m = NULL;
3186 ni = txdata->ni, txdata->ni = NULL;
3188 KASSERT(ni != NULL, ("no node"));
3189 KASSERT(m != NULL, ("no mbuf"));
3191 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: freeing m=%p\n", __func__, m);
3192 ieee80211_tx_complete(ni, m, 1);
3195 txq->read = (txq->read + 1) % IWN_TX_RING_COUNT;
3198 if (txq->queued == 0 && res != NULL) {
3200 ops->ampdu_tx_stop(sc, qid, tid, ssn);
3202 sc->qid2tap[qid] = NULL;
3203 free(res, M_DEVBUF);
3207 if (wn->agg[tid].bitmap == 0)
3210 shift = wn->agg[tid].startidx - ((le16toh(ba->seq) >> 4) & 0xff);
3214 if (wn->agg[tid].nframes > (64 - shift))
3218 * Walk the bitmap and calculate how many successful and failed
3219 * attempts are made.
3221 * Yes, the rate control code doesn't know these are A-MPDU
3222 * subframes and that it's okay to fail some of these.
3225 bitmap = (le64toh(ba->bitmap) >> shift) & wn->agg[tid].bitmap;
3226 for (i = 0; bitmap; i++) {
3227 if ((bitmap & 1) == 0) {
3229 ieee80211_ratectl_tx_complete(ni->ni_vap, ni,
3230 IEEE80211_RATECTL_TX_FAILURE, &ackfailcnt, NULL);
3233 ieee80211_ratectl_tx_complete(ni->ni_vap, ni,
3234 IEEE80211_RATECTL_TX_SUCCESS, &ackfailcnt, NULL);
3239 DPRINTF(sc, IWN_DEBUG_TRACE | IWN_DEBUG_XMIT,
3240 "->%s: end; %d ok; %d err\n",__func__, tx_ok, tx_err);
3245 * Process a CALIBRATION_RESULT notification sent by the initialization
3246 * firmware on response to a CMD_CALIB_CONFIG command (5000 only).
3249 iwn5000_rx_calib_results(struct iwn_softc *sc, struct iwn_rx_desc *desc,
3250 struct iwn_rx_data *data)
3252 struct iwn_phy_calib *calib = (struct iwn_phy_calib *)(desc + 1);
3255 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
3257 /* Runtime firmware should not send such a notification. */
3258 if (sc->sc_flags & IWN_FLAG_CALIB_DONE){
3259 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s received after clib done\n",
3263 len = (le32toh(desc->len) & 0x3fff) - 4;
3264 bus_dmamap_sync(sc->rxq.data_dmat, data->map, BUS_DMASYNC_POSTREAD);
3266 switch (calib->code) {
3267 case IWN5000_PHY_CALIB_DC:
3268 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_DC)
3271 case IWN5000_PHY_CALIB_LO:
3272 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_LO)
3275 case IWN5000_PHY_CALIB_TX_IQ:
3276 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TX_IQ)
3279 case IWN5000_PHY_CALIB_TX_IQ_PERIODIC:
3280 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TX_IQ_PERIODIC)
3283 case IWN5000_PHY_CALIB_BASE_BAND:
3284 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_BASE_BAND)
3288 if (idx == -1) /* Ignore other results. */
3291 /* Save calibration result. */
3292 if (sc->calibcmd[idx].buf != NULL)
3293 free(sc->calibcmd[idx].buf, M_DEVBUF);
3294 sc->calibcmd[idx].buf = malloc(len, M_DEVBUF, M_NOWAIT);
3295 if (sc->calibcmd[idx].buf == NULL) {
3296 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
3297 "not enough memory for calibration result %d\n",
3301 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
3302 "saving calibration result idx=%d, code=%d len=%d\n", idx, calib->code, len);
3303 sc->calibcmd[idx].len = len;
3304 memcpy(sc->calibcmd[idx].buf, calib, len);
3308 iwn_stats_update(struct iwn_softc *sc, struct iwn_calib_state *calib,
3309 struct iwn_stats *stats, int len)
3311 struct iwn_stats_bt *stats_bt;
3312 struct iwn_stats *lstats;
3315 * First - check whether the length is the bluetooth or normal.
3317 * If it's normal - just copy it and bump out.
3318 * Otherwise we have to convert things.
3321 if (len == sizeof(struct iwn_stats) + 4) {
3322 memcpy(&sc->last_stat, stats, sizeof(struct iwn_stats));
3323 sc->last_stat_valid = 1;
3328 * If it's not the bluetooth size - log, then just copy.
3330 if (len != sizeof(struct iwn_stats_bt) + 4) {
3331 DPRINTF(sc, IWN_DEBUG_STATS,
3332 "%s: size of rx statistics (%d) not an expected size!\n",
3335 memcpy(&sc->last_stat, stats, sizeof(struct iwn_stats));
3336 sc->last_stat_valid = 1;
3343 stats_bt = (struct iwn_stats_bt *) stats;
3344 lstats = &sc->last_stat;
3347 lstats->flags = stats_bt->flags;
3349 memcpy(&lstats->rx.ofdm, &stats_bt->rx_bt.ofdm,
3350 sizeof(struct iwn_rx_phy_stats));
3351 memcpy(&lstats->rx.cck, &stats_bt->rx_bt.cck,
3352 sizeof(struct iwn_rx_phy_stats));
3353 memcpy(&lstats->rx.general, &stats_bt->rx_bt.general_bt.common,
3354 sizeof(struct iwn_rx_general_stats));
3355 memcpy(&lstats->rx.ht, &stats_bt->rx_bt.ht,
3356 sizeof(struct iwn_rx_ht_phy_stats));
3358 memcpy(&lstats->tx, &stats_bt->tx,
3359 sizeof(struct iwn_tx_stats));
3361 memcpy(&lstats->general, &stats_bt->general,
3362 sizeof(struct iwn_general_stats));
3364 /* XXX TODO: Squirrel away the extra bluetooth stats somewhere */
3365 sc->last_stat_valid = 1;
3369 * Process an RX_STATISTICS or BEACON_STATISTICS firmware notification.
3370 * The latter is sent by the firmware after each received beacon.
3373 iwn_rx_statistics(struct iwn_softc *sc, struct iwn_rx_desc *desc,
3374 struct iwn_rx_data *data)
3376 struct iwn_ops *ops = &sc->ops;
3377 struct ieee80211com *ic = &sc->sc_ic;
3378 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
3379 struct iwn_calib_state *calib = &sc->calib;
3380 struct iwn_stats *stats = (struct iwn_stats *)(desc + 1);
3381 struct iwn_stats *lstats;
3384 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
3386 /* Ignore statistics received during a scan. */
3387 if (vap->iv_state != IEEE80211_S_RUN ||
3388 (ic->ic_flags & IEEE80211_F_SCAN)){
3389 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s received during calib\n",
3394 bus_dmamap_sync(sc->rxq.data_dmat, data->map, BUS_DMASYNC_POSTREAD);
3396 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_STATS,
3397 "%s: received statistics, cmd %d, len %d\n",
3398 __func__, desc->type, le16toh(desc->len));
3399 sc->calib_cnt = 0; /* Reset TX power calibration timeout. */
3402 * Collect/track general statistics for reporting.
3404 * This takes care of ensuring that the bluetooth sized message
3405 * will be correctly converted to the legacy sized message.
3407 iwn_stats_update(sc, calib, stats, le16toh(desc->len));
3410 * And now, let's take a reference of it to use!
3412 lstats = &sc->last_stat;
3414 /* Test if temperature has changed. */
3415 if (lstats->general.temp != sc->rawtemp) {
3416 /* Convert "raw" temperature to degC. */
3417 sc->rawtemp = stats->general.temp;
3418 temp = ops->get_temperature(sc);
3419 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: temperature %d\n",
3422 /* Update TX power if need be (4965AGN only). */
3423 if (sc->hw_type == IWN_HW_REV_TYPE_4965)
3424 iwn4965_power_calibration(sc, temp);
3427 if (desc->type != IWN_BEACON_STATISTICS)
3428 return; /* Reply to a statistics request. */
3430 sc->noise = iwn_get_noise(&lstats->rx.general);
3431 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: noise %d\n", __func__, sc->noise);
3433 /* Test that RSSI and noise are present in stats report. */
3434 if (le32toh(lstats->rx.general.flags) != 1) {
3435 DPRINTF(sc, IWN_DEBUG_ANY, "%s\n",
3436 "received statistics without RSSI");
3440 if (calib->state == IWN_CALIB_STATE_ASSOC)
3441 iwn_collect_noise(sc, &lstats->rx.general);
3442 else if (calib->state == IWN_CALIB_STATE_RUN) {
3443 iwn_tune_sensitivity(sc, &lstats->rx);
3445 * XXX TODO: Only run the RX recovery if we're associated!
3447 iwn_check_rx_recovery(sc, lstats);
3448 iwn_save_stats_counters(sc, lstats);
3451 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
3455 * Save the relevant statistic counters for the next calibration
3459 iwn_save_stats_counters(struct iwn_softc *sc, const struct iwn_stats *rs)
3461 struct iwn_calib_state *calib = &sc->calib;
3463 /* Save counters values for next call. */
3464 calib->bad_plcp_cck = le32toh(rs->rx.cck.bad_plcp);
3465 calib->fa_cck = le32toh(rs->rx.cck.fa);
3466 calib->bad_plcp_ht = le32toh(rs->rx.ht.bad_plcp);
3467 calib->bad_plcp_ofdm = le32toh(rs->rx.ofdm.bad_plcp);
3468 calib->fa_ofdm = le32toh(rs->rx.ofdm.fa);
3470 /* Last time we received these tick values */
3471 sc->last_calib_ticks = ticks;
3475 * Process a TX_DONE firmware notification. Unfortunately, the 4965AGN
3476 * and 5000 adapters have different incompatible TX status formats.
3479 iwn4965_tx_done(struct iwn_softc *sc, struct iwn_rx_desc *desc,
3480 struct iwn_rx_data *data)
3482 struct iwn4965_tx_stat *stat = (struct iwn4965_tx_stat *)(desc + 1);
3483 struct iwn_tx_ring *ring;
3486 qid = desc->qid & 0xf;
3487 ring = &sc->txq[qid];
3489 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: "
3490 "qid %d idx %d RTS retries %d ACK retries %d nkill %d rate %x duration %d status %x\n",
3491 __func__, desc->qid, desc->idx,
3495 stat->rate, le16toh(stat->duration),
3496 le32toh(stat->status));
3498 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_POSTREAD);
3499 if (qid >= sc->firstaggqueue) {
3500 iwn_ampdu_tx_done(sc, qid, desc->idx, stat->nframes,
3501 stat->ackfailcnt, &stat->status);
3503 iwn_tx_done(sc, desc, stat->ackfailcnt,
3504 le32toh(stat->status) & 0xff);
3509 iwn5000_tx_done(struct iwn_softc *sc, struct iwn_rx_desc *desc,
3510 struct iwn_rx_data *data)
3512 struct iwn5000_tx_stat *stat = (struct iwn5000_tx_stat *)(desc + 1);
3513 struct iwn_tx_ring *ring;
3516 qid = desc->qid & 0xf;
3517 ring = &sc->txq[qid];
3519 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: "
3520 "qid %d idx %d RTS retries %d ACK retries %d nkill %d rate %x duration %d status %x\n",
3521 __func__, desc->qid, desc->idx,
3525 stat->rate, le16toh(stat->duration),
3526 le32toh(stat->status));
3529 /* Reset TX scheduler slot. */
3530 iwn5000_reset_sched(sc, desc->qid & 0xf, desc->idx);
3533 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_POSTREAD);
3534 if (qid >= sc->firstaggqueue) {
3535 iwn_ampdu_tx_done(sc, qid, desc->idx, stat->nframes,
3536 stat->ackfailcnt, &stat->status);
3538 iwn_tx_done(sc, desc, stat->ackfailcnt,
3539 le16toh(stat->status) & 0xff);
3544 * Adapter-independent backend for TX_DONE firmware notifications.
3547 iwn_tx_done(struct iwn_softc *sc, struct iwn_rx_desc *desc, int ackfailcnt,
3550 struct iwn_tx_ring *ring = &sc->txq[desc->qid & 0xf];
3551 struct iwn_tx_data *data = &ring->data[desc->idx];
3553 struct ieee80211_node *ni;
3554 struct ieee80211vap *vap;
3556 KASSERT(data->ni != NULL, ("no node"));
3558 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
3560 /* Unmap and free mbuf. */
3561 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_POSTWRITE);
3562 bus_dmamap_unload(ring->data_dmat, data->map);
3563 m = data->m, data->m = NULL;
3564 ni = data->ni, data->ni = NULL;
3568 * Update rate control statistics for the node.
3570 if (status & IWN_TX_FAIL)
3571 ieee80211_ratectl_tx_complete(vap, ni,
3572 IEEE80211_RATECTL_TX_FAILURE, &ackfailcnt, NULL);
3574 ieee80211_ratectl_tx_complete(vap, ni,
3575 IEEE80211_RATECTL_TX_SUCCESS, &ackfailcnt, NULL);
3578 * Channels marked for "radar" require traffic to be received
3579 * to unlock before we can transmit. Until traffic is seen
3580 * any attempt to transmit is returned immediately with status
3581 * set to IWN_TX_FAIL_TX_LOCKED. Unfortunately this can easily
3582 * happen on first authenticate after scanning. To workaround
3583 * this we ignore a failure of this sort in AUTH state so the
3584 * 802.11 layer will fall back to using a timeout to wait for
3585 * the AUTH reply. This allows the firmware time to see
3586 * traffic so a subsequent retry of AUTH succeeds. It's
3587 * unclear why the firmware does not maintain state for
3588 * channels recently visited as this would allow immediate
3589 * use of the channel after a scan (where we see traffic).
3591 if (status == IWN_TX_FAIL_TX_LOCKED &&
3592 ni->ni_vap->iv_state == IEEE80211_S_AUTH)
3593 ieee80211_tx_complete(ni, m, 0);
3595 ieee80211_tx_complete(ni, m,
3596 (status & IWN_TX_FAIL) != 0);
3598 sc->sc_tx_timer = 0;
3599 if (--ring->queued < IWN_TX_RING_LOMARK)
3600 sc->qfullmsk &= ~(1 << ring->qid);
3602 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
3606 * Process a "command done" firmware notification. This is where we wakeup
3607 * processes waiting for a synchronous command completion.
3610 iwn_cmd_done(struct iwn_softc *sc, struct iwn_rx_desc *desc)
3612 struct iwn_tx_ring *ring;
3613 struct iwn_tx_data *data;
3616 if (sc->sc_flags & IWN_FLAG_PAN_SUPPORT)
3617 cmd_queue_num = IWN_PAN_CMD_QUEUE;
3619 cmd_queue_num = IWN_CMD_QUEUE_NUM;
3621 if ((desc->qid & IWN_RX_DESC_QID_MSK) != cmd_queue_num)
3622 return; /* Not a command ack. */
3624 ring = &sc->txq[cmd_queue_num];
3625 data = &ring->data[desc->idx];
3627 /* If the command was mapped in an mbuf, free it. */
3628 if (data->m != NULL) {
3629 bus_dmamap_sync(ring->data_dmat, data->map,
3630 BUS_DMASYNC_POSTWRITE);
3631 bus_dmamap_unload(ring->data_dmat, data->map);
3635 wakeup(&ring->desc[desc->idx]);
3639 iwn_ampdu_tx_done(struct iwn_softc *sc, int qid, int idx, int nframes,
3640 int ackfailcnt, void *stat)
3642 struct iwn_ops *ops = &sc->ops;
3643 struct iwn_tx_ring *ring = &sc->txq[qid];
3644 struct iwn_tx_data *data;
3646 struct iwn_node *wn;
3647 struct ieee80211_node *ni;
3648 struct ieee80211_tx_ampdu *tap;
3650 uint32_t *status = stat;
3651 uint16_t *aggstatus = stat;
3654 int bit, i, lastidx, *res, seqno, shift, start;
3656 /* XXX TODO: status is le16 field! Grr */
3658 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
3659 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: nframes=%d, status=0x%08x\n",
3664 tap = sc->qid2tap[qid];
3666 wn = (void *)tap->txa_ni;
3670 * XXX TODO: ACK and RTS failures would be nice here!
3674 * A-MPDU single frame status - if we failed to transmit it
3675 * in A-MPDU, then it may be a permanent failure.
3677 * XXX TODO: check what the Linux iwlwifi driver does here;
3678 * there's some permanent and temporary failures that may be
3679 * handled differently.
3682 if ((*status & 0xff) != 1 && (*status & 0xff) != 2) {
3684 printf("ieee80211_send_bar()\n");
3687 * If we completely fail a transmit, make sure a
3688 * notification is pushed up to the rate control
3691 ieee80211_ratectl_tx_complete(ni->ni_vap,
3693 IEEE80211_RATECTL_TX_FAILURE,
3698 * If nframes=1, then we won't be getting a BA for
3699 * this frame. Ensure that we correctly update the
3700 * rate control code with how many retries were
3701 * needed to send it.
3703 ieee80211_ratectl_tx_complete(ni->ni_vap,
3705 IEEE80211_RATECTL_TX_SUCCESS,
3713 for (i = 0; i < nframes; i++) {
3714 if (le16toh(aggstatus[i * 2]) & 0xc)
3717 idx = le16toh(aggstatus[2*i + 1]) & 0xff;
3721 shift = 0x100 - idx + start;
3724 } else if (bit <= -64)
3725 bit = 0x100 - start + idx;
3727 shift = start - idx;
3731 bitmap = bitmap << shift;
3732 bitmap |= 1ULL << bit;
3734 tap = sc->qid2tap[qid];
3736 wn = (void *)tap->txa_ni;
3737 wn->agg[tid].bitmap = bitmap;
3738 wn->agg[tid].startidx = start;
3739 wn->agg[tid].nframes = nframes;
3743 if (!IEEE80211_AMPDU_RUNNING(tap)) {
3744 res = tap->txa_private;
3745 ssn = tap->txa_start & 0xfff;
3748 /* This is going nframes DWORDS into the descriptor? */
3749 seqno = le32toh(*(status + nframes)) & 0xfff;
3750 for (lastidx = (seqno & 0xff); ring->read != lastidx;) {
3751 data = &ring->data[ring->read];
3753 /* Unmap and free mbuf. */
3754 bus_dmamap_sync(ring->data_dmat, data->map,
3755 BUS_DMASYNC_POSTWRITE);
3756 bus_dmamap_unload(ring->data_dmat, data->map);
3757 m = data->m, data->m = NULL;
3758 ni = data->ni, data->ni = NULL;
3760 KASSERT(ni != NULL, ("no node"));
3761 KASSERT(m != NULL, ("no mbuf"));
3762 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: freeing m=%p\n", __func__, m);
3763 ieee80211_tx_complete(ni, m, 1);
3766 ring->read = (ring->read + 1) % IWN_TX_RING_COUNT;
3769 if (ring->queued == 0 && res != NULL) {
3771 ops->ampdu_tx_stop(sc, qid, tid, ssn);
3773 sc->qid2tap[qid] = NULL;
3774 free(res, M_DEVBUF);
3778 sc->sc_tx_timer = 0;
3779 if (ring->queued < IWN_TX_RING_LOMARK)
3780 sc->qfullmsk &= ~(1 << ring->qid);
3782 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
3786 * Process an INT_FH_RX or INT_SW_RX interrupt.
3789 iwn_notif_intr(struct iwn_softc *sc)
3791 struct iwn_ops *ops = &sc->ops;
3792 struct ieee80211com *ic = &sc->sc_ic;
3793 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
3796 bus_dmamap_sync(sc->rxq.stat_dma.tag, sc->rxq.stat_dma.map,
3797 BUS_DMASYNC_POSTREAD);
3799 hw = le16toh(sc->rxq.stat->closed_count) & 0xfff;
3800 while (sc->rxq.cur != hw) {
3801 struct iwn_rx_data *data = &sc->rxq.data[sc->rxq.cur];
3802 struct iwn_rx_desc *desc;
3804 bus_dmamap_sync(sc->rxq.data_dmat, data->map,
3805 BUS_DMASYNC_POSTREAD);
3806 desc = mtod(data->m, struct iwn_rx_desc *);
3808 DPRINTF(sc, IWN_DEBUG_RECV,
3809 "%s: cur=%d; qid %x idx %d flags %x type %d(%s) len %d\n",
3810 __func__, sc->rxq.cur, desc->qid & 0xf, desc->idx, desc->flags,
3811 desc->type, iwn_intr_str(desc->type),
3812 le16toh(desc->len));
3814 if (!(desc->qid & IWN_UNSOLICITED_RX_NOTIF)) /* Reply to a command. */
3815 iwn_cmd_done(sc, desc);
3817 switch (desc->type) {
3819 iwn_rx_phy(sc, desc, data);
3822 case IWN_RX_DONE: /* 4965AGN only. */
3823 case IWN_MPDU_RX_DONE:
3824 /* An 802.11 frame has been received. */
3825 iwn_rx_done(sc, desc, data);
3828 case IWN_RX_COMPRESSED_BA:
3829 /* A Compressed BlockAck has been received. */
3830 iwn_rx_compressed_ba(sc, desc, data);
3834 /* An 802.11 frame has been transmitted. */
3835 ops->tx_done(sc, desc, data);
3838 case IWN_RX_STATISTICS:
3839 case IWN_BEACON_STATISTICS:
3840 iwn_rx_statistics(sc, desc, data);
3843 case IWN_BEACON_MISSED:
3845 struct iwn_beacon_missed *miss =
3846 (struct iwn_beacon_missed *)(desc + 1);
3849 bus_dmamap_sync(sc->rxq.data_dmat, data->map,
3850 BUS_DMASYNC_POSTREAD);
3851 misses = le32toh(miss->consecutive);
3853 DPRINTF(sc, IWN_DEBUG_STATE,
3854 "%s: beacons missed %d/%d\n", __func__,
3855 misses, le32toh(miss->total));
3857 * If more than 5 consecutive beacons are missed,
3858 * reinitialize the sensitivity state machine.
3860 if (vap->iv_state == IEEE80211_S_RUN &&
3861 (ic->ic_flags & IEEE80211_F_SCAN) == 0) {
3863 (void)iwn_init_sensitivity(sc);
3864 if (misses >= vap->iv_bmissthreshold) {
3866 ieee80211_beacon_miss(ic);
3874 struct iwn_ucode_info *uc =
3875 (struct iwn_ucode_info *)(desc + 1);
3877 /* The microcontroller is ready. */
3878 bus_dmamap_sync(sc->rxq.data_dmat, data->map,
3879 BUS_DMASYNC_POSTREAD);
3880 DPRINTF(sc, IWN_DEBUG_RESET,
3881 "microcode alive notification version=%d.%d "
3882 "subtype=%x alive=%x\n", uc->major, uc->minor,
3883 uc->subtype, le32toh(uc->valid));
3885 if (le32toh(uc->valid) != 1) {
3886 device_printf(sc->sc_dev,
3887 "microcontroller initialization failed");
3890 if (uc->subtype == IWN_UCODE_INIT) {
3891 /* Save microcontroller report. */
3892 memcpy(&sc->ucode_info, uc, sizeof (*uc));
3894 /* Save the address of the error log in SRAM. */
3895 sc->errptr = le32toh(uc->errptr);
3898 case IWN_STATE_CHANGED:
3901 * State change allows hardware switch change to be
3902 * noted. However, we handle this in iwn_intr as we
3903 * get both the enable/disble intr.
3905 bus_dmamap_sync(sc->rxq.data_dmat, data->map,
3906 BUS_DMASYNC_POSTREAD);
3908 uint32_t *status = (uint32_t *)(desc + 1);
3909 DPRINTF(sc, IWN_DEBUG_INTR | IWN_DEBUG_STATE,
3910 "state changed to %x\n",
3915 case IWN_START_SCAN:
3917 bus_dmamap_sync(sc->rxq.data_dmat, data->map,
3918 BUS_DMASYNC_POSTREAD);
3920 struct iwn_start_scan *scan =
3921 (struct iwn_start_scan *)(desc + 1);
3922 DPRINTF(sc, IWN_DEBUG_ANY,
3923 "%s: scanning channel %d status %x\n",
3924 __func__, scan->chan, le32toh(scan->status));
3930 bus_dmamap_sync(sc->rxq.data_dmat, data->map,
3931 BUS_DMASYNC_POSTREAD);
3933 struct iwn_stop_scan *scan =
3934 (struct iwn_stop_scan *)(desc + 1);
3935 DPRINTF(sc, IWN_DEBUG_STATE | IWN_DEBUG_SCAN,
3936 "scan finished nchan=%d status=%d chan=%d\n",
3937 scan->nchan, scan->status, scan->chan);
3939 sc->sc_is_scanning = 0;
3941 ieee80211_scan_next(vap);
3945 case IWN5000_CALIBRATION_RESULT:
3946 iwn5000_rx_calib_results(sc, desc, data);
3949 case IWN5000_CALIBRATION_DONE:
3950 sc->sc_flags |= IWN_FLAG_CALIB_DONE;
3955 sc->rxq.cur = (sc->rxq.cur + 1) % IWN_RX_RING_COUNT;
3958 /* Tell the firmware what we have processed. */
3959 hw = (hw == 0) ? IWN_RX_RING_COUNT - 1 : hw - 1;
3960 IWN_WRITE(sc, IWN_FH_RX_WPTR, hw & ~7);
3964 * Process an INT_WAKEUP interrupt raised when the microcontroller wakes up
3965 * from power-down sleep mode.
3968 iwn_wakeup_intr(struct iwn_softc *sc)
3972 DPRINTF(sc, IWN_DEBUG_RESET, "%s: ucode wakeup from power-down sleep\n",
3975 /* Wakeup RX and TX rings. */
3976 IWN_WRITE(sc, IWN_FH_RX_WPTR, sc->rxq.cur & ~7);
3977 for (qid = 0; qid < sc->ntxqs; qid++) {
3978 struct iwn_tx_ring *ring = &sc->txq[qid];
3979 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | ring->cur);
3984 iwn_rftoggle_intr(struct iwn_softc *sc)
3986 struct ieee80211com *ic = &sc->sc_ic;
3987 uint32_t tmp = IWN_READ(sc, IWN_GP_CNTRL);
3989 IWN_LOCK_ASSERT(sc);
3991 device_printf(sc->sc_dev, "RF switch: radio %s\n",
3992 (tmp & IWN_GP_CNTRL_RFKILL) ? "enabled" : "disabled");
3993 if (tmp & IWN_GP_CNTRL_RFKILL)
3994 ieee80211_runtask(ic, &sc->sc_radioon_task);
3996 ieee80211_runtask(ic, &sc->sc_radiooff_task);
4000 * Dump the error log of the firmware when a firmware panic occurs. Although
4001 * we can't debug the firmware because it is neither open source nor free, it
4002 * can help us to identify certain classes of problems.
4005 iwn_fatal_intr(struct iwn_softc *sc)
4007 struct iwn_fw_dump dump;
4010 IWN_LOCK_ASSERT(sc);
4012 /* Force a complete recalibration on next init. */
4013 sc->sc_flags &= ~IWN_FLAG_CALIB_DONE;
4015 /* Check that the error log address is valid. */
4016 if (sc->errptr < IWN_FW_DATA_BASE ||
4017 sc->errptr + sizeof (dump) >
4018 IWN_FW_DATA_BASE + sc->fw_data_maxsz) {
4019 printf("%s: bad firmware error log address 0x%08x\n", __func__,
4023 if (iwn_nic_lock(sc) != 0) {
4024 printf("%s: could not read firmware error log\n", __func__);
4027 /* Read firmware error log from SRAM. */
4028 iwn_mem_read_region_4(sc, sc->errptr, (uint32_t *)&dump,
4029 sizeof (dump) / sizeof (uint32_t));
4032 if (dump.valid == 0) {
4033 printf("%s: firmware error log is empty\n", __func__);
4036 printf("firmware error log:\n");
4037 printf(" error type = \"%s\" (0x%08X)\n",
4038 (dump.id < nitems(iwn_fw_errmsg)) ?
4039 iwn_fw_errmsg[dump.id] : "UNKNOWN",
4041 printf(" program counter = 0x%08X\n", dump.pc);
4042 printf(" source line = 0x%08X\n", dump.src_line);
4043 printf(" error data = 0x%08X%08X\n",
4044 dump.error_data[0], dump.error_data[1]);
4045 printf(" branch link = 0x%08X%08X\n",
4046 dump.branch_link[0], dump.branch_link[1]);
4047 printf(" interrupt link = 0x%08X%08X\n",
4048 dump.interrupt_link[0], dump.interrupt_link[1]);
4049 printf(" time = %u\n", dump.time[0]);
4051 /* Dump driver status (TX and RX rings) while we're here. */
4052 printf("driver status:\n");
4053 for (i = 0; i < sc->ntxqs; i++) {
4054 struct iwn_tx_ring *ring = &sc->txq[i];
4055 printf(" tx ring %2d: qid=%-2d cur=%-3d queued=%-3d\n",
4056 i, ring->qid, ring->cur, ring->queued);
4058 printf(" rx ring: cur=%d\n", sc->rxq.cur);
4064 struct iwn_softc *sc = arg;
4065 uint32_t r1, r2, tmp;
4069 /* Disable interrupts. */
4070 IWN_WRITE(sc, IWN_INT_MASK, 0);
4072 /* Read interrupts from ICT (fast) or from registers (slow). */
4073 if (sc->sc_flags & IWN_FLAG_USE_ICT) {
4075 while (sc->ict[sc->ict_cur] != 0) {
4076 tmp |= sc->ict[sc->ict_cur];
4077 sc->ict[sc->ict_cur] = 0; /* Acknowledge. */
4078 sc->ict_cur = (sc->ict_cur + 1) % IWN_ICT_COUNT;
4081 if (tmp == 0xffffffff) /* Shouldn't happen. */
4083 else if (tmp & 0xc0000) /* Workaround a HW bug. */
4085 r1 = (tmp & 0xff00) << 16 | (tmp & 0xff);
4086 r2 = 0; /* Unused. */
4088 r1 = IWN_READ(sc, IWN_INT);
4089 if (r1 == 0xffffffff || (r1 & 0xfffffff0) == 0xa5a5a5a0) {
4091 return; /* Hardware gone! */
4093 r2 = IWN_READ(sc, IWN_FH_INT);
4096 DPRINTF(sc, IWN_DEBUG_INTR, "interrupt reg1=0x%08x reg2=0x%08x\n"
4099 if (r1 == 0 && r2 == 0)
4100 goto done; /* Interrupt not for us. */
4102 /* Acknowledge interrupts. */
4103 IWN_WRITE(sc, IWN_INT, r1);
4104 if (!(sc->sc_flags & IWN_FLAG_USE_ICT))
4105 IWN_WRITE(sc, IWN_FH_INT, r2);
4107 if (r1 & IWN_INT_RF_TOGGLED) {
4108 iwn_rftoggle_intr(sc);
4111 if (r1 & IWN_INT_CT_REACHED) {
4112 device_printf(sc->sc_dev, "%s: critical temperature reached!\n",
4115 if (r1 & (IWN_INT_SW_ERR | IWN_INT_HW_ERR)) {
4116 device_printf(sc->sc_dev, "%s: fatal firmware error\n",
4119 iwn_debug_register(sc);
4121 /* Dump firmware error log and stop. */
4124 taskqueue_enqueue(sc->sc_tq, &sc->sc_panic_task);
4127 if ((r1 & (IWN_INT_FH_RX | IWN_INT_SW_RX | IWN_INT_RX_PERIODIC)) ||
4128 (r2 & IWN_FH_INT_RX)) {
4129 if (sc->sc_flags & IWN_FLAG_USE_ICT) {
4130 if (r1 & (IWN_INT_FH_RX | IWN_INT_SW_RX))
4131 IWN_WRITE(sc, IWN_FH_INT, IWN_FH_INT_RX);
4132 IWN_WRITE_1(sc, IWN_INT_PERIODIC,
4133 IWN_INT_PERIODIC_DIS);
4135 if (r1 & (IWN_INT_FH_RX | IWN_INT_SW_RX)) {
4136 IWN_WRITE_1(sc, IWN_INT_PERIODIC,
4137 IWN_INT_PERIODIC_ENA);
4143 if ((r1 & IWN_INT_FH_TX) || (r2 & IWN_FH_INT_TX)) {
4144 if (sc->sc_flags & IWN_FLAG_USE_ICT)
4145 IWN_WRITE(sc, IWN_FH_INT, IWN_FH_INT_TX);
4146 wakeup(sc); /* FH DMA transfer completed. */
4149 if (r1 & IWN_INT_ALIVE)
4150 wakeup(sc); /* Firmware is alive. */
4152 if (r1 & IWN_INT_WAKEUP)
4153 iwn_wakeup_intr(sc);
4156 /* Re-enable interrupts. */
4157 if (sc->sc_flags & IWN_FLAG_RUNNING)
4158 IWN_WRITE(sc, IWN_INT_MASK, sc->int_mask);
4164 * Update TX scheduler ring when transmitting an 802.11 frame (4965AGN and
4165 * 5000 adapters use a slightly different format).
4168 iwn4965_update_sched(struct iwn_softc *sc, int qid, int idx, uint8_t id,
4171 uint16_t *w = &sc->sched[qid * IWN4965_SCHED_COUNT + idx];
4173 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
4175 *w = htole16(len + 8);
4176 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
4177 BUS_DMASYNC_PREWRITE);
4178 if (idx < IWN_SCHED_WINSZ) {
4179 *(w + IWN_TX_RING_COUNT) = *w;
4180 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
4181 BUS_DMASYNC_PREWRITE);
4186 iwn5000_update_sched(struct iwn_softc *sc, int qid, int idx, uint8_t id,
4189 uint16_t *w = &sc->sched[qid * IWN5000_SCHED_COUNT + idx];
4191 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
4193 *w = htole16(id << 12 | (len + 8));
4194 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
4195 BUS_DMASYNC_PREWRITE);
4196 if (idx < IWN_SCHED_WINSZ) {
4197 *(w + IWN_TX_RING_COUNT) = *w;
4198 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
4199 BUS_DMASYNC_PREWRITE);
4205 iwn5000_reset_sched(struct iwn_softc *sc, int qid, int idx)
4207 uint16_t *w = &sc->sched[qid * IWN5000_SCHED_COUNT + idx];
4209 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
4211 *w = (*w & htole16(0xf000)) | htole16(1);
4212 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
4213 BUS_DMASYNC_PREWRITE);
4214 if (idx < IWN_SCHED_WINSZ) {
4215 *(w + IWN_TX_RING_COUNT) = *w;
4216 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
4217 BUS_DMASYNC_PREWRITE);
4223 * Check whether OFDM 11g protection will be enabled for the given rate.
4225 * The original driver code only enabled protection for OFDM rates.
4226 * It didn't check to see whether it was operating in 11a or 11bg mode.
4229 iwn_check_rate_needs_protection(struct iwn_softc *sc,
4230 struct ieee80211vap *vap, uint8_t rate)
4232 struct ieee80211com *ic = vap->iv_ic;
4235 * Not in 2GHz mode? Then there's no need to enable OFDM
4238 if (! IEEE80211_IS_CHAN_2GHZ(ic->ic_curchan)) {
4243 * 11bg protection not enabled? Then don't use it.
4245 if ((ic->ic_flags & IEEE80211_F_USEPROT) == 0)
4249 * If it's an 11n rate - no protection.
4250 * We'll do it via a specific 11n check.
4252 if (rate & IEEE80211_RATE_MCS) {
4257 * Do a rate table lookup. If the PHY is CCK,
4258 * don't do protection.
4260 if (ieee80211_rate2phytype(ic->ic_rt, rate) == IEEE80211_T_CCK)
4264 * Yup, enable protection.
4270 * return a value between 0 and IWN_MAX_TX_RETRIES-1 as an index into
4271 * the link quality table that reflects this particular entry.
4274 iwn_tx_rate_to_linkq_offset(struct iwn_softc *sc, struct ieee80211_node *ni,
4277 struct ieee80211_rateset *rs;
4284 * Figure out if we're using 11n or not here.
4286 if (IEEE80211_IS_CHAN_HT(ni->ni_chan) && ni->ni_htrates.rs_nrates > 0)
4292 * Use the correct rate table.
4295 rs = (struct ieee80211_rateset *) &ni->ni_htrates;
4296 nr = ni->ni_htrates.rs_nrates;
4303 * Find the relevant link quality entry in the table.
4305 for (i = 0; i < nr && i < IWN_MAX_TX_RETRIES - 1 ; i++) {
4307 * The link quality table index starts at 0 == highest
4308 * rate, so we walk the rate table backwards.
4310 cmp_rate = rs->rs_rates[(nr - 1) - i];
4311 if (rate & IEEE80211_RATE_MCS)
4312 cmp_rate |= IEEE80211_RATE_MCS;
4315 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: idx %d: nr=%d, rate=0x%02x, rateentry=0x%02x\n",
4323 if (cmp_rate == rate)
4327 /* Failed? Start at the end */
4328 return (IWN_MAX_TX_RETRIES - 1);
4332 iwn_tx_data(struct iwn_softc *sc, struct mbuf *m, struct ieee80211_node *ni)
4334 struct iwn_ops *ops = &sc->ops;
4335 const struct ieee80211_txparam *tp;
4336 struct ieee80211vap *vap = ni->ni_vap;
4337 struct ieee80211com *ic = ni->ni_ic;
4338 struct iwn_node *wn = (void *)ni;
4339 struct iwn_tx_ring *ring;
4340 struct iwn_tx_desc *desc;
4341 struct iwn_tx_data *data;
4342 struct iwn_tx_cmd *cmd;
4343 struct iwn_cmd_data *tx;
4344 struct ieee80211_frame *wh;
4345 struct ieee80211_key *k = NULL;
4350 bus_dma_segment_t *seg, segs[IWN_MAX_SCATTER];
4352 int ac, i, totlen, error, pad, nsegs = 0, rate;
4354 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
4356 IWN_LOCK_ASSERT(sc);
4358 wh = mtod(m, struct ieee80211_frame *);
4359 hdrlen = ieee80211_anyhdrsize(wh);
4360 type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK;
4362 /* Select EDCA Access Category and TX ring for this frame. */
4363 if (IEEE80211_QOS_HAS_SEQ(wh)) {
4364 qos = ((const struct ieee80211_qosframe *)wh)->i_qos[0];
4365 tid = qos & IEEE80211_QOS_TID;
4370 ac = M_WME_GETAC(m);
4371 if (m->m_flags & M_AMPDU_MPDU) {
4373 struct ieee80211_tx_ampdu *tap = &ni->ni_tx_ampdu[ac];
4375 if (!IEEE80211_AMPDU_RUNNING(tap)) {
4380 * Queue this frame to the hardware ring that we've
4381 * negotiated AMPDU TX on.
4383 * Note that the sequence number must match the TX slot
4386 ac = *(int *)tap->txa_private;
4387 seqno = ni->ni_txseqs[tid];
4388 *(uint16_t *)wh->i_seq =
4389 htole16(seqno << IEEE80211_SEQ_SEQ_SHIFT);
4390 ring = &sc->txq[ac];
4391 if ((seqno % 256) != ring->cur) {
4392 device_printf(sc->sc_dev,
4393 "%s: m=%p: seqno (%d) (%d) != ring index (%d) !\n",
4400 ni->ni_txseqs[tid]++;
4402 ring = &sc->txq[ac];
4403 desc = &ring->desc[ring->cur];
4404 data = &ring->data[ring->cur];
4406 /* Choose a TX rate index. */
4407 tp = &vap->iv_txparms[ieee80211_chan2mode(ni->ni_chan)];
4408 if (type == IEEE80211_FC0_TYPE_MGT)
4409 rate = tp->mgmtrate;
4410 else if (IEEE80211_IS_MULTICAST(wh->i_addr1))
4411 rate = tp->mcastrate;
4412 else if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE)
4413 rate = tp->ucastrate;
4414 else if (m->m_flags & M_EAPOL)
4415 rate = tp->mgmtrate;
4417 /* XXX pass pktlen */
4418 (void) ieee80211_ratectl_rate(ni, NULL, 0);
4419 rate = ni->ni_txrate;
4422 /* Encrypt the frame if need be. */
4423 if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) {
4424 /* Retrieve key for TX. */
4425 k = ieee80211_crypto_encap(ni, m);
4429 /* 802.11 header may have moved. */
4430 wh = mtod(m, struct ieee80211_frame *);
4432 totlen = m->m_pkthdr.len;
4434 if (ieee80211_radiotap_active_vap(vap)) {
4435 struct iwn_tx_radiotap_header *tap = &sc->sc_txtap;
4438 tap->wt_rate = rate;
4440 tap->wt_flags |= IEEE80211_RADIOTAP_F_WEP;
4442 ieee80211_radiotap_tx(vap, m);
4445 /* Prepare TX firmware command. */
4446 cmd = &ring->cmd[ring->cur];
4447 cmd->code = IWN_CMD_TX_DATA;
4449 cmd->qid = ring->qid;
4450 cmd->idx = ring->cur;
4452 tx = (struct iwn_cmd_data *)cmd->data;
4453 /* NB: No need to clear tx, all fields are reinitialized here. */
4454 tx->scratch = 0; /* clear "scratch" area */
4457 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
4458 /* Unicast frame, check if an ACK is expected. */
4459 if (!qos || (qos & IEEE80211_QOS_ACKPOLICY) !=
4460 IEEE80211_QOS_ACKPOLICY_NOACK)
4461 flags |= IWN_TX_NEED_ACK;
4464 (IEEE80211_FC0_TYPE_MASK | IEEE80211_FC0_SUBTYPE_MASK)) ==
4465 (IEEE80211_FC0_TYPE_CTL | IEEE80211_FC0_SUBTYPE_BAR))
4466 flags |= IWN_TX_IMM_BA; /* Cannot happen yet. */
4468 if (wh->i_fc[1] & IEEE80211_FC1_MORE_FRAG)
4469 flags |= IWN_TX_MORE_FRAG; /* Cannot happen yet. */
4471 /* Check if frame must be protected using RTS/CTS or CTS-to-self. */
4472 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
4473 /* NB: Group frames are sent using CCK in 802.11b/g. */
4474 if (totlen + IEEE80211_CRC_LEN > vap->iv_rtsthreshold) {
4475 flags |= IWN_TX_NEED_RTS;
4476 } else if (iwn_check_rate_needs_protection(sc, vap, rate)) {
4477 if (ic->ic_protmode == IEEE80211_PROT_CTSONLY)
4478 flags |= IWN_TX_NEED_CTS;
4479 else if (ic->ic_protmode == IEEE80211_PROT_RTSCTS)
4480 flags |= IWN_TX_NEED_RTS;
4481 } else if ((rate & IEEE80211_RATE_MCS) &&
4482 (ic->ic_htprotmode == IEEE80211_PROT_RTSCTS)) {
4483 flags |= IWN_TX_NEED_RTS;
4486 /* XXX HT protection? */
4488 if (flags & (IWN_TX_NEED_RTS | IWN_TX_NEED_CTS)) {
4489 if (sc->hw_type != IWN_HW_REV_TYPE_4965) {
4490 /* 5000 autoselects RTS/CTS or CTS-to-self. */
4491 flags &= ~(IWN_TX_NEED_RTS | IWN_TX_NEED_CTS);
4492 flags |= IWN_TX_NEED_PROTECTION;
4494 flags |= IWN_TX_FULL_TXOP;
4498 if (IEEE80211_IS_MULTICAST(wh->i_addr1) ||
4499 type != IEEE80211_FC0_TYPE_DATA)
4500 tx->id = sc->broadcast_id;
4504 if (type == IEEE80211_FC0_TYPE_MGT) {
4505 uint8_t subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
4507 /* Tell HW to set timestamp in probe responses. */
4508 if (subtype == IEEE80211_FC0_SUBTYPE_PROBE_RESP)
4509 flags |= IWN_TX_INSERT_TSTAMP;
4510 if (subtype == IEEE80211_FC0_SUBTYPE_ASSOC_REQ ||
4511 subtype == IEEE80211_FC0_SUBTYPE_REASSOC_REQ)
4512 tx->timeout = htole16(3);
4514 tx->timeout = htole16(2);
4516 tx->timeout = htole16(0);
4519 /* First segment length must be a multiple of 4. */
4520 flags |= IWN_TX_NEED_PADDING;
4521 pad = 4 - (hdrlen & 3);
4525 tx->len = htole16(totlen);
4527 tx->rts_ntries = 60;
4528 tx->data_ntries = 15;
4529 tx->lifetime = htole32(IWN_LIFETIME_INFINITE);
4530 tx->rate = iwn_rate_to_plcp(sc, ni, rate);
4531 if (tx->id == sc->broadcast_id) {
4532 /* Group or management frame. */
4535 tx->linkq = iwn_tx_rate_to_linkq_offset(sc, ni, rate);
4536 flags |= IWN_TX_LINKQ; /* enable MRR */
4539 /* Set physical address of "scratch area". */
4540 tx->loaddr = htole32(IWN_LOADDR(data->scratch_paddr));
4541 tx->hiaddr = IWN_HIADDR(data->scratch_paddr);
4543 /* Copy 802.11 header in TX command. */
4544 memcpy((uint8_t *)(tx + 1), wh, hdrlen);
4546 /* Trim 802.11 header. */
4549 tx->flags = htole32(flags);
4551 error = bus_dmamap_load_mbuf_sg(ring->data_dmat, data->map, m, segs,
4552 &nsegs, BUS_DMA_NOWAIT);
4554 if (error != EFBIG) {
4555 device_printf(sc->sc_dev,
4556 "%s: can't map mbuf (error %d)\n", __func__, error);
4559 /* Too many DMA segments, linearize mbuf. */
4560 m1 = m_collapse(m, M_NOWAIT, IWN_MAX_SCATTER - 1);
4562 device_printf(sc->sc_dev,
4563 "%s: could not defrag mbuf\n", __func__);
4568 error = bus_dmamap_load_mbuf_sg(ring->data_dmat, data->map, m,
4569 segs, &nsegs, BUS_DMA_NOWAIT);
4571 device_printf(sc->sc_dev,
4572 "%s: can't map mbuf (error %d)\n", __func__, error);
4580 DPRINTF(sc, IWN_DEBUG_XMIT,
4581 "%s: qid %d idx %d len %d nsegs %d flags 0x%08x rate 0x%04x plcp 0x%08x\n",
4591 /* Fill TX descriptor. */
4594 desc->nsegs += nsegs;
4595 /* First DMA segment is used by the TX command. */
4596 desc->segs[0].addr = htole32(IWN_LOADDR(data->cmd_paddr));
4597 desc->segs[0].len = htole16(IWN_HIADDR(data->cmd_paddr) |
4598 (4 + sizeof (*tx) + hdrlen + pad) << 4);
4599 /* Other DMA segments are for data payload. */
4601 for (i = 1; i <= nsegs; i++) {
4602 desc->segs[i].addr = htole32(IWN_LOADDR(seg->ds_addr));
4603 desc->segs[i].len = htole16(IWN_HIADDR(seg->ds_addr) |
4608 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_PREWRITE);
4609 bus_dmamap_sync(ring->data_dmat, ring->cmd_dma.map,
4610 BUS_DMASYNC_PREWRITE);
4611 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
4612 BUS_DMASYNC_PREWRITE);
4614 /* Update TX scheduler. */
4615 if (ring->qid >= sc->firstaggqueue)
4616 ops->update_sched(sc, ring->qid, ring->cur, tx->id, totlen);
4619 ring->cur = (ring->cur + 1) % IWN_TX_RING_COUNT;
4620 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, ring->qid << 8 | ring->cur);
4622 /* Mark TX ring as full if we reach a certain threshold. */
4623 if (++ring->queued > IWN_TX_RING_HIMARK)
4624 sc->qfullmsk |= 1 << ring->qid;
4626 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
4632 iwn_tx_data_raw(struct iwn_softc *sc, struct mbuf *m,
4633 struct ieee80211_node *ni, const struct ieee80211_bpf_params *params)
4635 struct iwn_ops *ops = &sc->ops;
4636 struct ieee80211vap *vap = ni->ni_vap;
4637 struct iwn_tx_cmd *cmd;
4638 struct iwn_cmd_data *tx;
4639 struct ieee80211_frame *wh;
4640 struct iwn_tx_ring *ring;
4641 struct iwn_tx_desc *desc;
4642 struct iwn_tx_data *data;
4644 bus_dma_segment_t *seg, segs[IWN_MAX_SCATTER];
4647 int ac, totlen, error, pad, nsegs = 0, i, rate;
4650 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
4652 IWN_LOCK_ASSERT(sc);
4654 wh = mtod(m, struct ieee80211_frame *);
4655 hdrlen = ieee80211_anyhdrsize(wh);
4656 type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK;
4658 ac = params->ibp_pri & 3;
4660 ring = &sc->txq[ac];
4661 desc = &ring->desc[ring->cur];
4662 data = &ring->data[ring->cur];
4664 /* Choose a TX rate. */
4665 rate = params->ibp_rate0;
4666 totlen = m->m_pkthdr.len;
4668 /* Prepare TX firmware command. */
4669 cmd = &ring->cmd[ring->cur];
4670 cmd->code = IWN_CMD_TX_DATA;
4672 cmd->qid = ring->qid;
4673 cmd->idx = ring->cur;
4675 tx = (struct iwn_cmd_data *)cmd->data;
4676 /* NB: No need to clear tx, all fields are reinitialized here. */
4677 tx->scratch = 0; /* clear "scratch" area */
4680 if ((params->ibp_flags & IEEE80211_BPF_NOACK) == 0)
4681 flags |= IWN_TX_NEED_ACK;
4682 if (params->ibp_flags & IEEE80211_BPF_RTS) {
4683 if (sc->hw_type != IWN_HW_REV_TYPE_4965) {
4684 /* 5000 autoselects RTS/CTS or CTS-to-self. */
4685 flags &= ~IWN_TX_NEED_RTS;
4686 flags |= IWN_TX_NEED_PROTECTION;
4688 flags |= IWN_TX_NEED_RTS | IWN_TX_FULL_TXOP;
4690 if (params->ibp_flags & IEEE80211_BPF_CTS) {
4691 if (sc->hw_type != IWN_HW_REV_TYPE_4965) {
4692 /* 5000 autoselects RTS/CTS or CTS-to-self. */
4693 flags &= ~IWN_TX_NEED_CTS;
4694 flags |= IWN_TX_NEED_PROTECTION;
4696 flags |= IWN_TX_NEED_CTS | IWN_TX_FULL_TXOP;
4698 if (type == IEEE80211_FC0_TYPE_MGT) {
4699 uint8_t subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
4701 /* Tell HW to set timestamp in probe responses. */
4702 if (subtype == IEEE80211_FC0_SUBTYPE_PROBE_RESP)
4703 flags |= IWN_TX_INSERT_TSTAMP;
4705 if (subtype == IEEE80211_FC0_SUBTYPE_ASSOC_REQ ||
4706 subtype == IEEE80211_FC0_SUBTYPE_REASSOC_REQ)
4707 tx->timeout = htole16(3);
4709 tx->timeout = htole16(2);
4711 tx->timeout = htole16(0);
4714 /* First segment length must be a multiple of 4. */
4715 flags |= IWN_TX_NEED_PADDING;
4716 pad = 4 - (hdrlen & 3);
4720 if (ieee80211_radiotap_active_vap(vap)) {
4721 struct iwn_tx_radiotap_header *tap = &sc->sc_txtap;
4724 tap->wt_rate = rate;
4726 ieee80211_radiotap_tx(vap, m);
4729 tx->len = htole16(totlen);
4731 tx->id = sc->broadcast_id;
4732 tx->rts_ntries = params->ibp_try1;
4733 tx->data_ntries = params->ibp_try0;
4734 tx->lifetime = htole32(IWN_LIFETIME_INFINITE);
4735 tx->rate = iwn_rate_to_plcp(sc, ni, rate);
4737 /* Group or management frame. */
4740 /* Set physical address of "scratch area". */
4741 tx->loaddr = htole32(IWN_LOADDR(data->scratch_paddr));
4742 tx->hiaddr = IWN_HIADDR(data->scratch_paddr);
4744 /* Copy 802.11 header in TX command. */
4745 memcpy((uint8_t *)(tx + 1), wh, hdrlen);
4747 /* Trim 802.11 header. */
4750 tx->flags = htole32(flags);
4752 error = bus_dmamap_load_mbuf_sg(ring->data_dmat, data->map, m, segs,
4753 &nsegs, BUS_DMA_NOWAIT);
4755 if (error != EFBIG) {
4756 device_printf(sc->sc_dev,
4757 "%s: can't map mbuf (error %d)\n", __func__, error);
4760 /* Too many DMA segments, linearize mbuf. */
4761 m1 = m_collapse(m, M_NOWAIT, IWN_MAX_SCATTER - 1);
4763 device_printf(sc->sc_dev,
4764 "%s: could not defrag mbuf\n", __func__);
4769 error = bus_dmamap_load_mbuf_sg(ring->data_dmat, data->map, m,
4770 segs, &nsegs, BUS_DMA_NOWAIT);
4772 device_printf(sc->sc_dev,
4773 "%s: can't map mbuf (error %d)\n", __func__, error);
4781 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: qid %d idx %d len %d nsegs %d\n",
4782 __func__, ring->qid, ring->cur, m->m_pkthdr.len, nsegs);
4784 /* Fill TX descriptor. */
4787 desc->nsegs += nsegs;
4788 /* First DMA segment is used by the TX command. */
4789 desc->segs[0].addr = htole32(IWN_LOADDR(data->cmd_paddr));
4790 desc->segs[0].len = htole16(IWN_HIADDR(data->cmd_paddr) |
4791 (4 + sizeof (*tx) + hdrlen + pad) << 4);
4792 /* Other DMA segments are for data payload. */
4794 for (i = 1; i <= nsegs; i++) {
4795 desc->segs[i].addr = htole32(IWN_LOADDR(seg->ds_addr));
4796 desc->segs[i].len = htole16(IWN_HIADDR(seg->ds_addr) |
4801 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_PREWRITE);
4802 bus_dmamap_sync(ring->data_dmat, ring->cmd_dma.map,
4803 BUS_DMASYNC_PREWRITE);
4804 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
4805 BUS_DMASYNC_PREWRITE);
4807 /* Update TX scheduler. */
4808 if (ring->qid >= sc->firstaggqueue)
4809 ops->update_sched(sc, ring->qid, ring->cur, tx->id, totlen);
4812 ring->cur = (ring->cur + 1) % IWN_TX_RING_COUNT;
4813 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, ring->qid << 8 | ring->cur);
4815 /* Mark TX ring as full if we reach a certain threshold. */
4816 if (++ring->queued > IWN_TX_RING_HIMARK)
4817 sc->qfullmsk |= 1 << ring->qid;
4819 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
4825 iwn_xmit_task(void *arg0, int pending)
4827 struct iwn_softc *sc = arg0;
4828 struct ieee80211_node *ni;
4831 struct ieee80211_bpf_params p;
4834 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: called\n", __func__);
4838 * Dequeue frames, attempt to transmit,
4839 * then disable beaconwait when we're done.
4841 while ((m = mbufq_dequeue(&sc->sc_xmit_queue)) != NULL) {
4843 ni = (struct ieee80211_node *)m->m_pkthdr.rcvif;
4845 /* Get xmit params if appropriate */
4846 if (ieee80211_get_xmit_params(m, &p) == 0)
4849 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: m=%p, have_p=%d\n",
4850 __func__, m, have_p);
4852 /* If we have xmit params, use them */
4854 error = iwn_tx_data_raw(sc, m, ni, &p);
4856 error = iwn_tx_data(sc, m, ni);
4859 if_inc_counter(ni->ni_vap->iv_ifp,
4860 IFCOUNTER_OERRORS, 1);
4861 ieee80211_free_node(ni);
4866 sc->sc_beacon_wait = 0;
4871 * raw frame xmit - free node/reference if failed.
4874 iwn_raw_xmit(struct ieee80211_node *ni, struct mbuf *m,
4875 const struct ieee80211_bpf_params *params)
4877 struct ieee80211com *ic = ni->ni_ic;
4878 struct iwn_softc *sc = ic->ic_softc;
4881 DPRINTF(sc, IWN_DEBUG_XMIT | IWN_DEBUG_TRACE, "->%s begin\n", __func__);
4884 if ((sc->sc_flags & IWN_FLAG_RUNNING) == 0) {
4890 /* queue frame if we have to */
4891 if (sc->sc_beacon_wait) {
4892 if (iwn_xmit_queue_enqueue(sc, m) != 0) {
4897 /* Queued, so just return OK */
4902 if (params == NULL) {
4904 * Legacy path; interpret frame contents to decide
4905 * precisely how to send the frame.
4907 error = iwn_tx_data(sc, m, ni);
4910 * Caller supplied explicit parameters to use in
4911 * sending the frame.
4913 error = iwn_tx_data_raw(sc, m, ni, params);
4916 sc->sc_tx_timer = 5;
4922 DPRINTF(sc, IWN_DEBUG_TRACE | IWN_DEBUG_XMIT, "->%s: end\n",__func__);
4928 * transmit - don't free mbuf if failed; don't free node ref if failed.
4931 iwn_transmit(struct ieee80211com *ic, struct mbuf *m)
4933 struct iwn_softc *sc = ic->ic_softc;
4934 struct ieee80211_node *ni;
4937 ni = (struct ieee80211_node *)m->m_pkthdr.rcvif;
4940 if ((sc->sc_flags & IWN_FLAG_RUNNING) == 0 || sc->sc_beacon_wait) {
4950 error = iwn_tx_data(sc, m, ni);
4952 sc->sc_tx_timer = 5;
4958 iwn_watchdog(void *arg)
4960 struct iwn_softc *sc = arg;
4961 struct ieee80211com *ic = &sc->sc_ic;
4963 IWN_LOCK_ASSERT(sc);
4965 KASSERT(sc->sc_flags & IWN_FLAG_RUNNING, ("not running"));
4967 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
4969 if (sc->sc_tx_timer > 0) {
4970 if (--sc->sc_tx_timer == 0) {
4971 ic_printf(ic, "device timeout\n");
4972 ieee80211_restart_all(ic);
4976 callout_reset(&sc->watchdog_to, hz, iwn_watchdog, sc);
4980 iwn_cdev_open(struct cdev *dev, int flags, int type, struct thread *td)
4987 iwn_cdev_close(struct cdev *dev, int flags, int type, struct thread *td)
4994 iwn_cdev_ioctl(struct cdev *dev, unsigned long cmd, caddr_t data, int fflag,
4998 struct iwn_softc *sc = dev->si_drv1;
4999 struct iwn_ioctl_data *d;
5001 rc = priv_check(td, PRIV_DRIVER);
5007 d = (struct iwn_ioctl_data *) data;
5009 /* XXX validate permissions/memory/etc? */
5010 rc = copyout(&sc->last_stat, d->dst_addr, sizeof(struct iwn_stats));
5015 memset(&sc->last_stat, 0, sizeof(struct iwn_stats));
5026 iwn_ioctl(struct ieee80211com *ic, u_long cmd, void *data)
5033 iwn_parent(struct ieee80211com *ic)
5035 struct iwn_softc *sc = ic->ic_softc;
5036 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
5037 int startall = 0, stop = 0;
5040 if (ic->ic_nrunning > 0) {
5041 if (!(sc->sc_flags & IWN_FLAG_RUNNING)) {
5042 iwn_init_locked(sc);
5043 if (IWN_READ(sc, IWN_GP_CNTRL) & IWN_GP_CNTRL_RFKILL)
5048 } else if (sc->sc_flags & IWN_FLAG_RUNNING)
5049 iwn_stop_locked(sc);
5052 ieee80211_start_all(ic);
5053 else if (vap != NULL && stop)
5054 ieee80211_stop(vap);
5058 * Send a command to the firmware.
5061 iwn_cmd(struct iwn_softc *sc, int code, const void *buf, int size, int async)
5063 struct iwn_tx_ring *ring;
5064 struct iwn_tx_desc *desc;
5065 struct iwn_tx_data *data;
5066 struct iwn_tx_cmd *cmd;
5072 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
5075 IWN_LOCK_ASSERT(sc);
5077 if (sc->sc_flags & IWN_FLAG_PAN_SUPPORT)
5078 cmd_queue_num = IWN_PAN_CMD_QUEUE;
5080 cmd_queue_num = IWN_CMD_QUEUE_NUM;
5082 ring = &sc->txq[cmd_queue_num];
5083 desc = &ring->desc[ring->cur];
5084 data = &ring->data[ring->cur];
5087 if (size > sizeof cmd->data) {
5088 /* Command is too large to fit in a descriptor. */
5089 if (totlen > MCLBYTES)
5091 m = m_getjcl(M_NOWAIT, MT_DATA, M_PKTHDR, MJUMPAGESIZE);
5094 cmd = mtod(m, struct iwn_tx_cmd *);
5095 error = bus_dmamap_load(ring->data_dmat, data->map, cmd,
5096 totlen, iwn_dma_map_addr, &paddr, BUS_DMA_NOWAIT);
5103 cmd = &ring->cmd[ring->cur];
5104 paddr = data->cmd_paddr;
5109 cmd->qid = ring->qid;
5110 cmd->idx = ring->cur;
5111 memcpy(cmd->data, buf, size);
5114 desc->segs[0].addr = htole32(IWN_LOADDR(paddr));
5115 desc->segs[0].len = htole16(IWN_HIADDR(paddr) | totlen << 4);
5117 DPRINTF(sc, IWN_DEBUG_CMD, "%s: %s (0x%x) flags %d qid %d idx %d\n",
5118 __func__, iwn_intr_str(cmd->code), cmd->code,
5119 cmd->flags, cmd->qid, cmd->idx);
5121 if (size > sizeof cmd->data) {
5122 bus_dmamap_sync(ring->data_dmat, data->map,
5123 BUS_DMASYNC_PREWRITE);
5125 bus_dmamap_sync(ring->data_dmat, ring->cmd_dma.map,
5126 BUS_DMASYNC_PREWRITE);
5128 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
5129 BUS_DMASYNC_PREWRITE);
5131 /* Kick command ring. */
5132 ring->cur = (ring->cur + 1) % IWN_TX_RING_COUNT;
5133 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, ring->qid << 8 | ring->cur);
5135 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
5137 return async ? 0 : msleep(desc, &sc->sc_mtx, PCATCH, "iwncmd", hz);
5141 iwn4965_add_node(struct iwn_softc *sc, struct iwn_node_info *node, int async)
5143 struct iwn4965_node_info hnode;
5146 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5149 * We use the node structure for 5000 Series internally (it is
5150 * a superset of the one for 4965AGN). We thus copy the common
5151 * fields before sending the command.
5153 src = (caddr_t)node;
5154 dst = (caddr_t)&hnode;
5155 memcpy(dst, src, 48);
5156 /* Skip TSC, RX MIC and TX MIC fields from ``src''. */
5157 memcpy(dst + 48, src + 72, 20);
5158 return iwn_cmd(sc, IWN_CMD_ADD_NODE, &hnode, sizeof hnode, async);
5162 iwn5000_add_node(struct iwn_softc *sc, struct iwn_node_info *node, int async)
5165 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5167 /* Direct mapping. */
5168 return iwn_cmd(sc, IWN_CMD_ADD_NODE, node, sizeof (*node), async);
5172 iwn_set_link_quality(struct iwn_softc *sc, struct ieee80211_node *ni)
5174 struct iwn_node *wn = (void *)ni;
5175 struct ieee80211_rateset *rs;
5176 struct iwn_cmd_link_quality linkq;
5177 int i, rate, txrate;
5180 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
5182 memset(&linkq, 0, sizeof linkq);
5184 linkq.antmsk_1stream = iwn_get_1stream_tx_antmask(sc);
5185 linkq.antmsk_2stream = iwn_get_2stream_tx_antmask(sc);
5187 linkq.ampdu_max = 32; /* XXX negotiated? */
5188 linkq.ampdu_threshold = 3;
5189 linkq.ampdu_limit = htole16(4000); /* 4ms */
5191 DPRINTF(sc, IWN_DEBUG_XMIT,
5192 "%s: 1stream antenna=0x%02x, 2stream antenna=0x%02x, ntxstreams=%d\n",
5194 linkq.antmsk_1stream,
5195 linkq.antmsk_2stream,
5199 * Are we using 11n rates? Ensure the channel is
5200 * 11n _and_ we have some 11n rates, or don't
5203 if (IEEE80211_IS_CHAN_HT(ni->ni_chan) && ni->ni_htrates.rs_nrates > 0) {
5204 rs = (struct ieee80211_rateset *) &ni->ni_htrates;
5211 /* Start at highest available bit-rate. */
5213 * XXX this is all very dirty!
5216 txrate = ni->ni_htrates.rs_nrates - 1;
5218 txrate = rs->rs_nrates - 1;
5219 for (i = 0; i < IWN_MAX_TX_RETRIES; i++) {
5223 * XXX TODO: ensure the last two slots are the two lowest
5224 * rate entries, just for now.
5226 if (i == 14 || i == 15)
5230 rate = IEEE80211_RATE_MCS | rs->rs_rates[txrate];
5232 rate = IEEE80211_RV(rs->rs_rates[txrate]);
5234 /* Do rate -> PLCP config mapping */
5235 plcp = iwn_rate_to_plcp(sc, ni, rate);
5236 linkq.retry[i] = plcp;
5237 DPRINTF(sc, IWN_DEBUG_XMIT,
5238 "%s: i=%d, txrate=%d, rate=0x%02x, plcp=0x%08x\n",
5246 * The mimo field is an index into the table which
5247 * indicates the first index where it and subsequent entries
5248 * will not be using MIMO.
5250 * Since we're filling linkq from 0..15 and we're filling
5251 * from the highest MCS rates to the lowest rates, if we
5252 * _are_ doing a dual-stream rate, set mimo to idx+1 (ie,
5253 * the next entry.) That way if the next entry is a non-MIMO
5254 * entry, we're already pointing at it.
5256 if ((le32toh(plcp) & IWN_RFLAG_MCS) &&
5257 IEEE80211_RV(le32toh(plcp)) > 7)
5260 /* Next retry at immediate lower bit-rate. */
5265 * If we reached the end of the list and indeed we hit
5266 * all MIMO rates (eg 5300 doing MCS23-15) then yes,
5267 * set mimo to 15. Setting it to 16 panics the firmware.
5269 if (linkq.mimo > 15)
5272 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: mimo = %d\n", __func__, linkq.mimo);
5274 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
5276 return iwn_cmd(sc, IWN_CMD_LINK_QUALITY, &linkq, sizeof linkq, 1);
5280 * Broadcast node is used to send group-addressed and management frames.
5283 iwn_add_broadcast_node(struct iwn_softc *sc, int async)
5285 struct iwn_ops *ops = &sc->ops;
5286 struct ieee80211com *ic = &sc->sc_ic;
5287 struct iwn_node_info node;
5288 struct iwn_cmd_link_quality linkq;
5292 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
5294 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX];
5296 memset(&node, 0, sizeof node);
5297 IEEE80211_ADDR_COPY(node.macaddr, ieee80211broadcastaddr);
5298 node.id = sc->broadcast_id;
5299 DPRINTF(sc, IWN_DEBUG_RESET, "%s: adding broadcast node\n", __func__);
5300 if ((error = ops->add_node(sc, &node, async)) != 0)
5303 /* Use the first valid TX antenna. */
5304 txant = IWN_LSB(sc->txchainmask);
5306 memset(&linkq, 0, sizeof linkq);
5307 linkq.id = sc->broadcast_id;
5308 linkq.antmsk_1stream = iwn_get_1stream_tx_antmask(sc);
5309 linkq.antmsk_2stream = iwn_get_2stream_tx_antmask(sc);
5310 linkq.ampdu_max = 64;
5311 linkq.ampdu_threshold = 3;
5312 linkq.ampdu_limit = htole16(4000); /* 4ms */
5314 /* Use lowest mandatory bit-rate. */
5315 /* XXX rate table lookup? */
5316 if (IEEE80211_IS_CHAN_5GHZ(ic->ic_curchan))
5317 linkq.retry[0] = htole32(0xd);
5319 linkq.retry[0] = htole32(10 | IWN_RFLAG_CCK);
5320 linkq.retry[0] |= htole32(IWN_RFLAG_ANT(txant));
5321 /* Use same bit-rate for all TX retries. */
5322 for (i = 1; i < IWN_MAX_TX_RETRIES; i++) {
5323 linkq.retry[i] = linkq.retry[0];
5326 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
5328 return iwn_cmd(sc, IWN_CMD_LINK_QUALITY, &linkq, sizeof linkq, async);
5332 iwn_updateedca(struct ieee80211com *ic)
5334 #define IWN_EXP2(x) ((1 << (x)) - 1) /* CWmin = 2^ECWmin - 1 */
5335 struct iwn_softc *sc = ic->ic_softc;
5336 struct iwn_edca_params cmd;
5339 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
5341 memset(&cmd, 0, sizeof cmd);
5342 cmd.flags = htole32(IWN_EDCA_UPDATE);
5345 for (aci = 0; aci < WME_NUM_AC; aci++) {
5346 const struct wmeParams *ac =
5347 &ic->ic_wme.wme_chanParams.cap_wmeParams[aci];
5348 cmd.ac[aci].aifsn = ac->wmep_aifsn;
5349 cmd.ac[aci].cwmin = htole16(IWN_EXP2(ac->wmep_logcwmin));
5350 cmd.ac[aci].cwmax = htole16(IWN_EXP2(ac->wmep_logcwmax));
5351 cmd.ac[aci].txoplimit =
5352 htole16(IEEE80211_TXOP_TO_US(ac->wmep_txopLimit));
5354 IEEE80211_UNLOCK(ic);
5357 (void)iwn_cmd(sc, IWN_CMD_EDCA_PARAMS, &cmd, sizeof cmd, 1);
5360 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
5367 iwn_update_mcast(struct ieee80211com *ic)
5373 iwn_set_led(struct iwn_softc *sc, uint8_t which, uint8_t off, uint8_t on)
5375 struct iwn_cmd_led led;
5377 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5380 /* XXX don't set LEDs during scan? */
5381 if (sc->sc_is_scanning)
5385 /* Clear microcode LED ownership. */
5386 IWN_CLRBITS(sc, IWN_LED, IWN_LED_BSM_CTRL);
5389 led.unit = htole32(10000); /* on/off in unit of 100ms */
5392 (void)iwn_cmd(sc, IWN_CMD_SET_LED, &led, sizeof led, 1);
5396 * Set the critical temperature at which the firmware will stop the radio
5400 iwn_set_critical_temp(struct iwn_softc *sc)
5402 struct iwn_critical_temp crit;
5405 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5407 IWN_WRITE(sc, IWN_UCODE_GP1_CLR, IWN_UCODE_GP1_CTEMP_STOP_RF);
5409 if (sc->hw_type == IWN_HW_REV_TYPE_5150)
5410 temp = (IWN_CTOK(110) - sc->temp_off) * -5;
5411 else if (sc->hw_type == IWN_HW_REV_TYPE_4965)
5412 temp = IWN_CTOK(110);
5415 memset(&crit, 0, sizeof crit);
5416 crit.tempR = htole32(temp);
5417 DPRINTF(sc, IWN_DEBUG_RESET, "setting critical temp to %d\n", temp);
5418 return iwn_cmd(sc, IWN_CMD_SET_CRITICAL_TEMP, &crit, sizeof crit, 0);
5422 iwn_set_timing(struct iwn_softc *sc, struct ieee80211_node *ni)
5424 struct iwn_cmd_timing cmd;
5427 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5429 memset(&cmd, 0, sizeof cmd);
5430 memcpy(&cmd.tstamp, ni->ni_tstamp.data, sizeof (uint64_t));
5431 cmd.bintval = htole16(ni->ni_intval);
5432 cmd.lintval = htole16(10);
5434 /* Compute remaining time until next beacon. */
5435 val = (uint64_t)ni->ni_intval * IEEE80211_DUR_TU;
5436 mod = le64toh(cmd.tstamp) % val;
5437 cmd.binitval = htole32((uint32_t)(val - mod));
5439 DPRINTF(sc, IWN_DEBUG_RESET, "timing bintval=%u tstamp=%ju, init=%u\n",
5440 ni->ni_intval, le64toh(cmd.tstamp), (uint32_t)(val - mod));
5442 return iwn_cmd(sc, IWN_CMD_TIMING, &cmd, sizeof cmd, 1);
5446 iwn4965_power_calibration(struct iwn_softc *sc, int temp)
5448 struct ieee80211com *ic = &sc->sc_ic;
5450 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5452 /* Adjust TX power if need be (delta >= 3 degC). */
5453 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: temperature %d->%d\n",
5454 __func__, sc->temp, temp);
5455 if (abs(temp - sc->temp) >= 3) {
5456 /* Record temperature of last calibration. */
5458 (void)iwn4965_set_txpower(sc, ic->ic_bsschan, 1);
5463 * Set TX power for current channel (each rate has its own power settings).
5464 * This function takes into account the regulatory information from EEPROM,
5465 * the current temperature and the current voltage.
5468 iwn4965_set_txpower(struct iwn_softc *sc, struct ieee80211_channel *ch,
5471 /* Fixed-point arithmetic division using a n-bit fractional part. */
5472 #define fdivround(a, b, n) \
5473 ((((1 << n) * (a)) / (b) + (1 << n) / 2) / (1 << n))
5474 /* Linear interpolation. */
5475 #define interpolate(x, x1, y1, x2, y2, n) \
5476 ((y1) + fdivround(((int)(x) - (x1)) * ((y2) - (y1)), (x2) - (x1), n))
5478 static const int tdiv[IWN_NATTEN_GROUPS] = { 9, 8, 8, 8, 6 };
5479 struct iwn_ucode_info *uc = &sc->ucode_info;
5480 struct iwn4965_cmd_txpower cmd;
5481 struct iwn4965_eeprom_chan_samples *chans;
5482 const uint8_t *rf_gain, *dsp_gain;
5483 int32_t vdiff, tdiff;
5484 int i, c, grp, maxpwr;
5487 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX];
5488 /* Retrieve current channel from last RXON. */
5489 chan = sc->rxon->chan;
5490 DPRINTF(sc, IWN_DEBUG_RESET, "setting TX power for channel %d\n",
5493 memset(&cmd, 0, sizeof cmd);
5494 cmd.band = IEEE80211_IS_CHAN_5GHZ(ch) ? 0 : 1;
5497 if (IEEE80211_IS_CHAN_5GHZ(ch)) {
5498 maxpwr = sc->maxpwr5GHz;
5499 rf_gain = iwn4965_rf_gain_5ghz;
5500 dsp_gain = iwn4965_dsp_gain_5ghz;
5502 maxpwr = sc->maxpwr2GHz;
5503 rf_gain = iwn4965_rf_gain_2ghz;
5504 dsp_gain = iwn4965_dsp_gain_2ghz;
5507 /* Compute voltage compensation. */
5508 vdiff = ((int32_t)le32toh(uc->volt) - sc->eeprom_voltage) / 7;
5513 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
5514 "%s: voltage compensation=%d (UCODE=%d, EEPROM=%d)\n",
5515 __func__, vdiff, le32toh(uc->volt), sc->eeprom_voltage);
5517 /* Get channel attenuation group. */
5518 if (chan <= 20) /* 1-20 */
5520 else if (chan <= 43) /* 34-43 */
5522 else if (chan <= 70) /* 44-70 */
5524 else if (chan <= 124) /* 71-124 */
5528 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
5529 "%s: chan %d, attenuation group=%d\n", __func__, chan, grp);
5531 /* Get channel sub-band. */
5532 for (i = 0; i < IWN_NBANDS; i++)
5533 if (sc->bands[i].lo != 0 &&
5534 sc->bands[i].lo <= chan && chan <= sc->bands[i].hi)
5536 if (i == IWN_NBANDS) /* Can't happen in real-life. */
5538 chans = sc->bands[i].chans;
5539 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
5540 "%s: chan %d sub-band=%d\n", __func__, chan, i);
5542 for (c = 0; c < 2; c++) {
5543 uint8_t power, gain, temp;
5544 int maxchpwr, pwr, ridx, idx;
5546 power = interpolate(chan,
5547 chans[0].num, chans[0].samples[c][1].power,
5548 chans[1].num, chans[1].samples[c][1].power, 1);
5549 gain = interpolate(chan,
5550 chans[0].num, chans[0].samples[c][1].gain,
5551 chans[1].num, chans[1].samples[c][1].gain, 1);
5552 temp = interpolate(chan,
5553 chans[0].num, chans[0].samples[c][1].temp,
5554 chans[1].num, chans[1].samples[c][1].temp, 1);
5555 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
5556 "%s: Tx chain %d: power=%d gain=%d temp=%d\n",
5557 __func__, c, power, gain, temp);
5559 /* Compute temperature compensation. */
5560 tdiff = ((sc->temp - temp) * 2) / tdiv[grp];
5561 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
5562 "%s: temperature compensation=%d (current=%d, EEPROM=%d)\n",
5563 __func__, tdiff, sc->temp, temp);
5565 for (ridx = 0; ridx <= IWN_RIDX_MAX; ridx++) {
5566 /* Convert dBm to half-dBm. */
5567 maxchpwr = sc->maxpwr[chan] * 2;
5569 maxchpwr -= 6; /* MIMO 2T: -3dB */
5573 /* Adjust TX power based on rate. */
5574 if ((ridx % 8) == 5)
5575 pwr -= 15; /* OFDM48: -7.5dB */
5576 else if ((ridx % 8) == 6)
5577 pwr -= 17; /* OFDM54: -8.5dB */
5578 else if ((ridx % 8) == 7)
5579 pwr -= 20; /* OFDM60: -10dB */
5581 pwr -= 10; /* Others: -5dB */
5583 /* Do not exceed channel max TX power. */
5587 idx = gain - (pwr - power) - tdiff - vdiff;
5588 if ((ridx / 8) & 1) /* MIMO */
5589 idx += (int32_t)le32toh(uc->atten[grp][c]);
5592 idx += 9; /* 5GHz */
5593 if (ridx == IWN_RIDX_MAX)
5596 /* Make sure idx stays in a valid range. */
5599 else if (idx > IWN4965_MAX_PWR_INDEX)
5600 idx = IWN4965_MAX_PWR_INDEX;
5602 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
5603 "%s: Tx chain %d, rate idx %d: power=%d\n",
5604 __func__, c, ridx, idx);
5605 cmd.power[ridx].rf_gain[c] = rf_gain[idx];
5606 cmd.power[ridx].dsp_gain[c] = dsp_gain[idx];
5610 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
5611 "%s: set tx power for chan %d\n", __func__, chan);
5612 return iwn_cmd(sc, IWN_CMD_TXPOWER, &cmd, sizeof cmd, async);
5619 iwn5000_set_txpower(struct iwn_softc *sc, struct ieee80211_channel *ch,
5622 struct iwn5000_cmd_txpower cmd;
5625 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5628 * TX power calibration is handled automatically by the firmware
5631 memset(&cmd, 0, sizeof cmd);
5632 cmd.global_limit = 2 * IWN5000_TXPOWER_MAX_DBM; /* 16 dBm */
5633 cmd.flags = IWN5000_TXPOWER_NO_CLOSED;
5634 cmd.srv_limit = IWN5000_TXPOWER_AUTO;
5635 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_XMIT,
5636 "%s: setting TX power; rev=%d\n",
5638 IWN_UCODE_API(sc->ucode_rev));
5639 if (IWN_UCODE_API(sc->ucode_rev) == 1)
5640 cmdid = IWN_CMD_TXPOWER_DBM_V1;
5642 cmdid = IWN_CMD_TXPOWER_DBM;
5643 return iwn_cmd(sc, cmdid, &cmd, sizeof cmd, async);
5647 * Retrieve the maximum RSSI (in dBm) among receivers.
5650 iwn4965_get_rssi(struct iwn_softc *sc, struct iwn_rx_stat *stat)
5652 struct iwn4965_rx_phystat *phy = (void *)stat->phybuf;
5656 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5658 mask = (le16toh(phy->antenna) >> 4) & IWN_ANT_ABC;
5659 agc = (le16toh(phy->agc) >> 7) & 0x7f;
5662 if (mask & IWN_ANT_A)
5663 rssi = MAX(rssi, phy->rssi[0]);
5664 if (mask & IWN_ANT_B)
5665 rssi = MAX(rssi, phy->rssi[2]);
5666 if (mask & IWN_ANT_C)
5667 rssi = MAX(rssi, phy->rssi[4]);
5669 DPRINTF(sc, IWN_DEBUG_RECV,
5670 "%s: agc %d mask 0x%x rssi %d %d %d result %d\n", __func__, agc,
5671 mask, phy->rssi[0], phy->rssi[2], phy->rssi[4],
5672 rssi - agc - IWN_RSSI_TO_DBM);
5673 return rssi - agc - IWN_RSSI_TO_DBM;
5677 iwn5000_get_rssi(struct iwn_softc *sc, struct iwn_rx_stat *stat)
5679 struct iwn5000_rx_phystat *phy = (void *)stat->phybuf;
5683 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5685 agc = (le32toh(phy->agc) >> 9) & 0x7f;
5687 rssi = MAX(le16toh(phy->rssi[0]) & 0xff,
5688 le16toh(phy->rssi[1]) & 0xff);
5689 rssi = MAX(le16toh(phy->rssi[2]) & 0xff, rssi);
5691 DPRINTF(sc, IWN_DEBUG_RECV,
5692 "%s: agc %d rssi %d %d %d result %d\n", __func__, agc,
5693 phy->rssi[0], phy->rssi[1], phy->rssi[2],
5694 rssi - agc - IWN_RSSI_TO_DBM);
5695 return rssi - agc - IWN_RSSI_TO_DBM;
5699 * Retrieve the average noise (in dBm) among receivers.
5702 iwn_get_noise(const struct iwn_rx_general_stats *stats)
5704 int i, total, nbant, noise;
5707 for (i = 0; i < 3; i++) {
5708 if ((noise = le32toh(stats->noise[i]) & 0xff) == 0)
5713 /* There should be at least one antenna but check anyway. */
5714 return (nbant == 0) ? -127 : (total / nbant) - 107;
5718 * Compute temperature (in degC) from last received statistics.
5721 iwn4965_get_temperature(struct iwn_softc *sc)
5723 struct iwn_ucode_info *uc = &sc->ucode_info;
5724 int32_t r1, r2, r3, r4, temp;
5726 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5728 r1 = le32toh(uc->temp[0].chan20MHz);
5729 r2 = le32toh(uc->temp[1].chan20MHz);
5730 r3 = le32toh(uc->temp[2].chan20MHz);
5731 r4 = le32toh(sc->rawtemp);
5733 if (r1 == r3) /* Prevents division by 0 (should not happen). */
5736 /* Sign-extend 23-bit R4 value to 32-bit. */
5737 r4 = ((r4 & 0xffffff) ^ 0x800000) - 0x800000;
5738 /* Compute temperature in Kelvin. */
5739 temp = (259 * (r4 - r2)) / (r3 - r1);
5740 temp = (temp * 97) / 100 + 8;
5742 DPRINTF(sc, IWN_DEBUG_ANY, "temperature %dK/%dC\n", temp,
5744 return IWN_KTOC(temp);
5748 iwn5000_get_temperature(struct iwn_softc *sc)
5752 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5755 * Temperature is not used by the driver for 5000 Series because
5756 * TX power calibration is handled by firmware.
5758 temp = le32toh(sc->rawtemp);
5759 if (sc->hw_type == IWN_HW_REV_TYPE_5150) {
5760 temp = (temp / -5) + sc->temp_off;
5761 temp = IWN_KTOC(temp);
5767 * Initialize sensitivity calibration state machine.
5770 iwn_init_sensitivity(struct iwn_softc *sc)
5772 struct iwn_ops *ops = &sc->ops;
5773 struct iwn_calib_state *calib = &sc->calib;
5777 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5779 /* Reset calibration state machine. */
5780 memset(calib, 0, sizeof (*calib));
5781 calib->state = IWN_CALIB_STATE_INIT;
5782 calib->cck_state = IWN_CCK_STATE_HIFA;
5783 /* Set initial correlation values. */
5784 calib->ofdm_x1 = sc->limits->min_ofdm_x1;
5785 calib->ofdm_mrc_x1 = sc->limits->min_ofdm_mrc_x1;
5786 calib->ofdm_x4 = sc->limits->min_ofdm_x4;
5787 calib->ofdm_mrc_x4 = sc->limits->min_ofdm_mrc_x4;
5788 calib->cck_x4 = 125;
5789 calib->cck_mrc_x4 = sc->limits->min_cck_mrc_x4;
5790 calib->energy_cck = sc->limits->energy_cck;
5792 /* Write initial sensitivity. */
5793 if ((error = iwn_send_sensitivity(sc)) != 0)
5796 /* Write initial gains. */
5797 if ((error = ops->init_gains(sc)) != 0)
5800 /* Request statistics at each beacon interval. */
5802 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: sending request for statistics\n",
5804 return iwn_cmd(sc, IWN_CMD_GET_STATISTICS, &flags, sizeof flags, 1);
5808 * Collect noise and RSSI statistics for the first 20 beacons received
5809 * after association and use them to determine connected antennas and
5810 * to set differential gains.
5813 iwn_collect_noise(struct iwn_softc *sc,
5814 const struct iwn_rx_general_stats *stats)
5816 struct iwn_ops *ops = &sc->ops;
5817 struct iwn_calib_state *calib = &sc->calib;
5818 struct ieee80211com *ic = &sc->sc_ic;
5822 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
5824 /* Accumulate RSSI and noise for all 3 antennas. */
5825 for (i = 0; i < 3; i++) {
5826 calib->rssi[i] += le32toh(stats->rssi[i]) & 0xff;
5827 calib->noise[i] += le32toh(stats->noise[i]) & 0xff;
5829 /* NB: We update differential gains only once after 20 beacons. */
5830 if (++calib->nbeacons < 20)
5833 /* Determine highest average RSSI. */
5834 val = MAX(calib->rssi[0], calib->rssi[1]);
5835 val = MAX(calib->rssi[2], val);
5837 /* Determine which antennas are connected. */
5838 sc->chainmask = sc->rxchainmask;
5839 for (i = 0; i < 3; i++)
5840 if (val - calib->rssi[i] > 15 * 20)
5841 sc->chainmask &= ~(1 << i);
5842 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_XMIT,
5843 "%s: RX chains mask: theoretical=0x%x, actual=0x%x\n",
5844 __func__, sc->rxchainmask, sc->chainmask);
5846 /* If none of the TX antennas are connected, keep at least one. */
5847 if ((sc->chainmask & sc->txchainmask) == 0)
5848 sc->chainmask |= IWN_LSB(sc->txchainmask);
5850 (void)ops->set_gains(sc);
5851 calib->state = IWN_CALIB_STATE_RUN;
5854 /* XXX Disable RX chains with no antennas connected. */
5855 sc->rxon->rxchain = htole16(IWN_RXCHAIN_SEL(sc->chainmask));
5856 if (sc->sc_is_scanning)
5857 device_printf(sc->sc_dev,
5858 "%s: is_scanning set, before RXON\n",
5860 (void)iwn_cmd(sc, IWN_CMD_RXON, sc->rxon, sc->rxonsz, 1);
5863 /* Enable power-saving mode if requested by user. */
5864 if (ic->ic_flags & IEEE80211_F_PMGTON)
5865 (void)iwn_set_pslevel(sc, 0, 3, 1);
5867 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
5872 iwn4965_init_gains(struct iwn_softc *sc)
5874 struct iwn_phy_calib_gain cmd;
5876 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5878 memset(&cmd, 0, sizeof cmd);
5879 cmd.code = IWN4965_PHY_CALIB_DIFF_GAIN;
5880 /* Differential gains initially set to 0 for all 3 antennas. */
5881 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
5882 "%s: setting initial differential gains\n", __func__);
5883 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 1);
5887 iwn5000_init_gains(struct iwn_softc *sc)
5889 struct iwn_phy_calib cmd;
5891 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5893 memset(&cmd, 0, sizeof cmd);
5894 cmd.code = sc->reset_noise_gain;
5897 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
5898 "%s: setting initial differential gains\n", __func__);
5899 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 1);
5903 iwn4965_set_gains(struct iwn_softc *sc)
5905 struct iwn_calib_state *calib = &sc->calib;
5906 struct iwn_phy_calib_gain cmd;
5907 int i, delta, noise;
5909 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5911 /* Get minimal noise among connected antennas. */
5912 noise = INT_MAX; /* NB: There's at least one antenna. */
5913 for (i = 0; i < 3; i++)
5914 if (sc->chainmask & (1 << i))
5915 noise = MIN(calib->noise[i], noise);
5917 memset(&cmd, 0, sizeof cmd);
5918 cmd.code = IWN4965_PHY_CALIB_DIFF_GAIN;
5919 /* Set differential gains for connected antennas. */
5920 for (i = 0; i < 3; i++) {
5921 if (sc->chainmask & (1 << i)) {
5922 /* Compute attenuation (in unit of 1.5dB). */
5923 delta = (noise - (int32_t)calib->noise[i]) / 30;
5924 /* NB: delta <= 0 */
5925 /* Limit to [-4.5dB,0]. */
5926 cmd.gain[i] = MIN(abs(delta), 3);
5928 cmd.gain[i] |= 1 << 2; /* sign bit */
5931 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
5932 "setting differential gains Ant A/B/C: %x/%x/%x (%x)\n",
5933 cmd.gain[0], cmd.gain[1], cmd.gain[2], sc->chainmask);
5934 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 1);
5938 iwn5000_set_gains(struct iwn_softc *sc)
5940 struct iwn_calib_state *calib = &sc->calib;
5941 struct iwn_phy_calib_gain cmd;
5942 int i, ant, div, delta;
5944 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5946 /* We collected 20 beacons and !=6050 need a 1.5 factor. */
5947 div = (sc->hw_type == IWN_HW_REV_TYPE_6050) ? 20 : 30;
5949 memset(&cmd, 0, sizeof cmd);
5950 cmd.code = sc->noise_gain;
5953 /* Get first available RX antenna as referential. */
5954 ant = IWN_LSB(sc->rxchainmask);
5955 /* Set differential gains for other antennas. */
5956 for (i = ant + 1; i < 3; i++) {
5957 if (sc->chainmask & (1 << i)) {
5958 /* The delta is relative to antenna "ant". */
5959 delta = ((int32_t)calib->noise[ant] -
5960 (int32_t)calib->noise[i]) / div;
5961 /* Limit to [-4.5dB,+4.5dB]. */
5962 cmd.gain[i - 1] = MIN(abs(delta), 3);
5964 cmd.gain[i - 1] |= 1 << 2; /* sign bit */
5967 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_XMIT,
5968 "setting differential gains Ant B/C: %x/%x (%x)\n",
5969 cmd.gain[0], cmd.gain[1], sc->chainmask);
5970 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 1);
5974 * Tune RF RX sensitivity based on the number of false alarms detected
5975 * during the last beacon period.
5978 iwn_tune_sensitivity(struct iwn_softc *sc, const struct iwn_rx_stats *stats)
5980 #define inc(val, inc, max) \
5981 if ((val) < (max)) { \
5982 if ((val) < (max) - (inc)) \
5988 #define dec(val, dec, min) \
5989 if ((val) > (min)) { \
5990 if ((val) > (min) + (dec)) \
5997 const struct iwn_sensitivity_limits *limits = sc->limits;
5998 struct iwn_calib_state *calib = &sc->calib;
5999 uint32_t val, rxena, fa;
6000 uint32_t energy[3], energy_min;
6001 uint8_t noise[3], noise_ref;
6002 int i, needs_update = 0;
6004 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
6006 /* Check that we've been enabled long enough. */
6007 if ((rxena = le32toh(stats->general.load)) == 0){
6008 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end not so long\n", __func__);
6012 /* Compute number of false alarms since last call for OFDM. */
6013 fa = le32toh(stats->ofdm.bad_plcp) - calib->bad_plcp_ofdm;
6014 fa += le32toh(stats->ofdm.fa) - calib->fa_ofdm;
6015 fa *= 200 * IEEE80211_DUR_TU; /* 200TU */
6017 if (fa > 50 * rxena) {
6018 /* High false alarm count, decrease sensitivity. */
6019 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
6020 "%s: OFDM high false alarm count: %u\n", __func__, fa);
6021 inc(calib->ofdm_x1, 1, limits->max_ofdm_x1);
6022 inc(calib->ofdm_mrc_x1, 1, limits->max_ofdm_mrc_x1);
6023 inc(calib->ofdm_x4, 1, limits->max_ofdm_x4);
6024 inc(calib->ofdm_mrc_x4, 1, limits->max_ofdm_mrc_x4);
6026 } else if (fa < 5 * rxena) {
6027 /* Low false alarm count, increase sensitivity. */
6028 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
6029 "%s: OFDM low false alarm count: %u\n", __func__, fa);
6030 dec(calib->ofdm_x1, 1, limits->min_ofdm_x1);
6031 dec(calib->ofdm_mrc_x1, 1, limits->min_ofdm_mrc_x1);
6032 dec(calib->ofdm_x4, 1, limits->min_ofdm_x4);
6033 dec(calib->ofdm_mrc_x4, 1, limits->min_ofdm_mrc_x4);
6036 /* Compute maximum noise among 3 receivers. */
6037 for (i = 0; i < 3; i++)
6038 noise[i] = (le32toh(stats->general.noise[i]) >> 8) & 0xff;
6039 val = MAX(noise[0], noise[1]);
6040 val = MAX(noise[2], val);
6041 /* Insert it into our samples table. */
6042 calib->noise_samples[calib->cur_noise_sample] = val;
6043 calib->cur_noise_sample = (calib->cur_noise_sample + 1) % 20;
6045 /* Compute maximum noise among last 20 samples. */
6046 noise_ref = calib->noise_samples[0];
6047 for (i = 1; i < 20; i++)
6048 noise_ref = MAX(noise_ref, calib->noise_samples[i]);
6050 /* Compute maximum energy among 3 receivers. */
6051 for (i = 0; i < 3; i++)
6052 energy[i] = le32toh(stats->general.energy[i]);
6053 val = MIN(energy[0], energy[1]);
6054 val = MIN(energy[2], val);
6055 /* Insert it into our samples table. */
6056 calib->energy_samples[calib->cur_energy_sample] = val;
6057 calib->cur_energy_sample = (calib->cur_energy_sample + 1) % 10;
6059 /* Compute minimum energy among last 10 samples. */
6060 energy_min = calib->energy_samples[0];
6061 for (i = 1; i < 10; i++)
6062 energy_min = MAX(energy_min, calib->energy_samples[i]);
6065 /* Compute number of false alarms since last call for CCK. */
6066 fa = le32toh(stats->cck.bad_plcp) - calib->bad_plcp_cck;
6067 fa += le32toh(stats->cck.fa) - calib->fa_cck;
6068 fa *= 200 * IEEE80211_DUR_TU; /* 200TU */
6070 if (fa > 50 * rxena) {
6071 /* High false alarm count, decrease sensitivity. */
6072 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
6073 "%s: CCK high false alarm count: %u\n", __func__, fa);
6074 calib->cck_state = IWN_CCK_STATE_HIFA;
6077 if (calib->cck_x4 > 160) {
6078 calib->noise_ref = noise_ref;
6079 if (calib->energy_cck > 2)
6080 dec(calib->energy_cck, 2, energy_min);
6082 if (calib->cck_x4 < 160) {
6083 calib->cck_x4 = 161;
6086 inc(calib->cck_x4, 3, limits->max_cck_x4);
6088 inc(calib->cck_mrc_x4, 3, limits->max_cck_mrc_x4);
6090 } else if (fa < 5 * rxena) {
6091 /* Low false alarm count, increase sensitivity. */
6092 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
6093 "%s: CCK low false alarm count: %u\n", __func__, fa);
6094 calib->cck_state = IWN_CCK_STATE_LOFA;
6097 if (calib->cck_state != IWN_CCK_STATE_INIT &&
6098 (((int32_t)calib->noise_ref - (int32_t)noise_ref) > 2 ||
6099 calib->low_fa > 100)) {
6100 inc(calib->energy_cck, 2, limits->min_energy_cck);
6101 dec(calib->cck_x4, 3, limits->min_cck_x4);
6102 dec(calib->cck_mrc_x4, 3, limits->min_cck_mrc_x4);
6105 /* Not worth to increase or decrease sensitivity. */
6106 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
6107 "%s: CCK normal false alarm count: %u\n", __func__, fa);
6109 calib->noise_ref = noise_ref;
6111 if (calib->cck_state == IWN_CCK_STATE_HIFA) {
6112 /* Previous interval had many false alarms. */
6113 dec(calib->energy_cck, 8, energy_min);
6115 calib->cck_state = IWN_CCK_STATE_INIT;
6119 (void)iwn_send_sensitivity(sc);
6121 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
6128 iwn_send_sensitivity(struct iwn_softc *sc)
6130 struct iwn_calib_state *calib = &sc->calib;
6131 struct iwn_enhanced_sensitivity_cmd cmd;
6134 memset(&cmd, 0, sizeof cmd);
6135 len = sizeof (struct iwn_sensitivity_cmd);
6136 cmd.which = IWN_SENSITIVITY_WORKTBL;
6137 /* OFDM modulation. */
6138 cmd.corr_ofdm_x1 = htole16(calib->ofdm_x1);
6139 cmd.corr_ofdm_mrc_x1 = htole16(calib->ofdm_mrc_x1);
6140 cmd.corr_ofdm_x4 = htole16(calib->ofdm_x4);
6141 cmd.corr_ofdm_mrc_x4 = htole16(calib->ofdm_mrc_x4);
6142 cmd.energy_ofdm = htole16(sc->limits->energy_ofdm);
6143 cmd.energy_ofdm_th = htole16(62);
6144 /* CCK modulation. */
6145 cmd.corr_cck_x4 = htole16(calib->cck_x4);
6146 cmd.corr_cck_mrc_x4 = htole16(calib->cck_mrc_x4);
6147 cmd.energy_cck = htole16(calib->energy_cck);
6148 /* Barker modulation: use default values. */
6149 cmd.corr_barker = htole16(190);
6150 cmd.corr_barker_mrc = htole16(sc->limits->barker_mrc);
6152 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
6153 "%s: set sensitivity %d/%d/%d/%d/%d/%d/%d\n", __func__,
6154 calib->ofdm_x1, calib->ofdm_mrc_x1, calib->ofdm_x4,
6155 calib->ofdm_mrc_x4, calib->cck_x4,
6156 calib->cck_mrc_x4, calib->energy_cck);
6158 if (!(sc->sc_flags & IWN_FLAG_ENH_SENS))
6160 /* Enhanced sensitivity settings. */
6161 len = sizeof (struct iwn_enhanced_sensitivity_cmd);
6162 cmd.ofdm_det_slope_mrc = htole16(668);
6163 cmd.ofdm_det_icept_mrc = htole16(4);
6164 cmd.ofdm_det_slope = htole16(486);
6165 cmd.ofdm_det_icept = htole16(37);
6166 cmd.cck_det_slope_mrc = htole16(853);
6167 cmd.cck_det_icept_mrc = htole16(4);
6168 cmd.cck_det_slope = htole16(476);
6169 cmd.cck_det_icept = htole16(99);
6171 return iwn_cmd(sc, IWN_CMD_SET_SENSITIVITY, &cmd, len, 1);
6175 * Look at the increase of PLCP errors over time; if it exceeds
6176 * a programmed threshold then trigger an RF retune.
6179 iwn_check_rx_recovery(struct iwn_softc *sc, struct iwn_stats *rs)
6181 int32_t delta_ofdm, delta_ht, delta_cck;
6182 struct iwn_calib_state *calib = &sc->calib;
6183 int delta_ticks, cur_ticks;
6188 * Calculate the difference between the current and
6189 * previous statistics.
6191 delta_cck = le32toh(rs->rx.cck.bad_plcp) - calib->bad_plcp_cck;
6192 delta_ofdm = le32toh(rs->rx.ofdm.bad_plcp) - calib->bad_plcp_ofdm;
6193 delta_ht = le32toh(rs->rx.ht.bad_plcp) - calib->bad_plcp_ht;
6196 * Calculate the delta in time between successive statistics
6197 * messages. Yes, it can roll over; so we make sure that
6198 * this doesn't happen.
6200 * XXX go figure out what to do about rollover
6201 * XXX go figure out what to do if ticks rolls over to -ve instead!
6202 * XXX go stab signed integer overflow undefined-ness in the face.
6205 delta_ticks = cur_ticks - sc->last_calib_ticks;
6208 * If any are negative, then the firmware likely reset; so just
6209 * bail. We'll pick this up next time.
6211 if (delta_cck < 0 || delta_ofdm < 0 || delta_ht < 0 || delta_ticks < 0)
6215 * delta_ticks is in ticks; we need to convert it up to milliseconds
6216 * so we can do some useful math with it.
6218 delta_msec = ticks_to_msecs(delta_ticks);
6221 * Calculate what our threshold is given the current delta_msec.
6223 thresh = sc->base_params->plcp_err_threshold * delta_msec;
6225 DPRINTF(sc, IWN_DEBUG_STATE,
6226 "%s: time delta: %d; cck=%d, ofdm=%d, ht=%d, total=%d, thresh=%d\n",
6232 (delta_msec + delta_cck + delta_ofdm + delta_ht),
6236 * If we need a retune, then schedule a single channel scan
6237 * to a channel that isn't the currently active one!
6239 * The math from linux iwlwifi:
6241 * if ((delta * 100 / msecs) > threshold)
6243 if (thresh > 0 && (delta_cck + delta_ofdm + delta_ht) * 100 > thresh) {
6244 DPRINTF(sc, IWN_DEBUG_ANY,
6245 "%s: PLCP error threshold raw (%d) comparison (%d) "
6246 "over limit (%d); retune!\n",
6248 (delta_cck + delta_ofdm + delta_ht),
6249 (delta_cck + delta_ofdm + delta_ht) * 100,
6255 * Set STA mode power saving level (between 0 and 5).
6256 * Level 0 is CAM (Continuously Aware Mode), 5 is for maximum power saving.
6259 iwn_set_pslevel(struct iwn_softc *sc, int dtim, int level, int async)
6261 struct iwn_pmgt_cmd cmd;
6262 const struct iwn_pmgt *pmgt;
6263 uint32_t max, skip_dtim;
6267 DPRINTF(sc, IWN_DEBUG_PWRSAVE,
6268 "%s: dtim=%d, level=%d, async=%d\n",
6274 /* Select which PS parameters to use. */
6276 pmgt = &iwn_pmgt[0][level];
6277 else if (dtim <= 10)
6278 pmgt = &iwn_pmgt[1][level];
6280 pmgt = &iwn_pmgt[2][level];
6282 memset(&cmd, 0, sizeof cmd);
6283 if (level != 0) /* not CAM */
6284 cmd.flags |= htole16(IWN_PS_ALLOW_SLEEP);
6286 cmd.flags |= htole16(IWN_PS_FAST_PD);
6287 /* Retrieve PCIe Active State Power Management (ASPM). */
6288 reg = pci_read_config(sc->sc_dev, sc->sc_cap_off + PCIER_LINK_CTL, 4);
6289 if (!(reg & PCIEM_LINK_CTL_ASPMC_L0S)) /* L0s Entry disabled. */
6290 cmd.flags |= htole16(IWN_PS_PCI_PMGT);
6291 cmd.rxtimeout = htole32(pmgt->rxtimeout * 1024);
6292 cmd.txtimeout = htole32(pmgt->txtimeout * 1024);
6298 skip_dtim = pmgt->skip_dtim;
6299 if (skip_dtim != 0) {
6300 cmd.flags |= htole16(IWN_PS_SLEEP_OVER_DTIM);
6301 max = pmgt->intval[4];
6302 if (max == (uint32_t)-1)
6303 max = dtim * (skip_dtim + 1);
6304 else if (max > dtim)
6305 max = rounddown(max, dtim);
6308 for (i = 0; i < 5; i++)
6309 cmd.intval[i] = htole32(MIN(max, pmgt->intval[i]));
6311 DPRINTF(sc, IWN_DEBUG_RESET, "setting power saving level to %d\n",
6313 return iwn_cmd(sc, IWN_CMD_SET_POWER_MODE, &cmd, sizeof cmd, async);
6317 iwn_send_btcoex(struct iwn_softc *sc)
6319 struct iwn_bluetooth cmd;
6321 memset(&cmd, 0, sizeof cmd);
6322 cmd.flags = IWN_BT_COEX_CHAN_ANN | IWN_BT_COEX_BT_PRIO;
6323 cmd.lead_time = IWN_BT_LEAD_TIME_DEF;
6324 cmd.max_kill = IWN_BT_MAX_KILL_DEF;
6325 DPRINTF(sc, IWN_DEBUG_RESET, "%s: configuring bluetooth coexistence\n",
6327 return iwn_cmd(sc, IWN_CMD_BT_COEX, &cmd, sizeof(cmd), 0);
6331 iwn_send_advanced_btcoex(struct iwn_softc *sc)
6333 static const uint32_t btcoex_3wire[12] = {
6334 0xaaaaaaaa, 0xaaaaaaaa, 0xaeaaaaaa, 0xaaaaaaaa,
6335 0xcc00ff28, 0x0000aaaa, 0xcc00aaaa, 0x0000aaaa,
6336 0xc0004000, 0x00004000, 0xf0005000, 0xf0005000,
6338 struct iwn6000_btcoex_config btconfig;
6339 struct iwn2000_btcoex_config btconfig2k;
6340 struct iwn_btcoex_priotable btprio;
6341 struct iwn_btcoex_prot btprot;
6345 memset(&btconfig, 0, sizeof btconfig);
6346 memset(&btconfig2k, 0, sizeof btconfig2k);
6348 flags = IWN_BT_FLAG_COEX6000_MODE_3W <<
6349 IWN_BT_FLAG_COEX6000_MODE_SHIFT; // Done as is in linux kernel 3.2
6351 if (sc->base_params->bt_sco_disable)
6352 flags &= ~IWN_BT_FLAG_SYNC_2_BT_DISABLE;
6354 flags |= IWN_BT_FLAG_SYNC_2_BT_DISABLE;
6356 flags |= IWN_BT_FLAG_COEX6000_CHAN_INHIBITION;
6358 /* Default flags result is 145 as old value */
6361 * Flags value has to be review. Values must change if we
6362 * which to disable it
6364 if (sc->base_params->bt_session_2) {
6365 btconfig2k.flags = flags;
6366 btconfig2k.max_kill = 5;
6367 btconfig2k.bt3_t7_timer = 1;
6368 btconfig2k.kill_ack = htole32(0xffff0000);
6369 btconfig2k.kill_cts = htole32(0xffff0000);
6370 btconfig2k.sample_time = 2;
6371 btconfig2k.bt3_t2_timer = 0xc;
6373 for (i = 0; i < 12; i++)
6374 btconfig2k.lookup_table[i] = htole32(btcoex_3wire[i]);
6375 btconfig2k.valid = htole16(0xff);
6376 btconfig2k.prio_boost = htole32(0xf0);
6377 DPRINTF(sc, IWN_DEBUG_RESET,
6378 "%s: configuring advanced bluetooth coexistence"
6379 " session 2, flags : 0x%x\n",
6382 error = iwn_cmd(sc, IWN_CMD_BT_COEX, &btconfig2k,
6383 sizeof(btconfig2k), 1);
6385 btconfig.flags = flags;
6386 btconfig.max_kill = 5;
6387 btconfig.bt3_t7_timer = 1;
6388 btconfig.kill_ack = htole32(0xffff0000);
6389 btconfig.kill_cts = htole32(0xffff0000);
6390 btconfig.sample_time = 2;
6391 btconfig.bt3_t2_timer = 0xc;
6393 for (i = 0; i < 12; i++)
6394 btconfig.lookup_table[i] = htole32(btcoex_3wire[i]);
6395 btconfig.valid = htole16(0xff);
6396 btconfig.prio_boost = 0xf0;
6397 DPRINTF(sc, IWN_DEBUG_RESET,
6398 "%s: configuring advanced bluetooth coexistence,"
6402 error = iwn_cmd(sc, IWN_CMD_BT_COEX, &btconfig,
6403 sizeof(btconfig), 1);
6409 memset(&btprio, 0, sizeof btprio);
6410 btprio.calib_init1 = 0x6;
6411 btprio.calib_init2 = 0x7;
6412 btprio.calib_periodic_low1 = 0x2;
6413 btprio.calib_periodic_low2 = 0x3;
6414 btprio.calib_periodic_high1 = 0x4;
6415 btprio.calib_periodic_high2 = 0x5;
6417 btprio.scan52 = 0x8;
6418 btprio.scan24 = 0xa;
6419 error = iwn_cmd(sc, IWN_CMD_BT_COEX_PRIOTABLE, &btprio, sizeof(btprio),
6424 /* Force BT state machine change. */
6425 memset(&btprot, 0, sizeof btprot);
6428 error = iwn_cmd(sc, IWN_CMD_BT_COEX_PROT, &btprot, sizeof(btprot), 1);
6432 return iwn_cmd(sc, IWN_CMD_BT_COEX_PROT, &btprot, sizeof(btprot), 1);
6436 iwn5000_runtime_calib(struct iwn_softc *sc)
6438 struct iwn5000_calib_config cmd;
6440 memset(&cmd, 0, sizeof cmd);
6441 cmd.ucode.once.enable = 0xffffffff;
6442 cmd.ucode.once.start = IWN5000_CALIB_DC;
6443 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
6444 "%s: configuring runtime calibration\n", __func__);
6445 return iwn_cmd(sc, IWN5000_CMD_CALIB_CONFIG, &cmd, sizeof(cmd), 0);
6449 iwn_get_rxon_ht_flags(struct iwn_softc *sc, struct ieee80211_channel *c)
6451 struct ieee80211com *ic = &sc->sc_ic;
6452 uint32_t htflags = 0;
6454 if (! IEEE80211_IS_CHAN_HT(c))
6457 htflags |= IWN_RXON_HT_PROTMODE(ic->ic_curhtprotmode);
6459 if (IEEE80211_IS_CHAN_HT40(c)) {
6460 switch (ic->ic_curhtprotmode) {
6461 case IEEE80211_HTINFO_OPMODE_HT20PR:
6462 htflags |= IWN_RXON_HT_MODEPURE40;
6465 htflags |= IWN_RXON_HT_MODEMIXED;
6469 if (IEEE80211_IS_CHAN_HT40D(c))
6470 htflags |= IWN_RXON_HT_HT40MINUS;
6476 iwn_config(struct iwn_softc *sc)
6478 struct iwn_ops *ops = &sc->ops;
6479 struct ieee80211com *ic = &sc->sc_ic;
6480 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
6481 const uint8_t *macaddr;
6486 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
6488 if ((sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSET)
6489 && (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSETv2)) {
6490 device_printf(sc->sc_dev,"%s: temp_offset and temp_offsetv2 are"
6491 " exclusive each together. Review NIC config file. Conf"
6492 " : 0x%08x Flags : 0x%08x \n", __func__,
6493 sc->base_params->calib_need,
6494 (IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSET |
6495 IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSETv2));
6499 /* Compute temperature calib if needed. Will be send by send calib */
6500 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSET) {
6501 error = iwn5000_temp_offset_calib(sc);
6503 device_printf(sc->sc_dev,
6504 "%s: could not set temperature offset\n", __func__);
6507 } else if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSETv2) {
6508 error = iwn5000_temp_offset_calibv2(sc);
6510 device_printf(sc->sc_dev,
6511 "%s: could not compute temperature offset v2\n",
6517 if (sc->hw_type == IWN_HW_REV_TYPE_6050) {
6518 /* Configure runtime DC calibration. */
6519 error = iwn5000_runtime_calib(sc);
6521 device_printf(sc->sc_dev,
6522 "%s: could not configure runtime calibration\n",
6528 /* Configure valid TX chains for >=5000 Series. */
6529 if (sc->hw_type != IWN_HW_REV_TYPE_4965 &&
6530 IWN_UCODE_API(sc->ucode_rev) > 1) {
6531 txmask = htole32(sc->txchainmask);
6532 DPRINTF(sc, IWN_DEBUG_RESET | IWN_DEBUG_XMIT,
6533 "%s: configuring valid TX chains 0x%x\n", __func__, txmask);
6534 error = iwn_cmd(sc, IWN5000_CMD_TX_ANT_CONFIG, &txmask,
6537 device_printf(sc->sc_dev,
6538 "%s: could not configure valid TX chains, "
6539 "error %d\n", __func__, error);
6544 /* Configure bluetooth coexistence. */
6547 /* Configure bluetooth coexistence if needed. */
6548 if (sc->base_params->bt_mode == IWN_BT_ADVANCED)
6549 error = iwn_send_advanced_btcoex(sc);
6550 if (sc->base_params->bt_mode == IWN_BT_SIMPLE)
6551 error = iwn_send_btcoex(sc);
6554 device_printf(sc->sc_dev,
6555 "%s: could not configure bluetooth coexistence, error %d\n",
6560 /* Set mode, channel, RX filter and enable RX. */
6561 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX];
6562 memset(sc->rxon, 0, sizeof (struct iwn_rxon));
6563 macaddr = vap ? vap->iv_myaddr : ic->ic_macaddr;
6564 IEEE80211_ADDR_COPY(sc->rxon->myaddr, macaddr);
6565 IEEE80211_ADDR_COPY(sc->rxon->wlap, macaddr);
6566 sc->rxon->chan = ieee80211_chan2ieee(ic, ic->ic_curchan);
6567 sc->rxon->flags = htole32(IWN_RXON_TSF | IWN_RXON_CTS_TO_SELF);
6568 if (IEEE80211_IS_CHAN_2GHZ(ic->ic_curchan))
6569 sc->rxon->flags |= htole32(IWN_RXON_AUTO | IWN_RXON_24GHZ);
6570 switch (ic->ic_opmode) {
6571 case IEEE80211_M_STA:
6572 sc->rxon->mode = IWN_MODE_STA;
6573 sc->rxon->filter = htole32(IWN_FILTER_MULTICAST);
6575 case IEEE80211_M_MONITOR:
6576 sc->rxon->mode = IWN_MODE_MONITOR;
6577 sc->rxon->filter = htole32(IWN_FILTER_MULTICAST |
6578 IWN_FILTER_CTL | IWN_FILTER_PROMISC);
6581 /* Should not get there. */
6584 sc->rxon->cck_mask = 0x0f; /* not yet negotiated */
6585 sc->rxon->ofdm_mask = 0xff; /* not yet negotiated */
6586 sc->rxon->ht_single_mask = 0xff;
6587 sc->rxon->ht_dual_mask = 0xff;
6588 sc->rxon->ht_triple_mask = 0xff;
6590 * In active association mode, ensure that
6591 * all the receive chains are enabled.
6593 * Since we're not yet doing SMPS, don't allow the
6594 * number of idle RX chains to be less than the active
6598 IWN_RXCHAIN_VALID(sc->rxchainmask) |
6599 IWN_RXCHAIN_MIMO_COUNT(sc->nrxchains) |
6600 IWN_RXCHAIN_IDLE_COUNT(sc->nrxchains);
6601 sc->rxon->rxchain = htole16(rxchain);
6602 DPRINTF(sc, IWN_DEBUG_RESET | IWN_DEBUG_XMIT,
6603 "%s: rxchainmask=0x%x, nrxchains=%d\n",
6608 sc->rxon->flags |= htole32(iwn_get_rxon_ht_flags(sc, ic->ic_curchan));
6610 DPRINTF(sc, IWN_DEBUG_RESET,
6611 "%s: setting configuration; flags=0x%08x\n",
6612 __func__, le32toh(sc->rxon->flags));
6613 if (sc->sc_is_scanning)
6614 device_printf(sc->sc_dev,
6615 "%s: is_scanning set, before RXON\n",
6617 error = iwn_cmd(sc, IWN_CMD_RXON, sc->rxon, sc->rxonsz, 0);
6619 device_printf(sc->sc_dev, "%s: RXON command failed\n",
6624 if ((error = iwn_add_broadcast_node(sc, 0)) != 0) {
6625 device_printf(sc->sc_dev, "%s: could not add broadcast node\n",
6630 /* Configuration has changed, set TX power accordingly. */
6631 if ((error = ops->set_txpower(sc, ic->ic_curchan, 0)) != 0) {
6632 device_printf(sc->sc_dev, "%s: could not set TX power\n",
6637 if ((error = iwn_set_critical_temp(sc)) != 0) {
6638 device_printf(sc->sc_dev,
6639 "%s: could not set critical temperature\n", __func__);
6643 /* Set power saving level to CAM during initialization. */
6644 if ((error = iwn_set_pslevel(sc, 0, 0, 0)) != 0) {
6645 device_printf(sc->sc_dev,
6646 "%s: could not set power saving level\n", __func__);
6650 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
6656 iwn_get_active_dwell_time(struct iwn_softc *sc,
6657 struct ieee80211_channel *c, uint8_t n_probes)
6659 /* No channel? Default to 2GHz settings */
6660 if (c == NULL || IEEE80211_IS_CHAN_2GHZ(c)) {
6661 return (IWN_ACTIVE_DWELL_TIME_2GHZ +
6662 IWN_ACTIVE_DWELL_FACTOR_2GHZ * (n_probes + 1));
6665 /* 5GHz dwell time */
6666 return (IWN_ACTIVE_DWELL_TIME_5GHZ +
6667 IWN_ACTIVE_DWELL_FACTOR_5GHZ * (n_probes + 1));
6671 * Limit the total dwell time to 85% of the beacon interval.
6673 * Returns the dwell time in milliseconds.
6676 iwn_limit_dwell(struct iwn_softc *sc, uint16_t dwell_time)
6678 struct ieee80211com *ic = &sc->sc_ic;
6679 struct ieee80211vap *vap = NULL;
6682 /* bintval is in TU (1.024mS) */
6683 if (! TAILQ_EMPTY(&ic->ic_vaps)) {
6684 vap = TAILQ_FIRST(&ic->ic_vaps);
6685 bintval = vap->iv_bss->ni_intval;
6689 * If it's non-zero, we should calculate the minimum of
6690 * it and the DWELL_BASE.
6692 * XXX Yes, the math should take into account that bintval
6693 * is 1.024mS, not 1mS..
6696 DPRINTF(sc, IWN_DEBUG_SCAN,
6700 return (MIN(IWN_PASSIVE_DWELL_BASE, ((bintval * 85) / 100)));
6703 /* No association context? Default */
6704 return (IWN_PASSIVE_DWELL_BASE);
6708 iwn_get_passive_dwell_time(struct iwn_softc *sc, struct ieee80211_channel *c)
6712 if (c == NULL || IEEE80211_IS_CHAN_2GHZ(c)) {
6713 passive = IWN_PASSIVE_DWELL_BASE + IWN_PASSIVE_DWELL_TIME_2GHZ;
6715 passive = IWN_PASSIVE_DWELL_BASE + IWN_PASSIVE_DWELL_TIME_5GHZ;
6718 /* Clamp to the beacon interval if we're associated */
6719 return (iwn_limit_dwell(sc, passive));
6723 iwn_scan(struct iwn_softc *sc, struct ieee80211vap *vap,
6724 struct ieee80211_scan_state *ss, struct ieee80211_channel *c)
6726 struct ieee80211com *ic = &sc->sc_ic;
6727 struct ieee80211_node *ni = vap->iv_bss;
6728 struct iwn_scan_hdr *hdr;
6729 struct iwn_cmd_data *tx;
6730 struct iwn_scan_essid *essid;
6731 struct iwn_scan_chan *chan;
6732 struct ieee80211_frame *wh;
6733 struct ieee80211_rateset *rs;
6739 uint16_t dwell_active, dwell_passive;
6740 uint32_t extra, scan_service_time;
6742 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
6745 * We are absolutely not allowed to send a scan command when another
6746 * scan command is pending.
6748 if (sc->sc_is_scanning) {
6749 device_printf(sc->sc_dev, "%s: called whilst scanning!\n",
6754 /* Assign the scan channel */
6757 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX];
6758 buf = malloc(IWN_SCAN_MAXSZ, M_DEVBUF, M_NOWAIT | M_ZERO);
6760 device_printf(sc->sc_dev,
6761 "%s: could not allocate buffer for scan command\n",
6765 hdr = (struct iwn_scan_hdr *)buf;
6767 * Move to the next channel if no frames are received within 10ms
6768 * after sending the probe request.
6770 hdr->quiet_time = htole16(10); /* timeout in milliseconds */
6771 hdr->quiet_threshold = htole16(1); /* min # of packets */
6773 * Max needs to be greater than active and passive and quiet!
6774 * It's also in microseconds!
6776 hdr->max_svc = htole32(250 * 1024);
6779 * Reset scan: interval=100
6780 * Normal scan: interval=becaon interval
6781 * suspend_time: 100 (TU)
6784 extra = (100 /* suspend_time */ / 100 /* beacon interval */) << 22;
6785 //scan_service_time = extra | ((100 /* susp */ % 100 /* int */) * 1024);
6786 scan_service_time = (4 << 22) | (100 * 1024); /* Hardcode for now! */
6787 hdr->pause_svc = htole32(scan_service_time);
6789 /* Select antennas for scanning. */
6791 IWN_RXCHAIN_VALID(sc->rxchainmask) |
6792 IWN_RXCHAIN_FORCE_MIMO_SEL(sc->rxchainmask) |
6793 IWN_RXCHAIN_DRIVER_FORCE;
6794 if (IEEE80211_IS_CHAN_A(c) &&
6795 sc->hw_type == IWN_HW_REV_TYPE_4965) {
6796 /* Ant A must be avoided in 5GHz because of an HW bug. */
6797 rxchain |= IWN_RXCHAIN_FORCE_SEL(IWN_ANT_B);
6798 } else /* Use all available RX antennas. */
6799 rxchain |= IWN_RXCHAIN_FORCE_SEL(sc->rxchainmask);
6800 hdr->rxchain = htole16(rxchain);
6801 hdr->filter = htole32(IWN_FILTER_MULTICAST | IWN_FILTER_BEACON);
6803 tx = (struct iwn_cmd_data *)(hdr + 1);
6804 tx->flags = htole32(IWN_TX_AUTO_SEQ);
6805 tx->id = sc->broadcast_id;
6806 tx->lifetime = htole32(IWN_LIFETIME_INFINITE);
6808 if (IEEE80211_IS_CHAN_5GHZ(c)) {
6809 /* Send probe requests at 6Mbps. */
6810 tx->rate = htole32(0xd);
6811 rs = &ic->ic_sup_rates[IEEE80211_MODE_11A];
6813 hdr->flags = htole32(IWN_RXON_24GHZ | IWN_RXON_AUTO);
6814 if (sc->hw_type == IWN_HW_REV_TYPE_4965 &&
6815 sc->rxon->associd && sc->rxon->chan > 14)
6816 tx->rate = htole32(0xd);
6818 /* Send probe requests at 1Mbps. */
6819 tx->rate = htole32(10 | IWN_RFLAG_CCK);
6821 rs = &ic->ic_sup_rates[IEEE80211_MODE_11G];
6823 /* Use the first valid TX antenna. */
6824 txant = IWN_LSB(sc->txchainmask);
6825 tx->rate |= htole32(IWN_RFLAG_ANT(txant));
6828 * Only do active scanning if we're announcing a probe request
6829 * for a given SSID (or more, if we ever add it to the driver.)
6834 * If we're scanning for a specific SSID, add it to the command.
6836 * XXX maybe look at adding support for scanning multiple SSIDs?
6838 essid = (struct iwn_scan_essid *)(tx + 1);
6840 if (ss->ss_ssid[0].len != 0) {
6841 essid[0].id = IEEE80211_ELEMID_SSID;
6842 essid[0].len = ss->ss_ssid[0].len;
6843 memcpy(essid[0].data, ss->ss_ssid[0].ssid, ss->ss_ssid[0].len);
6846 DPRINTF(sc, IWN_DEBUG_SCAN, "%s: ssid_len=%d, ssid=%*s\n",
6850 ss->ss_ssid[0].ssid);
6852 if (ss->ss_nssid > 0)
6857 * Build a probe request frame. Most of the following code is a
6858 * copy & paste of what is done in net80211.
6860 wh = (struct ieee80211_frame *)(essid + 20);
6861 wh->i_fc[0] = IEEE80211_FC0_VERSION_0 | IEEE80211_FC0_TYPE_MGT |
6862 IEEE80211_FC0_SUBTYPE_PROBE_REQ;
6863 wh->i_fc[1] = IEEE80211_FC1_DIR_NODS;
6864 IEEE80211_ADDR_COPY(wh->i_addr1, vap->iv_ifp->if_broadcastaddr);
6865 IEEE80211_ADDR_COPY(wh->i_addr2, IF_LLADDR(vap->iv_ifp));
6866 IEEE80211_ADDR_COPY(wh->i_addr3, vap->iv_ifp->if_broadcastaddr);
6867 *(uint16_t *)&wh->i_dur[0] = 0; /* filled by HW */
6868 *(uint16_t *)&wh->i_seq[0] = 0; /* filled by HW */
6870 frm = (uint8_t *)(wh + 1);
6871 frm = ieee80211_add_ssid(frm, NULL, 0);
6872 frm = ieee80211_add_rates(frm, rs);
6873 if (rs->rs_nrates > IEEE80211_RATE_SIZE)
6874 frm = ieee80211_add_xrates(frm, rs);
6875 if (ic->ic_htcaps & IEEE80211_HTC_HT)
6876 frm = ieee80211_add_htcap(frm, ni);
6878 /* Set length of probe request. */
6879 tx->len = htole16(frm - (uint8_t *)wh);
6882 * If active scanning is requested but a certain channel is
6883 * marked passive, we can do active scanning if we detect
6886 * There is an issue with some firmware versions that triggers
6887 * a sysassert on a "good CRC threshold" of zero (== disabled),
6888 * on a radar channel even though this means that we should NOT
6891 * The "good CRC threshold" is the number of frames that we
6892 * need to receive during our dwell time on a channel before
6893 * sending out probes -- setting this to a huge value will
6894 * mean we never reach it, but at the same time work around
6895 * the aforementioned issue. Thus use IWL_GOOD_CRC_TH_NEVER
6896 * here instead of IWL_GOOD_CRC_TH_DISABLED.
6898 * This was fixed in later versions along with some other
6899 * scan changes, and the threshold behaves as a flag in those
6904 * If we're doing active scanning, set the crc_threshold
6905 * to a suitable value. This is different to active veruss
6906 * passive scanning depending upon the channel flags; the
6907 * firmware will obey that particular check for us.
6909 if (sc->tlv_feature_flags & IWN_UCODE_TLV_FLAGS_NEWSCAN)
6910 hdr->crc_threshold = is_active ?
6911 IWN_GOOD_CRC_TH_DEFAULT : IWN_GOOD_CRC_TH_DISABLED;
6913 hdr->crc_threshold = is_active ?
6914 IWN_GOOD_CRC_TH_DEFAULT : IWN_GOOD_CRC_TH_NEVER;
6916 chan = (struct iwn_scan_chan *)frm;
6917 chan->chan = htole16(ieee80211_chan2ieee(ic, c));
6919 if (ss->ss_nssid > 0)
6920 chan->flags |= htole32(IWN_CHAN_NPBREQS(1));
6921 chan->dsp_gain = 0x6e;
6924 * Set the passive/active flag depending upon the channel mode.
6925 * XXX TODO: take the is_active flag into account as well?
6927 if (c->ic_flags & IEEE80211_CHAN_PASSIVE)
6928 chan->flags |= htole32(IWN_CHAN_PASSIVE);
6930 chan->flags |= htole32(IWN_CHAN_ACTIVE);
6933 * Calculate the active/passive dwell times.
6936 dwell_active = iwn_get_active_dwell_time(sc, c, ss->ss_nssid);
6937 dwell_passive = iwn_get_passive_dwell_time(sc, c);
6939 /* Make sure they're valid */
6940 if (dwell_passive <= dwell_active)
6941 dwell_passive = dwell_active + 1;
6943 chan->active = htole16(dwell_active);
6944 chan->passive = htole16(dwell_passive);
6946 if (IEEE80211_IS_CHAN_5GHZ(c))
6947 chan->rf_gain = 0x3b;
6949 chan->rf_gain = 0x28;
6951 DPRINTF(sc, IWN_DEBUG_STATE,
6952 "%s: chan %u flags 0x%x rf_gain 0x%x "
6953 "dsp_gain 0x%x active %d passive %d scan_svc_time %d crc 0x%x "
6954 "isactive=%d numssid=%d\n", __func__,
6955 chan->chan, chan->flags, chan->rf_gain, chan->dsp_gain,
6956 dwell_active, dwell_passive, scan_service_time,
6957 hdr->crc_threshold, is_active, ss->ss_nssid);
6961 buflen = (uint8_t *)chan - buf;
6962 hdr->len = htole16(buflen);
6964 if (sc->sc_is_scanning) {
6965 device_printf(sc->sc_dev,
6966 "%s: called with is_scanning set!\n",
6969 sc->sc_is_scanning = 1;
6971 DPRINTF(sc, IWN_DEBUG_STATE, "sending scan command nchan=%d\n",
6973 error = iwn_cmd(sc, IWN_CMD_SCAN, buf, buflen, 1);
6974 free(buf, M_DEVBUF);
6976 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
6982 iwn_auth(struct iwn_softc *sc, struct ieee80211vap *vap)
6984 struct iwn_ops *ops = &sc->ops;
6985 struct ieee80211com *ic = &sc->sc_ic;
6986 struct ieee80211_node *ni = vap->iv_bss;
6989 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
6991 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX];
6992 /* Update adapter configuration. */
6993 IEEE80211_ADDR_COPY(sc->rxon->bssid, ni->ni_bssid);
6994 sc->rxon->chan = ieee80211_chan2ieee(ic, ni->ni_chan);
6995 sc->rxon->flags = htole32(IWN_RXON_TSF | IWN_RXON_CTS_TO_SELF);
6996 if (IEEE80211_IS_CHAN_2GHZ(ni->ni_chan))
6997 sc->rxon->flags |= htole32(IWN_RXON_AUTO | IWN_RXON_24GHZ);
6998 if (ic->ic_flags & IEEE80211_F_SHSLOT)
6999 sc->rxon->flags |= htole32(IWN_RXON_SHSLOT);
7000 if (ic->ic_flags & IEEE80211_F_SHPREAMBLE)
7001 sc->rxon->flags |= htole32(IWN_RXON_SHPREAMBLE);
7002 if (IEEE80211_IS_CHAN_A(ni->ni_chan)) {
7003 sc->rxon->cck_mask = 0;
7004 sc->rxon->ofdm_mask = 0x15;
7005 } else if (IEEE80211_IS_CHAN_B(ni->ni_chan)) {
7006 sc->rxon->cck_mask = 0x03;
7007 sc->rxon->ofdm_mask = 0;
7009 /* Assume 802.11b/g. */
7010 sc->rxon->cck_mask = 0x03;
7011 sc->rxon->ofdm_mask = 0x15;
7015 sc->rxon->flags |= htole32(iwn_get_rxon_ht_flags(sc, ic->ic_curchan));
7017 DPRINTF(sc, IWN_DEBUG_STATE, "rxon chan %d flags %x cck %x ofdm %x\n",
7018 sc->rxon->chan, sc->rxon->flags, sc->rxon->cck_mask,
7019 sc->rxon->ofdm_mask);
7020 if (sc->sc_is_scanning)
7021 device_printf(sc->sc_dev,
7022 "%s: is_scanning set, before RXON\n",
7024 error = iwn_cmd(sc, IWN_CMD_RXON, sc->rxon, sc->rxonsz, 1);
7026 device_printf(sc->sc_dev, "%s: RXON command failed, error %d\n",
7031 /* Configuration has changed, set TX power accordingly. */
7032 if ((error = ops->set_txpower(sc, ni->ni_chan, 1)) != 0) {
7033 device_printf(sc->sc_dev,
7034 "%s: could not set TX power, error %d\n", __func__, error);
7038 * Reconfiguring RXON clears the firmware nodes table so we must
7039 * add the broadcast node again.
7041 if ((error = iwn_add_broadcast_node(sc, 1)) != 0) {
7042 device_printf(sc->sc_dev,
7043 "%s: could not add broadcast node, error %d\n", __func__,
7048 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
7054 iwn_run(struct iwn_softc *sc, struct ieee80211vap *vap)
7056 struct iwn_ops *ops = &sc->ops;
7057 struct ieee80211com *ic = &sc->sc_ic;
7058 struct ieee80211_node *ni = vap->iv_bss;
7059 struct iwn_node_info node;
7062 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
7064 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX];
7065 if (ic->ic_opmode == IEEE80211_M_MONITOR) {
7066 /* Link LED blinks while monitoring. */
7067 iwn_set_led(sc, IWN_LED_LINK, 5, 5);
7070 if ((error = iwn_set_timing(sc, ni)) != 0) {
7071 device_printf(sc->sc_dev,
7072 "%s: could not set timing, error %d\n", __func__, error);
7076 /* Update adapter configuration. */
7077 IEEE80211_ADDR_COPY(sc->rxon->bssid, ni->ni_bssid);
7078 sc->rxon->associd = htole16(IEEE80211_AID(ni->ni_associd));
7079 sc->rxon->chan = ieee80211_chan2ieee(ic, ni->ni_chan);
7080 sc->rxon->flags = htole32(IWN_RXON_TSF | IWN_RXON_CTS_TO_SELF);
7081 if (IEEE80211_IS_CHAN_2GHZ(ni->ni_chan))
7082 sc->rxon->flags |= htole32(IWN_RXON_AUTO | IWN_RXON_24GHZ);
7083 if (ic->ic_flags & IEEE80211_F_SHSLOT)
7084 sc->rxon->flags |= htole32(IWN_RXON_SHSLOT);
7085 if (ic->ic_flags & IEEE80211_F_SHPREAMBLE)
7086 sc->rxon->flags |= htole32(IWN_RXON_SHPREAMBLE);
7087 if (IEEE80211_IS_CHAN_A(ni->ni_chan)) {
7088 sc->rxon->cck_mask = 0;
7089 sc->rxon->ofdm_mask = 0x15;
7090 } else if (IEEE80211_IS_CHAN_B(ni->ni_chan)) {
7091 sc->rxon->cck_mask = 0x03;
7092 sc->rxon->ofdm_mask = 0;
7094 /* Assume 802.11b/g. */
7095 sc->rxon->cck_mask = 0x0f;
7096 sc->rxon->ofdm_mask = 0x15;
7099 sc->rxon->flags |= htole32(iwn_get_rxon_ht_flags(sc, ni->ni_chan));
7100 sc->rxon->filter |= htole32(IWN_FILTER_BSS);
7101 DPRINTF(sc, IWN_DEBUG_STATE, "rxon chan %d flags %x, curhtprotmode=%d\n",
7102 sc->rxon->chan, le32toh(sc->rxon->flags), ic->ic_curhtprotmode);
7103 if (sc->sc_is_scanning)
7104 device_printf(sc->sc_dev,
7105 "%s: is_scanning set, before RXON\n",
7107 error = iwn_cmd(sc, IWN_CMD_RXON, sc->rxon, sc->rxonsz, 1);
7109 device_printf(sc->sc_dev,
7110 "%s: could not update configuration, error %d\n", __func__,
7115 /* Configuration has changed, set TX power accordingly. */
7116 if ((error = ops->set_txpower(sc, ni->ni_chan, 1)) != 0) {
7117 device_printf(sc->sc_dev,
7118 "%s: could not set TX power, error %d\n", __func__, error);
7122 /* Fake a join to initialize the TX rate. */
7123 ((struct iwn_node *)ni)->id = IWN_ID_BSS;
7124 iwn_newassoc(ni, 1);
7127 memset(&node, 0, sizeof node);
7128 IEEE80211_ADDR_COPY(node.macaddr, ni->ni_macaddr);
7129 node.id = IWN_ID_BSS;
7130 if (IEEE80211_IS_CHAN_HT(ni->ni_chan)) {
7131 switch (ni->ni_htcap & IEEE80211_HTCAP_SMPS) {
7132 case IEEE80211_HTCAP_SMPS_ENA:
7133 node.htflags |= htole32(IWN_SMPS_MIMO_DIS);
7135 case IEEE80211_HTCAP_SMPS_DYNAMIC:
7136 node.htflags |= htole32(IWN_SMPS_MIMO_PROT);
7139 node.htflags |= htole32(IWN_AMDPU_SIZE_FACTOR(3) |
7140 IWN_AMDPU_DENSITY(5)); /* 4us */
7141 if (IEEE80211_IS_CHAN_HT40(ni->ni_chan))
7142 node.htflags |= htole32(IWN_NODE_HT40);
7144 DPRINTF(sc, IWN_DEBUG_STATE, "%s: adding BSS node\n", __func__);
7145 error = ops->add_node(sc, &node, 1);
7147 device_printf(sc->sc_dev,
7148 "%s: could not add BSS node, error %d\n", __func__, error);
7151 DPRINTF(sc, IWN_DEBUG_STATE, "%s: setting link quality for node %d\n",
7153 if ((error = iwn_set_link_quality(sc, ni)) != 0) {
7154 device_printf(sc->sc_dev,
7155 "%s: could not setup link quality for node %d, error %d\n",
7156 __func__, node.id, error);
7160 if ((error = iwn_init_sensitivity(sc)) != 0) {
7161 device_printf(sc->sc_dev,
7162 "%s: could not set sensitivity, error %d\n", __func__,
7166 /* Start periodic calibration timer. */
7167 sc->calib.state = IWN_CALIB_STATE_ASSOC;
7169 callout_reset(&sc->calib_to, msecs_to_ticks(500), iwn_calib_timeout,
7172 /* Link LED always on while associated. */
7173 iwn_set_led(sc, IWN_LED_LINK, 0, 1);
7175 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
7181 * This function is called by upper layer when an ADDBA request is received
7182 * from another STA and before the ADDBA response is sent.
7185 iwn_ampdu_rx_start(struct ieee80211_node *ni, struct ieee80211_rx_ampdu *rap,
7186 int baparamset, int batimeout, int baseqctl)
7188 #define MS(_v, _f) (((_v) & _f) >> _f##_S)
7189 struct iwn_softc *sc = ni->ni_ic->ic_softc;
7190 struct iwn_ops *ops = &sc->ops;
7191 struct iwn_node *wn = (void *)ni;
7192 struct iwn_node_info node;
7197 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7199 tid = MS(le16toh(baparamset), IEEE80211_BAPS_TID);
7200 ssn = MS(le16toh(baseqctl), IEEE80211_BASEQ_START);
7202 memset(&node, 0, sizeof node);
7204 node.control = IWN_NODE_UPDATE;
7205 node.flags = IWN_FLAG_SET_ADDBA;
7206 node.addba_tid = tid;
7207 node.addba_ssn = htole16(ssn);
7208 DPRINTF(sc, IWN_DEBUG_RECV, "ADDBA RA=%d TID=%d SSN=%d\n",
7210 error = ops->add_node(sc, &node, 1);
7213 return sc->sc_ampdu_rx_start(ni, rap, baparamset, batimeout, baseqctl);
7218 * This function is called by upper layer on teardown of an HT-immediate
7219 * Block Ack agreement (eg. uppon receipt of a DELBA frame).
7222 iwn_ampdu_rx_stop(struct ieee80211_node *ni, struct ieee80211_rx_ampdu *rap)
7224 struct ieee80211com *ic = ni->ni_ic;
7225 struct iwn_softc *sc = ic->ic_softc;
7226 struct iwn_ops *ops = &sc->ops;
7227 struct iwn_node *wn = (void *)ni;
7228 struct iwn_node_info node;
7231 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7233 /* XXX: tid as an argument */
7234 for (tid = 0; tid < WME_NUM_TID; tid++) {
7235 if (&ni->ni_rx_ampdu[tid] == rap)
7239 memset(&node, 0, sizeof node);
7241 node.control = IWN_NODE_UPDATE;
7242 node.flags = IWN_FLAG_SET_DELBA;
7243 node.delba_tid = tid;
7244 DPRINTF(sc, IWN_DEBUG_RECV, "DELBA RA=%d TID=%d\n", wn->id, tid);
7245 (void)ops->add_node(sc, &node, 1);
7246 sc->sc_ampdu_rx_stop(ni, rap);
7250 iwn_addba_request(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap,
7251 int dialogtoken, int baparamset, int batimeout)
7253 struct iwn_softc *sc = ni->ni_ic->ic_softc;
7256 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7258 for (qid = sc->firstaggqueue; qid < sc->ntxqs; qid++) {
7259 if (sc->qid2tap[qid] == NULL)
7262 if (qid == sc->ntxqs) {
7263 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: not free aggregation queue\n",
7267 tap->txa_private = malloc(sizeof(int), M_DEVBUF, M_NOWAIT);
7268 if (tap->txa_private == NULL) {
7269 device_printf(sc->sc_dev,
7270 "%s: failed to alloc TX aggregation structure\n", __func__);
7273 sc->qid2tap[qid] = tap;
7274 *(int *)tap->txa_private = qid;
7275 return sc->sc_addba_request(ni, tap, dialogtoken, baparamset,
7280 iwn_addba_response(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap,
7281 int code, int baparamset, int batimeout)
7283 struct iwn_softc *sc = ni->ni_ic->ic_softc;
7284 int qid = *(int *)tap->txa_private;
7285 uint8_t tid = tap->txa_tid;
7288 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7290 if (code == IEEE80211_STATUS_SUCCESS) {
7291 ni->ni_txseqs[tid] = tap->txa_start & 0xfff;
7292 ret = iwn_ampdu_tx_start(ni->ni_ic, ni, tid);
7296 sc->qid2tap[qid] = NULL;
7297 free(tap->txa_private, M_DEVBUF);
7298 tap->txa_private = NULL;
7300 return sc->sc_addba_response(ni, tap, code, baparamset, batimeout);
7304 * This function is called by upper layer when an ADDBA response is received
7308 iwn_ampdu_tx_start(struct ieee80211com *ic, struct ieee80211_node *ni,
7311 struct ieee80211_tx_ampdu *tap = &ni->ni_tx_ampdu[tid];
7312 struct iwn_softc *sc = ni->ni_ic->ic_softc;
7313 struct iwn_ops *ops = &sc->ops;
7314 struct iwn_node *wn = (void *)ni;
7315 struct iwn_node_info node;
7318 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7320 /* Enable TX for the specified RA/TID. */
7321 wn->disable_tid &= ~(1 << tid);
7322 memset(&node, 0, sizeof node);
7324 node.control = IWN_NODE_UPDATE;
7325 node.flags = IWN_FLAG_SET_DISABLE_TID;
7326 node.disable_tid = htole16(wn->disable_tid);
7327 error = ops->add_node(sc, &node, 1);
7331 if ((error = iwn_nic_lock(sc)) != 0)
7333 qid = *(int *)tap->txa_private;
7334 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: ra=%d tid=%d ssn=%d qid=%d\n",
7335 __func__, wn->id, tid, tap->txa_start, qid);
7336 ops->ampdu_tx_start(sc, ni, qid, tid, tap->txa_start & 0xfff);
7339 iwn_set_link_quality(sc, ni);
7344 iwn_ampdu_tx_stop(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap)
7346 struct iwn_softc *sc = ni->ni_ic->ic_softc;
7347 struct iwn_ops *ops = &sc->ops;
7348 uint8_t tid = tap->txa_tid;
7351 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7353 sc->sc_addba_stop(ni, tap);
7355 if (tap->txa_private == NULL)
7358 qid = *(int *)tap->txa_private;
7359 if (sc->txq[qid].queued != 0)
7361 if (iwn_nic_lock(sc) != 0)
7363 ops->ampdu_tx_stop(sc, qid, tid, tap->txa_start & 0xfff);
7365 sc->qid2tap[qid] = NULL;
7366 free(tap->txa_private, M_DEVBUF);
7367 tap->txa_private = NULL;
7371 iwn4965_ampdu_tx_start(struct iwn_softc *sc, struct ieee80211_node *ni,
7372 int qid, uint8_t tid, uint16_t ssn)
7374 struct iwn_node *wn = (void *)ni;
7376 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7378 /* Stop TX scheduler while we're changing its configuration. */
7379 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid),
7380 IWN4965_TXQ_STATUS_CHGACT);
7382 /* Assign RA/TID translation to the queue. */
7383 iwn_mem_write_2(sc, sc->sched_base + IWN4965_SCHED_TRANS_TBL(qid),
7386 /* Enable chain-building mode for the queue. */
7387 iwn_prph_setbits(sc, IWN4965_SCHED_QCHAIN_SEL, 1 << qid);
7389 /* Set starting sequence number from the ADDBA request. */
7390 sc->txq[qid].cur = sc->txq[qid].read = (ssn & 0xff);
7391 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | (ssn & 0xff));
7392 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_RDPTR(qid), ssn);
7394 /* Set scheduler window size. */
7395 iwn_mem_write(sc, sc->sched_base + IWN4965_SCHED_QUEUE_OFFSET(qid),
7397 /* Set scheduler frame limit. */
7398 iwn_mem_write(sc, sc->sched_base + IWN4965_SCHED_QUEUE_OFFSET(qid) + 4,
7399 IWN_SCHED_LIMIT << 16);
7401 /* Enable interrupts for the queue. */
7402 iwn_prph_setbits(sc, IWN4965_SCHED_INTR_MASK, 1 << qid);
7404 /* Mark the queue as active. */
7405 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid),
7406 IWN4965_TXQ_STATUS_ACTIVE | IWN4965_TXQ_STATUS_AGGR_ENA |
7407 iwn_tid2fifo[tid] << 1);
7411 iwn4965_ampdu_tx_stop(struct iwn_softc *sc, int qid, uint8_t tid, uint16_t ssn)
7413 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7415 /* Stop TX scheduler while we're changing its configuration. */
7416 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid),
7417 IWN4965_TXQ_STATUS_CHGACT);
7419 /* Set starting sequence number from the ADDBA request. */
7420 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | (ssn & 0xff));
7421 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_RDPTR(qid), ssn);
7423 /* Disable interrupts for the queue. */
7424 iwn_prph_clrbits(sc, IWN4965_SCHED_INTR_MASK, 1 << qid);
7426 /* Mark the queue as inactive. */
7427 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid),
7428 IWN4965_TXQ_STATUS_INACTIVE | iwn_tid2fifo[tid] << 1);
7432 iwn5000_ampdu_tx_start(struct iwn_softc *sc, struct ieee80211_node *ni,
7433 int qid, uint8_t tid, uint16_t ssn)
7435 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7437 struct iwn_node *wn = (void *)ni;
7439 /* Stop TX scheduler while we're changing its configuration. */
7440 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
7441 IWN5000_TXQ_STATUS_CHGACT);
7443 /* Assign RA/TID translation to the queue. */
7444 iwn_mem_write_2(sc, sc->sched_base + IWN5000_SCHED_TRANS_TBL(qid),
7447 /* Enable chain-building mode for the queue. */
7448 iwn_prph_setbits(sc, IWN5000_SCHED_QCHAIN_SEL, 1 << qid);
7450 /* Enable aggregation for the queue. */
7451 iwn_prph_setbits(sc, IWN5000_SCHED_AGGR_SEL, 1 << qid);
7453 /* Set starting sequence number from the ADDBA request. */
7454 sc->txq[qid].cur = sc->txq[qid].read = (ssn & 0xff);
7455 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | (ssn & 0xff));
7456 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_RDPTR(qid), ssn);
7458 /* Set scheduler window size and frame limit. */
7459 iwn_mem_write(sc, sc->sched_base + IWN5000_SCHED_QUEUE_OFFSET(qid) + 4,
7460 IWN_SCHED_LIMIT << 16 | IWN_SCHED_WINSZ);
7462 /* Enable interrupts for the queue. */
7463 iwn_prph_setbits(sc, IWN5000_SCHED_INTR_MASK, 1 << qid);
7465 /* Mark the queue as active. */
7466 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
7467 IWN5000_TXQ_STATUS_ACTIVE | iwn_tid2fifo[tid]);
7471 iwn5000_ampdu_tx_stop(struct iwn_softc *sc, int qid, uint8_t tid, uint16_t ssn)
7473 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7475 /* Stop TX scheduler while we're changing its configuration. */
7476 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
7477 IWN5000_TXQ_STATUS_CHGACT);
7479 /* Disable aggregation for the queue. */
7480 iwn_prph_clrbits(sc, IWN5000_SCHED_AGGR_SEL, 1 << qid);
7482 /* Set starting sequence number from the ADDBA request. */
7483 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | (ssn & 0xff));
7484 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_RDPTR(qid), ssn);
7486 /* Disable interrupts for the queue. */
7487 iwn_prph_clrbits(sc, IWN5000_SCHED_INTR_MASK, 1 << qid);
7489 /* Mark the queue as inactive. */
7490 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
7491 IWN5000_TXQ_STATUS_INACTIVE | iwn_tid2fifo[tid]);
7495 * Query calibration tables from the initialization firmware. We do this
7496 * only once at first boot. Called from a process context.
7499 iwn5000_query_calibration(struct iwn_softc *sc)
7501 struct iwn5000_calib_config cmd;
7504 memset(&cmd, 0, sizeof cmd);
7505 cmd.ucode.once.enable = htole32(0xffffffff);
7506 cmd.ucode.once.start = htole32(0xffffffff);
7507 cmd.ucode.once.send = htole32(0xffffffff);
7508 cmd.ucode.flags = htole32(0xffffffff);
7509 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: sending calibration query\n",
7511 error = iwn_cmd(sc, IWN5000_CMD_CALIB_CONFIG, &cmd, sizeof cmd, 0);
7515 /* Wait at most two seconds for calibration to complete. */
7516 if (!(sc->sc_flags & IWN_FLAG_CALIB_DONE))
7517 error = msleep(sc, &sc->sc_mtx, PCATCH, "iwncal", 2 * hz);
7522 * Send calibration results to the runtime firmware. These results were
7523 * obtained on first boot from the initialization firmware.
7526 iwn5000_send_calibration(struct iwn_softc *sc)
7530 for (idx = 0; idx < IWN5000_PHY_CALIB_MAX_RESULT; idx++) {
7531 if (!(sc->base_params->calib_need & (1<<idx))) {
7532 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
7533 "No need of calib %d\n",
7535 continue; /* no need for this calib */
7537 if (sc->calibcmd[idx].buf == NULL) {
7538 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
7539 "Need calib idx : %d but no available data\n",
7544 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
7545 "send calibration result idx=%d len=%d\n", idx,
7546 sc->calibcmd[idx].len);
7547 error = iwn_cmd(sc, IWN_CMD_PHY_CALIB, sc->calibcmd[idx].buf,
7548 sc->calibcmd[idx].len, 0);
7550 device_printf(sc->sc_dev,
7551 "%s: could not send calibration result, error %d\n",
7560 iwn5000_send_wimax_coex(struct iwn_softc *sc)
7562 struct iwn5000_wimax_coex wimax;
7565 if (sc->hw_type == IWN_HW_REV_TYPE_6050) {
7566 /* Enable WiMAX coexistence for combo adapters. */
7568 IWN_WIMAX_COEX_ASSOC_WA_UNMASK |
7569 IWN_WIMAX_COEX_UNASSOC_WA_UNMASK |
7570 IWN_WIMAX_COEX_STA_TABLE_VALID |
7571 IWN_WIMAX_COEX_ENABLE;
7572 memcpy(wimax.events, iwn6050_wimax_events,
7573 sizeof iwn6050_wimax_events);
7577 /* Disable WiMAX coexistence. */
7579 memset(wimax.events, 0, sizeof wimax.events);
7581 DPRINTF(sc, IWN_DEBUG_RESET, "%s: Configuring WiMAX coexistence\n",
7583 return iwn_cmd(sc, IWN5000_CMD_WIMAX_COEX, &wimax, sizeof wimax, 0);
7587 iwn5000_crystal_calib(struct iwn_softc *sc)
7589 struct iwn5000_phy_calib_crystal cmd;
7591 memset(&cmd, 0, sizeof cmd);
7592 cmd.code = IWN5000_PHY_CALIB_CRYSTAL;
7595 cmd.cap_pin[0] = le32toh(sc->eeprom_crystal) & 0xff;
7596 cmd.cap_pin[1] = (le32toh(sc->eeprom_crystal) >> 16) & 0xff;
7597 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "sending crystal calibration %d, %d\n",
7598 cmd.cap_pin[0], cmd.cap_pin[1]);
7599 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 0);
7603 iwn5000_temp_offset_calib(struct iwn_softc *sc)
7605 struct iwn5000_phy_calib_temp_offset cmd;
7607 memset(&cmd, 0, sizeof cmd);
7608 cmd.code = IWN5000_PHY_CALIB_TEMP_OFFSET;
7611 if (sc->eeprom_temp != 0)
7612 cmd.offset = htole16(sc->eeprom_temp);
7614 cmd.offset = htole16(IWN_DEFAULT_TEMP_OFFSET);
7615 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "setting radio sensor offset to %d\n",
7616 le16toh(cmd.offset));
7617 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 0);
7621 iwn5000_temp_offset_calibv2(struct iwn_softc *sc)
7623 struct iwn5000_phy_calib_temp_offsetv2 cmd;
7625 memset(&cmd, 0, sizeof cmd);
7626 cmd.code = IWN5000_PHY_CALIB_TEMP_OFFSET;
7629 if (sc->eeprom_temp != 0) {
7630 cmd.offset_low = htole16(sc->eeprom_temp);
7631 cmd.offset_high = htole16(sc->eeprom_temp_high);
7633 cmd.offset_low = htole16(IWN_DEFAULT_TEMP_OFFSET);
7634 cmd.offset_high = htole16(IWN_DEFAULT_TEMP_OFFSET);
7636 cmd.burnt_voltage_ref = htole16(sc->eeprom_voltage);
7638 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
7639 "setting radio sensor low offset to %d, high offset to %d, voltage to %d\n",
7640 le16toh(cmd.offset_low),
7641 le16toh(cmd.offset_high),
7642 le16toh(cmd.burnt_voltage_ref));
7644 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 0);
7648 * This function is called after the runtime firmware notifies us of its
7649 * readiness (called in a process context).
7652 iwn4965_post_alive(struct iwn_softc *sc)
7656 if ((error = iwn_nic_lock(sc)) != 0)
7659 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7661 /* Clear TX scheduler state in SRAM. */
7662 sc->sched_base = iwn_prph_read(sc, IWN_SCHED_SRAM_ADDR);
7663 iwn_mem_set_region_4(sc, sc->sched_base + IWN4965_SCHED_CTX_OFF, 0,
7664 IWN4965_SCHED_CTX_LEN / sizeof (uint32_t));
7666 /* Set physical address of TX scheduler rings (1KB aligned). */
7667 iwn_prph_write(sc, IWN4965_SCHED_DRAM_ADDR, sc->sched_dma.paddr >> 10);
7669 IWN_SETBITS(sc, IWN_FH_TX_CHICKEN, IWN_FH_TX_CHICKEN_SCHED_RETRY);
7671 /* Disable chain mode for all our 16 queues. */
7672 iwn_prph_write(sc, IWN4965_SCHED_QCHAIN_SEL, 0);
7674 for (qid = 0; qid < IWN4965_NTXQUEUES; qid++) {
7675 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_RDPTR(qid), 0);
7676 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | 0);
7678 /* Set scheduler window size. */
7679 iwn_mem_write(sc, sc->sched_base +
7680 IWN4965_SCHED_QUEUE_OFFSET(qid), IWN_SCHED_WINSZ);
7681 /* Set scheduler frame limit. */
7682 iwn_mem_write(sc, sc->sched_base +
7683 IWN4965_SCHED_QUEUE_OFFSET(qid) + 4,
7684 IWN_SCHED_LIMIT << 16);
7687 /* Enable interrupts for all our 16 queues. */
7688 iwn_prph_write(sc, IWN4965_SCHED_INTR_MASK, 0xffff);
7689 /* Identify TX FIFO rings (0-7). */
7690 iwn_prph_write(sc, IWN4965_SCHED_TXFACT, 0xff);
7692 /* Mark TX rings (4 EDCA + cmd + 2 HCCA) as active. */
7693 for (qid = 0; qid < 7; qid++) {
7694 static uint8_t qid2fifo[] = { 3, 2, 1, 0, 4, 5, 6 };
7695 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid),
7696 IWN4965_TXQ_STATUS_ACTIVE | qid2fifo[qid] << 1);
7703 * This function is called after the initialization or runtime firmware
7704 * notifies us of its readiness (called in a process context).
7707 iwn5000_post_alive(struct iwn_softc *sc)
7711 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
7713 /* Switch to using ICT interrupt mode. */
7714 iwn5000_ict_reset(sc);
7716 if ((error = iwn_nic_lock(sc)) != 0){
7717 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end in error\n", __func__);
7721 /* Clear TX scheduler state in SRAM. */
7722 sc->sched_base = iwn_prph_read(sc, IWN_SCHED_SRAM_ADDR);
7723 iwn_mem_set_region_4(sc, sc->sched_base + IWN5000_SCHED_CTX_OFF, 0,
7724 IWN5000_SCHED_CTX_LEN / sizeof (uint32_t));
7726 /* Set physical address of TX scheduler rings (1KB aligned). */
7727 iwn_prph_write(sc, IWN5000_SCHED_DRAM_ADDR, sc->sched_dma.paddr >> 10);
7729 IWN_SETBITS(sc, IWN_FH_TX_CHICKEN, IWN_FH_TX_CHICKEN_SCHED_RETRY);
7731 /* Enable chain mode for all queues, except command queue. */
7732 if (sc->sc_flags & IWN_FLAG_PAN_SUPPORT)
7733 iwn_prph_write(sc, IWN5000_SCHED_QCHAIN_SEL, 0xfffdf);
7735 iwn_prph_write(sc, IWN5000_SCHED_QCHAIN_SEL, 0xfffef);
7736 iwn_prph_write(sc, IWN5000_SCHED_AGGR_SEL, 0);
7738 for (qid = 0; qid < IWN5000_NTXQUEUES; qid++) {
7739 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_RDPTR(qid), 0);
7740 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | 0);
7742 iwn_mem_write(sc, sc->sched_base +
7743 IWN5000_SCHED_QUEUE_OFFSET(qid), 0);
7744 /* Set scheduler window size and frame limit. */
7745 iwn_mem_write(sc, sc->sched_base +
7746 IWN5000_SCHED_QUEUE_OFFSET(qid) + 4,
7747 IWN_SCHED_LIMIT << 16 | IWN_SCHED_WINSZ);
7750 /* Enable interrupts for all our 20 queues. */
7751 iwn_prph_write(sc, IWN5000_SCHED_INTR_MASK, 0xfffff);
7752 /* Identify TX FIFO rings (0-7). */
7753 iwn_prph_write(sc, IWN5000_SCHED_TXFACT, 0xff);
7755 /* Mark TX rings (4 EDCA + cmd + 2 HCCA) as active. */
7756 if (sc->sc_flags & IWN_FLAG_PAN_SUPPORT) {
7757 /* Mark TX rings as active. */
7758 for (qid = 0; qid < 11; qid++) {
7759 static uint8_t qid2fifo[] = { 3, 2, 1, 0, 0, 4, 2, 5, 4, 7, 5 };
7760 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
7761 IWN5000_TXQ_STATUS_ACTIVE | qid2fifo[qid]);
7764 /* Mark TX rings (4 EDCA + cmd + 2 HCCA) as active. */
7765 for (qid = 0; qid < 7; qid++) {
7766 static uint8_t qid2fifo[] = { 3, 2, 1, 0, 7, 5, 6 };
7767 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
7768 IWN5000_TXQ_STATUS_ACTIVE | qid2fifo[qid]);
7773 /* Configure WiMAX coexistence for combo adapters. */
7774 error = iwn5000_send_wimax_coex(sc);
7776 device_printf(sc->sc_dev,
7777 "%s: could not configure WiMAX coexistence, error %d\n",
7781 if (sc->hw_type != IWN_HW_REV_TYPE_5150) {
7782 /* Perform crystal calibration. */
7783 error = iwn5000_crystal_calib(sc);
7785 device_printf(sc->sc_dev,
7786 "%s: crystal calibration failed, error %d\n",
7791 if (!(sc->sc_flags & IWN_FLAG_CALIB_DONE)) {
7792 /* Query calibration from the initialization firmware. */
7793 if ((error = iwn5000_query_calibration(sc)) != 0) {
7794 device_printf(sc->sc_dev,
7795 "%s: could not query calibration, error %d\n",
7800 * We have the calibration results now, reboot with the
7801 * runtime firmware (call ourselves recursively!)
7804 error = iwn_hw_init(sc);
7806 /* Send calibration results to runtime firmware. */
7807 error = iwn5000_send_calibration(sc);
7810 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
7816 * The firmware boot code is small and is intended to be copied directly into
7817 * the NIC internal memory (no DMA transfer).
7820 iwn4965_load_bootcode(struct iwn_softc *sc, const uint8_t *ucode, int size)
7824 size /= sizeof (uint32_t);
7826 if ((error = iwn_nic_lock(sc)) != 0)
7829 /* Copy microcode image into NIC memory. */
7830 iwn_prph_write_region_4(sc, IWN_BSM_SRAM_BASE,
7831 (const uint32_t *)ucode, size);
7833 iwn_prph_write(sc, IWN_BSM_WR_MEM_SRC, 0);
7834 iwn_prph_write(sc, IWN_BSM_WR_MEM_DST, IWN_FW_TEXT_BASE);
7835 iwn_prph_write(sc, IWN_BSM_WR_DWCOUNT, size);
7837 /* Start boot load now. */
7838 iwn_prph_write(sc, IWN_BSM_WR_CTRL, IWN_BSM_WR_CTRL_START);
7840 /* Wait for transfer to complete. */
7841 for (ntries = 0; ntries < 1000; ntries++) {
7842 if (!(iwn_prph_read(sc, IWN_BSM_WR_CTRL) &
7843 IWN_BSM_WR_CTRL_START))
7847 if (ntries == 1000) {
7848 device_printf(sc->sc_dev, "%s: could not load boot firmware\n",
7854 /* Enable boot after power up. */
7855 iwn_prph_write(sc, IWN_BSM_WR_CTRL, IWN_BSM_WR_CTRL_START_EN);
7862 iwn4965_load_firmware(struct iwn_softc *sc)
7864 struct iwn_fw_info *fw = &sc->fw;
7865 struct iwn_dma_info *dma = &sc->fw_dma;
7868 /* Copy initialization sections into pre-allocated DMA-safe memory. */
7869 memcpy(dma->vaddr, fw->init.data, fw->init.datasz);
7870 bus_dmamap_sync(dma->tag, dma->map, BUS_DMASYNC_PREWRITE);
7871 memcpy(dma->vaddr + IWN4965_FW_DATA_MAXSZ,
7872 fw->init.text, fw->init.textsz);
7873 bus_dmamap_sync(dma->tag, dma->map, BUS_DMASYNC_PREWRITE);
7875 /* Tell adapter where to find initialization sections. */
7876 if ((error = iwn_nic_lock(sc)) != 0)
7878 iwn_prph_write(sc, IWN_BSM_DRAM_DATA_ADDR, dma->paddr >> 4);
7879 iwn_prph_write(sc, IWN_BSM_DRAM_DATA_SIZE, fw->init.datasz);
7880 iwn_prph_write(sc, IWN_BSM_DRAM_TEXT_ADDR,
7881 (dma->paddr + IWN4965_FW_DATA_MAXSZ) >> 4);
7882 iwn_prph_write(sc, IWN_BSM_DRAM_TEXT_SIZE, fw->init.textsz);
7885 /* Load firmware boot code. */
7886 error = iwn4965_load_bootcode(sc, fw->boot.text, fw->boot.textsz);
7888 device_printf(sc->sc_dev, "%s: could not load boot firmware\n",
7892 /* Now press "execute". */
7893 IWN_WRITE(sc, IWN_RESET, 0);
7895 /* Wait at most one second for first alive notification. */
7896 if ((error = msleep(sc, &sc->sc_mtx, PCATCH, "iwninit", hz)) != 0) {
7897 device_printf(sc->sc_dev,
7898 "%s: timeout waiting for adapter to initialize, error %d\n",
7903 /* Retrieve current temperature for initial TX power calibration. */
7904 sc->rawtemp = sc->ucode_info.temp[3].chan20MHz;
7905 sc->temp = iwn4965_get_temperature(sc);
7907 /* Copy runtime sections into pre-allocated DMA-safe memory. */
7908 memcpy(dma->vaddr, fw->main.data, fw->main.datasz);
7909 bus_dmamap_sync(dma->tag, dma->map, BUS_DMASYNC_PREWRITE);
7910 memcpy(dma->vaddr + IWN4965_FW_DATA_MAXSZ,
7911 fw->main.text, fw->main.textsz);
7912 bus_dmamap_sync(dma->tag, dma->map, BUS_DMASYNC_PREWRITE);
7914 /* Tell adapter where to find runtime sections. */
7915 if ((error = iwn_nic_lock(sc)) != 0)
7917 iwn_prph_write(sc, IWN_BSM_DRAM_DATA_ADDR, dma->paddr >> 4);
7918 iwn_prph_write(sc, IWN_BSM_DRAM_DATA_SIZE, fw->main.datasz);
7919 iwn_prph_write(sc, IWN_BSM_DRAM_TEXT_ADDR,
7920 (dma->paddr + IWN4965_FW_DATA_MAXSZ) >> 4);
7921 iwn_prph_write(sc, IWN_BSM_DRAM_TEXT_SIZE,
7922 IWN_FW_UPDATED | fw->main.textsz);
7929 iwn5000_load_firmware_section(struct iwn_softc *sc, uint32_t dst,
7930 const uint8_t *section, int size)
7932 struct iwn_dma_info *dma = &sc->fw_dma;
7935 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7937 /* Copy firmware section into pre-allocated DMA-safe memory. */
7938 memcpy(dma->vaddr, section, size);
7939 bus_dmamap_sync(dma->tag, dma->map, BUS_DMASYNC_PREWRITE);
7941 if ((error = iwn_nic_lock(sc)) != 0)
7944 IWN_WRITE(sc, IWN_FH_TX_CONFIG(IWN_SRVC_DMACHNL),
7945 IWN_FH_TX_CONFIG_DMA_PAUSE);
7947 IWN_WRITE(sc, IWN_FH_SRAM_ADDR(IWN_SRVC_DMACHNL), dst);
7948 IWN_WRITE(sc, IWN_FH_TFBD_CTRL0(IWN_SRVC_DMACHNL),
7949 IWN_LOADDR(dma->paddr));
7950 IWN_WRITE(sc, IWN_FH_TFBD_CTRL1(IWN_SRVC_DMACHNL),
7951 IWN_HIADDR(dma->paddr) << 28 | size);
7952 IWN_WRITE(sc, IWN_FH_TXBUF_STATUS(IWN_SRVC_DMACHNL),
7953 IWN_FH_TXBUF_STATUS_TBNUM(1) |
7954 IWN_FH_TXBUF_STATUS_TBIDX(1) |
7955 IWN_FH_TXBUF_STATUS_TFBD_VALID);
7957 /* Kick Flow Handler to start DMA transfer. */
7958 IWN_WRITE(sc, IWN_FH_TX_CONFIG(IWN_SRVC_DMACHNL),
7959 IWN_FH_TX_CONFIG_DMA_ENA | IWN_FH_TX_CONFIG_CIRQ_HOST_ENDTFD);
7963 /* Wait at most five seconds for FH DMA transfer to complete. */
7964 return msleep(sc, &sc->sc_mtx, PCATCH, "iwninit", 5 * hz);
7968 iwn5000_load_firmware(struct iwn_softc *sc)
7970 struct iwn_fw_part *fw;
7973 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7975 /* Load the initialization firmware on first boot only. */
7976 fw = (sc->sc_flags & IWN_FLAG_CALIB_DONE) ?
7977 &sc->fw.main : &sc->fw.init;
7979 error = iwn5000_load_firmware_section(sc, IWN_FW_TEXT_BASE,
7980 fw->text, fw->textsz);
7982 device_printf(sc->sc_dev,
7983 "%s: could not load firmware %s section, error %d\n",
7984 __func__, ".text", error);
7987 error = iwn5000_load_firmware_section(sc, IWN_FW_DATA_BASE,
7988 fw->data, fw->datasz);
7990 device_printf(sc->sc_dev,
7991 "%s: could not load firmware %s section, error %d\n",
7992 __func__, ".data", error);
7996 /* Now press "execute". */
7997 IWN_WRITE(sc, IWN_RESET, 0);
8002 * Extract text and data sections from a legacy firmware image.
8005 iwn_read_firmware_leg(struct iwn_softc *sc, struct iwn_fw_info *fw)
8007 const uint32_t *ptr;
8011 ptr = (const uint32_t *)fw->data;
8012 rev = le32toh(*ptr++);
8014 sc->ucode_rev = rev;
8016 /* Check firmware API version. */
8017 if (IWN_FW_API(rev) <= 1) {
8018 device_printf(sc->sc_dev,
8019 "%s: bad firmware, need API version >=2\n", __func__);
8022 if (IWN_FW_API(rev) >= 3) {
8023 /* Skip build number (version 2 header). */
8027 if (fw->size < hdrlen) {
8028 device_printf(sc->sc_dev, "%s: firmware too short: %zu bytes\n",
8029 __func__, fw->size);
8032 fw->main.textsz = le32toh(*ptr++);
8033 fw->main.datasz = le32toh(*ptr++);
8034 fw->init.textsz = le32toh(*ptr++);
8035 fw->init.datasz = le32toh(*ptr++);
8036 fw->boot.textsz = le32toh(*ptr++);
8038 /* Check that all firmware sections fit. */
8039 if (fw->size < hdrlen + fw->main.textsz + fw->main.datasz +
8040 fw->init.textsz + fw->init.datasz + fw->boot.textsz) {
8041 device_printf(sc->sc_dev, "%s: firmware too short: %zu bytes\n",
8042 __func__, fw->size);
8046 /* Get pointers to firmware sections. */
8047 fw->main.text = (const uint8_t *)ptr;
8048 fw->main.data = fw->main.text + fw->main.textsz;
8049 fw->init.text = fw->main.data + fw->main.datasz;
8050 fw->init.data = fw->init.text + fw->init.textsz;
8051 fw->boot.text = fw->init.data + fw->init.datasz;
8056 * Extract text and data sections from a TLV firmware image.
8059 iwn_read_firmware_tlv(struct iwn_softc *sc, struct iwn_fw_info *fw,
8062 const struct iwn_fw_tlv_hdr *hdr;
8063 const struct iwn_fw_tlv *tlv;
8064 const uint8_t *ptr, *end;
8068 if (fw->size < sizeof (*hdr)) {
8069 device_printf(sc->sc_dev, "%s: firmware too short: %zu bytes\n",
8070 __func__, fw->size);
8073 hdr = (const struct iwn_fw_tlv_hdr *)fw->data;
8074 if (hdr->signature != htole32(IWN_FW_SIGNATURE)) {
8075 device_printf(sc->sc_dev, "%s: bad firmware signature 0x%08x\n",
8076 __func__, le32toh(hdr->signature));
8079 DPRINTF(sc, IWN_DEBUG_RESET, "FW: \"%.64s\", build 0x%x\n", hdr->descr,
8080 le32toh(hdr->build));
8081 sc->ucode_rev = le32toh(hdr->rev);
8084 * Select the closest supported alternative that is less than
8085 * or equal to the specified one.
8087 altmask = le64toh(hdr->altmask);
8088 while (alt > 0 && !(altmask & (1ULL << alt)))
8089 alt--; /* Downgrade. */
8090 DPRINTF(sc, IWN_DEBUG_RESET, "using alternative %d\n", alt);
8092 ptr = (const uint8_t *)(hdr + 1);
8093 end = (const uint8_t *)(fw->data + fw->size);
8095 /* Parse type-length-value fields. */
8096 while (ptr + sizeof (*tlv) <= end) {
8097 tlv = (const struct iwn_fw_tlv *)ptr;
8098 len = le32toh(tlv->len);
8100 ptr += sizeof (*tlv);
8101 if (ptr + len > end) {
8102 device_printf(sc->sc_dev,
8103 "%s: firmware too short: %zu bytes\n", __func__,
8107 /* Skip other alternatives. */
8108 if (tlv->alt != 0 && tlv->alt != htole16(alt))
8111 switch (le16toh(tlv->type)) {
8112 case IWN_FW_TLV_MAIN_TEXT:
8113 fw->main.text = ptr;
8114 fw->main.textsz = len;
8116 case IWN_FW_TLV_MAIN_DATA:
8117 fw->main.data = ptr;
8118 fw->main.datasz = len;
8120 case IWN_FW_TLV_INIT_TEXT:
8121 fw->init.text = ptr;
8122 fw->init.textsz = len;
8124 case IWN_FW_TLV_INIT_DATA:
8125 fw->init.data = ptr;
8126 fw->init.datasz = len;
8128 case IWN_FW_TLV_BOOT_TEXT:
8129 fw->boot.text = ptr;
8130 fw->boot.textsz = len;
8132 case IWN_FW_TLV_ENH_SENS:
8134 sc->sc_flags |= IWN_FLAG_ENH_SENS;
8136 case IWN_FW_TLV_PHY_CALIB:
8137 tmp = le32toh(*ptr);
8139 sc->reset_noise_gain = tmp;
8140 sc->noise_gain = tmp + 1;
8143 case IWN_FW_TLV_PAN:
8144 sc->sc_flags |= IWN_FLAG_PAN_SUPPORT;
8145 DPRINTF(sc, IWN_DEBUG_RESET,
8146 "PAN Support found: %d\n", 1);
8148 case IWN_FW_TLV_FLAGS:
8149 if (len < sizeof(uint32_t))
8151 if (len % sizeof(uint32_t))
8153 sc->tlv_feature_flags = le32toh(*ptr);
8154 DPRINTF(sc, IWN_DEBUG_RESET,
8155 "%s: feature: 0x%08x\n",
8157 sc->tlv_feature_flags);
8159 case IWN_FW_TLV_PBREQ_MAXLEN:
8160 case IWN_FW_TLV_RUNT_EVTLOG_PTR:
8161 case IWN_FW_TLV_RUNT_EVTLOG_SIZE:
8162 case IWN_FW_TLV_RUNT_ERRLOG_PTR:
8163 case IWN_FW_TLV_INIT_EVTLOG_PTR:
8164 case IWN_FW_TLV_INIT_EVTLOG_SIZE:
8165 case IWN_FW_TLV_INIT_ERRLOG_PTR:
8166 case IWN_FW_TLV_WOWLAN_INST:
8167 case IWN_FW_TLV_WOWLAN_DATA:
8168 DPRINTF(sc, IWN_DEBUG_RESET,
8169 "TLV type %d recognized but not handled\n",
8170 le16toh(tlv->type));
8173 DPRINTF(sc, IWN_DEBUG_RESET,
8174 "TLV type %d not handled\n", le16toh(tlv->type));
8177 next: /* TLV fields are 32-bit aligned. */
8178 ptr += (len + 3) & ~3;
8184 iwn_read_firmware(struct iwn_softc *sc)
8186 struct iwn_fw_info *fw = &sc->fw;
8189 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8193 memset(fw, 0, sizeof (*fw));
8195 /* Read firmware image from filesystem. */
8196 sc->fw_fp = firmware_get(sc->fwname);
8197 if (sc->fw_fp == NULL) {
8198 device_printf(sc->sc_dev, "%s: could not read firmware %s\n",
8199 __func__, sc->fwname);
8205 fw->size = sc->fw_fp->datasize;
8206 fw->data = (const uint8_t *)sc->fw_fp->data;
8207 if (fw->size < sizeof (uint32_t)) {
8208 device_printf(sc->sc_dev, "%s: firmware too short: %zu bytes\n",
8209 __func__, fw->size);
8214 /* Retrieve text and data sections. */
8215 if (*(const uint32_t *)fw->data != 0) /* Legacy image. */
8216 error = iwn_read_firmware_leg(sc, fw);
8218 error = iwn_read_firmware_tlv(sc, fw, 1);
8220 device_printf(sc->sc_dev,
8221 "%s: could not read firmware sections, error %d\n",
8226 device_printf(sc->sc_dev, "%s: ucode rev=0x%08x\n", __func__, sc->ucode_rev);
8228 /* Make sure text and data sections fit in hardware memory. */
8229 if (fw->main.textsz > sc->fw_text_maxsz ||
8230 fw->main.datasz > sc->fw_data_maxsz ||
8231 fw->init.textsz > sc->fw_text_maxsz ||
8232 fw->init.datasz > sc->fw_data_maxsz ||
8233 fw->boot.textsz > IWN_FW_BOOT_TEXT_MAXSZ ||
8234 (fw->boot.textsz & 3) != 0) {
8235 device_printf(sc->sc_dev, "%s: firmware sections too large\n",
8241 /* We can proceed with loading the firmware. */
8244 fail: iwn_unload_firmware(sc);
8249 iwn_unload_firmware(struct iwn_softc *sc)
8251 firmware_put(sc->fw_fp, FIRMWARE_UNLOAD);
8256 iwn_clock_wait(struct iwn_softc *sc)
8260 /* Set "initialization complete" bit. */
8261 IWN_SETBITS(sc, IWN_GP_CNTRL, IWN_GP_CNTRL_INIT_DONE);
8263 /* Wait for clock stabilization. */
8264 for (ntries = 0; ntries < 2500; ntries++) {
8265 if (IWN_READ(sc, IWN_GP_CNTRL) & IWN_GP_CNTRL_MAC_CLOCK_READY)
8269 device_printf(sc->sc_dev,
8270 "%s: timeout waiting for clock stabilization\n", __func__);
8275 iwn_apm_init(struct iwn_softc *sc)
8280 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8282 /* Disable L0s exit timer (NMI bug workaround). */
8283 IWN_SETBITS(sc, IWN_GIO_CHICKEN, IWN_GIO_CHICKEN_DIS_L0S_TIMER);
8284 /* Don't wait for ICH L0s (ICH bug workaround). */
8285 IWN_SETBITS(sc, IWN_GIO_CHICKEN, IWN_GIO_CHICKEN_L1A_NO_L0S_RX);
8287 /* Set FH wait threshold to max (HW bug under stress workaround). */
8288 IWN_SETBITS(sc, IWN_DBG_HPET_MEM, 0xffff0000);
8290 /* Enable HAP INTA to move adapter from L1a to L0s. */
8291 IWN_SETBITS(sc, IWN_HW_IF_CONFIG, IWN_HW_IF_CONFIG_HAP_WAKE_L1A);
8293 /* Retrieve PCIe Active State Power Management (ASPM). */
8294 reg = pci_read_config(sc->sc_dev, sc->sc_cap_off + PCIER_LINK_CTL, 4);
8295 /* Workaround for HW instability in PCIe L0->L0s->L1 transition. */
8296 if (reg & PCIEM_LINK_CTL_ASPMC_L1) /* L1 Entry enabled. */
8297 IWN_SETBITS(sc, IWN_GIO, IWN_GIO_L0S_ENA);
8299 IWN_CLRBITS(sc, IWN_GIO, IWN_GIO_L0S_ENA);
8301 if (sc->base_params->pll_cfg_val)
8302 IWN_SETBITS(sc, IWN_ANA_PLL, sc->base_params->pll_cfg_val);
8304 /* Wait for clock stabilization before accessing prph. */
8305 if ((error = iwn_clock_wait(sc)) != 0)
8308 if ((error = iwn_nic_lock(sc)) != 0)
8310 if (sc->hw_type == IWN_HW_REV_TYPE_4965) {
8311 /* Enable DMA and BSM (Bootstrap State Machine). */
8312 iwn_prph_write(sc, IWN_APMG_CLK_EN,
8313 IWN_APMG_CLK_CTRL_DMA_CLK_RQT |
8314 IWN_APMG_CLK_CTRL_BSM_CLK_RQT);
8317 iwn_prph_write(sc, IWN_APMG_CLK_EN,
8318 IWN_APMG_CLK_CTRL_DMA_CLK_RQT);
8321 /* Disable L1-Active. */
8322 iwn_prph_setbits(sc, IWN_APMG_PCI_STT, IWN_APMG_PCI_STT_L1A_DIS);
8329 iwn_apm_stop_master(struct iwn_softc *sc)
8333 /* Stop busmaster DMA activity. */
8334 IWN_SETBITS(sc, IWN_RESET, IWN_RESET_STOP_MASTER);
8335 for (ntries = 0; ntries < 100; ntries++) {
8336 if (IWN_READ(sc, IWN_RESET) & IWN_RESET_MASTER_DISABLED)
8340 device_printf(sc->sc_dev, "%s: timeout waiting for master\n", __func__);
8344 iwn_apm_stop(struct iwn_softc *sc)
8346 iwn_apm_stop_master(sc);
8348 /* Reset the entire device. */
8349 IWN_SETBITS(sc, IWN_RESET, IWN_RESET_SW);
8351 /* Clear "initialization complete" bit. */
8352 IWN_CLRBITS(sc, IWN_GP_CNTRL, IWN_GP_CNTRL_INIT_DONE);
8356 iwn4965_nic_config(struct iwn_softc *sc)
8358 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8360 if (IWN_RFCFG_TYPE(sc->rfcfg) == 1) {
8362 * I don't believe this to be correct but this is what the
8363 * vendor driver is doing. Probably the bits should not be
8364 * shifted in IWN_RFCFG_*.
8366 IWN_SETBITS(sc, IWN_HW_IF_CONFIG,
8367 IWN_RFCFG_TYPE(sc->rfcfg) |
8368 IWN_RFCFG_STEP(sc->rfcfg) |
8369 IWN_RFCFG_DASH(sc->rfcfg));
8371 IWN_SETBITS(sc, IWN_HW_IF_CONFIG,
8372 IWN_HW_IF_CONFIG_RADIO_SI | IWN_HW_IF_CONFIG_MAC_SI);
8377 iwn5000_nic_config(struct iwn_softc *sc)
8382 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8384 if (IWN_RFCFG_TYPE(sc->rfcfg) < 3) {
8385 IWN_SETBITS(sc, IWN_HW_IF_CONFIG,
8386 IWN_RFCFG_TYPE(sc->rfcfg) |
8387 IWN_RFCFG_STEP(sc->rfcfg) |
8388 IWN_RFCFG_DASH(sc->rfcfg));
8390 IWN_SETBITS(sc, IWN_HW_IF_CONFIG,
8391 IWN_HW_IF_CONFIG_RADIO_SI | IWN_HW_IF_CONFIG_MAC_SI);
8393 if ((error = iwn_nic_lock(sc)) != 0)
8395 iwn_prph_setbits(sc, IWN_APMG_PS, IWN_APMG_PS_EARLY_PWROFF_DIS);
8397 if (sc->hw_type == IWN_HW_REV_TYPE_1000) {
8399 * Select first Switching Voltage Regulator (1.32V) to
8400 * solve a stability issue related to noisy DC2DC line
8401 * in the silicon of 1000 Series.
8403 tmp = iwn_prph_read(sc, IWN_APMG_DIGITAL_SVR);
8404 tmp &= ~IWN_APMG_DIGITAL_SVR_VOLTAGE_MASK;
8405 tmp |= IWN_APMG_DIGITAL_SVR_VOLTAGE_1_32;
8406 iwn_prph_write(sc, IWN_APMG_DIGITAL_SVR, tmp);
8410 if (sc->sc_flags & IWN_FLAG_INTERNAL_PA) {
8411 /* Use internal power amplifier only. */
8412 IWN_WRITE(sc, IWN_GP_DRIVER, IWN_GP_DRIVER_RADIO_2X2_IPA);
8414 if (sc->base_params->additional_nic_config && sc->calib_ver >= 6) {
8415 /* Indicate that ROM calibration version is >=6. */
8416 IWN_SETBITS(sc, IWN_GP_DRIVER, IWN_GP_DRIVER_CALIB_VER6);
8418 if (sc->base_params->additional_gp_drv_bit)
8419 IWN_SETBITS(sc, IWN_GP_DRIVER,
8420 sc->base_params->additional_gp_drv_bit);
8425 * Take NIC ownership over Intel Active Management Technology (AMT).
8428 iwn_hw_prepare(struct iwn_softc *sc)
8432 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8434 /* Check if hardware is ready. */
8435 IWN_SETBITS(sc, IWN_HW_IF_CONFIG, IWN_HW_IF_CONFIG_NIC_READY);
8436 for (ntries = 0; ntries < 5; ntries++) {
8437 if (IWN_READ(sc, IWN_HW_IF_CONFIG) &
8438 IWN_HW_IF_CONFIG_NIC_READY)
8443 /* Hardware not ready, force into ready state. */
8444 IWN_SETBITS(sc, IWN_HW_IF_CONFIG, IWN_HW_IF_CONFIG_PREPARE);
8445 for (ntries = 0; ntries < 15000; ntries++) {
8446 if (!(IWN_READ(sc, IWN_HW_IF_CONFIG) &
8447 IWN_HW_IF_CONFIG_PREPARE_DONE))
8451 if (ntries == 15000)
8454 /* Hardware should be ready now. */
8455 IWN_SETBITS(sc, IWN_HW_IF_CONFIG, IWN_HW_IF_CONFIG_NIC_READY);
8456 for (ntries = 0; ntries < 5; ntries++) {
8457 if (IWN_READ(sc, IWN_HW_IF_CONFIG) &
8458 IWN_HW_IF_CONFIG_NIC_READY)
8466 iwn_hw_init(struct iwn_softc *sc)
8468 struct iwn_ops *ops = &sc->ops;
8469 int error, chnl, qid;
8471 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
8473 /* Clear pending interrupts. */
8474 IWN_WRITE(sc, IWN_INT, 0xffffffff);
8476 if ((error = iwn_apm_init(sc)) != 0) {
8477 device_printf(sc->sc_dev,
8478 "%s: could not power ON adapter, error %d\n", __func__,
8483 /* Select VMAIN power source. */
8484 if ((error = iwn_nic_lock(sc)) != 0)
8486 iwn_prph_clrbits(sc, IWN_APMG_PS, IWN_APMG_PS_PWR_SRC_MASK);
8489 /* Perform adapter-specific initialization. */
8490 if ((error = ops->nic_config(sc)) != 0)
8493 /* Initialize RX ring. */
8494 if ((error = iwn_nic_lock(sc)) != 0)
8496 IWN_WRITE(sc, IWN_FH_RX_CONFIG, 0);
8497 IWN_WRITE(sc, IWN_FH_RX_WPTR, 0);
8498 /* Set physical address of RX ring (256-byte aligned). */
8499 IWN_WRITE(sc, IWN_FH_RX_BASE, sc->rxq.desc_dma.paddr >> 8);
8500 /* Set physical address of RX status (16-byte aligned). */
8501 IWN_WRITE(sc, IWN_FH_STATUS_WPTR, sc->rxq.stat_dma.paddr >> 4);
8503 IWN_WRITE(sc, IWN_FH_RX_CONFIG,
8504 IWN_FH_RX_CONFIG_ENA |
8505 IWN_FH_RX_CONFIG_IGN_RXF_EMPTY | /* HW bug workaround */
8506 IWN_FH_RX_CONFIG_IRQ_DST_HOST |
8507 IWN_FH_RX_CONFIG_SINGLE_FRAME |
8508 IWN_FH_RX_CONFIG_RB_TIMEOUT(0) |
8509 IWN_FH_RX_CONFIG_NRBD(IWN_RX_RING_COUNT_LOG));
8511 IWN_WRITE(sc, IWN_FH_RX_WPTR, (IWN_RX_RING_COUNT - 1) & ~7);
8513 if ((error = iwn_nic_lock(sc)) != 0)
8516 /* Initialize TX scheduler. */
8517 iwn_prph_write(sc, sc->sched_txfact_addr, 0);
8519 /* Set physical address of "keep warm" page (16-byte aligned). */
8520 IWN_WRITE(sc, IWN_FH_KW_ADDR, sc->kw_dma.paddr >> 4);
8522 /* Initialize TX rings. */
8523 for (qid = 0; qid < sc->ntxqs; qid++) {
8524 struct iwn_tx_ring *txq = &sc->txq[qid];
8526 /* Set physical address of TX ring (256-byte aligned). */
8527 IWN_WRITE(sc, IWN_FH_CBBC_QUEUE(qid),
8528 txq->desc_dma.paddr >> 8);
8532 /* Enable DMA channels. */
8533 for (chnl = 0; chnl < sc->ndmachnls; chnl++) {
8534 IWN_WRITE(sc, IWN_FH_TX_CONFIG(chnl),
8535 IWN_FH_TX_CONFIG_DMA_ENA |
8536 IWN_FH_TX_CONFIG_DMA_CREDIT_ENA);
8539 /* Clear "radio off" and "commands blocked" bits. */
8540 IWN_WRITE(sc, IWN_UCODE_GP1_CLR, IWN_UCODE_GP1_RFKILL);
8541 IWN_WRITE(sc, IWN_UCODE_GP1_CLR, IWN_UCODE_GP1_CMD_BLOCKED);
8543 /* Clear pending interrupts. */
8544 IWN_WRITE(sc, IWN_INT, 0xffffffff);
8545 /* Enable interrupt coalescing. */
8546 IWN_WRITE(sc, IWN_INT_COALESCING, 512 / 8);
8547 /* Enable interrupts. */
8548 IWN_WRITE(sc, IWN_INT_MASK, sc->int_mask);
8550 /* _Really_ make sure "radio off" bit is cleared! */
8551 IWN_WRITE(sc, IWN_UCODE_GP1_CLR, IWN_UCODE_GP1_RFKILL);
8552 IWN_WRITE(sc, IWN_UCODE_GP1_CLR, IWN_UCODE_GP1_RFKILL);
8554 /* Enable shadow registers. */
8555 if (sc->base_params->shadow_reg_enable)
8556 IWN_SETBITS(sc, IWN_SHADOW_REG_CTRL, 0x800fffff);
8558 if ((error = ops->load_firmware(sc)) != 0) {
8559 device_printf(sc->sc_dev,
8560 "%s: could not load firmware, error %d\n", __func__,
8564 /* Wait at most one second for firmware alive notification. */
8565 if ((error = msleep(sc, &sc->sc_mtx, PCATCH, "iwninit", hz)) != 0) {
8566 device_printf(sc->sc_dev,
8567 "%s: timeout waiting for adapter to initialize, error %d\n",
8571 /* Do post-firmware initialization. */
8573 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
8575 return ops->post_alive(sc);
8579 iwn_hw_stop(struct iwn_softc *sc)
8581 int chnl, qid, ntries;
8583 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8585 IWN_WRITE(sc, IWN_RESET, IWN_RESET_NEVO);
8587 /* Disable interrupts. */
8588 IWN_WRITE(sc, IWN_INT_MASK, 0);
8589 IWN_WRITE(sc, IWN_INT, 0xffffffff);
8590 IWN_WRITE(sc, IWN_FH_INT, 0xffffffff);
8591 sc->sc_flags &= ~IWN_FLAG_USE_ICT;
8593 /* Make sure we no longer hold the NIC lock. */
8596 /* Stop TX scheduler. */
8597 iwn_prph_write(sc, sc->sched_txfact_addr, 0);
8599 /* Stop all DMA channels. */
8600 if (iwn_nic_lock(sc) == 0) {
8601 for (chnl = 0; chnl < sc->ndmachnls; chnl++) {
8602 IWN_WRITE(sc, IWN_FH_TX_CONFIG(chnl), 0);
8603 for (ntries = 0; ntries < 200; ntries++) {
8604 if (IWN_READ(sc, IWN_FH_TX_STATUS) &
8605 IWN_FH_TX_STATUS_IDLE(chnl))
8614 iwn_reset_rx_ring(sc, &sc->rxq);
8616 /* Reset all TX rings. */
8617 for (qid = 0; qid < sc->ntxqs; qid++)
8618 iwn_reset_tx_ring(sc, &sc->txq[qid]);
8620 if (iwn_nic_lock(sc) == 0) {
8621 iwn_prph_write(sc, IWN_APMG_CLK_DIS,
8622 IWN_APMG_CLK_CTRL_DMA_CLK_RQT);
8626 /* Power OFF adapter. */
8631 iwn_radio_on(void *arg0, int pending)
8633 struct iwn_softc *sc = arg0;
8634 struct ieee80211com *ic = &sc->sc_ic;
8635 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
8637 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8641 ieee80211_init(vap);
8646 iwn_radio_off(void *arg0, int pending)
8648 struct iwn_softc *sc = arg0;
8649 struct ieee80211com *ic = &sc->sc_ic;
8650 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
8652 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8656 ieee80211_stop(vap);
8658 /* Enable interrupts to get RF toggle notification. */
8660 IWN_WRITE(sc, IWN_INT, 0xffffffff);
8661 IWN_WRITE(sc, IWN_INT_MASK, sc->int_mask);
8666 iwn_panicked(void *arg0, int pending)
8668 struct iwn_softc *sc = arg0;
8669 struct ieee80211com *ic = &sc->sc_ic;
8670 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
8676 printf("%s: null vap\n", __func__);
8680 device_printf(sc->sc_dev, "%s: controller panicked, iv_state = %d; "
8681 "restarting\n", __func__, vap->iv_state);
8684 * This is not enough work. We need to also reinitialise
8685 * the correct transmit state for aggregation enabled queues,
8686 * which has a very specific requirement of
8687 * ring index = 802.11 seqno % 256. If we don't do this (which
8688 * we definitely don't!) then the firmware will just panic again.
8691 ieee80211_restart_all(ic);
8695 iwn_stop_locked(sc);
8696 iwn_init_locked(sc);
8697 if (vap->iv_state >= IEEE80211_S_AUTH &&
8698 (error = iwn_auth(sc, vap)) != 0) {
8699 device_printf(sc->sc_dev,
8700 "%s: could not move to auth state\n", __func__);
8702 if (vap->iv_state >= IEEE80211_S_RUN &&
8703 (error = iwn_run(sc, vap)) != 0) {
8704 device_printf(sc->sc_dev,
8705 "%s: could not move to run state\n", __func__);
8713 iwn_init_locked(struct iwn_softc *sc)
8717 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
8719 IWN_LOCK_ASSERT(sc);
8721 sc->sc_flags |= IWN_FLAG_RUNNING;
8723 if ((error = iwn_hw_prepare(sc)) != 0) {
8724 device_printf(sc->sc_dev, "%s: hardware not ready, error %d\n",
8729 /* Initialize interrupt mask to default value. */
8730 sc->int_mask = IWN_INT_MASK_DEF;
8731 sc->sc_flags &= ~IWN_FLAG_USE_ICT;
8733 /* Check that the radio is not disabled by hardware switch. */
8734 if (!(IWN_READ(sc, IWN_GP_CNTRL) & IWN_GP_CNTRL_RFKILL)) {
8735 device_printf(sc->sc_dev,
8736 "radio is disabled by hardware switch\n");
8737 /* Enable interrupts to get RF toggle notifications. */
8738 IWN_WRITE(sc, IWN_INT, 0xffffffff);
8739 IWN_WRITE(sc, IWN_INT_MASK, sc->int_mask);
8743 /* Read firmware images from the filesystem. */
8744 if ((error = iwn_read_firmware(sc)) != 0) {
8745 device_printf(sc->sc_dev,
8746 "%s: could not read firmware, error %d\n", __func__,
8751 /* Initialize hardware and upload firmware. */
8752 error = iwn_hw_init(sc);
8753 iwn_unload_firmware(sc);
8755 device_printf(sc->sc_dev,
8756 "%s: could not initialize hardware, error %d\n", __func__,
8761 /* Configure adapter now that it is ready. */
8762 if ((error = iwn_config(sc)) != 0) {
8763 device_printf(sc->sc_dev,
8764 "%s: could not configure device, error %d\n", __func__,
8769 callout_reset(&sc->watchdog_to, hz, iwn_watchdog, sc);
8771 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
8776 sc->sc_flags &= ~IWN_FLAG_RUNNING;
8777 iwn_stop_locked(sc);
8778 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end in error\n",__func__);
8782 iwn_init(struct iwn_softc *sc)
8786 iwn_init_locked(sc);
8789 if (sc->sc_flags & IWN_FLAG_RUNNING)
8790 ieee80211_start_all(&sc->sc_ic);
8794 iwn_stop_locked(struct iwn_softc *sc)
8797 IWN_LOCK_ASSERT(sc);
8799 sc->sc_is_scanning = 0;
8800 sc->sc_tx_timer = 0;
8801 callout_stop(&sc->watchdog_to);
8802 callout_stop(&sc->calib_to);
8803 sc->sc_flags &= ~IWN_FLAG_RUNNING;
8805 /* Power OFF hardware. */
8810 iwn_stop(struct iwn_softc *sc)
8813 iwn_stop_locked(sc);
8818 * Callback from net80211 to start a scan.
8821 iwn_scan_start(struct ieee80211com *ic)
8823 struct iwn_softc *sc = ic->ic_softc;
8826 /* make the link LED blink while we're scanning */
8827 iwn_set_led(sc, IWN_LED_LINK, 20, 2);
8832 * Callback from net80211 to terminate a scan.
8835 iwn_scan_end(struct ieee80211com *ic)
8837 struct iwn_softc *sc = ic->ic_softc;
8838 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
8841 if (vap->iv_state == IEEE80211_S_RUN) {
8842 /* Set link LED to ON status if we are associated */
8843 iwn_set_led(sc, IWN_LED_LINK, 0, 1);
8849 * Callback from net80211 to force a channel change.
8852 iwn_set_channel(struct ieee80211com *ic)
8854 const struct ieee80211_channel *c = ic->ic_curchan;
8855 struct iwn_softc *sc = ic->ic_softc;
8858 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8861 sc->sc_rxtap.wr_chan_freq = htole16(c->ic_freq);
8862 sc->sc_rxtap.wr_chan_flags = htole16(c->ic_flags);
8863 sc->sc_txtap.wt_chan_freq = htole16(c->ic_freq);
8864 sc->sc_txtap.wt_chan_flags = htole16(c->ic_flags);
8867 * Only need to set the channel in Monitor mode. AP scanning and auth
8868 * are already taken care of by their respective firmware commands.
8870 if (ic->ic_opmode == IEEE80211_M_MONITOR) {
8871 error = iwn_config(sc);
8873 device_printf(sc->sc_dev,
8874 "%s: error %d settting channel\n", __func__, error);
8880 * Callback from net80211 to start scanning of the current channel.
8883 iwn_scan_curchan(struct ieee80211_scan_state *ss, unsigned long maxdwell)
8885 struct ieee80211vap *vap = ss->ss_vap;
8886 struct ieee80211com *ic = vap->iv_ic;
8887 struct iwn_softc *sc = ic->ic_softc;
8891 error = iwn_scan(sc, vap, ss, ic->ic_curchan);
8894 ieee80211_cancel_scan(vap);
8898 * Callback from net80211 to handle the minimum dwell time being met.
8899 * The intent is to terminate the scan but we just let the firmware
8900 * notify us when it's finished as we have no safe way to abort it.
8903 iwn_scan_mindwell(struct ieee80211_scan_state *ss)
8905 /* NB: don't try to abort scan; wait for firmware to finish */
8908 #define IWN_DESC(x) case x: return #x
8911 * Translate CSR code to string
8913 static char *iwn_get_csr_string(int csr)
8916 IWN_DESC(IWN_HW_IF_CONFIG);
8917 IWN_DESC(IWN_INT_COALESCING);
8919 IWN_DESC(IWN_INT_MASK);
8920 IWN_DESC(IWN_FH_INT);
8921 IWN_DESC(IWN_GPIO_IN);
8922 IWN_DESC(IWN_RESET);
8923 IWN_DESC(IWN_GP_CNTRL);
8924 IWN_DESC(IWN_HW_REV);
8925 IWN_DESC(IWN_EEPROM);
8926 IWN_DESC(IWN_EEPROM_GP);
8927 IWN_DESC(IWN_OTP_GP);
8929 IWN_DESC(IWN_GP_UCODE);
8930 IWN_DESC(IWN_GP_DRIVER);
8931 IWN_DESC(IWN_UCODE_GP1);
8932 IWN_DESC(IWN_UCODE_GP2);
8934 IWN_DESC(IWN_DRAM_INT_TBL);
8935 IWN_DESC(IWN_GIO_CHICKEN);
8936 IWN_DESC(IWN_ANA_PLL);
8937 IWN_DESC(IWN_HW_REV_WA);
8938 IWN_DESC(IWN_DBG_HPET_MEM);
8940 return "UNKNOWN CSR";
8945 * This function print firmware register
8948 iwn_debug_register(struct iwn_softc *sc)
8951 static const uint32_t csr_tbl[] = {
8976 DPRINTF(sc, IWN_DEBUG_REGISTER,
8977 "CSR values: (2nd byte of IWN_INT_COALESCING is IWN_INT_PERIODIC)%s",
8979 for (i = 0; i < nitems(csr_tbl); i++){
8980 DPRINTF(sc, IWN_DEBUG_REGISTER," %10s: 0x%08x ",
8981 iwn_get_csr_string(csr_tbl[i]), IWN_READ(sc, csr_tbl[i]));
8983 DPRINTF(sc, IWN_DEBUG_REGISTER,"%s","\n");
8985 DPRINTF(sc, IWN_DEBUG_REGISTER,"%s","\n");