2 * Copyright (c) 2007-2009 Damien Bergamini <damien.bergamini@free.fr>
3 * Copyright (c) 2008 Benjamin Close <benjsc@FreeBSD.org>
4 * Copyright (c) 2008 Sam Leffler, Errno Consulting
5 * Copyright (c) 2011 Intel Corporation
6 * Copyright (c) 2013 Cedric GROSS <c.gross@kreiz-it.fr>
7 * Copyright (c) 2013 Adrian Chadd <adrian@FreeBSD.org>
9 * Permission to use, copy, modify, and distribute this software for any
10 * purpose with or without fee is hereby granted, provided that the above
11 * copyright notice and this permission notice appear in all copies.
13 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
14 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
15 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
16 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
17 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
18 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
19 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
23 * Driver for Intel WiFi Link 4965 and 1000/5000/6000 Series 802.11 network
27 #include <sys/cdefs.h>
28 __FBSDID("$FreeBSD$");
33 #include <sys/param.h>
34 #include <sys/sockio.h>
35 #include <sys/sysctl.h>
37 #include <sys/kernel.h>
38 #include <sys/socket.h>
39 #include <sys/systm.h>
40 #include <sys/malloc.h>
44 #include <sys/endian.h>
45 #include <sys/firmware.h>
46 #include <sys/limits.h>
47 #include <sys/module.h>
49 #include <sys/queue.h>
50 #include <sys/taskqueue.h>
52 #include <machine/bus.h>
53 #include <machine/resource.h>
54 #include <machine/clock.h>
56 #include <dev/pci/pcireg.h>
57 #include <dev/pci/pcivar.h>
60 #include <net/if_var.h>
61 #include <net/if_dl.h>
62 #include <net/if_media.h>
64 #include <netinet/in.h>
65 #include <netinet/if_ether.h>
67 #include <net80211/ieee80211_var.h>
68 #include <net80211/ieee80211_radiotap.h>
69 #include <net80211/ieee80211_regdomain.h>
70 #include <net80211/ieee80211_ratectl.h>
72 #include <dev/iwn/if_iwnreg.h>
73 #include <dev/iwn/if_iwnvar.h>
74 #include <dev/iwn/if_iwn_devid.h>
75 #include <dev/iwn/if_iwn_chip_cfg.h>
76 #include <dev/iwn/if_iwn_debug.h>
77 #include <dev/iwn/if_iwn_ioctl.h>
85 static const struct iwn_ident iwn_ident_table[] = {
86 { 0x8086, IWN_DID_6x05_1, "Intel Centrino Advanced-N 6205" },
87 { 0x8086, IWN_DID_1000_1, "Intel Centrino Wireless-N 1000" },
88 { 0x8086, IWN_DID_1000_2, "Intel Centrino Wireless-N 1000" },
89 { 0x8086, IWN_DID_6x05_2, "Intel Centrino Advanced-N 6205" },
90 { 0x8086, IWN_DID_6050_1, "Intel Centrino Advanced-N + WiMAX 6250" },
91 { 0x8086, IWN_DID_6050_2, "Intel Centrino Advanced-N + WiMAX 6250" },
92 { 0x8086, IWN_DID_x030_1, "Intel Centrino Wireless-N 1030" },
93 { 0x8086, IWN_DID_x030_2, "Intel Centrino Wireless-N 1030" },
94 { 0x8086, IWN_DID_x030_3, "Intel Centrino Advanced-N 6230" },
95 { 0x8086, IWN_DID_x030_4, "Intel Centrino Advanced-N 6230" },
96 { 0x8086, IWN_DID_6150_1, "Intel Centrino Wireless-N + WiMAX 6150" },
97 { 0x8086, IWN_DID_6150_2, "Intel Centrino Wireless-N + WiMAX 6150" },
98 { 0x8086, IWN_DID_2x00_1, "Intel(R) Centrino(R) Wireless-N 2200 BGN" },
99 { 0x8086, IWN_DID_2x00_2, "Intel(R) Centrino(R) Wireless-N 2200 BGN" },
100 /* XXX 2200D is IWN_SDID_2x00_4; there's no way to express this here! */
101 { 0x8086, IWN_DID_2x30_1, "Intel Centrino Wireless-N 2230" },
102 { 0x8086, IWN_DID_2x30_2, "Intel Centrino Wireless-N 2230" },
103 { 0x8086, IWN_DID_130_1, "Intel Centrino Wireless-N 130" },
104 { 0x8086, IWN_DID_130_2, "Intel Centrino Wireless-N 130" },
105 { 0x8086, IWN_DID_100_1, "Intel Centrino Wireless-N 100" },
106 { 0x8086, IWN_DID_100_2, "Intel Centrino Wireless-N 100" },
107 { 0x8086, IWN_DID_105_1, "Intel Centrino Wireless-N 105" },
108 { 0x8086, IWN_DID_105_2, "Intel Centrino Wireless-N 105" },
109 { 0x8086, IWN_DID_135_1, "Intel Centrino Wireless-N 135" },
110 { 0x8086, IWN_DID_135_2, "Intel Centrino Wireless-N 135" },
111 { 0x8086, IWN_DID_4965_1, "Intel Wireless WiFi Link 4965" },
112 { 0x8086, IWN_DID_6x00_1, "Intel Centrino Ultimate-N 6300" },
113 { 0x8086, IWN_DID_6x00_2, "Intel Centrino Advanced-N 6200" },
114 { 0x8086, IWN_DID_4965_2, "Intel Wireless WiFi Link 4965" },
115 { 0x8086, IWN_DID_4965_3, "Intel Wireless WiFi Link 4965" },
116 { 0x8086, IWN_DID_5x00_1, "Intel WiFi Link 5100" },
117 { 0x8086, IWN_DID_4965_4, "Intel Wireless WiFi Link 4965" },
118 { 0x8086, IWN_DID_5x00_3, "Intel Ultimate N WiFi Link 5300" },
119 { 0x8086, IWN_DID_5x00_4, "Intel Ultimate N WiFi Link 5300" },
120 { 0x8086, IWN_DID_5x00_2, "Intel WiFi Link 5100" },
121 { 0x8086, IWN_DID_6x00_3, "Intel Centrino Ultimate-N 6300" },
122 { 0x8086, IWN_DID_6x00_4, "Intel Centrino Advanced-N 6200" },
123 { 0x8086, IWN_DID_5x50_1, "Intel WiMAX/WiFi Link 5350" },
124 { 0x8086, IWN_DID_5x50_2, "Intel WiMAX/WiFi Link 5350" },
125 { 0x8086, IWN_DID_5x50_3, "Intel WiMAX/WiFi Link 5150" },
126 { 0x8086, IWN_DID_5x50_4, "Intel WiMAX/WiFi Link 5150" },
127 { 0x8086, IWN_DID_6035_1, "Intel Centrino Advanced 6235" },
128 { 0x8086, IWN_DID_6035_2, "Intel Centrino Advanced 6235" },
132 static int iwn_probe(device_t);
133 static int iwn_attach(device_t);
134 static int iwn4965_attach(struct iwn_softc *, uint16_t);
135 static int iwn5000_attach(struct iwn_softc *, uint16_t);
136 static int iwn_config_specific(struct iwn_softc *, uint16_t);
137 static void iwn_radiotap_attach(struct iwn_softc *);
138 static void iwn_sysctlattach(struct iwn_softc *);
139 static struct ieee80211vap *iwn_vap_create(struct ieee80211com *,
140 const char [IFNAMSIZ], int, enum ieee80211_opmode, int,
141 const uint8_t [IEEE80211_ADDR_LEN],
142 const uint8_t [IEEE80211_ADDR_LEN]);
143 static void iwn_vap_delete(struct ieee80211vap *);
144 static int iwn_detach(device_t);
145 static int iwn_shutdown(device_t);
146 static int iwn_suspend(device_t);
147 static int iwn_resume(device_t);
148 static int iwn_nic_lock(struct iwn_softc *);
149 static int iwn_eeprom_lock(struct iwn_softc *);
150 static int iwn_init_otprom(struct iwn_softc *);
151 static int iwn_read_prom_data(struct iwn_softc *, uint32_t, void *, int);
152 static void iwn_dma_map_addr(void *, bus_dma_segment_t *, int, int);
153 static int iwn_dma_contig_alloc(struct iwn_softc *, struct iwn_dma_info *,
154 void **, bus_size_t, bus_size_t);
155 static void iwn_dma_contig_free(struct iwn_dma_info *);
156 static int iwn_alloc_sched(struct iwn_softc *);
157 static void iwn_free_sched(struct iwn_softc *);
158 static int iwn_alloc_kw(struct iwn_softc *);
159 static void iwn_free_kw(struct iwn_softc *);
160 static int iwn_alloc_ict(struct iwn_softc *);
161 static void iwn_free_ict(struct iwn_softc *);
162 static int iwn_alloc_fwmem(struct iwn_softc *);
163 static void iwn_free_fwmem(struct iwn_softc *);
164 static int iwn_alloc_rx_ring(struct iwn_softc *, struct iwn_rx_ring *);
165 static void iwn_reset_rx_ring(struct iwn_softc *, struct iwn_rx_ring *);
166 static void iwn_free_rx_ring(struct iwn_softc *, struct iwn_rx_ring *);
167 static int iwn_alloc_tx_ring(struct iwn_softc *, struct iwn_tx_ring *,
169 static void iwn_reset_tx_ring(struct iwn_softc *, struct iwn_tx_ring *);
170 static void iwn_free_tx_ring(struct iwn_softc *, struct iwn_tx_ring *);
171 static void iwn5000_ict_reset(struct iwn_softc *);
172 static int iwn_read_eeprom(struct iwn_softc *,
173 uint8_t macaddr[IEEE80211_ADDR_LEN]);
174 static void iwn4965_read_eeprom(struct iwn_softc *);
176 static void iwn4965_print_power_group(struct iwn_softc *, int);
178 static void iwn5000_read_eeprom(struct iwn_softc *);
179 static uint32_t iwn_eeprom_channel_flags(struct iwn_eeprom_chan *);
180 static void iwn_read_eeprom_band(struct iwn_softc *, int, int, int *,
181 struct ieee80211_channel[]);
182 static void iwn_read_eeprom_ht40(struct iwn_softc *, int, int, int *,
183 struct ieee80211_channel[]);
184 static void iwn_read_eeprom_channels(struct iwn_softc *, int, uint32_t);
185 static struct iwn_eeprom_chan *iwn_find_eeprom_channel(struct iwn_softc *,
186 struct ieee80211_channel *);
187 static void iwn_getradiocaps(struct ieee80211com *, int, int *,
188 struct ieee80211_channel[]);
189 static int iwn_setregdomain(struct ieee80211com *,
190 struct ieee80211_regdomain *, int,
191 struct ieee80211_channel[]);
192 static void iwn_read_eeprom_enhinfo(struct iwn_softc *);
193 static struct ieee80211_node *iwn_node_alloc(struct ieee80211vap *,
194 const uint8_t mac[IEEE80211_ADDR_LEN]);
195 static void iwn_newassoc(struct ieee80211_node *, int);
196 static int iwn_media_change(struct ifnet *);
197 static int iwn_newstate(struct ieee80211vap *, enum ieee80211_state, int);
198 static void iwn_calib_timeout(void *);
199 static void iwn_rx_phy(struct iwn_softc *, struct iwn_rx_desc *,
200 struct iwn_rx_data *);
201 static void iwn_rx_done(struct iwn_softc *, struct iwn_rx_desc *,
202 struct iwn_rx_data *);
203 static void iwn_rx_compressed_ba(struct iwn_softc *, struct iwn_rx_desc *,
204 struct iwn_rx_data *);
205 static void iwn5000_rx_calib_results(struct iwn_softc *,
206 struct iwn_rx_desc *, struct iwn_rx_data *);
207 static void iwn_rx_statistics(struct iwn_softc *, struct iwn_rx_desc *,
208 struct iwn_rx_data *);
209 static void iwn4965_tx_done(struct iwn_softc *, struct iwn_rx_desc *,
210 struct iwn_rx_data *);
211 static void iwn5000_tx_done(struct iwn_softc *, struct iwn_rx_desc *,
212 struct iwn_rx_data *);
213 static void iwn_tx_done(struct iwn_softc *, struct iwn_rx_desc *, int, int,
215 static void iwn_ampdu_tx_done(struct iwn_softc *, int, int, int, int, int,
217 static void iwn_cmd_done(struct iwn_softc *, struct iwn_rx_desc *);
218 static void iwn_notif_intr(struct iwn_softc *);
219 static void iwn_wakeup_intr(struct iwn_softc *);
220 static void iwn_rftoggle_intr(struct iwn_softc *);
221 static void iwn_fatal_intr(struct iwn_softc *);
222 static void iwn_intr(void *);
223 static void iwn4965_update_sched(struct iwn_softc *, int, int, uint8_t,
225 static void iwn5000_update_sched(struct iwn_softc *, int, int, uint8_t,
228 static void iwn5000_reset_sched(struct iwn_softc *, int, int);
230 static int iwn_tx_data(struct iwn_softc *, struct mbuf *,
231 struct ieee80211_node *);
232 static int iwn_tx_data_raw(struct iwn_softc *, struct mbuf *,
233 struct ieee80211_node *,
234 const struct ieee80211_bpf_params *params);
235 static void iwn_xmit_task(void *arg0, int pending);
236 static int iwn_raw_xmit(struct ieee80211_node *, struct mbuf *,
237 const struct ieee80211_bpf_params *);
238 static int iwn_transmit(struct ieee80211com *, struct mbuf *);
239 static void iwn_scan_timeout(void *);
240 static void iwn_watchdog(void *);
241 static int iwn_ioctl(struct ieee80211com *, u_long , void *);
242 static void iwn_parent(struct ieee80211com *);
243 static int iwn_cmd(struct iwn_softc *, int, const void *, int, int);
244 static int iwn4965_add_node(struct iwn_softc *, struct iwn_node_info *,
246 static int iwn5000_add_node(struct iwn_softc *, struct iwn_node_info *,
248 static int iwn_set_link_quality(struct iwn_softc *,
249 struct ieee80211_node *);
250 static int iwn_add_broadcast_node(struct iwn_softc *, int);
251 static int iwn_updateedca(struct ieee80211com *);
252 static void iwn_update_mcast(struct ieee80211com *);
253 static void iwn_set_led(struct iwn_softc *, uint8_t, uint8_t, uint8_t);
254 static int iwn_set_critical_temp(struct iwn_softc *);
255 static int iwn_set_timing(struct iwn_softc *, struct ieee80211_node *);
256 static void iwn4965_power_calibration(struct iwn_softc *, int);
257 static int iwn4965_set_txpower(struct iwn_softc *,
258 struct ieee80211_channel *, int);
259 static int iwn5000_set_txpower(struct iwn_softc *,
260 struct ieee80211_channel *, int);
261 static int iwn4965_get_rssi(struct iwn_softc *, struct iwn_rx_stat *);
262 static int iwn5000_get_rssi(struct iwn_softc *, struct iwn_rx_stat *);
263 static int iwn_get_noise(const struct iwn_rx_general_stats *);
264 static int iwn4965_get_temperature(struct iwn_softc *);
265 static int iwn5000_get_temperature(struct iwn_softc *);
266 static int iwn_init_sensitivity(struct iwn_softc *);
267 static void iwn_collect_noise(struct iwn_softc *,
268 const struct iwn_rx_general_stats *);
269 static int iwn4965_init_gains(struct iwn_softc *);
270 static int iwn5000_init_gains(struct iwn_softc *);
271 static int iwn4965_set_gains(struct iwn_softc *);
272 static int iwn5000_set_gains(struct iwn_softc *);
273 static void iwn_tune_sensitivity(struct iwn_softc *,
274 const struct iwn_rx_stats *);
275 static void iwn_save_stats_counters(struct iwn_softc *,
276 const struct iwn_stats *);
277 static int iwn_send_sensitivity(struct iwn_softc *);
278 static void iwn_check_rx_recovery(struct iwn_softc *, struct iwn_stats *);
279 static int iwn_set_pslevel(struct iwn_softc *, int, int, int);
280 static int iwn_send_btcoex(struct iwn_softc *);
281 static int iwn_send_advanced_btcoex(struct iwn_softc *);
282 static int iwn5000_runtime_calib(struct iwn_softc *);
283 static int iwn_config(struct iwn_softc *);
284 static int iwn_scan(struct iwn_softc *, struct ieee80211vap *,
285 struct ieee80211_scan_state *, struct ieee80211_channel *);
286 static int iwn_auth(struct iwn_softc *, struct ieee80211vap *vap);
287 static int iwn_run(struct iwn_softc *, struct ieee80211vap *vap);
288 static int iwn_ampdu_rx_start(struct ieee80211_node *,
289 struct ieee80211_rx_ampdu *, int, int, int);
290 static void iwn_ampdu_rx_stop(struct ieee80211_node *,
291 struct ieee80211_rx_ampdu *);
292 static int iwn_addba_request(struct ieee80211_node *,
293 struct ieee80211_tx_ampdu *, int, int, int);
294 static int iwn_addba_response(struct ieee80211_node *,
295 struct ieee80211_tx_ampdu *, int, int, int);
296 static int iwn_ampdu_tx_start(struct ieee80211com *,
297 struct ieee80211_node *, uint8_t);
298 static void iwn_ampdu_tx_stop(struct ieee80211_node *,
299 struct ieee80211_tx_ampdu *);
300 static void iwn4965_ampdu_tx_start(struct iwn_softc *,
301 struct ieee80211_node *, int, uint8_t, uint16_t);
302 static void iwn4965_ampdu_tx_stop(struct iwn_softc *, int,
304 static void iwn5000_ampdu_tx_start(struct iwn_softc *,
305 struct ieee80211_node *, int, uint8_t, uint16_t);
306 static void iwn5000_ampdu_tx_stop(struct iwn_softc *, int,
308 static int iwn5000_query_calibration(struct iwn_softc *);
309 static int iwn5000_send_calibration(struct iwn_softc *);
310 static int iwn5000_send_wimax_coex(struct iwn_softc *);
311 static int iwn5000_crystal_calib(struct iwn_softc *);
312 static int iwn5000_temp_offset_calib(struct iwn_softc *);
313 static int iwn5000_temp_offset_calibv2(struct iwn_softc *);
314 static int iwn4965_post_alive(struct iwn_softc *);
315 static int iwn5000_post_alive(struct iwn_softc *);
316 static int iwn4965_load_bootcode(struct iwn_softc *, const uint8_t *,
318 static int iwn4965_load_firmware(struct iwn_softc *);
319 static int iwn5000_load_firmware_section(struct iwn_softc *, uint32_t,
320 const uint8_t *, int);
321 static int iwn5000_load_firmware(struct iwn_softc *);
322 static int iwn_read_firmware_leg(struct iwn_softc *,
323 struct iwn_fw_info *);
324 static int iwn_read_firmware_tlv(struct iwn_softc *,
325 struct iwn_fw_info *, uint16_t);
326 static int iwn_read_firmware(struct iwn_softc *);
327 static void iwn_unload_firmware(struct iwn_softc *);
328 static int iwn_clock_wait(struct iwn_softc *);
329 static int iwn_apm_init(struct iwn_softc *);
330 static void iwn_apm_stop_master(struct iwn_softc *);
331 static void iwn_apm_stop(struct iwn_softc *);
332 static int iwn4965_nic_config(struct iwn_softc *);
333 static int iwn5000_nic_config(struct iwn_softc *);
334 static int iwn_hw_prepare(struct iwn_softc *);
335 static int iwn_hw_init(struct iwn_softc *);
336 static void iwn_hw_stop(struct iwn_softc *);
337 static void iwn_radio_on(void *, int);
338 static void iwn_radio_off(void *, int);
339 static void iwn_panicked(void *, int);
340 static void iwn_init_locked(struct iwn_softc *);
341 static void iwn_init(struct iwn_softc *);
342 static void iwn_stop_locked(struct iwn_softc *);
343 static void iwn_stop(struct iwn_softc *);
344 static void iwn_scan_start(struct ieee80211com *);
345 static void iwn_scan_end(struct ieee80211com *);
346 static void iwn_set_channel(struct ieee80211com *);
347 static void iwn_scan_curchan(struct ieee80211_scan_state *, unsigned long);
348 static void iwn_scan_mindwell(struct ieee80211_scan_state *);
350 static char *iwn_get_csr_string(int);
351 static void iwn_debug_register(struct iwn_softc *);
354 static device_method_t iwn_methods[] = {
355 /* Device interface */
356 DEVMETHOD(device_probe, iwn_probe),
357 DEVMETHOD(device_attach, iwn_attach),
358 DEVMETHOD(device_detach, iwn_detach),
359 DEVMETHOD(device_shutdown, iwn_shutdown),
360 DEVMETHOD(device_suspend, iwn_suspend),
361 DEVMETHOD(device_resume, iwn_resume),
366 static driver_t iwn_driver = {
369 sizeof(struct iwn_softc)
371 static devclass_t iwn_devclass;
373 DRIVER_MODULE(iwn, pci, iwn_driver, iwn_devclass, NULL, NULL);
375 MODULE_VERSION(iwn, 1);
377 MODULE_DEPEND(iwn, firmware, 1, 1, 1);
378 MODULE_DEPEND(iwn, pci, 1, 1, 1);
379 MODULE_DEPEND(iwn, wlan, 1, 1, 1);
381 static d_ioctl_t iwn_cdev_ioctl;
382 static d_open_t iwn_cdev_open;
383 static d_close_t iwn_cdev_close;
385 static struct cdevsw iwn_cdevsw = {
386 .d_version = D_VERSION,
388 .d_open = iwn_cdev_open,
389 .d_close = iwn_cdev_close,
390 .d_ioctl = iwn_cdev_ioctl,
395 iwn_probe(device_t dev)
397 const struct iwn_ident *ident;
399 for (ident = iwn_ident_table; ident->name != NULL; ident++) {
400 if (pci_get_vendor(dev) == ident->vendor &&
401 pci_get_device(dev) == ident->device) {
402 device_set_desc(dev, ident->name);
403 return (BUS_PROBE_DEFAULT);
410 iwn_is_3stream_device(struct iwn_softc *sc)
412 /* XXX for now only 5300, until the 5350 can be tested */
413 if (sc->hw_type == IWN_HW_REV_TYPE_5300)
419 iwn_attach(device_t dev)
421 struct iwn_softc *sc = device_get_softc(dev);
422 struct ieee80211com *ic;
428 error = resource_int_value(device_get_name(sc->sc_dev),
429 device_get_unit(sc->sc_dev), "debug", &(sc->sc_debug));
436 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: begin\n",__func__);
439 * Get the offset of the PCI Express Capability Structure in PCI
440 * Configuration Space.
442 error = pci_find_cap(dev, PCIY_EXPRESS, &sc->sc_cap_off);
444 device_printf(dev, "PCIe capability structure not found!\n");
448 /* Clear device-specific "PCI retry timeout" register (41h). */
449 pci_write_config(dev, 0x41, 0, 1);
451 /* Enable bus-mastering. */
452 pci_enable_busmaster(dev);
455 sc->mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
457 if (sc->mem == NULL) {
458 device_printf(dev, "can't map mem space\n");
462 sc->sc_st = rman_get_bustag(sc->mem);
463 sc->sc_sh = rman_get_bushandle(sc->mem);
467 if (pci_alloc_msi(dev, &i) == 0)
469 /* Install interrupt handler. */
470 sc->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, RF_ACTIVE |
471 (rid != 0 ? 0 : RF_SHAREABLE));
472 if (sc->irq == NULL) {
473 device_printf(dev, "can't map interrupt\n");
480 /* Read hardware revision and attach. */
481 sc->hw_type = (IWN_READ(sc, IWN_HW_REV) >> IWN_HW_REV_TYPE_SHIFT)
482 & IWN_HW_REV_TYPE_MASK;
483 sc->subdevice_id = pci_get_subdevice(dev);
486 * 4965 versus 5000 and later have different methods.
487 * Let's set those up first.
489 if (sc->hw_type == IWN_HW_REV_TYPE_4965)
490 error = iwn4965_attach(sc, pci_get_device(dev));
492 error = iwn5000_attach(sc, pci_get_device(dev));
494 device_printf(dev, "could not attach device, error %d\n",
500 * Next, let's setup the various parameters of each NIC.
502 error = iwn_config_specific(sc, pci_get_device(dev));
504 device_printf(dev, "could not attach device, error %d\n",
509 if ((error = iwn_hw_prepare(sc)) != 0) {
510 device_printf(dev, "hardware not ready, error %d\n", error);
514 /* Allocate DMA memory for firmware transfers. */
515 if ((error = iwn_alloc_fwmem(sc)) != 0) {
517 "could not allocate memory for firmware, error %d\n",
522 /* Allocate "Keep Warm" page. */
523 if ((error = iwn_alloc_kw(sc)) != 0) {
525 "could not allocate keep warm page, error %d\n", error);
529 /* Allocate ICT table for 5000 Series. */
530 if (sc->hw_type != IWN_HW_REV_TYPE_4965 &&
531 (error = iwn_alloc_ict(sc)) != 0) {
532 device_printf(dev, "could not allocate ICT table, error %d\n",
537 /* Allocate TX scheduler "rings". */
538 if ((error = iwn_alloc_sched(sc)) != 0) {
540 "could not allocate TX scheduler rings, error %d\n", error);
544 /* Allocate TX rings (16 on 4965AGN, 20 on >=5000). */
545 for (i = 0; i < sc->ntxqs; i++) {
546 if ((error = iwn_alloc_tx_ring(sc, &sc->txq[i], i)) != 0) {
548 "could not allocate TX ring %d, error %d\n", i,
554 /* Allocate RX ring. */
555 if ((error = iwn_alloc_rx_ring(sc, &sc->rxq)) != 0) {
556 device_printf(dev, "could not allocate RX ring, error %d\n",
561 /* Clear pending interrupts. */
562 IWN_WRITE(sc, IWN_INT, 0xffffffff);
566 ic->ic_name = device_get_nameunit(dev);
567 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */
568 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */
570 /* Set device capabilities. */
572 IEEE80211_C_STA /* station mode supported */
573 | IEEE80211_C_MONITOR /* monitor mode supported */
575 | IEEE80211_C_BGSCAN /* background scanning */
577 | IEEE80211_C_TXPMGT /* tx power management */
578 | IEEE80211_C_SHSLOT /* short slot time supported */
580 | IEEE80211_C_SHPREAMBLE /* short preamble supported */
582 | IEEE80211_C_IBSS /* ibss/adhoc mode */
584 | IEEE80211_C_WME /* WME */
585 | IEEE80211_C_PMGT /* Station-side power mgmt */
588 /* Read MAC address, channels, etc from EEPROM. */
589 if ((error = iwn_read_eeprom(sc, ic->ic_macaddr)) != 0) {
590 device_printf(dev, "could not read EEPROM, error %d\n",
595 /* Count the number of available chains. */
597 ((sc->txchainmask >> 2) & 1) +
598 ((sc->txchainmask >> 1) & 1) +
599 ((sc->txchainmask >> 0) & 1);
601 ((sc->rxchainmask >> 2) & 1) +
602 ((sc->rxchainmask >> 1) & 1) +
603 ((sc->rxchainmask >> 0) & 1);
605 device_printf(dev, "MIMO %dT%dR, %.4s, address %6D\n",
606 sc->ntxchains, sc->nrxchains, sc->eeprom_domain,
607 ic->ic_macaddr, ":");
610 if (sc->sc_flags & IWN_FLAG_HAS_11N) {
611 ic->ic_rxstream = sc->nrxchains;
612 ic->ic_txstream = sc->ntxchains;
615 * Some of the 3 antenna devices (ie, the 4965) only supports
616 * 2x2 operation. So correct the number of streams if
617 * it's not a 3-stream device.
619 if (! iwn_is_3stream_device(sc)) {
620 if (ic->ic_rxstream > 2)
622 if (ic->ic_txstream > 2)
627 IEEE80211_HTCAP_SMPS_OFF /* SMPS mode disabled */
628 | IEEE80211_HTCAP_SHORTGI20 /* short GI in 20MHz */
629 | IEEE80211_HTCAP_CHWIDTH40 /* 40MHz channel width*/
630 | IEEE80211_HTCAP_SHORTGI40 /* short GI in 40MHz */
632 | IEEE80211_HTCAP_GREENFIELD
633 #if IWN_RBUF_SIZE == 8192
634 | IEEE80211_HTCAP_MAXAMSDU_7935 /* max A-MSDU length */
636 | IEEE80211_HTCAP_MAXAMSDU_3839 /* max A-MSDU length */
639 /* s/w capabilities */
640 | IEEE80211_HTC_HT /* HT operation */
641 | IEEE80211_HTC_AMPDU /* tx A-MPDU */
643 | IEEE80211_HTC_AMSDU /* tx A-MSDU */
648 ieee80211_ifattach(ic);
649 ic->ic_vap_create = iwn_vap_create;
650 ic->ic_ioctl = iwn_ioctl;
651 ic->ic_parent = iwn_parent;
652 ic->ic_vap_delete = iwn_vap_delete;
653 ic->ic_transmit = iwn_transmit;
654 ic->ic_raw_xmit = iwn_raw_xmit;
655 ic->ic_node_alloc = iwn_node_alloc;
656 sc->sc_ampdu_rx_start = ic->ic_ampdu_rx_start;
657 ic->ic_ampdu_rx_start = iwn_ampdu_rx_start;
658 sc->sc_ampdu_rx_stop = ic->ic_ampdu_rx_stop;
659 ic->ic_ampdu_rx_stop = iwn_ampdu_rx_stop;
660 sc->sc_addba_request = ic->ic_addba_request;
661 ic->ic_addba_request = iwn_addba_request;
662 sc->sc_addba_response = ic->ic_addba_response;
663 ic->ic_addba_response = iwn_addba_response;
664 sc->sc_addba_stop = ic->ic_addba_stop;
665 ic->ic_addba_stop = iwn_ampdu_tx_stop;
666 ic->ic_newassoc = iwn_newassoc;
667 ic->ic_wme.wme_update = iwn_updateedca;
668 ic->ic_update_mcast = iwn_update_mcast;
669 ic->ic_scan_start = iwn_scan_start;
670 ic->ic_scan_end = iwn_scan_end;
671 ic->ic_set_channel = iwn_set_channel;
672 ic->ic_scan_curchan = iwn_scan_curchan;
673 ic->ic_scan_mindwell = iwn_scan_mindwell;
674 ic->ic_getradiocaps = iwn_getradiocaps;
675 ic->ic_setregdomain = iwn_setregdomain;
677 iwn_radiotap_attach(sc);
679 callout_init_mtx(&sc->calib_to, &sc->sc_mtx, 0);
680 callout_init_mtx(&sc->scan_timeout, &sc->sc_mtx, 0);
681 callout_init_mtx(&sc->watchdog_to, &sc->sc_mtx, 0);
682 TASK_INIT(&sc->sc_radioon_task, 0, iwn_radio_on, sc);
683 TASK_INIT(&sc->sc_radiooff_task, 0, iwn_radio_off, sc);
684 TASK_INIT(&sc->sc_panic_task, 0, iwn_panicked, sc);
685 TASK_INIT(&sc->sc_xmit_task, 0, iwn_xmit_task, sc);
687 mbufq_init(&sc->sc_xmit_queue, 1024);
689 sc->sc_tq = taskqueue_create("iwn_taskq", M_WAITOK,
690 taskqueue_thread_enqueue, &sc->sc_tq);
691 error = taskqueue_start_threads(&sc->sc_tq, 1, 0, "iwn_taskq");
693 device_printf(dev, "can't start threads, error %d\n", error);
697 iwn_sysctlattach(sc);
700 * Hook our interrupt after all initialization is complete.
702 error = bus_setup_intr(dev, sc->irq, INTR_TYPE_NET | INTR_MPSAFE,
703 NULL, iwn_intr, sc, &sc->sc_ih);
705 device_printf(dev, "can't establish interrupt, error %d\n",
711 device_printf(sc->sc_dev, "%s: rx_stats=%d, rx_stats_bt=%d\n",
713 sizeof(struct iwn_stats),
714 sizeof(struct iwn_stats_bt));
718 ieee80211_announce(ic);
719 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
721 /* Add debug ioctl right at the end */
722 sc->sc_cdev = make_dev(&iwn_cdevsw, device_get_unit(dev),
723 UID_ROOT, GID_WHEEL, 0600, "%s", device_get_nameunit(dev));
724 if (sc->sc_cdev == NULL) {
725 device_printf(dev, "failed to create debug character device\n");
727 sc->sc_cdev->si_drv1 = sc;
732 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end in error\n",__func__);
737 * Define specific configuration based on device id and subdevice id
738 * pid : PCI device id
741 iwn_config_specific(struct iwn_softc *sc, uint16_t pid)
750 sc->base_params = &iwn4965_base_params;
751 sc->limits = &iwn4965_sensitivity_limits;
752 sc->fwname = "iwn4965fw";
753 /* Override chains masks, ROM is known to be broken. */
754 sc->txchainmask = IWN_ANT_AB;
755 sc->rxchainmask = IWN_ANT_ABC;
756 /* Enable normal btcoex */
757 sc->sc_flags |= IWN_FLAG_BTCOEX;
762 switch(sc->subdevice_id) {
763 case IWN_SDID_1000_1:
764 case IWN_SDID_1000_2:
765 case IWN_SDID_1000_3:
766 case IWN_SDID_1000_4:
767 case IWN_SDID_1000_5:
768 case IWN_SDID_1000_6:
769 case IWN_SDID_1000_7:
770 case IWN_SDID_1000_8:
771 case IWN_SDID_1000_9:
772 case IWN_SDID_1000_10:
773 case IWN_SDID_1000_11:
774 case IWN_SDID_1000_12:
775 sc->limits = &iwn1000_sensitivity_limits;
776 sc->base_params = &iwn1000_base_params;
777 sc->fwname = "iwn1000fw";
780 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
781 "0x%04x rev %d not supported (subdevice)\n", pid,
782 sc->subdevice_id,sc->hw_type);
791 sc->fwname = "iwn6000fw";
792 sc->limits = &iwn6000_sensitivity_limits;
793 switch(sc->subdevice_id) {
794 case IWN_SDID_6x00_1:
795 case IWN_SDID_6x00_2:
796 case IWN_SDID_6x00_8:
798 sc->base_params = &iwn_6000_base_params;
800 case IWN_SDID_6x00_3:
801 case IWN_SDID_6x00_6:
802 case IWN_SDID_6x00_9:
804 case IWN_SDID_6x00_4:
805 case IWN_SDID_6x00_7:
806 case IWN_SDID_6x00_10:
808 case IWN_SDID_6x00_5:
810 sc->base_params = &iwn_6000i_base_params;
811 sc->sc_flags |= IWN_FLAG_INTERNAL_PA;
812 sc->txchainmask = IWN_ANT_BC;
813 sc->rxchainmask = IWN_ANT_BC;
816 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
817 "0x%04x rev %d not supported (subdevice)\n", pid,
818 sc->subdevice_id,sc->hw_type);
825 switch(sc->subdevice_id) {
826 case IWN_SDID_6x05_1:
827 case IWN_SDID_6x05_4:
828 case IWN_SDID_6x05_6:
830 case IWN_SDID_6x05_2:
831 case IWN_SDID_6x05_5:
832 case IWN_SDID_6x05_7:
834 case IWN_SDID_6x05_3:
836 case IWN_SDID_6x05_8:
837 case IWN_SDID_6x05_9:
838 //iwl6005_2agn_sff_cfg
839 case IWN_SDID_6x05_10:
841 case IWN_SDID_6x05_11:
842 //iwl6005_2agn_mow1_cfg
843 case IWN_SDID_6x05_12:
844 //iwl6005_2agn_mow2_cfg
845 sc->fwname = "iwn6000g2afw";
846 sc->limits = &iwn6000_sensitivity_limits;
847 sc->base_params = &iwn_6000g2_base_params;
850 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
851 "0x%04x rev %d not supported (subdevice)\n", pid,
852 sc->subdevice_id,sc->hw_type);
859 switch(sc->subdevice_id) {
860 case IWN_SDID_6035_1:
861 case IWN_SDID_6035_2:
862 case IWN_SDID_6035_3:
863 case IWN_SDID_6035_4:
864 sc->fwname = "iwn6000g2bfw";
865 sc->limits = &iwn6235_sensitivity_limits;
866 sc->base_params = &iwn_6235_base_params;
869 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
870 "0x%04x rev %d not supported (subdevice)\n", pid,
871 sc->subdevice_id,sc->hw_type);
875 /* 6x50 WiFi/WiMax Series */
878 switch(sc->subdevice_id) {
879 case IWN_SDID_6050_1:
880 case IWN_SDID_6050_3:
881 case IWN_SDID_6050_5:
883 case IWN_SDID_6050_2:
884 case IWN_SDID_6050_4:
885 case IWN_SDID_6050_6:
887 sc->fwname = "iwn6050fw";
888 sc->txchainmask = IWN_ANT_AB;
889 sc->rxchainmask = IWN_ANT_AB;
890 sc->limits = &iwn6000_sensitivity_limits;
891 sc->base_params = &iwn_6050_base_params;
894 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
895 "0x%04x rev %d not supported (subdevice)\n", pid,
896 sc->subdevice_id,sc->hw_type);
900 /* 6150 WiFi/WiMax Series */
903 switch(sc->subdevice_id) {
904 case IWN_SDID_6150_1:
905 case IWN_SDID_6150_3:
906 case IWN_SDID_6150_5:
908 case IWN_SDID_6150_2:
909 case IWN_SDID_6150_4:
910 case IWN_SDID_6150_6:
912 sc->fwname = "iwn6050fw";
913 sc->limits = &iwn6000_sensitivity_limits;
914 sc->base_params = &iwn_6150_base_params;
917 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
918 "0x%04x rev %d not supported (subdevice)\n", pid,
919 sc->subdevice_id,sc->hw_type);
923 /* 6030 Series and 1030 Series */
928 switch(sc->subdevice_id) {
929 case IWN_SDID_x030_1:
930 case IWN_SDID_x030_3:
931 case IWN_SDID_x030_5:
933 case IWN_SDID_x030_2:
934 case IWN_SDID_x030_4:
935 case IWN_SDID_x030_6:
937 case IWN_SDID_x030_7:
938 case IWN_SDID_x030_10:
939 case IWN_SDID_x030_14:
941 case IWN_SDID_x030_8:
942 case IWN_SDID_x030_11:
943 case IWN_SDID_x030_15:
945 case IWN_SDID_x030_9:
946 case IWN_SDID_x030_12:
947 case IWN_SDID_x030_16:
949 case IWN_SDID_x030_13:
951 sc->fwname = "iwn6000g2bfw";
952 sc->limits = &iwn6000_sensitivity_limits;
953 sc->base_params = &iwn_6000g2b_base_params;
956 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
957 "0x%04x rev %d not supported (subdevice)\n", pid,
958 sc->subdevice_id,sc->hw_type);
962 /* 130 Series WiFi */
963 /* XXX: This series will need adjustment for rate.
964 * see rx_with_siso_diversity in linux kernel
968 switch(sc->subdevice_id) {
977 sc->fwname = "iwn6000g2bfw";
978 sc->limits = &iwn6000_sensitivity_limits;
979 sc->base_params = &iwn_6000g2b_base_params;
982 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
983 "0x%04x rev %d not supported (subdevice)\n", pid,
984 sc->subdevice_id,sc->hw_type);
988 /* 100 Series WiFi */
991 switch(sc->subdevice_id) {
998 sc->limits = &iwn1000_sensitivity_limits;
999 sc->base_params = &iwn1000_base_params;
1000 sc->fwname = "iwn100fw";
1003 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
1004 "0x%04x rev %d not supported (subdevice)\n", pid,
1005 sc->subdevice_id,sc->hw_type);
1011 /* XXX: This series will need adjustment for rate.
1012 * see rx_with_siso_diversity in linux kernel
1016 switch(sc->subdevice_id) {
1017 case IWN_SDID_105_1:
1018 case IWN_SDID_105_2:
1019 case IWN_SDID_105_3:
1021 case IWN_SDID_105_4:
1023 sc->limits = &iwn2030_sensitivity_limits;
1024 sc->base_params = &iwn2000_base_params;
1025 sc->fwname = "iwn105fw";
1028 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
1029 "0x%04x rev %d not supported (subdevice)\n", pid,
1030 sc->subdevice_id,sc->hw_type);
1036 /* XXX: This series will need adjustment for rate.
1037 * see rx_with_siso_diversity in linux kernel
1041 switch(sc->subdevice_id) {
1042 case IWN_SDID_135_1:
1043 case IWN_SDID_135_2:
1044 case IWN_SDID_135_3:
1045 sc->limits = &iwn2030_sensitivity_limits;
1046 sc->base_params = &iwn2030_base_params;
1047 sc->fwname = "iwn135fw";
1050 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
1051 "0x%04x rev %d not supported (subdevice)\n", pid,
1052 sc->subdevice_id,sc->hw_type);
1058 case IWN_DID_2x00_1:
1059 case IWN_DID_2x00_2:
1060 switch(sc->subdevice_id) {
1061 case IWN_SDID_2x00_1:
1062 case IWN_SDID_2x00_2:
1063 case IWN_SDID_2x00_3:
1065 case IWN_SDID_2x00_4:
1066 //iwl2000_2bgn_d_cfg
1067 sc->limits = &iwn2030_sensitivity_limits;
1068 sc->base_params = &iwn2000_base_params;
1069 sc->fwname = "iwn2000fw";
1072 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
1073 "0x%04x rev %d not supported (subdevice) \n",
1074 pid, sc->subdevice_id, sc->hw_type);
1079 case IWN_DID_2x30_1:
1080 case IWN_DID_2x30_2:
1081 switch(sc->subdevice_id) {
1082 case IWN_SDID_2x30_1:
1083 case IWN_SDID_2x30_3:
1084 case IWN_SDID_2x30_5:
1086 case IWN_SDID_2x30_2:
1087 case IWN_SDID_2x30_4:
1088 case IWN_SDID_2x30_6:
1090 sc->limits = &iwn2030_sensitivity_limits;
1091 sc->base_params = &iwn2030_base_params;
1092 sc->fwname = "iwn2030fw";
1095 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
1096 "0x%04x rev %d not supported (subdevice)\n", pid,
1097 sc->subdevice_id,sc->hw_type);
1102 case IWN_DID_5x00_1:
1103 case IWN_DID_5x00_2:
1104 case IWN_DID_5x00_3:
1105 case IWN_DID_5x00_4:
1106 sc->limits = &iwn5000_sensitivity_limits;
1107 sc->base_params = &iwn5000_base_params;
1108 sc->fwname = "iwn5000fw";
1109 switch(sc->subdevice_id) {
1110 case IWN_SDID_5x00_1:
1111 case IWN_SDID_5x00_2:
1112 case IWN_SDID_5x00_3:
1113 case IWN_SDID_5x00_4:
1114 case IWN_SDID_5x00_9:
1115 case IWN_SDID_5x00_10:
1116 case IWN_SDID_5x00_11:
1117 case IWN_SDID_5x00_12:
1118 case IWN_SDID_5x00_17:
1119 case IWN_SDID_5x00_18:
1120 case IWN_SDID_5x00_19:
1121 case IWN_SDID_5x00_20:
1123 sc->txchainmask = IWN_ANT_B;
1124 sc->rxchainmask = IWN_ANT_AB;
1126 case IWN_SDID_5x00_5:
1127 case IWN_SDID_5x00_6:
1128 case IWN_SDID_5x00_13:
1129 case IWN_SDID_5x00_14:
1130 case IWN_SDID_5x00_21:
1131 case IWN_SDID_5x00_22:
1133 sc->txchainmask = IWN_ANT_B;
1134 sc->rxchainmask = IWN_ANT_AB;
1136 case IWN_SDID_5x00_7:
1137 case IWN_SDID_5x00_8:
1138 case IWN_SDID_5x00_15:
1139 case IWN_SDID_5x00_16:
1140 case IWN_SDID_5x00_23:
1141 case IWN_SDID_5x00_24:
1143 sc->txchainmask = IWN_ANT_B;
1144 sc->rxchainmask = IWN_ANT_AB;
1146 case IWN_SDID_5x00_25:
1147 case IWN_SDID_5x00_26:
1148 case IWN_SDID_5x00_27:
1149 case IWN_SDID_5x00_28:
1150 case IWN_SDID_5x00_29:
1151 case IWN_SDID_5x00_30:
1152 case IWN_SDID_5x00_31:
1153 case IWN_SDID_5x00_32:
1154 case IWN_SDID_5x00_33:
1155 case IWN_SDID_5x00_34:
1156 case IWN_SDID_5x00_35:
1157 case IWN_SDID_5x00_36:
1159 sc->txchainmask = IWN_ANT_ABC;
1160 sc->rxchainmask = IWN_ANT_ABC;
1163 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
1164 "0x%04x rev %d not supported (subdevice)\n", pid,
1165 sc->subdevice_id,sc->hw_type);
1170 case IWN_DID_5x50_1:
1171 case IWN_DID_5x50_2:
1172 case IWN_DID_5x50_3:
1173 case IWN_DID_5x50_4:
1174 sc->limits = &iwn5000_sensitivity_limits;
1175 sc->base_params = &iwn5000_base_params;
1176 sc->fwname = "iwn5000fw";
1177 switch(sc->subdevice_id) {
1178 case IWN_SDID_5x50_1:
1179 case IWN_SDID_5x50_2:
1180 case IWN_SDID_5x50_3:
1182 sc->limits = &iwn5000_sensitivity_limits;
1183 sc->base_params = &iwn5000_base_params;
1184 sc->fwname = "iwn5000fw";
1186 case IWN_SDID_5x50_4:
1187 case IWN_SDID_5x50_5:
1188 case IWN_SDID_5x50_8:
1189 case IWN_SDID_5x50_9:
1190 case IWN_SDID_5x50_10:
1191 case IWN_SDID_5x50_11:
1193 case IWN_SDID_5x50_6:
1194 case IWN_SDID_5x50_7:
1195 case IWN_SDID_5x50_12:
1196 case IWN_SDID_5x50_13:
1198 sc->limits = &iwn5000_sensitivity_limits;
1199 sc->fwname = "iwn5150fw";
1200 sc->base_params = &iwn_5x50_base_params;
1203 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
1204 "0x%04x rev %d not supported (subdevice)\n", pid,
1205 sc->subdevice_id,sc->hw_type);
1210 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id : 0x%04x"
1211 "rev 0x%08x not supported (device)\n", pid, sc->subdevice_id,
1219 iwn4965_attach(struct iwn_softc *sc, uint16_t pid)
1221 struct iwn_ops *ops = &sc->ops;
1223 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
1224 ops->load_firmware = iwn4965_load_firmware;
1225 ops->read_eeprom = iwn4965_read_eeprom;
1226 ops->post_alive = iwn4965_post_alive;
1227 ops->nic_config = iwn4965_nic_config;
1228 ops->update_sched = iwn4965_update_sched;
1229 ops->get_temperature = iwn4965_get_temperature;
1230 ops->get_rssi = iwn4965_get_rssi;
1231 ops->set_txpower = iwn4965_set_txpower;
1232 ops->init_gains = iwn4965_init_gains;
1233 ops->set_gains = iwn4965_set_gains;
1234 ops->add_node = iwn4965_add_node;
1235 ops->tx_done = iwn4965_tx_done;
1236 ops->ampdu_tx_start = iwn4965_ampdu_tx_start;
1237 ops->ampdu_tx_stop = iwn4965_ampdu_tx_stop;
1238 sc->ntxqs = IWN4965_NTXQUEUES;
1239 sc->firstaggqueue = IWN4965_FIRSTAGGQUEUE;
1240 sc->ndmachnls = IWN4965_NDMACHNLS;
1241 sc->broadcast_id = IWN4965_ID_BROADCAST;
1242 sc->rxonsz = IWN4965_RXONSZ;
1243 sc->schedsz = IWN4965_SCHEDSZ;
1244 sc->fw_text_maxsz = IWN4965_FW_TEXT_MAXSZ;
1245 sc->fw_data_maxsz = IWN4965_FW_DATA_MAXSZ;
1246 sc->fwsz = IWN4965_FWSZ;
1247 sc->sched_txfact_addr = IWN4965_SCHED_TXFACT;
1248 sc->limits = &iwn4965_sensitivity_limits;
1249 sc->fwname = "iwn4965fw";
1250 /* Override chains masks, ROM is known to be broken. */
1251 sc->txchainmask = IWN_ANT_AB;
1252 sc->rxchainmask = IWN_ANT_ABC;
1253 /* Enable normal btcoex */
1254 sc->sc_flags |= IWN_FLAG_BTCOEX;
1256 DPRINTF(sc, IWN_DEBUG_TRACE, "%s: end\n",__func__);
1262 iwn5000_attach(struct iwn_softc *sc, uint16_t pid)
1264 struct iwn_ops *ops = &sc->ops;
1266 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
1268 ops->load_firmware = iwn5000_load_firmware;
1269 ops->read_eeprom = iwn5000_read_eeprom;
1270 ops->post_alive = iwn5000_post_alive;
1271 ops->nic_config = iwn5000_nic_config;
1272 ops->update_sched = iwn5000_update_sched;
1273 ops->get_temperature = iwn5000_get_temperature;
1274 ops->get_rssi = iwn5000_get_rssi;
1275 ops->set_txpower = iwn5000_set_txpower;
1276 ops->init_gains = iwn5000_init_gains;
1277 ops->set_gains = iwn5000_set_gains;
1278 ops->add_node = iwn5000_add_node;
1279 ops->tx_done = iwn5000_tx_done;
1280 ops->ampdu_tx_start = iwn5000_ampdu_tx_start;
1281 ops->ampdu_tx_stop = iwn5000_ampdu_tx_stop;
1282 sc->ntxqs = IWN5000_NTXQUEUES;
1283 sc->firstaggqueue = IWN5000_FIRSTAGGQUEUE;
1284 sc->ndmachnls = IWN5000_NDMACHNLS;
1285 sc->broadcast_id = IWN5000_ID_BROADCAST;
1286 sc->rxonsz = IWN5000_RXONSZ;
1287 sc->schedsz = IWN5000_SCHEDSZ;
1288 sc->fw_text_maxsz = IWN5000_FW_TEXT_MAXSZ;
1289 sc->fw_data_maxsz = IWN5000_FW_DATA_MAXSZ;
1290 sc->fwsz = IWN5000_FWSZ;
1291 sc->sched_txfact_addr = IWN5000_SCHED_TXFACT;
1292 sc->reset_noise_gain = IWN5000_PHY_CALIB_RESET_NOISE_GAIN;
1293 sc->noise_gain = IWN5000_PHY_CALIB_NOISE_GAIN;
1299 * Attach the interface to 802.11 radiotap.
1302 iwn_radiotap_attach(struct iwn_softc *sc)
1305 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
1306 ieee80211_radiotap_attach(&sc->sc_ic,
1307 &sc->sc_txtap.wt_ihdr, sizeof(sc->sc_txtap),
1308 IWN_TX_RADIOTAP_PRESENT,
1309 &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap),
1310 IWN_RX_RADIOTAP_PRESENT);
1311 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
1315 iwn_sysctlattach(struct iwn_softc *sc)
1318 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->sc_dev);
1319 struct sysctl_oid *tree = device_get_sysctl_tree(sc->sc_dev);
1321 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
1322 "debug", CTLFLAG_RW, &sc->sc_debug, sc->sc_debug,
1323 "control debugging printfs");
1327 static struct ieee80211vap *
1328 iwn_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit,
1329 enum ieee80211_opmode opmode, int flags,
1330 const uint8_t bssid[IEEE80211_ADDR_LEN],
1331 const uint8_t mac[IEEE80211_ADDR_LEN])
1333 struct iwn_softc *sc = ic->ic_softc;
1334 struct iwn_vap *ivp;
1335 struct ieee80211vap *vap;
1337 if (!TAILQ_EMPTY(&ic->ic_vaps)) /* only one at a time */
1340 ivp = malloc(sizeof(struct iwn_vap), M_80211_VAP, M_WAITOK | M_ZERO);
1342 ieee80211_vap_setup(ic, vap, name, unit, opmode, flags, bssid);
1343 ivp->ctx = IWN_RXON_BSS_CTX;
1344 vap->iv_bmissthreshold = 10; /* override default */
1345 /* Override with driver methods. */
1346 ivp->iv_newstate = vap->iv_newstate;
1347 vap->iv_newstate = iwn_newstate;
1348 sc->ivap[IWN_RXON_BSS_CTX] = vap;
1350 ieee80211_ratectl_init(vap);
1351 /* Complete setup. */
1352 ieee80211_vap_attach(vap, iwn_media_change, ieee80211_media_status,
1354 ic->ic_opmode = opmode;
1359 iwn_vap_delete(struct ieee80211vap *vap)
1361 struct iwn_vap *ivp = IWN_VAP(vap);
1363 ieee80211_ratectl_deinit(vap);
1364 ieee80211_vap_detach(vap);
1365 free(ivp, M_80211_VAP);
1369 iwn_xmit_queue_drain(struct iwn_softc *sc)
1372 struct ieee80211_node *ni;
1374 IWN_LOCK_ASSERT(sc);
1375 while ((m = mbufq_dequeue(&sc->sc_xmit_queue)) != NULL) {
1376 ni = (struct ieee80211_node *)m->m_pkthdr.rcvif;
1377 ieee80211_free_node(ni);
1383 iwn_xmit_queue_enqueue(struct iwn_softc *sc, struct mbuf *m)
1386 IWN_LOCK_ASSERT(sc);
1387 return (mbufq_enqueue(&sc->sc_xmit_queue, m));
1391 iwn_detach(device_t dev)
1393 struct iwn_softc *sc = device_get_softc(dev);
1396 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
1398 if (sc->sc_ic.ic_softc != NULL) {
1399 /* Free the mbuf queue and node references */
1401 iwn_xmit_queue_drain(sc);
1404 ieee80211_draintask(&sc->sc_ic, &sc->sc_radioon_task);
1405 ieee80211_draintask(&sc->sc_ic, &sc->sc_radiooff_task);
1408 taskqueue_drain_all(sc->sc_tq);
1409 taskqueue_free(sc->sc_tq);
1411 callout_drain(&sc->watchdog_to);
1412 callout_drain(&sc->scan_timeout);
1413 callout_drain(&sc->calib_to);
1414 ieee80211_ifdetach(&sc->sc_ic);
1417 /* Uninstall interrupt handler. */
1418 if (sc->irq != NULL) {
1419 bus_teardown_intr(dev, sc->irq, sc->sc_ih);
1420 bus_release_resource(dev, SYS_RES_IRQ, rman_get_rid(sc->irq),
1422 pci_release_msi(dev);
1425 /* Free DMA resources. */
1426 iwn_free_rx_ring(sc, &sc->rxq);
1427 for (qid = 0; qid < sc->ntxqs; qid++)
1428 iwn_free_tx_ring(sc, &sc->txq[qid]);
1431 if (sc->ict != NULL)
1435 if (sc->mem != NULL)
1436 bus_release_resource(dev, SYS_RES_MEMORY,
1437 rman_get_rid(sc->mem), sc->mem);
1440 destroy_dev(sc->sc_cdev);
1444 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n", __func__);
1445 IWN_LOCK_DESTROY(sc);
1450 iwn_shutdown(device_t dev)
1452 struct iwn_softc *sc = device_get_softc(dev);
1459 iwn_suspend(device_t dev)
1461 struct iwn_softc *sc = device_get_softc(dev);
1463 ieee80211_suspend_all(&sc->sc_ic);
1468 iwn_resume(device_t dev)
1470 struct iwn_softc *sc = device_get_softc(dev);
1472 /* Clear device-specific "PCI retry timeout" register (41h). */
1473 pci_write_config(dev, 0x41, 0, 1);
1475 ieee80211_resume_all(&sc->sc_ic);
1480 iwn_nic_lock(struct iwn_softc *sc)
1484 /* Request exclusive access to NIC. */
1485 IWN_SETBITS(sc, IWN_GP_CNTRL, IWN_GP_CNTRL_MAC_ACCESS_REQ);
1487 /* Spin until we actually get the lock. */
1488 for (ntries = 0; ntries < 1000; ntries++) {
1489 if ((IWN_READ(sc, IWN_GP_CNTRL) &
1490 (IWN_GP_CNTRL_MAC_ACCESS_ENA | IWN_GP_CNTRL_SLEEP)) ==
1491 IWN_GP_CNTRL_MAC_ACCESS_ENA)
1498 static __inline void
1499 iwn_nic_unlock(struct iwn_softc *sc)
1501 IWN_CLRBITS(sc, IWN_GP_CNTRL, IWN_GP_CNTRL_MAC_ACCESS_REQ);
1504 static __inline uint32_t
1505 iwn_prph_read(struct iwn_softc *sc, uint32_t addr)
1507 IWN_WRITE(sc, IWN_PRPH_RADDR, IWN_PRPH_DWORD | addr);
1508 IWN_BARRIER_READ_WRITE(sc);
1509 return IWN_READ(sc, IWN_PRPH_RDATA);
1512 static __inline void
1513 iwn_prph_write(struct iwn_softc *sc, uint32_t addr, uint32_t data)
1515 IWN_WRITE(sc, IWN_PRPH_WADDR, IWN_PRPH_DWORD | addr);
1516 IWN_BARRIER_WRITE(sc);
1517 IWN_WRITE(sc, IWN_PRPH_WDATA, data);
1520 static __inline void
1521 iwn_prph_setbits(struct iwn_softc *sc, uint32_t addr, uint32_t mask)
1523 iwn_prph_write(sc, addr, iwn_prph_read(sc, addr) | mask);
1526 static __inline void
1527 iwn_prph_clrbits(struct iwn_softc *sc, uint32_t addr, uint32_t mask)
1529 iwn_prph_write(sc, addr, iwn_prph_read(sc, addr) & ~mask);
1532 static __inline void
1533 iwn_prph_write_region_4(struct iwn_softc *sc, uint32_t addr,
1534 const uint32_t *data, int count)
1536 for (; count > 0; count--, data++, addr += 4)
1537 iwn_prph_write(sc, addr, *data);
1540 static __inline uint32_t
1541 iwn_mem_read(struct iwn_softc *sc, uint32_t addr)
1543 IWN_WRITE(sc, IWN_MEM_RADDR, addr);
1544 IWN_BARRIER_READ_WRITE(sc);
1545 return IWN_READ(sc, IWN_MEM_RDATA);
1548 static __inline void
1549 iwn_mem_write(struct iwn_softc *sc, uint32_t addr, uint32_t data)
1551 IWN_WRITE(sc, IWN_MEM_WADDR, addr);
1552 IWN_BARRIER_WRITE(sc);
1553 IWN_WRITE(sc, IWN_MEM_WDATA, data);
1556 static __inline void
1557 iwn_mem_write_2(struct iwn_softc *sc, uint32_t addr, uint16_t data)
1561 tmp = iwn_mem_read(sc, addr & ~3);
1563 tmp = (tmp & 0x0000ffff) | data << 16;
1565 tmp = (tmp & 0xffff0000) | data;
1566 iwn_mem_write(sc, addr & ~3, tmp);
1569 static __inline void
1570 iwn_mem_read_region_4(struct iwn_softc *sc, uint32_t addr, uint32_t *data,
1573 for (; count > 0; count--, addr += 4)
1574 *data++ = iwn_mem_read(sc, addr);
1577 static __inline void
1578 iwn_mem_set_region_4(struct iwn_softc *sc, uint32_t addr, uint32_t val,
1581 for (; count > 0; count--, addr += 4)
1582 iwn_mem_write(sc, addr, val);
1586 iwn_eeprom_lock(struct iwn_softc *sc)
1590 for (i = 0; i < 100; i++) {
1591 /* Request exclusive access to EEPROM. */
1592 IWN_SETBITS(sc, IWN_HW_IF_CONFIG,
1593 IWN_HW_IF_CONFIG_EEPROM_LOCKED);
1595 /* Spin until we actually get the lock. */
1596 for (ntries = 0; ntries < 100; ntries++) {
1597 if (IWN_READ(sc, IWN_HW_IF_CONFIG) &
1598 IWN_HW_IF_CONFIG_EEPROM_LOCKED)
1603 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end timeout\n", __func__);
1607 static __inline void
1608 iwn_eeprom_unlock(struct iwn_softc *sc)
1610 IWN_CLRBITS(sc, IWN_HW_IF_CONFIG, IWN_HW_IF_CONFIG_EEPROM_LOCKED);
1614 * Initialize access by host to One Time Programmable ROM.
1615 * NB: This kind of ROM can be found on 1000 or 6000 Series only.
1618 iwn_init_otprom(struct iwn_softc *sc)
1620 uint16_t prev, base, next;
1623 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
1625 /* Wait for clock stabilization before accessing prph. */
1626 if ((error = iwn_clock_wait(sc)) != 0)
1629 if ((error = iwn_nic_lock(sc)) != 0)
1631 iwn_prph_setbits(sc, IWN_APMG_PS, IWN_APMG_PS_RESET_REQ);
1633 iwn_prph_clrbits(sc, IWN_APMG_PS, IWN_APMG_PS_RESET_REQ);
1636 /* Set auto clock gate disable bit for HW with OTP shadow RAM. */
1637 if (sc->base_params->shadow_ram_support) {
1638 IWN_SETBITS(sc, IWN_DBG_LINK_PWR_MGMT,
1639 IWN_RESET_LINK_PWR_MGMT_DIS);
1641 IWN_CLRBITS(sc, IWN_EEPROM_GP, IWN_EEPROM_GP_IF_OWNER);
1642 /* Clear ECC status. */
1643 IWN_SETBITS(sc, IWN_OTP_GP,
1644 IWN_OTP_GP_ECC_CORR_STTS | IWN_OTP_GP_ECC_UNCORR_STTS);
1647 * Find the block before last block (contains the EEPROM image)
1648 * for HW without OTP shadow RAM.
1650 if (! sc->base_params->shadow_ram_support) {
1651 /* Switch to absolute addressing mode. */
1652 IWN_CLRBITS(sc, IWN_OTP_GP, IWN_OTP_GP_RELATIVE_ACCESS);
1654 for (count = 0; count < sc->base_params->max_ll_items;
1656 error = iwn_read_prom_data(sc, base, &next, 2);
1659 if (next == 0) /* End of linked-list. */
1662 base = le16toh(next);
1664 if (count == 0 || count == sc->base_params->max_ll_items)
1666 /* Skip "next" word. */
1667 sc->prom_base = prev + 1;
1670 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
1676 iwn_read_prom_data(struct iwn_softc *sc, uint32_t addr, void *data, int count)
1678 uint8_t *out = data;
1682 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
1684 addr += sc->prom_base;
1685 for (; count > 0; count -= 2, addr++) {
1686 IWN_WRITE(sc, IWN_EEPROM, addr << 2);
1687 for (ntries = 0; ntries < 10; ntries++) {
1688 val = IWN_READ(sc, IWN_EEPROM);
1689 if (val & IWN_EEPROM_READ_VALID)
1694 device_printf(sc->sc_dev,
1695 "timeout reading ROM at 0x%x\n", addr);
1698 if (sc->sc_flags & IWN_FLAG_HAS_OTPROM) {
1699 /* OTPROM, check for ECC errors. */
1700 tmp = IWN_READ(sc, IWN_OTP_GP);
1701 if (tmp & IWN_OTP_GP_ECC_UNCORR_STTS) {
1702 device_printf(sc->sc_dev,
1703 "OTPROM ECC error at 0x%x\n", addr);
1706 if (tmp & IWN_OTP_GP_ECC_CORR_STTS) {
1707 /* Correctable ECC error, clear bit. */
1708 IWN_SETBITS(sc, IWN_OTP_GP,
1709 IWN_OTP_GP_ECC_CORR_STTS);
1717 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
1723 iwn_dma_map_addr(void *arg, bus_dma_segment_t *segs, int nsegs, int error)
1727 KASSERT(nsegs == 1, ("too many DMA segments, %d should be 1", nsegs));
1728 *(bus_addr_t *)arg = segs[0].ds_addr;
1732 iwn_dma_contig_alloc(struct iwn_softc *sc, struct iwn_dma_info *dma,
1733 void **kvap, bus_size_t size, bus_size_t alignment)
1740 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), alignment,
1741 0, BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, size,
1742 1, size, 0, NULL, NULL, &dma->tag);
1746 error = bus_dmamem_alloc(dma->tag, (void **)&dma->vaddr,
1747 BUS_DMA_NOWAIT | BUS_DMA_ZERO | BUS_DMA_COHERENT, &dma->map);
1751 error = bus_dmamap_load(dma->tag, dma->map, dma->vaddr, size,
1752 iwn_dma_map_addr, &dma->paddr, BUS_DMA_NOWAIT);
1756 bus_dmamap_sync(dma->tag, dma->map, BUS_DMASYNC_PREWRITE);
1763 fail: iwn_dma_contig_free(dma);
1768 iwn_dma_contig_free(struct iwn_dma_info *dma)
1770 if (dma->vaddr != NULL) {
1771 bus_dmamap_sync(dma->tag, dma->map,
1772 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
1773 bus_dmamap_unload(dma->tag, dma->map);
1774 bus_dmamem_free(dma->tag, dma->vaddr, dma->map);
1777 if (dma->tag != NULL) {
1778 bus_dma_tag_destroy(dma->tag);
1784 iwn_alloc_sched(struct iwn_softc *sc)
1786 /* TX scheduler rings must be aligned on a 1KB boundary. */
1787 return iwn_dma_contig_alloc(sc, &sc->sched_dma, (void **)&sc->sched,
1792 iwn_free_sched(struct iwn_softc *sc)
1794 iwn_dma_contig_free(&sc->sched_dma);
1798 iwn_alloc_kw(struct iwn_softc *sc)
1800 /* "Keep Warm" page must be aligned on a 4KB boundary. */
1801 return iwn_dma_contig_alloc(sc, &sc->kw_dma, NULL, 4096, 4096);
1805 iwn_free_kw(struct iwn_softc *sc)
1807 iwn_dma_contig_free(&sc->kw_dma);
1811 iwn_alloc_ict(struct iwn_softc *sc)
1813 /* ICT table must be aligned on a 4KB boundary. */
1814 return iwn_dma_contig_alloc(sc, &sc->ict_dma, (void **)&sc->ict,
1815 IWN_ICT_SIZE, 4096);
1819 iwn_free_ict(struct iwn_softc *sc)
1821 iwn_dma_contig_free(&sc->ict_dma);
1825 iwn_alloc_fwmem(struct iwn_softc *sc)
1827 /* Must be aligned on a 16-byte boundary. */
1828 return iwn_dma_contig_alloc(sc, &sc->fw_dma, NULL, sc->fwsz, 16);
1832 iwn_free_fwmem(struct iwn_softc *sc)
1834 iwn_dma_contig_free(&sc->fw_dma);
1838 iwn_alloc_rx_ring(struct iwn_softc *sc, struct iwn_rx_ring *ring)
1845 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
1847 /* Allocate RX descriptors (256-byte aligned). */
1848 size = IWN_RX_RING_COUNT * sizeof (uint32_t);
1849 error = iwn_dma_contig_alloc(sc, &ring->desc_dma, (void **)&ring->desc,
1852 device_printf(sc->sc_dev,
1853 "%s: could not allocate RX ring DMA memory, error %d\n",
1858 /* Allocate RX status area (16-byte aligned). */
1859 error = iwn_dma_contig_alloc(sc, &ring->stat_dma, (void **)&ring->stat,
1860 sizeof (struct iwn_rx_status), 16);
1862 device_printf(sc->sc_dev,
1863 "%s: could not allocate RX status DMA memory, error %d\n",
1868 /* Create RX buffer DMA tag. */
1869 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 1, 0,
1870 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL,
1871 IWN_RBUF_SIZE, 1, IWN_RBUF_SIZE, 0, NULL, NULL, &ring->data_dmat);
1873 device_printf(sc->sc_dev,
1874 "%s: could not create RX buf DMA tag, error %d\n",
1880 * Allocate and map RX buffers.
1882 for (i = 0; i < IWN_RX_RING_COUNT; i++) {
1883 struct iwn_rx_data *data = &ring->data[i];
1886 error = bus_dmamap_create(ring->data_dmat, 0, &data->map);
1888 device_printf(sc->sc_dev,
1889 "%s: could not create RX buf DMA map, error %d\n",
1894 data->m = m_getjcl(M_NOWAIT, MT_DATA, M_PKTHDR,
1896 if (data->m == NULL) {
1897 device_printf(sc->sc_dev,
1898 "%s: could not allocate RX mbuf\n", __func__);
1903 error = bus_dmamap_load(ring->data_dmat, data->map,
1904 mtod(data->m, void *), IWN_RBUF_SIZE, iwn_dma_map_addr,
1905 &paddr, BUS_DMA_NOWAIT);
1906 if (error != 0 && error != EFBIG) {
1907 device_printf(sc->sc_dev,
1908 "%s: can't map mbuf, error %d\n", __func__,
1913 /* Set physical address of RX buffer (256-byte aligned). */
1914 ring->desc[i] = htole32(paddr >> 8);
1917 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
1918 BUS_DMASYNC_PREWRITE);
1920 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
1924 fail: iwn_free_rx_ring(sc, ring);
1926 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end in error\n",__func__);
1932 iwn_reset_rx_ring(struct iwn_softc *sc, struct iwn_rx_ring *ring)
1936 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
1938 if (iwn_nic_lock(sc) == 0) {
1939 IWN_WRITE(sc, IWN_FH_RX_CONFIG, 0);
1940 for (ntries = 0; ntries < 1000; ntries++) {
1941 if (IWN_READ(sc, IWN_FH_RX_STATUS) &
1942 IWN_FH_RX_STATUS_IDLE)
1949 sc->last_rx_valid = 0;
1953 iwn_free_rx_ring(struct iwn_softc *sc, struct iwn_rx_ring *ring)
1957 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s \n", __func__);
1959 iwn_dma_contig_free(&ring->desc_dma);
1960 iwn_dma_contig_free(&ring->stat_dma);
1962 for (i = 0; i < IWN_RX_RING_COUNT; i++) {
1963 struct iwn_rx_data *data = &ring->data[i];
1965 if (data->m != NULL) {
1966 bus_dmamap_sync(ring->data_dmat, data->map,
1967 BUS_DMASYNC_POSTREAD);
1968 bus_dmamap_unload(ring->data_dmat, data->map);
1972 if (data->map != NULL)
1973 bus_dmamap_destroy(ring->data_dmat, data->map);
1975 if (ring->data_dmat != NULL) {
1976 bus_dma_tag_destroy(ring->data_dmat);
1977 ring->data_dmat = NULL;
1982 iwn_alloc_tx_ring(struct iwn_softc *sc, struct iwn_tx_ring *ring, int qid)
1992 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
1994 /* Allocate TX descriptors (256-byte aligned). */
1995 size = IWN_TX_RING_COUNT * sizeof (struct iwn_tx_desc);
1996 error = iwn_dma_contig_alloc(sc, &ring->desc_dma, (void **)&ring->desc,
1999 device_printf(sc->sc_dev,
2000 "%s: could not allocate TX ring DMA memory, error %d\n",
2005 size = IWN_TX_RING_COUNT * sizeof (struct iwn_tx_cmd);
2006 error = iwn_dma_contig_alloc(sc, &ring->cmd_dma, (void **)&ring->cmd,
2009 device_printf(sc->sc_dev,
2010 "%s: could not allocate TX cmd DMA memory, error %d\n",
2015 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 1, 0,
2016 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES,
2017 IWN_MAX_SCATTER - 1, MCLBYTES, 0, NULL, NULL, &ring->data_dmat);
2019 device_printf(sc->sc_dev,
2020 "%s: could not create TX buf DMA tag, error %d\n",
2025 paddr = ring->cmd_dma.paddr;
2026 for (i = 0; i < IWN_TX_RING_COUNT; i++) {
2027 struct iwn_tx_data *data = &ring->data[i];
2029 data->cmd_paddr = paddr;
2030 data->scratch_paddr = paddr + 12;
2031 paddr += sizeof (struct iwn_tx_cmd);
2033 error = bus_dmamap_create(ring->data_dmat, 0, &data->map);
2035 device_printf(sc->sc_dev,
2036 "%s: could not create TX buf DMA map, error %d\n",
2042 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
2046 fail: iwn_free_tx_ring(sc, ring);
2047 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end in error\n", __func__);
2052 iwn_reset_tx_ring(struct iwn_softc *sc, struct iwn_tx_ring *ring)
2056 DPRINTF(sc, IWN_DEBUG_TRACE, "->doing %s \n", __func__);
2058 for (i = 0; i < IWN_TX_RING_COUNT; i++) {
2059 struct iwn_tx_data *data = &ring->data[i];
2061 if (data->m != NULL) {
2062 bus_dmamap_sync(ring->data_dmat, data->map,
2063 BUS_DMASYNC_POSTWRITE);
2064 bus_dmamap_unload(ring->data_dmat, data->map);
2068 if (data->ni != NULL) {
2069 ieee80211_free_node(data->ni);
2073 /* Clear TX descriptors. */
2074 memset(ring->desc, 0, ring->desc_dma.size);
2075 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
2076 BUS_DMASYNC_PREWRITE);
2077 sc->qfullmsk &= ~(1 << ring->qid);
2083 iwn_free_tx_ring(struct iwn_softc *sc, struct iwn_tx_ring *ring)
2087 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s \n", __func__);
2089 iwn_dma_contig_free(&ring->desc_dma);
2090 iwn_dma_contig_free(&ring->cmd_dma);
2092 for (i = 0; i < IWN_TX_RING_COUNT; i++) {
2093 struct iwn_tx_data *data = &ring->data[i];
2095 if (data->m != NULL) {
2096 bus_dmamap_sync(ring->data_dmat, data->map,
2097 BUS_DMASYNC_POSTWRITE);
2098 bus_dmamap_unload(ring->data_dmat, data->map);
2101 if (data->map != NULL)
2102 bus_dmamap_destroy(ring->data_dmat, data->map);
2104 if (ring->data_dmat != NULL) {
2105 bus_dma_tag_destroy(ring->data_dmat);
2106 ring->data_dmat = NULL;
2111 iwn5000_ict_reset(struct iwn_softc *sc)
2113 /* Disable interrupts. */
2114 IWN_WRITE(sc, IWN_INT_MASK, 0);
2116 /* Reset ICT table. */
2117 memset(sc->ict, 0, IWN_ICT_SIZE);
2120 /* Set physical address of ICT table (4KB aligned). */
2121 DPRINTF(sc, IWN_DEBUG_RESET, "%s: enabling ICT\n", __func__);
2122 IWN_WRITE(sc, IWN_DRAM_INT_TBL, IWN_DRAM_INT_TBL_ENABLE |
2123 IWN_DRAM_INT_TBL_WRAP_CHECK | sc->ict_dma.paddr >> 12);
2125 /* Enable periodic RX interrupt. */
2126 sc->int_mask |= IWN_INT_RX_PERIODIC;
2127 /* Switch to ICT interrupt mode in driver. */
2128 sc->sc_flags |= IWN_FLAG_USE_ICT;
2130 /* Re-enable interrupts. */
2131 IWN_WRITE(sc, IWN_INT, 0xffffffff);
2132 IWN_WRITE(sc, IWN_INT_MASK, sc->int_mask);
2136 iwn_read_eeprom(struct iwn_softc *sc, uint8_t macaddr[IEEE80211_ADDR_LEN])
2138 struct iwn_ops *ops = &sc->ops;
2142 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
2144 /* Check whether adapter has an EEPROM or an OTPROM. */
2145 if (sc->hw_type >= IWN_HW_REV_TYPE_1000 &&
2146 (IWN_READ(sc, IWN_OTP_GP) & IWN_OTP_GP_DEV_SEL_OTP))
2147 sc->sc_flags |= IWN_FLAG_HAS_OTPROM;
2148 DPRINTF(sc, IWN_DEBUG_RESET, "%s found\n",
2149 (sc->sc_flags & IWN_FLAG_HAS_OTPROM) ? "OTPROM" : "EEPROM");
2151 /* Adapter has to be powered on for EEPROM access to work. */
2152 if ((error = iwn_apm_init(sc)) != 0) {
2153 device_printf(sc->sc_dev,
2154 "%s: could not power ON adapter, error %d\n", __func__,
2159 if ((IWN_READ(sc, IWN_EEPROM_GP) & 0x7) == 0) {
2160 device_printf(sc->sc_dev, "%s: bad ROM signature\n", __func__);
2163 if ((error = iwn_eeprom_lock(sc)) != 0) {
2164 device_printf(sc->sc_dev, "%s: could not lock ROM, error %d\n",
2168 if (sc->sc_flags & IWN_FLAG_HAS_OTPROM) {
2169 if ((error = iwn_init_otprom(sc)) != 0) {
2170 device_printf(sc->sc_dev,
2171 "%s: could not initialize OTPROM, error %d\n",
2177 iwn_read_prom_data(sc, IWN_EEPROM_SKU_CAP, &val, 2);
2178 DPRINTF(sc, IWN_DEBUG_RESET, "SKU capabilities=0x%04x\n", le16toh(val));
2179 /* Check if HT support is bonded out. */
2180 if (val & htole16(IWN_EEPROM_SKU_CAP_11N))
2181 sc->sc_flags |= IWN_FLAG_HAS_11N;
2183 iwn_read_prom_data(sc, IWN_EEPROM_RFCFG, &val, 2);
2184 sc->rfcfg = le16toh(val);
2185 DPRINTF(sc, IWN_DEBUG_RESET, "radio config=0x%04x\n", sc->rfcfg);
2186 /* Read Tx/Rx chains from ROM unless it's known to be broken. */
2187 if (sc->txchainmask == 0)
2188 sc->txchainmask = IWN_RFCFG_TXANTMSK(sc->rfcfg);
2189 if (sc->rxchainmask == 0)
2190 sc->rxchainmask = IWN_RFCFG_RXANTMSK(sc->rfcfg);
2192 /* Read MAC address. */
2193 iwn_read_prom_data(sc, IWN_EEPROM_MAC, macaddr, 6);
2195 /* Read adapter-specific information from EEPROM. */
2196 ops->read_eeprom(sc);
2198 iwn_apm_stop(sc); /* Power OFF adapter. */
2200 iwn_eeprom_unlock(sc);
2202 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
2208 iwn4965_read_eeprom(struct iwn_softc *sc)
2214 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
2216 /* Read regulatory domain (4 ASCII characters). */
2217 iwn_read_prom_data(sc, IWN4965_EEPROM_DOMAIN, sc->eeprom_domain, 4);
2219 /* Read the list of authorized channels (20MHz & 40MHz). */
2220 for (i = 0; i < IWN_NBANDS - 1; i++) {
2221 addr = iwn4965_regulatory_bands[i];
2222 iwn_read_eeprom_channels(sc, i, addr);
2225 /* Read maximum allowed TX power for 2GHz and 5GHz bands. */
2226 iwn_read_prom_data(sc, IWN4965_EEPROM_MAXPOW, &val, 2);
2227 sc->maxpwr2GHz = val & 0xff;
2228 sc->maxpwr5GHz = val >> 8;
2229 /* Check that EEPROM values are within valid range. */
2230 if (sc->maxpwr5GHz < 20 || sc->maxpwr5GHz > 50)
2231 sc->maxpwr5GHz = 38;
2232 if (sc->maxpwr2GHz < 20 || sc->maxpwr2GHz > 50)
2233 sc->maxpwr2GHz = 38;
2234 DPRINTF(sc, IWN_DEBUG_RESET, "maxpwr 2GHz=%d 5GHz=%d\n",
2235 sc->maxpwr2GHz, sc->maxpwr5GHz);
2237 /* Read samples for each TX power group. */
2238 iwn_read_prom_data(sc, IWN4965_EEPROM_BANDS, sc->bands,
2241 /* Read voltage at which samples were taken. */
2242 iwn_read_prom_data(sc, IWN4965_EEPROM_VOLTAGE, &val, 2);
2243 sc->eeprom_voltage = (int16_t)le16toh(val);
2244 DPRINTF(sc, IWN_DEBUG_RESET, "voltage=%d (in 0.3V)\n",
2245 sc->eeprom_voltage);
2248 /* Print samples. */
2249 if (sc->sc_debug & IWN_DEBUG_ANY) {
2250 for (i = 0; i < IWN_NBANDS - 1; i++)
2251 iwn4965_print_power_group(sc, i);
2255 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
2260 iwn4965_print_power_group(struct iwn_softc *sc, int i)
2262 struct iwn4965_eeprom_band *band = &sc->bands[i];
2263 struct iwn4965_eeprom_chan_samples *chans = band->chans;
2266 printf("===band %d===\n", i);
2267 printf("chan lo=%d, chan hi=%d\n", band->lo, band->hi);
2268 printf("chan1 num=%d\n", chans[0].num);
2269 for (c = 0; c < 2; c++) {
2270 for (j = 0; j < IWN_NSAMPLES; j++) {
2271 printf("chain %d, sample %d: temp=%d gain=%d "
2272 "power=%d pa_det=%d\n", c, j,
2273 chans[0].samples[c][j].temp,
2274 chans[0].samples[c][j].gain,
2275 chans[0].samples[c][j].power,
2276 chans[0].samples[c][j].pa_det);
2279 printf("chan2 num=%d\n", chans[1].num);
2280 for (c = 0; c < 2; c++) {
2281 for (j = 0; j < IWN_NSAMPLES; j++) {
2282 printf("chain %d, sample %d: temp=%d gain=%d "
2283 "power=%d pa_det=%d\n", c, j,
2284 chans[1].samples[c][j].temp,
2285 chans[1].samples[c][j].gain,
2286 chans[1].samples[c][j].power,
2287 chans[1].samples[c][j].pa_det);
2294 iwn5000_read_eeprom(struct iwn_softc *sc)
2296 struct iwn5000_eeprom_calib_hdr hdr;
2298 uint32_t base, addr;
2302 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
2304 /* Read regulatory domain (4 ASCII characters). */
2305 iwn_read_prom_data(sc, IWN5000_EEPROM_REG, &val, 2);
2306 base = le16toh(val);
2307 iwn_read_prom_data(sc, base + IWN5000_EEPROM_DOMAIN,
2308 sc->eeprom_domain, 4);
2310 /* Read the list of authorized channels (20MHz & 40MHz). */
2311 for (i = 0; i < IWN_NBANDS - 1; i++) {
2312 addr = base + sc->base_params->regulatory_bands[i];
2313 iwn_read_eeprom_channels(sc, i, addr);
2316 /* Read enhanced TX power information for 6000 Series. */
2317 if (sc->base_params->enhanced_TX_power)
2318 iwn_read_eeprom_enhinfo(sc);
2320 iwn_read_prom_data(sc, IWN5000_EEPROM_CAL, &val, 2);
2321 base = le16toh(val);
2322 iwn_read_prom_data(sc, base, &hdr, sizeof hdr);
2323 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
2324 "%s: calib version=%u pa type=%u voltage=%u\n", __func__,
2325 hdr.version, hdr.pa_type, le16toh(hdr.volt));
2326 sc->calib_ver = hdr.version;
2328 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSETv2) {
2329 sc->eeprom_voltage = le16toh(hdr.volt);
2330 iwn_read_prom_data(sc, base + IWN5000_EEPROM_TEMP, &val, 2);
2331 sc->eeprom_temp_high=le16toh(val);
2332 iwn_read_prom_data(sc, base + IWN5000_EEPROM_VOLT, &val, 2);
2333 sc->eeprom_temp = le16toh(val);
2336 if (sc->hw_type == IWN_HW_REV_TYPE_5150) {
2337 /* Compute temperature offset. */
2338 iwn_read_prom_data(sc, base + IWN5000_EEPROM_TEMP, &val, 2);
2339 sc->eeprom_temp = le16toh(val);
2340 iwn_read_prom_data(sc, base + IWN5000_EEPROM_VOLT, &val, 2);
2341 volt = le16toh(val);
2342 sc->temp_off = sc->eeprom_temp - (volt / -5);
2343 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "temp=%d volt=%d offset=%dK\n",
2344 sc->eeprom_temp, volt, sc->temp_off);
2346 /* Read crystal calibration. */
2347 iwn_read_prom_data(sc, base + IWN5000_EEPROM_CRYSTAL,
2348 &sc->eeprom_crystal, sizeof (uint32_t));
2349 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "crystal calibration 0x%08x\n",
2350 le32toh(sc->eeprom_crystal));
2353 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
2358 * Translate EEPROM flags to net80211.
2361 iwn_eeprom_channel_flags(struct iwn_eeprom_chan *channel)
2366 if ((channel->flags & IWN_EEPROM_CHAN_ACTIVE) == 0)
2367 nflags |= IEEE80211_CHAN_PASSIVE;
2368 if ((channel->flags & IWN_EEPROM_CHAN_IBSS) == 0)
2369 nflags |= IEEE80211_CHAN_NOADHOC;
2370 if (channel->flags & IWN_EEPROM_CHAN_RADAR) {
2371 nflags |= IEEE80211_CHAN_DFS;
2372 /* XXX apparently IBSS may still be marked */
2373 nflags |= IEEE80211_CHAN_NOADHOC;
2380 iwn_read_eeprom_band(struct iwn_softc *sc, int n, int maxchans, int *nchans,
2381 struct ieee80211_channel chans[])
2383 struct iwn_eeprom_chan *channels = sc->eeprom_channels[n];
2384 const struct iwn_chan_band *band = &iwn_bands[n];
2385 uint8_t bands[IEEE80211_MODE_BYTES];
2387 int i, error, nflags;
2389 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
2391 memset(bands, 0, sizeof(bands));
2393 setbit(bands, IEEE80211_MODE_11B);
2394 setbit(bands, IEEE80211_MODE_11G);
2395 if (sc->sc_flags & IWN_FLAG_HAS_11N)
2396 setbit(bands, IEEE80211_MODE_11NG);
2398 setbit(bands, IEEE80211_MODE_11A);
2399 if (sc->sc_flags & IWN_FLAG_HAS_11N)
2400 setbit(bands, IEEE80211_MODE_11NA);
2403 for (i = 0; i < band->nchan; i++) {
2404 if (!(channels[i].flags & IWN_EEPROM_CHAN_VALID)) {
2405 DPRINTF(sc, IWN_DEBUG_RESET,
2406 "skip chan %d flags 0x%x maxpwr %d\n",
2407 band->chan[i], channels[i].flags,
2408 channels[i].maxpwr);
2412 chan = band->chan[i];
2413 nflags = iwn_eeprom_channel_flags(&channels[i]);
2414 error = ieee80211_add_channel(chans, maxchans, nchans,
2415 chan, 0, channels[i].maxpwr, nflags, bands);
2419 /* Save maximum allowed TX power for this channel. */
2421 sc->maxpwr[chan] = channels[i].maxpwr;
2423 DPRINTF(sc, IWN_DEBUG_RESET,
2424 "add chan %d flags 0x%x maxpwr %d\n", chan,
2425 channels[i].flags, channels[i].maxpwr);
2428 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
2433 iwn_read_eeprom_ht40(struct iwn_softc *sc, int n, int maxchans, int *nchans,
2434 struct ieee80211_channel chans[])
2436 struct iwn_eeprom_chan *channels = sc->eeprom_channels[n];
2437 const struct iwn_chan_band *band = &iwn_bands[n];
2439 int i, error, nflags;
2441 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s start\n", __func__);
2443 if (!(sc->sc_flags & IWN_FLAG_HAS_11N)) {
2444 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end no 11n\n", __func__);
2448 for (i = 0; i < band->nchan; i++) {
2449 if (!(channels[i].flags & IWN_EEPROM_CHAN_VALID)) {
2450 DPRINTF(sc, IWN_DEBUG_RESET,
2451 "skip chan %d flags 0x%x maxpwr %d\n",
2452 band->chan[i], channels[i].flags,
2453 channels[i].maxpwr);
2457 chan = band->chan[i];
2458 nflags = iwn_eeprom_channel_flags(&channels[i]);
2459 nflags |= (n == 5 ? IEEE80211_CHAN_G : IEEE80211_CHAN_A);
2460 error = ieee80211_add_channel_ht40(chans, maxchans, nchans,
2461 chan, channels[i].maxpwr, nflags);
2464 device_printf(sc->sc_dev,
2465 "%s: no entry for channel %d\n", __func__, chan);
2468 DPRINTF(sc, IWN_DEBUG_RESET,
2469 "%s: skip chan %d, extension channel not found\n",
2473 device_printf(sc->sc_dev,
2474 "%s: channel table is full!\n", __func__);
2477 DPRINTF(sc, IWN_DEBUG_RESET,
2478 "add ht40 chan %d flags 0x%x maxpwr %d\n",
2479 chan, channels[i].flags, channels[i].maxpwr);
2486 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
2491 iwn_read_eeprom_channels(struct iwn_softc *sc, int n, uint32_t addr)
2493 struct ieee80211com *ic = &sc->sc_ic;
2495 iwn_read_prom_data(sc, addr, &sc->eeprom_channels[n],
2496 iwn_bands[n].nchan * sizeof (struct iwn_eeprom_chan));
2499 iwn_read_eeprom_band(sc, n, IEEE80211_CHAN_MAX, &ic->ic_nchans,
2502 iwn_read_eeprom_ht40(sc, n, IEEE80211_CHAN_MAX, &ic->ic_nchans,
2505 ieee80211_sort_channels(ic->ic_channels, ic->ic_nchans);
2508 static struct iwn_eeprom_chan *
2509 iwn_find_eeprom_channel(struct iwn_softc *sc, struct ieee80211_channel *c)
2511 int band, chan, i, j;
2513 if (IEEE80211_IS_CHAN_HT40(c)) {
2514 band = IEEE80211_IS_CHAN_5GHZ(c) ? 6 : 5;
2515 if (IEEE80211_IS_CHAN_HT40D(c))
2516 chan = c->ic_extieee;
2519 for (i = 0; i < iwn_bands[band].nchan; i++) {
2520 if (iwn_bands[band].chan[i] == chan)
2521 return &sc->eeprom_channels[band][i];
2524 for (j = 0; j < 5; j++) {
2525 for (i = 0; i < iwn_bands[j].nchan; i++) {
2526 if (iwn_bands[j].chan[i] == c->ic_ieee &&
2527 ((j == 0) ^ IEEE80211_IS_CHAN_A(c)) == 1)
2528 return &sc->eeprom_channels[j][i];
2536 iwn_getradiocaps(struct ieee80211com *ic,
2537 int maxchans, int *nchans, struct ieee80211_channel chans[])
2539 struct iwn_softc *sc = ic->ic_softc;
2542 /* Parse the list of authorized channels. */
2543 for (i = 0; i < 5 && *nchans < maxchans; i++)
2544 iwn_read_eeprom_band(sc, i, maxchans, nchans, chans);
2545 for (i = 5; i < IWN_NBANDS - 1 && *nchans < maxchans; i++)
2546 iwn_read_eeprom_ht40(sc, i, maxchans, nchans, chans);
2550 * Enforce flags read from EEPROM.
2553 iwn_setregdomain(struct ieee80211com *ic, struct ieee80211_regdomain *rd,
2554 int nchan, struct ieee80211_channel chans[])
2556 struct iwn_softc *sc = ic->ic_softc;
2559 for (i = 0; i < nchan; i++) {
2560 struct ieee80211_channel *c = &chans[i];
2561 struct iwn_eeprom_chan *channel;
2563 channel = iwn_find_eeprom_channel(sc, c);
2564 if (channel == NULL) {
2565 ic_printf(ic, "%s: invalid channel %u freq %u/0x%x\n",
2566 __func__, c->ic_ieee, c->ic_freq, c->ic_flags);
2569 c->ic_flags |= iwn_eeprom_channel_flags(channel);
2576 iwn_read_eeprom_enhinfo(struct iwn_softc *sc)
2578 struct iwn_eeprom_enhinfo enhinfo[35];
2579 struct ieee80211com *ic = &sc->sc_ic;
2580 struct ieee80211_channel *c;
2586 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
2588 iwn_read_prom_data(sc, IWN5000_EEPROM_REG, &val, 2);
2589 base = le16toh(val);
2590 iwn_read_prom_data(sc, base + IWN6000_EEPROM_ENHINFO,
2591 enhinfo, sizeof enhinfo);
2593 for (i = 0; i < nitems(enhinfo); i++) {
2594 flags = enhinfo[i].flags;
2595 if (!(flags & IWN_ENHINFO_VALID))
2596 continue; /* Skip invalid entries. */
2599 if (sc->txchainmask & IWN_ANT_A)
2600 maxpwr = MAX(maxpwr, enhinfo[i].chain[0]);
2601 if (sc->txchainmask & IWN_ANT_B)
2602 maxpwr = MAX(maxpwr, enhinfo[i].chain[1]);
2603 if (sc->txchainmask & IWN_ANT_C)
2604 maxpwr = MAX(maxpwr, enhinfo[i].chain[2]);
2605 if (sc->ntxchains == 2)
2606 maxpwr = MAX(maxpwr, enhinfo[i].mimo2);
2607 else if (sc->ntxchains == 3)
2608 maxpwr = MAX(maxpwr, enhinfo[i].mimo3);
2610 for (j = 0; j < ic->ic_nchans; j++) {
2611 c = &ic->ic_channels[j];
2612 if ((flags & IWN_ENHINFO_5GHZ)) {
2613 if (!IEEE80211_IS_CHAN_A(c))
2615 } else if ((flags & IWN_ENHINFO_OFDM)) {
2616 if (!IEEE80211_IS_CHAN_G(c))
2618 } else if (!IEEE80211_IS_CHAN_B(c))
2620 if ((flags & IWN_ENHINFO_HT40)) {
2621 if (!IEEE80211_IS_CHAN_HT40(c))
2624 if (IEEE80211_IS_CHAN_HT40(c))
2627 if (enhinfo[i].chan != 0 &&
2628 enhinfo[i].chan != c->ic_ieee)
2631 DPRINTF(sc, IWN_DEBUG_RESET,
2632 "channel %d(%x), maxpwr %d\n", c->ic_ieee,
2633 c->ic_flags, maxpwr / 2);
2634 c->ic_maxregpower = maxpwr / 2;
2635 c->ic_maxpower = maxpwr;
2639 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
2643 static struct ieee80211_node *
2644 iwn_node_alloc(struct ieee80211vap *vap, const uint8_t mac[IEEE80211_ADDR_LEN])
2646 return malloc(sizeof (struct iwn_node), M_80211_NODE,M_NOWAIT | M_ZERO);
2652 switch (rate & 0xff) {
2653 case 12: return 0xd;
2654 case 18: return 0xf;
2655 case 24: return 0x5;
2656 case 36: return 0x7;
2657 case 48: return 0x9;
2658 case 72: return 0xb;
2659 case 96: return 0x1;
2660 case 108: return 0x3;
2664 case 22: return 110;
2670 iwn_get_1stream_tx_antmask(struct iwn_softc *sc)
2673 return IWN_LSB(sc->txchainmask);
2677 iwn_get_2stream_tx_antmask(struct iwn_softc *sc)
2682 * The '2 stream' setup is a bit .. odd.
2684 * For NICs that support only 1 antenna, default to IWN_ANT_AB or
2685 * the firmware panics (eg Intel 5100.)
2687 * For NICs that support two antennas, we use ANT_AB.
2689 * For NICs that support three antennas, we use the two that
2690 * wasn't the default one.
2692 * XXX TODO: if bluetooth (full concurrent) is enabled, restrict
2693 * this to only one antenna.
2696 /* Default - transmit on the other antennas */
2697 tx = (sc->txchainmask & ~IWN_LSB(sc->txchainmask));
2699 /* Now, if it's zero, set it to IWN_ANT_AB, so to not panic firmware */
2704 * If the NIC is a two-stream TX NIC, configure the TX mask to
2705 * the default chainmask
2707 else if (sc->ntxchains == 2)
2708 tx = sc->txchainmask;
2716 * Calculate the required PLCP value from the given rate,
2717 * to the given node.
2719 * This will take the node configuration (eg 11n, rate table
2720 * setup, etc) into consideration.
2723 iwn_rate_to_plcp(struct iwn_softc *sc, struct ieee80211_node *ni,
2726 struct ieee80211com *ic = ni->ni_ic;
2731 * If it's an MCS rate, let's set the plcp correctly
2732 * and set the relevant flags based on the node config.
2734 if (rate & IEEE80211_RATE_MCS) {
2736 * Set the initial PLCP value to be between 0->31 for
2737 * MCS 0 -> MCS 31, then set the "I'm an MCS rate!"
2740 plcp = IEEE80211_RV(rate) | IWN_RFLAG_MCS;
2743 * XXX the following should only occur if both
2744 * the local configuration _and_ the remote node
2745 * advertise these capabilities. Thus this code
2750 * Set the channel width and guard interval.
2752 if (IEEE80211_IS_CHAN_HT40(ni->ni_chan)) {
2753 plcp |= IWN_RFLAG_HT40;
2754 if (ni->ni_htcap & IEEE80211_HTCAP_SHORTGI40)
2755 plcp |= IWN_RFLAG_SGI;
2756 } else if (ni->ni_htcap & IEEE80211_HTCAP_SHORTGI20) {
2757 plcp |= IWN_RFLAG_SGI;
2761 * Ensure the selected rate matches the link quality
2762 * table entries being used.
2765 plcp |= IWN_RFLAG_ANT(sc->txchainmask);
2766 else if (rate > 0x87)
2767 plcp |= IWN_RFLAG_ANT(iwn_get_2stream_tx_antmask(sc));
2769 plcp |= IWN_RFLAG_ANT(iwn_get_1stream_tx_antmask(sc));
2772 * Set the initial PLCP - fine for both
2773 * OFDM and CCK rates.
2775 plcp = rate2plcp(rate);
2777 /* Set CCK flag if it's CCK */
2779 /* XXX It would be nice to have a method
2780 * to map the ridx -> phy table entry
2781 * so we could just query that, rather than
2782 * this hack to check against IWN_RIDX_OFDM6.
2784 ridx = ieee80211_legacy_rate_lookup(ic->ic_rt,
2785 rate & IEEE80211_RATE_VAL);
2786 if (ridx < IWN_RIDX_OFDM6 &&
2787 IEEE80211_IS_CHAN_2GHZ(ni->ni_chan))
2788 plcp |= IWN_RFLAG_CCK;
2790 /* Set antenna configuration */
2791 /* XXX TODO: is this the right antenna to use for legacy? */
2792 plcp |= IWN_RFLAG_ANT(iwn_get_1stream_tx_antmask(sc));
2795 DPRINTF(sc, IWN_DEBUG_TXRATE, "%s: rate=0x%02x, plcp=0x%08x\n",
2800 return (htole32(plcp));
2804 iwn_newassoc(struct ieee80211_node *ni, int isnew)
2806 /* Doesn't do anything at the moment */
2810 iwn_media_change(struct ifnet *ifp)
2814 error = ieee80211_media_change(ifp);
2815 /* NB: only the fixed rate can change and that doesn't need a reset */
2816 return (error == ENETRESET ? 0 : error);
2820 iwn_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg)
2822 struct iwn_vap *ivp = IWN_VAP(vap);
2823 struct ieee80211com *ic = vap->iv_ic;
2824 struct iwn_softc *sc = ic->ic_softc;
2827 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
2829 DPRINTF(sc, IWN_DEBUG_STATE, "%s: %s -> %s\n", __func__,
2830 ieee80211_state_name[vap->iv_state], ieee80211_state_name[nstate]);
2832 IEEE80211_UNLOCK(ic);
2834 callout_stop(&sc->calib_to);
2836 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX];
2839 case IEEE80211_S_ASSOC:
2840 if (vap->iv_state != IEEE80211_S_RUN)
2843 case IEEE80211_S_AUTH:
2844 if (vap->iv_state == IEEE80211_S_AUTH)
2848 * !AUTH -> AUTH transition requires state reset to handle
2849 * reassociations correctly.
2851 sc->rxon->associd = 0;
2852 sc->rxon->filter &= ~htole32(IWN_FILTER_BSS);
2853 sc->calib.state = IWN_CALIB_STATE_INIT;
2855 /* Wait until we hear a beacon before we transmit */
2856 if (IEEE80211_IS_CHAN_PASSIVE(ic->ic_curchan))
2857 sc->sc_beacon_wait = 1;
2859 if ((error = iwn_auth(sc, vap)) != 0) {
2860 device_printf(sc->sc_dev,
2861 "%s: could not move to auth state\n", __func__);
2865 case IEEE80211_S_RUN:
2867 * RUN -> RUN transition; Just restart the timers.
2869 if (vap->iv_state == IEEE80211_S_RUN) {
2874 /* Wait until we hear a beacon before we transmit */
2875 if (IEEE80211_IS_CHAN_PASSIVE(ic->ic_curchan))
2876 sc->sc_beacon_wait = 1;
2879 * !RUN -> RUN requires setting the association id
2880 * which is done with a firmware cmd. We also defer
2881 * starting the timers until that work is done.
2883 if ((error = iwn_run(sc, vap)) != 0) {
2884 device_printf(sc->sc_dev,
2885 "%s: could not move to run state\n", __func__);
2889 case IEEE80211_S_INIT:
2890 sc->calib.state = IWN_CALIB_STATE_INIT;
2892 * Purge the xmit queue so we don't have old frames
2893 * during a new association attempt.
2895 sc->sc_beacon_wait = 0;
2896 iwn_xmit_queue_drain(sc);
2905 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end in error\n", __func__);
2909 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
2911 return ivp->iv_newstate(vap, nstate, arg);
2915 iwn_calib_timeout(void *arg)
2917 struct iwn_softc *sc = arg;
2919 IWN_LOCK_ASSERT(sc);
2921 /* Force automatic TX power calibration every 60 secs. */
2922 if (++sc->calib_cnt >= 120) {
2925 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s\n",
2926 "sending request for statistics");
2927 (void)iwn_cmd(sc, IWN_CMD_GET_STATISTICS, &flags,
2931 callout_reset(&sc->calib_to, msecs_to_ticks(500), iwn_calib_timeout,
2936 * Process an RX_PHY firmware notification. This is usually immediately
2937 * followed by an MPDU_RX_DONE notification.
2940 iwn_rx_phy(struct iwn_softc *sc, struct iwn_rx_desc *desc,
2941 struct iwn_rx_data *data)
2943 struct iwn_rx_stat *stat = (struct iwn_rx_stat *)(desc + 1);
2945 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: received PHY stats\n", __func__);
2946 bus_dmamap_sync(sc->rxq.data_dmat, data->map, BUS_DMASYNC_POSTREAD);
2948 /* Save RX statistics, they will be used on MPDU_RX_DONE. */
2949 memcpy(&sc->last_rx_stat, stat, sizeof (*stat));
2950 sc->last_rx_valid = 1;
2954 * Process an RX_DONE (4965AGN only) or MPDU_RX_DONE firmware notification.
2955 * Each MPDU_RX_DONE notification must be preceded by an RX_PHY one.
2958 iwn_rx_done(struct iwn_softc *sc, struct iwn_rx_desc *desc,
2959 struct iwn_rx_data *data)
2961 struct iwn_ops *ops = &sc->ops;
2962 struct ieee80211com *ic = &sc->sc_ic;
2963 struct iwn_rx_ring *ring = &sc->rxq;
2964 struct ieee80211_frame *wh;
2965 struct ieee80211_node *ni;
2966 struct mbuf *m, *m1;
2967 struct iwn_rx_stat *stat;
2971 int error, len, rssi, nf;
2973 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
2975 if (desc->type == IWN_MPDU_RX_DONE) {
2976 /* Check for prior RX_PHY notification. */
2977 if (!sc->last_rx_valid) {
2978 DPRINTF(sc, IWN_DEBUG_ANY,
2979 "%s: missing RX_PHY\n", __func__);
2982 stat = &sc->last_rx_stat;
2984 stat = (struct iwn_rx_stat *)(desc + 1);
2986 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_POSTREAD);
2988 if (stat->cfg_phy_len > IWN_STAT_MAXLEN) {
2989 device_printf(sc->sc_dev,
2990 "%s: invalid RX statistic header, len %d\n", __func__,
2994 if (desc->type == IWN_MPDU_RX_DONE) {
2995 struct iwn_rx_mpdu *mpdu = (struct iwn_rx_mpdu *)(desc + 1);
2996 head = (caddr_t)(mpdu + 1);
2997 len = le16toh(mpdu->len);
2999 head = (caddr_t)(stat + 1) + stat->cfg_phy_len;
3000 len = le16toh(stat->len);
3003 flags = le32toh(*(uint32_t *)(head + len));
3005 /* Discard frames with a bad FCS early. */
3006 if ((flags & IWN_RX_NOERROR) != IWN_RX_NOERROR) {
3007 DPRINTF(sc, IWN_DEBUG_RECV, "%s: RX flags error %x\n",
3009 counter_u64_add(ic->ic_ierrors, 1);
3012 /* Discard frames that are too short. */
3013 if (len < sizeof (struct ieee80211_frame_ack)) {
3014 DPRINTF(sc, IWN_DEBUG_RECV, "%s: frame too short: %d\n",
3016 counter_u64_add(ic->ic_ierrors, 1);
3020 m1 = m_getjcl(M_NOWAIT, MT_DATA, M_PKTHDR, IWN_RBUF_SIZE);
3022 DPRINTF(sc, IWN_DEBUG_ANY, "%s: no mbuf to restock ring\n",
3024 counter_u64_add(ic->ic_ierrors, 1);
3027 bus_dmamap_unload(ring->data_dmat, data->map);
3029 error = bus_dmamap_load(ring->data_dmat, data->map, mtod(m1, void *),
3030 IWN_RBUF_SIZE, iwn_dma_map_addr, &paddr, BUS_DMA_NOWAIT);
3031 if (error != 0 && error != EFBIG) {
3032 device_printf(sc->sc_dev,
3033 "%s: bus_dmamap_load failed, error %d\n", __func__, error);
3036 /* Try to reload the old mbuf. */
3037 error = bus_dmamap_load(ring->data_dmat, data->map,
3038 mtod(data->m, void *), IWN_RBUF_SIZE, iwn_dma_map_addr,
3039 &paddr, BUS_DMA_NOWAIT);
3040 if (error != 0 && error != EFBIG) {
3041 panic("%s: could not load old RX mbuf", __func__);
3043 /* Physical address may have changed. */
3044 ring->desc[ring->cur] = htole32(paddr >> 8);
3045 bus_dmamap_sync(ring->data_dmat, ring->desc_dma.map,
3046 BUS_DMASYNC_PREWRITE);
3047 counter_u64_add(ic->ic_ierrors, 1);
3053 /* Update RX descriptor. */
3054 ring->desc[ring->cur] = htole32(paddr >> 8);
3055 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
3056 BUS_DMASYNC_PREWRITE);
3058 /* Finalize mbuf. */
3060 m->m_pkthdr.len = m->m_len = len;
3062 /* Grab a reference to the source node. */
3063 wh = mtod(m, struct ieee80211_frame *);
3064 if (len >= sizeof(struct ieee80211_frame_min))
3065 ni = ieee80211_find_rxnode(ic, (struct ieee80211_frame_min *)wh);
3068 nf = (ni != NULL && ni->ni_vap->iv_state == IEEE80211_S_RUN &&
3069 (ic->ic_flags & IEEE80211_F_SCAN) == 0) ? sc->noise : -95;
3071 rssi = ops->get_rssi(sc, stat);
3073 if (ieee80211_radiotap_active(ic)) {
3074 struct iwn_rx_radiotap_header *tap = &sc->sc_rxtap;
3077 if (stat->flags & htole16(IWN_STAT_FLAG_SHPREAMBLE))
3078 tap->wr_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
3079 tap->wr_dbm_antsignal = (int8_t)rssi;
3080 tap->wr_dbm_antnoise = (int8_t)nf;
3081 tap->wr_tsft = stat->tstamp;
3082 switch (stat->rate) {
3084 case 10: tap->wr_rate = 2; break;
3085 case 20: tap->wr_rate = 4; break;
3086 case 55: tap->wr_rate = 11; break;
3087 case 110: tap->wr_rate = 22; break;
3089 case 0xd: tap->wr_rate = 12; break;
3090 case 0xf: tap->wr_rate = 18; break;
3091 case 0x5: tap->wr_rate = 24; break;
3092 case 0x7: tap->wr_rate = 36; break;
3093 case 0x9: tap->wr_rate = 48; break;
3094 case 0xb: tap->wr_rate = 72; break;
3095 case 0x1: tap->wr_rate = 96; break;
3096 case 0x3: tap->wr_rate = 108; break;
3097 /* Unknown rate: should not happen. */
3098 default: tap->wr_rate = 0;
3103 * If it's a beacon and we're waiting, then do the
3104 * wakeup. This should unblock raw_xmit/start.
3106 if (sc->sc_beacon_wait) {
3107 uint8_t type, subtype;
3108 /* NB: Re-assign wh */
3109 wh = mtod(m, struct ieee80211_frame *);
3110 type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK;
3111 subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
3113 * This assumes at this point we've received our own
3116 DPRINTF(sc, IWN_DEBUG_TRACE,
3117 "%s: beacon_wait, type=%d, subtype=%d\n",
3118 __func__, type, subtype);
3119 if (type == IEEE80211_FC0_TYPE_MGT &&
3120 subtype == IEEE80211_FC0_SUBTYPE_BEACON) {
3121 DPRINTF(sc, IWN_DEBUG_TRACE | IWN_DEBUG_XMIT,
3122 "%s: waking things up\n", __func__);
3123 /* queue taskqueue to transmit! */
3124 taskqueue_enqueue(sc->sc_tq, &sc->sc_xmit_task);
3130 /* Send the frame to the 802.11 layer. */
3132 if (ni->ni_flags & IEEE80211_NODE_HT)
3133 m->m_flags |= M_AMPDU;
3134 (void)ieee80211_input(ni, m, rssi - nf, nf);
3135 /* Node is no longer needed. */
3136 ieee80211_free_node(ni);
3138 (void)ieee80211_input_all(ic, m, rssi - nf, nf);
3142 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
3146 /* Process an incoming Compressed BlockAck. */
3148 iwn_rx_compressed_ba(struct iwn_softc *sc, struct iwn_rx_desc *desc,
3149 struct iwn_rx_data *data)
3151 struct ieee80211_ratectl_tx_status *txs = &sc->sc_txs;
3152 struct iwn_ops *ops = &sc->ops;
3153 struct iwn_node *wn;
3154 struct ieee80211_node *ni;
3155 struct iwn_compressed_ba *ba = (struct iwn_compressed_ba *)(desc + 1);
3156 struct iwn_tx_ring *txq;
3157 struct iwn_tx_data *txdata;
3158 struct ieee80211_tx_ampdu *tap;
3163 int i, lastidx, qid, *res, shift;
3164 int tx_ok = 0, tx_err = 0;
3166 DPRINTF(sc, IWN_DEBUG_TRACE | IWN_DEBUG_XMIT, "->%s begin\n", __func__);
3168 bus_dmamap_sync(sc->rxq.data_dmat, data->map, BUS_DMASYNC_POSTREAD);
3170 qid = le16toh(ba->qid);
3171 txq = &sc->txq[ba->qid];
3172 tap = sc->qid2tap[ba->qid];
3174 wn = (void *)tap->txa_ni;
3178 if (!IEEE80211_AMPDU_RUNNING(tap)) {
3179 res = tap->txa_private;
3180 ssn = tap->txa_start & 0xfff;
3183 for (lastidx = le16toh(ba->ssn) & 0xff; txq->read != lastidx;) {
3184 txdata = &txq->data[txq->read];
3186 /* Unmap and free mbuf. */
3187 bus_dmamap_sync(txq->data_dmat, txdata->map,
3188 BUS_DMASYNC_POSTWRITE);
3189 bus_dmamap_unload(txq->data_dmat, txdata->map);
3190 m = txdata->m, txdata->m = NULL;
3191 ni = txdata->ni, txdata->ni = NULL;
3193 KASSERT(ni != NULL, ("no node"));
3194 KASSERT(m != NULL, ("no mbuf"));
3196 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: freeing m=%p\n", __func__, m);
3197 ieee80211_tx_complete(ni, m, 1);
3200 txq->read = (txq->read + 1) % IWN_TX_RING_COUNT;
3203 if (txq->queued == 0 && res != NULL) {
3205 ops->ampdu_tx_stop(sc, qid, tid, ssn);
3207 sc->qid2tap[qid] = NULL;
3208 free(res, M_DEVBUF);
3212 if (wn->agg[tid].bitmap == 0)
3215 shift = wn->agg[tid].startidx - ((le16toh(ba->seq) >> 4) & 0xff);
3219 if (wn->agg[tid].nframes > (64 - shift))
3223 * Walk the bitmap and calculate how many successful and failed
3224 * attempts are made.
3226 * Yes, the rate control code doesn't know these are A-MPDU
3227 * subframes and that it's okay to fail some of these.
3230 bitmap = (le64toh(ba->bitmap) >> shift) & wn->agg[tid].bitmap;
3231 for (i = 0; bitmap; i++) {
3232 txs->flags = 0; /* XXX TODO */
3233 if ((bitmap & 1) == 0) {
3235 txs->status = IEEE80211_RATECTL_TX_FAIL_UNSPECIFIED;
3238 txs->status = IEEE80211_RATECTL_TX_SUCCESS;
3240 ieee80211_ratectl_tx_complete(ni, txs);
3244 DPRINTF(sc, IWN_DEBUG_TRACE | IWN_DEBUG_XMIT,
3245 "->%s: end; %d ok; %d err\n",__func__, tx_ok, tx_err);
3250 * Process a CALIBRATION_RESULT notification sent by the initialization
3251 * firmware on response to a CMD_CALIB_CONFIG command (5000 only).
3254 iwn5000_rx_calib_results(struct iwn_softc *sc, struct iwn_rx_desc *desc,
3255 struct iwn_rx_data *data)
3257 struct iwn_phy_calib *calib = (struct iwn_phy_calib *)(desc + 1);
3260 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
3262 /* Runtime firmware should not send such a notification. */
3263 if (sc->sc_flags & IWN_FLAG_CALIB_DONE){
3264 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s received after clib done\n",
3268 len = (le32toh(desc->len) & 0x3fff) - 4;
3269 bus_dmamap_sync(sc->rxq.data_dmat, data->map, BUS_DMASYNC_POSTREAD);
3271 switch (calib->code) {
3272 case IWN5000_PHY_CALIB_DC:
3273 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_DC)
3276 case IWN5000_PHY_CALIB_LO:
3277 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_LO)
3280 case IWN5000_PHY_CALIB_TX_IQ:
3281 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TX_IQ)
3284 case IWN5000_PHY_CALIB_TX_IQ_PERIODIC:
3285 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TX_IQ_PERIODIC)
3288 case IWN5000_PHY_CALIB_BASE_BAND:
3289 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_BASE_BAND)
3293 if (idx == -1) /* Ignore other results. */
3296 /* Save calibration result. */
3297 if (sc->calibcmd[idx].buf != NULL)
3298 free(sc->calibcmd[idx].buf, M_DEVBUF);
3299 sc->calibcmd[idx].buf = malloc(len, M_DEVBUF, M_NOWAIT);
3300 if (sc->calibcmd[idx].buf == NULL) {
3301 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
3302 "not enough memory for calibration result %d\n",
3306 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
3307 "saving calibration result idx=%d, code=%d len=%d\n", idx, calib->code, len);
3308 sc->calibcmd[idx].len = len;
3309 memcpy(sc->calibcmd[idx].buf, calib, len);
3313 iwn_stats_update(struct iwn_softc *sc, struct iwn_calib_state *calib,
3314 struct iwn_stats *stats, int len)
3316 struct iwn_stats_bt *stats_bt;
3317 struct iwn_stats *lstats;
3320 * First - check whether the length is the bluetooth or normal.
3322 * If it's normal - just copy it and bump out.
3323 * Otherwise we have to convert things.
3326 if (len == sizeof(struct iwn_stats) + 4) {
3327 memcpy(&sc->last_stat, stats, sizeof(struct iwn_stats));
3328 sc->last_stat_valid = 1;
3333 * If it's not the bluetooth size - log, then just copy.
3335 if (len != sizeof(struct iwn_stats_bt) + 4) {
3336 DPRINTF(sc, IWN_DEBUG_STATS,
3337 "%s: size of rx statistics (%d) not an expected size!\n",
3340 memcpy(&sc->last_stat, stats, sizeof(struct iwn_stats));
3341 sc->last_stat_valid = 1;
3348 stats_bt = (struct iwn_stats_bt *) stats;
3349 lstats = &sc->last_stat;
3352 lstats->flags = stats_bt->flags;
3354 memcpy(&lstats->rx.ofdm, &stats_bt->rx_bt.ofdm,
3355 sizeof(struct iwn_rx_phy_stats));
3356 memcpy(&lstats->rx.cck, &stats_bt->rx_bt.cck,
3357 sizeof(struct iwn_rx_phy_stats));
3358 memcpy(&lstats->rx.general, &stats_bt->rx_bt.general_bt.common,
3359 sizeof(struct iwn_rx_general_stats));
3360 memcpy(&lstats->rx.ht, &stats_bt->rx_bt.ht,
3361 sizeof(struct iwn_rx_ht_phy_stats));
3363 memcpy(&lstats->tx, &stats_bt->tx,
3364 sizeof(struct iwn_tx_stats));
3366 memcpy(&lstats->general, &stats_bt->general,
3367 sizeof(struct iwn_general_stats));
3369 /* XXX TODO: Squirrel away the extra bluetooth stats somewhere */
3370 sc->last_stat_valid = 1;
3374 * Process an RX_STATISTICS or BEACON_STATISTICS firmware notification.
3375 * The latter is sent by the firmware after each received beacon.
3378 iwn_rx_statistics(struct iwn_softc *sc, struct iwn_rx_desc *desc,
3379 struct iwn_rx_data *data)
3381 struct iwn_ops *ops = &sc->ops;
3382 struct ieee80211com *ic = &sc->sc_ic;
3383 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
3384 struct iwn_calib_state *calib = &sc->calib;
3385 struct iwn_stats *stats = (struct iwn_stats *)(desc + 1);
3386 struct iwn_stats *lstats;
3389 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
3391 /* Ignore statistics received during a scan. */
3392 if (vap->iv_state != IEEE80211_S_RUN ||
3393 (ic->ic_flags & IEEE80211_F_SCAN)){
3394 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s received during calib\n",
3399 bus_dmamap_sync(sc->rxq.data_dmat, data->map, BUS_DMASYNC_POSTREAD);
3401 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_STATS,
3402 "%s: received statistics, cmd %d, len %d\n",
3403 __func__, desc->type, le16toh(desc->len));
3404 sc->calib_cnt = 0; /* Reset TX power calibration timeout. */
3407 * Collect/track general statistics for reporting.
3409 * This takes care of ensuring that the bluetooth sized message
3410 * will be correctly converted to the legacy sized message.
3412 iwn_stats_update(sc, calib, stats, le16toh(desc->len));
3415 * And now, let's take a reference of it to use!
3417 lstats = &sc->last_stat;
3419 /* Test if temperature has changed. */
3420 if (lstats->general.temp != sc->rawtemp) {
3421 /* Convert "raw" temperature to degC. */
3422 sc->rawtemp = stats->general.temp;
3423 temp = ops->get_temperature(sc);
3424 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: temperature %d\n",
3427 /* Update TX power if need be (4965AGN only). */
3428 if (sc->hw_type == IWN_HW_REV_TYPE_4965)
3429 iwn4965_power_calibration(sc, temp);
3432 if (desc->type != IWN_BEACON_STATISTICS)
3433 return; /* Reply to a statistics request. */
3435 sc->noise = iwn_get_noise(&lstats->rx.general);
3436 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: noise %d\n", __func__, sc->noise);
3438 /* Test that RSSI and noise are present in stats report. */
3439 if (le32toh(lstats->rx.general.flags) != 1) {
3440 DPRINTF(sc, IWN_DEBUG_ANY, "%s\n",
3441 "received statistics without RSSI");
3445 if (calib->state == IWN_CALIB_STATE_ASSOC)
3446 iwn_collect_noise(sc, &lstats->rx.general);
3447 else if (calib->state == IWN_CALIB_STATE_RUN) {
3448 iwn_tune_sensitivity(sc, &lstats->rx);
3450 * XXX TODO: Only run the RX recovery if we're associated!
3452 iwn_check_rx_recovery(sc, lstats);
3453 iwn_save_stats_counters(sc, lstats);
3456 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
3460 * Save the relevant statistic counters for the next calibration
3464 iwn_save_stats_counters(struct iwn_softc *sc, const struct iwn_stats *rs)
3466 struct iwn_calib_state *calib = &sc->calib;
3468 /* Save counters values for next call. */
3469 calib->bad_plcp_cck = le32toh(rs->rx.cck.bad_plcp);
3470 calib->fa_cck = le32toh(rs->rx.cck.fa);
3471 calib->bad_plcp_ht = le32toh(rs->rx.ht.bad_plcp);
3472 calib->bad_plcp_ofdm = le32toh(rs->rx.ofdm.bad_plcp);
3473 calib->fa_ofdm = le32toh(rs->rx.ofdm.fa);
3475 /* Last time we received these tick values */
3476 sc->last_calib_ticks = ticks;
3480 * Process a TX_DONE firmware notification. Unfortunately, the 4965AGN
3481 * and 5000 adapters have different incompatible TX status formats.
3484 iwn4965_tx_done(struct iwn_softc *sc, struct iwn_rx_desc *desc,
3485 struct iwn_rx_data *data)
3487 struct iwn4965_tx_stat *stat = (struct iwn4965_tx_stat *)(desc + 1);
3488 struct iwn_tx_ring *ring;
3491 qid = desc->qid & 0xf;
3492 ring = &sc->txq[qid];
3494 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: "
3495 "qid %d idx %d RTS retries %d ACK retries %d nkill %d rate %x duration %d status %x\n",
3496 __func__, desc->qid, desc->idx,
3500 stat->rate, le16toh(stat->duration),
3501 le32toh(stat->status));
3503 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_POSTREAD);
3504 if (qid >= sc->firstaggqueue) {
3505 iwn_ampdu_tx_done(sc, qid, desc->idx, stat->nframes,
3506 stat->rtsfailcnt, stat->ackfailcnt, &stat->status);
3508 iwn_tx_done(sc, desc, stat->rtsfailcnt, stat->ackfailcnt,
3509 le32toh(stat->status) & 0xff);
3514 iwn5000_tx_done(struct iwn_softc *sc, struct iwn_rx_desc *desc,
3515 struct iwn_rx_data *data)
3517 struct iwn5000_tx_stat *stat = (struct iwn5000_tx_stat *)(desc + 1);
3518 struct iwn_tx_ring *ring;
3521 qid = desc->qid & 0xf;
3522 ring = &sc->txq[qid];
3524 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: "
3525 "qid %d idx %d RTS retries %d ACK retries %d nkill %d rate %x duration %d status %x\n",
3526 __func__, desc->qid, desc->idx,
3530 stat->rate, le16toh(stat->duration),
3531 le32toh(stat->status));
3534 /* Reset TX scheduler slot. */
3535 iwn5000_reset_sched(sc, desc->qid & 0xf, desc->idx);
3538 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_POSTREAD);
3539 if (qid >= sc->firstaggqueue) {
3540 iwn_ampdu_tx_done(sc, qid, desc->idx, stat->nframes,
3541 stat->rtsfailcnt, stat->ackfailcnt, &stat->status);
3543 iwn_tx_done(sc, desc, stat->rtsfailcnt, stat->ackfailcnt,
3544 le16toh(stat->status) & 0xff);
3549 * Adapter-independent backend for TX_DONE firmware notifications.
3552 iwn_tx_done(struct iwn_softc *sc, struct iwn_rx_desc *desc, int rtsfailcnt,
3553 int ackfailcnt, uint8_t status)
3555 struct ieee80211_ratectl_tx_status *txs = &sc->sc_txs;
3556 struct iwn_tx_ring *ring = &sc->txq[desc->qid & 0xf];
3557 struct iwn_tx_data *data = &ring->data[desc->idx];
3559 struct ieee80211_node *ni;
3561 KASSERT(data->ni != NULL, ("no node"));
3563 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
3565 /* Unmap and free mbuf. */
3566 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_POSTWRITE);
3567 bus_dmamap_unload(ring->data_dmat, data->map);
3568 m = data->m, data->m = NULL;
3569 ni = data->ni, data->ni = NULL;
3572 * Update rate control statistics for the node.
3574 txs->flags = IEEE80211_RATECTL_STATUS_SHORT_RETRY |
3575 IEEE80211_RATECTL_STATUS_LONG_RETRY;
3576 txs->short_retries = rtsfailcnt;
3577 txs->long_retries = ackfailcnt;
3578 if (!(status & IWN_TX_FAIL))
3579 txs->status = IEEE80211_RATECTL_TX_SUCCESS;
3582 case IWN_TX_FAIL_SHORT_LIMIT:
3583 txs->status = IEEE80211_RATECTL_TX_FAIL_SHORT;
3585 case IWN_TX_FAIL_LONG_LIMIT:
3586 txs->status = IEEE80211_RATECTL_TX_FAIL_LONG;
3588 case IWN_TX_STATUS_FAIL_LIFE_EXPIRE:
3589 txs->status = IEEE80211_RATECTL_TX_FAIL_EXPIRED;
3592 txs->status = IEEE80211_RATECTL_TX_FAIL_UNSPECIFIED;
3596 ieee80211_ratectl_tx_complete(ni, txs);
3599 * Channels marked for "radar" require traffic to be received
3600 * to unlock before we can transmit. Until traffic is seen
3601 * any attempt to transmit is returned immediately with status
3602 * set to IWN_TX_FAIL_TX_LOCKED. Unfortunately this can easily
3603 * happen on first authenticate after scanning. To workaround
3604 * this we ignore a failure of this sort in AUTH state so the
3605 * 802.11 layer will fall back to using a timeout to wait for
3606 * the AUTH reply. This allows the firmware time to see
3607 * traffic so a subsequent retry of AUTH succeeds. It's
3608 * unclear why the firmware does not maintain state for
3609 * channels recently visited as this would allow immediate
3610 * use of the channel after a scan (where we see traffic).
3612 if (status == IWN_TX_FAIL_TX_LOCKED &&
3613 ni->ni_vap->iv_state == IEEE80211_S_AUTH)
3614 ieee80211_tx_complete(ni, m, 0);
3616 ieee80211_tx_complete(ni, m,
3617 (status & IWN_TX_FAIL) != 0);
3619 sc->sc_tx_timer = 0;
3620 if (--ring->queued < IWN_TX_RING_LOMARK)
3621 sc->qfullmsk &= ~(1 << ring->qid);
3623 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
3627 * Process a "command done" firmware notification. This is where we wakeup
3628 * processes waiting for a synchronous command completion.
3631 iwn_cmd_done(struct iwn_softc *sc, struct iwn_rx_desc *desc)
3633 struct iwn_tx_ring *ring;
3634 struct iwn_tx_data *data;
3637 if (sc->sc_flags & IWN_FLAG_PAN_SUPPORT)
3638 cmd_queue_num = IWN_PAN_CMD_QUEUE;
3640 cmd_queue_num = IWN_CMD_QUEUE_NUM;
3642 if ((desc->qid & IWN_RX_DESC_QID_MSK) != cmd_queue_num)
3643 return; /* Not a command ack. */
3645 ring = &sc->txq[cmd_queue_num];
3646 data = &ring->data[desc->idx];
3648 /* If the command was mapped in an mbuf, free it. */
3649 if (data->m != NULL) {
3650 bus_dmamap_sync(ring->data_dmat, data->map,
3651 BUS_DMASYNC_POSTWRITE);
3652 bus_dmamap_unload(ring->data_dmat, data->map);
3656 wakeup(&ring->desc[desc->idx]);
3660 iwn_ampdu_tx_done(struct iwn_softc *sc, int qid, int idx, int nframes,
3661 int rtsfailcnt, int ackfailcnt, void *stat)
3663 struct iwn_ops *ops = &sc->ops;
3664 struct iwn_tx_ring *ring = &sc->txq[qid];
3665 struct ieee80211_ratectl_tx_status *txs = &sc->sc_txs;
3666 struct iwn_tx_data *data;
3668 struct iwn_node *wn;
3669 struct ieee80211_node *ni;
3670 struct ieee80211_tx_ampdu *tap;
3672 uint32_t *status = stat;
3673 uint16_t *aggstatus = stat;
3676 int bit, i, lastidx, *res, seqno, shift, start;
3678 /* XXX TODO: status is le16 field! Grr */
3680 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
3681 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: nframes=%d, status=0x%08x\n",
3686 tap = sc->qid2tap[qid];
3688 wn = (void *)tap->txa_ni;
3692 * XXX TODO: ACK and RTS failures would be nice here!
3696 * A-MPDU single frame status - if we failed to transmit it
3697 * in A-MPDU, then it may be a permanent failure.
3699 * XXX TODO: check what the Linux iwlwifi driver does here;
3700 * there's some permanent and temporary failures that may be
3701 * handled differently.
3704 txs->flags = IEEE80211_RATECTL_STATUS_SHORT_RETRY |
3705 IEEE80211_RATECTL_STATUS_LONG_RETRY;
3706 txs->short_retries = rtsfailcnt;
3707 txs->long_retries = ackfailcnt;
3708 if ((*status & 0xff) != 1 && (*status & 0xff) != 2) {
3710 printf("ieee80211_send_bar()\n");
3713 * If we completely fail a transmit, make sure a
3714 * notification is pushed up to the rate control
3718 txs->status = IEEE80211_RATECTL_TX_FAIL_UNSPECIFIED;
3721 * If nframes=1, then we won't be getting a BA for
3722 * this frame. Ensure that we correctly update the
3723 * rate control code with how many retries were
3724 * needed to send it.
3726 txs->status = IEEE80211_RATECTL_TX_SUCCESS;
3728 ieee80211_ratectl_tx_complete(ni, txs);
3733 for (i = 0; i < nframes; i++) {
3734 if (le16toh(aggstatus[i * 2]) & 0xc)
3737 idx = le16toh(aggstatus[2*i + 1]) & 0xff;
3741 shift = 0x100 - idx + start;
3744 } else if (bit <= -64)
3745 bit = 0x100 - start + idx;
3747 shift = start - idx;
3751 bitmap = bitmap << shift;
3752 bitmap |= 1ULL << bit;
3754 tap = sc->qid2tap[qid];
3756 wn = (void *)tap->txa_ni;
3757 wn->agg[tid].bitmap = bitmap;
3758 wn->agg[tid].startidx = start;
3759 wn->agg[tid].nframes = nframes;
3763 if (!IEEE80211_AMPDU_RUNNING(tap)) {
3764 res = tap->txa_private;
3765 ssn = tap->txa_start & 0xfff;
3768 /* This is going nframes DWORDS into the descriptor? */
3769 seqno = le32toh(*(status + nframes)) & 0xfff;
3770 for (lastidx = (seqno & 0xff); ring->read != lastidx;) {
3771 data = &ring->data[ring->read];
3773 /* Unmap and free mbuf. */
3774 bus_dmamap_sync(ring->data_dmat, data->map,
3775 BUS_DMASYNC_POSTWRITE);
3776 bus_dmamap_unload(ring->data_dmat, data->map);
3777 m = data->m, data->m = NULL;
3778 ni = data->ni, data->ni = NULL;
3780 KASSERT(ni != NULL, ("no node"));
3781 KASSERT(m != NULL, ("no mbuf"));
3782 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: freeing m=%p\n", __func__, m);
3783 ieee80211_tx_complete(ni, m, 1);
3786 ring->read = (ring->read + 1) % IWN_TX_RING_COUNT;
3789 if (ring->queued == 0 && res != NULL) {
3791 ops->ampdu_tx_stop(sc, qid, tid, ssn);
3793 sc->qid2tap[qid] = NULL;
3794 free(res, M_DEVBUF);
3798 sc->sc_tx_timer = 0;
3799 if (ring->queued < IWN_TX_RING_LOMARK)
3800 sc->qfullmsk &= ~(1 << ring->qid);
3802 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
3806 * Process an INT_FH_RX or INT_SW_RX interrupt.
3809 iwn_notif_intr(struct iwn_softc *sc)
3811 struct iwn_ops *ops = &sc->ops;
3812 struct ieee80211com *ic = &sc->sc_ic;
3813 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
3816 bus_dmamap_sync(sc->rxq.stat_dma.tag, sc->rxq.stat_dma.map,
3817 BUS_DMASYNC_POSTREAD);
3819 hw = le16toh(sc->rxq.stat->closed_count) & 0xfff;
3820 while (sc->rxq.cur != hw) {
3821 struct iwn_rx_data *data = &sc->rxq.data[sc->rxq.cur];
3822 struct iwn_rx_desc *desc;
3824 bus_dmamap_sync(sc->rxq.data_dmat, data->map,
3825 BUS_DMASYNC_POSTREAD);
3826 desc = mtod(data->m, struct iwn_rx_desc *);
3828 DPRINTF(sc, IWN_DEBUG_RECV,
3829 "%s: cur=%d; qid %x idx %d flags %x type %d(%s) len %d\n",
3830 __func__, sc->rxq.cur, desc->qid & 0xf, desc->idx, desc->flags,
3831 desc->type, iwn_intr_str(desc->type),
3832 le16toh(desc->len));
3834 if (!(desc->qid & IWN_UNSOLICITED_RX_NOTIF)) /* Reply to a command. */
3835 iwn_cmd_done(sc, desc);
3837 switch (desc->type) {
3839 iwn_rx_phy(sc, desc, data);
3842 case IWN_RX_DONE: /* 4965AGN only. */
3843 case IWN_MPDU_RX_DONE:
3844 /* An 802.11 frame has been received. */
3845 iwn_rx_done(sc, desc, data);
3848 case IWN_RX_COMPRESSED_BA:
3849 /* A Compressed BlockAck has been received. */
3850 iwn_rx_compressed_ba(sc, desc, data);
3854 /* An 802.11 frame has been transmitted. */
3855 ops->tx_done(sc, desc, data);
3858 case IWN_RX_STATISTICS:
3859 case IWN_BEACON_STATISTICS:
3860 iwn_rx_statistics(sc, desc, data);
3863 case IWN_BEACON_MISSED:
3865 struct iwn_beacon_missed *miss =
3866 (struct iwn_beacon_missed *)(desc + 1);
3869 bus_dmamap_sync(sc->rxq.data_dmat, data->map,
3870 BUS_DMASYNC_POSTREAD);
3871 misses = le32toh(miss->consecutive);
3873 DPRINTF(sc, IWN_DEBUG_STATE,
3874 "%s: beacons missed %d/%d\n", __func__,
3875 misses, le32toh(miss->total));
3877 * If more than 5 consecutive beacons are missed,
3878 * reinitialize the sensitivity state machine.
3880 if (vap->iv_state == IEEE80211_S_RUN &&
3881 (ic->ic_flags & IEEE80211_F_SCAN) == 0) {
3883 (void)iwn_init_sensitivity(sc);
3884 if (misses >= vap->iv_bmissthreshold) {
3886 ieee80211_beacon_miss(ic);
3894 struct iwn_ucode_info *uc =
3895 (struct iwn_ucode_info *)(desc + 1);
3897 /* The microcontroller is ready. */
3898 bus_dmamap_sync(sc->rxq.data_dmat, data->map,
3899 BUS_DMASYNC_POSTREAD);
3900 DPRINTF(sc, IWN_DEBUG_RESET,
3901 "microcode alive notification version=%d.%d "
3902 "subtype=%x alive=%x\n", uc->major, uc->minor,
3903 uc->subtype, le32toh(uc->valid));
3905 if (le32toh(uc->valid) != 1) {
3906 device_printf(sc->sc_dev,
3907 "microcontroller initialization failed");
3910 if (uc->subtype == IWN_UCODE_INIT) {
3911 /* Save microcontroller report. */
3912 memcpy(&sc->ucode_info, uc, sizeof (*uc));
3914 /* Save the address of the error log in SRAM. */
3915 sc->errptr = le32toh(uc->errptr);
3918 case IWN_STATE_CHANGED:
3921 * State change allows hardware switch change to be
3922 * noted. However, we handle this in iwn_intr as we
3923 * get both the enable/disble intr.
3925 bus_dmamap_sync(sc->rxq.data_dmat, data->map,
3926 BUS_DMASYNC_POSTREAD);
3928 uint32_t *status = (uint32_t *)(desc + 1);
3929 DPRINTF(sc, IWN_DEBUG_INTR | IWN_DEBUG_STATE,
3930 "state changed to %x\n",
3935 case IWN_START_SCAN:
3937 bus_dmamap_sync(sc->rxq.data_dmat, data->map,
3938 BUS_DMASYNC_POSTREAD);
3940 struct iwn_start_scan *scan =
3941 (struct iwn_start_scan *)(desc + 1);
3942 DPRINTF(sc, IWN_DEBUG_ANY,
3943 "%s: scanning channel %d status %x\n",
3944 __func__, scan->chan, le32toh(scan->status));
3950 bus_dmamap_sync(sc->rxq.data_dmat, data->map,
3951 BUS_DMASYNC_POSTREAD);
3953 struct iwn_stop_scan *scan =
3954 (struct iwn_stop_scan *)(desc + 1);
3955 DPRINTF(sc, IWN_DEBUG_STATE | IWN_DEBUG_SCAN,
3956 "scan finished nchan=%d status=%d chan=%d\n",
3957 scan->nchan, scan->status, scan->chan);
3959 sc->sc_is_scanning = 0;
3960 callout_stop(&sc->scan_timeout);
3962 ieee80211_scan_next(vap);
3966 case IWN5000_CALIBRATION_RESULT:
3967 iwn5000_rx_calib_results(sc, desc, data);
3970 case IWN5000_CALIBRATION_DONE:
3971 sc->sc_flags |= IWN_FLAG_CALIB_DONE;
3976 sc->rxq.cur = (sc->rxq.cur + 1) % IWN_RX_RING_COUNT;
3979 /* Tell the firmware what we have processed. */
3980 hw = (hw == 0) ? IWN_RX_RING_COUNT - 1 : hw - 1;
3981 IWN_WRITE(sc, IWN_FH_RX_WPTR, hw & ~7);
3985 * Process an INT_WAKEUP interrupt raised when the microcontroller wakes up
3986 * from power-down sleep mode.
3989 iwn_wakeup_intr(struct iwn_softc *sc)
3993 DPRINTF(sc, IWN_DEBUG_RESET, "%s: ucode wakeup from power-down sleep\n",
3996 /* Wakeup RX and TX rings. */
3997 IWN_WRITE(sc, IWN_FH_RX_WPTR, sc->rxq.cur & ~7);
3998 for (qid = 0; qid < sc->ntxqs; qid++) {
3999 struct iwn_tx_ring *ring = &sc->txq[qid];
4000 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | ring->cur);
4005 iwn_rftoggle_intr(struct iwn_softc *sc)
4007 struct ieee80211com *ic = &sc->sc_ic;
4008 uint32_t tmp = IWN_READ(sc, IWN_GP_CNTRL);
4010 IWN_LOCK_ASSERT(sc);
4012 device_printf(sc->sc_dev, "RF switch: radio %s\n",
4013 (tmp & IWN_GP_CNTRL_RFKILL) ? "enabled" : "disabled");
4014 if (tmp & IWN_GP_CNTRL_RFKILL)
4015 ieee80211_runtask(ic, &sc->sc_radioon_task);
4017 ieee80211_runtask(ic, &sc->sc_radiooff_task);
4021 * Dump the error log of the firmware when a firmware panic occurs. Although
4022 * we can't debug the firmware because it is neither open source nor free, it
4023 * can help us to identify certain classes of problems.
4026 iwn_fatal_intr(struct iwn_softc *sc)
4028 struct iwn_fw_dump dump;
4031 IWN_LOCK_ASSERT(sc);
4033 /* Force a complete recalibration on next init. */
4034 sc->sc_flags &= ~IWN_FLAG_CALIB_DONE;
4036 /* Check that the error log address is valid. */
4037 if (sc->errptr < IWN_FW_DATA_BASE ||
4038 sc->errptr + sizeof (dump) >
4039 IWN_FW_DATA_BASE + sc->fw_data_maxsz) {
4040 printf("%s: bad firmware error log address 0x%08x\n", __func__,
4044 if (iwn_nic_lock(sc) != 0) {
4045 printf("%s: could not read firmware error log\n", __func__);
4048 /* Read firmware error log from SRAM. */
4049 iwn_mem_read_region_4(sc, sc->errptr, (uint32_t *)&dump,
4050 sizeof (dump) / sizeof (uint32_t));
4053 if (dump.valid == 0) {
4054 printf("%s: firmware error log is empty\n", __func__);
4057 printf("firmware error log:\n");
4058 printf(" error type = \"%s\" (0x%08X)\n",
4059 (dump.id < nitems(iwn_fw_errmsg)) ?
4060 iwn_fw_errmsg[dump.id] : "UNKNOWN",
4062 printf(" program counter = 0x%08X\n", dump.pc);
4063 printf(" source line = 0x%08X\n", dump.src_line);
4064 printf(" error data = 0x%08X%08X\n",
4065 dump.error_data[0], dump.error_data[1]);
4066 printf(" branch link = 0x%08X%08X\n",
4067 dump.branch_link[0], dump.branch_link[1]);
4068 printf(" interrupt link = 0x%08X%08X\n",
4069 dump.interrupt_link[0], dump.interrupt_link[1]);
4070 printf(" time = %u\n", dump.time[0]);
4072 /* Dump driver status (TX and RX rings) while we're here. */
4073 printf("driver status:\n");
4074 for (i = 0; i < sc->ntxqs; i++) {
4075 struct iwn_tx_ring *ring = &sc->txq[i];
4076 printf(" tx ring %2d: qid=%-2d cur=%-3d queued=%-3d\n",
4077 i, ring->qid, ring->cur, ring->queued);
4079 printf(" rx ring: cur=%d\n", sc->rxq.cur);
4085 struct iwn_softc *sc = arg;
4086 uint32_t r1, r2, tmp;
4090 /* Disable interrupts. */
4091 IWN_WRITE(sc, IWN_INT_MASK, 0);
4093 /* Read interrupts from ICT (fast) or from registers (slow). */
4094 if (sc->sc_flags & IWN_FLAG_USE_ICT) {
4096 while (sc->ict[sc->ict_cur] != 0) {
4097 tmp |= sc->ict[sc->ict_cur];
4098 sc->ict[sc->ict_cur] = 0; /* Acknowledge. */
4099 sc->ict_cur = (sc->ict_cur + 1) % IWN_ICT_COUNT;
4102 if (tmp == 0xffffffff) /* Shouldn't happen. */
4104 else if (tmp & 0xc0000) /* Workaround a HW bug. */
4106 r1 = (tmp & 0xff00) << 16 | (tmp & 0xff);
4107 r2 = 0; /* Unused. */
4109 r1 = IWN_READ(sc, IWN_INT);
4110 if (r1 == 0xffffffff || (r1 & 0xfffffff0) == 0xa5a5a5a0) {
4112 return; /* Hardware gone! */
4114 r2 = IWN_READ(sc, IWN_FH_INT);
4117 DPRINTF(sc, IWN_DEBUG_INTR, "interrupt reg1=0x%08x reg2=0x%08x\n"
4120 if (r1 == 0 && r2 == 0)
4121 goto done; /* Interrupt not for us. */
4123 /* Acknowledge interrupts. */
4124 IWN_WRITE(sc, IWN_INT, r1);
4125 if (!(sc->sc_flags & IWN_FLAG_USE_ICT))
4126 IWN_WRITE(sc, IWN_FH_INT, r2);
4128 if (r1 & IWN_INT_RF_TOGGLED) {
4129 iwn_rftoggle_intr(sc);
4132 if (r1 & IWN_INT_CT_REACHED) {
4133 device_printf(sc->sc_dev, "%s: critical temperature reached!\n",
4136 if (r1 & (IWN_INT_SW_ERR | IWN_INT_HW_ERR)) {
4137 device_printf(sc->sc_dev, "%s: fatal firmware error\n",
4140 iwn_debug_register(sc);
4142 /* Dump firmware error log and stop. */
4145 taskqueue_enqueue(sc->sc_tq, &sc->sc_panic_task);
4148 if ((r1 & (IWN_INT_FH_RX | IWN_INT_SW_RX | IWN_INT_RX_PERIODIC)) ||
4149 (r2 & IWN_FH_INT_RX)) {
4150 if (sc->sc_flags & IWN_FLAG_USE_ICT) {
4151 if (r1 & (IWN_INT_FH_RX | IWN_INT_SW_RX))
4152 IWN_WRITE(sc, IWN_FH_INT, IWN_FH_INT_RX);
4153 IWN_WRITE_1(sc, IWN_INT_PERIODIC,
4154 IWN_INT_PERIODIC_DIS);
4156 if (r1 & (IWN_INT_FH_RX | IWN_INT_SW_RX)) {
4157 IWN_WRITE_1(sc, IWN_INT_PERIODIC,
4158 IWN_INT_PERIODIC_ENA);
4164 if ((r1 & IWN_INT_FH_TX) || (r2 & IWN_FH_INT_TX)) {
4165 if (sc->sc_flags & IWN_FLAG_USE_ICT)
4166 IWN_WRITE(sc, IWN_FH_INT, IWN_FH_INT_TX);
4167 wakeup(sc); /* FH DMA transfer completed. */
4170 if (r1 & IWN_INT_ALIVE)
4171 wakeup(sc); /* Firmware is alive. */
4173 if (r1 & IWN_INT_WAKEUP)
4174 iwn_wakeup_intr(sc);
4177 /* Re-enable interrupts. */
4178 if (sc->sc_flags & IWN_FLAG_RUNNING)
4179 IWN_WRITE(sc, IWN_INT_MASK, sc->int_mask);
4185 * Update TX scheduler ring when transmitting an 802.11 frame (4965AGN and
4186 * 5000 adapters use a slightly different format).
4189 iwn4965_update_sched(struct iwn_softc *sc, int qid, int idx, uint8_t id,
4192 uint16_t *w = &sc->sched[qid * IWN4965_SCHED_COUNT + idx];
4194 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
4196 *w = htole16(len + 8);
4197 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
4198 BUS_DMASYNC_PREWRITE);
4199 if (idx < IWN_SCHED_WINSZ) {
4200 *(w + IWN_TX_RING_COUNT) = *w;
4201 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
4202 BUS_DMASYNC_PREWRITE);
4207 iwn5000_update_sched(struct iwn_softc *sc, int qid, int idx, uint8_t id,
4210 uint16_t *w = &sc->sched[qid * IWN5000_SCHED_COUNT + idx];
4212 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
4214 *w = htole16(id << 12 | (len + 8));
4215 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
4216 BUS_DMASYNC_PREWRITE);
4217 if (idx < IWN_SCHED_WINSZ) {
4218 *(w + IWN_TX_RING_COUNT) = *w;
4219 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
4220 BUS_DMASYNC_PREWRITE);
4226 iwn5000_reset_sched(struct iwn_softc *sc, int qid, int idx)
4228 uint16_t *w = &sc->sched[qid * IWN5000_SCHED_COUNT + idx];
4230 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
4232 *w = (*w & htole16(0xf000)) | htole16(1);
4233 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
4234 BUS_DMASYNC_PREWRITE);
4235 if (idx < IWN_SCHED_WINSZ) {
4236 *(w + IWN_TX_RING_COUNT) = *w;
4237 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
4238 BUS_DMASYNC_PREWRITE);
4244 * Check whether OFDM 11g protection will be enabled for the given rate.
4246 * The original driver code only enabled protection for OFDM rates.
4247 * It didn't check to see whether it was operating in 11a or 11bg mode.
4250 iwn_check_rate_needs_protection(struct iwn_softc *sc,
4251 struct ieee80211vap *vap, uint8_t rate)
4253 struct ieee80211com *ic = vap->iv_ic;
4256 * Not in 2GHz mode? Then there's no need to enable OFDM
4259 if (! IEEE80211_IS_CHAN_2GHZ(ic->ic_curchan)) {
4264 * 11bg protection not enabled? Then don't use it.
4266 if ((ic->ic_flags & IEEE80211_F_USEPROT) == 0)
4270 * If it's an 11n rate - no protection.
4271 * We'll do it via a specific 11n check.
4273 if (rate & IEEE80211_RATE_MCS) {
4278 * Do a rate table lookup. If the PHY is CCK,
4279 * don't do protection.
4281 if (ieee80211_rate2phytype(ic->ic_rt, rate) == IEEE80211_T_CCK)
4285 * Yup, enable protection.
4291 * return a value between 0 and IWN_MAX_TX_RETRIES-1 as an index into
4292 * the link quality table that reflects this particular entry.
4295 iwn_tx_rate_to_linkq_offset(struct iwn_softc *sc, struct ieee80211_node *ni,
4298 struct ieee80211_rateset *rs;
4305 * Figure out if we're using 11n or not here.
4307 if (IEEE80211_IS_CHAN_HT(ni->ni_chan) && ni->ni_htrates.rs_nrates > 0)
4313 * Use the correct rate table.
4316 rs = (struct ieee80211_rateset *) &ni->ni_htrates;
4317 nr = ni->ni_htrates.rs_nrates;
4324 * Find the relevant link quality entry in the table.
4326 for (i = 0; i < nr && i < IWN_MAX_TX_RETRIES - 1 ; i++) {
4328 * The link quality table index starts at 0 == highest
4329 * rate, so we walk the rate table backwards.
4331 cmp_rate = rs->rs_rates[(nr - 1) - i];
4332 if (rate & IEEE80211_RATE_MCS)
4333 cmp_rate |= IEEE80211_RATE_MCS;
4336 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: idx %d: nr=%d, rate=0x%02x, rateentry=0x%02x\n",
4344 if (cmp_rate == rate)
4348 /* Failed? Start at the end */
4349 return (IWN_MAX_TX_RETRIES - 1);
4353 iwn_tx_data(struct iwn_softc *sc, struct mbuf *m, struct ieee80211_node *ni)
4355 struct iwn_ops *ops = &sc->ops;
4356 const struct ieee80211_txparam *tp;
4357 struct ieee80211vap *vap = ni->ni_vap;
4358 struct ieee80211com *ic = ni->ni_ic;
4359 struct iwn_node *wn = (void *)ni;
4360 struct iwn_tx_ring *ring;
4361 struct iwn_tx_desc *desc;
4362 struct iwn_tx_data *data;
4363 struct iwn_tx_cmd *cmd;
4364 struct iwn_cmd_data *tx;
4365 struct ieee80211_frame *wh;
4366 struct ieee80211_key *k = NULL;
4371 bus_dma_segment_t *seg, segs[IWN_MAX_SCATTER];
4373 int ac, i, totlen, error, pad, nsegs = 0, rate;
4375 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
4377 IWN_LOCK_ASSERT(sc);
4379 wh = mtod(m, struct ieee80211_frame *);
4380 hdrlen = ieee80211_anyhdrsize(wh);
4381 type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK;
4383 /* Select EDCA Access Category and TX ring for this frame. */
4384 if (IEEE80211_QOS_HAS_SEQ(wh)) {
4385 qos = ((const struct ieee80211_qosframe *)wh)->i_qos[0];
4386 tid = qos & IEEE80211_QOS_TID;
4391 ac = M_WME_GETAC(m);
4392 if (m->m_flags & M_AMPDU_MPDU) {
4394 struct ieee80211_tx_ampdu *tap = &ni->ni_tx_ampdu[ac];
4396 if (!IEEE80211_AMPDU_RUNNING(tap)) {
4401 * Queue this frame to the hardware ring that we've
4402 * negotiated AMPDU TX on.
4404 * Note that the sequence number must match the TX slot
4407 ac = *(int *)tap->txa_private;
4408 seqno = ni->ni_txseqs[tid];
4409 *(uint16_t *)wh->i_seq =
4410 htole16(seqno << IEEE80211_SEQ_SEQ_SHIFT);
4411 ring = &sc->txq[ac];
4412 if ((seqno % 256) != ring->cur) {
4413 device_printf(sc->sc_dev,
4414 "%s: m=%p: seqno (%d) (%d) != ring index (%d) !\n",
4421 ni->ni_txseqs[tid]++;
4423 ring = &sc->txq[ac];
4424 desc = &ring->desc[ring->cur];
4425 data = &ring->data[ring->cur];
4427 /* Choose a TX rate index. */
4428 tp = &vap->iv_txparms[ieee80211_chan2mode(ni->ni_chan)];
4429 if (type == IEEE80211_FC0_TYPE_MGT)
4430 rate = tp->mgmtrate;
4431 else if (IEEE80211_IS_MULTICAST(wh->i_addr1))
4432 rate = tp->mcastrate;
4433 else if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE)
4434 rate = tp->ucastrate;
4435 else if (m->m_flags & M_EAPOL)
4436 rate = tp->mgmtrate;
4438 /* XXX pass pktlen */
4439 (void) ieee80211_ratectl_rate(ni, NULL, 0);
4440 rate = ni->ni_txrate;
4443 /* Encrypt the frame if need be. */
4444 if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) {
4445 /* Retrieve key for TX. */
4446 k = ieee80211_crypto_encap(ni, m);
4450 /* 802.11 header may have moved. */
4451 wh = mtod(m, struct ieee80211_frame *);
4453 totlen = m->m_pkthdr.len;
4455 if (ieee80211_radiotap_active_vap(vap)) {
4456 struct iwn_tx_radiotap_header *tap = &sc->sc_txtap;
4459 tap->wt_rate = rate;
4461 tap->wt_flags |= IEEE80211_RADIOTAP_F_WEP;
4463 ieee80211_radiotap_tx(vap, m);
4466 /* Prepare TX firmware command. */
4467 cmd = &ring->cmd[ring->cur];
4468 cmd->code = IWN_CMD_TX_DATA;
4470 cmd->qid = ring->qid;
4471 cmd->idx = ring->cur;
4473 tx = (struct iwn_cmd_data *)cmd->data;
4474 /* NB: No need to clear tx, all fields are reinitialized here. */
4475 tx->scratch = 0; /* clear "scratch" area */
4478 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
4479 /* Unicast frame, check if an ACK is expected. */
4480 if (!qos || (qos & IEEE80211_QOS_ACKPOLICY) !=
4481 IEEE80211_QOS_ACKPOLICY_NOACK)
4482 flags |= IWN_TX_NEED_ACK;
4485 (IEEE80211_FC0_TYPE_MASK | IEEE80211_FC0_SUBTYPE_MASK)) ==
4486 (IEEE80211_FC0_TYPE_CTL | IEEE80211_FC0_SUBTYPE_BAR))
4487 flags |= IWN_TX_IMM_BA; /* Cannot happen yet. */
4489 if (wh->i_fc[1] & IEEE80211_FC1_MORE_FRAG)
4490 flags |= IWN_TX_MORE_FRAG; /* Cannot happen yet. */
4492 /* Check if frame must be protected using RTS/CTS or CTS-to-self. */
4493 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
4494 /* NB: Group frames are sent using CCK in 802.11b/g. */
4495 if (totlen + IEEE80211_CRC_LEN > vap->iv_rtsthreshold) {
4496 flags |= IWN_TX_NEED_RTS;
4497 } else if (iwn_check_rate_needs_protection(sc, vap, rate)) {
4498 if (ic->ic_protmode == IEEE80211_PROT_CTSONLY)
4499 flags |= IWN_TX_NEED_CTS;
4500 else if (ic->ic_protmode == IEEE80211_PROT_RTSCTS)
4501 flags |= IWN_TX_NEED_RTS;
4502 } else if ((rate & IEEE80211_RATE_MCS) &&
4503 (ic->ic_htprotmode == IEEE80211_PROT_RTSCTS)) {
4504 flags |= IWN_TX_NEED_RTS;
4507 /* XXX HT protection? */
4509 if (flags & (IWN_TX_NEED_RTS | IWN_TX_NEED_CTS)) {
4510 if (sc->hw_type != IWN_HW_REV_TYPE_4965) {
4511 /* 5000 autoselects RTS/CTS or CTS-to-self. */
4512 flags &= ~(IWN_TX_NEED_RTS | IWN_TX_NEED_CTS);
4513 flags |= IWN_TX_NEED_PROTECTION;
4515 flags |= IWN_TX_FULL_TXOP;
4519 if (IEEE80211_IS_MULTICAST(wh->i_addr1) ||
4520 type != IEEE80211_FC0_TYPE_DATA)
4521 tx->id = sc->broadcast_id;
4525 if (type == IEEE80211_FC0_TYPE_MGT) {
4526 uint8_t subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
4528 /* Tell HW to set timestamp in probe responses. */
4529 if (subtype == IEEE80211_FC0_SUBTYPE_PROBE_RESP)
4530 flags |= IWN_TX_INSERT_TSTAMP;
4531 if (subtype == IEEE80211_FC0_SUBTYPE_ASSOC_REQ ||
4532 subtype == IEEE80211_FC0_SUBTYPE_REASSOC_REQ)
4533 tx->timeout = htole16(3);
4535 tx->timeout = htole16(2);
4537 tx->timeout = htole16(0);
4540 /* First segment length must be a multiple of 4. */
4541 flags |= IWN_TX_NEED_PADDING;
4542 pad = 4 - (hdrlen & 3);
4546 tx->len = htole16(totlen);
4548 tx->rts_ntries = 60;
4549 tx->data_ntries = 15;
4550 tx->lifetime = htole32(IWN_LIFETIME_INFINITE);
4551 tx->rate = iwn_rate_to_plcp(sc, ni, rate);
4552 if (tx->id == sc->broadcast_id) {
4553 /* Group or management frame. */
4556 tx->linkq = iwn_tx_rate_to_linkq_offset(sc, ni, rate);
4557 flags |= IWN_TX_LINKQ; /* enable MRR */
4560 /* Set physical address of "scratch area". */
4561 tx->loaddr = htole32(IWN_LOADDR(data->scratch_paddr));
4562 tx->hiaddr = IWN_HIADDR(data->scratch_paddr);
4564 /* Copy 802.11 header in TX command. */
4565 memcpy((uint8_t *)(tx + 1), wh, hdrlen);
4567 /* Trim 802.11 header. */
4570 tx->flags = htole32(flags);
4572 error = bus_dmamap_load_mbuf_sg(ring->data_dmat, data->map, m, segs,
4573 &nsegs, BUS_DMA_NOWAIT);
4575 if (error != EFBIG) {
4576 device_printf(sc->sc_dev,
4577 "%s: can't map mbuf (error %d)\n", __func__, error);
4580 /* Too many DMA segments, linearize mbuf. */
4581 m1 = m_collapse(m, M_NOWAIT, IWN_MAX_SCATTER - 1);
4583 device_printf(sc->sc_dev,
4584 "%s: could not defrag mbuf\n", __func__);
4589 error = bus_dmamap_load_mbuf_sg(ring->data_dmat, data->map, m,
4590 segs, &nsegs, BUS_DMA_NOWAIT);
4592 device_printf(sc->sc_dev,
4593 "%s: can't map mbuf (error %d)\n", __func__, error);
4601 DPRINTF(sc, IWN_DEBUG_XMIT,
4602 "%s: qid %d idx %d len %d nsegs %d flags 0x%08x rate 0x%04x plcp 0x%08x\n",
4612 /* Fill TX descriptor. */
4615 desc->nsegs += nsegs;
4616 /* First DMA segment is used by the TX command. */
4617 desc->segs[0].addr = htole32(IWN_LOADDR(data->cmd_paddr));
4618 desc->segs[0].len = htole16(IWN_HIADDR(data->cmd_paddr) |
4619 (4 + sizeof (*tx) + hdrlen + pad) << 4);
4620 /* Other DMA segments are for data payload. */
4622 for (i = 1; i <= nsegs; i++) {
4623 desc->segs[i].addr = htole32(IWN_LOADDR(seg->ds_addr));
4624 desc->segs[i].len = htole16(IWN_HIADDR(seg->ds_addr) |
4629 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_PREWRITE);
4630 bus_dmamap_sync(ring->data_dmat, ring->cmd_dma.map,
4631 BUS_DMASYNC_PREWRITE);
4632 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
4633 BUS_DMASYNC_PREWRITE);
4635 /* Update TX scheduler. */
4636 if (ring->qid >= sc->firstaggqueue)
4637 ops->update_sched(sc, ring->qid, ring->cur, tx->id, totlen);
4640 ring->cur = (ring->cur + 1) % IWN_TX_RING_COUNT;
4641 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, ring->qid << 8 | ring->cur);
4643 /* Mark TX ring as full if we reach a certain threshold. */
4644 if (++ring->queued > IWN_TX_RING_HIMARK)
4645 sc->qfullmsk |= 1 << ring->qid;
4647 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
4653 iwn_tx_data_raw(struct iwn_softc *sc, struct mbuf *m,
4654 struct ieee80211_node *ni, const struct ieee80211_bpf_params *params)
4656 struct iwn_ops *ops = &sc->ops;
4657 struct ieee80211vap *vap = ni->ni_vap;
4658 struct iwn_tx_cmd *cmd;
4659 struct iwn_cmd_data *tx;
4660 struct ieee80211_frame *wh;
4661 struct iwn_tx_ring *ring;
4662 struct iwn_tx_desc *desc;
4663 struct iwn_tx_data *data;
4665 bus_dma_segment_t *seg, segs[IWN_MAX_SCATTER];
4668 int ac, totlen, error, pad, nsegs = 0, i, rate;
4671 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
4673 IWN_LOCK_ASSERT(sc);
4675 wh = mtod(m, struct ieee80211_frame *);
4676 hdrlen = ieee80211_anyhdrsize(wh);
4677 type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK;
4679 ac = params->ibp_pri & 3;
4681 ring = &sc->txq[ac];
4682 desc = &ring->desc[ring->cur];
4683 data = &ring->data[ring->cur];
4685 /* Choose a TX rate. */
4686 rate = params->ibp_rate0;
4687 totlen = m->m_pkthdr.len;
4689 /* Prepare TX firmware command. */
4690 cmd = &ring->cmd[ring->cur];
4691 cmd->code = IWN_CMD_TX_DATA;
4693 cmd->qid = ring->qid;
4694 cmd->idx = ring->cur;
4696 tx = (struct iwn_cmd_data *)cmd->data;
4697 /* NB: No need to clear tx, all fields are reinitialized here. */
4698 tx->scratch = 0; /* clear "scratch" area */
4701 if ((params->ibp_flags & IEEE80211_BPF_NOACK) == 0)
4702 flags |= IWN_TX_NEED_ACK;
4703 if (params->ibp_flags & IEEE80211_BPF_RTS) {
4704 if (sc->hw_type != IWN_HW_REV_TYPE_4965) {
4705 /* 5000 autoselects RTS/CTS or CTS-to-self. */
4706 flags &= ~IWN_TX_NEED_RTS;
4707 flags |= IWN_TX_NEED_PROTECTION;
4709 flags |= IWN_TX_NEED_RTS | IWN_TX_FULL_TXOP;
4711 if (params->ibp_flags & IEEE80211_BPF_CTS) {
4712 if (sc->hw_type != IWN_HW_REV_TYPE_4965) {
4713 /* 5000 autoselects RTS/CTS or CTS-to-self. */
4714 flags &= ~IWN_TX_NEED_CTS;
4715 flags |= IWN_TX_NEED_PROTECTION;
4717 flags |= IWN_TX_NEED_CTS | IWN_TX_FULL_TXOP;
4719 if (type == IEEE80211_FC0_TYPE_MGT) {
4720 uint8_t subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
4722 /* Tell HW to set timestamp in probe responses. */
4723 if (subtype == IEEE80211_FC0_SUBTYPE_PROBE_RESP)
4724 flags |= IWN_TX_INSERT_TSTAMP;
4726 if (subtype == IEEE80211_FC0_SUBTYPE_ASSOC_REQ ||
4727 subtype == IEEE80211_FC0_SUBTYPE_REASSOC_REQ)
4728 tx->timeout = htole16(3);
4730 tx->timeout = htole16(2);
4732 tx->timeout = htole16(0);
4735 /* First segment length must be a multiple of 4. */
4736 flags |= IWN_TX_NEED_PADDING;
4737 pad = 4 - (hdrlen & 3);
4741 if (ieee80211_radiotap_active_vap(vap)) {
4742 struct iwn_tx_radiotap_header *tap = &sc->sc_txtap;
4745 tap->wt_rate = rate;
4747 ieee80211_radiotap_tx(vap, m);
4750 tx->len = htole16(totlen);
4752 tx->id = sc->broadcast_id;
4753 tx->rts_ntries = params->ibp_try1;
4754 tx->data_ntries = params->ibp_try0;
4755 tx->lifetime = htole32(IWN_LIFETIME_INFINITE);
4756 tx->rate = iwn_rate_to_plcp(sc, ni, rate);
4758 /* Group or management frame. */
4761 /* Set physical address of "scratch area". */
4762 tx->loaddr = htole32(IWN_LOADDR(data->scratch_paddr));
4763 tx->hiaddr = IWN_HIADDR(data->scratch_paddr);
4765 /* Copy 802.11 header in TX command. */
4766 memcpy((uint8_t *)(tx + 1), wh, hdrlen);
4768 /* Trim 802.11 header. */
4771 tx->flags = htole32(flags);
4773 error = bus_dmamap_load_mbuf_sg(ring->data_dmat, data->map, m, segs,
4774 &nsegs, BUS_DMA_NOWAIT);
4776 if (error != EFBIG) {
4777 device_printf(sc->sc_dev,
4778 "%s: can't map mbuf (error %d)\n", __func__, error);
4781 /* Too many DMA segments, linearize mbuf. */
4782 m1 = m_collapse(m, M_NOWAIT, IWN_MAX_SCATTER - 1);
4784 device_printf(sc->sc_dev,
4785 "%s: could not defrag mbuf\n", __func__);
4790 error = bus_dmamap_load_mbuf_sg(ring->data_dmat, data->map, m,
4791 segs, &nsegs, BUS_DMA_NOWAIT);
4793 device_printf(sc->sc_dev,
4794 "%s: can't map mbuf (error %d)\n", __func__, error);
4802 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: qid %d idx %d len %d nsegs %d\n",
4803 __func__, ring->qid, ring->cur, m->m_pkthdr.len, nsegs);
4805 /* Fill TX descriptor. */
4808 desc->nsegs += nsegs;
4809 /* First DMA segment is used by the TX command. */
4810 desc->segs[0].addr = htole32(IWN_LOADDR(data->cmd_paddr));
4811 desc->segs[0].len = htole16(IWN_HIADDR(data->cmd_paddr) |
4812 (4 + sizeof (*tx) + hdrlen + pad) << 4);
4813 /* Other DMA segments are for data payload. */
4815 for (i = 1; i <= nsegs; i++) {
4816 desc->segs[i].addr = htole32(IWN_LOADDR(seg->ds_addr));
4817 desc->segs[i].len = htole16(IWN_HIADDR(seg->ds_addr) |
4822 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_PREWRITE);
4823 bus_dmamap_sync(ring->data_dmat, ring->cmd_dma.map,
4824 BUS_DMASYNC_PREWRITE);
4825 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
4826 BUS_DMASYNC_PREWRITE);
4828 /* Update TX scheduler. */
4829 if (ring->qid >= sc->firstaggqueue)
4830 ops->update_sched(sc, ring->qid, ring->cur, tx->id, totlen);
4833 ring->cur = (ring->cur + 1) % IWN_TX_RING_COUNT;
4834 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, ring->qid << 8 | ring->cur);
4836 /* Mark TX ring as full if we reach a certain threshold. */
4837 if (++ring->queued > IWN_TX_RING_HIMARK)
4838 sc->qfullmsk |= 1 << ring->qid;
4840 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
4846 iwn_xmit_task(void *arg0, int pending)
4848 struct iwn_softc *sc = arg0;
4849 struct ieee80211_node *ni;
4852 struct ieee80211_bpf_params p;
4855 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: called\n", __func__);
4859 * Dequeue frames, attempt to transmit,
4860 * then disable beaconwait when we're done.
4862 while ((m = mbufq_dequeue(&sc->sc_xmit_queue)) != NULL) {
4864 ni = (struct ieee80211_node *)m->m_pkthdr.rcvif;
4866 /* Get xmit params if appropriate */
4867 if (ieee80211_get_xmit_params(m, &p) == 0)
4870 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: m=%p, have_p=%d\n",
4871 __func__, m, have_p);
4873 /* If we have xmit params, use them */
4875 error = iwn_tx_data_raw(sc, m, ni, &p);
4877 error = iwn_tx_data(sc, m, ni);
4880 if_inc_counter(ni->ni_vap->iv_ifp,
4881 IFCOUNTER_OERRORS, 1);
4882 ieee80211_free_node(ni);
4887 sc->sc_beacon_wait = 0;
4892 * raw frame xmit - free node/reference if failed.
4895 iwn_raw_xmit(struct ieee80211_node *ni, struct mbuf *m,
4896 const struct ieee80211_bpf_params *params)
4898 struct ieee80211com *ic = ni->ni_ic;
4899 struct iwn_softc *sc = ic->ic_softc;
4902 DPRINTF(sc, IWN_DEBUG_XMIT | IWN_DEBUG_TRACE, "->%s begin\n", __func__);
4905 if ((sc->sc_flags & IWN_FLAG_RUNNING) == 0) {
4911 /* queue frame if we have to */
4912 if (sc->sc_beacon_wait) {
4913 if (iwn_xmit_queue_enqueue(sc, m) != 0) {
4918 /* Queued, so just return OK */
4923 if (params == NULL) {
4925 * Legacy path; interpret frame contents to decide
4926 * precisely how to send the frame.
4928 error = iwn_tx_data(sc, m, ni);
4931 * Caller supplied explicit parameters to use in
4932 * sending the frame.
4934 error = iwn_tx_data_raw(sc, m, ni, params);
4937 sc->sc_tx_timer = 5;
4943 DPRINTF(sc, IWN_DEBUG_TRACE | IWN_DEBUG_XMIT, "->%s: end\n",__func__);
4949 * transmit - don't free mbuf if failed; don't free node ref if failed.
4952 iwn_transmit(struct ieee80211com *ic, struct mbuf *m)
4954 struct iwn_softc *sc = ic->ic_softc;
4955 struct ieee80211_node *ni;
4958 ni = (struct ieee80211_node *)m->m_pkthdr.rcvif;
4961 if ((sc->sc_flags & IWN_FLAG_RUNNING) == 0 || sc->sc_beacon_wait) {
4971 error = iwn_tx_data(sc, m, ni);
4973 sc->sc_tx_timer = 5;
4979 iwn_scan_timeout(void *arg)
4981 struct iwn_softc *sc = arg;
4982 struct ieee80211com *ic = &sc->sc_ic;
4984 ic_printf(ic, "scan timeout\n");
4985 ieee80211_restart_all(ic);
4989 iwn_watchdog(void *arg)
4991 struct iwn_softc *sc = arg;
4992 struct ieee80211com *ic = &sc->sc_ic;
4994 IWN_LOCK_ASSERT(sc);
4996 KASSERT(sc->sc_flags & IWN_FLAG_RUNNING, ("not running"));
4998 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5000 if (sc->sc_tx_timer > 0) {
5001 if (--sc->sc_tx_timer == 0) {
5002 ic_printf(ic, "device timeout\n");
5003 ieee80211_restart_all(ic);
5007 callout_reset(&sc->watchdog_to, hz, iwn_watchdog, sc);
5011 iwn_cdev_open(struct cdev *dev, int flags, int type, struct thread *td)
5018 iwn_cdev_close(struct cdev *dev, int flags, int type, struct thread *td)
5025 iwn_cdev_ioctl(struct cdev *dev, unsigned long cmd, caddr_t data, int fflag,
5029 struct iwn_softc *sc = dev->si_drv1;
5030 struct iwn_ioctl_data *d;
5032 rc = priv_check(td, PRIV_DRIVER);
5038 d = (struct iwn_ioctl_data *) data;
5040 /* XXX validate permissions/memory/etc? */
5041 rc = copyout(&sc->last_stat, d->dst_addr, sizeof(struct iwn_stats));
5046 memset(&sc->last_stat, 0, sizeof(struct iwn_stats));
5057 iwn_ioctl(struct ieee80211com *ic, u_long cmd, void *data)
5064 iwn_parent(struct ieee80211com *ic)
5066 struct iwn_softc *sc = ic->ic_softc;
5067 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
5068 int startall = 0, stop = 0;
5071 if (ic->ic_nrunning > 0) {
5072 if (!(sc->sc_flags & IWN_FLAG_RUNNING)) {
5073 iwn_init_locked(sc);
5074 if (IWN_READ(sc, IWN_GP_CNTRL) & IWN_GP_CNTRL_RFKILL)
5079 } else if (sc->sc_flags & IWN_FLAG_RUNNING)
5080 iwn_stop_locked(sc);
5083 ieee80211_start_all(ic);
5084 else if (vap != NULL && stop)
5085 ieee80211_stop(vap);
5089 * Send a command to the firmware.
5092 iwn_cmd(struct iwn_softc *sc, int code, const void *buf, int size, int async)
5094 struct iwn_tx_ring *ring;
5095 struct iwn_tx_desc *desc;
5096 struct iwn_tx_data *data;
5097 struct iwn_tx_cmd *cmd;
5103 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
5106 IWN_LOCK_ASSERT(sc);
5108 if (sc->sc_flags & IWN_FLAG_PAN_SUPPORT)
5109 cmd_queue_num = IWN_PAN_CMD_QUEUE;
5111 cmd_queue_num = IWN_CMD_QUEUE_NUM;
5113 ring = &sc->txq[cmd_queue_num];
5114 desc = &ring->desc[ring->cur];
5115 data = &ring->data[ring->cur];
5118 if (size > sizeof cmd->data) {
5119 /* Command is too large to fit in a descriptor. */
5120 if (totlen > MCLBYTES)
5122 m = m_getjcl(M_NOWAIT, MT_DATA, M_PKTHDR, MJUMPAGESIZE);
5125 cmd = mtod(m, struct iwn_tx_cmd *);
5126 error = bus_dmamap_load(ring->data_dmat, data->map, cmd,
5127 totlen, iwn_dma_map_addr, &paddr, BUS_DMA_NOWAIT);
5134 cmd = &ring->cmd[ring->cur];
5135 paddr = data->cmd_paddr;
5140 cmd->qid = ring->qid;
5141 cmd->idx = ring->cur;
5142 memcpy(cmd->data, buf, size);
5145 desc->segs[0].addr = htole32(IWN_LOADDR(paddr));
5146 desc->segs[0].len = htole16(IWN_HIADDR(paddr) | totlen << 4);
5148 DPRINTF(sc, IWN_DEBUG_CMD, "%s: %s (0x%x) flags %d qid %d idx %d\n",
5149 __func__, iwn_intr_str(cmd->code), cmd->code,
5150 cmd->flags, cmd->qid, cmd->idx);
5152 if (size > sizeof cmd->data) {
5153 bus_dmamap_sync(ring->data_dmat, data->map,
5154 BUS_DMASYNC_PREWRITE);
5156 bus_dmamap_sync(ring->data_dmat, ring->cmd_dma.map,
5157 BUS_DMASYNC_PREWRITE);
5159 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
5160 BUS_DMASYNC_PREWRITE);
5162 /* Kick command ring. */
5163 ring->cur = (ring->cur + 1) % IWN_TX_RING_COUNT;
5164 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, ring->qid << 8 | ring->cur);
5166 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
5168 return async ? 0 : msleep(desc, &sc->sc_mtx, PCATCH, "iwncmd", hz);
5172 iwn4965_add_node(struct iwn_softc *sc, struct iwn_node_info *node, int async)
5174 struct iwn4965_node_info hnode;
5177 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5180 * We use the node structure for 5000 Series internally (it is
5181 * a superset of the one for 4965AGN). We thus copy the common
5182 * fields before sending the command.
5184 src = (caddr_t)node;
5185 dst = (caddr_t)&hnode;
5186 memcpy(dst, src, 48);
5187 /* Skip TSC, RX MIC and TX MIC fields from ``src''. */
5188 memcpy(dst + 48, src + 72, 20);
5189 return iwn_cmd(sc, IWN_CMD_ADD_NODE, &hnode, sizeof hnode, async);
5193 iwn5000_add_node(struct iwn_softc *sc, struct iwn_node_info *node, int async)
5196 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5198 /* Direct mapping. */
5199 return iwn_cmd(sc, IWN_CMD_ADD_NODE, node, sizeof (*node), async);
5203 iwn_set_link_quality(struct iwn_softc *sc, struct ieee80211_node *ni)
5205 struct iwn_node *wn = (void *)ni;
5206 struct ieee80211_rateset *rs;
5207 struct iwn_cmd_link_quality linkq;
5208 int i, rate, txrate;
5211 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
5213 memset(&linkq, 0, sizeof linkq);
5215 linkq.antmsk_1stream = iwn_get_1stream_tx_antmask(sc);
5216 linkq.antmsk_2stream = iwn_get_2stream_tx_antmask(sc);
5218 linkq.ampdu_max = 32; /* XXX negotiated? */
5219 linkq.ampdu_threshold = 3;
5220 linkq.ampdu_limit = htole16(4000); /* 4ms */
5222 DPRINTF(sc, IWN_DEBUG_XMIT,
5223 "%s: 1stream antenna=0x%02x, 2stream antenna=0x%02x, ntxstreams=%d\n",
5225 linkq.antmsk_1stream,
5226 linkq.antmsk_2stream,
5230 * Are we using 11n rates? Ensure the channel is
5231 * 11n _and_ we have some 11n rates, or don't
5234 if (IEEE80211_IS_CHAN_HT(ni->ni_chan) && ni->ni_htrates.rs_nrates > 0) {
5235 rs = (struct ieee80211_rateset *) &ni->ni_htrates;
5242 /* Start at highest available bit-rate. */
5244 * XXX this is all very dirty!
5247 txrate = ni->ni_htrates.rs_nrates - 1;
5249 txrate = rs->rs_nrates - 1;
5250 for (i = 0; i < IWN_MAX_TX_RETRIES; i++) {
5254 * XXX TODO: ensure the last two slots are the two lowest
5255 * rate entries, just for now.
5257 if (i == 14 || i == 15)
5261 rate = IEEE80211_RATE_MCS | rs->rs_rates[txrate];
5263 rate = IEEE80211_RV(rs->rs_rates[txrate]);
5265 /* Do rate -> PLCP config mapping */
5266 plcp = iwn_rate_to_plcp(sc, ni, rate);
5267 linkq.retry[i] = plcp;
5268 DPRINTF(sc, IWN_DEBUG_XMIT,
5269 "%s: i=%d, txrate=%d, rate=0x%02x, plcp=0x%08x\n",
5277 * The mimo field is an index into the table which
5278 * indicates the first index where it and subsequent entries
5279 * will not be using MIMO.
5281 * Since we're filling linkq from 0..15 and we're filling
5282 * from the highest MCS rates to the lowest rates, if we
5283 * _are_ doing a dual-stream rate, set mimo to idx+1 (ie,
5284 * the next entry.) That way if the next entry is a non-MIMO
5285 * entry, we're already pointing at it.
5287 if ((le32toh(plcp) & IWN_RFLAG_MCS) &&
5288 IEEE80211_RV(le32toh(plcp)) > 7)
5291 /* Next retry at immediate lower bit-rate. */
5296 * If we reached the end of the list and indeed we hit
5297 * all MIMO rates (eg 5300 doing MCS23-15) then yes,
5298 * set mimo to 15. Setting it to 16 panics the firmware.
5300 if (linkq.mimo > 15)
5303 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: mimo = %d\n", __func__, linkq.mimo);
5305 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
5307 return iwn_cmd(sc, IWN_CMD_LINK_QUALITY, &linkq, sizeof linkq, 1);
5311 * Broadcast node is used to send group-addressed and management frames.
5314 iwn_add_broadcast_node(struct iwn_softc *sc, int async)
5316 struct iwn_ops *ops = &sc->ops;
5317 struct ieee80211com *ic = &sc->sc_ic;
5318 struct iwn_node_info node;
5319 struct iwn_cmd_link_quality linkq;
5323 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
5325 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX];
5327 memset(&node, 0, sizeof node);
5328 IEEE80211_ADDR_COPY(node.macaddr, ieee80211broadcastaddr);
5329 node.id = sc->broadcast_id;
5330 DPRINTF(sc, IWN_DEBUG_RESET, "%s: adding broadcast node\n", __func__);
5331 if ((error = ops->add_node(sc, &node, async)) != 0)
5334 /* Use the first valid TX antenna. */
5335 txant = IWN_LSB(sc->txchainmask);
5337 memset(&linkq, 0, sizeof linkq);
5338 linkq.id = sc->broadcast_id;
5339 linkq.antmsk_1stream = iwn_get_1stream_tx_antmask(sc);
5340 linkq.antmsk_2stream = iwn_get_2stream_tx_antmask(sc);
5341 linkq.ampdu_max = 64;
5342 linkq.ampdu_threshold = 3;
5343 linkq.ampdu_limit = htole16(4000); /* 4ms */
5345 /* Use lowest mandatory bit-rate. */
5346 /* XXX rate table lookup? */
5347 if (IEEE80211_IS_CHAN_5GHZ(ic->ic_curchan))
5348 linkq.retry[0] = htole32(0xd);
5350 linkq.retry[0] = htole32(10 | IWN_RFLAG_CCK);
5351 linkq.retry[0] |= htole32(IWN_RFLAG_ANT(txant));
5352 /* Use same bit-rate for all TX retries. */
5353 for (i = 1; i < IWN_MAX_TX_RETRIES; i++) {
5354 linkq.retry[i] = linkq.retry[0];
5357 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
5359 return iwn_cmd(sc, IWN_CMD_LINK_QUALITY, &linkq, sizeof linkq, async);
5363 iwn_updateedca(struct ieee80211com *ic)
5365 #define IWN_EXP2(x) ((1 << (x)) - 1) /* CWmin = 2^ECWmin - 1 */
5366 struct iwn_softc *sc = ic->ic_softc;
5367 struct iwn_edca_params cmd;
5370 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
5372 memset(&cmd, 0, sizeof cmd);
5373 cmd.flags = htole32(IWN_EDCA_UPDATE);
5376 for (aci = 0; aci < WME_NUM_AC; aci++) {
5377 const struct wmeParams *ac =
5378 &ic->ic_wme.wme_chanParams.cap_wmeParams[aci];
5379 cmd.ac[aci].aifsn = ac->wmep_aifsn;
5380 cmd.ac[aci].cwmin = htole16(IWN_EXP2(ac->wmep_logcwmin));
5381 cmd.ac[aci].cwmax = htole16(IWN_EXP2(ac->wmep_logcwmax));
5382 cmd.ac[aci].txoplimit =
5383 htole16(IEEE80211_TXOP_TO_US(ac->wmep_txopLimit));
5385 IEEE80211_UNLOCK(ic);
5388 (void)iwn_cmd(sc, IWN_CMD_EDCA_PARAMS, &cmd, sizeof cmd, 1);
5391 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
5398 iwn_update_mcast(struct ieee80211com *ic)
5404 iwn_set_led(struct iwn_softc *sc, uint8_t which, uint8_t off, uint8_t on)
5406 struct iwn_cmd_led led;
5408 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5411 /* XXX don't set LEDs during scan? */
5412 if (sc->sc_is_scanning)
5416 /* Clear microcode LED ownership. */
5417 IWN_CLRBITS(sc, IWN_LED, IWN_LED_BSM_CTRL);
5420 led.unit = htole32(10000); /* on/off in unit of 100ms */
5423 (void)iwn_cmd(sc, IWN_CMD_SET_LED, &led, sizeof led, 1);
5427 * Set the critical temperature at which the firmware will stop the radio
5431 iwn_set_critical_temp(struct iwn_softc *sc)
5433 struct iwn_critical_temp crit;
5436 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5438 IWN_WRITE(sc, IWN_UCODE_GP1_CLR, IWN_UCODE_GP1_CTEMP_STOP_RF);
5440 if (sc->hw_type == IWN_HW_REV_TYPE_5150)
5441 temp = (IWN_CTOK(110) - sc->temp_off) * -5;
5442 else if (sc->hw_type == IWN_HW_REV_TYPE_4965)
5443 temp = IWN_CTOK(110);
5446 memset(&crit, 0, sizeof crit);
5447 crit.tempR = htole32(temp);
5448 DPRINTF(sc, IWN_DEBUG_RESET, "setting critical temp to %d\n", temp);
5449 return iwn_cmd(sc, IWN_CMD_SET_CRITICAL_TEMP, &crit, sizeof crit, 0);
5453 iwn_set_timing(struct iwn_softc *sc, struct ieee80211_node *ni)
5455 struct iwn_cmd_timing cmd;
5458 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5460 memset(&cmd, 0, sizeof cmd);
5461 memcpy(&cmd.tstamp, ni->ni_tstamp.data, sizeof (uint64_t));
5462 cmd.bintval = htole16(ni->ni_intval);
5463 cmd.lintval = htole16(10);
5465 /* Compute remaining time until next beacon. */
5466 val = (uint64_t)ni->ni_intval * IEEE80211_DUR_TU;
5467 mod = le64toh(cmd.tstamp) % val;
5468 cmd.binitval = htole32((uint32_t)(val - mod));
5470 DPRINTF(sc, IWN_DEBUG_RESET, "timing bintval=%u tstamp=%ju, init=%u\n",
5471 ni->ni_intval, le64toh(cmd.tstamp), (uint32_t)(val - mod));
5473 return iwn_cmd(sc, IWN_CMD_TIMING, &cmd, sizeof cmd, 1);
5477 iwn4965_power_calibration(struct iwn_softc *sc, int temp)
5479 struct ieee80211com *ic = &sc->sc_ic;
5481 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5483 /* Adjust TX power if need be (delta >= 3 degC). */
5484 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: temperature %d->%d\n",
5485 __func__, sc->temp, temp);
5486 if (abs(temp - sc->temp) >= 3) {
5487 /* Record temperature of last calibration. */
5489 (void)iwn4965_set_txpower(sc, ic->ic_bsschan, 1);
5494 * Set TX power for current channel (each rate has its own power settings).
5495 * This function takes into account the regulatory information from EEPROM,
5496 * the current temperature and the current voltage.
5499 iwn4965_set_txpower(struct iwn_softc *sc, struct ieee80211_channel *ch,
5502 /* Fixed-point arithmetic division using a n-bit fractional part. */
5503 #define fdivround(a, b, n) \
5504 ((((1 << n) * (a)) / (b) + (1 << n) / 2) / (1 << n))
5505 /* Linear interpolation. */
5506 #define interpolate(x, x1, y1, x2, y2, n) \
5507 ((y1) + fdivround(((int)(x) - (x1)) * ((y2) - (y1)), (x2) - (x1), n))
5509 static const int tdiv[IWN_NATTEN_GROUPS] = { 9, 8, 8, 8, 6 };
5510 struct iwn_ucode_info *uc = &sc->ucode_info;
5511 struct iwn4965_cmd_txpower cmd;
5512 struct iwn4965_eeprom_chan_samples *chans;
5513 const uint8_t *rf_gain, *dsp_gain;
5514 int32_t vdiff, tdiff;
5515 int i, c, grp, maxpwr;
5518 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX];
5519 /* Retrieve current channel from last RXON. */
5520 chan = sc->rxon->chan;
5521 DPRINTF(sc, IWN_DEBUG_RESET, "setting TX power for channel %d\n",
5524 memset(&cmd, 0, sizeof cmd);
5525 cmd.band = IEEE80211_IS_CHAN_5GHZ(ch) ? 0 : 1;
5528 if (IEEE80211_IS_CHAN_5GHZ(ch)) {
5529 maxpwr = sc->maxpwr5GHz;
5530 rf_gain = iwn4965_rf_gain_5ghz;
5531 dsp_gain = iwn4965_dsp_gain_5ghz;
5533 maxpwr = sc->maxpwr2GHz;
5534 rf_gain = iwn4965_rf_gain_2ghz;
5535 dsp_gain = iwn4965_dsp_gain_2ghz;
5538 /* Compute voltage compensation. */
5539 vdiff = ((int32_t)le32toh(uc->volt) - sc->eeprom_voltage) / 7;
5544 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
5545 "%s: voltage compensation=%d (UCODE=%d, EEPROM=%d)\n",
5546 __func__, vdiff, le32toh(uc->volt), sc->eeprom_voltage);
5548 /* Get channel attenuation group. */
5549 if (chan <= 20) /* 1-20 */
5551 else if (chan <= 43) /* 34-43 */
5553 else if (chan <= 70) /* 44-70 */
5555 else if (chan <= 124) /* 71-124 */
5559 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
5560 "%s: chan %d, attenuation group=%d\n", __func__, chan, grp);
5562 /* Get channel sub-band. */
5563 for (i = 0; i < IWN_NBANDS; i++)
5564 if (sc->bands[i].lo != 0 &&
5565 sc->bands[i].lo <= chan && chan <= sc->bands[i].hi)
5567 if (i == IWN_NBANDS) /* Can't happen in real-life. */
5569 chans = sc->bands[i].chans;
5570 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
5571 "%s: chan %d sub-band=%d\n", __func__, chan, i);
5573 for (c = 0; c < 2; c++) {
5574 uint8_t power, gain, temp;
5575 int maxchpwr, pwr, ridx, idx;
5577 power = interpolate(chan,
5578 chans[0].num, chans[0].samples[c][1].power,
5579 chans[1].num, chans[1].samples[c][1].power, 1);
5580 gain = interpolate(chan,
5581 chans[0].num, chans[0].samples[c][1].gain,
5582 chans[1].num, chans[1].samples[c][1].gain, 1);
5583 temp = interpolate(chan,
5584 chans[0].num, chans[0].samples[c][1].temp,
5585 chans[1].num, chans[1].samples[c][1].temp, 1);
5586 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
5587 "%s: Tx chain %d: power=%d gain=%d temp=%d\n",
5588 __func__, c, power, gain, temp);
5590 /* Compute temperature compensation. */
5591 tdiff = ((sc->temp - temp) * 2) / tdiv[grp];
5592 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
5593 "%s: temperature compensation=%d (current=%d, EEPROM=%d)\n",
5594 __func__, tdiff, sc->temp, temp);
5596 for (ridx = 0; ridx <= IWN_RIDX_MAX; ridx++) {
5597 /* Convert dBm to half-dBm. */
5598 maxchpwr = sc->maxpwr[chan] * 2;
5600 maxchpwr -= 6; /* MIMO 2T: -3dB */
5604 /* Adjust TX power based on rate. */
5605 if ((ridx % 8) == 5)
5606 pwr -= 15; /* OFDM48: -7.5dB */
5607 else if ((ridx % 8) == 6)
5608 pwr -= 17; /* OFDM54: -8.5dB */
5609 else if ((ridx % 8) == 7)
5610 pwr -= 20; /* OFDM60: -10dB */
5612 pwr -= 10; /* Others: -5dB */
5614 /* Do not exceed channel max TX power. */
5618 idx = gain - (pwr - power) - tdiff - vdiff;
5619 if ((ridx / 8) & 1) /* MIMO */
5620 idx += (int32_t)le32toh(uc->atten[grp][c]);
5623 idx += 9; /* 5GHz */
5624 if (ridx == IWN_RIDX_MAX)
5627 /* Make sure idx stays in a valid range. */
5630 else if (idx > IWN4965_MAX_PWR_INDEX)
5631 idx = IWN4965_MAX_PWR_INDEX;
5633 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
5634 "%s: Tx chain %d, rate idx %d: power=%d\n",
5635 __func__, c, ridx, idx);
5636 cmd.power[ridx].rf_gain[c] = rf_gain[idx];
5637 cmd.power[ridx].dsp_gain[c] = dsp_gain[idx];
5641 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
5642 "%s: set tx power for chan %d\n", __func__, chan);
5643 return iwn_cmd(sc, IWN_CMD_TXPOWER, &cmd, sizeof cmd, async);
5650 iwn5000_set_txpower(struct iwn_softc *sc, struct ieee80211_channel *ch,
5653 struct iwn5000_cmd_txpower cmd;
5656 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5659 * TX power calibration is handled automatically by the firmware
5662 memset(&cmd, 0, sizeof cmd);
5663 cmd.global_limit = 2 * IWN5000_TXPOWER_MAX_DBM; /* 16 dBm */
5664 cmd.flags = IWN5000_TXPOWER_NO_CLOSED;
5665 cmd.srv_limit = IWN5000_TXPOWER_AUTO;
5666 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_XMIT,
5667 "%s: setting TX power; rev=%d\n",
5669 IWN_UCODE_API(sc->ucode_rev));
5670 if (IWN_UCODE_API(sc->ucode_rev) == 1)
5671 cmdid = IWN_CMD_TXPOWER_DBM_V1;
5673 cmdid = IWN_CMD_TXPOWER_DBM;
5674 return iwn_cmd(sc, cmdid, &cmd, sizeof cmd, async);
5678 * Retrieve the maximum RSSI (in dBm) among receivers.
5681 iwn4965_get_rssi(struct iwn_softc *sc, struct iwn_rx_stat *stat)
5683 struct iwn4965_rx_phystat *phy = (void *)stat->phybuf;
5687 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5689 mask = (le16toh(phy->antenna) >> 4) & IWN_ANT_ABC;
5690 agc = (le16toh(phy->agc) >> 7) & 0x7f;
5693 if (mask & IWN_ANT_A)
5694 rssi = MAX(rssi, phy->rssi[0]);
5695 if (mask & IWN_ANT_B)
5696 rssi = MAX(rssi, phy->rssi[2]);
5697 if (mask & IWN_ANT_C)
5698 rssi = MAX(rssi, phy->rssi[4]);
5700 DPRINTF(sc, IWN_DEBUG_RECV,
5701 "%s: agc %d mask 0x%x rssi %d %d %d result %d\n", __func__, agc,
5702 mask, phy->rssi[0], phy->rssi[2], phy->rssi[4],
5703 rssi - agc - IWN_RSSI_TO_DBM);
5704 return rssi - agc - IWN_RSSI_TO_DBM;
5708 iwn5000_get_rssi(struct iwn_softc *sc, struct iwn_rx_stat *stat)
5710 struct iwn5000_rx_phystat *phy = (void *)stat->phybuf;
5714 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5716 agc = (le32toh(phy->agc) >> 9) & 0x7f;
5718 rssi = MAX(le16toh(phy->rssi[0]) & 0xff,
5719 le16toh(phy->rssi[1]) & 0xff);
5720 rssi = MAX(le16toh(phy->rssi[2]) & 0xff, rssi);
5722 DPRINTF(sc, IWN_DEBUG_RECV,
5723 "%s: agc %d rssi %d %d %d result %d\n", __func__, agc,
5724 phy->rssi[0], phy->rssi[1], phy->rssi[2],
5725 rssi - agc - IWN_RSSI_TO_DBM);
5726 return rssi - agc - IWN_RSSI_TO_DBM;
5730 * Retrieve the average noise (in dBm) among receivers.
5733 iwn_get_noise(const struct iwn_rx_general_stats *stats)
5735 int i, total, nbant, noise;
5738 for (i = 0; i < 3; i++) {
5739 if ((noise = le32toh(stats->noise[i]) & 0xff) == 0)
5744 /* There should be at least one antenna but check anyway. */
5745 return (nbant == 0) ? -127 : (total / nbant) - 107;
5749 * Compute temperature (in degC) from last received statistics.
5752 iwn4965_get_temperature(struct iwn_softc *sc)
5754 struct iwn_ucode_info *uc = &sc->ucode_info;
5755 int32_t r1, r2, r3, r4, temp;
5757 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5759 r1 = le32toh(uc->temp[0].chan20MHz);
5760 r2 = le32toh(uc->temp[1].chan20MHz);
5761 r3 = le32toh(uc->temp[2].chan20MHz);
5762 r4 = le32toh(sc->rawtemp);
5764 if (r1 == r3) /* Prevents division by 0 (should not happen). */
5767 /* Sign-extend 23-bit R4 value to 32-bit. */
5768 r4 = ((r4 & 0xffffff) ^ 0x800000) - 0x800000;
5769 /* Compute temperature in Kelvin. */
5770 temp = (259 * (r4 - r2)) / (r3 - r1);
5771 temp = (temp * 97) / 100 + 8;
5773 DPRINTF(sc, IWN_DEBUG_ANY, "temperature %dK/%dC\n", temp,
5775 return IWN_KTOC(temp);
5779 iwn5000_get_temperature(struct iwn_softc *sc)
5783 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5786 * Temperature is not used by the driver for 5000 Series because
5787 * TX power calibration is handled by firmware.
5789 temp = le32toh(sc->rawtemp);
5790 if (sc->hw_type == IWN_HW_REV_TYPE_5150) {
5791 temp = (temp / -5) + sc->temp_off;
5792 temp = IWN_KTOC(temp);
5798 * Initialize sensitivity calibration state machine.
5801 iwn_init_sensitivity(struct iwn_softc *sc)
5803 struct iwn_ops *ops = &sc->ops;
5804 struct iwn_calib_state *calib = &sc->calib;
5808 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5810 /* Reset calibration state machine. */
5811 memset(calib, 0, sizeof (*calib));
5812 calib->state = IWN_CALIB_STATE_INIT;
5813 calib->cck_state = IWN_CCK_STATE_HIFA;
5814 /* Set initial correlation values. */
5815 calib->ofdm_x1 = sc->limits->min_ofdm_x1;
5816 calib->ofdm_mrc_x1 = sc->limits->min_ofdm_mrc_x1;
5817 calib->ofdm_x4 = sc->limits->min_ofdm_x4;
5818 calib->ofdm_mrc_x4 = sc->limits->min_ofdm_mrc_x4;
5819 calib->cck_x4 = 125;
5820 calib->cck_mrc_x4 = sc->limits->min_cck_mrc_x4;
5821 calib->energy_cck = sc->limits->energy_cck;
5823 /* Write initial sensitivity. */
5824 if ((error = iwn_send_sensitivity(sc)) != 0)
5827 /* Write initial gains. */
5828 if ((error = ops->init_gains(sc)) != 0)
5831 /* Request statistics at each beacon interval. */
5833 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: sending request for statistics\n",
5835 return iwn_cmd(sc, IWN_CMD_GET_STATISTICS, &flags, sizeof flags, 1);
5839 * Collect noise and RSSI statistics for the first 20 beacons received
5840 * after association and use them to determine connected antennas and
5841 * to set differential gains.
5844 iwn_collect_noise(struct iwn_softc *sc,
5845 const struct iwn_rx_general_stats *stats)
5847 struct iwn_ops *ops = &sc->ops;
5848 struct iwn_calib_state *calib = &sc->calib;
5849 struct ieee80211com *ic = &sc->sc_ic;
5853 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
5855 /* Accumulate RSSI and noise for all 3 antennas. */
5856 for (i = 0; i < 3; i++) {
5857 calib->rssi[i] += le32toh(stats->rssi[i]) & 0xff;
5858 calib->noise[i] += le32toh(stats->noise[i]) & 0xff;
5860 /* NB: We update differential gains only once after 20 beacons. */
5861 if (++calib->nbeacons < 20)
5864 /* Determine highest average RSSI. */
5865 val = MAX(calib->rssi[0], calib->rssi[1]);
5866 val = MAX(calib->rssi[2], val);
5868 /* Determine which antennas are connected. */
5869 sc->chainmask = sc->rxchainmask;
5870 for (i = 0; i < 3; i++)
5871 if (val - calib->rssi[i] > 15 * 20)
5872 sc->chainmask &= ~(1 << i);
5873 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_XMIT,
5874 "%s: RX chains mask: theoretical=0x%x, actual=0x%x\n",
5875 __func__, sc->rxchainmask, sc->chainmask);
5877 /* If none of the TX antennas are connected, keep at least one. */
5878 if ((sc->chainmask & sc->txchainmask) == 0)
5879 sc->chainmask |= IWN_LSB(sc->txchainmask);
5881 (void)ops->set_gains(sc);
5882 calib->state = IWN_CALIB_STATE_RUN;
5885 /* XXX Disable RX chains with no antennas connected. */
5886 sc->rxon->rxchain = htole16(IWN_RXCHAIN_SEL(sc->chainmask));
5887 if (sc->sc_is_scanning)
5888 device_printf(sc->sc_dev,
5889 "%s: is_scanning set, before RXON\n",
5891 (void)iwn_cmd(sc, IWN_CMD_RXON, sc->rxon, sc->rxonsz, 1);
5894 /* Enable power-saving mode if requested by user. */
5895 if (ic->ic_flags & IEEE80211_F_PMGTON)
5896 (void)iwn_set_pslevel(sc, 0, 3, 1);
5898 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
5903 iwn4965_init_gains(struct iwn_softc *sc)
5905 struct iwn_phy_calib_gain cmd;
5907 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5909 memset(&cmd, 0, sizeof cmd);
5910 cmd.code = IWN4965_PHY_CALIB_DIFF_GAIN;
5911 /* Differential gains initially set to 0 for all 3 antennas. */
5912 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
5913 "%s: setting initial differential gains\n", __func__);
5914 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 1);
5918 iwn5000_init_gains(struct iwn_softc *sc)
5920 struct iwn_phy_calib cmd;
5922 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5924 memset(&cmd, 0, sizeof cmd);
5925 cmd.code = sc->reset_noise_gain;
5928 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
5929 "%s: setting initial differential gains\n", __func__);
5930 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 1);
5934 iwn4965_set_gains(struct iwn_softc *sc)
5936 struct iwn_calib_state *calib = &sc->calib;
5937 struct iwn_phy_calib_gain cmd;
5938 int i, delta, noise;
5940 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5942 /* Get minimal noise among connected antennas. */
5943 noise = INT_MAX; /* NB: There's at least one antenna. */
5944 for (i = 0; i < 3; i++)
5945 if (sc->chainmask & (1 << i))
5946 noise = MIN(calib->noise[i], noise);
5948 memset(&cmd, 0, sizeof cmd);
5949 cmd.code = IWN4965_PHY_CALIB_DIFF_GAIN;
5950 /* Set differential gains for connected antennas. */
5951 for (i = 0; i < 3; i++) {
5952 if (sc->chainmask & (1 << i)) {
5953 /* Compute attenuation (in unit of 1.5dB). */
5954 delta = (noise - (int32_t)calib->noise[i]) / 30;
5955 /* NB: delta <= 0 */
5956 /* Limit to [-4.5dB,0]. */
5957 cmd.gain[i] = MIN(abs(delta), 3);
5959 cmd.gain[i] |= 1 << 2; /* sign bit */
5962 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
5963 "setting differential gains Ant A/B/C: %x/%x/%x (%x)\n",
5964 cmd.gain[0], cmd.gain[1], cmd.gain[2], sc->chainmask);
5965 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 1);
5969 iwn5000_set_gains(struct iwn_softc *sc)
5971 struct iwn_calib_state *calib = &sc->calib;
5972 struct iwn_phy_calib_gain cmd;
5973 int i, ant, div, delta;
5975 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5977 /* We collected 20 beacons and !=6050 need a 1.5 factor. */
5978 div = (sc->hw_type == IWN_HW_REV_TYPE_6050) ? 20 : 30;
5980 memset(&cmd, 0, sizeof cmd);
5981 cmd.code = sc->noise_gain;
5984 /* Get first available RX antenna as referential. */
5985 ant = IWN_LSB(sc->rxchainmask);
5986 /* Set differential gains for other antennas. */
5987 for (i = ant + 1; i < 3; i++) {
5988 if (sc->chainmask & (1 << i)) {
5989 /* The delta is relative to antenna "ant". */
5990 delta = ((int32_t)calib->noise[ant] -
5991 (int32_t)calib->noise[i]) / div;
5992 /* Limit to [-4.5dB,+4.5dB]. */
5993 cmd.gain[i - 1] = MIN(abs(delta), 3);
5995 cmd.gain[i - 1] |= 1 << 2; /* sign bit */
5998 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_XMIT,
5999 "setting differential gains Ant B/C: %x/%x (%x)\n",
6000 cmd.gain[0], cmd.gain[1], sc->chainmask);
6001 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 1);
6005 * Tune RF RX sensitivity based on the number of false alarms detected
6006 * during the last beacon period.
6009 iwn_tune_sensitivity(struct iwn_softc *sc, const struct iwn_rx_stats *stats)
6011 #define inc(val, inc, max) \
6012 if ((val) < (max)) { \
6013 if ((val) < (max) - (inc)) \
6019 #define dec(val, dec, min) \
6020 if ((val) > (min)) { \
6021 if ((val) > (min) + (dec)) \
6028 const struct iwn_sensitivity_limits *limits = sc->limits;
6029 struct iwn_calib_state *calib = &sc->calib;
6030 uint32_t val, rxena, fa;
6031 uint32_t energy[3], energy_min;
6032 uint8_t noise[3], noise_ref;
6033 int i, needs_update = 0;
6035 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
6037 /* Check that we've been enabled long enough. */
6038 if ((rxena = le32toh(stats->general.load)) == 0){
6039 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end not so long\n", __func__);
6043 /* Compute number of false alarms since last call for OFDM. */
6044 fa = le32toh(stats->ofdm.bad_plcp) - calib->bad_plcp_ofdm;
6045 fa += le32toh(stats->ofdm.fa) - calib->fa_ofdm;
6046 fa *= 200 * IEEE80211_DUR_TU; /* 200TU */
6048 if (fa > 50 * rxena) {
6049 /* High false alarm count, decrease sensitivity. */
6050 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
6051 "%s: OFDM high false alarm count: %u\n", __func__, fa);
6052 inc(calib->ofdm_x1, 1, limits->max_ofdm_x1);
6053 inc(calib->ofdm_mrc_x1, 1, limits->max_ofdm_mrc_x1);
6054 inc(calib->ofdm_x4, 1, limits->max_ofdm_x4);
6055 inc(calib->ofdm_mrc_x4, 1, limits->max_ofdm_mrc_x4);
6057 } else if (fa < 5 * rxena) {
6058 /* Low false alarm count, increase sensitivity. */
6059 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
6060 "%s: OFDM low false alarm count: %u\n", __func__, fa);
6061 dec(calib->ofdm_x1, 1, limits->min_ofdm_x1);
6062 dec(calib->ofdm_mrc_x1, 1, limits->min_ofdm_mrc_x1);
6063 dec(calib->ofdm_x4, 1, limits->min_ofdm_x4);
6064 dec(calib->ofdm_mrc_x4, 1, limits->min_ofdm_mrc_x4);
6067 /* Compute maximum noise among 3 receivers. */
6068 for (i = 0; i < 3; i++)
6069 noise[i] = (le32toh(stats->general.noise[i]) >> 8) & 0xff;
6070 val = MAX(noise[0], noise[1]);
6071 val = MAX(noise[2], val);
6072 /* Insert it into our samples table. */
6073 calib->noise_samples[calib->cur_noise_sample] = val;
6074 calib->cur_noise_sample = (calib->cur_noise_sample + 1) % 20;
6076 /* Compute maximum noise among last 20 samples. */
6077 noise_ref = calib->noise_samples[0];
6078 for (i = 1; i < 20; i++)
6079 noise_ref = MAX(noise_ref, calib->noise_samples[i]);
6081 /* Compute maximum energy among 3 receivers. */
6082 for (i = 0; i < 3; i++)
6083 energy[i] = le32toh(stats->general.energy[i]);
6084 val = MIN(energy[0], energy[1]);
6085 val = MIN(energy[2], val);
6086 /* Insert it into our samples table. */
6087 calib->energy_samples[calib->cur_energy_sample] = val;
6088 calib->cur_energy_sample = (calib->cur_energy_sample + 1) % 10;
6090 /* Compute minimum energy among last 10 samples. */
6091 energy_min = calib->energy_samples[0];
6092 for (i = 1; i < 10; i++)
6093 energy_min = MAX(energy_min, calib->energy_samples[i]);
6096 /* Compute number of false alarms since last call for CCK. */
6097 fa = le32toh(stats->cck.bad_plcp) - calib->bad_plcp_cck;
6098 fa += le32toh(stats->cck.fa) - calib->fa_cck;
6099 fa *= 200 * IEEE80211_DUR_TU; /* 200TU */
6101 if (fa > 50 * rxena) {
6102 /* High false alarm count, decrease sensitivity. */
6103 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
6104 "%s: CCK high false alarm count: %u\n", __func__, fa);
6105 calib->cck_state = IWN_CCK_STATE_HIFA;
6108 if (calib->cck_x4 > 160) {
6109 calib->noise_ref = noise_ref;
6110 if (calib->energy_cck > 2)
6111 dec(calib->energy_cck, 2, energy_min);
6113 if (calib->cck_x4 < 160) {
6114 calib->cck_x4 = 161;
6117 inc(calib->cck_x4, 3, limits->max_cck_x4);
6119 inc(calib->cck_mrc_x4, 3, limits->max_cck_mrc_x4);
6121 } else if (fa < 5 * rxena) {
6122 /* Low false alarm count, increase sensitivity. */
6123 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
6124 "%s: CCK low false alarm count: %u\n", __func__, fa);
6125 calib->cck_state = IWN_CCK_STATE_LOFA;
6128 if (calib->cck_state != IWN_CCK_STATE_INIT &&
6129 (((int32_t)calib->noise_ref - (int32_t)noise_ref) > 2 ||
6130 calib->low_fa > 100)) {
6131 inc(calib->energy_cck, 2, limits->min_energy_cck);
6132 dec(calib->cck_x4, 3, limits->min_cck_x4);
6133 dec(calib->cck_mrc_x4, 3, limits->min_cck_mrc_x4);
6136 /* Not worth to increase or decrease sensitivity. */
6137 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
6138 "%s: CCK normal false alarm count: %u\n", __func__, fa);
6140 calib->noise_ref = noise_ref;
6142 if (calib->cck_state == IWN_CCK_STATE_HIFA) {
6143 /* Previous interval had many false alarms. */
6144 dec(calib->energy_cck, 8, energy_min);
6146 calib->cck_state = IWN_CCK_STATE_INIT;
6150 (void)iwn_send_sensitivity(sc);
6152 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
6159 iwn_send_sensitivity(struct iwn_softc *sc)
6161 struct iwn_calib_state *calib = &sc->calib;
6162 struct iwn_enhanced_sensitivity_cmd cmd;
6165 memset(&cmd, 0, sizeof cmd);
6166 len = sizeof (struct iwn_sensitivity_cmd);
6167 cmd.which = IWN_SENSITIVITY_WORKTBL;
6168 /* OFDM modulation. */
6169 cmd.corr_ofdm_x1 = htole16(calib->ofdm_x1);
6170 cmd.corr_ofdm_mrc_x1 = htole16(calib->ofdm_mrc_x1);
6171 cmd.corr_ofdm_x4 = htole16(calib->ofdm_x4);
6172 cmd.corr_ofdm_mrc_x4 = htole16(calib->ofdm_mrc_x4);
6173 cmd.energy_ofdm = htole16(sc->limits->energy_ofdm);
6174 cmd.energy_ofdm_th = htole16(62);
6175 /* CCK modulation. */
6176 cmd.corr_cck_x4 = htole16(calib->cck_x4);
6177 cmd.corr_cck_mrc_x4 = htole16(calib->cck_mrc_x4);
6178 cmd.energy_cck = htole16(calib->energy_cck);
6179 /* Barker modulation: use default values. */
6180 cmd.corr_barker = htole16(190);
6181 cmd.corr_barker_mrc = htole16(sc->limits->barker_mrc);
6183 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
6184 "%s: set sensitivity %d/%d/%d/%d/%d/%d/%d\n", __func__,
6185 calib->ofdm_x1, calib->ofdm_mrc_x1, calib->ofdm_x4,
6186 calib->ofdm_mrc_x4, calib->cck_x4,
6187 calib->cck_mrc_x4, calib->energy_cck);
6189 if (!(sc->sc_flags & IWN_FLAG_ENH_SENS))
6191 /* Enhanced sensitivity settings. */
6192 len = sizeof (struct iwn_enhanced_sensitivity_cmd);
6193 cmd.ofdm_det_slope_mrc = htole16(668);
6194 cmd.ofdm_det_icept_mrc = htole16(4);
6195 cmd.ofdm_det_slope = htole16(486);
6196 cmd.ofdm_det_icept = htole16(37);
6197 cmd.cck_det_slope_mrc = htole16(853);
6198 cmd.cck_det_icept_mrc = htole16(4);
6199 cmd.cck_det_slope = htole16(476);
6200 cmd.cck_det_icept = htole16(99);
6202 return iwn_cmd(sc, IWN_CMD_SET_SENSITIVITY, &cmd, len, 1);
6206 * Look at the increase of PLCP errors over time; if it exceeds
6207 * a programmed threshold then trigger an RF retune.
6210 iwn_check_rx_recovery(struct iwn_softc *sc, struct iwn_stats *rs)
6212 int32_t delta_ofdm, delta_ht, delta_cck;
6213 struct iwn_calib_state *calib = &sc->calib;
6214 int delta_ticks, cur_ticks;
6219 * Calculate the difference between the current and
6220 * previous statistics.
6222 delta_cck = le32toh(rs->rx.cck.bad_plcp) - calib->bad_plcp_cck;
6223 delta_ofdm = le32toh(rs->rx.ofdm.bad_plcp) - calib->bad_plcp_ofdm;
6224 delta_ht = le32toh(rs->rx.ht.bad_plcp) - calib->bad_plcp_ht;
6227 * Calculate the delta in time between successive statistics
6228 * messages. Yes, it can roll over; so we make sure that
6229 * this doesn't happen.
6231 * XXX go figure out what to do about rollover
6232 * XXX go figure out what to do if ticks rolls over to -ve instead!
6233 * XXX go stab signed integer overflow undefined-ness in the face.
6236 delta_ticks = cur_ticks - sc->last_calib_ticks;
6239 * If any are negative, then the firmware likely reset; so just
6240 * bail. We'll pick this up next time.
6242 if (delta_cck < 0 || delta_ofdm < 0 || delta_ht < 0 || delta_ticks < 0)
6246 * delta_ticks is in ticks; we need to convert it up to milliseconds
6247 * so we can do some useful math with it.
6249 delta_msec = ticks_to_msecs(delta_ticks);
6252 * Calculate what our threshold is given the current delta_msec.
6254 thresh = sc->base_params->plcp_err_threshold * delta_msec;
6256 DPRINTF(sc, IWN_DEBUG_STATE,
6257 "%s: time delta: %d; cck=%d, ofdm=%d, ht=%d, total=%d, thresh=%d\n",
6263 (delta_msec + delta_cck + delta_ofdm + delta_ht),
6267 * If we need a retune, then schedule a single channel scan
6268 * to a channel that isn't the currently active one!
6270 * The math from linux iwlwifi:
6272 * if ((delta * 100 / msecs) > threshold)
6274 if (thresh > 0 && (delta_cck + delta_ofdm + delta_ht) * 100 > thresh) {
6275 DPRINTF(sc, IWN_DEBUG_ANY,
6276 "%s: PLCP error threshold raw (%d) comparison (%d) "
6277 "over limit (%d); retune!\n",
6279 (delta_cck + delta_ofdm + delta_ht),
6280 (delta_cck + delta_ofdm + delta_ht) * 100,
6286 * Set STA mode power saving level (between 0 and 5).
6287 * Level 0 is CAM (Continuously Aware Mode), 5 is for maximum power saving.
6290 iwn_set_pslevel(struct iwn_softc *sc, int dtim, int level, int async)
6292 struct iwn_pmgt_cmd cmd;
6293 const struct iwn_pmgt *pmgt;
6294 uint32_t max, skip_dtim;
6298 DPRINTF(sc, IWN_DEBUG_PWRSAVE,
6299 "%s: dtim=%d, level=%d, async=%d\n",
6305 /* Select which PS parameters to use. */
6307 pmgt = &iwn_pmgt[0][level];
6308 else if (dtim <= 10)
6309 pmgt = &iwn_pmgt[1][level];
6311 pmgt = &iwn_pmgt[2][level];
6313 memset(&cmd, 0, sizeof cmd);
6314 if (level != 0) /* not CAM */
6315 cmd.flags |= htole16(IWN_PS_ALLOW_SLEEP);
6317 cmd.flags |= htole16(IWN_PS_FAST_PD);
6318 /* Retrieve PCIe Active State Power Management (ASPM). */
6319 reg = pci_read_config(sc->sc_dev, sc->sc_cap_off + PCIER_LINK_CTL, 4);
6320 if (!(reg & PCIEM_LINK_CTL_ASPMC_L0S)) /* L0s Entry disabled. */
6321 cmd.flags |= htole16(IWN_PS_PCI_PMGT);
6322 cmd.rxtimeout = htole32(pmgt->rxtimeout * 1024);
6323 cmd.txtimeout = htole32(pmgt->txtimeout * 1024);
6329 skip_dtim = pmgt->skip_dtim;
6330 if (skip_dtim != 0) {
6331 cmd.flags |= htole16(IWN_PS_SLEEP_OVER_DTIM);
6332 max = pmgt->intval[4];
6333 if (max == (uint32_t)-1)
6334 max = dtim * (skip_dtim + 1);
6335 else if (max > dtim)
6336 max = rounddown(max, dtim);
6339 for (i = 0; i < 5; i++)
6340 cmd.intval[i] = htole32(MIN(max, pmgt->intval[i]));
6342 DPRINTF(sc, IWN_DEBUG_RESET, "setting power saving level to %d\n",
6344 return iwn_cmd(sc, IWN_CMD_SET_POWER_MODE, &cmd, sizeof cmd, async);
6348 iwn_send_btcoex(struct iwn_softc *sc)
6350 struct iwn_bluetooth cmd;
6352 memset(&cmd, 0, sizeof cmd);
6353 cmd.flags = IWN_BT_COEX_CHAN_ANN | IWN_BT_COEX_BT_PRIO;
6354 cmd.lead_time = IWN_BT_LEAD_TIME_DEF;
6355 cmd.max_kill = IWN_BT_MAX_KILL_DEF;
6356 DPRINTF(sc, IWN_DEBUG_RESET, "%s: configuring bluetooth coexistence\n",
6358 return iwn_cmd(sc, IWN_CMD_BT_COEX, &cmd, sizeof(cmd), 0);
6362 iwn_send_advanced_btcoex(struct iwn_softc *sc)
6364 static const uint32_t btcoex_3wire[12] = {
6365 0xaaaaaaaa, 0xaaaaaaaa, 0xaeaaaaaa, 0xaaaaaaaa,
6366 0xcc00ff28, 0x0000aaaa, 0xcc00aaaa, 0x0000aaaa,
6367 0xc0004000, 0x00004000, 0xf0005000, 0xf0005000,
6369 struct iwn6000_btcoex_config btconfig;
6370 struct iwn2000_btcoex_config btconfig2k;
6371 struct iwn_btcoex_priotable btprio;
6372 struct iwn_btcoex_prot btprot;
6376 memset(&btconfig, 0, sizeof btconfig);
6377 memset(&btconfig2k, 0, sizeof btconfig2k);
6379 flags = IWN_BT_FLAG_COEX6000_MODE_3W <<
6380 IWN_BT_FLAG_COEX6000_MODE_SHIFT; // Done as is in linux kernel 3.2
6382 if (sc->base_params->bt_sco_disable)
6383 flags &= ~IWN_BT_FLAG_SYNC_2_BT_DISABLE;
6385 flags |= IWN_BT_FLAG_SYNC_2_BT_DISABLE;
6387 flags |= IWN_BT_FLAG_COEX6000_CHAN_INHIBITION;
6389 /* Default flags result is 145 as old value */
6392 * Flags value has to be review. Values must change if we
6393 * which to disable it
6395 if (sc->base_params->bt_session_2) {
6396 btconfig2k.flags = flags;
6397 btconfig2k.max_kill = 5;
6398 btconfig2k.bt3_t7_timer = 1;
6399 btconfig2k.kill_ack = htole32(0xffff0000);
6400 btconfig2k.kill_cts = htole32(0xffff0000);
6401 btconfig2k.sample_time = 2;
6402 btconfig2k.bt3_t2_timer = 0xc;
6404 for (i = 0; i < 12; i++)
6405 btconfig2k.lookup_table[i] = htole32(btcoex_3wire[i]);
6406 btconfig2k.valid = htole16(0xff);
6407 btconfig2k.prio_boost = htole32(0xf0);
6408 DPRINTF(sc, IWN_DEBUG_RESET,
6409 "%s: configuring advanced bluetooth coexistence"
6410 " session 2, flags : 0x%x\n",
6413 error = iwn_cmd(sc, IWN_CMD_BT_COEX, &btconfig2k,
6414 sizeof(btconfig2k), 1);
6416 btconfig.flags = flags;
6417 btconfig.max_kill = 5;
6418 btconfig.bt3_t7_timer = 1;
6419 btconfig.kill_ack = htole32(0xffff0000);
6420 btconfig.kill_cts = htole32(0xffff0000);
6421 btconfig.sample_time = 2;
6422 btconfig.bt3_t2_timer = 0xc;
6424 for (i = 0; i < 12; i++)
6425 btconfig.lookup_table[i] = htole32(btcoex_3wire[i]);
6426 btconfig.valid = htole16(0xff);
6427 btconfig.prio_boost = 0xf0;
6428 DPRINTF(sc, IWN_DEBUG_RESET,
6429 "%s: configuring advanced bluetooth coexistence,"
6433 error = iwn_cmd(sc, IWN_CMD_BT_COEX, &btconfig,
6434 sizeof(btconfig), 1);
6440 memset(&btprio, 0, sizeof btprio);
6441 btprio.calib_init1 = 0x6;
6442 btprio.calib_init2 = 0x7;
6443 btprio.calib_periodic_low1 = 0x2;
6444 btprio.calib_periodic_low2 = 0x3;
6445 btprio.calib_periodic_high1 = 0x4;
6446 btprio.calib_periodic_high2 = 0x5;
6448 btprio.scan52 = 0x8;
6449 btprio.scan24 = 0xa;
6450 error = iwn_cmd(sc, IWN_CMD_BT_COEX_PRIOTABLE, &btprio, sizeof(btprio),
6455 /* Force BT state machine change. */
6456 memset(&btprot, 0, sizeof btprot);
6459 error = iwn_cmd(sc, IWN_CMD_BT_COEX_PROT, &btprot, sizeof(btprot), 1);
6463 return iwn_cmd(sc, IWN_CMD_BT_COEX_PROT, &btprot, sizeof(btprot), 1);
6467 iwn5000_runtime_calib(struct iwn_softc *sc)
6469 struct iwn5000_calib_config cmd;
6471 memset(&cmd, 0, sizeof cmd);
6472 cmd.ucode.once.enable = 0xffffffff;
6473 cmd.ucode.once.start = IWN5000_CALIB_DC;
6474 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
6475 "%s: configuring runtime calibration\n", __func__);
6476 return iwn_cmd(sc, IWN5000_CMD_CALIB_CONFIG, &cmd, sizeof(cmd), 0);
6480 iwn_get_rxon_ht_flags(struct iwn_softc *sc, struct ieee80211_channel *c)
6482 struct ieee80211com *ic = &sc->sc_ic;
6483 uint32_t htflags = 0;
6485 if (! IEEE80211_IS_CHAN_HT(c))
6488 htflags |= IWN_RXON_HT_PROTMODE(ic->ic_curhtprotmode);
6490 if (IEEE80211_IS_CHAN_HT40(c)) {
6491 switch (ic->ic_curhtprotmode) {
6492 case IEEE80211_HTINFO_OPMODE_HT20PR:
6493 htflags |= IWN_RXON_HT_MODEPURE40;
6496 htflags |= IWN_RXON_HT_MODEMIXED;
6500 if (IEEE80211_IS_CHAN_HT40D(c))
6501 htflags |= IWN_RXON_HT_HT40MINUS;
6507 iwn_config(struct iwn_softc *sc)
6509 struct iwn_ops *ops = &sc->ops;
6510 struct ieee80211com *ic = &sc->sc_ic;
6511 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
6512 const uint8_t *macaddr;
6517 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
6519 if ((sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSET)
6520 && (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSETv2)) {
6521 device_printf(sc->sc_dev,"%s: temp_offset and temp_offsetv2 are"
6522 " exclusive each together. Review NIC config file. Conf"
6523 " : 0x%08x Flags : 0x%08x \n", __func__,
6524 sc->base_params->calib_need,
6525 (IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSET |
6526 IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSETv2));
6530 /* Compute temperature calib if needed. Will be send by send calib */
6531 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSET) {
6532 error = iwn5000_temp_offset_calib(sc);
6534 device_printf(sc->sc_dev,
6535 "%s: could not set temperature offset\n", __func__);
6538 } else if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSETv2) {
6539 error = iwn5000_temp_offset_calibv2(sc);
6541 device_printf(sc->sc_dev,
6542 "%s: could not compute temperature offset v2\n",
6548 if (sc->hw_type == IWN_HW_REV_TYPE_6050) {
6549 /* Configure runtime DC calibration. */
6550 error = iwn5000_runtime_calib(sc);
6552 device_printf(sc->sc_dev,
6553 "%s: could not configure runtime calibration\n",
6559 /* Configure valid TX chains for >=5000 Series. */
6560 if (sc->hw_type != IWN_HW_REV_TYPE_4965 &&
6561 IWN_UCODE_API(sc->ucode_rev) > 1) {
6562 txmask = htole32(sc->txchainmask);
6563 DPRINTF(sc, IWN_DEBUG_RESET | IWN_DEBUG_XMIT,
6564 "%s: configuring valid TX chains 0x%x\n", __func__, txmask);
6565 error = iwn_cmd(sc, IWN5000_CMD_TX_ANT_CONFIG, &txmask,
6568 device_printf(sc->sc_dev,
6569 "%s: could not configure valid TX chains, "
6570 "error %d\n", __func__, error);
6575 /* Configure bluetooth coexistence. */
6578 /* Configure bluetooth coexistence if needed. */
6579 if (sc->base_params->bt_mode == IWN_BT_ADVANCED)
6580 error = iwn_send_advanced_btcoex(sc);
6581 if (sc->base_params->bt_mode == IWN_BT_SIMPLE)
6582 error = iwn_send_btcoex(sc);
6585 device_printf(sc->sc_dev,
6586 "%s: could not configure bluetooth coexistence, error %d\n",
6591 /* Set mode, channel, RX filter and enable RX. */
6592 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX];
6593 memset(sc->rxon, 0, sizeof (struct iwn_rxon));
6594 macaddr = vap ? vap->iv_myaddr : ic->ic_macaddr;
6595 IEEE80211_ADDR_COPY(sc->rxon->myaddr, macaddr);
6596 IEEE80211_ADDR_COPY(sc->rxon->wlap, macaddr);
6597 sc->rxon->chan = ieee80211_chan2ieee(ic, ic->ic_curchan);
6598 sc->rxon->flags = htole32(IWN_RXON_TSF | IWN_RXON_CTS_TO_SELF);
6599 if (IEEE80211_IS_CHAN_2GHZ(ic->ic_curchan))
6600 sc->rxon->flags |= htole32(IWN_RXON_AUTO | IWN_RXON_24GHZ);
6601 switch (ic->ic_opmode) {
6602 case IEEE80211_M_STA:
6603 sc->rxon->mode = IWN_MODE_STA;
6604 sc->rxon->filter = htole32(IWN_FILTER_MULTICAST);
6606 case IEEE80211_M_MONITOR:
6607 sc->rxon->mode = IWN_MODE_MONITOR;
6608 sc->rxon->filter = htole32(IWN_FILTER_MULTICAST |
6609 IWN_FILTER_CTL | IWN_FILTER_PROMISC);
6612 /* Should not get there. */
6615 sc->rxon->cck_mask = 0x0f; /* not yet negotiated */
6616 sc->rxon->ofdm_mask = 0xff; /* not yet negotiated */
6617 sc->rxon->ht_single_mask = 0xff;
6618 sc->rxon->ht_dual_mask = 0xff;
6619 sc->rxon->ht_triple_mask = 0xff;
6621 * In active association mode, ensure that
6622 * all the receive chains are enabled.
6624 * Since we're not yet doing SMPS, don't allow the
6625 * number of idle RX chains to be less than the active
6629 IWN_RXCHAIN_VALID(sc->rxchainmask) |
6630 IWN_RXCHAIN_MIMO_COUNT(sc->nrxchains) |
6631 IWN_RXCHAIN_IDLE_COUNT(sc->nrxchains);
6632 sc->rxon->rxchain = htole16(rxchain);
6633 DPRINTF(sc, IWN_DEBUG_RESET | IWN_DEBUG_XMIT,
6634 "%s: rxchainmask=0x%x, nrxchains=%d\n",
6639 sc->rxon->flags |= htole32(iwn_get_rxon_ht_flags(sc, ic->ic_curchan));
6641 DPRINTF(sc, IWN_DEBUG_RESET,
6642 "%s: setting configuration; flags=0x%08x\n",
6643 __func__, le32toh(sc->rxon->flags));
6644 if (sc->sc_is_scanning)
6645 device_printf(sc->sc_dev,
6646 "%s: is_scanning set, before RXON\n",
6648 error = iwn_cmd(sc, IWN_CMD_RXON, sc->rxon, sc->rxonsz, 0);
6650 device_printf(sc->sc_dev, "%s: RXON command failed\n",
6655 if ((error = iwn_add_broadcast_node(sc, 0)) != 0) {
6656 device_printf(sc->sc_dev, "%s: could not add broadcast node\n",
6661 /* Configuration has changed, set TX power accordingly. */
6662 if ((error = ops->set_txpower(sc, ic->ic_curchan, 0)) != 0) {
6663 device_printf(sc->sc_dev, "%s: could not set TX power\n",
6668 if ((error = iwn_set_critical_temp(sc)) != 0) {
6669 device_printf(sc->sc_dev,
6670 "%s: could not set critical temperature\n", __func__);
6674 /* Set power saving level to CAM during initialization. */
6675 if ((error = iwn_set_pslevel(sc, 0, 0, 0)) != 0) {
6676 device_printf(sc->sc_dev,
6677 "%s: could not set power saving level\n", __func__);
6681 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
6687 iwn_get_active_dwell_time(struct iwn_softc *sc,
6688 struct ieee80211_channel *c, uint8_t n_probes)
6690 /* No channel? Default to 2GHz settings */
6691 if (c == NULL || IEEE80211_IS_CHAN_2GHZ(c)) {
6692 return (IWN_ACTIVE_DWELL_TIME_2GHZ +
6693 IWN_ACTIVE_DWELL_FACTOR_2GHZ * (n_probes + 1));
6696 /* 5GHz dwell time */
6697 return (IWN_ACTIVE_DWELL_TIME_5GHZ +
6698 IWN_ACTIVE_DWELL_FACTOR_5GHZ * (n_probes + 1));
6702 * Limit the total dwell time to 85% of the beacon interval.
6704 * Returns the dwell time in milliseconds.
6707 iwn_limit_dwell(struct iwn_softc *sc, uint16_t dwell_time)
6709 struct ieee80211com *ic = &sc->sc_ic;
6710 struct ieee80211vap *vap = NULL;
6713 /* bintval is in TU (1.024mS) */
6714 if (! TAILQ_EMPTY(&ic->ic_vaps)) {
6715 vap = TAILQ_FIRST(&ic->ic_vaps);
6716 bintval = vap->iv_bss->ni_intval;
6720 * If it's non-zero, we should calculate the minimum of
6721 * it and the DWELL_BASE.
6723 * XXX Yes, the math should take into account that bintval
6724 * is 1.024mS, not 1mS..
6727 DPRINTF(sc, IWN_DEBUG_SCAN,
6731 return (MIN(IWN_PASSIVE_DWELL_BASE, ((bintval * 85) / 100)));
6734 /* No association context? Default */
6735 return (IWN_PASSIVE_DWELL_BASE);
6739 iwn_get_passive_dwell_time(struct iwn_softc *sc, struct ieee80211_channel *c)
6743 if (c == NULL || IEEE80211_IS_CHAN_2GHZ(c)) {
6744 passive = IWN_PASSIVE_DWELL_BASE + IWN_PASSIVE_DWELL_TIME_2GHZ;
6746 passive = IWN_PASSIVE_DWELL_BASE + IWN_PASSIVE_DWELL_TIME_5GHZ;
6749 /* Clamp to the beacon interval if we're associated */
6750 return (iwn_limit_dwell(sc, passive));
6754 iwn_scan(struct iwn_softc *sc, struct ieee80211vap *vap,
6755 struct ieee80211_scan_state *ss, struct ieee80211_channel *c)
6757 struct ieee80211com *ic = &sc->sc_ic;
6758 struct ieee80211_node *ni = vap->iv_bss;
6759 struct iwn_scan_hdr *hdr;
6760 struct iwn_cmd_data *tx;
6761 struct iwn_scan_essid *essid;
6762 struct iwn_scan_chan *chan;
6763 struct ieee80211_frame *wh;
6764 struct ieee80211_rateset *rs;
6770 uint16_t dwell_active, dwell_passive;
6771 uint32_t extra, scan_service_time;
6773 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
6776 * We are absolutely not allowed to send a scan command when another
6777 * scan command is pending.
6779 if (sc->sc_is_scanning) {
6780 device_printf(sc->sc_dev, "%s: called whilst scanning!\n",
6785 /* Assign the scan channel */
6788 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX];
6789 buf = malloc(IWN_SCAN_MAXSZ, M_DEVBUF, M_NOWAIT | M_ZERO);
6791 device_printf(sc->sc_dev,
6792 "%s: could not allocate buffer for scan command\n",
6796 hdr = (struct iwn_scan_hdr *)buf;
6798 * Move to the next channel if no frames are received within 10ms
6799 * after sending the probe request.
6801 hdr->quiet_time = htole16(10); /* timeout in milliseconds */
6802 hdr->quiet_threshold = htole16(1); /* min # of packets */
6804 * Max needs to be greater than active and passive and quiet!
6805 * It's also in microseconds!
6807 hdr->max_svc = htole32(250 * 1024);
6810 * Reset scan: interval=100
6811 * Normal scan: interval=becaon interval
6812 * suspend_time: 100 (TU)
6815 extra = (100 /* suspend_time */ / 100 /* beacon interval */) << 22;
6816 //scan_service_time = extra | ((100 /* susp */ % 100 /* int */) * 1024);
6817 scan_service_time = (4 << 22) | (100 * 1024); /* Hardcode for now! */
6818 hdr->pause_svc = htole32(scan_service_time);
6820 /* Select antennas for scanning. */
6822 IWN_RXCHAIN_VALID(sc->rxchainmask) |
6823 IWN_RXCHAIN_FORCE_MIMO_SEL(sc->rxchainmask) |
6824 IWN_RXCHAIN_DRIVER_FORCE;
6825 if (IEEE80211_IS_CHAN_A(c) &&
6826 sc->hw_type == IWN_HW_REV_TYPE_4965) {
6827 /* Ant A must be avoided in 5GHz because of an HW bug. */
6828 rxchain |= IWN_RXCHAIN_FORCE_SEL(IWN_ANT_B);
6829 } else /* Use all available RX antennas. */
6830 rxchain |= IWN_RXCHAIN_FORCE_SEL(sc->rxchainmask);
6831 hdr->rxchain = htole16(rxchain);
6832 hdr->filter = htole32(IWN_FILTER_MULTICAST | IWN_FILTER_BEACON);
6834 tx = (struct iwn_cmd_data *)(hdr + 1);
6835 tx->flags = htole32(IWN_TX_AUTO_SEQ);
6836 tx->id = sc->broadcast_id;
6837 tx->lifetime = htole32(IWN_LIFETIME_INFINITE);
6839 if (IEEE80211_IS_CHAN_5GHZ(c)) {
6840 /* Send probe requests at 6Mbps. */
6841 tx->rate = htole32(0xd);
6842 rs = &ic->ic_sup_rates[IEEE80211_MODE_11A];
6844 hdr->flags = htole32(IWN_RXON_24GHZ | IWN_RXON_AUTO);
6845 if (sc->hw_type == IWN_HW_REV_TYPE_4965 &&
6846 sc->rxon->associd && sc->rxon->chan > 14)
6847 tx->rate = htole32(0xd);
6849 /* Send probe requests at 1Mbps. */
6850 tx->rate = htole32(10 | IWN_RFLAG_CCK);
6852 rs = &ic->ic_sup_rates[IEEE80211_MODE_11G];
6854 /* Use the first valid TX antenna. */
6855 txant = IWN_LSB(sc->txchainmask);
6856 tx->rate |= htole32(IWN_RFLAG_ANT(txant));
6859 * Only do active scanning if we're announcing a probe request
6860 * for a given SSID (or more, if we ever add it to the driver.)
6865 * If we're scanning for a specific SSID, add it to the command.
6867 * XXX maybe look at adding support for scanning multiple SSIDs?
6869 essid = (struct iwn_scan_essid *)(tx + 1);
6871 if (ss->ss_ssid[0].len != 0) {
6872 essid[0].id = IEEE80211_ELEMID_SSID;
6873 essid[0].len = ss->ss_ssid[0].len;
6874 memcpy(essid[0].data, ss->ss_ssid[0].ssid, ss->ss_ssid[0].len);
6877 DPRINTF(sc, IWN_DEBUG_SCAN, "%s: ssid_len=%d, ssid=%*s\n",
6881 ss->ss_ssid[0].ssid);
6883 if (ss->ss_nssid > 0)
6888 * Build a probe request frame. Most of the following code is a
6889 * copy & paste of what is done in net80211.
6891 wh = (struct ieee80211_frame *)(essid + 20);
6892 wh->i_fc[0] = IEEE80211_FC0_VERSION_0 | IEEE80211_FC0_TYPE_MGT |
6893 IEEE80211_FC0_SUBTYPE_PROBE_REQ;
6894 wh->i_fc[1] = IEEE80211_FC1_DIR_NODS;
6895 IEEE80211_ADDR_COPY(wh->i_addr1, vap->iv_ifp->if_broadcastaddr);
6896 IEEE80211_ADDR_COPY(wh->i_addr2, IF_LLADDR(vap->iv_ifp));
6897 IEEE80211_ADDR_COPY(wh->i_addr3, vap->iv_ifp->if_broadcastaddr);
6898 *(uint16_t *)&wh->i_dur[0] = 0; /* filled by HW */
6899 *(uint16_t *)&wh->i_seq[0] = 0; /* filled by HW */
6901 frm = (uint8_t *)(wh + 1);
6902 frm = ieee80211_add_ssid(frm, NULL, 0);
6903 frm = ieee80211_add_rates(frm, rs);
6904 if (rs->rs_nrates > IEEE80211_RATE_SIZE)
6905 frm = ieee80211_add_xrates(frm, rs);
6906 if (ic->ic_htcaps & IEEE80211_HTC_HT)
6907 frm = ieee80211_add_htcap(frm, ni);
6909 /* Set length of probe request. */
6910 tx->len = htole16(frm - (uint8_t *)wh);
6913 * If active scanning is requested but a certain channel is
6914 * marked passive, we can do active scanning if we detect
6917 * There is an issue with some firmware versions that triggers
6918 * a sysassert on a "good CRC threshold" of zero (== disabled),
6919 * on a radar channel even though this means that we should NOT
6922 * The "good CRC threshold" is the number of frames that we
6923 * need to receive during our dwell time on a channel before
6924 * sending out probes -- setting this to a huge value will
6925 * mean we never reach it, but at the same time work around
6926 * the aforementioned issue. Thus use IWL_GOOD_CRC_TH_NEVER
6927 * here instead of IWL_GOOD_CRC_TH_DISABLED.
6929 * This was fixed in later versions along with some other
6930 * scan changes, and the threshold behaves as a flag in those
6935 * If we're doing active scanning, set the crc_threshold
6936 * to a suitable value. This is different to active veruss
6937 * passive scanning depending upon the channel flags; the
6938 * firmware will obey that particular check for us.
6940 if (sc->tlv_feature_flags & IWN_UCODE_TLV_FLAGS_NEWSCAN)
6941 hdr->crc_threshold = is_active ?
6942 IWN_GOOD_CRC_TH_DEFAULT : IWN_GOOD_CRC_TH_DISABLED;
6944 hdr->crc_threshold = is_active ?
6945 IWN_GOOD_CRC_TH_DEFAULT : IWN_GOOD_CRC_TH_NEVER;
6947 chan = (struct iwn_scan_chan *)frm;
6948 chan->chan = htole16(ieee80211_chan2ieee(ic, c));
6950 if (ss->ss_nssid > 0)
6951 chan->flags |= htole32(IWN_CHAN_NPBREQS(1));
6952 chan->dsp_gain = 0x6e;
6955 * Set the passive/active flag depending upon the channel mode.
6956 * XXX TODO: take the is_active flag into account as well?
6958 if (c->ic_flags & IEEE80211_CHAN_PASSIVE)
6959 chan->flags |= htole32(IWN_CHAN_PASSIVE);
6961 chan->flags |= htole32(IWN_CHAN_ACTIVE);
6964 * Calculate the active/passive dwell times.
6967 dwell_active = iwn_get_active_dwell_time(sc, c, ss->ss_nssid);
6968 dwell_passive = iwn_get_passive_dwell_time(sc, c);
6970 /* Make sure they're valid */
6971 if (dwell_passive <= dwell_active)
6972 dwell_passive = dwell_active + 1;
6974 chan->active = htole16(dwell_active);
6975 chan->passive = htole16(dwell_passive);
6977 if (IEEE80211_IS_CHAN_5GHZ(c))
6978 chan->rf_gain = 0x3b;
6980 chan->rf_gain = 0x28;
6982 DPRINTF(sc, IWN_DEBUG_STATE,
6983 "%s: chan %u flags 0x%x rf_gain 0x%x "
6984 "dsp_gain 0x%x active %d passive %d scan_svc_time %d crc 0x%x "
6985 "isactive=%d numssid=%d\n", __func__,
6986 chan->chan, chan->flags, chan->rf_gain, chan->dsp_gain,
6987 dwell_active, dwell_passive, scan_service_time,
6988 hdr->crc_threshold, is_active, ss->ss_nssid);
6992 buflen = (uint8_t *)chan - buf;
6993 hdr->len = htole16(buflen);
6995 if (sc->sc_is_scanning) {
6996 device_printf(sc->sc_dev,
6997 "%s: called with is_scanning set!\n",
7000 sc->sc_is_scanning = 1;
7002 DPRINTF(sc, IWN_DEBUG_STATE, "sending scan command nchan=%d\n",
7004 error = iwn_cmd(sc, IWN_CMD_SCAN, buf, buflen, 1);
7005 free(buf, M_DEVBUF);
7007 callout_reset(&sc->scan_timeout, 5*hz, iwn_scan_timeout, sc);
7009 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
7015 iwn_auth(struct iwn_softc *sc, struct ieee80211vap *vap)
7017 struct iwn_ops *ops = &sc->ops;
7018 struct ieee80211com *ic = &sc->sc_ic;
7019 struct ieee80211_node *ni = vap->iv_bss;
7022 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
7024 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX];
7025 /* Update adapter configuration. */
7026 IEEE80211_ADDR_COPY(sc->rxon->bssid, ni->ni_bssid);
7027 sc->rxon->chan = ieee80211_chan2ieee(ic, ni->ni_chan);
7028 sc->rxon->flags = htole32(IWN_RXON_TSF | IWN_RXON_CTS_TO_SELF);
7029 if (IEEE80211_IS_CHAN_2GHZ(ni->ni_chan))
7030 sc->rxon->flags |= htole32(IWN_RXON_AUTO | IWN_RXON_24GHZ);
7031 if (ic->ic_flags & IEEE80211_F_SHSLOT)
7032 sc->rxon->flags |= htole32(IWN_RXON_SHSLOT);
7033 if (ic->ic_flags & IEEE80211_F_SHPREAMBLE)
7034 sc->rxon->flags |= htole32(IWN_RXON_SHPREAMBLE);
7035 if (IEEE80211_IS_CHAN_A(ni->ni_chan)) {
7036 sc->rxon->cck_mask = 0;
7037 sc->rxon->ofdm_mask = 0x15;
7038 } else if (IEEE80211_IS_CHAN_B(ni->ni_chan)) {
7039 sc->rxon->cck_mask = 0x03;
7040 sc->rxon->ofdm_mask = 0;
7042 /* Assume 802.11b/g. */
7043 sc->rxon->cck_mask = 0x03;
7044 sc->rxon->ofdm_mask = 0x15;
7048 sc->rxon->flags |= htole32(iwn_get_rxon_ht_flags(sc, ic->ic_curchan));
7050 DPRINTF(sc, IWN_DEBUG_STATE, "rxon chan %d flags %x cck %x ofdm %x\n",
7051 sc->rxon->chan, sc->rxon->flags, sc->rxon->cck_mask,
7052 sc->rxon->ofdm_mask);
7053 if (sc->sc_is_scanning)
7054 device_printf(sc->sc_dev,
7055 "%s: is_scanning set, before RXON\n",
7057 error = iwn_cmd(sc, IWN_CMD_RXON, sc->rxon, sc->rxonsz, 1);
7059 device_printf(sc->sc_dev, "%s: RXON command failed, error %d\n",
7064 /* Configuration has changed, set TX power accordingly. */
7065 if ((error = ops->set_txpower(sc, ni->ni_chan, 1)) != 0) {
7066 device_printf(sc->sc_dev,
7067 "%s: could not set TX power, error %d\n", __func__, error);
7071 * Reconfiguring RXON clears the firmware nodes table so we must
7072 * add the broadcast node again.
7074 if ((error = iwn_add_broadcast_node(sc, 1)) != 0) {
7075 device_printf(sc->sc_dev,
7076 "%s: could not add broadcast node, error %d\n", __func__,
7081 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
7087 iwn_run(struct iwn_softc *sc, struct ieee80211vap *vap)
7089 struct iwn_ops *ops = &sc->ops;
7090 struct ieee80211com *ic = &sc->sc_ic;
7091 struct ieee80211_node *ni = vap->iv_bss;
7092 struct iwn_node_info node;
7095 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
7097 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX];
7098 if (ic->ic_opmode == IEEE80211_M_MONITOR) {
7099 /* Link LED blinks while monitoring. */
7100 iwn_set_led(sc, IWN_LED_LINK, 5, 5);
7103 if ((error = iwn_set_timing(sc, ni)) != 0) {
7104 device_printf(sc->sc_dev,
7105 "%s: could not set timing, error %d\n", __func__, error);
7109 /* Update adapter configuration. */
7110 IEEE80211_ADDR_COPY(sc->rxon->bssid, ni->ni_bssid);
7111 sc->rxon->associd = htole16(IEEE80211_AID(ni->ni_associd));
7112 sc->rxon->chan = ieee80211_chan2ieee(ic, ni->ni_chan);
7113 sc->rxon->flags = htole32(IWN_RXON_TSF | IWN_RXON_CTS_TO_SELF);
7114 if (IEEE80211_IS_CHAN_2GHZ(ni->ni_chan))
7115 sc->rxon->flags |= htole32(IWN_RXON_AUTO | IWN_RXON_24GHZ);
7116 if (ic->ic_flags & IEEE80211_F_SHSLOT)
7117 sc->rxon->flags |= htole32(IWN_RXON_SHSLOT);
7118 if (ic->ic_flags & IEEE80211_F_SHPREAMBLE)
7119 sc->rxon->flags |= htole32(IWN_RXON_SHPREAMBLE);
7120 if (IEEE80211_IS_CHAN_A(ni->ni_chan)) {
7121 sc->rxon->cck_mask = 0;
7122 sc->rxon->ofdm_mask = 0x15;
7123 } else if (IEEE80211_IS_CHAN_B(ni->ni_chan)) {
7124 sc->rxon->cck_mask = 0x03;
7125 sc->rxon->ofdm_mask = 0;
7127 /* Assume 802.11b/g. */
7128 sc->rxon->cck_mask = 0x0f;
7129 sc->rxon->ofdm_mask = 0x15;
7132 sc->rxon->flags |= htole32(iwn_get_rxon_ht_flags(sc, ni->ni_chan));
7133 sc->rxon->filter |= htole32(IWN_FILTER_BSS);
7134 DPRINTF(sc, IWN_DEBUG_STATE, "rxon chan %d flags %x, curhtprotmode=%d\n",
7135 sc->rxon->chan, le32toh(sc->rxon->flags), ic->ic_curhtprotmode);
7136 if (sc->sc_is_scanning)
7137 device_printf(sc->sc_dev,
7138 "%s: is_scanning set, before RXON\n",
7140 error = iwn_cmd(sc, IWN_CMD_RXON, sc->rxon, sc->rxonsz, 1);
7142 device_printf(sc->sc_dev,
7143 "%s: could not update configuration, error %d\n", __func__,
7148 /* Configuration has changed, set TX power accordingly. */
7149 if ((error = ops->set_txpower(sc, ni->ni_chan, 1)) != 0) {
7150 device_printf(sc->sc_dev,
7151 "%s: could not set TX power, error %d\n", __func__, error);
7155 /* Fake a join to initialize the TX rate. */
7156 ((struct iwn_node *)ni)->id = IWN_ID_BSS;
7157 iwn_newassoc(ni, 1);
7160 memset(&node, 0, sizeof node);
7161 IEEE80211_ADDR_COPY(node.macaddr, ni->ni_macaddr);
7162 node.id = IWN_ID_BSS;
7163 if (IEEE80211_IS_CHAN_HT(ni->ni_chan)) {
7164 switch (ni->ni_htcap & IEEE80211_HTCAP_SMPS) {
7165 case IEEE80211_HTCAP_SMPS_ENA:
7166 node.htflags |= htole32(IWN_SMPS_MIMO_DIS);
7168 case IEEE80211_HTCAP_SMPS_DYNAMIC:
7169 node.htflags |= htole32(IWN_SMPS_MIMO_PROT);
7172 node.htflags |= htole32(IWN_AMDPU_SIZE_FACTOR(3) |
7173 IWN_AMDPU_DENSITY(5)); /* 4us */
7174 if (IEEE80211_IS_CHAN_HT40(ni->ni_chan))
7175 node.htflags |= htole32(IWN_NODE_HT40);
7177 DPRINTF(sc, IWN_DEBUG_STATE, "%s: adding BSS node\n", __func__);
7178 error = ops->add_node(sc, &node, 1);
7180 device_printf(sc->sc_dev,
7181 "%s: could not add BSS node, error %d\n", __func__, error);
7184 DPRINTF(sc, IWN_DEBUG_STATE, "%s: setting link quality for node %d\n",
7186 if ((error = iwn_set_link_quality(sc, ni)) != 0) {
7187 device_printf(sc->sc_dev,
7188 "%s: could not setup link quality for node %d, error %d\n",
7189 __func__, node.id, error);
7193 if ((error = iwn_init_sensitivity(sc)) != 0) {
7194 device_printf(sc->sc_dev,
7195 "%s: could not set sensitivity, error %d\n", __func__,
7199 /* Start periodic calibration timer. */
7200 sc->calib.state = IWN_CALIB_STATE_ASSOC;
7202 callout_reset(&sc->calib_to, msecs_to_ticks(500), iwn_calib_timeout,
7205 /* Link LED always on while associated. */
7206 iwn_set_led(sc, IWN_LED_LINK, 0, 1);
7208 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
7214 * This function is called by upper layer when an ADDBA request is received
7215 * from another STA and before the ADDBA response is sent.
7218 iwn_ampdu_rx_start(struct ieee80211_node *ni, struct ieee80211_rx_ampdu *rap,
7219 int baparamset, int batimeout, int baseqctl)
7221 #define MS(_v, _f) (((_v) & _f) >> _f##_S)
7222 struct iwn_softc *sc = ni->ni_ic->ic_softc;
7223 struct iwn_ops *ops = &sc->ops;
7224 struct iwn_node *wn = (void *)ni;
7225 struct iwn_node_info node;
7230 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7232 tid = MS(le16toh(baparamset), IEEE80211_BAPS_TID);
7233 ssn = MS(le16toh(baseqctl), IEEE80211_BASEQ_START);
7235 memset(&node, 0, sizeof node);
7237 node.control = IWN_NODE_UPDATE;
7238 node.flags = IWN_FLAG_SET_ADDBA;
7239 node.addba_tid = tid;
7240 node.addba_ssn = htole16(ssn);
7241 DPRINTF(sc, IWN_DEBUG_RECV, "ADDBA RA=%d TID=%d SSN=%d\n",
7243 error = ops->add_node(sc, &node, 1);
7246 return sc->sc_ampdu_rx_start(ni, rap, baparamset, batimeout, baseqctl);
7251 * This function is called by upper layer on teardown of an HT-immediate
7252 * Block Ack agreement (eg. uppon receipt of a DELBA frame).
7255 iwn_ampdu_rx_stop(struct ieee80211_node *ni, struct ieee80211_rx_ampdu *rap)
7257 struct ieee80211com *ic = ni->ni_ic;
7258 struct iwn_softc *sc = ic->ic_softc;
7259 struct iwn_ops *ops = &sc->ops;
7260 struct iwn_node *wn = (void *)ni;
7261 struct iwn_node_info node;
7264 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7266 /* XXX: tid as an argument */
7267 for (tid = 0; tid < WME_NUM_TID; tid++) {
7268 if (&ni->ni_rx_ampdu[tid] == rap)
7272 memset(&node, 0, sizeof node);
7274 node.control = IWN_NODE_UPDATE;
7275 node.flags = IWN_FLAG_SET_DELBA;
7276 node.delba_tid = tid;
7277 DPRINTF(sc, IWN_DEBUG_RECV, "DELBA RA=%d TID=%d\n", wn->id, tid);
7278 (void)ops->add_node(sc, &node, 1);
7279 sc->sc_ampdu_rx_stop(ni, rap);
7283 iwn_addba_request(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap,
7284 int dialogtoken, int baparamset, int batimeout)
7286 struct iwn_softc *sc = ni->ni_ic->ic_softc;
7289 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7291 for (qid = sc->firstaggqueue; qid < sc->ntxqs; qid++) {
7292 if (sc->qid2tap[qid] == NULL)
7295 if (qid == sc->ntxqs) {
7296 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: not free aggregation queue\n",
7300 tap->txa_private = malloc(sizeof(int), M_DEVBUF, M_NOWAIT);
7301 if (tap->txa_private == NULL) {
7302 device_printf(sc->sc_dev,
7303 "%s: failed to alloc TX aggregation structure\n", __func__);
7306 sc->qid2tap[qid] = tap;
7307 *(int *)tap->txa_private = qid;
7308 return sc->sc_addba_request(ni, tap, dialogtoken, baparamset,
7313 iwn_addba_response(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap,
7314 int code, int baparamset, int batimeout)
7316 struct iwn_softc *sc = ni->ni_ic->ic_softc;
7317 int qid = *(int *)tap->txa_private;
7318 uint8_t tid = tap->txa_tid;
7321 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7323 if (code == IEEE80211_STATUS_SUCCESS) {
7324 ni->ni_txseqs[tid] = tap->txa_start & 0xfff;
7325 ret = iwn_ampdu_tx_start(ni->ni_ic, ni, tid);
7329 sc->qid2tap[qid] = NULL;
7330 free(tap->txa_private, M_DEVBUF);
7331 tap->txa_private = NULL;
7333 return sc->sc_addba_response(ni, tap, code, baparamset, batimeout);
7337 * This function is called by upper layer when an ADDBA response is received
7341 iwn_ampdu_tx_start(struct ieee80211com *ic, struct ieee80211_node *ni,
7344 struct ieee80211_tx_ampdu *tap = &ni->ni_tx_ampdu[tid];
7345 struct iwn_softc *sc = ni->ni_ic->ic_softc;
7346 struct iwn_ops *ops = &sc->ops;
7347 struct iwn_node *wn = (void *)ni;
7348 struct iwn_node_info node;
7351 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7353 /* Enable TX for the specified RA/TID. */
7354 wn->disable_tid &= ~(1 << tid);
7355 memset(&node, 0, sizeof node);
7357 node.control = IWN_NODE_UPDATE;
7358 node.flags = IWN_FLAG_SET_DISABLE_TID;
7359 node.disable_tid = htole16(wn->disable_tid);
7360 error = ops->add_node(sc, &node, 1);
7364 if ((error = iwn_nic_lock(sc)) != 0)
7366 qid = *(int *)tap->txa_private;
7367 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: ra=%d tid=%d ssn=%d qid=%d\n",
7368 __func__, wn->id, tid, tap->txa_start, qid);
7369 ops->ampdu_tx_start(sc, ni, qid, tid, tap->txa_start & 0xfff);
7372 iwn_set_link_quality(sc, ni);
7377 iwn_ampdu_tx_stop(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap)
7379 struct iwn_softc *sc = ni->ni_ic->ic_softc;
7380 struct iwn_ops *ops = &sc->ops;
7381 uint8_t tid = tap->txa_tid;
7384 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7386 sc->sc_addba_stop(ni, tap);
7388 if (tap->txa_private == NULL)
7391 qid = *(int *)tap->txa_private;
7392 if (sc->txq[qid].queued != 0)
7394 if (iwn_nic_lock(sc) != 0)
7396 ops->ampdu_tx_stop(sc, qid, tid, tap->txa_start & 0xfff);
7398 sc->qid2tap[qid] = NULL;
7399 free(tap->txa_private, M_DEVBUF);
7400 tap->txa_private = NULL;
7404 iwn4965_ampdu_tx_start(struct iwn_softc *sc, struct ieee80211_node *ni,
7405 int qid, uint8_t tid, uint16_t ssn)
7407 struct iwn_node *wn = (void *)ni;
7409 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7411 /* Stop TX scheduler while we're changing its configuration. */
7412 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid),
7413 IWN4965_TXQ_STATUS_CHGACT);
7415 /* Assign RA/TID translation to the queue. */
7416 iwn_mem_write_2(sc, sc->sched_base + IWN4965_SCHED_TRANS_TBL(qid),
7419 /* Enable chain-building mode for the queue. */
7420 iwn_prph_setbits(sc, IWN4965_SCHED_QCHAIN_SEL, 1 << qid);
7422 /* Set starting sequence number from the ADDBA request. */
7423 sc->txq[qid].cur = sc->txq[qid].read = (ssn & 0xff);
7424 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | (ssn & 0xff));
7425 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_RDPTR(qid), ssn);
7427 /* Set scheduler window size. */
7428 iwn_mem_write(sc, sc->sched_base + IWN4965_SCHED_QUEUE_OFFSET(qid),
7430 /* Set scheduler frame limit. */
7431 iwn_mem_write(sc, sc->sched_base + IWN4965_SCHED_QUEUE_OFFSET(qid) + 4,
7432 IWN_SCHED_LIMIT << 16);
7434 /* Enable interrupts for the queue. */
7435 iwn_prph_setbits(sc, IWN4965_SCHED_INTR_MASK, 1 << qid);
7437 /* Mark the queue as active. */
7438 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid),
7439 IWN4965_TXQ_STATUS_ACTIVE | IWN4965_TXQ_STATUS_AGGR_ENA |
7440 iwn_tid2fifo[tid] << 1);
7444 iwn4965_ampdu_tx_stop(struct iwn_softc *sc, int qid, uint8_t tid, uint16_t ssn)
7446 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7448 /* Stop TX scheduler while we're changing its configuration. */
7449 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid),
7450 IWN4965_TXQ_STATUS_CHGACT);
7452 /* Set starting sequence number from the ADDBA request. */
7453 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | (ssn & 0xff));
7454 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_RDPTR(qid), ssn);
7456 /* Disable interrupts for the queue. */
7457 iwn_prph_clrbits(sc, IWN4965_SCHED_INTR_MASK, 1 << qid);
7459 /* Mark the queue as inactive. */
7460 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid),
7461 IWN4965_TXQ_STATUS_INACTIVE | iwn_tid2fifo[tid] << 1);
7465 iwn5000_ampdu_tx_start(struct iwn_softc *sc, struct ieee80211_node *ni,
7466 int qid, uint8_t tid, uint16_t ssn)
7468 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7470 struct iwn_node *wn = (void *)ni;
7472 /* Stop TX scheduler while we're changing its configuration. */
7473 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
7474 IWN5000_TXQ_STATUS_CHGACT);
7476 /* Assign RA/TID translation to the queue. */
7477 iwn_mem_write_2(sc, sc->sched_base + IWN5000_SCHED_TRANS_TBL(qid),
7480 /* Enable chain-building mode for the queue. */
7481 iwn_prph_setbits(sc, IWN5000_SCHED_QCHAIN_SEL, 1 << qid);
7483 /* Enable aggregation for the queue. */
7484 iwn_prph_setbits(sc, IWN5000_SCHED_AGGR_SEL, 1 << qid);
7486 /* Set starting sequence number from the ADDBA request. */
7487 sc->txq[qid].cur = sc->txq[qid].read = (ssn & 0xff);
7488 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | (ssn & 0xff));
7489 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_RDPTR(qid), ssn);
7491 /* Set scheduler window size and frame limit. */
7492 iwn_mem_write(sc, sc->sched_base + IWN5000_SCHED_QUEUE_OFFSET(qid) + 4,
7493 IWN_SCHED_LIMIT << 16 | IWN_SCHED_WINSZ);
7495 /* Enable interrupts for the queue. */
7496 iwn_prph_setbits(sc, IWN5000_SCHED_INTR_MASK, 1 << qid);
7498 /* Mark the queue as active. */
7499 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
7500 IWN5000_TXQ_STATUS_ACTIVE | iwn_tid2fifo[tid]);
7504 iwn5000_ampdu_tx_stop(struct iwn_softc *sc, int qid, uint8_t tid, uint16_t ssn)
7506 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7508 /* Stop TX scheduler while we're changing its configuration. */
7509 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
7510 IWN5000_TXQ_STATUS_CHGACT);
7512 /* Disable aggregation for the queue. */
7513 iwn_prph_clrbits(sc, IWN5000_SCHED_AGGR_SEL, 1 << qid);
7515 /* Set starting sequence number from the ADDBA request. */
7516 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | (ssn & 0xff));
7517 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_RDPTR(qid), ssn);
7519 /* Disable interrupts for the queue. */
7520 iwn_prph_clrbits(sc, IWN5000_SCHED_INTR_MASK, 1 << qid);
7522 /* Mark the queue as inactive. */
7523 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
7524 IWN5000_TXQ_STATUS_INACTIVE | iwn_tid2fifo[tid]);
7528 * Query calibration tables from the initialization firmware. We do this
7529 * only once at first boot. Called from a process context.
7532 iwn5000_query_calibration(struct iwn_softc *sc)
7534 struct iwn5000_calib_config cmd;
7537 memset(&cmd, 0, sizeof cmd);
7538 cmd.ucode.once.enable = htole32(0xffffffff);
7539 cmd.ucode.once.start = htole32(0xffffffff);
7540 cmd.ucode.once.send = htole32(0xffffffff);
7541 cmd.ucode.flags = htole32(0xffffffff);
7542 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: sending calibration query\n",
7544 error = iwn_cmd(sc, IWN5000_CMD_CALIB_CONFIG, &cmd, sizeof cmd, 0);
7548 /* Wait at most two seconds for calibration to complete. */
7549 if (!(sc->sc_flags & IWN_FLAG_CALIB_DONE))
7550 error = msleep(sc, &sc->sc_mtx, PCATCH, "iwncal", 2 * hz);
7555 * Send calibration results to the runtime firmware. These results were
7556 * obtained on first boot from the initialization firmware.
7559 iwn5000_send_calibration(struct iwn_softc *sc)
7563 for (idx = 0; idx < IWN5000_PHY_CALIB_MAX_RESULT; idx++) {
7564 if (!(sc->base_params->calib_need & (1<<idx))) {
7565 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
7566 "No need of calib %d\n",
7568 continue; /* no need for this calib */
7570 if (sc->calibcmd[idx].buf == NULL) {
7571 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
7572 "Need calib idx : %d but no available data\n",
7577 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
7578 "send calibration result idx=%d len=%d\n", idx,
7579 sc->calibcmd[idx].len);
7580 error = iwn_cmd(sc, IWN_CMD_PHY_CALIB, sc->calibcmd[idx].buf,
7581 sc->calibcmd[idx].len, 0);
7583 device_printf(sc->sc_dev,
7584 "%s: could not send calibration result, error %d\n",
7593 iwn5000_send_wimax_coex(struct iwn_softc *sc)
7595 struct iwn5000_wimax_coex wimax;
7598 if (sc->hw_type == IWN_HW_REV_TYPE_6050) {
7599 /* Enable WiMAX coexistence for combo adapters. */
7601 IWN_WIMAX_COEX_ASSOC_WA_UNMASK |
7602 IWN_WIMAX_COEX_UNASSOC_WA_UNMASK |
7603 IWN_WIMAX_COEX_STA_TABLE_VALID |
7604 IWN_WIMAX_COEX_ENABLE;
7605 memcpy(wimax.events, iwn6050_wimax_events,
7606 sizeof iwn6050_wimax_events);
7610 /* Disable WiMAX coexistence. */
7612 memset(wimax.events, 0, sizeof wimax.events);
7614 DPRINTF(sc, IWN_DEBUG_RESET, "%s: Configuring WiMAX coexistence\n",
7616 return iwn_cmd(sc, IWN5000_CMD_WIMAX_COEX, &wimax, sizeof wimax, 0);
7620 iwn5000_crystal_calib(struct iwn_softc *sc)
7622 struct iwn5000_phy_calib_crystal cmd;
7624 memset(&cmd, 0, sizeof cmd);
7625 cmd.code = IWN5000_PHY_CALIB_CRYSTAL;
7628 cmd.cap_pin[0] = le32toh(sc->eeprom_crystal) & 0xff;
7629 cmd.cap_pin[1] = (le32toh(sc->eeprom_crystal) >> 16) & 0xff;
7630 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "sending crystal calibration %d, %d\n",
7631 cmd.cap_pin[0], cmd.cap_pin[1]);
7632 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 0);
7636 iwn5000_temp_offset_calib(struct iwn_softc *sc)
7638 struct iwn5000_phy_calib_temp_offset cmd;
7640 memset(&cmd, 0, sizeof cmd);
7641 cmd.code = IWN5000_PHY_CALIB_TEMP_OFFSET;
7644 if (sc->eeprom_temp != 0)
7645 cmd.offset = htole16(sc->eeprom_temp);
7647 cmd.offset = htole16(IWN_DEFAULT_TEMP_OFFSET);
7648 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "setting radio sensor offset to %d\n",
7649 le16toh(cmd.offset));
7650 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 0);
7654 iwn5000_temp_offset_calibv2(struct iwn_softc *sc)
7656 struct iwn5000_phy_calib_temp_offsetv2 cmd;
7658 memset(&cmd, 0, sizeof cmd);
7659 cmd.code = IWN5000_PHY_CALIB_TEMP_OFFSET;
7662 if (sc->eeprom_temp != 0) {
7663 cmd.offset_low = htole16(sc->eeprom_temp);
7664 cmd.offset_high = htole16(sc->eeprom_temp_high);
7666 cmd.offset_low = htole16(IWN_DEFAULT_TEMP_OFFSET);
7667 cmd.offset_high = htole16(IWN_DEFAULT_TEMP_OFFSET);
7669 cmd.burnt_voltage_ref = htole16(sc->eeprom_voltage);
7671 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
7672 "setting radio sensor low offset to %d, high offset to %d, voltage to %d\n",
7673 le16toh(cmd.offset_low),
7674 le16toh(cmd.offset_high),
7675 le16toh(cmd.burnt_voltage_ref));
7677 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 0);
7681 * This function is called after the runtime firmware notifies us of its
7682 * readiness (called in a process context).
7685 iwn4965_post_alive(struct iwn_softc *sc)
7689 if ((error = iwn_nic_lock(sc)) != 0)
7692 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7694 /* Clear TX scheduler state in SRAM. */
7695 sc->sched_base = iwn_prph_read(sc, IWN_SCHED_SRAM_ADDR);
7696 iwn_mem_set_region_4(sc, sc->sched_base + IWN4965_SCHED_CTX_OFF, 0,
7697 IWN4965_SCHED_CTX_LEN / sizeof (uint32_t));
7699 /* Set physical address of TX scheduler rings (1KB aligned). */
7700 iwn_prph_write(sc, IWN4965_SCHED_DRAM_ADDR, sc->sched_dma.paddr >> 10);
7702 IWN_SETBITS(sc, IWN_FH_TX_CHICKEN, IWN_FH_TX_CHICKEN_SCHED_RETRY);
7704 /* Disable chain mode for all our 16 queues. */
7705 iwn_prph_write(sc, IWN4965_SCHED_QCHAIN_SEL, 0);
7707 for (qid = 0; qid < IWN4965_NTXQUEUES; qid++) {
7708 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_RDPTR(qid), 0);
7709 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | 0);
7711 /* Set scheduler window size. */
7712 iwn_mem_write(sc, sc->sched_base +
7713 IWN4965_SCHED_QUEUE_OFFSET(qid), IWN_SCHED_WINSZ);
7714 /* Set scheduler frame limit. */
7715 iwn_mem_write(sc, sc->sched_base +
7716 IWN4965_SCHED_QUEUE_OFFSET(qid) + 4,
7717 IWN_SCHED_LIMIT << 16);
7720 /* Enable interrupts for all our 16 queues. */
7721 iwn_prph_write(sc, IWN4965_SCHED_INTR_MASK, 0xffff);
7722 /* Identify TX FIFO rings (0-7). */
7723 iwn_prph_write(sc, IWN4965_SCHED_TXFACT, 0xff);
7725 /* Mark TX rings (4 EDCA + cmd + 2 HCCA) as active. */
7726 for (qid = 0; qid < 7; qid++) {
7727 static uint8_t qid2fifo[] = { 3, 2, 1, 0, 4, 5, 6 };
7728 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid),
7729 IWN4965_TXQ_STATUS_ACTIVE | qid2fifo[qid] << 1);
7736 * This function is called after the initialization or runtime firmware
7737 * notifies us of its readiness (called in a process context).
7740 iwn5000_post_alive(struct iwn_softc *sc)
7744 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
7746 /* Switch to using ICT interrupt mode. */
7747 iwn5000_ict_reset(sc);
7749 if ((error = iwn_nic_lock(sc)) != 0){
7750 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end in error\n", __func__);
7754 /* Clear TX scheduler state in SRAM. */
7755 sc->sched_base = iwn_prph_read(sc, IWN_SCHED_SRAM_ADDR);
7756 iwn_mem_set_region_4(sc, sc->sched_base + IWN5000_SCHED_CTX_OFF, 0,
7757 IWN5000_SCHED_CTX_LEN / sizeof (uint32_t));
7759 /* Set physical address of TX scheduler rings (1KB aligned). */
7760 iwn_prph_write(sc, IWN5000_SCHED_DRAM_ADDR, sc->sched_dma.paddr >> 10);
7762 IWN_SETBITS(sc, IWN_FH_TX_CHICKEN, IWN_FH_TX_CHICKEN_SCHED_RETRY);
7764 /* Enable chain mode for all queues, except command queue. */
7765 if (sc->sc_flags & IWN_FLAG_PAN_SUPPORT)
7766 iwn_prph_write(sc, IWN5000_SCHED_QCHAIN_SEL, 0xfffdf);
7768 iwn_prph_write(sc, IWN5000_SCHED_QCHAIN_SEL, 0xfffef);
7769 iwn_prph_write(sc, IWN5000_SCHED_AGGR_SEL, 0);
7771 for (qid = 0; qid < IWN5000_NTXQUEUES; qid++) {
7772 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_RDPTR(qid), 0);
7773 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | 0);
7775 iwn_mem_write(sc, sc->sched_base +
7776 IWN5000_SCHED_QUEUE_OFFSET(qid), 0);
7777 /* Set scheduler window size and frame limit. */
7778 iwn_mem_write(sc, sc->sched_base +
7779 IWN5000_SCHED_QUEUE_OFFSET(qid) + 4,
7780 IWN_SCHED_LIMIT << 16 | IWN_SCHED_WINSZ);
7783 /* Enable interrupts for all our 20 queues. */
7784 iwn_prph_write(sc, IWN5000_SCHED_INTR_MASK, 0xfffff);
7785 /* Identify TX FIFO rings (0-7). */
7786 iwn_prph_write(sc, IWN5000_SCHED_TXFACT, 0xff);
7788 /* Mark TX rings (4 EDCA + cmd + 2 HCCA) as active. */
7789 if (sc->sc_flags & IWN_FLAG_PAN_SUPPORT) {
7790 /* Mark TX rings as active. */
7791 for (qid = 0; qid < 11; qid++) {
7792 static uint8_t qid2fifo[] = { 3, 2, 1, 0, 0, 4, 2, 5, 4, 7, 5 };
7793 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
7794 IWN5000_TXQ_STATUS_ACTIVE | qid2fifo[qid]);
7797 /* Mark TX rings (4 EDCA + cmd + 2 HCCA) as active. */
7798 for (qid = 0; qid < 7; qid++) {
7799 static uint8_t qid2fifo[] = { 3, 2, 1, 0, 7, 5, 6 };
7800 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
7801 IWN5000_TXQ_STATUS_ACTIVE | qid2fifo[qid]);
7806 /* Configure WiMAX coexistence for combo adapters. */
7807 error = iwn5000_send_wimax_coex(sc);
7809 device_printf(sc->sc_dev,
7810 "%s: could not configure WiMAX coexistence, error %d\n",
7814 if (sc->hw_type != IWN_HW_REV_TYPE_5150) {
7815 /* Perform crystal calibration. */
7816 error = iwn5000_crystal_calib(sc);
7818 device_printf(sc->sc_dev,
7819 "%s: crystal calibration failed, error %d\n",
7824 if (!(sc->sc_flags & IWN_FLAG_CALIB_DONE)) {
7825 /* Query calibration from the initialization firmware. */
7826 if ((error = iwn5000_query_calibration(sc)) != 0) {
7827 device_printf(sc->sc_dev,
7828 "%s: could not query calibration, error %d\n",
7833 * We have the calibration results now, reboot with the
7834 * runtime firmware (call ourselves recursively!)
7837 error = iwn_hw_init(sc);
7839 /* Send calibration results to runtime firmware. */
7840 error = iwn5000_send_calibration(sc);
7843 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
7849 * The firmware boot code is small and is intended to be copied directly into
7850 * the NIC internal memory (no DMA transfer).
7853 iwn4965_load_bootcode(struct iwn_softc *sc, const uint8_t *ucode, int size)
7857 size /= sizeof (uint32_t);
7859 if ((error = iwn_nic_lock(sc)) != 0)
7862 /* Copy microcode image into NIC memory. */
7863 iwn_prph_write_region_4(sc, IWN_BSM_SRAM_BASE,
7864 (const uint32_t *)ucode, size);
7866 iwn_prph_write(sc, IWN_BSM_WR_MEM_SRC, 0);
7867 iwn_prph_write(sc, IWN_BSM_WR_MEM_DST, IWN_FW_TEXT_BASE);
7868 iwn_prph_write(sc, IWN_BSM_WR_DWCOUNT, size);
7870 /* Start boot load now. */
7871 iwn_prph_write(sc, IWN_BSM_WR_CTRL, IWN_BSM_WR_CTRL_START);
7873 /* Wait for transfer to complete. */
7874 for (ntries = 0; ntries < 1000; ntries++) {
7875 if (!(iwn_prph_read(sc, IWN_BSM_WR_CTRL) &
7876 IWN_BSM_WR_CTRL_START))
7880 if (ntries == 1000) {
7881 device_printf(sc->sc_dev, "%s: could not load boot firmware\n",
7887 /* Enable boot after power up. */
7888 iwn_prph_write(sc, IWN_BSM_WR_CTRL, IWN_BSM_WR_CTRL_START_EN);
7895 iwn4965_load_firmware(struct iwn_softc *sc)
7897 struct iwn_fw_info *fw = &sc->fw;
7898 struct iwn_dma_info *dma = &sc->fw_dma;
7901 /* Copy initialization sections into pre-allocated DMA-safe memory. */
7902 memcpy(dma->vaddr, fw->init.data, fw->init.datasz);
7903 bus_dmamap_sync(dma->tag, dma->map, BUS_DMASYNC_PREWRITE);
7904 memcpy(dma->vaddr + IWN4965_FW_DATA_MAXSZ,
7905 fw->init.text, fw->init.textsz);
7906 bus_dmamap_sync(dma->tag, dma->map, BUS_DMASYNC_PREWRITE);
7908 /* Tell adapter where to find initialization sections. */
7909 if ((error = iwn_nic_lock(sc)) != 0)
7911 iwn_prph_write(sc, IWN_BSM_DRAM_DATA_ADDR, dma->paddr >> 4);
7912 iwn_prph_write(sc, IWN_BSM_DRAM_DATA_SIZE, fw->init.datasz);
7913 iwn_prph_write(sc, IWN_BSM_DRAM_TEXT_ADDR,
7914 (dma->paddr + IWN4965_FW_DATA_MAXSZ) >> 4);
7915 iwn_prph_write(sc, IWN_BSM_DRAM_TEXT_SIZE, fw->init.textsz);
7918 /* Load firmware boot code. */
7919 error = iwn4965_load_bootcode(sc, fw->boot.text, fw->boot.textsz);
7921 device_printf(sc->sc_dev, "%s: could not load boot firmware\n",
7925 /* Now press "execute". */
7926 IWN_WRITE(sc, IWN_RESET, 0);
7928 /* Wait at most one second for first alive notification. */
7929 if ((error = msleep(sc, &sc->sc_mtx, PCATCH, "iwninit", hz)) != 0) {
7930 device_printf(sc->sc_dev,
7931 "%s: timeout waiting for adapter to initialize, error %d\n",
7936 /* Retrieve current temperature for initial TX power calibration. */
7937 sc->rawtemp = sc->ucode_info.temp[3].chan20MHz;
7938 sc->temp = iwn4965_get_temperature(sc);
7940 /* Copy runtime sections into pre-allocated DMA-safe memory. */
7941 memcpy(dma->vaddr, fw->main.data, fw->main.datasz);
7942 bus_dmamap_sync(dma->tag, dma->map, BUS_DMASYNC_PREWRITE);
7943 memcpy(dma->vaddr + IWN4965_FW_DATA_MAXSZ,
7944 fw->main.text, fw->main.textsz);
7945 bus_dmamap_sync(dma->tag, dma->map, BUS_DMASYNC_PREWRITE);
7947 /* Tell adapter where to find runtime sections. */
7948 if ((error = iwn_nic_lock(sc)) != 0)
7950 iwn_prph_write(sc, IWN_BSM_DRAM_DATA_ADDR, dma->paddr >> 4);
7951 iwn_prph_write(sc, IWN_BSM_DRAM_DATA_SIZE, fw->main.datasz);
7952 iwn_prph_write(sc, IWN_BSM_DRAM_TEXT_ADDR,
7953 (dma->paddr + IWN4965_FW_DATA_MAXSZ) >> 4);
7954 iwn_prph_write(sc, IWN_BSM_DRAM_TEXT_SIZE,
7955 IWN_FW_UPDATED | fw->main.textsz);
7962 iwn5000_load_firmware_section(struct iwn_softc *sc, uint32_t dst,
7963 const uint8_t *section, int size)
7965 struct iwn_dma_info *dma = &sc->fw_dma;
7968 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7970 /* Copy firmware section into pre-allocated DMA-safe memory. */
7971 memcpy(dma->vaddr, section, size);
7972 bus_dmamap_sync(dma->tag, dma->map, BUS_DMASYNC_PREWRITE);
7974 if ((error = iwn_nic_lock(sc)) != 0)
7977 IWN_WRITE(sc, IWN_FH_TX_CONFIG(IWN_SRVC_DMACHNL),
7978 IWN_FH_TX_CONFIG_DMA_PAUSE);
7980 IWN_WRITE(sc, IWN_FH_SRAM_ADDR(IWN_SRVC_DMACHNL), dst);
7981 IWN_WRITE(sc, IWN_FH_TFBD_CTRL0(IWN_SRVC_DMACHNL),
7982 IWN_LOADDR(dma->paddr));
7983 IWN_WRITE(sc, IWN_FH_TFBD_CTRL1(IWN_SRVC_DMACHNL),
7984 IWN_HIADDR(dma->paddr) << 28 | size);
7985 IWN_WRITE(sc, IWN_FH_TXBUF_STATUS(IWN_SRVC_DMACHNL),
7986 IWN_FH_TXBUF_STATUS_TBNUM(1) |
7987 IWN_FH_TXBUF_STATUS_TBIDX(1) |
7988 IWN_FH_TXBUF_STATUS_TFBD_VALID);
7990 /* Kick Flow Handler to start DMA transfer. */
7991 IWN_WRITE(sc, IWN_FH_TX_CONFIG(IWN_SRVC_DMACHNL),
7992 IWN_FH_TX_CONFIG_DMA_ENA | IWN_FH_TX_CONFIG_CIRQ_HOST_ENDTFD);
7996 /* Wait at most five seconds for FH DMA transfer to complete. */
7997 return msleep(sc, &sc->sc_mtx, PCATCH, "iwninit", 5 * hz);
8001 iwn5000_load_firmware(struct iwn_softc *sc)
8003 struct iwn_fw_part *fw;
8006 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8008 /* Load the initialization firmware on first boot only. */
8009 fw = (sc->sc_flags & IWN_FLAG_CALIB_DONE) ?
8010 &sc->fw.main : &sc->fw.init;
8012 error = iwn5000_load_firmware_section(sc, IWN_FW_TEXT_BASE,
8013 fw->text, fw->textsz);
8015 device_printf(sc->sc_dev,
8016 "%s: could not load firmware %s section, error %d\n",
8017 __func__, ".text", error);
8020 error = iwn5000_load_firmware_section(sc, IWN_FW_DATA_BASE,
8021 fw->data, fw->datasz);
8023 device_printf(sc->sc_dev,
8024 "%s: could not load firmware %s section, error %d\n",
8025 __func__, ".data", error);
8029 /* Now press "execute". */
8030 IWN_WRITE(sc, IWN_RESET, 0);
8035 * Extract text and data sections from a legacy firmware image.
8038 iwn_read_firmware_leg(struct iwn_softc *sc, struct iwn_fw_info *fw)
8040 const uint32_t *ptr;
8044 ptr = (const uint32_t *)fw->data;
8045 rev = le32toh(*ptr++);
8047 sc->ucode_rev = rev;
8049 /* Check firmware API version. */
8050 if (IWN_FW_API(rev) <= 1) {
8051 device_printf(sc->sc_dev,
8052 "%s: bad firmware, need API version >=2\n", __func__);
8055 if (IWN_FW_API(rev) >= 3) {
8056 /* Skip build number (version 2 header). */
8060 if (fw->size < hdrlen) {
8061 device_printf(sc->sc_dev, "%s: firmware too short: %zu bytes\n",
8062 __func__, fw->size);
8065 fw->main.textsz = le32toh(*ptr++);
8066 fw->main.datasz = le32toh(*ptr++);
8067 fw->init.textsz = le32toh(*ptr++);
8068 fw->init.datasz = le32toh(*ptr++);
8069 fw->boot.textsz = le32toh(*ptr++);
8071 /* Check that all firmware sections fit. */
8072 if (fw->size < hdrlen + fw->main.textsz + fw->main.datasz +
8073 fw->init.textsz + fw->init.datasz + fw->boot.textsz) {
8074 device_printf(sc->sc_dev, "%s: firmware too short: %zu bytes\n",
8075 __func__, fw->size);
8079 /* Get pointers to firmware sections. */
8080 fw->main.text = (const uint8_t *)ptr;
8081 fw->main.data = fw->main.text + fw->main.textsz;
8082 fw->init.text = fw->main.data + fw->main.datasz;
8083 fw->init.data = fw->init.text + fw->init.textsz;
8084 fw->boot.text = fw->init.data + fw->init.datasz;
8089 * Extract text and data sections from a TLV firmware image.
8092 iwn_read_firmware_tlv(struct iwn_softc *sc, struct iwn_fw_info *fw,
8095 const struct iwn_fw_tlv_hdr *hdr;
8096 const struct iwn_fw_tlv *tlv;
8097 const uint8_t *ptr, *end;
8101 if (fw->size < sizeof (*hdr)) {
8102 device_printf(sc->sc_dev, "%s: firmware too short: %zu bytes\n",
8103 __func__, fw->size);
8106 hdr = (const struct iwn_fw_tlv_hdr *)fw->data;
8107 if (hdr->signature != htole32(IWN_FW_SIGNATURE)) {
8108 device_printf(sc->sc_dev, "%s: bad firmware signature 0x%08x\n",
8109 __func__, le32toh(hdr->signature));
8112 DPRINTF(sc, IWN_DEBUG_RESET, "FW: \"%.64s\", build 0x%x\n", hdr->descr,
8113 le32toh(hdr->build));
8114 sc->ucode_rev = le32toh(hdr->rev);
8117 * Select the closest supported alternative that is less than
8118 * or equal to the specified one.
8120 altmask = le64toh(hdr->altmask);
8121 while (alt > 0 && !(altmask & (1ULL << alt)))
8122 alt--; /* Downgrade. */
8123 DPRINTF(sc, IWN_DEBUG_RESET, "using alternative %d\n", alt);
8125 ptr = (const uint8_t *)(hdr + 1);
8126 end = (const uint8_t *)(fw->data + fw->size);
8128 /* Parse type-length-value fields. */
8129 while (ptr + sizeof (*tlv) <= end) {
8130 tlv = (const struct iwn_fw_tlv *)ptr;
8131 len = le32toh(tlv->len);
8133 ptr += sizeof (*tlv);
8134 if (ptr + len > end) {
8135 device_printf(sc->sc_dev,
8136 "%s: firmware too short: %zu bytes\n", __func__,
8140 /* Skip other alternatives. */
8141 if (tlv->alt != 0 && tlv->alt != htole16(alt))
8144 switch (le16toh(tlv->type)) {
8145 case IWN_FW_TLV_MAIN_TEXT:
8146 fw->main.text = ptr;
8147 fw->main.textsz = len;
8149 case IWN_FW_TLV_MAIN_DATA:
8150 fw->main.data = ptr;
8151 fw->main.datasz = len;
8153 case IWN_FW_TLV_INIT_TEXT:
8154 fw->init.text = ptr;
8155 fw->init.textsz = len;
8157 case IWN_FW_TLV_INIT_DATA:
8158 fw->init.data = ptr;
8159 fw->init.datasz = len;
8161 case IWN_FW_TLV_BOOT_TEXT:
8162 fw->boot.text = ptr;
8163 fw->boot.textsz = len;
8165 case IWN_FW_TLV_ENH_SENS:
8167 sc->sc_flags |= IWN_FLAG_ENH_SENS;
8169 case IWN_FW_TLV_PHY_CALIB:
8170 tmp = le32toh(*ptr);
8172 sc->reset_noise_gain = tmp;
8173 sc->noise_gain = tmp + 1;
8176 case IWN_FW_TLV_PAN:
8177 sc->sc_flags |= IWN_FLAG_PAN_SUPPORT;
8178 DPRINTF(sc, IWN_DEBUG_RESET,
8179 "PAN Support found: %d\n", 1);
8181 case IWN_FW_TLV_FLAGS:
8182 if (len < sizeof(uint32_t))
8184 if (len % sizeof(uint32_t))
8186 sc->tlv_feature_flags = le32toh(*ptr);
8187 DPRINTF(sc, IWN_DEBUG_RESET,
8188 "%s: feature: 0x%08x\n",
8190 sc->tlv_feature_flags);
8192 case IWN_FW_TLV_PBREQ_MAXLEN:
8193 case IWN_FW_TLV_RUNT_EVTLOG_PTR:
8194 case IWN_FW_TLV_RUNT_EVTLOG_SIZE:
8195 case IWN_FW_TLV_RUNT_ERRLOG_PTR:
8196 case IWN_FW_TLV_INIT_EVTLOG_PTR:
8197 case IWN_FW_TLV_INIT_EVTLOG_SIZE:
8198 case IWN_FW_TLV_INIT_ERRLOG_PTR:
8199 case IWN_FW_TLV_WOWLAN_INST:
8200 case IWN_FW_TLV_WOWLAN_DATA:
8201 DPRINTF(sc, IWN_DEBUG_RESET,
8202 "TLV type %d recognized but not handled\n",
8203 le16toh(tlv->type));
8206 DPRINTF(sc, IWN_DEBUG_RESET,
8207 "TLV type %d not handled\n", le16toh(tlv->type));
8210 next: /* TLV fields are 32-bit aligned. */
8211 ptr += (len + 3) & ~3;
8217 iwn_read_firmware(struct iwn_softc *sc)
8219 struct iwn_fw_info *fw = &sc->fw;
8222 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8226 memset(fw, 0, sizeof (*fw));
8228 /* Read firmware image from filesystem. */
8229 sc->fw_fp = firmware_get(sc->fwname);
8230 if (sc->fw_fp == NULL) {
8231 device_printf(sc->sc_dev, "%s: could not read firmware %s\n",
8232 __func__, sc->fwname);
8238 fw->size = sc->fw_fp->datasize;
8239 fw->data = (const uint8_t *)sc->fw_fp->data;
8240 if (fw->size < sizeof (uint32_t)) {
8241 device_printf(sc->sc_dev, "%s: firmware too short: %zu bytes\n",
8242 __func__, fw->size);
8247 /* Retrieve text and data sections. */
8248 if (*(const uint32_t *)fw->data != 0) /* Legacy image. */
8249 error = iwn_read_firmware_leg(sc, fw);
8251 error = iwn_read_firmware_tlv(sc, fw, 1);
8253 device_printf(sc->sc_dev,
8254 "%s: could not read firmware sections, error %d\n",
8259 device_printf(sc->sc_dev, "%s: ucode rev=0x%08x\n", __func__, sc->ucode_rev);
8261 /* Make sure text and data sections fit in hardware memory. */
8262 if (fw->main.textsz > sc->fw_text_maxsz ||
8263 fw->main.datasz > sc->fw_data_maxsz ||
8264 fw->init.textsz > sc->fw_text_maxsz ||
8265 fw->init.datasz > sc->fw_data_maxsz ||
8266 fw->boot.textsz > IWN_FW_BOOT_TEXT_MAXSZ ||
8267 (fw->boot.textsz & 3) != 0) {
8268 device_printf(sc->sc_dev, "%s: firmware sections too large\n",
8274 /* We can proceed with loading the firmware. */
8277 fail: iwn_unload_firmware(sc);
8282 iwn_unload_firmware(struct iwn_softc *sc)
8284 firmware_put(sc->fw_fp, FIRMWARE_UNLOAD);
8289 iwn_clock_wait(struct iwn_softc *sc)
8293 /* Set "initialization complete" bit. */
8294 IWN_SETBITS(sc, IWN_GP_CNTRL, IWN_GP_CNTRL_INIT_DONE);
8296 /* Wait for clock stabilization. */
8297 for (ntries = 0; ntries < 2500; ntries++) {
8298 if (IWN_READ(sc, IWN_GP_CNTRL) & IWN_GP_CNTRL_MAC_CLOCK_READY)
8302 device_printf(sc->sc_dev,
8303 "%s: timeout waiting for clock stabilization\n", __func__);
8308 iwn_apm_init(struct iwn_softc *sc)
8313 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8315 /* Disable L0s exit timer (NMI bug workaround). */
8316 IWN_SETBITS(sc, IWN_GIO_CHICKEN, IWN_GIO_CHICKEN_DIS_L0S_TIMER);
8317 /* Don't wait for ICH L0s (ICH bug workaround). */
8318 IWN_SETBITS(sc, IWN_GIO_CHICKEN, IWN_GIO_CHICKEN_L1A_NO_L0S_RX);
8320 /* Set FH wait threshold to max (HW bug under stress workaround). */
8321 IWN_SETBITS(sc, IWN_DBG_HPET_MEM, 0xffff0000);
8323 /* Enable HAP INTA to move adapter from L1a to L0s. */
8324 IWN_SETBITS(sc, IWN_HW_IF_CONFIG, IWN_HW_IF_CONFIG_HAP_WAKE_L1A);
8326 /* Retrieve PCIe Active State Power Management (ASPM). */
8327 reg = pci_read_config(sc->sc_dev, sc->sc_cap_off + PCIER_LINK_CTL, 4);
8328 /* Workaround for HW instability in PCIe L0->L0s->L1 transition. */
8329 if (reg & PCIEM_LINK_CTL_ASPMC_L1) /* L1 Entry enabled. */
8330 IWN_SETBITS(sc, IWN_GIO, IWN_GIO_L0S_ENA);
8332 IWN_CLRBITS(sc, IWN_GIO, IWN_GIO_L0S_ENA);
8334 if (sc->base_params->pll_cfg_val)
8335 IWN_SETBITS(sc, IWN_ANA_PLL, sc->base_params->pll_cfg_val);
8337 /* Wait for clock stabilization before accessing prph. */
8338 if ((error = iwn_clock_wait(sc)) != 0)
8341 if ((error = iwn_nic_lock(sc)) != 0)
8343 if (sc->hw_type == IWN_HW_REV_TYPE_4965) {
8344 /* Enable DMA and BSM (Bootstrap State Machine). */
8345 iwn_prph_write(sc, IWN_APMG_CLK_EN,
8346 IWN_APMG_CLK_CTRL_DMA_CLK_RQT |
8347 IWN_APMG_CLK_CTRL_BSM_CLK_RQT);
8350 iwn_prph_write(sc, IWN_APMG_CLK_EN,
8351 IWN_APMG_CLK_CTRL_DMA_CLK_RQT);
8354 /* Disable L1-Active. */
8355 iwn_prph_setbits(sc, IWN_APMG_PCI_STT, IWN_APMG_PCI_STT_L1A_DIS);
8362 iwn_apm_stop_master(struct iwn_softc *sc)
8366 /* Stop busmaster DMA activity. */
8367 IWN_SETBITS(sc, IWN_RESET, IWN_RESET_STOP_MASTER);
8368 for (ntries = 0; ntries < 100; ntries++) {
8369 if (IWN_READ(sc, IWN_RESET) & IWN_RESET_MASTER_DISABLED)
8373 device_printf(sc->sc_dev, "%s: timeout waiting for master\n", __func__);
8377 iwn_apm_stop(struct iwn_softc *sc)
8379 iwn_apm_stop_master(sc);
8381 /* Reset the entire device. */
8382 IWN_SETBITS(sc, IWN_RESET, IWN_RESET_SW);
8384 /* Clear "initialization complete" bit. */
8385 IWN_CLRBITS(sc, IWN_GP_CNTRL, IWN_GP_CNTRL_INIT_DONE);
8389 iwn4965_nic_config(struct iwn_softc *sc)
8391 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8393 if (IWN_RFCFG_TYPE(sc->rfcfg) == 1) {
8395 * I don't believe this to be correct but this is what the
8396 * vendor driver is doing. Probably the bits should not be
8397 * shifted in IWN_RFCFG_*.
8399 IWN_SETBITS(sc, IWN_HW_IF_CONFIG,
8400 IWN_RFCFG_TYPE(sc->rfcfg) |
8401 IWN_RFCFG_STEP(sc->rfcfg) |
8402 IWN_RFCFG_DASH(sc->rfcfg));
8404 IWN_SETBITS(sc, IWN_HW_IF_CONFIG,
8405 IWN_HW_IF_CONFIG_RADIO_SI | IWN_HW_IF_CONFIG_MAC_SI);
8410 iwn5000_nic_config(struct iwn_softc *sc)
8415 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8417 if (IWN_RFCFG_TYPE(sc->rfcfg) < 3) {
8418 IWN_SETBITS(sc, IWN_HW_IF_CONFIG,
8419 IWN_RFCFG_TYPE(sc->rfcfg) |
8420 IWN_RFCFG_STEP(sc->rfcfg) |
8421 IWN_RFCFG_DASH(sc->rfcfg));
8423 IWN_SETBITS(sc, IWN_HW_IF_CONFIG,
8424 IWN_HW_IF_CONFIG_RADIO_SI | IWN_HW_IF_CONFIG_MAC_SI);
8426 if ((error = iwn_nic_lock(sc)) != 0)
8428 iwn_prph_setbits(sc, IWN_APMG_PS, IWN_APMG_PS_EARLY_PWROFF_DIS);
8430 if (sc->hw_type == IWN_HW_REV_TYPE_1000) {
8432 * Select first Switching Voltage Regulator (1.32V) to
8433 * solve a stability issue related to noisy DC2DC line
8434 * in the silicon of 1000 Series.
8436 tmp = iwn_prph_read(sc, IWN_APMG_DIGITAL_SVR);
8437 tmp &= ~IWN_APMG_DIGITAL_SVR_VOLTAGE_MASK;
8438 tmp |= IWN_APMG_DIGITAL_SVR_VOLTAGE_1_32;
8439 iwn_prph_write(sc, IWN_APMG_DIGITAL_SVR, tmp);
8443 if (sc->sc_flags & IWN_FLAG_INTERNAL_PA) {
8444 /* Use internal power amplifier only. */
8445 IWN_WRITE(sc, IWN_GP_DRIVER, IWN_GP_DRIVER_RADIO_2X2_IPA);
8447 if (sc->base_params->additional_nic_config && sc->calib_ver >= 6) {
8448 /* Indicate that ROM calibration version is >=6. */
8449 IWN_SETBITS(sc, IWN_GP_DRIVER, IWN_GP_DRIVER_CALIB_VER6);
8451 if (sc->base_params->additional_gp_drv_bit)
8452 IWN_SETBITS(sc, IWN_GP_DRIVER,
8453 sc->base_params->additional_gp_drv_bit);
8458 * Take NIC ownership over Intel Active Management Technology (AMT).
8461 iwn_hw_prepare(struct iwn_softc *sc)
8465 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8467 /* Check if hardware is ready. */
8468 IWN_SETBITS(sc, IWN_HW_IF_CONFIG, IWN_HW_IF_CONFIG_NIC_READY);
8469 for (ntries = 0; ntries < 5; ntries++) {
8470 if (IWN_READ(sc, IWN_HW_IF_CONFIG) &
8471 IWN_HW_IF_CONFIG_NIC_READY)
8476 /* Hardware not ready, force into ready state. */
8477 IWN_SETBITS(sc, IWN_HW_IF_CONFIG, IWN_HW_IF_CONFIG_PREPARE);
8478 for (ntries = 0; ntries < 15000; ntries++) {
8479 if (!(IWN_READ(sc, IWN_HW_IF_CONFIG) &
8480 IWN_HW_IF_CONFIG_PREPARE_DONE))
8484 if (ntries == 15000)
8487 /* Hardware should be ready now. */
8488 IWN_SETBITS(sc, IWN_HW_IF_CONFIG, IWN_HW_IF_CONFIG_NIC_READY);
8489 for (ntries = 0; ntries < 5; ntries++) {
8490 if (IWN_READ(sc, IWN_HW_IF_CONFIG) &
8491 IWN_HW_IF_CONFIG_NIC_READY)
8499 iwn_hw_init(struct iwn_softc *sc)
8501 struct iwn_ops *ops = &sc->ops;
8502 int error, chnl, qid;
8504 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
8506 /* Clear pending interrupts. */
8507 IWN_WRITE(sc, IWN_INT, 0xffffffff);
8509 if ((error = iwn_apm_init(sc)) != 0) {
8510 device_printf(sc->sc_dev,
8511 "%s: could not power ON adapter, error %d\n", __func__,
8516 /* Select VMAIN power source. */
8517 if ((error = iwn_nic_lock(sc)) != 0)
8519 iwn_prph_clrbits(sc, IWN_APMG_PS, IWN_APMG_PS_PWR_SRC_MASK);
8522 /* Perform adapter-specific initialization. */
8523 if ((error = ops->nic_config(sc)) != 0)
8526 /* Initialize RX ring. */
8527 if ((error = iwn_nic_lock(sc)) != 0)
8529 IWN_WRITE(sc, IWN_FH_RX_CONFIG, 0);
8530 IWN_WRITE(sc, IWN_FH_RX_WPTR, 0);
8531 /* Set physical address of RX ring (256-byte aligned). */
8532 IWN_WRITE(sc, IWN_FH_RX_BASE, sc->rxq.desc_dma.paddr >> 8);
8533 /* Set physical address of RX status (16-byte aligned). */
8534 IWN_WRITE(sc, IWN_FH_STATUS_WPTR, sc->rxq.stat_dma.paddr >> 4);
8536 IWN_WRITE(sc, IWN_FH_RX_CONFIG,
8537 IWN_FH_RX_CONFIG_ENA |
8538 IWN_FH_RX_CONFIG_IGN_RXF_EMPTY | /* HW bug workaround */
8539 IWN_FH_RX_CONFIG_IRQ_DST_HOST |
8540 IWN_FH_RX_CONFIG_SINGLE_FRAME |
8541 IWN_FH_RX_CONFIG_RB_TIMEOUT(0) |
8542 IWN_FH_RX_CONFIG_NRBD(IWN_RX_RING_COUNT_LOG));
8544 IWN_WRITE(sc, IWN_FH_RX_WPTR, (IWN_RX_RING_COUNT - 1) & ~7);
8546 if ((error = iwn_nic_lock(sc)) != 0)
8549 /* Initialize TX scheduler. */
8550 iwn_prph_write(sc, sc->sched_txfact_addr, 0);
8552 /* Set physical address of "keep warm" page (16-byte aligned). */
8553 IWN_WRITE(sc, IWN_FH_KW_ADDR, sc->kw_dma.paddr >> 4);
8555 /* Initialize TX rings. */
8556 for (qid = 0; qid < sc->ntxqs; qid++) {
8557 struct iwn_tx_ring *txq = &sc->txq[qid];
8559 /* Set physical address of TX ring (256-byte aligned). */
8560 IWN_WRITE(sc, IWN_FH_CBBC_QUEUE(qid),
8561 txq->desc_dma.paddr >> 8);
8565 /* Enable DMA channels. */
8566 for (chnl = 0; chnl < sc->ndmachnls; chnl++) {
8567 IWN_WRITE(sc, IWN_FH_TX_CONFIG(chnl),
8568 IWN_FH_TX_CONFIG_DMA_ENA |
8569 IWN_FH_TX_CONFIG_DMA_CREDIT_ENA);
8572 /* Clear "radio off" and "commands blocked" bits. */
8573 IWN_WRITE(sc, IWN_UCODE_GP1_CLR, IWN_UCODE_GP1_RFKILL);
8574 IWN_WRITE(sc, IWN_UCODE_GP1_CLR, IWN_UCODE_GP1_CMD_BLOCKED);
8576 /* Clear pending interrupts. */
8577 IWN_WRITE(sc, IWN_INT, 0xffffffff);
8578 /* Enable interrupt coalescing. */
8579 IWN_WRITE(sc, IWN_INT_COALESCING, 512 / 8);
8580 /* Enable interrupts. */
8581 IWN_WRITE(sc, IWN_INT_MASK, sc->int_mask);
8583 /* _Really_ make sure "radio off" bit is cleared! */
8584 IWN_WRITE(sc, IWN_UCODE_GP1_CLR, IWN_UCODE_GP1_RFKILL);
8585 IWN_WRITE(sc, IWN_UCODE_GP1_CLR, IWN_UCODE_GP1_RFKILL);
8587 /* Enable shadow registers. */
8588 if (sc->base_params->shadow_reg_enable)
8589 IWN_SETBITS(sc, IWN_SHADOW_REG_CTRL, 0x800fffff);
8591 if ((error = ops->load_firmware(sc)) != 0) {
8592 device_printf(sc->sc_dev,
8593 "%s: could not load firmware, error %d\n", __func__,
8597 /* Wait at most one second for firmware alive notification. */
8598 if ((error = msleep(sc, &sc->sc_mtx, PCATCH, "iwninit", hz)) != 0) {
8599 device_printf(sc->sc_dev,
8600 "%s: timeout waiting for adapter to initialize, error %d\n",
8604 /* Do post-firmware initialization. */
8606 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
8608 return ops->post_alive(sc);
8612 iwn_hw_stop(struct iwn_softc *sc)
8614 int chnl, qid, ntries;
8616 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8618 IWN_WRITE(sc, IWN_RESET, IWN_RESET_NEVO);
8620 /* Disable interrupts. */
8621 IWN_WRITE(sc, IWN_INT_MASK, 0);
8622 IWN_WRITE(sc, IWN_INT, 0xffffffff);
8623 IWN_WRITE(sc, IWN_FH_INT, 0xffffffff);
8624 sc->sc_flags &= ~IWN_FLAG_USE_ICT;
8626 /* Make sure we no longer hold the NIC lock. */
8629 /* Stop TX scheduler. */
8630 iwn_prph_write(sc, sc->sched_txfact_addr, 0);
8632 /* Stop all DMA channels. */
8633 if (iwn_nic_lock(sc) == 0) {
8634 for (chnl = 0; chnl < sc->ndmachnls; chnl++) {
8635 IWN_WRITE(sc, IWN_FH_TX_CONFIG(chnl), 0);
8636 for (ntries = 0; ntries < 200; ntries++) {
8637 if (IWN_READ(sc, IWN_FH_TX_STATUS) &
8638 IWN_FH_TX_STATUS_IDLE(chnl))
8647 iwn_reset_rx_ring(sc, &sc->rxq);
8649 /* Reset all TX rings. */
8650 for (qid = 0; qid < sc->ntxqs; qid++)
8651 iwn_reset_tx_ring(sc, &sc->txq[qid]);
8653 if (iwn_nic_lock(sc) == 0) {
8654 iwn_prph_write(sc, IWN_APMG_CLK_DIS,
8655 IWN_APMG_CLK_CTRL_DMA_CLK_RQT);
8659 /* Power OFF adapter. */
8664 iwn_radio_on(void *arg0, int pending)
8666 struct iwn_softc *sc = arg0;
8667 struct ieee80211com *ic = &sc->sc_ic;
8668 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
8670 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8674 ieee80211_init(vap);
8679 iwn_radio_off(void *arg0, int pending)
8681 struct iwn_softc *sc = arg0;
8682 struct ieee80211com *ic = &sc->sc_ic;
8683 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
8685 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8689 ieee80211_stop(vap);
8691 /* Enable interrupts to get RF toggle notification. */
8693 IWN_WRITE(sc, IWN_INT, 0xffffffff);
8694 IWN_WRITE(sc, IWN_INT_MASK, sc->int_mask);
8699 iwn_panicked(void *arg0, int pending)
8701 struct iwn_softc *sc = arg0;
8702 struct ieee80211com *ic = &sc->sc_ic;
8703 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
8709 printf("%s: null vap\n", __func__);
8713 device_printf(sc->sc_dev, "%s: controller panicked, iv_state = %d; "
8714 "restarting\n", __func__, vap->iv_state);
8717 * This is not enough work. We need to also reinitialise
8718 * the correct transmit state for aggregation enabled queues,
8719 * which has a very specific requirement of
8720 * ring index = 802.11 seqno % 256. If we don't do this (which
8721 * we definitely don't!) then the firmware will just panic again.
8724 ieee80211_restart_all(ic);
8728 iwn_stop_locked(sc);
8729 iwn_init_locked(sc);
8730 if (vap->iv_state >= IEEE80211_S_AUTH &&
8731 (error = iwn_auth(sc, vap)) != 0) {
8732 device_printf(sc->sc_dev,
8733 "%s: could not move to auth state\n", __func__);
8735 if (vap->iv_state >= IEEE80211_S_RUN &&
8736 (error = iwn_run(sc, vap)) != 0) {
8737 device_printf(sc->sc_dev,
8738 "%s: could not move to run state\n", __func__);
8746 iwn_init_locked(struct iwn_softc *sc)
8750 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
8752 IWN_LOCK_ASSERT(sc);
8754 sc->sc_flags |= IWN_FLAG_RUNNING;
8756 if ((error = iwn_hw_prepare(sc)) != 0) {
8757 device_printf(sc->sc_dev, "%s: hardware not ready, error %d\n",
8762 /* Initialize interrupt mask to default value. */
8763 sc->int_mask = IWN_INT_MASK_DEF;
8764 sc->sc_flags &= ~IWN_FLAG_USE_ICT;
8766 /* Check that the radio is not disabled by hardware switch. */
8767 if (!(IWN_READ(sc, IWN_GP_CNTRL) & IWN_GP_CNTRL_RFKILL)) {
8768 device_printf(sc->sc_dev,
8769 "radio is disabled by hardware switch\n");
8770 /* Enable interrupts to get RF toggle notifications. */
8771 IWN_WRITE(sc, IWN_INT, 0xffffffff);
8772 IWN_WRITE(sc, IWN_INT_MASK, sc->int_mask);
8776 /* Read firmware images from the filesystem. */
8777 if ((error = iwn_read_firmware(sc)) != 0) {
8778 device_printf(sc->sc_dev,
8779 "%s: could not read firmware, error %d\n", __func__,
8784 /* Initialize hardware and upload firmware. */
8785 error = iwn_hw_init(sc);
8786 iwn_unload_firmware(sc);
8788 device_printf(sc->sc_dev,
8789 "%s: could not initialize hardware, error %d\n", __func__,
8794 /* Configure adapter now that it is ready. */
8795 if ((error = iwn_config(sc)) != 0) {
8796 device_printf(sc->sc_dev,
8797 "%s: could not configure device, error %d\n", __func__,
8802 callout_reset(&sc->watchdog_to, hz, iwn_watchdog, sc);
8804 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
8809 sc->sc_flags &= ~IWN_FLAG_RUNNING;
8810 iwn_stop_locked(sc);
8811 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end in error\n",__func__);
8815 iwn_init(struct iwn_softc *sc)
8819 iwn_init_locked(sc);
8822 if (sc->sc_flags & IWN_FLAG_RUNNING)
8823 ieee80211_start_all(&sc->sc_ic);
8827 iwn_stop_locked(struct iwn_softc *sc)
8830 IWN_LOCK_ASSERT(sc);
8832 sc->sc_is_scanning = 0;
8833 sc->sc_tx_timer = 0;
8834 callout_stop(&sc->watchdog_to);
8835 callout_stop(&sc->calib_to);
8836 sc->sc_flags &= ~IWN_FLAG_RUNNING;
8838 /* Power OFF hardware. */
8843 iwn_stop(struct iwn_softc *sc)
8846 iwn_stop_locked(sc);
8851 * Callback from net80211 to start a scan.
8854 iwn_scan_start(struct ieee80211com *ic)
8856 struct iwn_softc *sc = ic->ic_softc;
8859 /* make the link LED blink while we're scanning */
8860 iwn_set_led(sc, IWN_LED_LINK, 20, 2);
8865 * Callback from net80211 to terminate a scan.
8868 iwn_scan_end(struct ieee80211com *ic)
8870 struct iwn_softc *sc = ic->ic_softc;
8871 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
8874 if (vap->iv_state == IEEE80211_S_RUN) {
8875 /* Set link LED to ON status if we are associated */
8876 iwn_set_led(sc, IWN_LED_LINK, 0, 1);
8882 * Callback from net80211 to force a channel change.
8885 iwn_set_channel(struct ieee80211com *ic)
8887 const struct ieee80211_channel *c = ic->ic_curchan;
8888 struct iwn_softc *sc = ic->ic_softc;
8891 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8894 sc->sc_rxtap.wr_chan_freq = htole16(c->ic_freq);
8895 sc->sc_rxtap.wr_chan_flags = htole16(c->ic_flags);
8896 sc->sc_txtap.wt_chan_freq = htole16(c->ic_freq);
8897 sc->sc_txtap.wt_chan_flags = htole16(c->ic_flags);
8900 * Only need to set the channel in Monitor mode. AP scanning and auth
8901 * are already taken care of by their respective firmware commands.
8903 if (ic->ic_opmode == IEEE80211_M_MONITOR) {
8904 error = iwn_config(sc);
8906 device_printf(sc->sc_dev,
8907 "%s: error %d settting channel\n", __func__, error);
8913 * Callback from net80211 to start scanning of the current channel.
8916 iwn_scan_curchan(struct ieee80211_scan_state *ss, unsigned long maxdwell)
8918 struct ieee80211vap *vap = ss->ss_vap;
8919 struct ieee80211com *ic = vap->iv_ic;
8920 struct iwn_softc *sc = ic->ic_softc;
8924 error = iwn_scan(sc, vap, ss, ic->ic_curchan);
8927 ieee80211_cancel_scan(vap);
8931 * Callback from net80211 to handle the minimum dwell time being met.
8932 * The intent is to terminate the scan but we just let the firmware
8933 * notify us when it's finished as we have no safe way to abort it.
8936 iwn_scan_mindwell(struct ieee80211_scan_state *ss)
8938 /* NB: don't try to abort scan; wait for firmware to finish */
8941 #define IWN_DESC(x) case x: return #x
8944 * Translate CSR code to string
8946 static char *iwn_get_csr_string(int csr)
8949 IWN_DESC(IWN_HW_IF_CONFIG);
8950 IWN_DESC(IWN_INT_COALESCING);
8952 IWN_DESC(IWN_INT_MASK);
8953 IWN_DESC(IWN_FH_INT);
8954 IWN_DESC(IWN_GPIO_IN);
8955 IWN_DESC(IWN_RESET);
8956 IWN_DESC(IWN_GP_CNTRL);
8957 IWN_DESC(IWN_HW_REV);
8958 IWN_DESC(IWN_EEPROM);
8959 IWN_DESC(IWN_EEPROM_GP);
8960 IWN_DESC(IWN_OTP_GP);
8962 IWN_DESC(IWN_GP_UCODE);
8963 IWN_DESC(IWN_GP_DRIVER);
8964 IWN_DESC(IWN_UCODE_GP1);
8965 IWN_DESC(IWN_UCODE_GP2);
8967 IWN_DESC(IWN_DRAM_INT_TBL);
8968 IWN_DESC(IWN_GIO_CHICKEN);
8969 IWN_DESC(IWN_ANA_PLL);
8970 IWN_DESC(IWN_HW_REV_WA);
8971 IWN_DESC(IWN_DBG_HPET_MEM);
8973 return "UNKNOWN CSR";
8978 * This function print firmware register
8981 iwn_debug_register(struct iwn_softc *sc)
8984 static const uint32_t csr_tbl[] = {
9009 DPRINTF(sc, IWN_DEBUG_REGISTER,
9010 "CSR values: (2nd byte of IWN_INT_COALESCING is IWN_INT_PERIODIC)%s",
9012 for (i = 0; i < nitems(csr_tbl); i++){
9013 DPRINTF(sc, IWN_DEBUG_REGISTER," %10s: 0x%08x ",
9014 iwn_get_csr_string(csr_tbl[i]), IWN_READ(sc, csr_tbl[i]));
9016 DPRINTF(sc, IWN_DEBUG_REGISTER,"%s","\n");
9018 DPRINTF(sc, IWN_DEBUG_REGISTER,"%s","\n");