2 * Copyright (c) 2007-2009 Damien Bergamini <damien.bergamini@free.fr>
3 * Copyright (c) 2008 Benjamin Close <benjsc@FreeBSD.org>
4 * Copyright (c) 2008 Sam Leffler, Errno Consulting
5 * Copyright (c) 2011 Intel Corporation
6 * Copyright (c) 2013 Cedric GROSS <c.gross@kreiz-it.fr>
7 * Copyright (c) 2013 Adrian Chadd <adrian@FreeBSD.org>
9 * Permission to use, copy, modify, and distribute this software for any
10 * purpose with or without fee is hereby granted, provided that the above
11 * copyright notice and this permission notice appear in all copies.
13 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
14 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
15 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
16 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
17 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
18 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
19 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
23 * Driver for Intel WiFi Link 4965 and 1000/5000/6000 Series 802.11 network
27 #include <sys/cdefs.h>
28 __FBSDID("$FreeBSD$");
33 #include <sys/param.h>
34 #include <sys/sockio.h>
35 #include <sys/sysctl.h>
37 #include <sys/kernel.h>
38 #include <sys/socket.h>
39 #include <sys/systm.h>
40 #include <sys/malloc.h>
44 #include <sys/endian.h>
45 #include <sys/firmware.h>
46 #include <sys/limits.h>
47 #include <sys/module.h>
49 #include <sys/queue.h>
50 #include <sys/taskqueue.h>
52 #include <machine/bus.h>
53 #include <machine/resource.h>
54 #include <machine/clock.h>
56 #include <dev/pci/pcireg.h>
57 #include <dev/pci/pcivar.h>
60 #include <net/if_var.h>
61 #include <net/if_dl.h>
62 #include <net/if_media.h>
64 #include <netinet/in.h>
65 #include <netinet/if_ether.h>
67 #include <net80211/ieee80211_var.h>
68 #include <net80211/ieee80211_radiotap.h>
69 #include <net80211/ieee80211_regdomain.h>
70 #include <net80211/ieee80211_ratectl.h>
72 #include <dev/iwn/if_iwnreg.h>
73 #include <dev/iwn/if_iwnvar.h>
74 #include <dev/iwn/if_iwn_devid.h>
75 #include <dev/iwn/if_iwn_chip_cfg.h>
76 #include <dev/iwn/if_iwn_debug.h>
77 #include <dev/iwn/if_iwn_ioctl.h>
85 static const struct iwn_ident iwn_ident_table[] = {
86 { 0x8086, IWN_DID_6x05_1, "Intel Centrino Advanced-N 6205" },
87 { 0x8086, IWN_DID_1000_1, "Intel Centrino Wireless-N 1000" },
88 { 0x8086, IWN_DID_1000_2, "Intel Centrino Wireless-N 1000" },
89 { 0x8086, IWN_DID_6x05_2, "Intel Centrino Advanced-N 6205" },
90 { 0x8086, IWN_DID_6050_1, "Intel Centrino Advanced-N + WiMAX 6250" },
91 { 0x8086, IWN_DID_6050_2, "Intel Centrino Advanced-N + WiMAX 6250" },
92 { 0x8086, IWN_DID_x030_1, "Intel Centrino Wireless-N 1030" },
93 { 0x8086, IWN_DID_x030_2, "Intel Centrino Wireless-N 1030" },
94 { 0x8086, IWN_DID_x030_3, "Intel Centrino Advanced-N 6230" },
95 { 0x8086, IWN_DID_x030_4, "Intel Centrino Advanced-N 6230" },
96 { 0x8086, IWN_DID_6150_1, "Intel Centrino Wireless-N + WiMAX 6150" },
97 { 0x8086, IWN_DID_6150_2, "Intel Centrino Wireless-N + WiMAX 6150" },
98 { 0x8086, IWN_DID_2x00_1, "Intel(R) Centrino(R) Wireless-N 2200 BGN" },
99 { 0x8086, IWN_DID_2x00_2, "Intel(R) Centrino(R) Wireless-N 2200 BGN" },
100 /* XXX 2200D is IWN_SDID_2x00_4; there's no way to express this here! */
101 { 0x8086, IWN_DID_2x30_1, "Intel Centrino Wireless-N 2230" },
102 { 0x8086, IWN_DID_2x30_2, "Intel Centrino Wireless-N 2230" },
103 { 0x8086, IWN_DID_130_1, "Intel Centrino Wireless-N 130" },
104 { 0x8086, IWN_DID_130_2, "Intel Centrino Wireless-N 130" },
105 { 0x8086, IWN_DID_100_1, "Intel Centrino Wireless-N 100" },
106 { 0x8086, IWN_DID_100_2, "Intel Centrino Wireless-N 100" },
107 { 0x8086, IWN_DID_105_1, "Intel Centrino Wireless-N 105" },
108 { 0x8086, IWN_DID_105_2, "Intel Centrino Wireless-N 105" },
109 { 0x8086, IWN_DID_135_1, "Intel Centrino Wireless-N 135" },
110 { 0x8086, IWN_DID_135_2, "Intel Centrino Wireless-N 135" },
111 { 0x8086, IWN_DID_4965_1, "Intel Wireless WiFi Link 4965" },
112 { 0x8086, IWN_DID_6x00_1, "Intel Centrino Ultimate-N 6300" },
113 { 0x8086, IWN_DID_6x00_2, "Intel Centrino Advanced-N 6200" },
114 { 0x8086, IWN_DID_4965_2, "Intel Wireless WiFi Link 4965" },
115 { 0x8086, IWN_DID_4965_3, "Intel Wireless WiFi Link 4965" },
116 { 0x8086, IWN_DID_5x00_1, "Intel WiFi Link 5100" },
117 { 0x8086, IWN_DID_4965_4, "Intel Wireless WiFi Link 4965" },
118 { 0x8086, IWN_DID_5x00_3, "Intel Ultimate N WiFi Link 5300" },
119 { 0x8086, IWN_DID_5x00_4, "Intel Ultimate N WiFi Link 5300" },
120 { 0x8086, IWN_DID_5x00_2, "Intel WiFi Link 5100" },
121 { 0x8086, IWN_DID_6x00_3, "Intel Centrino Ultimate-N 6300" },
122 { 0x8086, IWN_DID_6x00_4, "Intel Centrino Advanced-N 6200" },
123 { 0x8086, IWN_DID_5x50_1, "Intel WiMAX/WiFi Link 5350" },
124 { 0x8086, IWN_DID_5x50_2, "Intel WiMAX/WiFi Link 5350" },
125 { 0x8086, IWN_DID_5x50_3, "Intel WiMAX/WiFi Link 5150" },
126 { 0x8086, IWN_DID_5x50_4, "Intel WiMAX/WiFi Link 5150" },
127 { 0x8086, IWN_DID_6035_1, "Intel Centrino Advanced 6235" },
128 { 0x8086, IWN_DID_6035_2, "Intel Centrino Advanced 6235" },
132 static int iwn_probe(device_t);
133 static int iwn_attach(device_t);
134 static int iwn4965_attach(struct iwn_softc *, uint16_t);
135 static int iwn5000_attach(struct iwn_softc *, uint16_t);
136 static int iwn_config_specific(struct iwn_softc *, uint16_t);
137 static void iwn_radiotap_attach(struct iwn_softc *);
138 static void iwn_sysctlattach(struct iwn_softc *);
139 static struct ieee80211vap *iwn_vap_create(struct ieee80211com *,
140 const char [IFNAMSIZ], int, enum ieee80211_opmode, int,
141 const uint8_t [IEEE80211_ADDR_LEN],
142 const uint8_t [IEEE80211_ADDR_LEN]);
143 static void iwn_vap_delete(struct ieee80211vap *);
144 static int iwn_detach(device_t);
145 static int iwn_shutdown(device_t);
146 static int iwn_suspend(device_t);
147 static int iwn_resume(device_t);
148 static int iwn_nic_lock(struct iwn_softc *);
149 static int iwn_eeprom_lock(struct iwn_softc *);
150 static int iwn_init_otprom(struct iwn_softc *);
151 static int iwn_read_prom_data(struct iwn_softc *, uint32_t, void *, int);
152 static void iwn_dma_map_addr(void *, bus_dma_segment_t *, int, int);
153 static int iwn_dma_contig_alloc(struct iwn_softc *, struct iwn_dma_info *,
154 void **, bus_size_t, bus_size_t);
155 static void iwn_dma_contig_free(struct iwn_dma_info *);
156 static int iwn_alloc_sched(struct iwn_softc *);
157 static void iwn_free_sched(struct iwn_softc *);
158 static int iwn_alloc_kw(struct iwn_softc *);
159 static void iwn_free_kw(struct iwn_softc *);
160 static int iwn_alloc_ict(struct iwn_softc *);
161 static void iwn_free_ict(struct iwn_softc *);
162 static int iwn_alloc_fwmem(struct iwn_softc *);
163 static void iwn_free_fwmem(struct iwn_softc *);
164 static int iwn_alloc_rx_ring(struct iwn_softc *, struct iwn_rx_ring *);
165 static void iwn_reset_rx_ring(struct iwn_softc *, struct iwn_rx_ring *);
166 static void iwn_free_rx_ring(struct iwn_softc *, struct iwn_rx_ring *);
167 static int iwn_alloc_tx_ring(struct iwn_softc *, struct iwn_tx_ring *,
169 static void iwn_reset_tx_ring(struct iwn_softc *, struct iwn_tx_ring *);
170 static void iwn_free_tx_ring(struct iwn_softc *, struct iwn_tx_ring *);
171 static void iwn_check_tx_ring(struct iwn_softc *, int);
172 static void iwn5000_ict_reset(struct iwn_softc *);
173 static int iwn_read_eeprom(struct iwn_softc *,
174 uint8_t macaddr[IEEE80211_ADDR_LEN]);
175 static void iwn4965_read_eeprom(struct iwn_softc *);
177 static void iwn4965_print_power_group(struct iwn_softc *, int);
179 static void iwn5000_read_eeprom(struct iwn_softc *);
180 static uint32_t iwn_eeprom_channel_flags(struct iwn_eeprom_chan *);
181 static void iwn_read_eeprom_band(struct iwn_softc *, int, int, int *,
182 struct ieee80211_channel[]);
183 static void iwn_read_eeprom_ht40(struct iwn_softc *, int, int, int *,
184 struct ieee80211_channel[]);
185 static void iwn_read_eeprom_channels(struct iwn_softc *, int, uint32_t);
186 static struct iwn_eeprom_chan *iwn_find_eeprom_channel(struct iwn_softc *,
187 struct ieee80211_channel *);
188 static void iwn_getradiocaps(struct ieee80211com *, int, int *,
189 struct ieee80211_channel[]);
190 static int iwn_setregdomain(struct ieee80211com *,
191 struct ieee80211_regdomain *, int,
192 struct ieee80211_channel[]);
193 static void iwn_read_eeprom_enhinfo(struct iwn_softc *);
194 static struct ieee80211_node *iwn_node_alloc(struct ieee80211vap *,
195 const uint8_t mac[IEEE80211_ADDR_LEN]);
196 static void iwn_newassoc(struct ieee80211_node *, int);
197 static int iwn_media_change(struct ifnet *);
198 static int iwn_newstate(struct ieee80211vap *, enum ieee80211_state, int);
199 static void iwn_calib_timeout(void *);
200 static void iwn_rx_phy(struct iwn_softc *, struct iwn_rx_desc *);
201 static void iwn_rx_done(struct iwn_softc *, struct iwn_rx_desc *,
202 struct iwn_rx_data *);
203 static void iwn_agg_tx_complete(struct iwn_softc *, struct iwn_tx_ring *,
205 static void iwn_rx_compressed_ba(struct iwn_softc *, struct iwn_rx_desc *);
206 static void iwn5000_rx_calib_results(struct iwn_softc *,
207 struct iwn_rx_desc *);
208 static void iwn_rx_statistics(struct iwn_softc *, struct iwn_rx_desc *);
209 static void iwn4965_tx_done(struct iwn_softc *, struct iwn_rx_desc *,
210 struct iwn_rx_data *);
211 static void iwn5000_tx_done(struct iwn_softc *, struct iwn_rx_desc *,
212 struct iwn_rx_data *);
213 static void iwn_adj_ampdu_ptr(struct iwn_softc *, struct iwn_tx_ring *);
214 static void iwn_tx_done(struct iwn_softc *, struct iwn_rx_desc *, int, int,
216 static int iwn_ampdu_check_bitmap(uint64_t, int, int);
217 static int iwn_ampdu_index_check(struct iwn_softc *, struct iwn_tx_ring *,
219 static void iwn_ampdu_tx_done(struct iwn_softc *, int, int, int, void *);
220 static void iwn_cmd_done(struct iwn_softc *, struct iwn_rx_desc *);
221 static void iwn_notif_intr(struct iwn_softc *);
222 static void iwn_wakeup_intr(struct iwn_softc *);
223 static void iwn_rftoggle_task(void *, int);
224 static void iwn_fatal_intr(struct iwn_softc *);
225 static void iwn_intr(void *);
226 static void iwn4965_update_sched(struct iwn_softc *, int, int, uint8_t,
228 static void iwn5000_update_sched(struct iwn_softc *, int, int, uint8_t,
231 static void iwn5000_reset_sched(struct iwn_softc *, int, int);
233 static int iwn_tx_data(struct iwn_softc *, struct mbuf *,
234 struct ieee80211_node *);
235 static int iwn_tx_data_raw(struct iwn_softc *, struct mbuf *,
236 struct ieee80211_node *,
237 const struct ieee80211_bpf_params *params);
238 static int iwn_tx_cmd(struct iwn_softc *, struct mbuf *,
239 struct ieee80211_node *, struct iwn_tx_ring *);
240 static void iwn_xmit_task(void *arg0, int pending);
241 static int iwn_raw_xmit(struct ieee80211_node *, struct mbuf *,
242 const struct ieee80211_bpf_params *);
243 static int iwn_transmit(struct ieee80211com *, struct mbuf *);
244 static void iwn_scan_timeout(void *);
245 static void iwn_watchdog(void *);
246 static int iwn_ioctl(struct ieee80211com *, u_long , void *);
247 static void iwn_parent(struct ieee80211com *);
248 static int iwn_cmd(struct iwn_softc *, int, const void *, int, int);
249 static int iwn4965_add_node(struct iwn_softc *, struct iwn_node_info *,
251 static int iwn5000_add_node(struct iwn_softc *, struct iwn_node_info *,
253 static int iwn_set_link_quality(struct iwn_softc *,
254 struct ieee80211_node *);
255 static int iwn_add_broadcast_node(struct iwn_softc *, int);
256 static int iwn_updateedca(struct ieee80211com *);
257 static void iwn_set_promisc(struct iwn_softc *);
258 static void iwn_update_promisc(struct ieee80211com *);
259 static void iwn_update_mcast(struct ieee80211com *);
260 static void iwn_set_led(struct iwn_softc *, uint8_t, uint8_t, uint8_t);
261 static int iwn_set_critical_temp(struct iwn_softc *);
262 static int iwn_set_timing(struct iwn_softc *, struct ieee80211_node *);
263 static void iwn4965_power_calibration(struct iwn_softc *, int);
264 static int iwn4965_set_txpower(struct iwn_softc *, int);
265 static int iwn5000_set_txpower(struct iwn_softc *, int);
266 static int iwn4965_get_rssi(struct iwn_softc *, struct iwn_rx_stat *);
267 static int iwn5000_get_rssi(struct iwn_softc *, struct iwn_rx_stat *);
268 static int iwn_get_noise(const struct iwn_rx_general_stats *);
269 static int iwn4965_get_temperature(struct iwn_softc *);
270 static int iwn5000_get_temperature(struct iwn_softc *);
271 static int iwn_init_sensitivity(struct iwn_softc *);
272 static void iwn_collect_noise(struct iwn_softc *,
273 const struct iwn_rx_general_stats *);
274 static int iwn4965_init_gains(struct iwn_softc *);
275 static int iwn5000_init_gains(struct iwn_softc *);
276 static int iwn4965_set_gains(struct iwn_softc *);
277 static int iwn5000_set_gains(struct iwn_softc *);
278 static void iwn_tune_sensitivity(struct iwn_softc *,
279 const struct iwn_rx_stats *);
280 static void iwn_save_stats_counters(struct iwn_softc *,
281 const struct iwn_stats *);
282 static int iwn_send_sensitivity(struct iwn_softc *);
283 static void iwn_check_rx_recovery(struct iwn_softc *, struct iwn_stats *);
284 static int iwn_set_pslevel(struct iwn_softc *, int, int, int);
285 static int iwn_send_btcoex(struct iwn_softc *);
286 static int iwn_send_advanced_btcoex(struct iwn_softc *);
287 static int iwn5000_runtime_calib(struct iwn_softc *);
288 static int iwn_check_bss_filter(struct iwn_softc *);
289 static int iwn4965_rxon_assoc(struct iwn_softc *, int);
290 static int iwn5000_rxon_assoc(struct iwn_softc *, int);
291 static int iwn_send_rxon(struct iwn_softc *, int, int);
292 static int iwn_config(struct iwn_softc *);
293 static int iwn_scan(struct iwn_softc *, struct ieee80211vap *,
294 struct ieee80211_scan_state *, struct ieee80211_channel *);
295 static int iwn_auth(struct iwn_softc *, struct ieee80211vap *vap);
296 static int iwn_run(struct iwn_softc *, struct ieee80211vap *vap);
297 static int iwn_ampdu_rx_start(struct ieee80211_node *,
298 struct ieee80211_rx_ampdu *, int, int, int);
299 static void iwn_ampdu_rx_stop(struct ieee80211_node *,
300 struct ieee80211_rx_ampdu *);
301 static int iwn_addba_request(struct ieee80211_node *,
302 struct ieee80211_tx_ampdu *, int, int, int);
303 static int iwn_addba_response(struct ieee80211_node *,
304 struct ieee80211_tx_ampdu *, int, int, int);
305 static int iwn_ampdu_tx_start(struct ieee80211com *,
306 struct ieee80211_node *, uint8_t);
307 static void iwn_ampdu_tx_stop(struct ieee80211_node *,
308 struct ieee80211_tx_ampdu *);
309 static void iwn4965_ampdu_tx_start(struct iwn_softc *,
310 struct ieee80211_node *, int, uint8_t, uint16_t);
311 static void iwn4965_ampdu_tx_stop(struct iwn_softc *, int,
313 static void iwn5000_ampdu_tx_start(struct iwn_softc *,
314 struct ieee80211_node *, int, uint8_t, uint16_t);
315 static void iwn5000_ampdu_tx_stop(struct iwn_softc *, int,
317 static int iwn5000_query_calibration(struct iwn_softc *);
318 static int iwn5000_send_calibration(struct iwn_softc *);
319 static int iwn5000_send_wimax_coex(struct iwn_softc *);
320 static int iwn5000_crystal_calib(struct iwn_softc *);
321 static int iwn5000_temp_offset_calib(struct iwn_softc *);
322 static int iwn5000_temp_offset_calibv2(struct iwn_softc *);
323 static int iwn4965_post_alive(struct iwn_softc *);
324 static int iwn5000_post_alive(struct iwn_softc *);
325 static int iwn4965_load_bootcode(struct iwn_softc *, const uint8_t *,
327 static int iwn4965_load_firmware(struct iwn_softc *);
328 static int iwn5000_load_firmware_section(struct iwn_softc *, uint32_t,
329 const uint8_t *, int);
330 static int iwn5000_load_firmware(struct iwn_softc *);
331 static int iwn_read_firmware_leg(struct iwn_softc *,
332 struct iwn_fw_info *);
333 static int iwn_read_firmware_tlv(struct iwn_softc *,
334 struct iwn_fw_info *, uint16_t);
335 static int iwn_read_firmware(struct iwn_softc *);
336 static void iwn_unload_firmware(struct iwn_softc *);
337 static int iwn_clock_wait(struct iwn_softc *);
338 static int iwn_apm_init(struct iwn_softc *);
339 static void iwn_apm_stop_master(struct iwn_softc *);
340 static void iwn_apm_stop(struct iwn_softc *);
341 static int iwn4965_nic_config(struct iwn_softc *);
342 static int iwn5000_nic_config(struct iwn_softc *);
343 static int iwn_hw_prepare(struct iwn_softc *);
344 static int iwn_hw_init(struct iwn_softc *);
345 static void iwn_hw_stop(struct iwn_softc *);
346 static void iwn_panicked(void *, int);
347 static int iwn_init_locked(struct iwn_softc *);
348 static int iwn_init(struct iwn_softc *);
349 static void iwn_stop_locked(struct iwn_softc *);
350 static void iwn_stop(struct iwn_softc *);
351 static void iwn_scan_start(struct ieee80211com *);
352 static void iwn_scan_end(struct ieee80211com *);
353 static void iwn_set_channel(struct ieee80211com *);
354 static void iwn_scan_curchan(struct ieee80211_scan_state *, unsigned long);
355 static void iwn_scan_mindwell(struct ieee80211_scan_state *);
357 static char *iwn_get_csr_string(int);
358 static void iwn_debug_register(struct iwn_softc *);
361 static device_method_t iwn_methods[] = {
362 /* Device interface */
363 DEVMETHOD(device_probe, iwn_probe),
364 DEVMETHOD(device_attach, iwn_attach),
365 DEVMETHOD(device_detach, iwn_detach),
366 DEVMETHOD(device_shutdown, iwn_shutdown),
367 DEVMETHOD(device_suspend, iwn_suspend),
368 DEVMETHOD(device_resume, iwn_resume),
373 static driver_t iwn_driver = {
376 sizeof(struct iwn_softc)
378 static devclass_t iwn_devclass;
380 DRIVER_MODULE(iwn, pci, iwn_driver, iwn_devclass, NULL, NULL);
381 MODULE_PNP_INFO("U16:vendor;U16:device;D:#", pci, iwn, iwn_ident_table,
382 nitems(iwn_ident_table) - 1);
383 MODULE_VERSION(iwn, 1);
385 MODULE_DEPEND(iwn, firmware, 1, 1, 1);
386 MODULE_DEPEND(iwn, pci, 1, 1, 1);
387 MODULE_DEPEND(iwn, wlan, 1, 1, 1);
389 static d_ioctl_t iwn_cdev_ioctl;
390 static d_open_t iwn_cdev_open;
391 static d_close_t iwn_cdev_close;
393 static struct cdevsw iwn_cdevsw = {
394 .d_version = D_VERSION,
396 .d_open = iwn_cdev_open,
397 .d_close = iwn_cdev_close,
398 .d_ioctl = iwn_cdev_ioctl,
403 iwn_probe(device_t dev)
405 const struct iwn_ident *ident;
407 for (ident = iwn_ident_table; ident->name != NULL; ident++) {
408 if (pci_get_vendor(dev) == ident->vendor &&
409 pci_get_device(dev) == ident->device) {
410 device_set_desc(dev, ident->name);
411 return (BUS_PROBE_DEFAULT);
418 iwn_is_3stream_device(struct iwn_softc *sc)
420 /* XXX for now only 5300, until the 5350 can be tested */
421 if (sc->hw_type == IWN_HW_REV_TYPE_5300)
427 iwn_attach(device_t dev)
429 struct iwn_softc *sc = device_get_softc(dev);
430 struct ieee80211com *ic;
436 error = resource_int_value(device_get_name(sc->sc_dev),
437 device_get_unit(sc->sc_dev), "debug", &(sc->sc_debug));
444 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: begin\n",__func__);
447 * Get the offset of the PCI Express Capability Structure in PCI
448 * Configuration Space.
450 error = pci_find_cap(dev, PCIY_EXPRESS, &sc->sc_cap_off);
452 device_printf(dev, "PCIe capability structure not found!\n");
456 /* Clear device-specific "PCI retry timeout" register (41h). */
457 pci_write_config(dev, 0x41, 0, 1);
459 /* Enable bus-mastering. */
460 pci_enable_busmaster(dev);
463 sc->mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
465 if (sc->mem == NULL) {
466 device_printf(dev, "can't map mem space\n");
470 sc->sc_st = rman_get_bustag(sc->mem);
471 sc->sc_sh = rman_get_bushandle(sc->mem);
475 if (pci_alloc_msi(dev, &i) == 0)
477 /* Install interrupt handler. */
478 sc->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, RF_ACTIVE |
479 (rid != 0 ? 0 : RF_SHAREABLE));
480 if (sc->irq == NULL) {
481 device_printf(dev, "can't map interrupt\n");
488 /* Read hardware revision and attach. */
489 sc->hw_type = (IWN_READ(sc, IWN_HW_REV) >> IWN_HW_REV_TYPE_SHIFT)
490 & IWN_HW_REV_TYPE_MASK;
491 sc->subdevice_id = pci_get_subdevice(dev);
494 * 4965 versus 5000 and later have different methods.
495 * Let's set those up first.
497 if (sc->hw_type == IWN_HW_REV_TYPE_4965)
498 error = iwn4965_attach(sc, pci_get_device(dev));
500 error = iwn5000_attach(sc, pci_get_device(dev));
502 device_printf(dev, "could not attach device, error %d\n",
508 * Next, let's setup the various parameters of each NIC.
510 error = iwn_config_specific(sc, pci_get_device(dev));
512 device_printf(dev, "could not attach device, error %d\n",
517 if ((error = iwn_hw_prepare(sc)) != 0) {
518 device_printf(dev, "hardware not ready, error %d\n", error);
522 /* Allocate DMA memory for firmware transfers. */
523 if ((error = iwn_alloc_fwmem(sc)) != 0) {
525 "could not allocate memory for firmware, error %d\n",
530 /* Allocate "Keep Warm" page. */
531 if ((error = iwn_alloc_kw(sc)) != 0) {
533 "could not allocate keep warm page, error %d\n", error);
537 /* Allocate ICT table for 5000 Series. */
538 if (sc->hw_type != IWN_HW_REV_TYPE_4965 &&
539 (error = iwn_alloc_ict(sc)) != 0) {
540 device_printf(dev, "could not allocate ICT table, error %d\n",
545 /* Allocate TX scheduler "rings". */
546 if ((error = iwn_alloc_sched(sc)) != 0) {
548 "could not allocate TX scheduler rings, error %d\n", error);
552 /* Allocate TX rings (16 on 4965AGN, 20 on >=5000). */
553 for (i = 0; i < sc->ntxqs; i++) {
554 if ((error = iwn_alloc_tx_ring(sc, &sc->txq[i], i)) != 0) {
556 "could not allocate TX ring %d, error %d\n", i,
562 /* Allocate RX ring. */
563 if ((error = iwn_alloc_rx_ring(sc, &sc->rxq)) != 0) {
564 device_printf(dev, "could not allocate RX ring, error %d\n",
569 /* Clear pending interrupts. */
570 IWN_WRITE(sc, IWN_INT, 0xffffffff);
574 ic->ic_name = device_get_nameunit(dev);
575 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */
576 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */
578 /* Set device capabilities. */
580 IEEE80211_C_STA /* station mode supported */
581 | IEEE80211_C_MONITOR /* monitor mode supported */
583 | IEEE80211_C_BGSCAN /* background scanning */
585 | IEEE80211_C_TXPMGT /* tx power management */
586 | IEEE80211_C_SHSLOT /* short slot time supported */
588 | IEEE80211_C_SHPREAMBLE /* short preamble supported */
590 | IEEE80211_C_IBSS /* ibss/adhoc mode */
592 | IEEE80211_C_WME /* WME */
593 | IEEE80211_C_PMGT /* Station-side power mgmt */
596 /* Read MAC address, channels, etc from EEPROM. */
597 if ((error = iwn_read_eeprom(sc, ic->ic_macaddr)) != 0) {
598 device_printf(dev, "could not read EEPROM, error %d\n",
603 /* Count the number of available chains. */
605 ((sc->txchainmask >> 2) & 1) +
606 ((sc->txchainmask >> 1) & 1) +
607 ((sc->txchainmask >> 0) & 1);
609 ((sc->rxchainmask >> 2) & 1) +
610 ((sc->rxchainmask >> 1) & 1) +
611 ((sc->rxchainmask >> 0) & 1);
613 device_printf(dev, "MIMO %dT%dR, %.4s, address %6D\n",
614 sc->ntxchains, sc->nrxchains, sc->eeprom_domain,
615 ic->ic_macaddr, ":");
618 if (sc->sc_flags & IWN_FLAG_HAS_11N) {
619 ic->ic_rxstream = sc->nrxchains;
620 ic->ic_txstream = sc->ntxchains;
623 * Some of the 3 antenna devices (ie, the 4965) only supports
624 * 2x2 operation. So correct the number of streams if
625 * it's not a 3-stream device.
627 if (! iwn_is_3stream_device(sc)) {
628 if (ic->ic_rxstream > 2)
630 if (ic->ic_txstream > 2)
635 IEEE80211_HTCAP_SMPS_OFF /* SMPS mode disabled */
636 | IEEE80211_HTCAP_SHORTGI20 /* short GI in 20MHz */
637 | IEEE80211_HTCAP_CHWIDTH40 /* 40MHz channel width*/
638 | IEEE80211_HTCAP_SHORTGI40 /* short GI in 40MHz */
640 | IEEE80211_HTCAP_GREENFIELD
641 #if IWN_RBUF_SIZE == 8192
642 | IEEE80211_HTCAP_MAXAMSDU_7935 /* max A-MSDU length */
644 | IEEE80211_HTCAP_MAXAMSDU_3839 /* max A-MSDU length */
647 /* s/w capabilities */
648 | IEEE80211_HTC_HT /* HT operation */
649 | IEEE80211_HTC_AMPDU /* tx A-MPDU */
651 | IEEE80211_HTC_AMSDU /* tx A-MSDU */
656 ieee80211_ifattach(ic);
657 ic->ic_vap_create = iwn_vap_create;
658 ic->ic_ioctl = iwn_ioctl;
659 ic->ic_parent = iwn_parent;
660 ic->ic_vap_delete = iwn_vap_delete;
661 ic->ic_transmit = iwn_transmit;
662 ic->ic_raw_xmit = iwn_raw_xmit;
663 ic->ic_node_alloc = iwn_node_alloc;
664 sc->sc_ampdu_rx_start = ic->ic_ampdu_rx_start;
665 ic->ic_ampdu_rx_start = iwn_ampdu_rx_start;
666 sc->sc_ampdu_rx_stop = ic->ic_ampdu_rx_stop;
667 ic->ic_ampdu_rx_stop = iwn_ampdu_rx_stop;
668 sc->sc_addba_request = ic->ic_addba_request;
669 ic->ic_addba_request = iwn_addba_request;
670 sc->sc_addba_response = ic->ic_addba_response;
671 ic->ic_addba_response = iwn_addba_response;
672 sc->sc_addba_stop = ic->ic_addba_stop;
673 ic->ic_addba_stop = iwn_ampdu_tx_stop;
674 ic->ic_newassoc = iwn_newassoc;
675 ic->ic_wme.wme_update = iwn_updateedca;
676 ic->ic_update_promisc = iwn_update_promisc;
677 ic->ic_update_mcast = iwn_update_mcast;
678 ic->ic_scan_start = iwn_scan_start;
679 ic->ic_scan_end = iwn_scan_end;
680 ic->ic_set_channel = iwn_set_channel;
681 ic->ic_scan_curchan = iwn_scan_curchan;
682 ic->ic_scan_mindwell = iwn_scan_mindwell;
683 ic->ic_getradiocaps = iwn_getradiocaps;
684 ic->ic_setregdomain = iwn_setregdomain;
686 iwn_radiotap_attach(sc);
688 callout_init_mtx(&sc->calib_to, &sc->sc_mtx, 0);
689 callout_init_mtx(&sc->scan_timeout, &sc->sc_mtx, 0);
690 callout_init_mtx(&sc->watchdog_to, &sc->sc_mtx, 0);
691 TASK_INIT(&sc->sc_rftoggle_task, 0, iwn_rftoggle_task, sc);
692 TASK_INIT(&sc->sc_panic_task, 0, iwn_panicked, sc);
693 TASK_INIT(&sc->sc_xmit_task, 0, iwn_xmit_task, sc);
695 mbufq_init(&sc->sc_xmit_queue, 1024);
697 sc->sc_tq = taskqueue_create("iwn_taskq", M_WAITOK,
698 taskqueue_thread_enqueue, &sc->sc_tq);
699 error = taskqueue_start_threads(&sc->sc_tq, 1, 0, "iwn_taskq");
701 device_printf(dev, "can't start threads, error %d\n", error);
705 iwn_sysctlattach(sc);
708 * Hook our interrupt after all initialization is complete.
710 error = bus_setup_intr(dev, sc->irq, INTR_TYPE_NET | INTR_MPSAFE,
711 NULL, iwn_intr, sc, &sc->sc_ih);
713 device_printf(dev, "can't establish interrupt, error %d\n",
719 device_printf(sc->sc_dev, "%s: rx_stats=%d, rx_stats_bt=%d\n",
721 sizeof(struct iwn_stats),
722 sizeof(struct iwn_stats_bt));
726 ieee80211_announce(ic);
727 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
729 /* Add debug ioctl right at the end */
730 sc->sc_cdev = make_dev(&iwn_cdevsw, device_get_unit(dev),
731 UID_ROOT, GID_WHEEL, 0600, "%s", device_get_nameunit(dev));
732 if (sc->sc_cdev == NULL) {
733 device_printf(dev, "failed to create debug character device\n");
735 sc->sc_cdev->si_drv1 = sc;
740 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end in error\n",__func__);
745 * Define specific configuration based on device id and subdevice id
746 * pid : PCI device id
749 iwn_config_specific(struct iwn_softc *sc, uint16_t pid)
758 sc->base_params = &iwn4965_base_params;
759 sc->limits = &iwn4965_sensitivity_limits;
760 sc->fwname = "iwn4965fw";
761 /* Override chains masks, ROM is known to be broken. */
762 sc->txchainmask = IWN_ANT_AB;
763 sc->rxchainmask = IWN_ANT_ABC;
764 /* Enable normal btcoex */
765 sc->sc_flags |= IWN_FLAG_BTCOEX;
770 switch(sc->subdevice_id) {
771 case IWN_SDID_1000_1:
772 case IWN_SDID_1000_2:
773 case IWN_SDID_1000_3:
774 case IWN_SDID_1000_4:
775 case IWN_SDID_1000_5:
776 case IWN_SDID_1000_6:
777 case IWN_SDID_1000_7:
778 case IWN_SDID_1000_8:
779 case IWN_SDID_1000_9:
780 case IWN_SDID_1000_10:
781 case IWN_SDID_1000_11:
782 case IWN_SDID_1000_12:
783 sc->limits = &iwn1000_sensitivity_limits;
784 sc->base_params = &iwn1000_base_params;
785 sc->fwname = "iwn1000fw";
788 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
789 "0x%04x rev %d not supported (subdevice)\n", pid,
790 sc->subdevice_id,sc->hw_type);
799 sc->fwname = "iwn6000fw";
800 sc->limits = &iwn6000_sensitivity_limits;
801 switch(sc->subdevice_id) {
802 case IWN_SDID_6x00_1:
803 case IWN_SDID_6x00_2:
804 case IWN_SDID_6x00_8:
806 sc->base_params = &iwn_6000_base_params;
808 case IWN_SDID_6x00_3:
809 case IWN_SDID_6x00_6:
810 case IWN_SDID_6x00_9:
812 case IWN_SDID_6x00_4:
813 case IWN_SDID_6x00_7:
814 case IWN_SDID_6x00_10:
816 case IWN_SDID_6x00_5:
818 sc->base_params = &iwn_6000i_base_params;
819 sc->sc_flags |= IWN_FLAG_INTERNAL_PA;
820 sc->txchainmask = IWN_ANT_BC;
821 sc->rxchainmask = IWN_ANT_BC;
824 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
825 "0x%04x rev %d not supported (subdevice)\n", pid,
826 sc->subdevice_id,sc->hw_type);
833 switch(sc->subdevice_id) {
834 case IWN_SDID_6x05_1:
835 case IWN_SDID_6x05_4:
836 case IWN_SDID_6x05_6:
838 case IWN_SDID_6x05_2:
839 case IWN_SDID_6x05_5:
840 case IWN_SDID_6x05_7:
842 case IWN_SDID_6x05_3:
844 case IWN_SDID_6x05_8:
845 case IWN_SDID_6x05_9:
846 //iwl6005_2agn_sff_cfg
847 case IWN_SDID_6x05_10:
849 case IWN_SDID_6x05_11:
850 //iwl6005_2agn_mow1_cfg
851 case IWN_SDID_6x05_12:
852 //iwl6005_2agn_mow2_cfg
853 sc->fwname = "iwn6000g2afw";
854 sc->limits = &iwn6000_sensitivity_limits;
855 sc->base_params = &iwn_6000g2_base_params;
858 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
859 "0x%04x rev %d not supported (subdevice)\n", pid,
860 sc->subdevice_id,sc->hw_type);
867 switch(sc->subdevice_id) {
868 case IWN_SDID_6035_1:
869 case IWN_SDID_6035_2:
870 case IWN_SDID_6035_3:
871 case IWN_SDID_6035_4:
872 case IWN_SDID_6035_5:
873 sc->fwname = "iwn6000g2bfw";
874 sc->limits = &iwn6235_sensitivity_limits;
875 sc->base_params = &iwn_6235_base_params;
878 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
879 "0x%04x rev %d not supported (subdevice)\n", pid,
880 sc->subdevice_id,sc->hw_type);
884 /* 6x50 WiFi/WiMax Series */
887 switch(sc->subdevice_id) {
888 case IWN_SDID_6050_1:
889 case IWN_SDID_6050_3:
890 case IWN_SDID_6050_5:
892 case IWN_SDID_6050_2:
893 case IWN_SDID_6050_4:
894 case IWN_SDID_6050_6:
896 sc->fwname = "iwn6050fw";
897 sc->txchainmask = IWN_ANT_AB;
898 sc->rxchainmask = IWN_ANT_AB;
899 sc->limits = &iwn6000_sensitivity_limits;
900 sc->base_params = &iwn_6050_base_params;
903 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
904 "0x%04x rev %d not supported (subdevice)\n", pid,
905 sc->subdevice_id,sc->hw_type);
909 /* 6150 WiFi/WiMax Series */
912 switch(sc->subdevice_id) {
913 case IWN_SDID_6150_1:
914 case IWN_SDID_6150_3:
915 case IWN_SDID_6150_5:
917 case IWN_SDID_6150_2:
918 case IWN_SDID_6150_4:
919 case IWN_SDID_6150_6:
921 sc->fwname = "iwn6050fw";
922 sc->limits = &iwn6000_sensitivity_limits;
923 sc->base_params = &iwn_6150_base_params;
926 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
927 "0x%04x rev %d not supported (subdevice)\n", pid,
928 sc->subdevice_id,sc->hw_type);
932 /* 6030 Series and 1030 Series */
937 switch(sc->subdevice_id) {
938 case IWN_SDID_x030_1:
939 case IWN_SDID_x030_3:
940 case IWN_SDID_x030_5:
942 case IWN_SDID_x030_2:
943 case IWN_SDID_x030_4:
944 case IWN_SDID_x030_6:
946 case IWN_SDID_x030_7:
947 case IWN_SDID_x030_10:
948 case IWN_SDID_x030_14:
950 case IWN_SDID_x030_8:
951 case IWN_SDID_x030_11:
952 case IWN_SDID_x030_15:
954 case IWN_SDID_x030_9:
955 case IWN_SDID_x030_12:
956 case IWN_SDID_x030_16:
958 case IWN_SDID_x030_13:
960 sc->fwname = "iwn6000g2bfw";
961 sc->limits = &iwn6000_sensitivity_limits;
962 sc->base_params = &iwn_6000g2b_base_params;
965 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
966 "0x%04x rev %d not supported (subdevice)\n", pid,
967 sc->subdevice_id,sc->hw_type);
971 /* 130 Series WiFi */
972 /* XXX: This series will need adjustment for rate.
973 * see rx_with_siso_diversity in linux kernel
977 switch(sc->subdevice_id) {
986 sc->fwname = "iwn6000g2bfw";
987 sc->limits = &iwn6000_sensitivity_limits;
988 sc->base_params = &iwn_6000g2b_base_params;
991 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
992 "0x%04x rev %d not supported (subdevice)\n", pid,
993 sc->subdevice_id,sc->hw_type);
997 /* 100 Series WiFi */
1000 switch(sc->subdevice_id) {
1001 case IWN_SDID_100_1:
1002 case IWN_SDID_100_2:
1003 case IWN_SDID_100_3:
1004 case IWN_SDID_100_4:
1005 case IWN_SDID_100_5:
1006 case IWN_SDID_100_6:
1007 sc->limits = &iwn1000_sensitivity_limits;
1008 sc->base_params = &iwn1000_base_params;
1009 sc->fwname = "iwn100fw";
1012 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
1013 "0x%04x rev %d not supported (subdevice)\n", pid,
1014 sc->subdevice_id,sc->hw_type);
1020 /* XXX: This series will need adjustment for rate.
1021 * see rx_with_siso_diversity in linux kernel
1025 switch(sc->subdevice_id) {
1026 case IWN_SDID_105_1:
1027 case IWN_SDID_105_2:
1028 case IWN_SDID_105_3:
1030 case IWN_SDID_105_4:
1032 sc->limits = &iwn2030_sensitivity_limits;
1033 sc->base_params = &iwn2000_base_params;
1034 sc->fwname = "iwn105fw";
1037 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
1038 "0x%04x rev %d not supported (subdevice)\n", pid,
1039 sc->subdevice_id,sc->hw_type);
1045 /* XXX: This series will need adjustment for rate.
1046 * see rx_with_siso_diversity in linux kernel
1050 switch(sc->subdevice_id) {
1051 case IWN_SDID_135_1:
1052 case IWN_SDID_135_2:
1053 case IWN_SDID_135_3:
1054 sc->limits = &iwn2030_sensitivity_limits;
1055 sc->base_params = &iwn2030_base_params;
1056 sc->fwname = "iwn135fw";
1059 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
1060 "0x%04x rev %d not supported (subdevice)\n", pid,
1061 sc->subdevice_id,sc->hw_type);
1067 case IWN_DID_2x00_1:
1068 case IWN_DID_2x00_2:
1069 switch(sc->subdevice_id) {
1070 case IWN_SDID_2x00_1:
1071 case IWN_SDID_2x00_2:
1072 case IWN_SDID_2x00_3:
1074 case IWN_SDID_2x00_4:
1075 //iwl2000_2bgn_d_cfg
1076 sc->limits = &iwn2030_sensitivity_limits;
1077 sc->base_params = &iwn2000_base_params;
1078 sc->fwname = "iwn2000fw";
1081 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
1082 "0x%04x rev %d not supported (subdevice) \n",
1083 pid, sc->subdevice_id, sc->hw_type);
1088 case IWN_DID_2x30_1:
1089 case IWN_DID_2x30_2:
1090 switch(sc->subdevice_id) {
1091 case IWN_SDID_2x30_1:
1092 case IWN_SDID_2x30_3:
1093 case IWN_SDID_2x30_5:
1095 case IWN_SDID_2x30_2:
1096 case IWN_SDID_2x30_4:
1097 case IWN_SDID_2x30_6:
1099 sc->limits = &iwn2030_sensitivity_limits;
1100 sc->base_params = &iwn2030_base_params;
1101 sc->fwname = "iwn2030fw";
1104 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
1105 "0x%04x rev %d not supported (subdevice)\n", pid,
1106 sc->subdevice_id,sc->hw_type);
1111 case IWN_DID_5x00_1:
1112 case IWN_DID_5x00_2:
1113 case IWN_DID_5x00_3:
1114 case IWN_DID_5x00_4:
1115 sc->limits = &iwn5000_sensitivity_limits;
1116 sc->base_params = &iwn5000_base_params;
1117 sc->fwname = "iwn5000fw";
1118 switch(sc->subdevice_id) {
1119 case IWN_SDID_5x00_1:
1120 case IWN_SDID_5x00_2:
1121 case IWN_SDID_5x00_3:
1122 case IWN_SDID_5x00_4:
1123 case IWN_SDID_5x00_9:
1124 case IWN_SDID_5x00_10:
1125 case IWN_SDID_5x00_11:
1126 case IWN_SDID_5x00_12:
1127 case IWN_SDID_5x00_17:
1128 case IWN_SDID_5x00_18:
1129 case IWN_SDID_5x00_19:
1130 case IWN_SDID_5x00_20:
1132 sc->txchainmask = IWN_ANT_B;
1133 sc->rxchainmask = IWN_ANT_AB;
1135 case IWN_SDID_5x00_5:
1136 case IWN_SDID_5x00_6:
1137 case IWN_SDID_5x00_13:
1138 case IWN_SDID_5x00_14:
1139 case IWN_SDID_5x00_21:
1140 case IWN_SDID_5x00_22:
1142 sc->txchainmask = IWN_ANT_B;
1143 sc->rxchainmask = IWN_ANT_AB;
1145 case IWN_SDID_5x00_7:
1146 case IWN_SDID_5x00_8:
1147 case IWN_SDID_5x00_15:
1148 case IWN_SDID_5x00_16:
1149 case IWN_SDID_5x00_23:
1150 case IWN_SDID_5x00_24:
1152 sc->txchainmask = IWN_ANT_B;
1153 sc->rxchainmask = IWN_ANT_AB;
1155 case IWN_SDID_5x00_25:
1156 case IWN_SDID_5x00_26:
1157 case IWN_SDID_5x00_27:
1158 case IWN_SDID_5x00_28:
1159 case IWN_SDID_5x00_29:
1160 case IWN_SDID_5x00_30:
1161 case IWN_SDID_5x00_31:
1162 case IWN_SDID_5x00_32:
1163 case IWN_SDID_5x00_33:
1164 case IWN_SDID_5x00_34:
1165 case IWN_SDID_5x00_35:
1166 case IWN_SDID_5x00_36:
1168 sc->txchainmask = IWN_ANT_ABC;
1169 sc->rxchainmask = IWN_ANT_ABC;
1172 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
1173 "0x%04x rev %d not supported (subdevice)\n", pid,
1174 sc->subdevice_id,sc->hw_type);
1179 case IWN_DID_5x50_1:
1180 case IWN_DID_5x50_2:
1181 case IWN_DID_5x50_3:
1182 case IWN_DID_5x50_4:
1183 sc->limits = &iwn5000_sensitivity_limits;
1184 sc->base_params = &iwn5000_base_params;
1185 sc->fwname = "iwn5000fw";
1186 switch(sc->subdevice_id) {
1187 case IWN_SDID_5x50_1:
1188 case IWN_SDID_5x50_2:
1189 case IWN_SDID_5x50_3:
1191 sc->limits = &iwn5000_sensitivity_limits;
1192 sc->base_params = &iwn5000_base_params;
1193 sc->fwname = "iwn5000fw";
1195 case IWN_SDID_5x50_4:
1196 case IWN_SDID_5x50_5:
1197 case IWN_SDID_5x50_8:
1198 case IWN_SDID_5x50_9:
1199 case IWN_SDID_5x50_10:
1200 case IWN_SDID_5x50_11:
1202 case IWN_SDID_5x50_6:
1203 case IWN_SDID_5x50_7:
1204 case IWN_SDID_5x50_12:
1205 case IWN_SDID_5x50_13:
1207 sc->limits = &iwn5000_sensitivity_limits;
1208 sc->fwname = "iwn5150fw";
1209 sc->base_params = &iwn_5x50_base_params;
1212 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
1213 "0x%04x rev %d not supported (subdevice)\n", pid,
1214 sc->subdevice_id,sc->hw_type);
1219 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id : 0x%04x"
1220 "rev 0x%08x not supported (device)\n", pid, sc->subdevice_id,
1228 iwn4965_attach(struct iwn_softc *sc, uint16_t pid)
1230 struct iwn_ops *ops = &sc->ops;
1232 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
1233 ops->load_firmware = iwn4965_load_firmware;
1234 ops->read_eeprom = iwn4965_read_eeprom;
1235 ops->post_alive = iwn4965_post_alive;
1236 ops->nic_config = iwn4965_nic_config;
1237 ops->update_sched = iwn4965_update_sched;
1238 ops->get_temperature = iwn4965_get_temperature;
1239 ops->get_rssi = iwn4965_get_rssi;
1240 ops->set_txpower = iwn4965_set_txpower;
1241 ops->init_gains = iwn4965_init_gains;
1242 ops->set_gains = iwn4965_set_gains;
1243 ops->rxon_assoc = iwn4965_rxon_assoc;
1244 ops->add_node = iwn4965_add_node;
1245 ops->tx_done = iwn4965_tx_done;
1246 ops->ampdu_tx_start = iwn4965_ampdu_tx_start;
1247 ops->ampdu_tx_stop = iwn4965_ampdu_tx_stop;
1248 sc->ntxqs = IWN4965_NTXQUEUES;
1249 sc->firstaggqueue = IWN4965_FIRSTAGGQUEUE;
1250 sc->ndmachnls = IWN4965_NDMACHNLS;
1251 sc->broadcast_id = IWN4965_ID_BROADCAST;
1252 sc->rxonsz = IWN4965_RXONSZ;
1253 sc->schedsz = IWN4965_SCHEDSZ;
1254 sc->fw_text_maxsz = IWN4965_FW_TEXT_MAXSZ;
1255 sc->fw_data_maxsz = IWN4965_FW_DATA_MAXSZ;
1256 sc->fwsz = IWN4965_FWSZ;
1257 sc->sched_txfact_addr = IWN4965_SCHED_TXFACT;
1258 sc->limits = &iwn4965_sensitivity_limits;
1259 sc->fwname = "iwn4965fw";
1260 /* Override chains masks, ROM is known to be broken. */
1261 sc->txchainmask = IWN_ANT_AB;
1262 sc->rxchainmask = IWN_ANT_ABC;
1263 /* Enable normal btcoex */
1264 sc->sc_flags |= IWN_FLAG_BTCOEX;
1266 DPRINTF(sc, IWN_DEBUG_TRACE, "%s: end\n",__func__);
1272 iwn5000_attach(struct iwn_softc *sc, uint16_t pid)
1274 struct iwn_ops *ops = &sc->ops;
1276 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
1278 ops->load_firmware = iwn5000_load_firmware;
1279 ops->read_eeprom = iwn5000_read_eeprom;
1280 ops->post_alive = iwn5000_post_alive;
1281 ops->nic_config = iwn5000_nic_config;
1282 ops->update_sched = iwn5000_update_sched;
1283 ops->get_temperature = iwn5000_get_temperature;
1284 ops->get_rssi = iwn5000_get_rssi;
1285 ops->set_txpower = iwn5000_set_txpower;
1286 ops->init_gains = iwn5000_init_gains;
1287 ops->set_gains = iwn5000_set_gains;
1288 ops->rxon_assoc = iwn5000_rxon_assoc;
1289 ops->add_node = iwn5000_add_node;
1290 ops->tx_done = iwn5000_tx_done;
1291 ops->ampdu_tx_start = iwn5000_ampdu_tx_start;
1292 ops->ampdu_tx_stop = iwn5000_ampdu_tx_stop;
1293 sc->ntxqs = IWN5000_NTXQUEUES;
1294 sc->firstaggqueue = IWN5000_FIRSTAGGQUEUE;
1295 sc->ndmachnls = IWN5000_NDMACHNLS;
1296 sc->broadcast_id = IWN5000_ID_BROADCAST;
1297 sc->rxonsz = IWN5000_RXONSZ;
1298 sc->schedsz = IWN5000_SCHEDSZ;
1299 sc->fw_text_maxsz = IWN5000_FW_TEXT_MAXSZ;
1300 sc->fw_data_maxsz = IWN5000_FW_DATA_MAXSZ;
1301 sc->fwsz = IWN5000_FWSZ;
1302 sc->sched_txfact_addr = IWN5000_SCHED_TXFACT;
1303 sc->reset_noise_gain = IWN5000_PHY_CALIB_RESET_NOISE_GAIN;
1304 sc->noise_gain = IWN5000_PHY_CALIB_NOISE_GAIN;
1310 * Attach the interface to 802.11 radiotap.
1313 iwn_radiotap_attach(struct iwn_softc *sc)
1316 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
1317 ieee80211_radiotap_attach(&sc->sc_ic,
1318 &sc->sc_txtap.wt_ihdr, sizeof(sc->sc_txtap),
1319 IWN_TX_RADIOTAP_PRESENT,
1320 &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap),
1321 IWN_RX_RADIOTAP_PRESENT);
1322 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
1326 iwn_sysctlattach(struct iwn_softc *sc)
1329 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->sc_dev);
1330 struct sysctl_oid *tree = device_get_sysctl_tree(sc->sc_dev);
1332 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
1333 "debug", CTLFLAG_RW, &sc->sc_debug, sc->sc_debug,
1334 "control debugging printfs");
1338 static struct ieee80211vap *
1339 iwn_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit,
1340 enum ieee80211_opmode opmode, int flags,
1341 const uint8_t bssid[IEEE80211_ADDR_LEN],
1342 const uint8_t mac[IEEE80211_ADDR_LEN])
1344 struct iwn_softc *sc = ic->ic_softc;
1345 struct iwn_vap *ivp;
1346 struct ieee80211vap *vap;
1348 if (!TAILQ_EMPTY(&ic->ic_vaps)) /* only one at a time */
1351 ivp = malloc(sizeof(struct iwn_vap), M_80211_VAP, M_WAITOK | M_ZERO);
1353 ieee80211_vap_setup(ic, vap, name, unit, opmode, flags, bssid);
1354 ivp->ctx = IWN_RXON_BSS_CTX;
1355 vap->iv_bmissthreshold = 10; /* override default */
1356 /* Override with driver methods. */
1357 ivp->iv_newstate = vap->iv_newstate;
1358 vap->iv_newstate = iwn_newstate;
1359 sc->ivap[IWN_RXON_BSS_CTX] = vap;
1361 ieee80211_ratectl_init(vap);
1362 /* Complete setup. */
1363 ieee80211_vap_attach(vap, iwn_media_change, ieee80211_media_status,
1365 ic->ic_opmode = opmode;
1370 iwn_vap_delete(struct ieee80211vap *vap)
1372 struct iwn_vap *ivp = IWN_VAP(vap);
1374 ieee80211_ratectl_deinit(vap);
1375 ieee80211_vap_detach(vap);
1376 free(ivp, M_80211_VAP);
1380 iwn_xmit_queue_drain(struct iwn_softc *sc)
1383 struct ieee80211_node *ni;
1385 IWN_LOCK_ASSERT(sc);
1386 while ((m = mbufq_dequeue(&sc->sc_xmit_queue)) != NULL) {
1387 ni = (struct ieee80211_node *)m->m_pkthdr.rcvif;
1388 ieee80211_free_node(ni);
1394 iwn_xmit_queue_enqueue(struct iwn_softc *sc, struct mbuf *m)
1397 IWN_LOCK_ASSERT(sc);
1398 return (mbufq_enqueue(&sc->sc_xmit_queue, m));
1402 iwn_detach(device_t dev)
1404 struct iwn_softc *sc = device_get_softc(dev);
1407 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
1409 if (sc->sc_ic.ic_softc != NULL) {
1410 /* Free the mbuf queue and node references */
1412 iwn_xmit_queue_drain(sc);
1417 taskqueue_drain_all(sc->sc_tq);
1418 taskqueue_free(sc->sc_tq);
1420 callout_drain(&sc->watchdog_to);
1421 callout_drain(&sc->scan_timeout);
1422 callout_drain(&sc->calib_to);
1423 ieee80211_ifdetach(&sc->sc_ic);
1426 /* Uninstall interrupt handler. */
1427 if (sc->irq != NULL) {
1428 bus_teardown_intr(dev, sc->irq, sc->sc_ih);
1429 bus_release_resource(dev, SYS_RES_IRQ, rman_get_rid(sc->irq),
1431 pci_release_msi(dev);
1434 /* Free DMA resources. */
1435 iwn_free_rx_ring(sc, &sc->rxq);
1436 for (qid = 0; qid < sc->ntxqs; qid++)
1437 iwn_free_tx_ring(sc, &sc->txq[qid]);
1440 if (sc->ict != NULL)
1444 if (sc->mem != NULL)
1445 bus_release_resource(dev, SYS_RES_MEMORY,
1446 rman_get_rid(sc->mem), sc->mem);
1449 destroy_dev(sc->sc_cdev);
1453 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n", __func__);
1454 IWN_LOCK_DESTROY(sc);
1459 iwn_shutdown(device_t dev)
1461 struct iwn_softc *sc = device_get_softc(dev);
1468 iwn_suspend(device_t dev)
1470 struct iwn_softc *sc = device_get_softc(dev);
1472 ieee80211_suspend_all(&sc->sc_ic);
1477 iwn_resume(device_t dev)
1479 struct iwn_softc *sc = device_get_softc(dev);
1481 /* Clear device-specific "PCI retry timeout" register (41h). */
1482 pci_write_config(dev, 0x41, 0, 1);
1484 ieee80211_resume_all(&sc->sc_ic);
1489 iwn_nic_lock(struct iwn_softc *sc)
1493 /* Request exclusive access to NIC. */
1494 IWN_SETBITS(sc, IWN_GP_CNTRL, IWN_GP_CNTRL_MAC_ACCESS_REQ);
1496 /* Spin until we actually get the lock. */
1497 for (ntries = 0; ntries < 1000; ntries++) {
1498 if ((IWN_READ(sc, IWN_GP_CNTRL) &
1499 (IWN_GP_CNTRL_MAC_ACCESS_ENA | IWN_GP_CNTRL_SLEEP)) ==
1500 IWN_GP_CNTRL_MAC_ACCESS_ENA)
1507 static __inline void
1508 iwn_nic_unlock(struct iwn_softc *sc)
1510 IWN_CLRBITS(sc, IWN_GP_CNTRL, IWN_GP_CNTRL_MAC_ACCESS_REQ);
1513 static __inline uint32_t
1514 iwn_prph_read(struct iwn_softc *sc, uint32_t addr)
1516 IWN_WRITE(sc, IWN_PRPH_RADDR, IWN_PRPH_DWORD | addr);
1517 IWN_BARRIER_READ_WRITE(sc);
1518 return IWN_READ(sc, IWN_PRPH_RDATA);
1521 static __inline void
1522 iwn_prph_write(struct iwn_softc *sc, uint32_t addr, uint32_t data)
1524 IWN_WRITE(sc, IWN_PRPH_WADDR, IWN_PRPH_DWORD | addr);
1525 IWN_BARRIER_WRITE(sc);
1526 IWN_WRITE(sc, IWN_PRPH_WDATA, data);
1529 static __inline void
1530 iwn_prph_setbits(struct iwn_softc *sc, uint32_t addr, uint32_t mask)
1532 iwn_prph_write(sc, addr, iwn_prph_read(sc, addr) | mask);
1535 static __inline void
1536 iwn_prph_clrbits(struct iwn_softc *sc, uint32_t addr, uint32_t mask)
1538 iwn_prph_write(sc, addr, iwn_prph_read(sc, addr) & ~mask);
1541 static __inline void
1542 iwn_prph_write_region_4(struct iwn_softc *sc, uint32_t addr,
1543 const uint32_t *data, int count)
1545 for (; count > 0; count--, data++, addr += 4)
1546 iwn_prph_write(sc, addr, *data);
1549 static __inline uint32_t
1550 iwn_mem_read(struct iwn_softc *sc, uint32_t addr)
1552 IWN_WRITE(sc, IWN_MEM_RADDR, addr);
1553 IWN_BARRIER_READ_WRITE(sc);
1554 return IWN_READ(sc, IWN_MEM_RDATA);
1557 static __inline void
1558 iwn_mem_write(struct iwn_softc *sc, uint32_t addr, uint32_t data)
1560 IWN_WRITE(sc, IWN_MEM_WADDR, addr);
1561 IWN_BARRIER_WRITE(sc);
1562 IWN_WRITE(sc, IWN_MEM_WDATA, data);
1565 static __inline void
1566 iwn_mem_write_2(struct iwn_softc *sc, uint32_t addr, uint16_t data)
1570 tmp = iwn_mem_read(sc, addr & ~3);
1572 tmp = (tmp & 0x0000ffff) | data << 16;
1574 tmp = (tmp & 0xffff0000) | data;
1575 iwn_mem_write(sc, addr & ~3, tmp);
1578 static __inline void
1579 iwn_mem_read_region_4(struct iwn_softc *sc, uint32_t addr, uint32_t *data,
1582 for (; count > 0; count--, addr += 4)
1583 *data++ = iwn_mem_read(sc, addr);
1586 static __inline void
1587 iwn_mem_set_region_4(struct iwn_softc *sc, uint32_t addr, uint32_t val,
1590 for (; count > 0; count--, addr += 4)
1591 iwn_mem_write(sc, addr, val);
1595 iwn_eeprom_lock(struct iwn_softc *sc)
1599 for (i = 0; i < 100; i++) {
1600 /* Request exclusive access to EEPROM. */
1601 IWN_SETBITS(sc, IWN_HW_IF_CONFIG,
1602 IWN_HW_IF_CONFIG_EEPROM_LOCKED);
1604 /* Spin until we actually get the lock. */
1605 for (ntries = 0; ntries < 100; ntries++) {
1606 if (IWN_READ(sc, IWN_HW_IF_CONFIG) &
1607 IWN_HW_IF_CONFIG_EEPROM_LOCKED)
1612 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end timeout\n", __func__);
1616 static __inline void
1617 iwn_eeprom_unlock(struct iwn_softc *sc)
1619 IWN_CLRBITS(sc, IWN_HW_IF_CONFIG, IWN_HW_IF_CONFIG_EEPROM_LOCKED);
1623 * Initialize access by host to One Time Programmable ROM.
1624 * NB: This kind of ROM can be found on 1000 or 6000 Series only.
1627 iwn_init_otprom(struct iwn_softc *sc)
1629 uint16_t prev, base, next;
1632 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
1634 /* Wait for clock stabilization before accessing prph. */
1635 if ((error = iwn_clock_wait(sc)) != 0)
1638 if ((error = iwn_nic_lock(sc)) != 0)
1640 iwn_prph_setbits(sc, IWN_APMG_PS, IWN_APMG_PS_RESET_REQ);
1642 iwn_prph_clrbits(sc, IWN_APMG_PS, IWN_APMG_PS_RESET_REQ);
1645 /* Set auto clock gate disable bit for HW with OTP shadow RAM. */
1646 if (sc->base_params->shadow_ram_support) {
1647 IWN_SETBITS(sc, IWN_DBG_LINK_PWR_MGMT,
1648 IWN_RESET_LINK_PWR_MGMT_DIS);
1650 IWN_CLRBITS(sc, IWN_EEPROM_GP, IWN_EEPROM_GP_IF_OWNER);
1651 /* Clear ECC status. */
1652 IWN_SETBITS(sc, IWN_OTP_GP,
1653 IWN_OTP_GP_ECC_CORR_STTS | IWN_OTP_GP_ECC_UNCORR_STTS);
1656 * Find the block before last block (contains the EEPROM image)
1657 * for HW without OTP shadow RAM.
1659 if (! sc->base_params->shadow_ram_support) {
1660 /* Switch to absolute addressing mode. */
1661 IWN_CLRBITS(sc, IWN_OTP_GP, IWN_OTP_GP_RELATIVE_ACCESS);
1663 for (count = 0; count < sc->base_params->max_ll_items;
1665 error = iwn_read_prom_data(sc, base, &next, 2);
1668 if (next == 0) /* End of linked-list. */
1671 base = le16toh(next);
1673 if (count == 0 || count == sc->base_params->max_ll_items)
1675 /* Skip "next" word. */
1676 sc->prom_base = prev + 1;
1679 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
1685 iwn_read_prom_data(struct iwn_softc *sc, uint32_t addr, void *data, int count)
1687 uint8_t *out = data;
1691 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
1693 addr += sc->prom_base;
1694 for (; count > 0; count -= 2, addr++) {
1695 IWN_WRITE(sc, IWN_EEPROM, addr << 2);
1696 for (ntries = 0; ntries < 10; ntries++) {
1697 val = IWN_READ(sc, IWN_EEPROM);
1698 if (val & IWN_EEPROM_READ_VALID)
1703 device_printf(sc->sc_dev,
1704 "timeout reading ROM at 0x%x\n", addr);
1707 if (sc->sc_flags & IWN_FLAG_HAS_OTPROM) {
1708 /* OTPROM, check for ECC errors. */
1709 tmp = IWN_READ(sc, IWN_OTP_GP);
1710 if (tmp & IWN_OTP_GP_ECC_UNCORR_STTS) {
1711 device_printf(sc->sc_dev,
1712 "OTPROM ECC error at 0x%x\n", addr);
1715 if (tmp & IWN_OTP_GP_ECC_CORR_STTS) {
1716 /* Correctable ECC error, clear bit. */
1717 IWN_SETBITS(sc, IWN_OTP_GP,
1718 IWN_OTP_GP_ECC_CORR_STTS);
1726 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
1732 iwn_dma_map_addr(void *arg, bus_dma_segment_t *segs, int nsegs, int error)
1736 KASSERT(nsegs == 1, ("too many DMA segments, %d should be 1", nsegs));
1737 *(bus_addr_t *)arg = segs[0].ds_addr;
1741 iwn_dma_contig_alloc(struct iwn_softc *sc, struct iwn_dma_info *dma,
1742 void **kvap, bus_size_t size, bus_size_t alignment)
1749 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), alignment,
1750 0, BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, size,
1751 1, size, 0, NULL, NULL, &dma->tag);
1755 error = bus_dmamem_alloc(dma->tag, (void **)&dma->vaddr,
1756 BUS_DMA_NOWAIT | BUS_DMA_ZERO | BUS_DMA_COHERENT, &dma->map);
1760 error = bus_dmamap_load(dma->tag, dma->map, dma->vaddr, size,
1761 iwn_dma_map_addr, &dma->paddr, BUS_DMA_NOWAIT);
1765 bus_dmamap_sync(dma->tag, dma->map, BUS_DMASYNC_PREWRITE);
1772 fail: iwn_dma_contig_free(dma);
1777 iwn_dma_contig_free(struct iwn_dma_info *dma)
1779 if (dma->vaddr != NULL) {
1780 bus_dmamap_sync(dma->tag, dma->map,
1781 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
1782 bus_dmamap_unload(dma->tag, dma->map);
1783 bus_dmamem_free(dma->tag, dma->vaddr, dma->map);
1786 if (dma->tag != NULL) {
1787 bus_dma_tag_destroy(dma->tag);
1793 iwn_alloc_sched(struct iwn_softc *sc)
1795 /* TX scheduler rings must be aligned on a 1KB boundary. */
1796 return iwn_dma_contig_alloc(sc, &sc->sched_dma, (void **)&sc->sched,
1801 iwn_free_sched(struct iwn_softc *sc)
1803 iwn_dma_contig_free(&sc->sched_dma);
1807 iwn_alloc_kw(struct iwn_softc *sc)
1809 /* "Keep Warm" page must be aligned on a 4KB boundary. */
1810 return iwn_dma_contig_alloc(sc, &sc->kw_dma, NULL, 4096, 4096);
1814 iwn_free_kw(struct iwn_softc *sc)
1816 iwn_dma_contig_free(&sc->kw_dma);
1820 iwn_alloc_ict(struct iwn_softc *sc)
1822 /* ICT table must be aligned on a 4KB boundary. */
1823 return iwn_dma_contig_alloc(sc, &sc->ict_dma, (void **)&sc->ict,
1824 IWN_ICT_SIZE, 4096);
1828 iwn_free_ict(struct iwn_softc *sc)
1830 iwn_dma_contig_free(&sc->ict_dma);
1834 iwn_alloc_fwmem(struct iwn_softc *sc)
1836 /* Must be aligned on a 16-byte boundary. */
1837 return iwn_dma_contig_alloc(sc, &sc->fw_dma, NULL, sc->fwsz, 16);
1841 iwn_free_fwmem(struct iwn_softc *sc)
1843 iwn_dma_contig_free(&sc->fw_dma);
1847 iwn_alloc_rx_ring(struct iwn_softc *sc, struct iwn_rx_ring *ring)
1854 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
1856 /* Allocate RX descriptors (256-byte aligned). */
1857 size = IWN_RX_RING_COUNT * sizeof (uint32_t);
1858 error = iwn_dma_contig_alloc(sc, &ring->desc_dma, (void **)&ring->desc,
1861 device_printf(sc->sc_dev,
1862 "%s: could not allocate RX ring DMA memory, error %d\n",
1867 /* Allocate RX status area (16-byte aligned). */
1868 error = iwn_dma_contig_alloc(sc, &ring->stat_dma, (void **)&ring->stat,
1869 sizeof (struct iwn_rx_status), 16);
1871 device_printf(sc->sc_dev,
1872 "%s: could not allocate RX status DMA memory, error %d\n",
1877 /* Create RX buffer DMA tag. */
1878 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 1, 0,
1879 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL,
1880 IWN_RBUF_SIZE, 1, IWN_RBUF_SIZE, 0, NULL, NULL, &ring->data_dmat);
1882 device_printf(sc->sc_dev,
1883 "%s: could not create RX buf DMA tag, error %d\n",
1889 * Allocate and map RX buffers.
1891 for (i = 0; i < IWN_RX_RING_COUNT; i++) {
1892 struct iwn_rx_data *data = &ring->data[i];
1895 error = bus_dmamap_create(ring->data_dmat, 0, &data->map);
1897 device_printf(sc->sc_dev,
1898 "%s: could not create RX buf DMA map, error %d\n",
1903 data->m = m_getjcl(M_NOWAIT, MT_DATA, M_PKTHDR,
1905 if (data->m == NULL) {
1906 device_printf(sc->sc_dev,
1907 "%s: could not allocate RX mbuf\n", __func__);
1912 error = bus_dmamap_load(ring->data_dmat, data->map,
1913 mtod(data->m, void *), IWN_RBUF_SIZE, iwn_dma_map_addr,
1914 &paddr, BUS_DMA_NOWAIT);
1915 if (error != 0 && error != EFBIG) {
1916 device_printf(sc->sc_dev,
1917 "%s: can't map mbuf, error %d\n", __func__,
1922 bus_dmamap_sync(ring->data_dmat, data->map,
1923 BUS_DMASYNC_PREREAD);
1925 /* Set physical address of RX buffer (256-byte aligned). */
1926 ring->desc[i] = htole32(paddr >> 8);
1929 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
1930 BUS_DMASYNC_PREWRITE);
1932 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
1936 fail: iwn_free_rx_ring(sc, ring);
1938 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end in error\n",__func__);
1944 iwn_reset_rx_ring(struct iwn_softc *sc, struct iwn_rx_ring *ring)
1948 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
1950 if (iwn_nic_lock(sc) == 0) {
1951 IWN_WRITE(sc, IWN_FH_RX_CONFIG, 0);
1952 for (ntries = 0; ntries < 1000; ntries++) {
1953 if (IWN_READ(sc, IWN_FH_RX_STATUS) &
1954 IWN_FH_RX_STATUS_IDLE)
1961 sc->last_rx_valid = 0;
1965 iwn_free_rx_ring(struct iwn_softc *sc, struct iwn_rx_ring *ring)
1969 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s \n", __func__);
1971 iwn_dma_contig_free(&ring->desc_dma);
1972 iwn_dma_contig_free(&ring->stat_dma);
1974 for (i = 0; i < IWN_RX_RING_COUNT; i++) {
1975 struct iwn_rx_data *data = &ring->data[i];
1977 if (data->m != NULL) {
1978 bus_dmamap_sync(ring->data_dmat, data->map,
1979 BUS_DMASYNC_POSTREAD);
1980 bus_dmamap_unload(ring->data_dmat, data->map);
1984 if (data->map != NULL)
1985 bus_dmamap_destroy(ring->data_dmat, data->map);
1987 if (ring->data_dmat != NULL) {
1988 bus_dma_tag_destroy(ring->data_dmat);
1989 ring->data_dmat = NULL;
1994 iwn_alloc_tx_ring(struct iwn_softc *sc, struct iwn_tx_ring *ring, int qid)
2004 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
2006 /* Allocate TX descriptors (256-byte aligned). */
2007 size = IWN_TX_RING_COUNT * sizeof (struct iwn_tx_desc);
2008 error = iwn_dma_contig_alloc(sc, &ring->desc_dma, (void **)&ring->desc,
2011 device_printf(sc->sc_dev,
2012 "%s: could not allocate TX ring DMA memory, error %d\n",
2017 size = IWN_TX_RING_COUNT * sizeof (struct iwn_tx_cmd);
2018 error = iwn_dma_contig_alloc(sc, &ring->cmd_dma, (void **)&ring->cmd,
2021 device_printf(sc->sc_dev,
2022 "%s: could not allocate TX cmd DMA memory, error %d\n",
2027 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 1, 0,
2028 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES,
2029 IWN_MAX_SCATTER - 1, MCLBYTES, 0, NULL, NULL, &ring->data_dmat);
2031 device_printf(sc->sc_dev,
2032 "%s: could not create TX buf DMA tag, error %d\n",
2037 paddr = ring->cmd_dma.paddr;
2038 for (i = 0; i < IWN_TX_RING_COUNT; i++) {
2039 struct iwn_tx_data *data = &ring->data[i];
2041 data->cmd_paddr = paddr;
2042 data->scratch_paddr = paddr + 12;
2043 paddr += sizeof (struct iwn_tx_cmd);
2045 error = bus_dmamap_create(ring->data_dmat, 0, &data->map);
2047 device_printf(sc->sc_dev,
2048 "%s: could not create TX buf DMA map, error %d\n",
2054 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
2058 fail: iwn_free_tx_ring(sc, ring);
2059 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end in error\n", __func__);
2064 iwn_reset_tx_ring(struct iwn_softc *sc, struct iwn_tx_ring *ring)
2068 DPRINTF(sc, IWN_DEBUG_TRACE, "->doing %s \n", __func__);
2070 for (i = 0; i < IWN_TX_RING_COUNT; i++) {
2071 struct iwn_tx_data *data = &ring->data[i];
2073 if (data->m != NULL) {
2074 bus_dmamap_sync(ring->data_dmat, data->map,
2075 BUS_DMASYNC_POSTWRITE);
2076 bus_dmamap_unload(ring->data_dmat, data->map);
2080 if (data->ni != NULL) {
2081 ieee80211_free_node(data->ni);
2085 data->long_retries = 0;
2087 /* Clear TX descriptors. */
2088 memset(ring->desc, 0, ring->desc_dma.size);
2089 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
2090 BUS_DMASYNC_PREWRITE);
2091 sc->qfullmsk &= ~(1 << ring->qid);
2097 iwn_free_tx_ring(struct iwn_softc *sc, struct iwn_tx_ring *ring)
2101 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s \n", __func__);
2103 iwn_dma_contig_free(&ring->desc_dma);
2104 iwn_dma_contig_free(&ring->cmd_dma);
2106 for (i = 0; i < IWN_TX_RING_COUNT; i++) {
2107 struct iwn_tx_data *data = &ring->data[i];
2109 if (data->m != NULL) {
2110 bus_dmamap_sync(ring->data_dmat, data->map,
2111 BUS_DMASYNC_POSTWRITE);
2112 bus_dmamap_unload(ring->data_dmat, data->map);
2115 if (data->map != NULL)
2116 bus_dmamap_destroy(ring->data_dmat, data->map);
2118 if (ring->data_dmat != NULL) {
2119 bus_dma_tag_destroy(ring->data_dmat);
2120 ring->data_dmat = NULL;
2125 iwn_check_tx_ring(struct iwn_softc *sc, int qid)
2127 struct iwn_tx_ring *ring = &sc->txq[qid];
2129 KASSERT(ring->queued >= 0, ("%s: ring->queued (%d) for queue %d < 0!",
2130 __func__, ring->queued, qid));
2132 if (qid >= sc->firstaggqueue) {
2133 struct iwn_ops *ops = &sc->ops;
2134 struct ieee80211_tx_ampdu *tap = sc->qid2tap[qid];
2136 if (ring->queued == 0 && !IEEE80211_AMPDU_RUNNING(tap)) {
2137 uint16_t ssn = tap->txa_start & 0xfff;
2138 uint8_t tid = tap->txa_tid;
2139 int *res = tap->txa_private;
2142 ops->ampdu_tx_stop(sc, qid, tid, ssn);
2145 sc->qid2tap[qid] = NULL;
2146 free(res, M_DEVBUF);
2150 if (ring->queued < IWN_TX_RING_LOMARK) {
2151 sc->qfullmsk &= ~(1 << qid);
2153 if (ring->queued == 0)
2154 sc->sc_tx_timer = 0;
2156 sc->sc_tx_timer = 5;
2161 iwn5000_ict_reset(struct iwn_softc *sc)
2163 /* Disable interrupts. */
2164 IWN_WRITE(sc, IWN_INT_MASK, 0);
2166 /* Reset ICT table. */
2167 memset(sc->ict, 0, IWN_ICT_SIZE);
2170 bus_dmamap_sync(sc->ict_dma.tag, sc->ict_dma.map,
2171 BUS_DMASYNC_PREWRITE);
2173 /* Set physical address of ICT table (4KB aligned). */
2174 DPRINTF(sc, IWN_DEBUG_RESET, "%s: enabling ICT\n", __func__);
2175 IWN_WRITE(sc, IWN_DRAM_INT_TBL, IWN_DRAM_INT_TBL_ENABLE |
2176 IWN_DRAM_INT_TBL_WRAP_CHECK | sc->ict_dma.paddr >> 12);
2178 /* Enable periodic RX interrupt. */
2179 sc->int_mask |= IWN_INT_RX_PERIODIC;
2180 /* Switch to ICT interrupt mode in driver. */
2181 sc->sc_flags |= IWN_FLAG_USE_ICT;
2183 /* Re-enable interrupts. */
2184 IWN_WRITE(sc, IWN_INT, 0xffffffff);
2185 IWN_WRITE(sc, IWN_INT_MASK, sc->int_mask);
2189 iwn_read_eeprom(struct iwn_softc *sc, uint8_t macaddr[IEEE80211_ADDR_LEN])
2191 struct iwn_ops *ops = &sc->ops;
2195 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
2197 /* Check whether adapter has an EEPROM or an OTPROM. */
2198 if (sc->hw_type >= IWN_HW_REV_TYPE_1000 &&
2199 (IWN_READ(sc, IWN_OTP_GP) & IWN_OTP_GP_DEV_SEL_OTP))
2200 sc->sc_flags |= IWN_FLAG_HAS_OTPROM;
2201 DPRINTF(sc, IWN_DEBUG_RESET, "%s found\n",
2202 (sc->sc_flags & IWN_FLAG_HAS_OTPROM) ? "OTPROM" : "EEPROM");
2204 /* Adapter has to be powered on for EEPROM access to work. */
2205 if ((error = iwn_apm_init(sc)) != 0) {
2206 device_printf(sc->sc_dev,
2207 "%s: could not power ON adapter, error %d\n", __func__,
2212 if ((IWN_READ(sc, IWN_EEPROM_GP) & 0x7) == 0) {
2213 device_printf(sc->sc_dev, "%s: bad ROM signature\n", __func__);
2216 if ((error = iwn_eeprom_lock(sc)) != 0) {
2217 device_printf(sc->sc_dev, "%s: could not lock ROM, error %d\n",
2221 if (sc->sc_flags & IWN_FLAG_HAS_OTPROM) {
2222 if ((error = iwn_init_otprom(sc)) != 0) {
2223 device_printf(sc->sc_dev,
2224 "%s: could not initialize OTPROM, error %d\n",
2230 iwn_read_prom_data(sc, IWN_EEPROM_SKU_CAP, &val, 2);
2231 DPRINTF(sc, IWN_DEBUG_RESET, "SKU capabilities=0x%04x\n", le16toh(val));
2232 /* Check if HT support is bonded out. */
2233 if (val & htole16(IWN_EEPROM_SKU_CAP_11N))
2234 sc->sc_flags |= IWN_FLAG_HAS_11N;
2236 iwn_read_prom_data(sc, IWN_EEPROM_RFCFG, &val, 2);
2237 sc->rfcfg = le16toh(val);
2238 DPRINTF(sc, IWN_DEBUG_RESET, "radio config=0x%04x\n", sc->rfcfg);
2239 /* Read Tx/Rx chains from ROM unless it's known to be broken. */
2240 if (sc->txchainmask == 0)
2241 sc->txchainmask = IWN_RFCFG_TXANTMSK(sc->rfcfg);
2242 if (sc->rxchainmask == 0)
2243 sc->rxchainmask = IWN_RFCFG_RXANTMSK(sc->rfcfg);
2245 /* Read MAC address. */
2246 iwn_read_prom_data(sc, IWN_EEPROM_MAC, macaddr, 6);
2248 /* Read adapter-specific information from EEPROM. */
2249 ops->read_eeprom(sc);
2251 iwn_apm_stop(sc); /* Power OFF adapter. */
2253 iwn_eeprom_unlock(sc);
2255 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
2261 iwn4965_read_eeprom(struct iwn_softc *sc)
2267 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
2269 /* Read regulatory domain (4 ASCII characters). */
2270 iwn_read_prom_data(sc, IWN4965_EEPROM_DOMAIN, sc->eeprom_domain, 4);
2272 /* Read the list of authorized channels (20MHz & 40MHz). */
2273 for (i = 0; i < IWN_NBANDS - 1; i++) {
2274 addr = iwn4965_regulatory_bands[i];
2275 iwn_read_eeprom_channels(sc, i, addr);
2278 /* Read maximum allowed TX power for 2GHz and 5GHz bands. */
2279 iwn_read_prom_data(sc, IWN4965_EEPROM_MAXPOW, &val, 2);
2280 sc->maxpwr2GHz = val & 0xff;
2281 sc->maxpwr5GHz = val >> 8;
2282 /* Check that EEPROM values are within valid range. */
2283 if (sc->maxpwr5GHz < 20 || sc->maxpwr5GHz > 50)
2284 sc->maxpwr5GHz = 38;
2285 if (sc->maxpwr2GHz < 20 || sc->maxpwr2GHz > 50)
2286 sc->maxpwr2GHz = 38;
2287 DPRINTF(sc, IWN_DEBUG_RESET, "maxpwr 2GHz=%d 5GHz=%d\n",
2288 sc->maxpwr2GHz, sc->maxpwr5GHz);
2290 /* Read samples for each TX power group. */
2291 iwn_read_prom_data(sc, IWN4965_EEPROM_BANDS, sc->bands,
2294 /* Read voltage at which samples were taken. */
2295 iwn_read_prom_data(sc, IWN4965_EEPROM_VOLTAGE, &val, 2);
2296 sc->eeprom_voltage = (int16_t)le16toh(val);
2297 DPRINTF(sc, IWN_DEBUG_RESET, "voltage=%d (in 0.3V)\n",
2298 sc->eeprom_voltage);
2301 /* Print samples. */
2302 if (sc->sc_debug & IWN_DEBUG_ANY) {
2303 for (i = 0; i < IWN_NBANDS - 1; i++)
2304 iwn4965_print_power_group(sc, i);
2308 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
2313 iwn4965_print_power_group(struct iwn_softc *sc, int i)
2315 struct iwn4965_eeprom_band *band = &sc->bands[i];
2316 struct iwn4965_eeprom_chan_samples *chans = band->chans;
2319 printf("===band %d===\n", i);
2320 printf("chan lo=%d, chan hi=%d\n", band->lo, band->hi);
2321 printf("chan1 num=%d\n", chans[0].num);
2322 for (c = 0; c < 2; c++) {
2323 for (j = 0; j < IWN_NSAMPLES; j++) {
2324 printf("chain %d, sample %d: temp=%d gain=%d "
2325 "power=%d pa_det=%d\n", c, j,
2326 chans[0].samples[c][j].temp,
2327 chans[0].samples[c][j].gain,
2328 chans[0].samples[c][j].power,
2329 chans[0].samples[c][j].pa_det);
2332 printf("chan2 num=%d\n", chans[1].num);
2333 for (c = 0; c < 2; c++) {
2334 for (j = 0; j < IWN_NSAMPLES; j++) {
2335 printf("chain %d, sample %d: temp=%d gain=%d "
2336 "power=%d pa_det=%d\n", c, j,
2337 chans[1].samples[c][j].temp,
2338 chans[1].samples[c][j].gain,
2339 chans[1].samples[c][j].power,
2340 chans[1].samples[c][j].pa_det);
2347 iwn5000_read_eeprom(struct iwn_softc *sc)
2349 struct iwn5000_eeprom_calib_hdr hdr;
2351 uint32_t base, addr;
2355 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
2357 /* Read regulatory domain (4 ASCII characters). */
2358 iwn_read_prom_data(sc, IWN5000_EEPROM_REG, &val, 2);
2359 base = le16toh(val);
2360 iwn_read_prom_data(sc, base + IWN5000_EEPROM_DOMAIN,
2361 sc->eeprom_domain, 4);
2363 /* Read the list of authorized channels (20MHz & 40MHz). */
2364 for (i = 0; i < IWN_NBANDS - 1; i++) {
2365 addr = base + sc->base_params->regulatory_bands[i];
2366 iwn_read_eeprom_channels(sc, i, addr);
2369 /* Read enhanced TX power information for 6000 Series. */
2370 if (sc->base_params->enhanced_TX_power)
2371 iwn_read_eeprom_enhinfo(sc);
2373 iwn_read_prom_data(sc, IWN5000_EEPROM_CAL, &val, 2);
2374 base = le16toh(val);
2375 iwn_read_prom_data(sc, base, &hdr, sizeof hdr);
2376 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
2377 "%s: calib version=%u pa type=%u voltage=%u\n", __func__,
2378 hdr.version, hdr.pa_type, le16toh(hdr.volt));
2379 sc->calib_ver = hdr.version;
2381 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSETv2) {
2382 sc->eeprom_voltage = le16toh(hdr.volt);
2383 iwn_read_prom_data(sc, base + IWN5000_EEPROM_TEMP, &val, 2);
2384 sc->eeprom_temp_high=le16toh(val);
2385 iwn_read_prom_data(sc, base + IWN5000_EEPROM_VOLT, &val, 2);
2386 sc->eeprom_temp = le16toh(val);
2389 if (sc->hw_type == IWN_HW_REV_TYPE_5150) {
2390 /* Compute temperature offset. */
2391 iwn_read_prom_data(sc, base + IWN5000_EEPROM_TEMP, &val, 2);
2392 sc->eeprom_temp = le16toh(val);
2393 iwn_read_prom_data(sc, base + IWN5000_EEPROM_VOLT, &val, 2);
2394 volt = le16toh(val);
2395 sc->temp_off = sc->eeprom_temp - (volt / -5);
2396 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "temp=%d volt=%d offset=%dK\n",
2397 sc->eeprom_temp, volt, sc->temp_off);
2399 /* Read crystal calibration. */
2400 iwn_read_prom_data(sc, base + IWN5000_EEPROM_CRYSTAL,
2401 &sc->eeprom_crystal, sizeof (uint32_t));
2402 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "crystal calibration 0x%08x\n",
2403 le32toh(sc->eeprom_crystal));
2406 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
2411 * Translate EEPROM flags to net80211.
2414 iwn_eeprom_channel_flags(struct iwn_eeprom_chan *channel)
2419 if ((channel->flags & IWN_EEPROM_CHAN_ACTIVE) == 0)
2420 nflags |= IEEE80211_CHAN_PASSIVE;
2421 if ((channel->flags & IWN_EEPROM_CHAN_IBSS) == 0)
2422 nflags |= IEEE80211_CHAN_NOADHOC;
2423 if (channel->flags & IWN_EEPROM_CHAN_RADAR) {
2424 nflags |= IEEE80211_CHAN_DFS;
2425 /* XXX apparently IBSS may still be marked */
2426 nflags |= IEEE80211_CHAN_NOADHOC;
2433 iwn_read_eeprom_band(struct iwn_softc *sc, int n, int maxchans, int *nchans,
2434 struct ieee80211_channel chans[])
2436 struct iwn_eeprom_chan *channels = sc->eeprom_channels[n];
2437 const struct iwn_chan_band *band = &iwn_bands[n];
2438 uint8_t bands[IEEE80211_MODE_BYTES];
2440 int i, error, nflags;
2442 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
2444 memset(bands, 0, sizeof(bands));
2446 setbit(bands, IEEE80211_MODE_11B);
2447 setbit(bands, IEEE80211_MODE_11G);
2448 if (sc->sc_flags & IWN_FLAG_HAS_11N)
2449 setbit(bands, IEEE80211_MODE_11NG);
2451 setbit(bands, IEEE80211_MODE_11A);
2452 if (sc->sc_flags & IWN_FLAG_HAS_11N)
2453 setbit(bands, IEEE80211_MODE_11NA);
2456 for (i = 0; i < band->nchan; i++) {
2457 if (!(channels[i].flags & IWN_EEPROM_CHAN_VALID)) {
2458 DPRINTF(sc, IWN_DEBUG_RESET,
2459 "skip chan %d flags 0x%x maxpwr %d\n",
2460 band->chan[i], channels[i].flags,
2461 channels[i].maxpwr);
2465 chan = band->chan[i];
2466 nflags = iwn_eeprom_channel_flags(&channels[i]);
2467 error = ieee80211_add_channel(chans, maxchans, nchans,
2468 chan, 0, channels[i].maxpwr, nflags, bands);
2472 /* Save maximum allowed TX power for this channel. */
2474 sc->maxpwr[chan] = channels[i].maxpwr;
2476 DPRINTF(sc, IWN_DEBUG_RESET,
2477 "add chan %d flags 0x%x maxpwr %d\n", chan,
2478 channels[i].flags, channels[i].maxpwr);
2481 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
2486 iwn_read_eeprom_ht40(struct iwn_softc *sc, int n, int maxchans, int *nchans,
2487 struct ieee80211_channel chans[])
2489 struct iwn_eeprom_chan *channels = sc->eeprom_channels[n];
2490 const struct iwn_chan_band *band = &iwn_bands[n];
2492 int i, error, nflags;
2494 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s start\n", __func__);
2496 if (!(sc->sc_flags & IWN_FLAG_HAS_11N)) {
2497 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end no 11n\n", __func__);
2501 for (i = 0; i < band->nchan; i++) {
2502 if (!(channels[i].flags & IWN_EEPROM_CHAN_VALID)) {
2503 DPRINTF(sc, IWN_DEBUG_RESET,
2504 "skip chan %d flags 0x%x maxpwr %d\n",
2505 band->chan[i], channels[i].flags,
2506 channels[i].maxpwr);
2510 chan = band->chan[i];
2511 nflags = iwn_eeprom_channel_flags(&channels[i]);
2512 nflags |= (n == 5 ? IEEE80211_CHAN_G : IEEE80211_CHAN_A);
2513 error = ieee80211_add_channel_ht40(chans, maxchans, nchans,
2514 chan, channels[i].maxpwr, nflags);
2517 device_printf(sc->sc_dev,
2518 "%s: no entry for channel %d\n", __func__, chan);
2521 DPRINTF(sc, IWN_DEBUG_RESET,
2522 "%s: skip chan %d, extension channel not found\n",
2526 device_printf(sc->sc_dev,
2527 "%s: channel table is full!\n", __func__);
2530 DPRINTF(sc, IWN_DEBUG_RESET,
2531 "add ht40 chan %d flags 0x%x maxpwr %d\n",
2532 chan, channels[i].flags, channels[i].maxpwr);
2539 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
2544 iwn_read_eeprom_channels(struct iwn_softc *sc, int n, uint32_t addr)
2546 struct ieee80211com *ic = &sc->sc_ic;
2548 iwn_read_prom_data(sc, addr, &sc->eeprom_channels[n],
2549 iwn_bands[n].nchan * sizeof (struct iwn_eeprom_chan));
2552 iwn_read_eeprom_band(sc, n, IEEE80211_CHAN_MAX, &ic->ic_nchans,
2555 iwn_read_eeprom_ht40(sc, n, IEEE80211_CHAN_MAX, &ic->ic_nchans,
2558 ieee80211_sort_channels(ic->ic_channels, ic->ic_nchans);
2561 static struct iwn_eeprom_chan *
2562 iwn_find_eeprom_channel(struct iwn_softc *sc, struct ieee80211_channel *c)
2564 int band, chan, i, j;
2566 if (IEEE80211_IS_CHAN_HT40(c)) {
2567 band = IEEE80211_IS_CHAN_5GHZ(c) ? 6 : 5;
2568 if (IEEE80211_IS_CHAN_HT40D(c))
2569 chan = c->ic_extieee;
2572 for (i = 0; i < iwn_bands[band].nchan; i++) {
2573 if (iwn_bands[band].chan[i] == chan)
2574 return &sc->eeprom_channels[band][i];
2577 for (j = 0; j < 5; j++) {
2578 for (i = 0; i < iwn_bands[j].nchan; i++) {
2579 if (iwn_bands[j].chan[i] == c->ic_ieee &&
2580 ((j == 0) ^ IEEE80211_IS_CHAN_A(c)) == 1)
2581 return &sc->eeprom_channels[j][i];
2589 iwn_getradiocaps(struct ieee80211com *ic,
2590 int maxchans, int *nchans, struct ieee80211_channel chans[])
2592 struct iwn_softc *sc = ic->ic_softc;
2595 /* Parse the list of authorized channels. */
2596 for (i = 0; i < 5 && *nchans < maxchans; i++)
2597 iwn_read_eeprom_band(sc, i, maxchans, nchans, chans);
2598 for (i = 5; i < IWN_NBANDS - 1 && *nchans < maxchans; i++)
2599 iwn_read_eeprom_ht40(sc, i, maxchans, nchans, chans);
2603 * Enforce flags read from EEPROM.
2606 iwn_setregdomain(struct ieee80211com *ic, struct ieee80211_regdomain *rd,
2607 int nchan, struct ieee80211_channel chans[])
2609 struct iwn_softc *sc = ic->ic_softc;
2612 for (i = 0; i < nchan; i++) {
2613 struct ieee80211_channel *c = &chans[i];
2614 struct iwn_eeprom_chan *channel;
2616 channel = iwn_find_eeprom_channel(sc, c);
2617 if (channel == NULL) {
2618 ic_printf(ic, "%s: invalid channel %u freq %u/0x%x\n",
2619 __func__, c->ic_ieee, c->ic_freq, c->ic_flags);
2622 c->ic_flags |= iwn_eeprom_channel_flags(channel);
2629 iwn_read_eeprom_enhinfo(struct iwn_softc *sc)
2631 struct iwn_eeprom_enhinfo enhinfo[35];
2632 struct ieee80211com *ic = &sc->sc_ic;
2633 struct ieee80211_channel *c;
2639 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
2641 iwn_read_prom_data(sc, IWN5000_EEPROM_REG, &val, 2);
2642 base = le16toh(val);
2643 iwn_read_prom_data(sc, base + IWN6000_EEPROM_ENHINFO,
2644 enhinfo, sizeof enhinfo);
2646 for (i = 0; i < nitems(enhinfo); i++) {
2647 flags = enhinfo[i].flags;
2648 if (!(flags & IWN_ENHINFO_VALID))
2649 continue; /* Skip invalid entries. */
2652 if (sc->txchainmask & IWN_ANT_A)
2653 maxpwr = MAX(maxpwr, enhinfo[i].chain[0]);
2654 if (sc->txchainmask & IWN_ANT_B)
2655 maxpwr = MAX(maxpwr, enhinfo[i].chain[1]);
2656 if (sc->txchainmask & IWN_ANT_C)
2657 maxpwr = MAX(maxpwr, enhinfo[i].chain[2]);
2658 if (sc->ntxchains == 2)
2659 maxpwr = MAX(maxpwr, enhinfo[i].mimo2);
2660 else if (sc->ntxchains == 3)
2661 maxpwr = MAX(maxpwr, enhinfo[i].mimo3);
2663 for (j = 0; j < ic->ic_nchans; j++) {
2664 c = &ic->ic_channels[j];
2665 if ((flags & IWN_ENHINFO_5GHZ)) {
2666 if (!IEEE80211_IS_CHAN_A(c))
2668 } else if ((flags & IWN_ENHINFO_OFDM)) {
2669 if (!IEEE80211_IS_CHAN_G(c))
2671 } else if (!IEEE80211_IS_CHAN_B(c))
2673 if ((flags & IWN_ENHINFO_HT40)) {
2674 if (!IEEE80211_IS_CHAN_HT40(c))
2677 if (IEEE80211_IS_CHAN_HT40(c))
2680 if (enhinfo[i].chan != 0 &&
2681 enhinfo[i].chan != c->ic_ieee)
2684 DPRINTF(sc, IWN_DEBUG_RESET,
2685 "channel %d(%x), maxpwr %d\n", c->ic_ieee,
2686 c->ic_flags, maxpwr / 2);
2687 c->ic_maxregpower = maxpwr / 2;
2688 c->ic_maxpower = maxpwr;
2692 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
2696 static struct ieee80211_node *
2697 iwn_node_alloc(struct ieee80211vap *vap, const uint8_t mac[IEEE80211_ADDR_LEN])
2699 struct iwn_node *wn;
2701 wn = malloc(sizeof (struct iwn_node), M_80211_NODE, M_NOWAIT | M_ZERO);
2705 wn->id = IWN_ID_UNDEFINED;
2713 switch (rate & 0xff) {
2714 case 12: return 0xd;
2715 case 18: return 0xf;
2716 case 24: return 0x5;
2717 case 36: return 0x7;
2718 case 48: return 0x9;
2719 case 72: return 0xb;
2720 case 96: return 0x1;
2721 case 108: return 0x3;
2725 case 22: return 110;
2730 static __inline uint8_t
2731 plcp2rate(const uint8_t rate_plcp)
2733 switch (rate_plcp) {
2734 case 0xd: return 12;
2735 case 0xf: return 18;
2736 case 0x5: return 24;
2737 case 0x7: return 36;
2738 case 0x9: return 48;
2739 case 0xb: return 72;
2740 case 0x1: return 96;
2741 case 0x3: return 108;
2745 case 110: return 22;
2751 iwn_get_1stream_tx_antmask(struct iwn_softc *sc)
2754 return IWN_LSB(sc->txchainmask);
2758 iwn_get_2stream_tx_antmask(struct iwn_softc *sc)
2763 * The '2 stream' setup is a bit .. odd.
2765 * For NICs that support only 1 antenna, default to IWN_ANT_AB or
2766 * the firmware panics (eg Intel 5100.)
2768 * For NICs that support two antennas, we use ANT_AB.
2770 * For NICs that support three antennas, we use the two that
2771 * wasn't the default one.
2773 * XXX TODO: if bluetooth (full concurrent) is enabled, restrict
2774 * this to only one antenna.
2777 /* Default - transmit on the other antennas */
2778 tx = (sc->txchainmask & ~IWN_LSB(sc->txchainmask));
2780 /* Now, if it's zero, set it to IWN_ANT_AB, so to not panic firmware */
2785 * If the NIC is a two-stream TX NIC, configure the TX mask to
2786 * the default chainmask
2788 else if (sc->ntxchains == 2)
2789 tx = sc->txchainmask;
2797 * Calculate the required PLCP value from the given rate,
2798 * to the given node.
2800 * This will take the node configuration (eg 11n, rate table
2801 * setup, etc) into consideration.
2804 iwn_rate_to_plcp(struct iwn_softc *sc, struct ieee80211_node *ni,
2807 struct ieee80211com *ic = ni->ni_ic;
2812 * If it's an MCS rate, let's set the plcp correctly
2813 * and set the relevant flags based on the node config.
2815 if (rate & IEEE80211_RATE_MCS) {
2817 * Set the initial PLCP value to be between 0->31 for
2818 * MCS 0 -> MCS 31, then set the "I'm an MCS rate!"
2821 plcp = IEEE80211_RV(rate) | IWN_RFLAG_MCS;
2824 * XXX the following should only occur if both
2825 * the local configuration _and_ the remote node
2826 * advertise these capabilities. Thus this code
2831 * Set the channel width and guard interval.
2833 if (IEEE80211_IS_CHAN_HT40(ni->ni_chan)) {
2834 plcp |= IWN_RFLAG_HT40;
2835 if (ni->ni_htcap & IEEE80211_HTCAP_SHORTGI40)
2836 plcp |= IWN_RFLAG_SGI;
2837 } else if (ni->ni_htcap & IEEE80211_HTCAP_SHORTGI20) {
2838 plcp |= IWN_RFLAG_SGI;
2842 * Ensure the selected rate matches the link quality
2843 * table entries being used.
2846 plcp |= IWN_RFLAG_ANT(sc->txchainmask);
2847 else if (rate > 0x87)
2848 plcp |= IWN_RFLAG_ANT(iwn_get_2stream_tx_antmask(sc));
2850 plcp |= IWN_RFLAG_ANT(iwn_get_1stream_tx_antmask(sc));
2853 * Set the initial PLCP - fine for both
2854 * OFDM and CCK rates.
2856 plcp = rate2plcp(rate);
2858 /* Set CCK flag if it's CCK */
2860 /* XXX It would be nice to have a method
2861 * to map the ridx -> phy table entry
2862 * so we could just query that, rather than
2863 * this hack to check against IWN_RIDX_OFDM6.
2865 ridx = ieee80211_legacy_rate_lookup(ic->ic_rt,
2866 rate & IEEE80211_RATE_VAL);
2867 if (ridx < IWN_RIDX_OFDM6 &&
2868 IEEE80211_IS_CHAN_2GHZ(ni->ni_chan))
2869 plcp |= IWN_RFLAG_CCK;
2871 /* Set antenna configuration */
2872 /* XXX TODO: is this the right antenna to use for legacy? */
2873 plcp |= IWN_RFLAG_ANT(iwn_get_1stream_tx_antmask(sc));
2876 DPRINTF(sc, IWN_DEBUG_TXRATE, "%s: rate=0x%02x, plcp=0x%08x\n",
2881 return (htole32(plcp));
2885 iwn_newassoc(struct ieee80211_node *ni, int isnew)
2887 /* Doesn't do anything at the moment */
2891 iwn_media_change(struct ifnet *ifp)
2895 error = ieee80211_media_change(ifp);
2896 /* NB: only the fixed rate can change and that doesn't need a reset */
2897 return (error == ENETRESET ? 0 : error);
2901 iwn_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg)
2903 struct iwn_vap *ivp = IWN_VAP(vap);
2904 struct ieee80211com *ic = vap->iv_ic;
2905 struct iwn_softc *sc = ic->ic_softc;
2908 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
2910 DPRINTF(sc, IWN_DEBUG_STATE, "%s: %s -> %s\n", __func__,
2911 ieee80211_state_name[vap->iv_state], ieee80211_state_name[nstate]);
2913 IEEE80211_UNLOCK(ic);
2915 callout_stop(&sc->calib_to);
2917 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX];
2920 case IEEE80211_S_ASSOC:
2921 if (vap->iv_state != IEEE80211_S_RUN)
2924 case IEEE80211_S_AUTH:
2925 if (vap->iv_state == IEEE80211_S_AUTH)
2929 * !AUTH -> AUTH transition requires state reset to handle
2930 * reassociations correctly.
2932 sc->rxon->associd = 0;
2933 sc->rxon->filter &= ~htole32(IWN_FILTER_BSS);
2934 sc->calib.state = IWN_CALIB_STATE_INIT;
2936 /* Wait until we hear a beacon before we transmit */
2937 if (IEEE80211_IS_CHAN_PASSIVE(ic->ic_curchan))
2938 sc->sc_beacon_wait = 1;
2940 if ((error = iwn_auth(sc, vap)) != 0) {
2941 device_printf(sc->sc_dev,
2942 "%s: could not move to auth state\n", __func__);
2946 case IEEE80211_S_RUN:
2948 * RUN -> RUN transition; Just restart the timers.
2950 if (vap->iv_state == IEEE80211_S_RUN) {
2955 /* Wait until we hear a beacon before we transmit */
2956 if (IEEE80211_IS_CHAN_PASSIVE(ic->ic_curchan))
2957 sc->sc_beacon_wait = 1;
2960 * !RUN -> RUN requires setting the association id
2961 * which is done with a firmware cmd. We also defer
2962 * starting the timers until that work is done.
2964 if ((error = iwn_run(sc, vap)) != 0) {
2965 device_printf(sc->sc_dev,
2966 "%s: could not move to run state\n", __func__);
2970 case IEEE80211_S_INIT:
2971 sc->calib.state = IWN_CALIB_STATE_INIT;
2973 * Purge the xmit queue so we don't have old frames
2974 * during a new association attempt.
2976 sc->sc_beacon_wait = 0;
2977 iwn_xmit_queue_drain(sc);
2986 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end in error\n", __func__);
2990 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
2992 return ivp->iv_newstate(vap, nstate, arg);
2996 iwn_calib_timeout(void *arg)
2998 struct iwn_softc *sc = arg;
3000 IWN_LOCK_ASSERT(sc);
3002 /* Force automatic TX power calibration every 60 secs. */
3003 if (++sc->calib_cnt >= 120) {
3006 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s\n",
3007 "sending request for statistics");
3008 (void)iwn_cmd(sc, IWN_CMD_GET_STATISTICS, &flags,
3012 callout_reset(&sc->calib_to, msecs_to_ticks(500), iwn_calib_timeout,
3017 * Process an RX_PHY firmware notification. This is usually immediately
3018 * followed by an MPDU_RX_DONE notification.
3021 iwn_rx_phy(struct iwn_softc *sc, struct iwn_rx_desc *desc)
3023 struct iwn_rx_stat *stat = (struct iwn_rx_stat *)(desc + 1);
3025 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: received PHY stats\n", __func__);
3027 /* Save RX statistics, they will be used on MPDU_RX_DONE. */
3028 memcpy(&sc->last_rx_stat, stat, sizeof (*stat));
3029 sc->last_rx_valid = 1;
3033 * Process an RX_DONE (4965AGN only) or MPDU_RX_DONE firmware notification.
3034 * Each MPDU_RX_DONE notification must be preceded by an RX_PHY one.
3037 iwn_rx_done(struct iwn_softc *sc, struct iwn_rx_desc *desc,
3038 struct iwn_rx_data *data)
3040 struct iwn_ops *ops = &sc->ops;
3041 struct ieee80211com *ic = &sc->sc_ic;
3042 struct iwn_rx_ring *ring = &sc->rxq;
3043 struct ieee80211_frame_min *wh;
3044 struct ieee80211_node *ni;
3045 struct mbuf *m, *m1;
3046 struct iwn_rx_stat *stat;
3050 int error, len, rssi, nf;
3052 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
3054 if (desc->type == IWN_MPDU_RX_DONE) {
3055 /* Check for prior RX_PHY notification. */
3056 if (!sc->last_rx_valid) {
3057 DPRINTF(sc, IWN_DEBUG_ANY,
3058 "%s: missing RX_PHY\n", __func__);
3061 stat = &sc->last_rx_stat;
3063 stat = (struct iwn_rx_stat *)(desc + 1);
3065 if (stat->cfg_phy_len > IWN_STAT_MAXLEN) {
3066 device_printf(sc->sc_dev,
3067 "%s: invalid RX statistic header, len %d\n", __func__,
3071 if (desc->type == IWN_MPDU_RX_DONE) {
3072 struct iwn_rx_mpdu *mpdu = (struct iwn_rx_mpdu *)(desc + 1);
3073 head = (caddr_t)(mpdu + 1);
3074 len = le16toh(mpdu->len);
3076 head = (caddr_t)(stat + 1) + stat->cfg_phy_len;
3077 len = le16toh(stat->len);
3080 flags = le32toh(*(uint32_t *)(head + len));
3082 /* Discard frames with a bad FCS early. */
3083 if ((flags & IWN_RX_NOERROR) != IWN_RX_NOERROR) {
3084 DPRINTF(sc, IWN_DEBUG_RECV, "%s: RX flags error %x\n",
3086 counter_u64_add(ic->ic_ierrors, 1);
3089 /* Discard frames that are too short. */
3090 if (len < sizeof (struct ieee80211_frame_ack)) {
3091 DPRINTF(sc, IWN_DEBUG_RECV, "%s: frame too short: %d\n",
3093 counter_u64_add(ic->ic_ierrors, 1);
3097 m1 = m_getjcl(M_NOWAIT, MT_DATA, M_PKTHDR, IWN_RBUF_SIZE);
3099 DPRINTF(sc, IWN_DEBUG_ANY, "%s: no mbuf to restock ring\n",
3101 counter_u64_add(ic->ic_ierrors, 1);
3104 bus_dmamap_unload(ring->data_dmat, data->map);
3106 error = bus_dmamap_load(ring->data_dmat, data->map, mtod(m1, void *),
3107 IWN_RBUF_SIZE, iwn_dma_map_addr, &paddr, BUS_DMA_NOWAIT);
3108 if (error != 0 && error != EFBIG) {
3109 device_printf(sc->sc_dev,
3110 "%s: bus_dmamap_load failed, error %d\n", __func__, error);
3113 /* Try to reload the old mbuf. */
3114 error = bus_dmamap_load(ring->data_dmat, data->map,
3115 mtod(data->m, void *), IWN_RBUF_SIZE, iwn_dma_map_addr,
3116 &paddr, BUS_DMA_NOWAIT);
3117 if (error != 0 && error != EFBIG) {
3118 panic("%s: could not load old RX mbuf", __func__);
3120 bus_dmamap_sync(ring->data_dmat, data->map,
3121 BUS_DMASYNC_PREREAD);
3122 /* Physical address may have changed. */
3123 ring->desc[ring->cur] = htole32(paddr >> 8);
3124 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
3125 BUS_DMASYNC_PREWRITE);
3126 counter_u64_add(ic->ic_ierrors, 1);
3130 bus_dmamap_sync(ring->data_dmat, data->map,
3131 BUS_DMASYNC_PREREAD);
3135 /* Update RX descriptor. */
3136 ring->desc[ring->cur] = htole32(paddr >> 8);
3137 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
3138 BUS_DMASYNC_PREWRITE);
3140 /* Finalize mbuf. */
3142 m->m_pkthdr.len = m->m_len = len;
3144 /* Grab a reference to the source node. */
3145 wh = mtod(m, struct ieee80211_frame_min *);
3146 if (len >= sizeof(struct ieee80211_frame_min))
3147 ni = ieee80211_find_rxnode(ic, wh);
3150 nf = (ni != NULL && ni->ni_vap->iv_state == IEEE80211_S_RUN &&
3151 (ic->ic_flags & IEEE80211_F_SCAN) == 0) ? sc->noise : -95;
3153 rssi = ops->get_rssi(sc, stat);
3155 if (ieee80211_radiotap_active(ic)) {
3156 struct iwn_rx_radiotap_header *tap = &sc->sc_rxtap;
3157 uint32_t rate = le32toh(stat->rate);
3160 if (stat->flags & htole16(IWN_STAT_FLAG_SHPREAMBLE))
3161 tap->wr_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
3162 tap->wr_dbm_antsignal = (int8_t)rssi;
3163 tap->wr_dbm_antnoise = (int8_t)nf;
3164 tap->wr_tsft = stat->tstamp;
3165 if (rate & IWN_RFLAG_MCS) {
3166 tap->wr_rate = rate & IWN_RFLAG_RATE_MCS;
3167 tap->wr_rate |= IEEE80211_RATE_MCS;
3169 tap->wr_rate = plcp2rate(rate & IWN_RFLAG_RATE);
3173 * If it's a beacon and we're waiting, then do the
3174 * wakeup. This should unblock raw_xmit/start.
3176 if (sc->sc_beacon_wait) {
3177 uint8_t type, subtype;
3178 /* NB: Re-assign wh */
3179 wh = mtod(m, struct ieee80211_frame_min *);
3180 type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK;
3181 subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
3183 * This assumes at this point we've received our own
3186 DPRINTF(sc, IWN_DEBUG_TRACE,
3187 "%s: beacon_wait, type=%d, subtype=%d\n",
3188 __func__, type, subtype);
3189 if (type == IEEE80211_FC0_TYPE_MGT &&
3190 subtype == IEEE80211_FC0_SUBTYPE_BEACON) {
3191 DPRINTF(sc, IWN_DEBUG_TRACE | IWN_DEBUG_XMIT,
3192 "%s: waking things up\n", __func__);
3193 /* queue taskqueue to transmit! */
3194 taskqueue_enqueue(sc->sc_tq, &sc->sc_xmit_task);
3200 /* Send the frame to the 802.11 layer. */
3202 if (ni->ni_flags & IEEE80211_NODE_HT)
3203 m->m_flags |= M_AMPDU;
3204 (void)ieee80211_input(ni, m, rssi - nf, nf);
3205 /* Node is no longer needed. */
3206 ieee80211_free_node(ni);
3208 (void)ieee80211_input_all(ic, m, rssi - nf, nf);
3212 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
3217 iwn_agg_tx_complete(struct iwn_softc *sc, struct iwn_tx_ring *ring, int tid,
3218 int idx, int success)
3220 struct ieee80211_ratectl_tx_status *txs = &sc->sc_txs;
3221 struct iwn_tx_data *data = &ring->data[idx];
3222 struct iwn_node *wn;
3224 struct ieee80211_node *ni;
3226 KASSERT(data->ni != NULL, ("idx %d: no node", idx));
3227 KASSERT(data->m != NULL, ("idx %d: no mbuf", idx));
3229 /* Unmap and free mbuf. */
3230 bus_dmamap_sync(ring->data_dmat, data->map,
3231 BUS_DMASYNC_POSTWRITE);
3232 bus_dmamap_unload(ring->data_dmat, data->map);
3233 m = data->m, data->m = NULL;
3234 ni = data->ni, data->ni = NULL;
3238 /* XXX causes significant performance degradation. */
3239 txs->flags = IEEE80211_RATECTL_STATUS_SHORT_RETRY |
3240 IEEE80211_RATECTL_STATUS_LONG_RETRY;
3241 txs->long_retries = data->long_retries - 1;
3243 txs->flags = IEEE80211_RATECTL_STATUS_SHORT_RETRY;
3245 txs->short_retries = wn->agg[tid].short_retries;
3247 txs->status = IEEE80211_RATECTL_TX_SUCCESS;
3249 txs->status = IEEE80211_RATECTL_TX_FAIL_UNSPECIFIED;
3251 wn->agg[tid].short_retries = 0;
3252 data->long_retries = 0;
3254 DPRINTF(sc, IWN_DEBUG_AMPDU, "%s: freeing m %p ni %p idx %d qid %d\n",
3255 __func__, m, ni, idx, ring->qid);
3256 ieee80211_ratectl_tx_complete(ni, txs);
3257 ieee80211_tx_complete(ni, m, !success);
3260 /* Process an incoming Compressed BlockAck. */
3262 iwn_rx_compressed_ba(struct iwn_softc *sc, struct iwn_rx_desc *desc)
3264 struct iwn_tx_ring *ring;
3265 struct iwn_tx_data *data;
3266 struct iwn_node *wn;
3267 struct iwn_compressed_ba *ba = (struct iwn_compressed_ba *)(desc + 1);
3268 struct ieee80211_tx_ampdu *tap;
3274 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
3276 qid = le16toh(ba->qid);
3277 tap = sc->qid2tap[qid];
3278 ring = &sc->txq[qid];
3280 wn = (void *)tap->txa_ni;
3282 DPRINTF(sc, IWN_DEBUG_AMPDU, "%s: qid %d tid %d seq %04X ssn %04X\n"
3283 "bitmap: ba %016jX wn %016jX, start %d\n",
3284 __func__, qid, tid, le16toh(ba->seq), le16toh(ba->ssn),
3285 (uintmax_t)le64toh(ba->bitmap), (uintmax_t)wn->agg[tid].bitmap,
3286 wn->agg[tid].startidx);
3288 if (wn->agg[tid].bitmap == 0)
3291 shift = wn->agg[tid].startidx - ((le16toh(ba->seq) >> 4) & 0xff);
3296 * Walk the bitmap and calculate how many successful attempts
3299 * Yes, the rate control code doesn't know these are A-MPDU
3300 * subframes; due to that long_retries stats are not used here.
3302 bitmap = le64toh(ba->bitmap);
3307 bitmap &= wn->agg[tid].bitmap;
3308 wn->agg[tid].bitmap = 0;
3310 for (i = wn->agg[tid].startidx;
3312 bitmap >>= 1, i = (i + 1) % IWN_TX_RING_COUNT) {
3313 if ((bitmap & 1) == 0)
3316 data = &ring->data[i];
3317 if (__predict_false(data->m == NULL)) {
3319 * There is no frame; skip this entry.
3321 * NB: it is "ok" to have both
3322 * 'tx done' + 'compressed BA' replies for frame
3323 * with STATE_SCD_QUERY status.
3325 DPRINTF(sc, IWN_DEBUG_AMPDU,
3326 "%s: ring %d: no entry %d\n", __func__, qid, i);
3331 iwn_agg_tx_complete(sc, ring, tid, i, 1);
3334 ring->queued -= tx_ok;
3335 iwn_check_tx_ring(sc, qid);
3337 DPRINTF(sc, IWN_DEBUG_TRACE | IWN_DEBUG_AMPDU,
3338 "->%s: end; %d ok\n",__func__, tx_ok);
3342 * Process a CALIBRATION_RESULT notification sent by the initialization
3343 * firmware on response to a CMD_CALIB_CONFIG command (5000 only).
3346 iwn5000_rx_calib_results(struct iwn_softc *sc, struct iwn_rx_desc *desc)
3348 struct iwn_phy_calib *calib = (struct iwn_phy_calib *)(desc + 1);
3351 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
3353 /* Runtime firmware should not send such a notification. */
3354 if (sc->sc_flags & IWN_FLAG_CALIB_DONE){
3355 DPRINTF(sc, IWN_DEBUG_TRACE,
3356 "->%s received after calib done\n", __func__);
3359 len = (le32toh(desc->len) & 0x3fff) - 4;
3361 switch (calib->code) {
3362 case IWN5000_PHY_CALIB_DC:
3363 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_DC)
3366 case IWN5000_PHY_CALIB_LO:
3367 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_LO)
3370 case IWN5000_PHY_CALIB_TX_IQ:
3371 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TX_IQ)
3374 case IWN5000_PHY_CALIB_TX_IQ_PERIODIC:
3375 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TX_IQ_PERIODIC)
3378 case IWN5000_PHY_CALIB_BASE_BAND:
3379 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_BASE_BAND)
3383 if (idx == -1) /* Ignore other results. */
3386 /* Save calibration result. */
3387 if (sc->calibcmd[idx].buf != NULL)
3388 free(sc->calibcmd[idx].buf, M_DEVBUF);
3389 sc->calibcmd[idx].buf = malloc(len, M_DEVBUF, M_NOWAIT);
3390 if (sc->calibcmd[idx].buf == NULL) {
3391 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
3392 "not enough memory for calibration result %d\n",
3396 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
3397 "saving calibration result idx=%d, code=%d len=%d\n", idx, calib->code, len);
3398 sc->calibcmd[idx].len = len;
3399 memcpy(sc->calibcmd[idx].buf, calib, len);
3403 iwn_stats_update(struct iwn_softc *sc, struct iwn_calib_state *calib,
3404 struct iwn_stats *stats, int len)
3406 struct iwn_stats_bt *stats_bt;
3407 struct iwn_stats *lstats;
3410 * First - check whether the length is the bluetooth or normal.
3412 * If it's normal - just copy it and bump out.
3413 * Otherwise we have to convert things.
3416 if (len == sizeof(struct iwn_stats) + 4) {
3417 memcpy(&sc->last_stat, stats, sizeof(struct iwn_stats));
3418 sc->last_stat_valid = 1;
3423 * If it's not the bluetooth size - log, then just copy.
3425 if (len != sizeof(struct iwn_stats_bt) + 4) {
3426 DPRINTF(sc, IWN_DEBUG_STATS,
3427 "%s: size of rx statistics (%d) not an expected size!\n",
3430 memcpy(&sc->last_stat, stats, sizeof(struct iwn_stats));
3431 sc->last_stat_valid = 1;
3438 stats_bt = (struct iwn_stats_bt *) stats;
3439 lstats = &sc->last_stat;
3442 lstats->flags = stats_bt->flags;
3444 memcpy(&lstats->rx.ofdm, &stats_bt->rx_bt.ofdm,
3445 sizeof(struct iwn_rx_phy_stats));
3446 memcpy(&lstats->rx.cck, &stats_bt->rx_bt.cck,
3447 sizeof(struct iwn_rx_phy_stats));
3448 memcpy(&lstats->rx.general, &stats_bt->rx_bt.general_bt.common,
3449 sizeof(struct iwn_rx_general_stats));
3450 memcpy(&lstats->rx.ht, &stats_bt->rx_bt.ht,
3451 sizeof(struct iwn_rx_ht_phy_stats));
3453 memcpy(&lstats->tx, &stats_bt->tx,
3454 sizeof(struct iwn_tx_stats));
3456 memcpy(&lstats->general, &stats_bt->general,
3457 sizeof(struct iwn_general_stats));
3459 /* XXX TODO: Squirrel away the extra bluetooth stats somewhere */
3460 sc->last_stat_valid = 1;
3464 * Process an RX_STATISTICS or BEACON_STATISTICS firmware notification.
3465 * The latter is sent by the firmware after each received beacon.
3468 iwn_rx_statistics(struct iwn_softc *sc, struct iwn_rx_desc *desc)
3470 struct iwn_ops *ops = &sc->ops;
3471 struct ieee80211com *ic = &sc->sc_ic;
3472 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
3473 struct iwn_calib_state *calib = &sc->calib;
3474 struct iwn_stats *stats = (struct iwn_stats *)(desc + 1);
3475 struct iwn_stats *lstats;
3478 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
3480 /* Ignore statistics received during a scan. */
3481 if (vap->iv_state != IEEE80211_S_RUN ||
3482 (ic->ic_flags & IEEE80211_F_SCAN)){
3483 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s received during calib\n",
3488 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_STATS,
3489 "%s: received statistics, cmd %d, len %d\n",
3490 __func__, desc->type, le16toh(desc->len));
3491 sc->calib_cnt = 0; /* Reset TX power calibration timeout. */
3494 * Collect/track general statistics for reporting.
3496 * This takes care of ensuring that the bluetooth sized message
3497 * will be correctly converted to the legacy sized message.
3499 iwn_stats_update(sc, calib, stats, le16toh(desc->len));
3502 * And now, let's take a reference of it to use!
3504 lstats = &sc->last_stat;
3506 /* Test if temperature has changed. */
3507 if (lstats->general.temp != sc->rawtemp) {
3508 /* Convert "raw" temperature to degC. */
3509 sc->rawtemp = stats->general.temp;
3510 temp = ops->get_temperature(sc);
3511 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: temperature %d\n",
3514 /* Update TX power if need be (4965AGN only). */
3515 if (sc->hw_type == IWN_HW_REV_TYPE_4965)
3516 iwn4965_power_calibration(sc, temp);
3519 if (desc->type != IWN_BEACON_STATISTICS)
3520 return; /* Reply to a statistics request. */
3522 sc->noise = iwn_get_noise(&lstats->rx.general);
3523 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: noise %d\n", __func__, sc->noise);
3525 /* Test that RSSI and noise are present in stats report. */
3526 if (le32toh(lstats->rx.general.flags) != 1) {
3527 DPRINTF(sc, IWN_DEBUG_ANY, "%s\n",
3528 "received statistics without RSSI");
3532 if (calib->state == IWN_CALIB_STATE_ASSOC)
3533 iwn_collect_noise(sc, &lstats->rx.general);
3534 else if (calib->state == IWN_CALIB_STATE_RUN) {
3535 iwn_tune_sensitivity(sc, &lstats->rx);
3537 * XXX TODO: Only run the RX recovery if we're associated!
3539 iwn_check_rx_recovery(sc, lstats);
3540 iwn_save_stats_counters(sc, lstats);
3543 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
3547 * Save the relevant statistic counters for the next calibration
3551 iwn_save_stats_counters(struct iwn_softc *sc, const struct iwn_stats *rs)
3553 struct iwn_calib_state *calib = &sc->calib;
3555 /* Save counters values for next call. */
3556 calib->bad_plcp_cck = le32toh(rs->rx.cck.bad_plcp);
3557 calib->fa_cck = le32toh(rs->rx.cck.fa);
3558 calib->bad_plcp_ht = le32toh(rs->rx.ht.bad_plcp);
3559 calib->bad_plcp_ofdm = le32toh(rs->rx.ofdm.bad_plcp);
3560 calib->fa_ofdm = le32toh(rs->rx.ofdm.fa);
3562 /* Last time we received these tick values */
3563 sc->last_calib_ticks = ticks;
3567 * Process a TX_DONE firmware notification. Unfortunately, the 4965AGN
3568 * and 5000 adapters have different incompatible TX status formats.
3571 iwn4965_tx_done(struct iwn_softc *sc, struct iwn_rx_desc *desc,
3572 struct iwn_rx_data *data)
3574 struct iwn4965_tx_stat *stat = (struct iwn4965_tx_stat *)(desc + 1);
3575 int qid = desc->qid & IWN_RX_DESC_QID_MSK;
3577 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: "
3578 "qid %d idx %d RTS retries %d ACK retries %d nkill %d rate %x duration %d status %x\n",
3579 __func__, desc->qid, desc->idx,
3583 stat->rate, le16toh(stat->duration),
3584 le32toh(stat->status));
3586 if (qid >= sc->firstaggqueue && stat->nframes != 1) {
3587 iwn_ampdu_tx_done(sc, qid, stat->nframes, stat->rtsfailcnt,
3590 iwn_tx_done(sc, desc, stat->rtsfailcnt, stat->ackfailcnt,
3591 le32toh(stat->status) & 0xff);
3596 iwn5000_tx_done(struct iwn_softc *sc, struct iwn_rx_desc *desc,
3597 struct iwn_rx_data *data)
3599 struct iwn5000_tx_stat *stat = (struct iwn5000_tx_stat *)(desc + 1);
3600 int qid = desc->qid & IWN_RX_DESC_QID_MSK;
3602 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: "
3603 "qid %d idx %d RTS retries %d ACK retries %d nkill %d rate %x duration %d status %x\n",
3604 __func__, desc->qid, desc->idx,
3608 stat->rate, le16toh(stat->duration),
3609 le32toh(stat->status));
3612 /* Reset TX scheduler slot. */
3613 iwn5000_reset_sched(sc, qid, desc->idx);
3616 if (qid >= sc->firstaggqueue && stat->nframes != 1) {
3617 iwn_ampdu_tx_done(sc, qid, stat->nframes, stat->rtsfailcnt,
3620 iwn_tx_done(sc, desc, stat->rtsfailcnt, stat->ackfailcnt,
3621 le16toh(stat->status) & 0xff);
3626 iwn_adj_ampdu_ptr(struct iwn_softc *sc, struct iwn_tx_ring *ring)
3630 for (i = ring->read; i != ring->cur; i = (i + 1) % IWN_TX_RING_COUNT) {
3631 struct iwn_tx_data *data = &ring->data[i];
3633 if (data->m != NULL)
3643 * Adapter-independent backend for TX_DONE firmware notifications.
3646 iwn_tx_done(struct iwn_softc *sc, struct iwn_rx_desc *desc, int rtsfailcnt,
3647 int ackfailcnt, uint8_t status)
3649 struct ieee80211_ratectl_tx_status *txs = &sc->sc_txs;
3650 struct iwn_tx_ring *ring = &sc->txq[desc->qid & IWN_RX_DESC_QID_MSK];
3651 struct iwn_tx_data *data = &ring->data[desc->idx];
3653 struct ieee80211_node *ni;
3655 if (__predict_false(data->m == NULL &&
3656 ring->qid >= sc->firstaggqueue)) {
3658 * There is no frame; skip this entry.
3660 DPRINTF(sc, IWN_DEBUG_AMPDU, "%s: ring %d: no entry %d\n",
3661 __func__, ring->qid, desc->idx);
3665 KASSERT(data->ni != NULL, ("no node"));
3666 KASSERT(data->m != NULL, ("no mbuf"));
3668 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
3670 /* Unmap and free mbuf. */
3671 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_POSTWRITE);
3672 bus_dmamap_unload(ring->data_dmat, data->map);
3673 m = data->m, data->m = NULL;
3674 ni = data->ni, data->ni = NULL;
3676 data->long_retries = 0;
3678 if (ring->qid >= sc->firstaggqueue)
3679 iwn_adj_ampdu_ptr(sc, ring);
3682 * XXX f/w may hang (device timeout) when desc->idx - ring->read == 64
3683 * (aggregation queues only).
3687 iwn_check_tx_ring(sc, ring->qid);
3690 * Update rate control statistics for the node.
3692 txs->flags = IEEE80211_RATECTL_STATUS_SHORT_RETRY |
3693 IEEE80211_RATECTL_STATUS_LONG_RETRY;
3694 txs->short_retries = rtsfailcnt;
3695 txs->long_retries = ackfailcnt;
3696 if (!(status & IWN_TX_FAIL))
3697 txs->status = IEEE80211_RATECTL_TX_SUCCESS;
3700 case IWN_TX_FAIL_SHORT_LIMIT:
3701 txs->status = IEEE80211_RATECTL_TX_FAIL_SHORT;
3703 case IWN_TX_FAIL_LONG_LIMIT:
3704 txs->status = IEEE80211_RATECTL_TX_FAIL_LONG;
3706 case IWN_TX_STATUS_FAIL_LIFE_EXPIRE:
3707 txs->status = IEEE80211_RATECTL_TX_FAIL_EXPIRED;
3710 txs->status = IEEE80211_RATECTL_TX_FAIL_UNSPECIFIED;
3714 ieee80211_ratectl_tx_complete(ni, txs);
3717 * Channels marked for "radar" require traffic to be received
3718 * to unlock before we can transmit. Until traffic is seen
3719 * any attempt to transmit is returned immediately with status
3720 * set to IWN_TX_FAIL_TX_LOCKED. Unfortunately this can easily
3721 * happen on first authenticate after scanning. To workaround
3722 * this we ignore a failure of this sort in AUTH state so the
3723 * 802.11 layer will fall back to using a timeout to wait for
3724 * the AUTH reply. This allows the firmware time to see
3725 * traffic so a subsequent retry of AUTH succeeds. It's
3726 * unclear why the firmware does not maintain state for
3727 * channels recently visited as this would allow immediate
3728 * use of the channel after a scan (where we see traffic).
3730 if (status == IWN_TX_FAIL_TX_LOCKED &&
3731 ni->ni_vap->iv_state == IEEE80211_S_AUTH)
3732 ieee80211_tx_complete(ni, m, 0);
3734 ieee80211_tx_complete(ni, m,
3735 (status & IWN_TX_FAIL) != 0);
3737 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
3741 * Process a "command done" firmware notification. This is where we wakeup
3742 * processes waiting for a synchronous command completion.
3745 iwn_cmd_done(struct iwn_softc *sc, struct iwn_rx_desc *desc)
3747 struct iwn_tx_ring *ring;
3748 struct iwn_tx_data *data;
3751 if (sc->sc_flags & IWN_FLAG_PAN_SUPPORT)
3752 cmd_queue_num = IWN_PAN_CMD_QUEUE;
3754 cmd_queue_num = IWN_CMD_QUEUE_NUM;
3756 if ((desc->qid & IWN_RX_DESC_QID_MSK) != cmd_queue_num)
3757 return; /* Not a command ack. */
3759 ring = &sc->txq[cmd_queue_num];
3760 data = &ring->data[desc->idx];
3762 /* If the command was mapped in an mbuf, free it. */
3763 if (data->m != NULL) {
3764 bus_dmamap_sync(ring->data_dmat, data->map,
3765 BUS_DMASYNC_POSTWRITE);
3766 bus_dmamap_unload(ring->data_dmat, data->map);
3770 wakeup(&ring->desc[desc->idx]);
3774 iwn_ampdu_check_bitmap(uint64_t bitmap, int start, int idx)
3781 shift = 0x100 - bit;
3783 } else if (bit <= -64)
3790 if (bit - shift >= 64)
3793 return ((bitmap & (1ULL << (bit - shift))) != 0);
3797 * Firmware bug workaround: in case if 'retries' counter
3798 * overflows 'seqno' field will be incremented:
3799 * status|sequence|status|sequence|status|sequence
3800 * 0000 0A48 0001 0A49 0000 0A6A
3801 * 1000 0A48 1000 0A49 1000 0A6A
3802 * 2000 0A48 2000 0A49 2000 0A6A
3804 * E000 0A48 E000 0A49 E000 0A6A
3805 * F000 0A48 F000 0A49 F000 0A6A
3806 * 0000 0A49 0000 0A49 0000 0A6B
3807 * 1000 0A49 1000 0A49 1000 0A6B
3809 * D000 0A49 D000 0A49 D000 0A6B
3810 * E000 0A49 E001 0A49 E000 0A6B
3811 * F000 0A49 F001 0A49 F000 0A6B
3812 * 0000 0A4A 0000 0A4B 0000 0A6A
3813 * 1000 0A4A 1000 0A4B 1000 0A6A
3816 * Odd 'seqno' numbers are incremened by 2 every 2 overflows.
3817 * For even 'seqno' % 4 != 0 overflow is cyclic (0 -> +1 -> 0).
3818 * Not checked with nretries >= 64.
3822 iwn_ampdu_index_check(struct iwn_softc *sc, struct iwn_tx_ring *ring,
3823 uint64_t bitmap, int start, int idx)
3825 struct ieee80211com *ic = &sc->sc_ic;
3826 struct iwn_tx_data *data;
3827 int diff, min_retries, max_retries, new_idx, loop_end;
3829 new_idx = idx - IWN_LONG_RETRY_LIMIT_LOG;
3831 new_idx += IWN_TX_RING_COUNT;
3834 * Corner case: check if retry count is not too big;
3835 * reset device otherwise.
3837 if (!iwn_ampdu_check_bitmap(bitmap, start, new_idx)) {
3838 data = &ring->data[new_idx];
3839 if (data->long_retries > IWN_LONG_RETRY_LIMIT) {
3840 device_printf(sc->sc_dev,
3841 "%s: retry count (%d) for idx %d/%d overflow, "
3842 "resetting...\n", __func__, data->long_retries,
3843 ring->qid, new_idx);
3844 ieee80211_restart_all(ic);
3849 /* Correct index if needed. */
3852 data = &ring->data[new_idx];
3853 diff = idx - new_idx;
3855 diff += IWN_TX_RING_COUNT;
3857 min_retries = IWN_LONG_RETRY_FW_OVERFLOW * diff;
3858 if ((new_idx % 2) == 0)
3859 max_retries = IWN_LONG_RETRY_FW_OVERFLOW * (diff + 1);
3861 max_retries = IWN_LONG_RETRY_FW_OVERFLOW * (diff + 2);
3863 if (!iwn_ampdu_check_bitmap(bitmap, start, new_idx) &&
3864 ((data->long_retries >= min_retries &&
3865 data->long_retries < max_retries) ||
3867 (new_idx & 0x03) == 0x02 &&
3868 data->long_retries >= IWN_LONG_RETRY_FW_OVERFLOW))) {
3869 DPRINTF(sc, IWN_DEBUG_AMPDU,
3870 "%s: correcting index %d -> %d in queue %d"
3871 " (retries %d)\n", __func__, idx, new_idx,
3872 ring->qid, data->long_retries);
3876 new_idx = (new_idx + 1) % IWN_TX_RING_COUNT;
3877 } while (new_idx != loop_end);
3883 iwn_ampdu_tx_done(struct iwn_softc *sc, int qid, int nframes, int rtsfailcnt,
3886 struct iwn_tx_ring *ring = &sc->txq[qid];
3887 struct ieee80211_tx_ampdu *tap = sc->qid2tap[qid];
3888 struct iwn_node *wn = (void *)tap->txa_ni;
3889 struct iwn_tx_data *data;
3890 uint64_t bitmap = 0;
3891 uint16_t *aggstatus = stat;
3892 uint8_t tid = tap->txa_tid;
3893 int bit, i, idx, shift, start, tx_err;
3895 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
3897 start = le16toh(*(aggstatus + nframes * 2)) & 0xff;
3899 for (i = 0; i < nframes; i++) {
3900 uint16_t status = le16toh(aggstatus[i * 2]);
3902 if (status & IWN_AGG_TX_STATE_IGNORE_MASK)
3905 idx = le16toh(aggstatus[i * 2 + 1]) & 0xff;
3906 data = &ring->data[idx];
3907 if (data->remapped) {
3908 idx = iwn_ampdu_index_check(sc, ring, bitmap, start, idx);
3910 /* skip error (device will be restarted anyway). */
3914 /* Index may have changed. */
3915 data = &ring->data[idx];
3919 * XXX Sometimes (rarely) some frames are excluded from events.
3920 * XXX Due to that long_retries counter may be wrong.
3922 data->long_retries &= ~0x0f;
3923 data->long_retries += IWN_AGG_TX_TRY_COUNT(status) + 1;
3925 if (data->long_retries >= IWN_LONG_RETRY_FW_OVERFLOW) {
3926 int diff, wrong_idx;
3928 diff = data->long_retries / IWN_LONG_RETRY_FW_OVERFLOW;
3929 wrong_idx = (idx + diff) % IWN_TX_RING_COUNT;
3932 * Mark the entry so the above code will check it
3935 ring->data[wrong_idx].remapped = 1;
3938 if (status & IWN_AGG_TX_STATE_UNDERRUN_MSK) {
3940 * NB: count retries but postpone - it was not
3949 shift = 0x100 - bit;
3951 } else if (bit <= -64)
3957 bitmap = bitmap << shift;
3958 bitmap |= 1ULL << bit;
3960 wn->agg[tid].startidx = start;
3961 wn->agg[tid].bitmap = bitmap;
3962 wn->agg[tid].short_retries = rtsfailcnt;
3964 DPRINTF(sc, IWN_DEBUG_AMPDU, "%s: nframes %d start %d bitmap %016jX\n",
3965 __func__, nframes, start, (uintmax_t)bitmap);
3970 i != wn->agg[tid].startidx;
3971 i = (i + 1) % IWN_TX_RING_COUNT) {
3972 data = &ring->data[i];
3974 if (data->m == NULL)
3978 iwn_agg_tx_complete(sc, ring, tid, i, 0);
3981 ring->read = wn->agg[tid].startidx;
3982 ring->queued -= tx_err;
3984 iwn_check_tx_ring(sc, qid);
3986 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
3990 * Process an INT_FH_RX or INT_SW_RX interrupt.
3993 iwn_notif_intr(struct iwn_softc *sc)
3995 struct iwn_ops *ops = &sc->ops;
3996 struct ieee80211com *ic = &sc->sc_ic;
3997 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
4000 bus_dmamap_sync(sc->rxq.stat_dma.tag, sc->rxq.stat_dma.map,
4001 BUS_DMASYNC_POSTREAD);
4003 hw = le16toh(sc->rxq.stat->closed_count) & 0xfff;
4004 while (sc->rxq.cur != hw) {
4005 struct iwn_rx_data *data = &sc->rxq.data[sc->rxq.cur];
4006 struct iwn_rx_desc *desc;
4008 bus_dmamap_sync(sc->rxq.data_dmat, data->map,
4009 BUS_DMASYNC_POSTREAD);
4010 desc = mtod(data->m, struct iwn_rx_desc *);
4012 DPRINTF(sc, IWN_DEBUG_RECV,
4013 "%s: cur=%d; qid %x idx %d flags %x type %d(%s) len %d\n",
4014 __func__, sc->rxq.cur, desc->qid & IWN_RX_DESC_QID_MSK,
4015 desc->idx, desc->flags, desc->type,
4016 iwn_intr_str(desc->type), le16toh(desc->len));
4018 if (!(desc->qid & IWN_UNSOLICITED_RX_NOTIF)) /* Reply to a command. */
4019 iwn_cmd_done(sc, desc);
4021 switch (desc->type) {
4023 iwn_rx_phy(sc, desc);
4026 case IWN_RX_DONE: /* 4965AGN only. */
4027 case IWN_MPDU_RX_DONE:
4028 /* An 802.11 frame has been received. */
4029 iwn_rx_done(sc, desc, data);
4032 case IWN_RX_COMPRESSED_BA:
4033 /* A Compressed BlockAck has been received. */
4034 iwn_rx_compressed_ba(sc, desc);
4038 /* An 802.11 frame has been transmitted. */
4039 ops->tx_done(sc, desc, data);
4042 case IWN_RX_STATISTICS:
4043 case IWN_BEACON_STATISTICS:
4044 iwn_rx_statistics(sc, desc);
4047 case IWN_BEACON_MISSED:
4049 struct iwn_beacon_missed *miss =
4050 (struct iwn_beacon_missed *)(desc + 1);
4053 misses = le32toh(miss->consecutive);
4055 DPRINTF(sc, IWN_DEBUG_STATE,
4056 "%s: beacons missed %d/%d\n", __func__,
4057 misses, le32toh(miss->total));
4059 * If more than 5 consecutive beacons are missed,
4060 * reinitialize the sensitivity state machine.
4062 if (vap->iv_state == IEEE80211_S_RUN &&
4063 (ic->ic_flags & IEEE80211_F_SCAN) == 0) {
4065 (void)iwn_init_sensitivity(sc);
4066 if (misses >= vap->iv_bmissthreshold) {
4068 ieee80211_beacon_miss(ic);
4076 struct iwn_ucode_info *uc =
4077 (struct iwn_ucode_info *)(desc + 1);
4079 /* The microcontroller is ready. */
4080 DPRINTF(sc, IWN_DEBUG_RESET,
4081 "microcode alive notification version=%d.%d "
4082 "subtype=%x alive=%x\n", uc->major, uc->minor,
4083 uc->subtype, le32toh(uc->valid));
4085 if (le32toh(uc->valid) != 1) {
4086 device_printf(sc->sc_dev,
4087 "microcontroller initialization failed");
4090 if (uc->subtype == IWN_UCODE_INIT) {
4091 /* Save microcontroller report. */
4092 memcpy(&sc->ucode_info, uc, sizeof (*uc));
4094 /* Save the address of the error log in SRAM. */
4095 sc->errptr = le32toh(uc->errptr);
4099 case IWN_STATE_CHANGED:
4102 * State change allows hardware switch change to be
4103 * noted. However, we handle this in iwn_intr as we
4104 * get both the enable/disble intr.
4106 uint32_t *status = (uint32_t *)(desc + 1);
4107 DPRINTF(sc, IWN_DEBUG_INTR | IWN_DEBUG_STATE,
4108 "state changed to %x\n",
4112 case IWN_START_SCAN:
4114 struct iwn_start_scan *scan =
4115 (struct iwn_start_scan *)(desc + 1);
4116 DPRINTF(sc, IWN_DEBUG_ANY,
4117 "%s: scanning channel %d status %x\n",
4118 __func__, scan->chan, le32toh(scan->status));
4125 struct iwn_stop_scan *scan =
4126 (struct iwn_stop_scan *)(desc + 1);
4127 DPRINTF(sc, IWN_DEBUG_STATE | IWN_DEBUG_SCAN,
4128 "scan finished nchan=%d status=%d chan=%d\n",
4129 scan->nchan, scan->status, scan->chan);
4131 sc->sc_is_scanning = 0;
4132 callout_stop(&sc->scan_timeout);
4134 ieee80211_scan_next(vap);
4138 case IWN5000_CALIBRATION_RESULT:
4139 iwn5000_rx_calib_results(sc, desc);
4142 case IWN5000_CALIBRATION_DONE:
4143 sc->sc_flags |= IWN_FLAG_CALIB_DONE;
4148 sc->rxq.cur = (sc->rxq.cur + 1) % IWN_RX_RING_COUNT;
4151 /* Tell the firmware what we have processed. */
4152 hw = (hw == 0) ? IWN_RX_RING_COUNT - 1 : hw - 1;
4153 IWN_WRITE(sc, IWN_FH_RX_WPTR, hw & ~7);
4157 * Process an INT_WAKEUP interrupt raised when the microcontroller wakes up
4158 * from power-down sleep mode.
4161 iwn_wakeup_intr(struct iwn_softc *sc)
4165 DPRINTF(sc, IWN_DEBUG_RESET, "%s: ucode wakeup from power-down sleep\n",
4168 /* Wakeup RX and TX rings. */
4169 IWN_WRITE(sc, IWN_FH_RX_WPTR, sc->rxq.cur & ~7);
4170 for (qid = 0; qid < sc->ntxqs; qid++) {
4171 struct iwn_tx_ring *ring = &sc->txq[qid];
4172 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | ring->cur);
4177 iwn_rftoggle_task(void *arg, int npending)
4179 struct iwn_softc *sc = arg;
4180 struct ieee80211com *ic = &sc->sc_ic;
4184 tmp = IWN_READ(sc, IWN_GP_CNTRL);
4187 device_printf(sc->sc_dev, "RF switch: radio %s\n",
4188 (tmp & IWN_GP_CNTRL_RFKILL) ? "enabled" : "disabled");
4189 if (!(tmp & IWN_GP_CNTRL_RFKILL)) {
4190 ieee80211_suspend_all(ic);
4192 /* Enable interrupts to get RF toggle notification. */
4194 IWN_WRITE(sc, IWN_INT, 0xffffffff);
4195 IWN_WRITE(sc, IWN_INT_MASK, sc->int_mask);
4198 ieee80211_resume_all(ic);
4202 * Dump the error log of the firmware when a firmware panic occurs. Although
4203 * we can't debug the firmware because it is neither open source nor free, it
4204 * can help us to identify certain classes of problems.
4207 iwn_fatal_intr(struct iwn_softc *sc)
4209 struct iwn_fw_dump dump;
4212 IWN_LOCK_ASSERT(sc);
4214 /* Force a complete recalibration on next init. */
4215 sc->sc_flags &= ~IWN_FLAG_CALIB_DONE;
4217 /* Check that the error log address is valid. */
4218 if (sc->errptr < IWN_FW_DATA_BASE ||
4219 sc->errptr + sizeof (dump) >
4220 IWN_FW_DATA_BASE + sc->fw_data_maxsz) {
4221 printf("%s: bad firmware error log address 0x%08x\n", __func__,
4225 if (iwn_nic_lock(sc) != 0) {
4226 printf("%s: could not read firmware error log\n", __func__);
4229 /* Read firmware error log from SRAM. */
4230 iwn_mem_read_region_4(sc, sc->errptr, (uint32_t *)&dump,
4231 sizeof (dump) / sizeof (uint32_t));
4234 if (dump.valid == 0) {
4235 printf("%s: firmware error log is empty\n", __func__);
4238 printf("firmware error log:\n");
4239 printf(" error type = \"%s\" (0x%08X)\n",
4240 (dump.id < nitems(iwn_fw_errmsg)) ?
4241 iwn_fw_errmsg[dump.id] : "UNKNOWN",
4243 printf(" program counter = 0x%08X\n", dump.pc);
4244 printf(" source line = 0x%08X\n", dump.src_line);
4245 printf(" error data = 0x%08X%08X\n",
4246 dump.error_data[0], dump.error_data[1]);
4247 printf(" branch link = 0x%08X%08X\n",
4248 dump.branch_link[0], dump.branch_link[1]);
4249 printf(" interrupt link = 0x%08X%08X\n",
4250 dump.interrupt_link[0], dump.interrupt_link[1]);
4251 printf(" time = %u\n", dump.time[0]);
4253 /* Dump driver status (TX and RX rings) while we're here. */
4254 printf("driver status:\n");
4255 for (i = 0; i < sc->ntxqs; i++) {
4256 struct iwn_tx_ring *ring = &sc->txq[i];
4257 printf(" tx ring %2d: qid=%-2d cur=%-3d queued=%-3d\n",
4258 i, ring->qid, ring->cur, ring->queued);
4260 printf(" rx ring: cur=%d\n", sc->rxq.cur);
4266 struct iwn_softc *sc = arg;
4267 uint32_t r1, r2, tmp;
4271 /* Disable interrupts. */
4272 IWN_WRITE(sc, IWN_INT_MASK, 0);
4274 /* Read interrupts from ICT (fast) or from registers (slow). */
4275 if (sc->sc_flags & IWN_FLAG_USE_ICT) {
4276 bus_dmamap_sync(sc->ict_dma.tag, sc->ict_dma.map,
4277 BUS_DMASYNC_POSTREAD);
4279 while (sc->ict[sc->ict_cur] != 0) {
4280 tmp |= sc->ict[sc->ict_cur];
4281 sc->ict[sc->ict_cur] = 0; /* Acknowledge. */
4282 sc->ict_cur = (sc->ict_cur + 1) % IWN_ICT_COUNT;
4285 if (tmp == 0xffffffff) /* Shouldn't happen. */
4287 else if (tmp & 0xc0000) /* Workaround a HW bug. */
4289 r1 = (tmp & 0xff00) << 16 | (tmp & 0xff);
4290 r2 = 0; /* Unused. */
4292 r1 = IWN_READ(sc, IWN_INT);
4293 if (r1 == 0xffffffff || (r1 & 0xfffffff0) == 0xa5a5a5a0) {
4295 return; /* Hardware gone! */
4297 r2 = IWN_READ(sc, IWN_FH_INT);
4300 DPRINTF(sc, IWN_DEBUG_INTR, "interrupt reg1=0x%08x reg2=0x%08x\n"
4303 if (r1 == 0 && r2 == 0)
4304 goto done; /* Interrupt not for us. */
4306 /* Acknowledge interrupts. */
4307 IWN_WRITE(sc, IWN_INT, r1);
4308 if (!(sc->sc_flags & IWN_FLAG_USE_ICT))
4309 IWN_WRITE(sc, IWN_FH_INT, r2);
4311 if (r1 & IWN_INT_RF_TOGGLED) {
4312 taskqueue_enqueue(sc->sc_tq, &sc->sc_rftoggle_task);
4315 if (r1 & IWN_INT_CT_REACHED) {
4316 device_printf(sc->sc_dev, "%s: critical temperature reached!\n",
4319 if (r1 & (IWN_INT_SW_ERR | IWN_INT_HW_ERR)) {
4320 device_printf(sc->sc_dev, "%s: fatal firmware error\n",
4323 iwn_debug_register(sc);
4325 /* Dump firmware error log and stop. */
4328 taskqueue_enqueue(sc->sc_tq, &sc->sc_panic_task);
4331 if ((r1 & (IWN_INT_FH_RX | IWN_INT_SW_RX | IWN_INT_RX_PERIODIC)) ||
4332 (r2 & IWN_FH_INT_RX)) {
4333 if (sc->sc_flags & IWN_FLAG_USE_ICT) {
4334 if (r1 & (IWN_INT_FH_RX | IWN_INT_SW_RX))
4335 IWN_WRITE(sc, IWN_FH_INT, IWN_FH_INT_RX);
4336 IWN_WRITE_1(sc, IWN_INT_PERIODIC,
4337 IWN_INT_PERIODIC_DIS);
4339 if (r1 & (IWN_INT_FH_RX | IWN_INT_SW_RX)) {
4340 IWN_WRITE_1(sc, IWN_INT_PERIODIC,
4341 IWN_INT_PERIODIC_ENA);
4347 if ((r1 & IWN_INT_FH_TX) || (r2 & IWN_FH_INT_TX)) {
4348 if (sc->sc_flags & IWN_FLAG_USE_ICT)
4349 IWN_WRITE(sc, IWN_FH_INT, IWN_FH_INT_TX);
4350 wakeup(sc); /* FH DMA transfer completed. */
4353 if (r1 & IWN_INT_ALIVE)
4354 wakeup(sc); /* Firmware is alive. */
4356 if (r1 & IWN_INT_WAKEUP)
4357 iwn_wakeup_intr(sc);
4360 /* Re-enable interrupts. */
4361 if (sc->sc_flags & IWN_FLAG_RUNNING)
4362 IWN_WRITE(sc, IWN_INT_MASK, sc->int_mask);
4368 * Update TX scheduler ring when transmitting an 802.11 frame (4965AGN and
4369 * 5000 adapters use a slightly different format).
4372 iwn4965_update_sched(struct iwn_softc *sc, int qid, int idx, uint8_t id,
4375 uint16_t *w = &sc->sched[qid * IWN4965_SCHED_COUNT + idx];
4377 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
4379 *w = htole16(len + 8);
4380 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
4381 BUS_DMASYNC_PREWRITE);
4382 if (idx < IWN_SCHED_WINSZ) {
4383 *(w + IWN_TX_RING_COUNT) = *w;
4384 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
4385 BUS_DMASYNC_PREWRITE);
4390 iwn5000_update_sched(struct iwn_softc *sc, int qid, int idx, uint8_t id,
4393 uint16_t *w = &sc->sched[qid * IWN5000_SCHED_COUNT + idx];
4395 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
4397 *w = htole16(id << 12 | (len + 8));
4398 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
4399 BUS_DMASYNC_PREWRITE);
4400 if (idx < IWN_SCHED_WINSZ) {
4401 *(w + IWN_TX_RING_COUNT) = *w;
4402 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
4403 BUS_DMASYNC_PREWRITE);
4409 iwn5000_reset_sched(struct iwn_softc *sc, int qid, int idx)
4411 uint16_t *w = &sc->sched[qid * IWN5000_SCHED_COUNT + idx];
4413 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
4415 *w = (*w & htole16(0xf000)) | htole16(1);
4416 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
4417 BUS_DMASYNC_PREWRITE);
4418 if (idx < IWN_SCHED_WINSZ) {
4419 *(w + IWN_TX_RING_COUNT) = *w;
4420 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
4421 BUS_DMASYNC_PREWRITE);
4427 * Check whether OFDM 11g protection will be enabled for the given rate.
4429 * The original driver code only enabled protection for OFDM rates.
4430 * It didn't check to see whether it was operating in 11a or 11bg mode.
4433 iwn_check_rate_needs_protection(struct iwn_softc *sc,
4434 struct ieee80211vap *vap, uint8_t rate)
4436 struct ieee80211com *ic = vap->iv_ic;
4439 * Not in 2GHz mode? Then there's no need to enable OFDM
4442 if (! IEEE80211_IS_CHAN_2GHZ(ic->ic_curchan)) {
4447 * 11bg protection not enabled? Then don't use it.
4449 if ((ic->ic_flags & IEEE80211_F_USEPROT) == 0)
4453 * If it's an 11n rate - no protection.
4454 * We'll do it via a specific 11n check.
4456 if (rate & IEEE80211_RATE_MCS) {
4461 * Do a rate table lookup. If the PHY is CCK,
4462 * don't do protection.
4464 if (ieee80211_rate2phytype(ic->ic_rt, rate) == IEEE80211_T_CCK)
4468 * Yup, enable protection.
4474 * return a value between 0 and IWN_MAX_TX_RETRIES-1 as an index into
4475 * the link quality table that reflects this particular entry.
4478 iwn_tx_rate_to_linkq_offset(struct iwn_softc *sc, struct ieee80211_node *ni,
4481 struct ieee80211_rateset *rs;
4488 * Figure out if we're using 11n or not here.
4490 if (IEEE80211_IS_CHAN_HT(ni->ni_chan) && ni->ni_htrates.rs_nrates > 0)
4496 * Use the correct rate table.
4499 rs = (struct ieee80211_rateset *) &ni->ni_htrates;
4500 nr = ni->ni_htrates.rs_nrates;
4507 * Find the relevant link quality entry in the table.
4509 for (i = 0; i < nr && i < IWN_MAX_TX_RETRIES - 1 ; i++) {
4511 * The link quality table index starts at 0 == highest
4512 * rate, so we walk the rate table backwards.
4514 cmp_rate = rs->rs_rates[(nr - 1) - i];
4515 if (rate & IEEE80211_RATE_MCS)
4516 cmp_rate |= IEEE80211_RATE_MCS;
4519 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: idx %d: nr=%d, rate=0x%02x, rateentry=0x%02x\n",
4527 if (cmp_rate == rate)
4531 /* Failed? Start at the end */
4532 return (IWN_MAX_TX_RETRIES - 1);
4536 iwn_tx_data(struct iwn_softc *sc, struct mbuf *m, struct ieee80211_node *ni)
4538 const struct ieee80211_txparam *tp = ni->ni_txparms;
4539 struct ieee80211vap *vap = ni->ni_vap;
4540 struct ieee80211com *ic = ni->ni_ic;
4541 struct iwn_node *wn = (void *)ni;
4542 struct iwn_tx_ring *ring;
4543 struct iwn_tx_cmd *cmd;
4544 struct iwn_cmd_data *tx;
4545 struct ieee80211_frame *wh;
4546 struct ieee80211_key *k = NULL;
4550 int ac, totlen, rate;
4552 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
4554 IWN_LOCK_ASSERT(sc);
4556 wh = mtod(m, struct ieee80211_frame *);
4557 type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK;
4559 /* Select EDCA Access Category and TX ring for this frame. */
4560 if (IEEE80211_QOS_HAS_SEQ(wh)) {
4561 qos = ((const struct ieee80211_qosframe *)wh)->i_qos[0];
4562 tid = qos & IEEE80211_QOS_TID;
4568 /* Choose a TX rate index. */
4569 if (type == IEEE80211_FC0_TYPE_MGT ||
4570 type == IEEE80211_FC0_TYPE_CTL ||
4571 (m->m_flags & M_EAPOL) != 0)
4572 rate = tp->mgmtrate;
4573 else if (IEEE80211_IS_MULTICAST(wh->i_addr1))
4574 rate = tp->mcastrate;
4575 else if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE)
4576 rate = tp->ucastrate;
4578 /* XXX pass pktlen */
4579 (void) ieee80211_ratectl_rate(ni, NULL, 0);
4580 rate = ni->ni_txrate;
4584 * XXX TODO: Group addressed frames aren't aggregated and must
4585 * go to the normal non-aggregation queue, and have a NONQOS TID
4586 * assigned from net80211.
4589 ac = M_WME_GETAC(m);
4590 if (m->m_flags & M_AMPDU_MPDU) {
4591 struct ieee80211_tx_ampdu *tap = &ni->ni_tx_ampdu[ac];
4593 if (!IEEE80211_AMPDU_RUNNING(tap))
4596 /* NB: clear Fragment Number field. */
4597 /* XXX move this to net80211 */
4598 *(uint16_t *)wh->i_seq = 0;
4600 ac = *(int *)tap->txa_private;
4603 /* Encrypt the frame if need be. */
4604 if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) {
4605 /* Retrieve key for TX. */
4606 k = ieee80211_crypto_encap(ni, m);
4610 /* 802.11 header may have moved. */
4611 wh = mtod(m, struct ieee80211_frame *);
4613 totlen = m->m_pkthdr.len;
4615 if (ieee80211_radiotap_active_vap(vap)) {
4616 struct iwn_tx_radiotap_header *tap = &sc->sc_txtap;
4619 tap->wt_rate = rate;
4621 tap->wt_flags |= IEEE80211_RADIOTAP_F_WEP;
4623 ieee80211_radiotap_tx(vap, m);
4627 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
4628 /* Unicast frame, check if an ACK is expected. */
4629 if (!qos || (qos & IEEE80211_QOS_ACKPOLICY) !=
4630 IEEE80211_QOS_ACKPOLICY_NOACK)
4631 flags |= IWN_TX_NEED_ACK;
4634 (IEEE80211_FC0_TYPE_MASK | IEEE80211_FC0_SUBTYPE_MASK)) ==
4635 (IEEE80211_FC0_TYPE_CTL | IEEE80211_FC0_SUBTYPE_BAR))
4636 flags |= IWN_TX_IMM_BA; /* Cannot happen yet. */
4638 if (wh->i_fc[1] & IEEE80211_FC1_MORE_FRAG)
4639 flags |= IWN_TX_MORE_FRAG; /* Cannot happen yet. */
4641 /* Check if frame must be protected using RTS/CTS or CTS-to-self. */
4642 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
4643 /* NB: Group frames are sent using CCK in 802.11b/g. */
4644 if (totlen + IEEE80211_CRC_LEN > vap->iv_rtsthreshold) {
4645 flags |= IWN_TX_NEED_RTS;
4646 } else if (iwn_check_rate_needs_protection(sc, vap, rate)) {
4647 if (ic->ic_protmode == IEEE80211_PROT_CTSONLY)
4648 flags |= IWN_TX_NEED_CTS;
4649 else if (ic->ic_protmode == IEEE80211_PROT_RTSCTS)
4650 flags |= IWN_TX_NEED_RTS;
4651 } else if ((rate & IEEE80211_RATE_MCS) &&
4652 (ic->ic_htprotmode == IEEE80211_PROT_RTSCTS)) {
4653 flags |= IWN_TX_NEED_RTS;
4656 /* XXX HT protection? */
4658 if (flags & (IWN_TX_NEED_RTS | IWN_TX_NEED_CTS)) {
4659 if (sc->hw_type != IWN_HW_REV_TYPE_4965) {
4660 /* 5000 autoselects RTS/CTS or CTS-to-self. */
4661 flags &= ~(IWN_TX_NEED_RTS | IWN_TX_NEED_CTS);
4662 flags |= IWN_TX_NEED_PROTECTION;
4664 flags |= IWN_TX_FULL_TXOP;
4668 ring = &sc->txq[ac];
4669 if (m->m_flags & M_AMPDU_MPDU) {
4670 uint16_t seqno = ni->ni_txseqs[tid];
4672 if (ring->queued > IWN_TX_RING_COUNT / 2 &&
4673 (ring->cur + 1) % IWN_TX_RING_COUNT == ring->read) {
4674 DPRINTF(sc, IWN_DEBUG_AMPDU, "%s: no more space "
4675 "(queued %d) left in %d queue!\n",
4676 __func__, ring->queued, ac);
4681 * Queue this frame to the hardware ring that we've
4682 * negotiated AMPDU TX on.
4684 * Note that the sequence number must match the TX slot
4687 if ((seqno % 256) != ring->cur) {
4688 device_printf(sc->sc_dev,
4689 "%s: m=%p: seqno (%d) (%d) != ring index (%d) !\n",
4696 /* XXX until D9195 will not be committed */
4697 ni->ni_txseqs[tid] &= ~0xff;
4698 ni->ni_txseqs[tid] += ring->cur;
4699 seqno = ni->ni_txseqs[tid];
4702 *(uint16_t *)wh->i_seq =
4703 htole16(seqno << IEEE80211_SEQ_SEQ_SHIFT);
4704 ni->ni_txseqs[tid]++;
4707 /* Prepare TX firmware command. */
4708 cmd = &ring->cmd[ring->cur];
4709 tx = (struct iwn_cmd_data *)cmd->data;
4711 /* NB: No need to clear tx, all fields are reinitialized here. */
4712 tx->scratch = 0; /* clear "scratch" area */
4714 if (IEEE80211_IS_MULTICAST(wh->i_addr1) ||
4715 type != IEEE80211_FC0_TYPE_DATA)
4716 tx->id = sc->broadcast_id;
4720 if (type == IEEE80211_FC0_TYPE_MGT) {
4721 uint8_t subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
4723 /* Tell HW to set timestamp in probe responses. */
4724 if (subtype == IEEE80211_FC0_SUBTYPE_PROBE_RESP)
4725 flags |= IWN_TX_INSERT_TSTAMP;
4726 if (subtype == IEEE80211_FC0_SUBTYPE_ASSOC_REQ ||
4727 subtype == IEEE80211_FC0_SUBTYPE_REASSOC_REQ)
4728 tx->timeout = htole16(3);
4730 tx->timeout = htole16(2);
4732 tx->timeout = htole16(0);
4734 if (tx->id == sc->broadcast_id) {
4735 /* Group or management frame. */
4738 tx->linkq = iwn_tx_rate_to_linkq_offset(sc, ni, rate);
4739 flags |= IWN_TX_LINKQ; /* enable MRR */
4743 tx->rts_ntries = 60;
4744 tx->data_ntries = 15;
4745 tx->lifetime = htole32(IWN_LIFETIME_INFINITE);
4746 tx->rate = iwn_rate_to_plcp(sc, ni, rate);
4748 tx->flags = htole32(flags);
4750 return (iwn_tx_cmd(sc, m, ni, ring));
4754 iwn_tx_data_raw(struct iwn_softc *sc, struct mbuf *m,
4755 struct ieee80211_node *ni, const struct ieee80211_bpf_params *params)
4757 struct ieee80211vap *vap = ni->ni_vap;
4758 struct iwn_tx_cmd *cmd;
4759 struct iwn_cmd_data *tx;
4760 struct ieee80211_frame *wh;
4761 struct iwn_tx_ring *ring;
4766 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
4768 IWN_LOCK_ASSERT(sc);
4770 wh = mtod(m, struct ieee80211_frame *);
4771 type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK;
4773 ac = params->ibp_pri & 3;
4775 /* Choose a TX rate. */
4776 rate = params->ibp_rate0;
4779 if ((params->ibp_flags & IEEE80211_BPF_NOACK) == 0)
4780 flags |= IWN_TX_NEED_ACK;
4781 if (params->ibp_flags & IEEE80211_BPF_RTS) {
4782 if (sc->hw_type != IWN_HW_REV_TYPE_4965) {
4783 /* 5000 autoselects RTS/CTS or CTS-to-self. */
4784 flags &= ~IWN_TX_NEED_RTS;
4785 flags |= IWN_TX_NEED_PROTECTION;
4787 flags |= IWN_TX_NEED_RTS | IWN_TX_FULL_TXOP;
4789 if (params->ibp_flags & IEEE80211_BPF_CTS) {
4790 if (sc->hw_type != IWN_HW_REV_TYPE_4965) {
4791 /* 5000 autoselects RTS/CTS or CTS-to-self. */
4792 flags &= ~IWN_TX_NEED_CTS;
4793 flags |= IWN_TX_NEED_PROTECTION;
4795 flags |= IWN_TX_NEED_CTS | IWN_TX_FULL_TXOP;
4798 if (ieee80211_radiotap_active_vap(vap)) {
4799 struct iwn_tx_radiotap_header *tap = &sc->sc_txtap;
4802 tap->wt_rate = rate;
4804 ieee80211_radiotap_tx(vap, m);
4807 ring = &sc->txq[ac];
4808 cmd = &ring->cmd[ring->cur];
4810 tx = (struct iwn_cmd_data *)cmd->data;
4811 /* NB: No need to clear tx, all fields are reinitialized here. */
4812 tx->scratch = 0; /* clear "scratch" area */
4814 if (type == IEEE80211_FC0_TYPE_MGT) {
4815 uint8_t subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
4817 /* Tell HW to set timestamp in probe responses. */
4818 if (subtype == IEEE80211_FC0_SUBTYPE_PROBE_RESP)
4819 flags |= IWN_TX_INSERT_TSTAMP;
4821 if (subtype == IEEE80211_FC0_SUBTYPE_ASSOC_REQ ||
4822 subtype == IEEE80211_FC0_SUBTYPE_REASSOC_REQ)
4823 tx->timeout = htole16(3);
4825 tx->timeout = htole16(2);
4827 tx->timeout = htole16(0);
4830 tx->id = sc->broadcast_id;
4831 tx->rts_ntries = params->ibp_try1;
4832 tx->data_ntries = params->ibp_try0;
4833 tx->lifetime = htole32(IWN_LIFETIME_INFINITE);
4834 tx->rate = iwn_rate_to_plcp(sc, ni, rate);
4836 tx->flags = htole32(flags);
4838 /* Group or management frame. */
4841 return (iwn_tx_cmd(sc, m, ni, ring));
4845 iwn_tx_cmd(struct iwn_softc *sc, struct mbuf *m, struct ieee80211_node *ni,
4846 struct iwn_tx_ring *ring)
4848 struct iwn_ops *ops = &sc->ops;
4849 struct iwn_tx_cmd *cmd;
4850 struct iwn_cmd_data *tx;
4851 struct ieee80211_frame *wh;
4852 struct iwn_tx_desc *desc;
4853 struct iwn_tx_data *data;
4854 bus_dma_segment_t *seg, segs[IWN_MAX_SCATTER];
4857 int totlen, error, pad, nsegs = 0, i;
4859 wh = mtod(m, struct ieee80211_frame *);
4860 hdrlen = ieee80211_anyhdrsize(wh);
4861 totlen = m->m_pkthdr.len;
4863 desc = &ring->desc[ring->cur];
4864 data = &ring->data[ring->cur];
4866 if (__predict_false(data->m != NULL || data->ni != NULL)) {
4867 device_printf(sc->sc_dev, "%s: ni (%p) or m (%p) for idx %d "
4868 "in queue %d is not NULL!\n", __func__, data->ni, data->m,
4869 ring->cur, ring->qid);
4873 /* Prepare TX firmware command. */
4874 cmd = &ring->cmd[ring->cur];
4875 cmd->code = IWN_CMD_TX_DATA;
4877 cmd->qid = ring->qid;
4878 cmd->idx = ring->cur;
4880 tx = (struct iwn_cmd_data *)cmd->data;
4881 tx->len = htole16(totlen);
4883 /* Set physical address of "scratch area". */
4884 tx->loaddr = htole32(IWN_LOADDR(data->scratch_paddr));
4885 tx->hiaddr = IWN_HIADDR(data->scratch_paddr);
4887 /* First segment length must be a multiple of 4. */
4888 tx->flags |= htole32(IWN_TX_NEED_PADDING);
4889 pad = 4 - (hdrlen & 3);
4893 /* Copy 802.11 header in TX command. */
4894 memcpy((uint8_t *)(tx + 1), wh, hdrlen);
4896 /* Trim 802.11 header. */
4899 error = bus_dmamap_load_mbuf_sg(ring->data_dmat, data->map, m, segs,
4900 &nsegs, BUS_DMA_NOWAIT);
4902 if (error != EFBIG) {
4903 device_printf(sc->sc_dev,
4904 "%s: can't map mbuf (error %d)\n", __func__, error);
4907 /* Too many DMA segments, linearize mbuf. */
4908 m1 = m_collapse(m, M_NOWAIT, IWN_MAX_SCATTER - 1);
4910 device_printf(sc->sc_dev,
4911 "%s: could not defrag mbuf\n", __func__);
4916 error = bus_dmamap_load_mbuf_sg(ring->data_dmat, data->map, m,
4917 segs, &nsegs, BUS_DMA_NOWAIT);
4921 * NB: Do not return error;
4922 * original mbuf does not exist anymore.
4924 device_printf(sc->sc_dev,
4925 "%s: can't map mbuf (error %d)\n",
4927 if_inc_counter(ni->ni_vap->iv_ifp,
4928 IFCOUNTER_OERRORS, 1);
4929 ieee80211_free_node(ni);
4938 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: qid %d idx %d len %d nsegs %d "
4940 __func__, ring->qid, ring->cur, totlen, nsegs, tx->rate);
4942 /* Fill TX descriptor. */
4945 desc->nsegs += nsegs;
4946 /* First DMA segment is used by the TX command. */
4947 desc->segs[0].addr = htole32(IWN_LOADDR(data->cmd_paddr));
4948 desc->segs[0].len = htole16(IWN_HIADDR(data->cmd_paddr) |
4949 (4 + sizeof (*tx) + hdrlen + pad) << 4);
4950 /* Other DMA segments are for data payload. */
4952 for (i = 1; i <= nsegs; i++) {
4953 desc->segs[i].addr = htole32(IWN_LOADDR(seg->ds_addr));
4954 desc->segs[i].len = htole16(IWN_HIADDR(seg->ds_addr) |
4959 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_PREWRITE);
4960 bus_dmamap_sync(ring->cmd_dma.tag, ring->cmd_dma.map,
4961 BUS_DMASYNC_PREWRITE);
4962 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
4963 BUS_DMASYNC_PREWRITE);
4965 /* Update TX scheduler. */
4966 if (ring->qid >= sc->firstaggqueue)
4967 ops->update_sched(sc, ring->qid, ring->cur, tx->id, totlen);
4970 ring->cur = (ring->cur + 1) % IWN_TX_RING_COUNT;
4971 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, ring->qid << 8 | ring->cur);
4973 /* Mark TX ring as full if we reach a certain threshold. */
4974 if (++ring->queued > IWN_TX_RING_HIMARK)
4975 sc->qfullmsk |= 1 << ring->qid;
4977 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
4983 iwn_xmit_task(void *arg0, int pending)
4985 struct iwn_softc *sc = arg0;
4986 struct ieee80211_node *ni;
4989 struct ieee80211_bpf_params p;
4992 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: called\n", __func__);
4996 * Dequeue frames, attempt to transmit,
4997 * then disable beaconwait when we're done.
4999 while ((m = mbufq_dequeue(&sc->sc_xmit_queue)) != NULL) {
5001 ni = (struct ieee80211_node *)m->m_pkthdr.rcvif;
5003 /* Get xmit params if appropriate */
5004 if (ieee80211_get_xmit_params(m, &p) == 0)
5007 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: m=%p, have_p=%d\n",
5008 __func__, m, have_p);
5010 /* If we have xmit params, use them */
5012 error = iwn_tx_data_raw(sc, m, ni, &p);
5014 error = iwn_tx_data(sc, m, ni);
5017 if_inc_counter(ni->ni_vap->iv_ifp,
5018 IFCOUNTER_OERRORS, 1);
5019 ieee80211_free_node(ni);
5024 sc->sc_beacon_wait = 0;
5029 * raw frame xmit - free node/reference if failed.
5032 iwn_raw_xmit(struct ieee80211_node *ni, struct mbuf *m,
5033 const struct ieee80211_bpf_params *params)
5035 struct ieee80211com *ic = ni->ni_ic;
5036 struct iwn_softc *sc = ic->ic_softc;
5039 DPRINTF(sc, IWN_DEBUG_XMIT | IWN_DEBUG_TRACE, "->%s begin\n", __func__);
5042 if ((sc->sc_flags & IWN_FLAG_RUNNING) == 0) {
5048 /* queue frame if we have to */
5049 if (sc->sc_beacon_wait) {
5050 if (iwn_xmit_queue_enqueue(sc, m) != 0) {
5055 /* Queued, so just return OK */
5060 if (params == NULL) {
5062 * Legacy path; interpret frame contents to decide
5063 * precisely how to send the frame.
5065 error = iwn_tx_data(sc, m, ni);
5068 * Caller supplied explicit parameters to use in
5069 * sending the frame.
5071 error = iwn_tx_data_raw(sc, m, ni, params);
5074 sc->sc_tx_timer = 5;
5080 DPRINTF(sc, IWN_DEBUG_TRACE | IWN_DEBUG_XMIT, "->%s: end\n",__func__);
5086 * transmit - don't free mbuf if failed; don't free node ref if failed.
5089 iwn_transmit(struct ieee80211com *ic, struct mbuf *m)
5091 struct iwn_softc *sc = ic->ic_softc;
5092 struct ieee80211_node *ni;
5095 ni = (struct ieee80211_node *)m->m_pkthdr.rcvif;
5098 if ((sc->sc_flags & IWN_FLAG_RUNNING) == 0 || sc->sc_beacon_wait) {
5108 error = iwn_tx_data(sc, m, ni);
5110 sc->sc_tx_timer = 5;
5116 iwn_scan_timeout(void *arg)
5118 struct iwn_softc *sc = arg;
5119 struct ieee80211com *ic = &sc->sc_ic;
5121 ic_printf(ic, "scan timeout\n");
5122 ieee80211_restart_all(ic);
5126 iwn_watchdog(void *arg)
5128 struct iwn_softc *sc = arg;
5129 struct ieee80211com *ic = &sc->sc_ic;
5131 IWN_LOCK_ASSERT(sc);
5133 KASSERT(sc->sc_flags & IWN_FLAG_RUNNING, ("not running"));
5135 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5137 if (sc->sc_tx_timer > 0) {
5138 if (--sc->sc_tx_timer == 0) {
5139 ic_printf(ic, "device timeout\n");
5140 ieee80211_restart_all(ic);
5144 callout_reset(&sc->watchdog_to, hz, iwn_watchdog, sc);
5148 iwn_cdev_open(struct cdev *dev, int flags, int type, struct thread *td)
5155 iwn_cdev_close(struct cdev *dev, int flags, int type, struct thread *td)
5162 iwn_cdev_ioctl(struct cdev *dev, unsigned long cmd, caddr_t data, int fflag,
5166 struct iwn_softc *sc = dev->si_drv1;
5167 struct iwn_ioctl_data *d;
5169 rc = priv_check(td, PRIV_DRIVER);
5175 d = (struct iwn_ioctl_data *) data;
5177 /* XXX validate permissions/memory/etc? */
5178 rc = copyout(&sc->last_stat, d->dst_addr, sizeof(struct iwn_stats));
5183 memset(&sc->last_stat, 0, sizeof(struct iwn_stats));
5194 iwn_ioctl(struct ieee80211com *ic, u_long cmd, void *data)
5201 iwn_parent(struct ieee80211com *ic)
5203 struct iwn_softc *sc = ic->ic_softc;
5204 struct ieee80211vap *vap;
5207 if (ic->ic_nrunning > 0) {
5208 error = iwn_init(sc);
5212 ieee80211_start_all(ic);
5215 /* radio is disabled via RFkill switch */
5216 taskqueue_enqueue(sc->sc_tq, &sc->sc_rftoggle_task);
5219 vap = TAILQ_FIRST(&ic->ic_vaps);
5221 ieee80211_stop(vap);
5229 * Send a command to the firmware.
5232 iwn_cmd(struct iwn_softc *sc, int code, const void *buf, int size, int async)
5234 struct iwn_tx_ring *ring;
5235 struct iwn_tx_desc *desc;
5236 struct iwn_tx_data *data;
5237 struct iwn_tx_cmd *cmd;
5243 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
5246 IWN_LOCK_ASSERT(sc);
5248 if (sc->sc_flags & IWN_FLAG_PAN_SUPPORT)
5249 cmd_queue_num = IWN_PAN_CMD_QUEUE;
5251 cmd_queue_num = IWN_CMD_QUEUE_NUM;
5253 ring = &sc->txq[cmd_queue_num];
5254 desc = &ring->desc[ring->cur];
5255 data = &ring->data[ring->cur];
5258 if (size > sizeof cmd->data) {
5259 /* Command is too large to fit in a descriptor. */
5260 if (totlen > MCLBYTES)
5262 m = m_getjcl(M_NOWAIT, MT_DATA, M_PKTHDR, MJUMPAGESIZE);
5265 cmd = mtod(m, struct iwn_tx_cmd *);
5266 error = bus_dmamap_load(ring->data_dmat, data->map, cmd,
5267 totlen, iwn_dma_map_addr, &paddr, BUS_DMA_NOWAIT);
5274 cmd = &ring->cmd[ring->cur];
5275 paddr = data->cmd_paddr;
5280 cmd->qid = ring->qid;
5281 cmd->idx = ring->cur;
5282 memcpy(cmd->data, buf, size);
5285 desc->segs[0].addr = htole32(IWN_LOADDR(paddr));
5286 desc->segs[0].len = htole16(IWN_HIADDR(paddr) | totlen << 4);
5288 DPRINTF(sc, IWN_DEBUG_CMD, "%s: %s (0x%x) flags %d qid %d idx %d\n",
5289 __func__, iwn_intr_str(cmd->code), cmd->code,
5290 cmd->flags, cmd->qid, cmd->idx);
5292 if (size > sizeof cmd->data) {
5293 bus_dmamap_sync(ring->data_dmat, data->map,
5294 BUS_DMASYNC_PREWRITE);
5296 bus_dmamap_sync(ring->cmd_dma.tag, ring->cmd_dma.map,
5297 BUS_DMASYNC_PREWRITE);
5299 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
5300 BUS_DMASYNC_PREWRITE);
5302 /* Kick command ring. */
5303 ring->cur = (ring->cur + 1) % IWN_TX_RING_COUNT;
5304 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, ring->qid << 8 | ring->cur);
5306 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
5308 return async ? 0 : msleep(desc, &sc->sc_mtx, PCATCH, "iwncmd", hz);
5312 iwn4965_add_node(struct iwn_softc *sc, struct iwn_node_info *node, int async)
5314 struct iwn4965_node_info hnode;
5317 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5320 * We use the node structure for 5000 Series internally (it is
5321 * a superset of the one for 4965AGN). We thus copy the common
5322 * fields before sending the command.
5324 src = (caddr_t)node;
5325 dst = (caddr_t)&hnode;
5326 memcpy(dst, src, 48);
5327 /* Skip TSC, RX MIC and TX MIC fields from ``src''. */
5328 memcpy(dst + 48, src + 72, 20);
5329 return iwn_cmd(sc, IWN_CMD_ADD_NODE, &hnode, sizeof hnode, async);
5333 iwn5000_add_node(struct iwn_softc *sc, struct iwn_node_info *node, int async)
5336 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5338 /* Direct mapping. */
5339 return iwn_cmd(sc, IWN_CMD_ADD_NODE, node, sizeof (*node), async);
5343 iwn_set_link_quality(struct iwn_softc *sc, struct ieee80211_node *ni)
5345 struct iwn_node *wn = (void *)ni;
5346 struct ieee80211_rateset *rs;
5347 struct iwn_cmd_link_quality linkq;
5348 int i, rate, txrate;
5351 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
5353 memset(&linkq, 0, sizeof linkq);
5355 linkq.antmsk_1stream = iwn_get_1stream_tx_antmask(sc);
5356 linkq.antmsk_2stream = iwn_get_2stream_tx_antmask(sc);
5358 linkq.ampdu_max = 32; /* XXX negotiated? */
5359 linkq.ampdu_threshold = 3;
5360 linkq.ampdu_limit = htole16(4000); /* 4ms */
5362 DPRINTF(sc, IWN_DEBUG_XMIT,
5363 "%s: 1stream antenna=0x%02x, 2stream antenna=0x%02x, ntxstreams=%d\n",
5365 linkq.antmsk_1stream,
5366 linkq.antmsk_2stream,
5370 * Are we using 11n rates? Ensure the channel is
5371 * 11n _and_ we have some 11n rates, or don't
5374 if (IEEE80211_IS_CHAN_HT(ni->ni_chan) && ni->ni_htrates.rs_nrates > 0) {
5375 rs = (struct ieee80211_rateset *) &ni->ni_htrates;
5382 /* Start at highest available bit-rate. */
5384 * XXX this is all very dirty!
5387 txrate = ni->ni_htrates.rs_nrates - 1;
5389 txrate = rs->rs_nrates - 1;
5390 for (i = 0; i < IWN_MAX_TX_RETRIES; i++) {
5394 * XXX TODO: ensure the last two slots are the two lowest
5395 * rate entries, just for now.
5397 if (i == 14 || i == 15)
5401 rate = IEEE80211_RATE_MCS | rs->rs_rates[txrate];
5403 rate = IEEE80211_RV(rs->rs_rates[txrate]);
5405 /* Do rate -> PLCP config mapping */
5406 plcp = iwn_rate_to_plcp(sc, ni, rate);
5407 linkq.retry[i] = plcp;
5408 DPRINTF(sc, IWN_DEBUG_XMIT,
5409 "%s: i=%d, txrate=%d, rate=0x%02x, plcp=0x%08x\n",
5417 * The mimo field is an index into the table which
5418 * indicates the first index where it and subsequent entries
5419 * will not be using MIMO.
5421 * Since we're filling linkq from 0..15 and we're filling
5422 * from the highest MCS rates to the lowest rates, if we
5423 * _are_ doing a dual-stream rate, set mimo to idx+1 (ie,
5424 * the next entry.) That way if the next entry is a non-MIMO
5425 * entry, we're already pointing at it.
5427 if ((le32toh(plcp) & IWN_RFLAG_MCS) &&
5428 IEEE80211_RV(le32toh(plcp)) > 7)
5431 /* Next retry at immediate lower bit-rate. */
5436 * If we reached the end of the list and indeed we hit
5437 * all MIMO rates (eg 5300 doing MCS23-15) then yes,
5438 * set mimo to 15. Setting it to 16 panics the firmware.
5440 if (linkq.mimo > 15)
5443 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: mimo = %d\n", __func__, linkq.mimo);
5445 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
5447 return iwn_cmd(sc, IWN_CMD_LINK_QUALITY, &linkq, sizeof linkq, 1);
5451 * Broadcast node is used to send group-addressed and management frames.
5454 iwn_add_broadcast_node(struct iwn_softc *sc, int async)
5456 struct iwn_ops *ops = &sc->ops;
5457 struct ieee80211com *ic = &sc->sc_ic;
5458 struct iwn_node_info node;
5459 struct iwn_cmd_link_quality linkq;
5463 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
5465 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX];
5467 memset(&node, 0, sizeof node);
5468 IEEE80211_ADDR_COPY(node.macaddr, ieee80211broadcastaddr);
5469 node.id = sc->broadcast_id;
5470 DPRINTF(sc, IWN_DEBUG_RESET, "%s: adding broadcast node\n", __func__);
5471 if ((error = ops->add_node(sc, &node, async)) != 0)
5474 /* Use the first valid TX antenna. */
5475 txant = IWN_LSB(sc->txchainmask);
5477 memset(&linkq, 0, sizeof linkq);
5478 linkq.id = sc->broadcast_id;
5479 linkq.antmsk_1stream = iwn_get_1stream_tx_antmask(sc);
5480 linkq.antmsk_2stream = iwn_get_2stream_tx_antmask(sc);
5481 linkq.ampdu_max = 64;
5482 linkq.ampdu_threshold = 3;
5483 linkq.ampdu_limit = htole16(4000); /* 4ms */
5485 /* Use lowest mandatory bit-rate. */
5486 /* XXX rate table lookup? */
5487 if (IEEE80211_IS_CHAN_5GHZ(ic->ic_curchan))
5488 linkq.retry[0] = htole32(0xd);
5490 linkq.retry[0] = htole32(10 | IWN_RFLAG_CCK);
5491 linkq.retry[0] |= htole32(IWN_RFLAG_ANT(txant));
5492 /* Use same bit-rate for all TX retries. */
5493 for (i = 1; i < IWN_MAX_TX_RETRIES; i++) {
5494 linkq.retry[i] = linkq.retry[0];
5497 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
5499 return iwn_cmd(sc, IWN_CMD_LINK_QUALITY, &linkq, sizeof linkq, async);
5503 iwn_updateedca(struct ieee80211com *ic)
5505 #define IWN_EXP2(x) ((1 << (x)) - 1) /* CWmin = 2^ECWmin - 1 */
5506 struct iwn_softc *sc = ic->ic_softc;
5507 struct iwn_edca_params cmd;
5508 struct chanAccParams chp;
5511 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
5513 ieee80211_wme_ic_getparams(ic, &chp);
5515 memset(&cmd, 0, sizeof cmd);
5516 cmd.flags = htole32(IWN_EDCA_UPDATE);
5519 for (aci = 0; aci < WME_NUM_AC; aci++) {
5520 const struct wmeParams *ac = &chp.cap_wmeParams[aci];
5521 cmd.ac[aci].aifsn = ac->wmep_aifsn;
5522 cmd.ac[aci].cwmin = htole16(IWN_EXP2(ac->wmep_logcwmin));
5523 cmd.ac[aci].cwmax = htole16(IWN_EXP2(ac->wmep_logcwmax));
5524 cmd.ac[aci].txoplimit =
5525 htole16(IEEE80211_TXOP_TO_US(ac->wmep_txopLimit));
5527 IEEE80211_UNLOCK(ic);
5530 (void)iwn_cmd(sc, IWN_CMD_EDCA_PARAMS, &cmd, sizeof cmd, 1);
5533 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
5540 iwn_set_promisc(struct iwn_softc *sc)
5542 struct ieee80211com *ic = &sc->sc_ic;
5543 uint32_t promisc_filter;
5545 promisc_filter = IWN_FILTER_CTL | IWN_FILTER_PROMISC;
5546 if (ic->ic_promisc > 0 || ic->ic_opmode == IEEE80211_M_MONITOR)
5547 sc->rxon->filter |= htole32(promisc_filter);
5549 sc->rxon->filter &= ~htole32(promisc_filter);
5553 iwn_update_promisc(struct ieee80211com *ic)
5555 struct iwn_softc *sc = ic->ic_softc;
5558 if (ic->ic_opmode == IEEE80211_M_MONITOR)
5559 return; /* nothing to do */
5562 if (!(sc->sc_flags & IWN_FLAG_RUNNING)) {
5567 iwn_set_promisc(sc);
5568 if ((error = iwn_send_rxon(sc, 1, 1)) != 0) {
5569 device_printf(sc->sc_dev,
5570 "%s: could not send RXON, error %d\n",
5577 iwn_update_mcast(struct ieee80211com *ic)
5583 iwn_set_led(struct iwn_softc *sc, uint8_t which, uint8_t off, uint8_t on)
5585 struct iwn_cmd_led led;
5587 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5590 /* XXX don't set LEDs during scan? */
5591 if (sc->sc_is_scanning)
5595 /* Clear microcode LED ownership. */
5596 IWN_CLRBITS(sc, IWN_LED, IWN_LED_BSM_CTRL);
5599 led.unit = htole32(10000); /* on/off in unit of 100ms */
5602 (void)iwn_cmd(sc, IWN_CMD_SET_LED, &led, sizeof led, 1);
5606 * Set the critical temperature at which the firmware will stop the radio
5610 iwn_set_critical_temp(struct iwn_softc *sc)
5612 struct iwn_critical_temp crit;
5615 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5617 IWN_WRITE(sc, IWN_UCODE_GP1_CLR, IWN_UCODE_GP1_CTEMP_STOP_RF);
5619 if (sc->hw_type == IWN_HW_REV_TYPE_5150)
5620 temp = (IWN_CTOK(110) - sc->temp_off) * -5;
5621 else if (sc->hw_type == IWN_HW_REV_TYPE_4965)
5622 temp = IWN_CTOK(110);
5625 memset(&crit, 0, sizeof crit);
5626 crit.tempR = htole32(temp);
5627 DPRINTF(sc, IWN_DEBUG_RESET, "setting critical temp to %d\n", temp);
5628 return iwn_cmd(sc, IWN_CMD_SET_CRITICAL_TEMP, &crit, sizeof crit, 0);
5632 iwn_set_timing(struct iwn_softc *sc, struct ieee80211_node *ni)
5634 struct iwn_cmd_timing cmd;
5637 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5639 memset(&cmd, 0, sizeof cmd);
5640 memcpy(&cmd.tstamp, ni->ni_tstamp.data, sizeof (uint64_t));
5641 cmd.bintval = htole16(ni->ni_intval);
5642 cmd.lintval = htole16(10);
5644 /* Compute remaining time until next beacon. */
5645 val = (uint64_t)ni->ni_intval * IEEE80211_DUR_TU;
5646 mod = le64toh(cmd.tstamp) % val;
5647 cmd.binitval = htole32((uint32_t)(val - mod));
5649 DPRINTF(sc, IWN_DEBUG_RESET, "timing bintval=%u tstamp=%ju, init=%u\n",
5650 ni->ni_intval, le64toh(cmd.tstamp), (uint32_t)(val - mod));
5652 return iwn_cmd(sc, IWN_CMD_TIMING, &cmd, sizeof cmd, 1);
5656 iwn4965_power_calibration(struct iwn_softc *sc, int temp)
5659 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5661 /* Adjust TX power if need be (delta >= 3 degC). */
5662 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: temperature %d->%d\n",
5663 __func__, sc->temp, temp);
5664 if (abs(temp - sc->temp) >= 3) {
5665 /* Record temperature of last calibration. */
5667 (void)iwn4965_set_txpower(sc, 1);
5672 * Set TX power for current channel (each rate has its own power settings).
5673 * This function takes into account the regulatory information from EEPROM,
5674 * the current temperature and the current voltage.
5677 iwn4965_set_txpower(struct iwn_softc *sc, int async)
5679 /* Fixed-point arithmetic division using a n-bit fractional part. */
5680 #define fdivround(a, b, n) \
5681 ((((1 << n) * (a)) / (b) + (1 << n) / 2) / (1 << n))
5682 /* Linear interpolation. */
5683 #define interpolate(x, x1, y1, x2, y2, n) \
5684 ((y1) + fdivround(((int)(x) - (x1)) * ((y2) - (y1)), (x2) - (x1), n))
5686 static const int tdiv[IWN_NATTEN_GROUPS] = { 9, 8, 8, 8, 6 };
5687 struct iwn_ucode_info *uc = &sc->ucode_info;
5688 struct iwn4965_cmd_txpower cmd;
5689 struct iwn4965_eeprom_chan_samples *chans;
5690 const uint8_t *rf_gain, *dsp_gain;
5691 int32_t vdiff, tdiff;
5692 int i, is_chan_5ghz, c, grp, maxpwr;
5695 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX];
5696 /* Retrieve current channel from last RXON. */
5697 chan = sc->rxon->chan;
5698 is_chan_5ghz = (sc->rxon->flags & htole32(IWN_RXON_24GHZ)) == 0;
5699 DPRINTF(sc, IWN_DEBUG_RESET, "setting TX power for channel %d\n",
5702 memset(&cmd, 0, sizeof cmd);
5703 cmd.band = is_chan_5ghz ? 0 : 1;
5707 maxpwr = sc->maxpwr5GHz;
5708 rf_gain = iwn4965_rf_gain_5ghz;
5709 dsp_gain = iwn4965_dsp_gain_5ghz;
5711 maxpwr = sc->maxpwr2GHz;
5712 rf_gain = iwn4965_rf_gain_2ghz;
5713 dsp_gain = iwn4965_dsp_gain_2ghz;
5716 /* Compute voltage compensation. */
5717 vdiff = ((int32_t)le32toh(uc->volt) - sc->eeprom_voltage) / 7;
5722 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
5723 "%s: voltage compensation=%d (UCODE=%d, EEPROM=%d)\n",
5724 __func__, vdiff, le32toh(uc->volt), sc->eeprom_voltage);
5726 /* Get channel attenuation group. */
5727 if (chan <= 20) /* 1-20 */
5729 else if (chan <= 43) /* 34-43 */
5731 else if (chan <= 70) /* 44-70 */
5733 else if (chan <= 124) /* 71-124 */
5737 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
5738 "%s: chan %d, attenuation group=%d\n", __func__, chan, grp);
5740 /* Get channel sub-band. */
5741 for (i = 0; i < IWN_NBANDS; i++)
5742 if (sc->bands[i].lo != 0 &&
5743 sc->bands[i].lo <= chan && chan <= sc->bands[i].hi)
5745 if (i == IWN_NBANDS) /* Can't happen in real-life. */
5747 chans = sc->bands[i].chans;
5748 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
5749 "%s: chan %d sub-band=%d\n", __func__, chan, i);
5751 for (c = 0; c < 2; c++) {
5752 uint8_t power, gain, temp;
5753 int maxchpwr, pwr, ridx, idx;
5755 power = interpolate(chan,
5756 chans[0].num, chans[0].samples[c][1].power,
5757 chans[1].num, chans[1].samples[c][1].power, 1);
5758 gain = interpolate(chan,
5759 chans[0].num, chans[0].samples[c][1].gain,
5760 chans[1].num, chans[1].samples[c][1].gain, 1);
5761 temp = interpolate(chan,
5762 chans[0].num, chans[0].samples[c][1].temp,
5763 chans[1].num, chans[1].samples[c][1].temp, 1);
5764 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
5765 "%s: Tx chain %d: power=%d gain=%d temp=%d\n",
5766 __func__, c, power, gain, temp);
5768 /* Compute temperature compensation. */
5769 tdiff = ((sc->temp - temp) * 2) / tdiv[grp];
5770 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
5771 "%s: temperature compensation=%d (current=%d, EEPROM=%d)\n",
5772 __func__, tdiff, sc->temp, temp);
5774 for (ridx = 0; ridx <= IWN_RIDX_MAX; ridx++) {
5775 /* Convert dBm to half-dBm. */
5776 maxchpwr = sc->maxpwr[chan] * 2;
5778 maxchpwr -= 6; /* MIMO 2T: -3dB */
5782 /* Adjust TX power based on rate. */
5783 if ((ridx % 8) == 5)
5784 pwr -= 15; /* OFDM48: -7.5dB */
5785 else if ((ridx % 8) == 6)
5786 pwr -= 17; /* OFDM54: -8.5dB */
5787 else if ((ridx % 8) == 7)
5788 pwr -= 20; /* OFDM60: -10dB */
5790 pwr -= 10; /* Others: -5dB */
5792 /* Do not exceed channel max TX power. */
5796 idx = gain - (pwr - power) - tdiff - vdiff;
5797 if ((ridx / 8) & 1) /* MIMO */
5798 idx += (int32_t)le32toh(uc->atten[grp][c]);
5801 idx += 9; /* 5GHz */
5802 if (ridx == IWN_RIDX_MAX)
5805 /* Make sure idx stays in a valid range. */
5808 else if (idx > IWN4965_MAX_PWR_INDEX)
5809 idx = IWN4965_MAX_PWR_INDEX;
5811 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
5812 "%s: Tx chain %d, rate idx %d: power=%d\n",
5813 __func__, c, ridx, idx);
5814 cmd.power[ridx].rf_gain[c] = rf_gain[idx];
5815 cmd.power[ridx].dsp_gain[c] = dsp_gain[idx];
5819 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
5820 "%s: set tx power for chan %d\n", __func__, chan);
5821 return iwn_cmd(sc, IWN_CMD_TXPOWER, &cmd, sizeof cmd, async);
5828 iwn5000_set_txpower(struct iwn_softc *sc, int async)
5830 struct iwn5000_cmd_txpower cmd;
5833 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5836 * TX power calibration is handled automatically by the firmware
5839 memset(&cmd, 0, sizeof cmd);
5840 cmd.global_limit = 2 * IWN5000_TXPOWER_MAX_DBM; /* 16 dBm */
5841 cmd.flags = IWN5000_TXPOWER_NO_CLOSED;
5842 cmd.srv_limit = IWN5000_TXPOWER_AUTO;
5843 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_XMIT,
5844 "%s: setting TX power; rev=%d\n",
5846 IWN_UCODE_API(sc->ucode_rev));
5847 if (IWN_UCODE_API(sc->ucode_rev) == 1)
5848 cmdid = IWN_CMD_TXPOWER_DBM_V1;
5850 cmdid = IWN_CMD_TXPOWER_DBM;
5851 return iwn_cmd(sc, cmdid, &cmd, sizeof cmd, async);
5855 * Retrieve the maximum RSSI (in dBm) among receivers.
5858 iwn4965_get_rssi(struct iwn_softc *sc, struct iwn_rx_stat *stat)
5860 struct iwn4965_rx_phystat *phy = (void *)stat->phybuf;
5864 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5866 mask = (le16toh(phy->antenna) >> 4) & IWN_ANT_ABC;
5867 agc = (le16toh(phy->agc) >> 7) & 0x7f;
5870 if (mask & IWN_ANT_A)
5871 rssi = MAX(rssi, phy->rssi[0]);
5872 if (mask & IWN_ANT_B)
5873 rssi = MAX(rssi, phy->rssi[2]);
5874 if (mask & IWN_ANT_C)
5875 rssi = MAX(rssi, phy->rssi[4]);
5877 DPRINTF(sc, IWN_DEBUG_RECV,
5878 "%s: agc %d mask 0x%x rssi %d %d %d result %d\n", __func__, agc,
5879 mask, phy->rssi[0], phy->rssi[2], phy->rssi[4],
5880 rssi - agc - IWN_RSSI_TO_DBM);
5881 return rssi - agc - IWN_RSSI_TO_DBM;
5885 iwn5000_get_rssi(struct iwn_softc *sc, struct iwn_rx_stat *stat)
5887 struct iwn5000_rx_phystat *phy = (void *)stat->phybuf;
5891 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5893 agc = (le32toh(phy->agc) >> 9) & 0x7f;
5895 rssi = MAX(le16toh(phy->rssi[0]) & 0xff,
5896 le16toh(phy->rssi[1]) & 0xff);
5897 rssi = MAX(le16toh(phy->rssi[2]) & 0xff, rssi);
5899 DPRINTF(sc, IWN_DEBUG_RECV,
5900 "%s: agc %d rssi %d %d %d result %d\n", __func__, agc,
5901 phy->rssi[0], phy->rssi[1], phy->rssi[2],
5902 rssi - agc - IWN_RSSI_TO_DBM);
5903 return rssi - agc - IWN_RSSI_TO_DBM;
5907 * Retrieve the average noise (in dBm) among receivers.
5910 iwn_get_noise(const struct iwn_rx_general_stats *stats)
5912 int i, total, nbant, noise;
5915 for (i = 0; i < 3; i++) {
5916 if ((noise = le32toh(stats->noise[i]) & 0xff) == 0)
5921 /* There should be at least one antenna but check anyway. */
5922 return (nbant == 0) ? -127 : (total / nbant) - 107;
5926 * Compute temperature (in degC) from last received statistics.
5929 iwn4965_get_temperature(struct iwn_softc *sc)
5931 struct iwn_ucode_info *uc = &sc->ucode_info;
5932 int32_t r1, r2, r3, r4, temp;
5934 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5936 r1 = le32toh(uc->temp[0].chan20MHz);
5937 r2 = le32toh(uc->temp[1].chan20MHz);
5938 r3 = le32toh(uc->temp[2].chan20MHz);
5939 r4 = le32toh(sc->rawtemp);
5941 if (r1 == r3) /* Prevents division by 0 (should not happen). */
5944 /* Sign-extend 23-bit R4 value to 32-bit. */
5945 r4 = ((r4 & 0xffffff) ^ 0x800000) - 0x800000;
5946 /* Compute temperature in Kelvin. */
5947 temp = (259 * (r4 - r2)) / (r3 - r1);
5948 temp = (temp * 97) / 100 + 8;
5950 DPRINTF(sc, IWN_DEBUG_ANY, "temperature %dK/%dC\n", temp,
5952 return IWN_KTOC(temp);
5956 iwn5000_get_temperature(struct iwn_softc *sc)
5960 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5963 * Temperature is not used by the driver for 5000 Series because
5964 * TX power calibration is handled by firmware.
5966 temp = le32toh(sc->rawtemp);
5967 if (sc->hw_type == IWN_HW_REV_TYPE_5150) {
5968 temp = (temp / -5) + sc->temp_off;
5969 temp = IWN_KTOC(temp);
5975 * Initialize sensitivity calibration state machine.
5978 iwn_init_sensitivity(struct iwn_softc *sc)
5980 struct iwn_ops *ops = &sc->ops;
5981 struct iwn_calib_state *calib = &sc->calib;
5985 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5987 /* Reset calibration state machine. */
5988 memset(calib, 0, sizeof (*calib));
5989 calib->state = IWN_CALIB_STATE_INIT;
5990 calib->cck_state = IWN_CCK_STATE_HIFA;
5991 /* Set initial correlation values. */
5992 calib->ofdm_x1 = sc->limits->min_ofdm_x1;
5993 calib->ofdm_mrc_x1 = sc->limits->min_ofdm_mrc_x1;
5994 calib->ofdm_x4 = sc->limits->min_ofdm_x4;
5995 calib->ofdm_mrc_x4 = sc->limits->min_ofdm_mrc_x4;
5996 calib->cck_x4 = 125;
5997 calib->cck_mrc_x4 = sc->limits->min_cck_mrc_x4;
5998 calib->energy_cck = sc->limits->energy_cck;
6000 /* Write initial sensitivity. */
6001 if ((error = iwn_send_sensitivity(sc)) != 0)
6004 /* Write initial gains. */
6005 if ((error = ops->init_gains(sc)) != 0)
6008 /* Request statistics at each beacon interval. */
6010 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: sending request for statistics\n",
6012 return iwn_cmd(sc, IWN_CMD_GET_STATISTICS, &flags, sizeof flags, 1);
6016 * Collect noise and RSSI statistics for the first 20 beacons received
6017 * after association and use them to determine connected antennas and
6018 * to set differential gains.
6021 iwn_collect_noise(struct iwn_softc *sc,
6022 const struct iwn_rx_general_stats *stats)
6024 struct iwn_ops *ops = &sc->ops;
6025 struct iwn_calib_state *calib = &sc->calib;
6026 struct ieee80211com *ic = &sc->sc_ic;
6030 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
6032 /* Accumulate RSSI and noise for all 3 antennas. */
6033 for (i = 0; i < 3; i++) {
6034 calib->rssi[i] += le32toh(stats->rssi[i]) & 0xff;
6035 calib->noise[i] += le32toh(stats->noise[i]) & 0xff;
6037 /* NB: We update differential gains only once after 20 beacons. */
6038 if (++calib->nbeacons < 20)
6041 /* Determine highest average RSSI. */
6042 val = MAX(calib->rssi[0], calib->rssi[1]);
6043 val = MAX(calib->rssi[2], val);
6045 /* Determine which antennas are connected. */
6046 sc->chainmask = sc->rxchainmask;
6047 for (i = 0; i < 3; i++)
6048 if (val - calib->rssi[i] > 15 * 20)
6049 sc->chainmask &= ~(1 << i);
6050 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_XMIT,
6051 "%s: RX chains mask: theoretical=0x%x, actual=0x%x\n",
6052 __func__, sc->rxchainmask, sc->chainmask);
6054 /* If none of the TX antennas are connected, keep at least one. */
6055 if ((sc->chainmask & sc->txchainmask) == 0)
6056 sc->chainmask |= IWN_LSB(sc->txchainmask);
6058 (void)ops->set_gains(sc);
6059 calib->state = IWN_CALIB_STATE_RUN;
6062 /* XXX Disable RX chains with no antennas connected. */
6063 sc->rxon->rxchain = htole16(IWN_RXCHAIN_SEL(sc->chainmask));
6064 if (sc->sc_is_scanning)
6065 device_printf(sc->sc_dev,
6066 "%s: is_scanning set, before RXON\n",
6068 (void)iwn_cmd(sc, IWN_CMD_RXON, sc->rxon, sc->rxonsz, 1);
6071 /* Enable power-saving mode if requested by user. */
6072 if (ic->ic_flags & IEEE80211_F_PMGTON)
6073 (void)iwn_set_pslevel(sc, 0, 3, 1);
6075 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
6080 iwn4965_init_gains(struct iwn_softc *sc)
6082 struct iwn_phy_calib_gain cmd;
6084 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
6086 memset(&cmd, 0, sizeof cmd);
6087 cmd.code = IWN4965_PHY_CALIB_DIFF_GAIN;
6088 /* Differential gains initially set to 0 for all 3 antennas. */
6089 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
6090 "%s: setting initial differential gains\n", __func__);
6091 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 1);
6095 iwn5000_init_gains(struct iwn_softc *sc)
6097 struct iwn_phy_calib cmd;
6099 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
6101 memset(&cmd, 0, sizeof cmd);
6102 cmd.code = sc->reset_noise_gain;
6105 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
6106 "%s: setting initial differential gains\n", __func__);
6107 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 1);
6111 iwn4965_set_gains(struct iwn_softc *sc)
6113 struct iwn_calib_state *calib = &sc->calib;
6114 struct iwn_phy_calib_gain cmd;
6115 int i, delta, noise;
6117 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
6119 /* Get minimal noise among connected antennas. */
6120 noise = INT_MAX; /* NB: There's at least one antenna. */
6121 for (i = 0; i < 3; i++)
6122 if (sc->chainmask & (1 << i))
6123 noise = MIN(calib->noise[i], noise);
6125 memset(&cmd, 0, sizeof cmd);
6126 cmd.code = IWN4965_PHY_CALIB_DIFF_GAIN;
6127 /* Set differential gains for connected antennas. */
6128 for (i = 0; i < 3; i++) {
6129 if (sc->chainmask & (1 << i)) {
6130 /* Compute attenuation (in unit of 1.5dB). */
6131 delta = (noise - (int32_t)calib->noise[i]) / 30;
6132 /* NB: delta <= 0 */
6133 /* Limit to [-4.5dB,0]. */
6134 cmd.gain[i] = MIN(abs(delta), 3);
6136 cmd.gain[i] |= 1 << 2; /* sign bit */
6139 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
6140 "setting differential gains Ant A/B/C: %x/%x/%x (%x)\n",
6141 cmd.gain[0], cmd.gain[1], cmd.gain[2], sc->chainmask);
6142 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 1);
6146 iwn5000_set_gains(struct iwn_softc *sc)
6148 struct iwn_calib_state *calib = &sc->calib;
6149 struct iwn_phy_calib_gain cmd;
6150 int i, ant, div, delta;
6152 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
6154 /* We collected 20 beacons and !=6050 need a 1.5 factor. */
6155 div = (sc->hw_type == IWN_HW_REV_TYPE_6050) ? 20 : 30;
6157 memset(&cmd, 0, sizeof cmd);
6158 cmd.code = sc->noise_gain;
6161 /* Get first available RX antenna as referential. */
6162 ant = IWN_LSB(sc->rxchainmask);
6163 /* Set differential gains for other antennas. */
6164 for (i = ant + 1; i < 3; i++) {
6165 if (sc->chainmask & (1 << i)) {
6166 /* The delta is relative to antenna "ant". */
6167 delta = ((int32_t)calib->noise[ant] -
6168 (int32_t)calib->noise[i]) / div;
6169 /* Limit to [-4.5dB,+4.5dB]. */
6170 cmd.gain[i - 1] = MIN(abs(delta), 3);
6172 cmd.gain[i - 1] |= 1 << 2; /* sign bit */
6175 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_XMIT,
6176 "setting differential gains Ant B/C: %x/%x (%x)\n",
6177 cmd.gain[0], cmd.gain[1], sc->chainmask);
6178 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 1);
6182 * Tune RF RX sensitivity based on the number of false alarms detected
6183 * during the last beacon period.
6186 iwn_tune_sensitivity(struct iwn_softc *sc, const struct iwn_rx_stats *stats)
6188 #define inc(val, inc, max) \
6189 if ((val) < (max)) { \
6190 if ((val) < (max) - (inc)) \
6196 #define dec(val, dec, min) \
6197 if ((val) > (min)) { \
6198 if ((val) > (min) + (dec)) \
6205 const struct iwn_sensitivity_limits *limits = sc->limits;
6206 struct iwn_calib_state *calib = &sc->calib;
6207 uint32_t val, rxena, fa;
6208 uint32_t energy[3], energy_min;
6209 uint8_t noise[3], noise_ref;
6210 int i, needs_update = 0;
6212 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
6214 /* Check that we've been enabled long enough. */
6215 if ((rxena = le32toh(stats->general.load)) == 0){
6216 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end not so long\n", __func__);
6220 /* Compute number of false alarms since last call for OFDM. */
6221 fa = le32toh(stats->ofdm.bad_plcp) - calib->bad_plcp_ofdm;
6222 fa += le32toh(stats->ofdm.fa) - calib->fa_ofdm;
6223 fa *= 200 * IEEE80211_DUR_TU; /* 200TU */
6225 if (fa > 50 * rxena) {
6226 /* High false alarm count, decrease sensitivity. */
6227 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
6228 "%s: OFDM high false alarm count: %u\n", __func__, fa);
6229 inc(calib->ofdm_x1, 1, limits->max_ofdm_x1);
6230 inc(calib->ofdm_mrc_x1, 1, limits->max_ofdm_mrc_x1);
6231 inc(calib->ofdm_x4, 1, limits->max_ofdm_x4);
6232 inc(calib->ofdm_mrc_x4, 1, limits->max_ofdm_mrc_x4);
6234 } else if (fa < 5 * rxena) {
6235 /* Low false alarm count, increase sensitivity. */
6236 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
6237 "%s: OFDM low false alarm count: %u\n", __func__, fa);
6238 dec(calib->ofdm_x1, 1, limits->min_ofdm_x1);
6239 dec(calib->ofdm_mrc_x1, 1, limits->min_ofdm_mrc_x1);
6240 dec(calib->ofdm_x4, 1, limits->min_ofdm_x4);
6241 dec(calib->ofdm_mrc_x4, 1, limits->min_ofdm_mrc_x4);
6244 /* Compute maximum noise among 3 receivers. */
6245 for (i = 0; i < 3; i++)
6246 noise[i] = (le32toh(stats->general.noise[i]) >> 8) & 0xff;
6247 val = MAX(noise[0], noise[1]);
6248 val = MAX(noise[2], val);
6249 /* Insert it into our samples table. */
6250 calib->noise_samples[calib->cur_noise_sample] = val;
6251 calib->cur_noise_sample = (calib->cur_noise_sample + 1) % 20;
6253 /* Compute maximum noise among last 20 samples. */
6254 noise_ref = calib->noise_samples[0];
6255 for (i = 1; i < 20; i++)
6256 noise_ref = MAX(noise_ref, calib->noise_samples[i]);
6258 /* Compute maximum energy among 3 receivers. */
6259 for (i = 0; i < 3; i++)
6260 energy[i] = le32toh(stats->general.energy[i]);
6261 val = MIN(energy[0], energy[1]);
6262 val = MIN(energy[2], val);
6263 /* Insert it into our samples table. */
6264 calib->energy_samples[calib->cur_energy_sample] = val;
6265 calib->cur_energy_sample = (calib->cur_energy_sample + 1) % 10;
6267 /* Compute minimum energy among last 10 samples. */
6268 energy_min = calib->energy_samples[0];
6269 for (i = 1; i < 10; i++)
6270 energy_min = MAX(energy_min, calib->energy_samples[i]);
6273 /* Compute number of false alarms since last call for CCK. */
6274 fa = le32toh(stats->cck.bad_plcp) - calib->bad_plcp_cck;
6275 fa += le32toh(stats->cck.fa) - calib->fa_cck;
6276 fa *= 200 * IEEE80211_DUR_TU; /* 200TU */
6278 if (fa > 50 * rxena) {
6279 /* High false alarm count, decrease sensitivity. */
6280 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
6281 "%s: CCK high false alarm count: %u\n", __func__, fa);
6282 calib->cck_state = IWN_CCK_STATE_HIFA;
6285 if (calib->cck_x4 > 160) {
6286 calib->noise_ref = noise_ref;
6287 if (calib->energy_cck > 2)
6288 dec(calib->energy_cck, 2, energy_min);
6290 if (calib->cck_x4 < 160) {
6291 calib->cck_x4 = 161;
6294 inc(calib->cck_x4, 3, limits->max_cck_x4);
6296 inc(calib->cck_mrc_x4, 3, limits->max_cck_mrc_x4);
6298 } else if (fa < 5 * rxena) {
6299 /* Low false alarm count, increase sensitivity. */
6300 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
6301 "%s: CCK low false alarm count: %u\n", __func__, fa);
6302 calib->cck_state = IWN_CCK_STATE_LOFA;
6305 if (calib->cck_state != IWN_CCK_STATE_INIT &&
6306 (((int32_t)calib->noise_ref - (int32_t)noise_ref) > 2 ||
6307 calib->low_fa > 100)) {
6308 inc(calib->energy_cck, 2, limits->min_energy_cck);
6309 dec(calib->cck_x4, 3, limits->min_cck_x4);
6310 dec(calib->cck_mrc_x4, 3, limits->min_cck_mrc_x4);
6313 /* Not worth to increase or decrease sensitivity. */
6314 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
6315 "%s: CCK normal false alarm count: %u\n", __func__, fa);
6317 calib->noise_ref = noise_ref;
6319 if (calib->cck_state == IWN_CCK_STATE_HIFA) {
6320 /* Previous interval had many false alarms. */
6321 dec(calib->energy_cck, 8, energy_min);
6323 calib->cck_state = IWN_CCK_STATE_INIT;
6327 (void)iwn_send_sensitivity(sc);
6329 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
6336 iwn_send_sensitivity(struct iwn_softc *sc)
6338 struct iwn_calib_state *calib = &sc->calib;
6339 struct iwn_enhanced_sensitivity_cmd cmd;
6342 memset(&cmd, 0, sizeof cmd);
6343 len = sizeof (struct iwn_sensitivity_cmd);
6344 cmd.which = IWN_SENSITIVITY_WORKTBL;
6345 /* OFDM modulation. */
6346 cmd.corr_ofdm_x1 = htole16(calib->ofdm_x1);
6347 cmd.corr_ofdm_mrc_x1 = htole16(calib->ofdm_mrc_x1);
6348 cmd.corr_ofdm_x4 = htole16(calib->ofdm_x4);
6349 cmd.corr_ofdm_mrc_x4 = htole16(calib->ofdm_mrc_x4);
6350 cmd.energy_ofdm = htole16(sc->limits->energy_ofdm);
6351 cmd.energy_ofdm_th = htole16(62);
6352 /* CCK modulation. */
6353 cmd.corr_cck_x4 = htole16(calib->cck_x4);
6354 cmd.corr_cck_mrc_x4 = htole16(calib->cck_mrc_x4);
6355 cmd.energy_cck = htole16(calib->energy_cck);
6356 /* Barker modulation: use default values. */
6357 cmd.corr_barker = htole16(190);
6358 cmd.corr_barker_mrc = htole16(sc->limits->barker_mrc);
6360 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
6361 "%s: set sensitivity %d/%d/%d/%d/%d/%d/%d\n", __func__,
6362 calib->ofdm_x1, calib->ofdm_mrc_x1, calib->ofdm_x4,
6363 calib->ofdm_mrc_x4, calib->cck_x4,
6364 calib->cck_mrc_x4, calib->energy_cck);
6366 if (!(sc->sc_flags & IWN_FLAG_ENH_SENS))
6368 /* Enhanced sensitivity settings. */
6369 len = sizeof (struct iwn_enhanced_sensitivity_cmd);
6370 cmd.ofdm_det_slope_mrc = htole16(668);
6371 cmd.ofdm_det_icept_mrc = htole16(4);
6372 cmd.ofdm_det_slope = htole16(486);
6373 cmd.ofdm_det_icept = htole16(37);
6374 cmd.cck_det_slope_mrc = htole16(853);
6375 cmd.cck_det_icept_mrc = htole16(4);
6376 cmd.cck_det_slope = htole16(476);
6377 cmd.cck_det_icept = htole16(99);
6379 return iwn_cmd(sc, IWN_CMD_SET_SENSITIVITY, &cmd, len, 1);
6383 * Look at the increase of PLCP errors over time; if it exceeds
6384 * a programmed threshold then trigger an RF retune.
6387 iwn_check_rx_recovery(struct iwn_softc *sc, struct iwn_stats *rs)
6389 int32_t delta_ofdm, delta_ht, delta_cck;
6390 struct iwn_calib_state *calib = &sc->calib;
6391 int delta_ticks, cur_ticks;
6396 * Calculate the difference between the current and
6397 * previous statistics.
6399 delta_cck = le32toh(rs->rx.cck.bad_plcp) - calib->bad_plcp_cck;
6400 delta_ofdm = le32toh(rs->rx.ofdm.bad_plcp) - calib->bad_plcp_ofdm;
6401 delta_ht = le32toh(rs->rx.ht.bad_plcp) - calib->bad_plcp_ht;
6404 * Calculate the delta in time between successive statistics
6405 * messages. Yes, it can roll over; so we make sure that
6406 * this doesn't happen.
6408 * XXX go figure out what to do about rollover
6409 * XXX go figure out what to do if ticks rolls over to -ve instead!
6410 * XXX go stab signed integer overflow undefined-ness in the face.
6413 delta_ticks = cur_ticks - sc->last_calib_ticks;
6416 * If any are negative, then the firmware likely reset; so just
6417 * bail. We'll pick this up next time.
6419 if (delta_cck < 0 || delta_ofdm < 0 || delta_ht < 0 || delta_ticks < 0)
6423 * delta_ticks is in ticks; we need to convert it up to milliseconds
6424 * so we can do some useful math with it.
6426 delta_msec = ticks_to_msecs(delta_ticks);
6429 * Calculate what our threshold is given the current delta_msec.
6431 thresh = sc->base_params->plcp_err_threshold * delta_msec;
6433 DPRINTF(sc, IWN_DEBUG_STATE,
6434 "%s: time delta: %d; cck=%d, ofdm=%d, ht=%d, total=%d, thresh=%d\n",
6440 (delta_msec + delta_cck + delta_ofdm + delta_ht),
6444 * If we need a retune, then schedule a single channel scan
6445 * to a channel that isn't the currently active one!
6447 * The math from linux iwlwifi:
6449 * if ((delta * 100 / msecs) > threshold)
6451 if (thresh > 0 && (delta_cck + delta_ofdm + delta_ht) * 100 > thresh) {
6452 DPRINTF(sc, IWN_DEBUG_ANY,
6453 "%s: PLCP error threshold raw (%d) comparison (%d) "
6454 "over limit (%d); retune!\n",
6456 (delta_cck + delta_ofdm + delta_ht),
6457 (delta_cck + delta_ofdm + delta_ht) * 100,
6463 * Set STA mode power saving level (between 0 and 5).
6464 * Level 0 is CAM (Continuously Aware Mode), 5 is for maximum power saving.
6467 iwn_set_pslevel(struct iwn_softc *sc, int dtim, int level, int async)
6469 struct iwn_pmgt_cmd cmd;
6470 const struct iwn_pmgt *pmgt;
6471 uint32_t max, skip_dtim;
6475 DPRINTF(sc, IWN_DEBUG_PWRSAVE,
6476 "%s: dtim=%d, level=%d, async=%d\n",
6482 /* Select which PS parameters to use. */
6484 pmgt = &iwn_pmgt[0][level];
6485 else if (dtim <= 10)
6486 pmgt = &iwn_pmgt[1][level];
6488 pmgt = &iwn_pmgt[2][level];
6490 memset(&cmd, 0, sizeof cmd);
6491 if (level != 0) /* not CAM */
6492 cmd.flags |= htole16(IWN_PS_ALLOW_SLEEP);
6494 cmd.flags |= htole16(IWN_PS_FAST_PD);
6495 /* Retrieve PCIe Active State Power Management (ASPM). */
6496 reg = pci_read_config(sc->sc_dev, sc->sc_cap_off + PCIER_LINK_CTL, 4);
6497 if (!(reg & PCIEM_LINK_CTL_ASPMC_L0S)) /* L0s Entry disabled. */
6498 cmd.flags |= htole16(IWN_PS_PCI_PMGT);
6499 cmd.rxtimeout = htole32(pmgt->rxtimeout * 1024);
6500 cmd.txtimeout = htole32(pmgt->txtimeout * 1024);
6506 skip_dtim = pmgt->skip_dtim;
6507 if (skip_dtim != 0) {
6508 cmd.flags |= htole16(IWN_PS_SLEEP_OVER_DTIM);
6509 max = pmgt->intval[4];
6510 if (max == (uint32_t)-1)
6511 max = dtim * (skip_dtim + 1);
6512 else if (max > dtim)
6513 max = rounddown(max, dtim);
6516 for (i = 0; i < 5; i++)
6517 cmd.intval[i] = htole32(MIN(max, pmgt->intval[i]));
6519 DPRINTF(sc, IWN_DEBUG_RESET, "setting power saving level to %d\n",
6521 return iwn_cmd(sc, IWN_CMD_SET_POWER_MODE, &cmd, sizeof cmd, async);
6525 iwn_send_btcoex(struct iwn_softc *sc)
6527 struct iwn_bluetooth cmd;
6529 memset(&cmd, 0, sizeof cmd);
6530 cmd.flags = IWN_BT_COEX_CHAN_ANN | IWN_BT_COEX_BT_PRIO;
6531 cmd.lead_time = IWN_BT_LEAD_TIME_DEF;
6532 cmd.max_kill = IWN_BT_MAX_KILL_DEF;
6533 DPRINTF(sc, IWN_DEBUG_RESET, "%s: configuring bluetooth coexistence\n",
6535 return iwn_cmd(sc, IWN_CMD_BT_COEX, &cmd, sizeof(cmd), 0);
6539 iwn_send_advanced_btcoex(struct iwn_softc *sc)
6541 static const uint32_t btcoex_3wire[12] = {
6542 0xaaaaaaaa, 0xaaaaaaaa, 0xaeaaaaaa, 0xaaaaaaaa,
6543 0xcc00ff28, 0x0000aaaa, 0xcc00aaaa, 0x0000aaaa,
6544 0xc0004000, 0x00004000, 0xf0005000, 0xf0005000,
6546 struct iwn6000_btcoex_config btconfig;
6547 struct iwn2000_btcoex_config btconfig2k;
6548 struct iwn_btcoex_priotable btprio;
6549 struct iwn_btcoex_prot btprot;
6553 memset(&btconfig, 0, sizeof btconfig);
6554 memset(&btconfig2k, 0, sizeof btconfig2k);
6556 flags = IWN_BT_FLAG_COEX6000_MODE_3W <<
6557 IWN_BT_FLAG_COEX6000_MODE_SHIFT; // Done as is in linux kernel 3.2
6559 if (sc->base_params->bt_sco_disable)
6560 flags &= ~IWN_BT_FLAG_SYNC_2_BT_DISABLE;
6562 flags |= IWN_BT_FLAG_SYNC_2_BT_DISABLE;
6564 flags |= IWN_BT_FLAG_COEX6000_CHAN_INHIBITION;
6566 /* Default flags result is 145 as old value */
6569 * Flags value has to be review. Values must change if we
6570 * which to disable it
6572 if (sc->base_params->bt_session_2) {
6573 btconfig2k.flags = flags;
6574 btconfig2k.max_kill = 5;
6575 btconfig2k.bt3_t7_timer = 1;
6576 btconfig2k.kill_ack = htole32(0xffff0000);
6577 btconfig2k.kill_cts = htole32(0xffff0000);
6578 btconfig2k.sample_time = 2;
6579 btconfig2k.bt3_t2_timer = 0xc;
6581 for (i = 0; i < 12; i++)
6582 btconfig2k.lookup_table[i] = htole32(btcoex_3wire[i]);
6583 btconfig2k.valid = htole16(0xff);
6584 btconfig2k.prio_boost = htole32(0xf0);
6585 DPRINTF(sc, IWN_DEBUG_RESET,
6586 "%s: configuring advanced bluetooth coexistence"
6587 " session 2, flags : 0x%x\n",
6590 error = iwn_cmd(sc, IWN_CMD_BT_COEX, &btconfig2k,
6591 sizeof(btconfig2k), 1);
6593 btconfig.flags = flags;
6594 btconfig.max_kill = 5;
6595 btconfig.bt3_t7_timer = 1;
6596 btconfig.kill_ack = htole32(0xffff0000);
6597 btconfig.kill_cts = htole32(0xffff0000);
6598 btconfig.sample_time = 2;
6599 btconfig.bt3_t2_timer = 0xc;
6601 for (i = 0; i < 12; i++)
6602 btconfig.lookup_table[i] = htole32(btcoex_3wire[i]);
6603 btconfig.valid = htole16(0xff);
6604 btconfig.prio_boost = 0xf0;
6605 DPRINTF(sc, IWN_DEBUG_RESET,
6606 "%s: configuring advanced bluetooth coexistence,"
6610 error = iwn_cmd(sc, IWN_CMD_BT_COEX, &btconfig,
6611 sizeof(btconfig), 1);
6617 memset(&btprio, 0, sizeof btprio);
6618 btprio.calib_init1 = 0x6;
6619 btprio.calib_init2 = 0x7;
6620 btprio.calib_periodic_low1 = 0x2;
6621 btprio.calib_periodic_low2 = 0x3;
6622 btprio.calib_periodic_high1 = 0x4;
6623 btprio.calib_periodic_high2 = 0x5;
6625 btprio.scan52 = 0x8;
6626 btprio.scan24 = 0xa;
6627 error = iwn_cmd(sc, IWN_CMD_BT_COEX_PRIOTABLE, &btprio, sizeof(btprio),
6632 /* Force BT state machine change. */
6633 memset(&btprot, 0, sizeof btprot);
6636 error = iwn_cmd(sc, IWN_CMD_BT_COEX_PROT, &btprot, sizeof(btprot), 1);
6640 return iwn_cmd(sc, IWN_CMD_BT_COEX_PROT, &btprot, sizeof(btprot), 1);
6644 iwn5000_runtime_calib(struct iwn_softc *sc)
6646 struct iwn5000_calib_config cmd;
6648 memset(&cmd, 0, sizeof cmd);
6649 cmd.ucode.once.enable = 0xffffffff;
6650 cmd.ucode.once.start = IWN5000_CALIB_DC;
6651 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
6652 "%s: configuring runtime calibration\n", __func__);
6653 return iwn_cmd(sc, IWN5000_CMD_CALIB_CONFIG, &cmd, sizeof(cmd), 0);
6657 iwn_get_rxon_ht_flags(struct iwn_softc *sc, struct ieee80211_channel *c)
6659 struct ieee80211com *ic = &sc->sc_ic;
6660 uint32_t htflags = 0;
6662 if (! IEEE80211_IS_CHAN_HT(c))
6665 htflags |= IWN_RXON_HT_PROTMODE(ic->ic_curhtprotmode);
6667 if (IEEE80211_IS_CHAN_HT40(c)) {
6668 switch (ic->ic_curhtprotmode) {
6669 case IEEE80211_HTINFO_OPMODE_HT20PR:
6670 htflags |= IWN_RXON_HT_MODEPURE40;
6673 htflags |= IWN_RXON_HT_MODEMIXED;
6677 if (IEEE80211_IS_CHAN_HT40D(c))
6678 htflags |= IWN_RXON_HT_HT40MINUS;
6684 iwn_check_bss_filter(struct iwn_softc *sc)
6686 return ((sc->rxon->filter & htole32(IWN_FILTER_BSS)) != 0);
6690 iwn4965_rxon_assoc(struct iwn_softc *sc, int async)
6692 struct iwn4965_rxon_assoc cmd;
6693 struct iwn_rxon *rxon = sc->rxon;
6695 cmd.flags = rxon->flags;
6696 cmd.filter = rxon->filter;
6697 cmd.ofdm_mask = rxon->ofdm_mask;
6698 cmd.cck_mask = rxon->cck_mask;
6699 cmd.ht_single_mask = rxon->ht_single_mask;
6700 cmd.ht_dual_mask = rxon->ht_dual_mask;
6701 cmd.rxchain = rxon->rxchain;
6704 return (iwn_cmd(sc, IWN_CMD_RXON_ASSOC, &cmd, sizeof(cmd), async));
6708 iwn5000_rxon_assoc(struct iwn_softc *sc, int async)
6710 struct iwn5000_rxon_assoc cmd;
6711 struct iwn_rxon *rxon = sc->rxon;
6713 cmd.flags = rxon->flags;
6714 cmd.filter = rxon->filter;
6715 cmd.ofdm_mask = rxon->ofdm_mask;
6716 cmd.cck_mask = rxon->cck_mask;
6718 cmd.ht_single_mask = rxon->ht_single_mask;
6719 cmd.ht_dual_mask = rxon->ht_dual_mask;
6720 cmd.ht_triple_mask = rxon->ht_triple_mask;
6722 cmd.rxchain = rxon->rxchain;
6723 cmd.acquisition = rxon->acquisition;
6726 return (iwn_cmd(sc, IWN_CMD_RXON_ASSOC, &cmd, sizeof(cmd), async));
6730 iwn_send_rxon(struct iwn_softc *sc, int assoc, int async)
6732 struct iwn_ops *ops = &sc->ops;
6735 IWN_LOCK_ASSERT(sc);
6737 if (assoc && iwn_check_bss_filter(sc) != 0) {
6738 error = ops->rxon_assoc(sc, async);
6740 device_printf(sc->sc_dev,
6741 "%s: RXON_ASSOC command failed, error %d\n",
6746 if (sc->sc_is_scanning)
6747 device_printf(sc->sc_dev,
6748 "%s: is_scanning set, before RXON\n",
6751 error = iwn_cmd(sc, IWN_CMD_RXON, sc->rxon, sc->rxonsz, async);
6753 device_printf(sc->sc_dev,
6754 "%s: RXON command failed, error %d\n",
6760 * Reconfiguring RXON clears the firmware nodes table so
6761 * we must add the broadcast node again.
6763 if (iwn_check_bss_filter(sc) == 0 &&
6764 (error = iwn_add_broadcast_node(sc, async)) != 0) {
6765 device_printf(sc->sc_dev,
6766 "%s: could not add broadcast node, error %d\n",
6772 /* Configuration has changed, set TX power accordingly. */
6773 if ((error = ops->set_txpower(sc, async)) != 0) {
6774 device_printf(sc->sc_dev,
6775 "%s: could not set TX power, error %d\n",
6784 iwn_config(struct iwn_softc *sc)
6786 struct ieee80211com *ic = &sc->sc_ic;
6787 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
6788 const uint8_t *macaddr;
6793 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
6795 if ((sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSET)
6796 && (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSETv2)) {
6797 device_printf(sc->sc_dev,"%s: temp_offset and temp_offsetv2 are"
6798 " exclusive each together. Review NIC config file. Conf"
6799 " : 0x%08x Flags : 0x%08x \n", __func__,
6800 sc->base_params->calib_need,
6801 (IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSET |
6802 IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSETv2));
6806 /* Compute temperature calib if needed. Will be send by send calib */
6807 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSET) {
6808 error = iwn5000_temp_offset_calib(sc);
6810 device_printf(sc->sc_dev,
6811 "%s: could not set temperature offset\n", __func__);
6814 } else if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSETv2) {
6815 error = iwn5000_temp_offset_calibv2(sc);
6817 device_printf(sc->sc_dev,
6818 "%s: could not compute temperature offset v2\n",
6824 if (sc->hw_type == IWN_HW_REV_TYPE_6050) {
6825 /* Configure runtime DC calibration. */
6826 error = iwn5000_runtime_calib(sc);
6828 device_printf(sc->sc_dev,
6829 "%s: could not configure runtime calibration\n",
6835 /* Configure valid TX chains for >=5000 Series. */
6836 if (sc->hw_type != IWN_HW_REV_TYPE_4965 &&
6837 IWN_UCODE_API(sc->ucode_rev) > 1) {
6838 txmask = htole32(sc->txchainmask);
6839 DPRINTF(sc, IWN_DEBUG_RESET | IWN_DEBUG_XMIT,
6840 "%s: configuring valid TX chains 0x%x\n", __func__, txmask);
6841 error = iwn_cmd(sc, IWN5000_CMD_TX_ANT_CONFIG, &txmask,
6844 device_printf(sc->sc_dev,
6845 "%s: could not configure valid TX chains, "
6846 "error %d\n", __func__, error);
6851 /* Configure bluetooth coexistence. */
6854 /* Configure bluetooth coexistence if needed. */
6855 if (sc->base_params->bt_mode == IWN_BT_ADVANCED)
6856 error = iwn_send_advanced_btcoex(sc);
6857 if (sc->base_params->bt_mode == IWN_BT_SIMPLE)
6858 error = iwn_send_btcoex(sc);
6861 device_printf(sc->sc_dev,
6862 "%s: could not configure bluetooth coexistence, error %d\n",
6867 /* Set mode, channel, RX filter and enable RX. */
6868 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX];
6869 memset(sc->rxon, 0, sizeof (struct iwn_rxon));
6870 macaddr = vap ? vap->iv_myaddr : ic->ic_macaddr;
6871 IEEE80211_ADDR_COPY(sc->rxon->myaddr, macaddr);
6872 IEEE80211_ADDR_COPY(sc->rxon->wlap, macaddr);
6873 sc->rxon->chan = ieee80211_chan2ieee(ic, ic->ic_curchan);
6874 sc->rxon->flags = htole32(IWN_RXON_TSF | IWN_RXON_CTS_TO_SELF);
6875 if (IEEE80211_IS_CHAN_2GHZ(ic->ic_curchan))
6876 sc->rxon->flags |= htole32(IWN_RXON_AUTO | IWN_RXON_24GHZ);
6878 sc->rxon->filter = htole32(IWN_FILTER_MULTICAST);
6879 switch (ic->ic_opmode) {
6880 case IEEE80211_M_STA:
6881 sc->rxon->mode = IWN_MODE_STA;
6883 case IEEE80211_M_MONITOR:
6884 sc->rxon->mode = IWN_MODE_MONITOR;
6887 /* Should not get there. */
6890 iwn_set_promisc(sc);
6891 sc->rxon->cck_mask = 0x0f; /* not yet negotiated */
6892 sc->rxon->ofdm_mask = 0xff; /* not yet negotiated */
6893 sc->rxon->ht_single_mask = 0xff;
6894 sc->rxon->ht_dual_mask = 0xff;
6895 sc->rxon->ht_triple_mask = 0xff;
6897 * In active association mode, ensure that
6898 * all the receive chains are enabled.
6900 * Since we're not yet doing SMPS, don't allow the
6901 * number of idle RX chains to be less than the active
6905 IWN_RXCHAIN_VALID(sc->rxchainmask) |
6906 IWN_RXCHAIN_MIMO_COUNT(sc->nrxchains) |
6907 IWN_RXCHAIN_IDLE_COUNT(sc->nrxchains);
6908 sc->rxon->rxchain = htole16(rxchain);
6909 DPRINTF(sc, IWN_DEBUG_RESET | IWN_DEBUG_XMIT,
6910 "%s: rxchainmask=0x%x, nrxchains=%d\n",
6915 sc->rxon->flags |= htole32(iwn_get_rxon_ht_flags(sc, ic->ic_curchan));
6917 DPRINTF(sc, IWN_DEBUG_RESET,
6918 "%s: setting configuration; flags=0x%08x\n",
6919 __func__, le32toh(sc->rxon->flags));
6920 if ((error = iwn_send_rxon(sc, 0, 0)) != 0) {
6921 device_printf(sc->sc_dev, "%s: could not send RXON\n",
6926 if ((error = iwn_set_critical_temp(sc)) != 0) {
6927 device_printf(sc->sc_dev,
6928 "%s: could not set critical temperature\n", __func__);
6932 /* Set power saving level to CAM during initialization. */
6933 if ((error = iwn_set_pslevel(sc, 0, 0, 0)) != 0) {
6934 device_printf(sc->sc_dev,
6935 "%s: could not set power saving level\n", __func__);
6939 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
6945 iwn_get_active_dwell_time(struct iwn_softc *sc,
6946 struct ieee80211_channel *c, uint8_t n_probes)
6948 /* No channel? Default to 2GHz settings */
6949 if (c == NULL || IEEE80211_IS_CHAN_2GHZ(c)) {
6950 return (IWN_ACTIVE_DWELL_TIME_2GHZ +
6951 IWN_ACTIVE_DWELL_FACTOR_2GHZ * (n_probes + 1));
6954 /* 5GHz dwell time */
6955 return (IWN_ACTIVE_DWELL_TIME_5GHZ +
6956 IWN_ACTIVE_DWELL_FACTOR_5GHZ * (n_probes + 1));
6960 * Limit the total dwell time to 85% of the beacon interval.
6962 * Returns the dwell time in milliseconds.
6965 iwn_limit_dwell(struct iwn_softc *sc, uint16_t dwell_time)
6967 struct ieee80211com *ic = &sc->sc_ic;
6968 struct ieee80211vap *vap = NULL;
6971 /* bintval is in TU (1.024mS) */
6972 if (! TAILQ_EMPTY(&ic->ic_vaps)) {
6973 vap = TAILQ_FIRST(&ic->ic_vaps);
6974 bintval = vap->iv_bss->ni_intval;
6978 * If it's non-zero, we should calculate the minimum of
6979 * it and the DWELL_BASE.
6981 * XXX Yes, the math should take into account that bintval
6982 * is 1.024mS, not 1mS..
6985 DPRINTF(sc, IWN_DEBUG_SCAN,
6989 return (MIN(IWN_PASSIVE_DWELL_BASE, ((bintval * 85) / 100)));
6992 /* No association context? Default */
6993 return (IWN_PASSIVE_DWELL_BASE);
6997 iwn_get_passive_dwell_time(struct iwn_softc *sc, struct ieee80211_channel *c)
7001 if (c == NULL || IEEE80211_IS_CHAN_2GHZ(c)) {
7002 passive = IWN_PASSIVE_DWELL_BASE + IWN_PASSIVE_DWELL_TIME_2GHZ;
7004 passive = IWN_PASSIVE_DWELL_BASE + IWN_PASSIVE_DWELL_TIME_5GHZ;
7007 /* Clamp to the beacon interval if we're associated */
7008 return (iwn_limit_dwell(sc, passive));
7012 iwn_scan(struct iwn_softc *sc, struct ieee80211vap *vap,
7013 struct ieee80211_scan_state *ss, struct ieee80211_channel *c)
7015 struct ieee80211com *ic = &sc->sc_ic;
7016 struct ieee80211_node *ni = vap->iv_bss;
7017 struct iwn_scan_hdr *hdr;
7018 struct iwn_cmd_data *tx;
7019 struct iwn_scan_essid *essid;
7020 struct iwn_scan_chan *chan;
7021 struct ieee80211_frame *wh;
7022 struct ieee80211_rateset *rs;
7028 uint16_t dwell_active, dwell_passive;
7029 uint32_t extra, scan_service_time;
7031 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
7034 * We are absolutely not allowed to send a scan command when another
7035 * scan command is pending.
7037 if (sc->sc_is_scanning) {
7038 device_printf(sc->sc_dev, "%s: called whilst scanning!\n",
7043 /* Assign the scan channel */
7046 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX];
7047 buf = malloc(IWN_SCAN_MAXSZ, M_DEVBUF, M_NOWAIT | M_ZERO);
7049 device_printf(sc->sc_dev,
7050 "%s: could not allocate buffer for scan command\n",
7054 hdr = (struct iwn_scan_hdr *)buf;
7056 * Move to the next channel if no frames are received within 10ms
7057 * after sending the probe request.
7059 hdr->quiet_time = htole16(10); /* timeout in milliseconds */
7060 hdr->quiet_threshold = htole16(1); /* min # of packets */
7062 * Max needs to be greater than active and passive and quiet!
7063 * It's also in microseconds!
7065 hdr->max_svc = htole32(250 * 1024);
7068 * Reset scan: interval=100
7069 * Normal scan: interval=becaon interval
7070 * suspend_time: 100 (TU)
7073 extra = (100 /* suspend_time */ / 100 /* beacon interval */) << 22;
7074 //scan_service_time = extra | ((100 /* susp */ % 100 /* int */) * 1024);
7075 scan_service_time = (4 << 22) | (100 * 1024); /* Hardcode for now! */
7076 hdr->pause_svc = htole32(scan_service_time);
7078 /* Select antennas for scanning. */
7080 IWN_RXCHAIN_VALID(sc->rxchainmask) |
7081 IWN_RXCHAIN_FORCE_MIMO_SEL(sc->rxchainmask) |
7082 IWN_RXCHAIN_DRIVER_FORCE;
7083 if (IEEE80211_IS_CHAN_A(c) &&
7084 sc->hw_type == IWN_HW_REV_TYPE_4965) {
7085 /* Ant A must be avoided in 5GHz because of an HW bug. */
7086 rxchain |= IWN_RXCHAIN_FORCE_SEL(IWN_ANT_B);
7087 } else /* Use all available RX antennas. */
7088 rxchain |= IWN_RXCHAIN_FORCE_SEL(sc->rxchainmask);
7089 hdr->rxchain = htole16(rxchain);
7090 hdr->filter = htole32(IWN_FILTER_MULTICAST | IWN_FILTER_BEACON);
7092 tx = (struct iwn_cmd_data *)(hdr + 1);
7093 tx->flags = htole32(IWN_TX_AUTO_SEQ);
7094 tx->id = sc->broadcast_id;
7095 tx->lifetime = htole32(IWN_LIFETIME_INFINITE);
7097 if (IEEE80211_IS_CHAN_5GHZ(c)) {
7098 /* Send probe requests at 6Mbps. */
7099 tx->rate = htole32(0xd);
7100 rs = &ic->ic_sup_rates[IEEE80211_MODE_11A];
7102 hdr->flags = htole32(IWN_RXON_24GHZ | IWN_RXON_AUTO);
7103 if (sc->hw_type == IWN_HW_REV_TYPE_4965 &&
7104 sc->rxon->associd && sc->rxon->chan > 14)
7105 tx->rate = htole32(0xd);
7107 /* Send probe requests at 1Mbps. */
7108 tx->rate = htole32(10 | IWN_RFLAG_CCK);
7110 rs = &ic->ic_sup_rates[IEEE80211_MODE_11G];
7112 /* Use the first valid TX antenna. */
7113 txant = IWN_LSB(sc->txchainmask);
7114 tx->rate |= htole32(IWN_RFLAG_ANT(txant));
7117 * Only do active scanning if we're announcing a probe request
7118 * for a given SSID (or more, if we ever add it to the driver.)
7123 * If we're scanning for a specific SSID, add it to the command.
7125 * XXX maybe look at adding support for scanning multiple SSIDs?
7127 essid = (struct iwn_scan_essid *)(tx + 1);
7129 if (ss->ss_ssid[0].len != 0) {
7130 essid[0].id = IEEE80211_ELEMID_SSID;
7131 essid[0].len = ss->ss_ssid[0].len;
7132 memcpy(essid[0].data, ss->ss_ssid[0].ssid, ss->ss_ssid[0].len);
7135 DPRINTF(sc, IWN_DEBUG_SCAN, "%s: ssid_len=%d, ssid=%*s\n",
7139 ss->ss_ssid[0].ssid);
7141 if (ss->ss_nssid > 0)
7146 * Build a probe request frame. Most of the following code is a
7147 * copy & paste of what is done in net80211.
7149 wh = (struct ieee80211_frame *)(essid + 20);
7150 wh->i_fc[0] = IEEE80211_FC0_VERSION_0 | IEEE80211_FC0_TYPE_MGT |
7151 IEEE80211_FC0_SUBTYPE_PROBE_REQ;
7152 wh->i_fc[1] = IEEE80211_FC1_DIR_NODS;
7153 IEEE80211_ADDR_COPY(wh->i_addr1, vap->iv_ifp->if_broadcastaddr);
7154 IEEE80211_ADDR_COPY(wh->i_addr2, IF_LLADDR(vap->iv_ifp));
7155 IEEE80211_ADDR_COPY(wh->i_addr3, vap->iv_ifp->if_broadcastaddr);
7156 *(uint16_t *)&wh->i_dur[0] = 0; /* filled by HW */
7157 *(uint16_t *)&wh->i_seq[0] = 0; /* filled by HW */
7159 frm = (uint8_t *)(wh + 1);
7160 frm = ieee80211_add_ssid(frm, NULL, 0);
7161 frm = ieee80211_add_rates(frm, rs);
7162 if (rs->rs_nrates > IEEE80211_RATE_SIZE)
7163 frm = ieee80211_add_xrates(frm, rs);
7164 if (ic->ic_htcaps & IEEE80211_HTC_HT)
7165 frm = ieee80211_add_htcap(frm, ni);
7167 /* Set length of probe request. */
7168 tx->len = htole16(frm - (uint8_t *)wh);
7171 * If active scanning is requested but a certain channel is
7172 * marked passive, we can do active scanning if we detect
7175 * There is an issue with some firmware versions that triggers
7176 * a sysassert on a "good CRC threshold" of zero (== disabled),
7177 * on a radar channel even though this means that we should NOT
7180 * The "good CRC threshold" is the number of frames that we
7181 * need to receive during our dwell time on a channel before
7182 * sending out probes -- setting this to a huge value will
7183 * mean we never reach it, but at the same time work around
7184 * the aforementioned issue. Thus use IWL_GOOD_CRC_TH_NEVER
7185 * here instead of IWL_GOOD_CRC_TH_DISABLED.
7187 * This was fixed in later versions along with some other
7188 * scan changes, and the threshold behaves as a flag in those
7193 * If we're doing active scanning, set the crc_threshold
7194 * to a suitable value. This is different to active veruss
7195 * passive scanning depending upon the channel flags; the
7196 * firmware will obey that particular check for us.
7198 if (sc->tlv_feature_flags & IWN_UCODE_TLV_FLAGS_NEWSCAN)
7199 hdr->crc_threshold = is_active ?
7200 IWN_GOOD_CRC_TH_DEFAULT : IWN_GOOD_CRC_TH_DISABLED;
7202 hdr->crc_threshold = is_active ?
7203 IWN_GOOD_CRC_TH_DEFAULT : IWN_GOOD_CRC_TH_NEVER;
7205 chan = (struct iwn_scan_chan *)frm;
7206 chan->chan = htole16(ieee80211_chan2ieee(ic, c));
7208 if (ss->ss_nssid > 0)
7209 chan->flags |= htole32(IWN_CHAN_NPBREQS(1));
7210 chan->dsp_gain = 0x6e;
7213 * Set the passive/active flag depending upon the channel mode.
7214 * XXX TODO: take the is_active flag into account as well?
7216 if (c->ic_flags & IEEE80211_CHAN_PASSIVE)
7217 chan->flags |= htole32(IWN_CHAN_PASSIVE);
7219 chan->flags |= htole32(IWN_CHAN_ACTIVE);
7222 * Calculate the active/passive dwell times.
7225 dwell_active = iwn_get_active_dwell_time(sc, c, ss->ss_nssid);
7226 dwell_passive = iwn_get_passive_dwell_time(sc, c);
7228 /* Make sure they're valid */
7229 if (dwell_passive <= dwell_active)
7230 dwell_passive = dwell_active + 1;
7232 chan->active = htole16(dwell_active);
7233 chan->passive = htole16(dwell_passive);
7235 if (IEEE80211_IS_CHAN_5GHZ(c))
7236 chan->rf_gain = 0x3b;
7238 chan->rf_gain = 0x28;
7240 DPRINTF(sc, IWN_DEBUG_STATE,
7241 "%s: chan %u flags 0x%x rf_gain 0x%x "
7242 "dsp_gain 0x%x active %d passive %d scan_svc_time %d crc 0x%x "
7243 "isactive=%d numssid=%d\n", __func__,
7244 chan->chan, chan->flags, chan->rf_gain, chan->dsp_gain,
7245 dwell_active, dwell_passive, scan_service_time,
7246 hdr->crc_threshold, is_active, ss->ss_nssid);
7250 buflen = (uint8_t *)chan - buf;
7251 hdr->len = htole16(buflen);
7253 if (sc->sc_is_scanning) {
7254 device_printf(sc->sc_dev,
7255 "%s: called with is_scanning set!\n",
7258 sc->sc_is_scanning = 1;
7260 DPRINTF(sc, IWN_DEBUG_STATE, "sending scan command nchan=%d\n",
7262 error = iwn_cmd(sc, IWN_CMD_SCAN, buf, buflen, 1);
7263 free(buf, M_DEVBUF);
7265 callout_reset(&sc->scan_timeout, 5*hz, iwn_scan_timeout, sc);
7267 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
7273 iwn_auth(struct iwn_softc *sc, struct ieee80211vap *vap)
7275 struct ieee80211com *ic = &sc->sc_ic;
7276 struct ieee80211_node *ni = vap->iv_bss;
7279 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
7281 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX];
7282 /* Update adapter configuration. */
7283 IEEE80211_ADDR_COPY(sc->rxon->bssid, ni->ni_bssid);
7284 sc->rxon->chan = ieee80211_chan2ieee(ic, ni->ni_chan);
7285 sc->rxon->flags = htole32(IWN_RXON_TSF | IWN_RXON_CTS_TO_SELF);
7286 if (IEEE80211_IS_CHAN_2GHZ(ni->ni_chan))
7287 sc->rxon->flags |= htole32(IWN_RXON_AUTO | IWN_RXON_24GHZ);
7288 if (ic->ic_flags & IEEE80211_F_SHSLOT)
7289 sc->rxon->flags |= htole32(IWN_RXON_SHSLOT);
7290 if (ic->ic_flags & IEEE80211_F_SHPREAMBLE)
7291 sc->rxon->flags |= htole32(IWN_RXON_SHPREAMBLE);
7292 if (IEEE80211_IS_CHAN_A(ni->ni_chan)) {
7293 sc->rxon->cck_mask = 0;
7294 sc->rxon->ofdm_mask = 0x15;
7295 } else if (IEEE80211_IS_CHAN_B(ni->ni_chan)) {
7296 sc->rxon->cck_mask = 0x03;
7297 sc->rxon->ofdm_mask = 0;
7299 /* Assume 802.11b/g. */
7300 sc->rxon->cck_mask = 0x03;
7301 sc->rxon->ofdm_mask = 0x15;
7305 sc->rxon->flags |= htole32(iwn_get_rxon_ht_flags(sc, ic->ic_curchan));
7307 DPRINTF(sc, IWN_DEBUG_STATE, "rxon chan %d flags %x cck %x ofdm %x\n",
7308 sc->rxon->chan, sc->rxon->flags, sc->rxon->cck_mask,
7309 sc->rxon->ofdm_mask);
7311 if ((error = iwn_send_rxon(sc, 0, 1)) != 0) {
7312 device_printf(sc->sc_dev, "%s: could not send RXON\n",
7317 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
7323 iwn_run(struct iwn_softc *sc, struct ieee80211vap *vap)
7325 struct iwn_ops *ops = &sc->ops;
7326 struct ieee80211com *ic = &sc->sc_ic;
7327 struct ieee80211_node *ni = vap->iv_bss;
7328 struct iwn_node_info node;
7331 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
7333 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX];
7334 if (ic->ic_opmode == IEEE80211_M_MONITOR) {
7335 /* Link LED blinks while monitoring. */
7336 iwn_set_led(sc, IWN_LED_LINK, 5, 5);
7339 if ((error = iwn_set_timing(sc, ni)) != 0) {
7340 device_printf(sc->sc_dev,
7341 "%s: could not set timing, error %d\n", __func__, error);
7345 /* Update adapter configuration. */
7346 IEEE80211_ADDR_COPY(sc->rxon->bssid, ni->ni_bssid);
7347 sc->rxon->associd = htole16(IEEE80211_AID(ni->ni_associd));
7348 sc->rxon->chan = ieee80211_chan2ieee(ic, ni->ni_chan);
7349 sc->rxon->flags = htole32(IWN_RXON_TSF | IWN_RXON_CTS_TO_SELF);
7350 if (IEEE80211_IS_CHAN_2GHZ(ni->ni_chan))
7351 sc->rxon->flags |= htole32(IWN_RXON_AUTO | IWN_RXON_24GHZ);
7352 if (ic->ic_flags & IEEE80211_F_SHSLOT)
7353 sc->rxon->flags |= htole32(IWN_RXON_SHSLOT);
7354 if (ic->ic_flags & IEEE80211_F_SHPREAMBLE)
7355 sc->rxon->flags |= htole32(IWN_RXON_SHPREAMBLE);
7356 if (IEEE80211_IS_CHAN_A(ni->ni_chan)) {
7357 sc->rxon->cck_mask = 0;
7358 sc->rxon->ofdm_mask = 0x15;
7359 } else if (IEEE80211_IS_CHAN_B(ni->ni_chan)) {
7360 sc->rxon->cck_mask = 0x03;
7361 sc->rxon->ofdm_mask = 0;
7363 /* Assume 802.11b/g. */
7364 sc->rxon->cck_mask = 0x0f;
7365 sc->rxon->ofdm_mask = 0x15;
7368 sc->rxon->flags |= htole32(iwn_get_rxon_ht_flags(sc, ni->ni_chan));
7369 sc->rxon->filter |= htole32(IWN_FILTER_BSS);
7370 DPRINTF(sc, IWN_DEBUG_STATE, "rxon chan %d flags %x, curhtprotmode=%d\n",
7371 sc->rxon->chan, le32toh(sc->rxon->flags), ic->ic_curhtprotmode);
7373 if ((error = iwn_send_rxon(sc, 0, 1)) != 0) {
7374 device_printf(sc->sc_dev, "%s: could not send RXON\n",
7379 /* Fake a join to initialize the TX rate. */
7380 ((struct iwn_node *)ni)->id = IWN_ID_BSS;
7381 iwn_newassoc(ni, 1);
7384 memset(&node, 0, sizeof node);
7385 IEEE80211_ADDR_COPY(node.macaddr, ni->ni_macaddr);
7386 node.id = IWN_ID_BSS;
7387 if (IEEE80211_IS_CHAN_HT(ni->ni_chan)) {
7388 switch (ni->ni_htcap & IEEE80211_HTCAP_SMPS) {
7389 case IEEE80211_HTCAP_SMPS_ENA:
7390 node.htflags |= htole32(IWN_SMPS_MIMO_DIS);
7392 case IEEE80211_HTCAP_SMPS_DYNAMIC:
7393 node.htflags |= htole32(IWN_SMPS_MIMO_PROT);
7396 node.htflags |= htole32(IWN_AMDPU_SIZE_FACTOR(3) |
7397 IWN_AMDPU_DENSITY(5)); /* 4us */
7398 if (IEEE80211_IS_CHAN_HT40(ni->ni_chan))
7399 node.htflags |= htole32(IWN_NODE_HT40);
7401 DPRINTF(sc, IWN_DEBUG_STATE, "%s: adding BSS node\n", __func__);
7402 error = ops->add_node(sc, &node, 1);
7404 device_printf(sc->sc_dev,
7405 "%s: could not add BSS node, error %d\n", __func__, error);
7408 DPRINTF(sc, IWN_DEBUG_STATE, "%s: setting link quality for node %d\n",
7410 if ((error = iwn_set_link_quality(sc, ni)) != 0) {
7411 device_printf(sc->sc_dev,
7412 "%s: could not setup link quality for node %d, error %d\n",
7413 __func__, node.id, error);
7417 if ((error = iwn_init_sensitivity(sc)) != 0) {
7418 device_printf(sc->sc_dev,
7419 "%s: could not set sensitivity, error %d\n", __func__,
7423 /* Start periodic calibration timer. */
7424 sc->calib.state = IWN_CALIB_STATE_ASSOC;
7426 callout_reset(&sc->calib_to, msecs_to_ticks(500), iwn_calib_timeout,
7429 /* Link LED always on while associated. */
7430 iwn_set_led(sc, IWN_LED_LINK, 0, 1);
7432 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
7438 * This function is called by upper layer when an ADDBA request is received
7439 * from another STA and before the ADDBA response is sent.
7442 iwn_ampdu_rx_start(struct ieee80211_node *ni, struct ieee80211_rx_ampdu *rap,
7443 int baparamset, int batimeout, int baseqctl)
7445 #define MS(_v, _f) (((_v) & _f) >> _f##_S)
7446 struct iwn_softc *sc = ni->ni_ic->ic_softc;
7447 struct iwn_ops *ops = &sc->ops;
7448 struct iwn_node *wn = (void *)ni;
7449 struct iwn_node_info node;
7454 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7456 tid = MS(le16toh(baparamset), IEEE80211_BAPS_TID);
7457 ssn = MS(le16toh(baseqctl), IEEE80211_BASEQ_START);
7459 if (wn->id == IWN_ID_UNDEFINED)
7462 memset(&node, 0, sizeof node);
7464 node.control = IWN_NODE_UPDATE;
7465 node.flags = IWN_FLAG_SET_ADDBA;
7466 node.addba_tid = tid;
7467 node.addba_ssn = htole16(ssn);
7468 DPRINTF(sc, IWN_DEBUG_RECV, "ADDBA RA=%d TID=%d SSN=%d\n",
7470 error = ops->add_node(sc, &node, 1);
7473 return sc->sc_ampdu_rx_start(ni, rap, baparamset, batimeout, baseqctl);
7478 * This function is called by upper layer on teardown of an HT-immediate
7479 * Block Ack agreement (eg. uppon receipt of a DELBA frame).
7482 iwn_ampdu_rx_stop(struct ieee80211_node *ni, struct ieee80211_rx_ampdu *rap)
7484 struct ieee80211com *ic = ni->ni_ic;
7485 struct iwn_softc *sc = ic->ic_softc;
7486 struct iwn_ops *ops = &sc->ops;
7487 struct iwn_node *wn = (void *)ni;
7488 struct iwn_node_info node;
7491 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7493 if (wn->id == IWN_ID_UNDEFINED)
7496 /* XXX: tid as an argument */
7497 for (tid = 0; tid < WME_NUM_TID; tid++) {
7498 if (&ni->ni_rx_ampdu[tid] == rap)
7502 memset(&node, 0, sizeof node);
7504 node.control = IWN_NODE_UPDATE;
7505 node.flags = IWN_FLAG_SET_DELBA;
7506 node.delba_tid = tid;
7507 DPRINTF(sc, IWN_DEBUG_RECV, "DELBA RA=%d TID=%d\n", wn->id, tid);
7508 (void)ops->add_node(sc, &node, 1);
7510 sc->sc_ampdu_rx_stop(ni, rap);
7514 iwn_addba_request(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap,
7515 int dialogtoken, int baparamset, int batimeout)
7517 struct iwn_softc *sc = ni->ni_ic->ic_softc;
7520 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7522 for (qid = sc->firstaggqueue; qid < sc->ntxqs; qid++) {
7523 if (sc->qid2tap[qid] == NULL)
7526 if (qid == sc->ntxqs) {
7527 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: not free aggregation queue\n",
7531 tap->txa_private = malloc(sizeof(int), M_DEVBUF, M_NOWAIT);
7532 if (tap->txa_private == NULL) {
7533 device_printf(sc->sc_dev,
7534 "%s: failed to alloc TX aggregation structure\n", __func__);
7537 sc->qid2tap[qid] = tap;
7538 *(int *)tap->txa_private = qid;
7539 return sc->sc_addba_request(ni, tap, dialogtoken, baparamset,
7544 iwn_addba_response(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap,
7545 int code, int baparamset, int batimeout)
7547 struct iwn_softc *sc = ni->ni_ic->ic_softc;
7548 int qid = *(int *)tap->txa_private;
7549 uint8_t tid = tap->txa_tid;
7552 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7554 if (code == IEEE80211_STATUS_SUCCESS) {
7555 ni->ni_txseqs[tid] = tap->txa_start & 0xfff;
7556 ret = iwn_ampdu_tx_start(ni->ni_ic, ni, tid);
7560 sc->qid2tap[qid] = NULL;
7561 free(tap->txa_private, M_DEVBUF);
7562 tap->txa_private = NULL;
7564 return sc->sc_addba_response(ni, tap, code, baparamset, batimeout);
7568 * This function is called by upper layer when an ADDBA response is received
7572 iwn_ampdu_tx_start(struct ieee80211com *ic, struct ieee80211_node *ni,
7575 struct ieee80211_tx_ampdu *tap = &ni->ni_tx_ampdu[tid];
7576 struct iwn_softc *sc = ni->ni_ic->ic_softc;
7577 struct iwn_ops *ops = &sc->ops;
7578 struct iwn_node *wn = (void *)ni;
7579 struct iwn_node_info node;
7582 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7584 if (wn->id == IWN_ID_UNDEFINED)
7587 /* Enable TX for the specified RA/TID. */
7588 wn->disable_tid &= ~(1 << tid);
7589 memset(&node, 0, sizeof node);
7591 node.control = IWN_NODE_UPDATE;
7592 node.flags = IWN_FLAG_SET_DISABLE_TID;
7593 node.disable_tid = htole16(wn->disable_tid);
7594 error = ops->add_node(sc, &node, 1);
7598 if ((error = iwn_nic_lock(sc)) != 0)
7600 qid = *(int *)tap->txa_private;
7601 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: ra=%d tid=%d ssn=%d qid=%d\n",
7602 __func__, wn->id, tid, tap->txa_start, qid);
7603 ops->ampdu_tx_start(sc, ni, qid, tid, tap->txa_start & 0xfff);
7606 iwn_set_link_quality(sc, ni);
7611 iwn_ampdu_tx_stop(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap)
7613 struct iwn_softc *sc = ni->ni_ic->ic_softc;
7614 struct iwn_ops *ops = &sc->ops;
7615 uint8_t tid = tap->txa_tid;
7618 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7620 sc->sc_addba_stop(ni, tap);
7622 if (tap->txa_private == NULL)
7625 qid = *(int *)tap->txa_private;
7626 if (sc->txq[qid].queued != 0)
7628 if (iwn_nic_lock(sc) != 0)
7630 ops->ampdu_tx_stop(sc, qid, tid, tap->txa_start & 0xfff);
7632 sc->qid2tap[qid] = NULL;
7633 free(tap->txa_private, M_DEVBUF);
7634 tap->txa_private = NULL;
7638 iwn4965_ampdu_tx_start(struct iwn_softc *sc, struct ieee80211_node *ni,
7639 int qid, uint8_t tid, uint16_t ssn)
7641 struct iwn_node *wn = (void *)ni;
7643 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7645 /* Stop TX scheduler while we're changing its configuration. */
7646 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid),
7647 IWN4965_TXQ_STATUS_CHGACT);
7649 /* Assign RA/TID translation to the queue. */
7650 iwn_mem_write_2(sc, sc->sched_base + IWN4965_SCHED_TRANS_TBL(qid),
7653 /* Enable chain-building mode for the queue. */
7654 iwn_prph_setbits(sc, IWN4965_SCHED_QCHAIN_SEL, 1 << qid);
7656 /* Set starting sequence number from the ADDBA request. */
7657 sc->txq[qid].cur = sc->txq[qid].read = (ssn & 0xff);
7658 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | (ssn & 0xff));
7659 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_RDPTR(qid), ssn);
7661 /* Set scheduler window size. */
7662 iwn_mem_write(sc, sc->sched_base + IWN4965_SCHED_QUEUE_OFFSET(qid),
7664 /* Set scheduler frame limit. */
7665 iwn_mem_write(sc, sc->sched_base + IWN4965_SCHED_QUEUE_OFFSET(qid) + 4,
7666 IWN_SCHED_LIMIT << 16);
7668 /* Enable interrupts for the queue. */
7669 iwn_prph_setbits(sc, IWN4965_SCHED_INTR_MASK, 1 << qid);
7671 /* Mark the queue as active. */
7672 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid),
7673 IWN4965_TXQ_STATUS_ACTIVE | IWN4965_TXQ_STATUS_AGGR_ENA |
7674 iwn_tid2fifo[tid] << 1);
7678 iwn4965_ampdu_tx_stop(struct iwn_softc *sc, int qid, uint8_t tid, uint16_t ssn)
7680 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7682 /* Stop TX scheduler while we're changing its configuration. */
7683 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid),
7684 IWN4965_TXQ_STATUS_CHGACT);
7686 /* Set starting sequence number from the ADDBA request. */
7687 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | (ssn & 0xff));
7688 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_RDPTR(qid), ssn);
7690 /* Disable interrupts for the queue. */
7691 iwn_prph_clrbits(sc, IWN4965_SCHED_INTR_MASK, 1 << qid);
7693 /* Mark the queue as inactive. */
7694 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid),
7695 IWN4965_TXQ_STATUS_INACTIVE | iwn_tid2fifo[tid] << 1);
7699 iwn5000_ampdu_tx_start(struct iwn_softc *sc, struct ieee80211_node *ni,
7700 int qid, uint8_t tid, uint16_t ssn)
7702 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7704 struct iwn_node *wn = (void *)ni;
7706 /* Stop TX scheduler while we're changing its configuration. */
7707 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
7708 IWN5000_TXQ_STATUS_CHGACT);
7710 /* Assign RA/TID translation to the queue. */
7711 iwn_mem_write_2(sc, sc->sched_base + IWN5000_SCHED_TRANS_TBL(qid),
7714 /* Enable chain-building mode for the queue. */
7715 iwn_prph_setbits(sc, IWN5000_SCHED_QCHAIN_SEL, 1 << qid);
7717 /* Enable aggregation for the queue. */
7718 iwn_prph_setbits(sc, IWN5000_SCHED_AGGR_SEL, 1 << qid);
7720 /* Set starting sequence number from the ADDBA request. */
7721 sc->txq[qid].cur = sc->txq[qid].read = (ssn & 0xff);
7722 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | (ssn & 0xff));
7723 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_RDPTR(qid), ssn);
7725 /* Set scheduler window size and frame limit. */
7726 iwn_mem_write(sc, sc->sched_base + IWN5000_SCHED_QUEUE_OFFSET(qid) + 4,
7727 IWN_SCHED_LIMIT << 16 | IWN_SCHED_WINSZ);
7729 /* Enable interrupts for the queue. */
7730 iwn_prph_setbits(sc, IWN5000_SCHED_INTR_MASK, 1 << qid);
7732 /* Mark the queue as active. */
7733 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
7734 IWN5000_TXQ_STATUS_ACTIVE | iwn_tid2fifo[tid]);
7738 iwn5000_ampdu_tx_stop(struct iwn_softc *sc, int qid, uint8_t tid, uint16_t ssn)
7740 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7742 /* Stop TX scheduler while we're changing its configuration. */
7743 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
7744 IWN5000_TXQ_STATUS_CHGACT);
7746 /* Disable aggregation for the queue. */
7747 iwn_prph_clrbits(sc, IWN5000_SCHED_AGGR_SEL, 1 << qid);
7749 /* Set starting sequence number from the ADDBA request. */
7750 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | (ssn & 0xff));
7751 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_RDPTR(qid), ssn);
7753 /* Disable interrupts for the queue. */
7754 iwn_prph_clrbits(sc, IWN5000_SCHED_INTR_MASK, 1 << qid);
7756 /* Mark the queue as inactive. */
7757 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
7758 IWN5000_TXQ_STATUS_INACTIVE | iwn_tid2fifo[tid]);
7762 * Query calibration tables from the initialization firmware. We do this
7763 * only once at first boot. Called from a process context.
7766 iwn5000_query_calibration(struct iwn_softc *sc)
7768 struct iwn5000_calib_config cmd;
7771 memset(&cmd, 0, sizeof cmd);
7772 cmd.ucode.once.enable = htole32(0xffffffff);
7773 cmd.ucode.once.start = htole32(0xffffffff);
7774 cmd.ucode.once.send = htole32(0xffffffff);
7775 cmd.ucode.flags = htole32(0xffffffff);
7776 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: sending calibration query\n",
7778 error = iwn_cmd(sc, IWN5000_CMD_CALIB_CONFIG, &cmd, sizeof cmd, 0);
7782 /* Wait at most two seconds for calibration to complete. */
7783 if (!(sc->sc_flags & IWN_FLAG_CALIB_DONE))
7784 error = msleep(sc, &sc->sc_mtx, PCATCH, "iwncal", 2 * hz);
7789 * Send calibration results to the runtime firmware. These results were
7790 * obtained on first boot from the initialization firmware.
7793 iwn5000_send_calibration(struct iwn_softc *sc)
7797 for (idx = 0; idx < IWN5000_PHY_CALIB_MAX_RESULT; idx++) {
7798 if (!(sc->base_params->calib_need & (1<<idx))) {
7799 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
7800 "No need of calib %d\n",
7802 continue; /* no need for this calib */
7804 if (sc->calibcmd[idx].buf == NULL) {
7805 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
7806 "Need calib idx : %d but no available data\n",
7811 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
7812 "send calibration result idx=%d len=%d\n", idx,
7813 sc->calibcmd[idx].len);
7814 error = iwn_cmd(sc, IWN_CMD_PHY_CALIB, sc->calibcmd[idx].buf,
7815 sc->calibcmd[idx].len, 0);
7817 device_printf(sc->sc_dev,
7818 "%s: could not send calibration result, error %d\n",
7827 iwn5000_send_wimax_coex(struct iwn_softc *sc)
7829 struct iwn5000_wimax_coex wimax;
7832 if (sc->hw_type == IWN_HW_REV_TYPE_6050) {
7833 /* Enable WiMAX coexistence for combo adapters. */
7835 IWN_WIMAX_COEX_ASSOC_WA_UNMASK |
7836 IWN_WIMAX_COEX_UNASSOC_WA_UNMASK |
7837 IWN_WIMAX_COEX_STA_TABLE_VALID |
7838 IWN_WIMAX_COEX_ENABLE;
7839 memcpy(wimax.events, iwn6050_wimax_events,
7840 sizeof iwn6050_wimax_events);
7844 /* Disable WiMAX coexistence. */
7846 memset(wimax.events, 0, sizeof wimax.events);
7848 DPRINTF(sc, IWN_DEBUG_RESET, "%s: Configuring WiMAX coexistence\n",
7850 return iwn_cmd(sc, IWN5000_CMD_WIMAX_COEX, &wimax, sizeof wimax, 0);
7854 iwn5000_crystal_calib(struct iwn_softc *sc)
7856 struct iwn5000_phy_calib_crystal cmd;
7858 memset(&cmd, 0, sizeof cmd);
7859 cmd.code = IWN5000_PHY_CALIB_CRYSTAL;
7862 cmd.cap_pin[0] = le32toh(sc->eeprom_crystal) & 0xff;
7863 cmd.cap_pin[1] = (le32toh(sc->eeprom_crystal) >> 16) & 0xff;
7864 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "sending crystal calibration %d, %d\n",
7865 cmd.cap_pin[0], cmd.cap_pin[1]);
7866 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 0);
7870 iwn5000_temp_offset_calib(struct iwn_softc *sc)
7872 struct iwn5000_phy_calib_temp_offset cmd;
7874 memset(&cmd, 0, sizeof cmd);
7875 cmd.code = IWN5000_PHY_CALIB_TEMP_OFFSET;
7878 if (sc->eeprom_temp != 0)
7879 cmd.offset = htole16(sc->eeprom_temp);
7881 cmd.offset = htole16(IWN_DEFAULT_TEMP_OFFSET);
7882 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "setting radio sensor offset to %d\n",
7883 le16toh(cmd.offset));
7884 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 0);
7888 iwn5000_temp_offset_calibv2(struct iwn_softc *sc)
7890 struct iwn5000_phy_calib_temp_offsetv2 cmd;
7892 memset(&cmd, 0, sizeof cmd);
7893 cmd.code = IWN5000_PHY_CALIB_TEMP_OFFSET;
7896 if (sc->eeprom_temp != 0) {
7897 cmd.offset_low = htole16(sc->eeprom_temp);
7898 cmd.offset_high = htole16(sc->eeprom_temp_high);
7900 cmd.offset_low = htole16(IWN_DEFAULT_TEMP_OFFSET);
7901 cmd.offset_high = htole16(IWN_DEFAULT_TEMP_OFFSET);
7903 cmd.burnt_voltage_ref = htole16(sc->eeprom_voltage);
7905 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
7906 "setting radio sensor low offset to %d, high offset to %d, voltage to %d\n",
7907 le16toh(cmd.offset_low),
7908 le16toh(cmd.offset_high),
7909 le16toh(cmd.burnt_voltage_ref));
7911 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 0);
7915 * This function is called after the runtime firmware notifies us of its
7916 * readiness (called in a process context).
7919 iwn4965_post_alive(struct iwn_softc *sc)
7923 if ((error = iwn_nic_lock(sc)) != 0)
7926 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7928 /* Clear TX scheduler state in SRAM. */
7929 sc->sched_base = iwn_prph_read(sc, IWN_SCHED_SRAM_ADDR);
7930 iwn_mem_set_region_4(sc, sc->sched_base + IWN4965_SCHED_CTX_OFF, 0,
7931 IWN4965_SCHED_CTX_LEN / sizeof (uint32_t));
7933 /* Set physical address of TX scheduler rings (1KB aligned). */
7934 iwn_prph_write(sc, IWN4965_SCHED_DRAM_ADDR, sc->sched_dma.paddr >> 10);
7936 IWN_SETBITS(sc, IWN_FH_TX_CHICKEN, IWN_FH_TX_CHICKEN_SCHED_RETRY);
7938 /* Disable chain mode for all our 16 queues. */
7939 iwn_prph_write(sc, IWN4965_SCHED_QCHAIN_SEL, 0);
7941 for (qid = 0; qid < IWN4965_NTXQUEUES; qid++) {
7942 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_RDPTR(qid), 0);
7943 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | 0);
7945 /* Set scheduler window size. */
7946 iwn_mem_write(sc, sc->sched_base +
7947 IWN4965_SCHED_QUEUE_OFFSET(qid), IWN_SCHED_WINSZ);
7948 /* Set scheduler frame limit. */
7949 iwn_mem_write(sc, sc->sched_base +
7950 IWN4965_SCHED_QUEUE_OFFSET(qid) + 4,
7951 IWN_SCHED_LIMIT << 16);
7954 /* Enable interrupts for all our 16 queues. */
7955 iwn_prph_write(sc, IWN4965_SCHED_INTR_MASK, 0xffff);
7956 /* Identify TX FIFO rings (0-7). */
7957 iwn_prph_write(sc, IWN4965_SCHED_TXFACT, 0xff);
7959 /* Mark TX rings (4 EDCA + cmd + 2 HCCA) as active. */
7960 for (qid = 0; qid < 7; qid++) {
7961 static uint8_t qid2fifo[] = { 3, 2, 1, 0, 4, 5, 6 };
7962 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid),
7963 IWN4965_TXQ_STATUS_ACTIVE | qid2fifo[qid] << 1);
7970 * This function is called after the initialization or runtime firmware
7971 * notifies us of its readiness (called in a process context).
7974 iwn5000_post_alive(struct iwn_softc *sc)
7978 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
7980 /* Switch to using ICT interrupt mode. */
7981 iwn5000_ict_reset(sc);
7983 if ((error = iwn_nic_lock(sc)) != 0){
7984 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end in error\n", __func__);
7988 /* Clear TX scheduler state in SRAM. */
7989 sc->sched_base = iwn_prph_read(sc, IWN_SCHED_SRAM_ADDR);
7990 iwn_mem_set_region_4(sc, sc->sched_base + IWN5000_SCHED_CTX_OFF, 0,
7991 IWN5000_SCHED_CTX_LEN / sizeof (uint32_t));
7993 /* Set physical address of TX scheduler rings (1KB aligned). */
7994 iwn_prph_write(sc, IWN5000_SCHED_DRAM_ADDR, sc->sched_dma.paddr >> 10);
7996 IWN_SETBITS(sc, IWN_FH_TX_CHICKEN, IWN_FH_TX_CHICKEN_SCHED_RETRY);
7998 /* Enable chain mode for all queues, except command queue. */
7999 if (sc->sc_flags & IWN_FLAG_PAN_SUPPORT)
8000 iwn_prph_write(sc, IWN5000_SCHED_QCHAIN_SEL, 0xfffdf);
8002 iwn_prph_write(sc, IWN5000_SCHED_QCHAIN_SEL, 0xfffef);
8003 iwn_prph_write(sc, IWN5000_SCHED_AGGR_SEL, 0);
8005 for (qid = 0; qid < IWN5000_NTXQUEUES; qid++) {
8006 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_RDPTR(qid), 0);
8007 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | 0);
8009 iwn_mem_write(sc, sc->sched_base +
8010 IWN5000_SCHED_QUEUE_OFFSET(qid), 0);
8011 /* Set scheduler window size and frame limit. */
8012 iwn_mem_write(sc, sc->sched_base +
8013 IWN5000_SCHED_QUEUE_OFFSET(qid) + 4,
8014 IWN_SCHED_LIMIT << 16 | IWN_SCHED_WINSZ);
8017 /* Enable interrupts for all our 20 queues. */
8018 iwn_prph_write(sc, IWN5000_SCHED_INTR_MASK, 0xfffff);
8019 /* Identify TX FIFO rings (0-7). */
8020 iwn_prph_write(sc, IWN5000_SCHED_TXFACT, 0xff);
8022 /* Mark TX rings (4 EDCA + cmd + 2 HCCA) as active. */
8023 if (sc->sc_flags & IWN_FLAG_PAN_SUPPORT) {
8024 /* Mark TX rings as active. */
8025 for (qid = 0; qid < 11; qid++) {
8026 static uint8_t qid2fifo[] = { 3, 2, 1, 0, 0, 4, 2, 5, 4, 7, 5 };
8027 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
8028 IWN5000_TXQ_STATUS_ACTIVE | qid2fifo[qid]);
8031 /* Mark TX rings (4 EDCA + cmd + 2 HCCA) as active. */
8032 for (qid = 0; qid < 7; qid++) {
8033 static uint8_t qid2fifo[] = { 3, 2, 1, 0, 7, 5, 6 };
8034 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
8035 IWN5000_TXQ_STATUS_ACTIVE | qid2fifo[qid]);
8040 /* Configure WiMAX coexistence for combo adapters. */
8041 error = iwn5000_send_wimax_coex(sc);
8043 device_printf(sc->sc_dev,
8044 "%s: could not configure WiMAX coexistence, error %d\n",
8048 if (sc->hw_type != IWN_HW_REV_TYPE_5150) {
8049 /* Perform crystal calibration. */
8050 error = iwn5000_crystal_calib(sc);
8052 device_printf(sc->sc_dev,
8053 "%s: crystal calibration failed, error %d\n",
8058 if (!(sc->sc_flags & IWN_FLAG_CALIB_DONE)) {
8059 /* Query calibration from the initialization firmware. */
8060 if ((error = iwn5000_query_calibration(sc)) != 0) {
8061 device_printf(sc->sc_dev,
8062 "%s: could not query calibration, error %d\n",
8067 * We have the calibration results now, reboot with the
8068 * runtime firmware (call ourselves recursively!)
8071 error = iwn_hw_init(sc);
8073 /* Send calibration results to runtime firmware. */
8074 error = iwn5000_send_calibration(sc);
8077 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
8083 * The firmware boot code is small and is intended to be copied directly into
8084 * the NIC internal memory (no DMA transfer).
8087 iwn4965_load_bootcode(struct iwn_softc *sc, const uint8_t *ucode, int size)
8091 size /= sizeof (uint32_t);
8093 if ((error = iwn_nic_lock(sc)) != 0)
8096 /* Copy microcode image into NIC memory. */
8097 iwn_prph_write_region_4(sc, IWN_BSM_SRAM_BASE,
8098 (const uint32_t *)ucode, size);
8100 iwn_prph_write(sc, IWN_BSM_WR_MEM_SRC, 0);
8101 iwn_prph_write(sc, IWN_BSM_WR_MEM_DST, IWN_FW_TEXT_BASE);
8102 iwn_prph_write(sc, IWN_BSM_WR_DWCOUNT, size);
8104 /* Start boot load now. */
8105 iwn_prph_write(sc, IWN_BSM_WR_CTRL, IWN_BSM_WR_CTRL_START);
8107 /* Wait for transfer to complete. */
8108 for (ntries = 0; ntries < 1000; ntries++) {
8109 if (!(iwn_prph_read(sc, IWN_BSM_WR_CTRL) &
8110 IWN_BSM_WR_CTRL_START))
8114 if (ntries == 1000) {
8115 device_printf(sc->sc_dev, "%s: could not load boot firmware\n",
8121 /* Enable boot after power up. */
8122 iwn_prph_write(sc, IWN_BSM_WR_CTRL, IWN_BSM_WR_CTRL_START_EN);
8129 iwn4965_load_firmware(struct iwn_softc *sc)
8131 struct iwn_fw_info *fw = &sc->fw;
8132 struct iwn_dma_info *dma = &sc->fw_dma;
8135 /* Copy initialization sections into pre-allocated DMA-safe memory. */
8136 memcpy(dma->vaddr, fw->init.data, fw->init.datasz);
8137 bus_dmamap_sync(dma->tag, dma->map, BUS_DMASYNC_PREWRITE);
8138 memcpy(dma->vaddr + IWN4965_FW_DATA_MAXSZ,
8139 fw->init.text, fw->init.textsz);
8140 bus_dmamap_sync(dma->tag, dma->map, BUS_DMASYNC_PREWRITE);
8142 /* Tell adapter where to find initialization sections. */
8143 if ((error = iwn_nic_lock(sc)) != 0)
8145 iwn_prph_write(sc, IWN_BSM_DRAM_DATA_ADDR, dma->paddr >> 4);
8146 iwn_prph_write(sc, IWN_BSM_DRAM_DATA_SIZE, fw->init.datasz);
8147 iwn_prph_write(sc, IWN_BSM_DRAM_TEXT_ADDR,
8148 (dma->paddr + IWN4965_FW_DATA_MAXSZ) >> 4);
8149 iwn_prph_write(sc, IWN_BSM_DRAM_TEXT_SIZE, fw->init.textsz);
8152 /* Load firmware boot code. */
8153 error = iwn4965_load_bootcode(sc, fw->boot.text, fw->boot.textsz);
8155 device_printf(sc->sc_dev, "%s: could not load boot firmware\n",
8159 /* Now press "execute". */
8160 IWN_WRITE(sc, IWN_RESET, 0);
8162 /* Wait at most one second for first alive notification. */
8163 if ((error = msleep(sc, &sc->sc_mtx, PCATCH, "iwninit", hz)) != 0) {
8164 device_printf(sc->sc_dev,
8165 "%s: timeout waiting for adapter to initialize, error %d\n",
8170 /* Retrieve current temperature for initial TX power calibration. */
8171 sc->rawtemp = sc->ucode_info.temp[3].chan20MHz;
8172 sc->temp = iwn4965_get_temperature(sc);
8174 /* Copy runtime sections into pre-allocated DMA-safe memory. */
8175 memcpy(dma->vaddr, fw->main.data, fw->main.datasz);
8176 bus_dmamap_sync(dma->tag, dma->map, BUS_DMASYNC_PREWRITE);
8177 memcpy(dma->vaddr + IWN4965_FW_DATA_MAXSZ,
8178 fw->main.text, fw->main.textsz);
8179 bus_dmamap_sync(dma->tag, dma->map, BUS_DMASYNC_PREWRITE);
8181 /* Tell adapter where to find runtime sections. */
8182 if ((error = iwn_nic_lock(sc)) != 0)
8184 iwn_prph_write(sc, IWN_BSM_DRAM_DATA_ADDR, dma->paddr >> 4);
8185 iwn_prph_write(sc, IWN_BSM_DRAM_DATA_SIZE, fw->main.datasz);
8186 iwn_prph_write(sc, IWN_BSM_DRAM_TEXT_ADDR,
8187 (dma->paddr + IWN4965_FW_DATA_MAXSZ) >> 4);
8188 iwn_prph_write(sc, IWN_BSM_DRAM_TEXT_SIZE,
8189 IWN_FW_UPDATED | fw->main.textsz);
8196 iwn5000_load_firmware_section(struct iwn_softc *sc, uint32_t dst,
8197 const uint8_t *section, int size)
8199 struct iwn_dma_info *dma = &sc->fw_dma;
8202 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8204 /* Copy firmware section into pre-allocated DMA-safe memory. */
8205 memcpy(dma->vaddr, section, size);
8206 bus_dmamap_sync(dma->tag, dma->map, BUS_DMASYNC_PREWRITE);
8208 if ((error = iwn_nic_lock(sc)) != 0)
8211 IWN_WRITE(sc, IWN_FH_TX_CONFIG(IWN_SRVC_DMACHNL),
8212 IWN_FH_TX_CONFIG_DMA_PAUSE);
8214 IWN_WRITE(sc, IWN_FH_SRAM_ADDR(IWN_SRVC_DMACHNL), dst);
8215 IWN_WRITE(sc, IWN_FH_TFBD_CTRL0(IWN_SRVC_DMACHNL),
8216 IWN_LOADDR(dma->paddr));
8217 IWN_WRITE(sc, IWN_FH_TFBD_CTRL1(IWN_SRVC_DMACHNL),
8218 IWN_HIADDR(dma->paddr) << 28 | size);
8219 IWN_WRITE(sc, IWN_FH_TXBUF_STATUS(IWN_SRVC_DMACHNL),
8220 IWN_FH_TXBUF_STATUS_TBNUM(1) |
8221 IWN_FH_TXBUF_STATUS_TBIDX(1) |
8222 IWN_FH_TXBUF_STATUS_TFBD_VALID);
8224 /* Kick Flow Handler to start DMA transfer. */
8225 IWN_WRITE(sc, IWN_FH_TX_CONFIG(IWN_SRVC_DMACHNL),
8226 IWN_FH_TX_CONFIG_DMA_ENA | IWN_FH_TX_CONFIG_CIRQ_HOST_ENDTFD);
8230 /* Wait at most five seconds for FH DMA transfer to complete. */
8231 return msleep(sc, &sc->sc_mtx, PCATCH, "iwninit", 5 * hz);
8235 iwn5000_load_firmware(struct iwn_softc *sc)
8237 struct iwn_fw_part *fw;
8240 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8242 /* Load the initialization firmware on first boot only. */
8243 fw = (sc->sc_flags & IWN_FLAG_CALIB_DONE) ?
8244 &sc->fw.main : &sc->fw.init;
8246 error = iwn5000_load_firmware_section(sc, IWN_FW_TEXT_BASE,
8247 fw->text, fw->textsz);
8249 device_printf(sc->sc_dev,
8250 "%s: could not load firmware %s section, error %d\n",
8251 __func__, ".text", error);
8254 error = iwn5000_load_firmware_section(sc, IWN_FW_DATA_BASE,
8255 fw->data, fw->datasz);
8257 device_printf(sc->sc_dev,
8258 "%s: could not load firmware %s section, error %d\n",
8259 __func__, ".data", error);
8263 /* Now press "execute". */
8264 IWN_WRITE(sc, IWN_RESET, 0);
8269 * Extract text and data sections from a legacy firmware image.
8272 iwn_read_firmware_leg(struct iwn_softc *sc, struct iwn_fw_info *fw)
8274 const uint32_t *ptr;
8278 ptr = (const uint32_t *)fw->data;
8279 rev = le32toh(*ptr++);
8281 sc->ucode_rev = rev;
8283 /* Check firmware API version. */
8284 if (IWN_FW_API(rev) <= 1) {
8285 device_printf(sc->sc_dev,
8286 "%s: bad firmware, need API version >=2\n", __func__);
8289 if (IWN_FW_API(rev) >= 3) {
8290 /* Skip build number (version 2 header). */
8294 if (fw->size < hdrlen) {
8295 device_printf(sc->sc_dev, "%s: firmware too short: %zu bytes\n",
8296 __func__, fw->size);
8299 fw->main.textsz = le32toh(*ptr++);
8300 fw->main.datasz = le32toh(*ptr++);
8301 fw->init.textsz = le32toh(*ptr++);
8302 fw->init.datasz = le32toh(*ptr++);
8303 fw->boot.textsz = le32toh(*ptr++);
8305 /* Check that all firmware sections fit. */
8306 if (fw->size < hdrlen + fw->main.textsz + fw->main.datasz +
8307 fw->init.textsz + fw->init.datasz + fw->boot.textsz) {
8308 device_printf(sc->sc_dev, "%s: firmware too short: %zu bytes\n",
8309 __func__, fw->size);
8313 /* Get pointers to firmware sections. */
8314 fw->main.text = (const uint8_t *)ptr;
8315 fw->main.data = fw->main.text + fw->main.textsz;
8316 fw->init.text = fw->main.data + fw->main.datasz;
8317 fw->init.data = fw->init.text + fw->init.textsz;
8318 fw->boot.text = fw->init.data + fw->init.datasz;
8323 * Extract text and data sections from a TLV firmware image.
8326 iwn_read_firmware_tlv(struct iwn_softc *sc, struct iwn_fw_info *fw,
8329 const struct iwn_fw_tlv_hdr *hdr;
8330 const struct iwn_fw_tlv *tlv;
8331 const uint8_t *ptr, *end;
8335 if (fw->size < sizeof (*hdr)) {
8336 device_printf(sc->sc_dev, "%s: firmware too short: %zu bytes\n",
8337 __func__, fw->size);
8340 hdr = (const struct iwn_fw_tlv_hdr *)fw->data;
8341 if (hdr->signature != htole32(IWN_FW_SIGNATURE)) {
8342 device_printf(sc->sc_dev, "%s: bad firmware signature 0x%08x\n",
8343 __func__, le32toh(hdr->signature));
8346 DPRINTF(sc, IWN_DEBUG_RESET, "FW: \"%.64s\", build 0x%x\n", hdr->descr,
8347 le32toh(hdr->build));
8348 sc->ucode_rev = le32toh(hdr->rev);
8351 * Select the closest supported alternative that is less than
8352 * or equal to the specified one.
8354 altmask = le64toh(hdr->altmask);
8355 while (alt > 0 && !(altmask & (1ULL << alt)))
8356 alt--; /* Downgrade. */
8357 DPRINTF(sc, IWN_DEBUG_RESET, "using alternative %d\n", alt);
8359 ptr = (const uint8_t *)(hdr + 1);
8360 end = (const uint8_t *)(fw->data + fw->size);
8362 /* Parse type-length-value fields. */
8363 while (ptr + sizeof (*tlv) <= end) {
8364 tlv = (const struct iwn_fw_tlv *)ptr;
8365 len = le32toh(tlv->len);
8367 ptr += sizeof (*tlv);
8368 if (ptr + len > end) {
8369 device_printf(sc->sc_dev,
8370 "%s: firmware too short: %zu bytes\n", __func__,
8374 /* Skip other alternatives. */
8375 if (tlv->alt != 0 && tlv->alt != htole16(alt))
8378 switch (le16toh(tlv->type)) {
8379 case IWN_FW_TLV_MAIN_TEXT:
8380 fw->main.text = ptr;
8381 fw->main.textsz = len;
8383 case IWN_FW_TLV_MAIN_DATA:
8384 fw->main.data = ptr;
8385 fw->main.datasz = len;
8387 case IWN_FW_TLV_INIT_TEXT:
8388 fw->init.text = ptr;
8389 fw->init.textsz = len;
8391 case IWN_FW_TLV_INIT_DATA:
8392 fw->init.data = ptr;
8393 fw->init.datasz = len;
8395 case IWN_FW_TLV_BOOT_TEXT:
8396 fw->boot.text = ptr;
8397 fw->boot.textsz = len;
8399 case IWN_FW_TLV_ENH_SENS:
8401 sc->sc_flags |= IWN_FLAG_ENH_SENS;
8403 case IWN_FW_TLV_PHY_CALIB:
8404 tmp = le32toh(*ptr);
8406 sc->reset_noise_gain = tmp;
8407 sc->noise_gain = tmp + 1;
8410 case IWN_FW_TLV_PAN:
8411 sc->sc_flags |= IWN_FLAG_PAN_SUPPORT;
8412 DPRINTF(sc, IWN_DEBUG_RESET,
8413 "PAN Support found: %d\n", 1);
8415 case IWN_FW_TLV_FLAGS:
8416 if (len < sizeof(uint32_t))
8418 if (len % sizeof(uint32_t))
8420 sc->tlv_feature_flags = le32toh(*ptr);
8421 DPRINTF(sc, IWN_DEBUG_RESET,
8422 "%s: feature: 0x%08x\n",
8424 sc->tlv_feature_flags);
8426 case IWN_FW_TLV_PBREQ_MAXLEN:
8427 case IWN_FW_TLV_RUNT_EVTLOG_PTR:
8428 case IWN_FW_TLV_RUNT_EVTLOG_SIZE:
8429 case IWN_FW_TLV_RUNT_ERRLOG_PTR:
8430 case IWN_FW_TLV_INIT_EVTLOG_PTR:
8431 case IWN_FW_TLV_INIT_EVTLOG_SIZE:
8432 case IWN_FW_TLV_INIT_ERRLOG_PTR:
8433 case IWN_FW_TLV_WOWLAN_INST:
8434 case IWN_FW_TLV_WOWLAN_DATA:
8435 DPRINTF(sc, IWN_DEBUG_RESET,
8436 "TLV type %d recognized but not handled\n",
8437 le16toh(tlv->type));
8440 DPRINTF(sc, IWN_DEBUG_RESET,
8441 "TLV type %d not handled\n", le16toh(tlv->type));
8444 next: /* TLV fields are 32-bit aligned. */
8445 ptr += (len + 3) & ~3;
8451 iwn_read_firmware(struct iwn_softc *sc)
8453 struct iwn_fw_info *fw = &sc->fw;
8456 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8460 memset(fw, 0, sizeof (*fw));
8462 /* Read firmware image from filesystem. */
8463 sc->fw_fp = firmware_get(sc->fwname);
8464 if (sc->fw_fp == NULL) {
8465 device_printf(sc->sc_dev, "%s: could not read firmware %s\n",
8466 __func__, sc->fwname);
8472 fw->size = sc->fw_fp->datasize;
8473 fw->data = (const uint8_t *)sc->fw_fp->data;
8474 if (fw->size < sizeof (uint32_t)) {
8475 device_printf(sc->sc_dev, "%s: firmware too short: %zu bytes\n",
8476 __func__, fw->size);
8481 /* Retrieve text and data sections. */
8482 if (*(const uint32_t *)fw->data != 0) /* Legacy image. */
8483 error = iwn_read_firmware_leg(sc, fw);
8485 error = iwn_read_firmware_tlv(sc, fw, 1);
8487 device_printf(sc->sc_dev,
8488 "%s: could not read firmware sections, error %d\n",
8493 device_printf(sc->sc_dev, "%s: ucode rev=0x%08x\n", __func__, sc->ucode_rev);
8495 /* Make sure text and data sections fit in hardware memory. */
8496 if (fw->main.textsz > sc->fw_text_maxsz ||
8497 fw->main.datasz > sc->fw_data_maxsz ||
8498 fw->init.textsz > sc->fw_text_maxsz ||
8499 fw->init.datasz > sc->fw_data_maxsz ||
8500 fw->boot.textsz > IWN_FW_BOOT_TEXT_MAXSZ ||
8501 (fw->boot.textsz & 3) != 0) {
8502 device_printf(sc->sc_dev, "%s: firmware sections too large\n",
8508 /* We can proceed with loading the firmware. */
8511 fail: iwn_unload_firmware(sc);
8516 iwn_unload_firmware(struct iwn_softc *sc)
8518 firmware_put(sc->fw_fp, FIRMWARE_UNLOAD);
8523 iwn_clock_wait(struct iwn_softc *sc)
8527 /* Set "initialization complete" bit. */
8528 IWN_SETBITS(sc, IWN_GP_CNTRL, IWN_GP_CNTRL_INIT_DONE);
8530 /* Wait for clock stabilization. */
8531 for (ntries = 0; ntries < 2500; ntries++) {
8532 if (IWN_READ(sc, IWN_GP_CNTRL) & IWN_GP_CNTRL_MAC_CLOCK_READY)
8536 device_printf(sc->sc_dev,
8537 "%s: timeout waiting for clock stabilization\n", __func__);
8542 iwn_apm_init(struct iwn_softc *sc)
8547 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8549 /* Disable L0s exit timer (NMI bug workaround). */
8550 IWN_SETBITS(sc, IWN_GIO_CHICKEN, IWN_GIO_CHICKEN_DIS_L0S_TIMER);
8551 /* Don't wait for ICH L0s (ICH bug workaround). */
8552 IWN_SETBITS(sc, IWN_GIO_CHICKEN, IWN_GIO_CHICKEN_L1A_NO_L0S_RX);
8554 /* Set FH wait threshold to max (HW bug under stress workaround). */
8555 IWN_SETBITS(sc, IWN_DBG_HPET_MEM, 0xffff0000);
8557 /* Enable HAP INTA to move adapter from L1a to L0s. */
8558 IWN_SETBITS(sc, IWN_HW_IF_CONFIG, IWN_HW_IF_CONFIG_HAP_WAKE_L1A);
8560 /* Retrieve PCIe Active State Power Management (ASPM). */
8561 reg = pci_read_config(sc->sc_dev, sc->sc_cap_off + PCIER_LINK_CTL, 4);
8562 /* Workaround for HW instability in PCIe L0->L0s->L1 transition. */
8563 if (reg & PCIEM_LINK_CTL_ASPMC_L1) /* L1 Entry enabled. */
8564 IWN_SETBITS(sc, IWN_GIO, IWN_GIO_L0S_ENA);
8566 IWN_CLRBITS(sc, IWN_GIO, IWN_GIO_L0S_ENA);
8568 if (sc->base_params->pll_cfg_val)
8569 IWN_SETBITS(sc, IWN_ANA_PLL, sc->base_params->pll_cfg_val);
8571 /* Wait for clock stabilization before accessing prph. */
8572 if ((error = iwn_clock_wait(sc)) != 0)
8575 if ((error = iwn_nic_lock(sc)) != 0)
8577 if (sc->hw_type == IWN_HW_REV_TYPE_4965) {
8578 /* Enable DMA and BSM (Bootstrap State Machine). */
8579 iwn_prph_write(sc, IWN_APMG_CLK_EN,
8580 IWN_APMG_CLK_CTRL_DMA_CLK_RQT |
8581 IWN_APMG_CLK_CTRL_BSM_CLK_RQT);
8584 iwn_prph_write(sc, IWN_APMG_CLK_EN,
8585 IWN_APMG_CLK_CTRL_DMA_CLK_RQT);
8588 /* Disable L1-Active. */
8589 iwn_prph_setbits(sc, IWN_APMG_PCI_STT, IWN_APMG_PCI_STT_L1A_DIS);
8596 iwn_apm_stop_master(struct iwn_softc *sc)
8600 /* Stop busmaster DMA activity. */
8601 IWN_SETBITS(sc, IWN_RESET, IWN_RESET_STOP_MASTER);
8602 for (ntries = 0; ntries < 100; ntries++) {
8603 if (IWN_READ(sc, IWN_RESET) & IWN_RESET_MASTER_DISABLED)
8607 device_printf(sc->sc_dev, "%s: timeout waiting for master\n", __func__);
8611 iwn_apm_stop(struct iwn_softc *sc)
8613 iwn_apm_stop_master(sc);
8615 /* Reset the entire device. */
8616 IWN_SETBITS(sc, IWN_RESET, IWN_RESET_SW);
8618 /* Clear "initialization complete" bit. */
8619 IWN_CLRBITS(sc, IWN_GP_CNTRL, IWN_GP_CNTRL_INIT_DONE);
8623 iwn4965_nic_config(struct iwn_softc *sc)
8625 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8627 if (IWN_RFCFG_TYPE(sc->rfcfg) == 1) {
8629 * I don't believe this to be correct but this is what the
8630 * vendor driver is doing. Probably the bits should not be
8631 * shifted in IWN_RFCFG_*.
8633 IWN_SETBITS(sc, IWN_HW_IF_CONFIG,
8634 IWN_RFCFG_TYPE(sc->rfcfg) |
8635 IWN_RFCFG_STEP(sc->rfcfg) |
8636 IWN_RFCFG_DASH(sc->rfcfg));
8638 IWN_SETBITS(sc, IWN_HW_IF_CONFIG,
8639 IWN_HW_IF_CONFIG_RADIO_SI | IWN_HW_IF_CONFIG_MAC_SI);
8644 iwn5000_nic_config(struct iwn_softc *sc)
8649 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8651 if (IWN_RFCFG_TYPE(sc->rfcfg) < 3) {
8652 IWN_SETBITS(sc, IWN_HW_IF_CONFIG,
8653 IWN_RFCFG_TYPE(sc->rfcfg) |
8654 IWN_RFCFG_STEP(sc->rfcfg) |
8655 IWN_RFCFG_DASH(sc->rfcfg));
8657 IWN_SETBITS(sc, IWN_HW_IF_CONFIG,
8658 IWN_HW_IF_CONFIG_RADIO_SI | IWN_HW_IF_CONFIG_MAC_SI);
8660 if ((error = iwn_nic_lock(sc)) != 0)
8662 iwn_prph_setbits(sc, IWN_APMG_PS, IWN_APMG_PS_EARLY_PWROFF_DIS);
8664 if (sc->hw_type == IWN_HW_REV_TYPE_1000) {
8666 * Select first Switching Voltage Regulator (1.32V) to
8667 * solve a stability issue related to noisy DC2DC line
8668 * in the silicon of 1000 Series.
8670 tmp = iwn_prph_read(sc, IWN_APMG_DIGITAL_SVR);
8671 tmp &= ~IWN_APMG_DIGITAL_SVR_VOLTAGE_MASK;
8672 tmp |= IWN_APMG_DIGITAL_SVR_VOLTAGE_1_32;
8673 iwn_prph_write(sc, IWN_APMG_DIGITAL_SVR, tmp);
8677 if (sc->sc_flags & IWN_FLAG_INTERNAL_PA) {
8678 /* Use internal power amplifier only. */
8679 IWN_WRITE(sc, IWN_GP_DRIVER, IWN_GP_DRIVER_RADIO_2X2_IPA);
8681 if (sc->base_params->additional_nic_config && sc->calib_ver >= 6) {
8682 /* Indicate that ROM calibration version is >=6. */
8683 IWN_SETBITS(sc, IWN_GP_DRIVER, IWN_GP_DRIVER_CALIB_VER6);
8685 if (sc->base_params->additional_gp_drv_bit)
8686 IWN_SETBITS(sc, IWN_GP_DRIVER,
8687 sc->base_params->additional_gp_drv_bit);
8692 * Take NIC ownership over Intel Active Management Technology (AMT).
8695 iwn_hw_prepare(struct iwn_softc *sc)
8699 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8701 /* Check if hardware is ready. */
8702 IWN_SETBITS(sc, IWN_HW_IF_CONFIG, IWN_HW_IF_CONFIG_NIC_READY);
8703 for (ntries = 0; ntries < 5; ntries++) {
8704 if (IWN_READ(sc, IWN_HW_IF_CONFIG) &
8705 IWN_HW_IF_CONFIG_NIC_READY)
8710 /* Hardware not ready, force into ready state. */
8711 IWN_SETBITS(sc, IWN_HW_IF_CONFIG, IWN_HW_IF_CONFIG_PREPARE);
8712 for (ntries = 0; ntries < 15000; ntries++) {
8713 if (!(IWN_READ(sc, IWN_HW_IF_CONFIG) &
8714 IWN_HW_IF_CONFIG_PREPARE_DONE))
8718 if (ntries == 15000)
8721 /* Hardware should be ready now. */
8722 IWN_SETBITS(sc, IWN_HW_IF_CONFIG, IWN_HW_IF_CONFIG_NIC_READY);
8723 for (ntries = 0; ntries < 5; ntries++) {
8724 if (IWN_READ(sc, IWN_HW_IF_CONFIG) &
8725 IWN_HW_IF_CONFIG_NIC_READY)
8733 iwn_hw_init(struct iwn_softc *sc)
8735 struct iwn_ops *ops = &sc->ops;
8736 int error, chnl, qid;
8738 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
8740 /* Clear pending interrupts. */
8741 IWN_WRITE(sc, IWN_INT, 0xffffffff);
8743 if ((error = iwn_apm_init(sc)) != 0) {
8744 device_printf(sc->sc_dev,
8745 "%s: could not power ON adapter, error %d\n", __func__,
8750 /* Select VMAIN power source. */
8751 if ((error = iwn_nic_lock(sc)) != 0)
8753 iwn_prph_clrbits(sc, IWN_APMG_PS, IWN_APMG_PS_PWR_SRC_MASK);
8756 /* Perform adapter-specific initialization. */
8757 if ((error = ops->nic_config(sc)) != 0)
8760 /* Initialize RX ring. */
8761 if ((error = iwn_nic_lock(sc)) != 0)
8763 IWN_WRITE(sc, IWN_FH_RX_CONFIG, 0);
8764 IWN_WRITE(sc, IWN_FH_RX_WPTR, 0);
8765 /* Set physical address of RX ring (256-byte aligned). */
8766 IWN_WRITE(sc, IWN_FH_RX_BASE, sc->rxq.desc_dma.paddr >> 8);
8767 /* Set physical address of RX status (16-byte aligned). */
8768 IWN_WRITE(sc, IWN_FH_STATUS_WPTR, sc->rxq.stat_dma.paddr >> 4);
8770 IWN_WRITE(sc, IWN_FH_RX_CONFIG,
8771 IWN_FH_RX_CONFIG_ENA |
8772 IWN_FH_RX_CONFIG_IGN_RXF_EMPTY | /* HW bug workaround */
8773 IWN_FH_RX_CONFIG_IRQ_DST_HOST |
8774 IWN_FH_RX_CONFIG_SINGLE_FRAME |
8775 IWN_FH_RX_CONFIG_RB_TIMEOUT(0) |
8776 IWN_FH_RX_CONFIG_NRBD(IWN_RX_RING_COUNT_LOG));
8778 IWN_WRITE(sc, IWN_FH_RX_WPTR, (IWN_RX_RING_COUNT - 1) & ~7);
8780 if ((error = iwn_nic_lock(sc)) != 0)
8783 /* Initialize TX scheduler. */
8784 iwn_prph_write(sc, sc->sched_txfact_addr, 0);
8786 /* Set physical address of "keep warm" page (16-byte aligned). */
8787 IWN_WRITE(sc, IWN_FH_KW_ADDR, sc->kw_dma.paddr >> 4);
8789 /* Initialize TX rings. */
8790 for (qid = 0; qid < sc->ntxqs; qid++) {
8791 struct iwn_tx_ring *txq = &sc->txq[qid];
8793 /* Set physical address of TX ring (256-byte aligned). */
8794 IWN_WRITE(sc, IWN_FH_CBBC_QUEUE(qid),
8795 txq->desc_dma.paddr >> 8);
8799 /* Enable DMA channels. */
8800 for (chnl = 0; chnl < sc->ndmachnls; chnl++) {
8801 IWN_WRITE(sc, IWN_FH_TX_CONFIG(chnl),
8802 IWN_FH_TX_CONFIG_DMA_ENA |
8803 IWN_FH_TX_CONFIG_DMA_CREDIT_ENA);
8806 /* Clear "radio off" and "commands blocked" bits. */
8807 IWN_WRITE(sc, IWN_UCODE_GP1_CLR, IWN_UCODE_GP1_RFKILL);
8808 IWN_WRITE(sc, IWN_UCODE_GP1_CLR, IWN_UCODE_GP1_CMD_BLOCKED);
8810 /* Clear pending interrupts. */
8811 IWN_WRITE(sc, IWN_INT, 0xffffffff);
8812 /* Enable interrupt coalescing. */
8813 IWN_WRITE(sc, IWN_INT_COALESCING, 512 / 8);
8814 /* Enable interrupts. */
8815 IWN_WRITE(sc, IWN_INT_MASK, sc->int_mask);
8817 /* _Really_ make sure "radio off" bit is cleared! */
8818 IWN_WRITE(sc, IWN_UCODE_GP1_CLR, IWN_UCODE_GP1_RFKILL);
8819 IWN_WRITE(sc, IWN_UCODE_GP1_CLR, IWN_UCODE_GP1_RFKILL);
8821 /* Enable shadow registers. */
8822 if (sc->base_params->shadow_reg_enable)
8823 IWN_SETBITS(sc, IWN_SHADOW_REG_CTRL, 0x800fffff);
8825 if ((error = ops->load_firmware(sc)) != 0) {
8826 device_printf(sc->sc_dev,
8827 "%s: could not load firmware, error %d\n", __func__,
8831 /* Wait at most one second for firmware alive notification. */
8832 if ((error = msleep(sc, &sc->sc_mtx, PCATCH, "iwninit", hz)) != 0) {
8833 device_printf(sc->sc_dev,
8834 "%s: timeout waiting for adapter to initialize, error %d\n",
8838 /* Do post-firmware initialization. */
8840 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
8842 return ops->post_alive(sc);
8846 iwn_hw_stop(struct iwn_softc *sc)
8848 int chnl, qid, ntries;
8850 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8852 IWN_WRITE(sc, IWN_RESET, IWN_RESET_NEVO);
8854 /* Disable interrupts. */
8855 IWN_WRITE(sc, IWN_INT_MASK, 0);
8856 IWN_WRITE(sc, IWN_INT, 0xffffffff);
8857 IWN_WRITE(sc, IWN_FH_INT, 0xffffffff);
8858 sc->sc_flags &= ~IWN_FLAG_USE_ICT;
8860 /* Make sure we no longer hold the NIC lock. */
8863 /* Stop TX scheduler. */
8864 iwn_prph_write(sc, sc->sched_txfact_addr, 0);
8866 /* Stop all DMA channels. */
8867 if (iwn_nic_lock(sc) == 0) {
8868 for (chnl = 0; chnl < sc->ndmachnls; chnl++) {
8869 IWN_WRITE(sc, IWN_FH_TX_CONFIG(chnl), 0);
8870 for (ntries = 0; ntries < 200; ntries++) {
8871 if (IWN_READ(sc, IWN_FH_TX_STATUS) &
8872 IWN_FH_TX_STATUS_IDLE(chnl))
8881 iwn_reset_rx_ring(sc, &sc->rxq);
8883 /* Reset all TX rings. */
8884 for (qid = 0; qid < sc->ntxqs; qid++)
8885 iwn_reset_tx_ring(sc, &sc->txq[qid]);
8887 if (iwn_nic_lock(sc) == 0) {
8888 iwn_prph_write(sc, IWN_APMG_CLK_DIS,
8889 IWN_APMG_CLK_CTRL_DMA_CLK_RQT);
8893 /* Power OFF adapter. */
8898 iwn_panicked(void *arg0, int pending)
8900 struct iwn_softc *sc = arg0;
8901 struct ieee80211com *ic = &sc->sc_ic;
8902 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
8908 printf("%s: null vap\n", __func__);
8912 device_printf(sc->sc_dev, "%s: controller panicked, iv_state = %d; "
8913 "restarting\n", __func__, vap->iv_state);
8916 * This is not enough work. We need to also reinitialise
8917 * the correct transmit state for aggregation enabled queues,
8918 * which has a very specific requirement of
8919 * ring index = 802.11 seqno % 256. If we don't do this (which
8920 * we definitely don't!) then the firmware will just panic again.
8923 ieee80211_restart_all(ic);
8927 iwn_stop_locked(sc);
8928 if ((error = iwn_init_locked(sc)) != 0) {
8929 device_printf(sc->sc_dev,
8930 "%s: could not init hardware\n", __func__);
8933 if (vap->iv_state >= IEEE80211_S_AUTH &&
8934 (error = iwn_auth(sc, vap)) != 0) {
8935 device_printf(sc->sc_dev,
8936 "%s: could not move to auth state\n", __func__);
8938 if (vap->iv_state >= IEEE80211_S_RUN &&
8939 (error = iwn_run(sc, vap)) != 0) {
8940 device_printf(sc->sc_dev,
8941 "%s: could not move to run state\n", __func__);
8950 iwn_init_locked(struct iwn_softc *sc)
8954 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
8956 IWN_LOCK_ASSERT(sc);
8958 if (sc->sc_flags & IWN_FLAG_RUNNING)
8961 sc->sc_flags |= IWN_FLAG_RUNNING;
8963 if ((error = iwn_hw_prepare(sc)) != 0) {
8964 device_printf(sc->sc_dev, "%s: hardware not ready, error %d\n",
8969 /* Initialize interrupt mask to default value. */
8970 sc->int_mask = IWN_INT_MASK_DEF;
8971 sc->sc_flags &= ~IWN_FLAG_USE_ICT;
8973 /* Check that the radio is not disabled by hardware switch. */
8974 if (!(IWN_READ(sc, IWN_GP_CNTRL) & IWN_GP_CNTRL_RFKILL)) {
8975 iwn_stop_locked(sc);
8976 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
8981 /* Read firmware images from the filesystem. */
8982 if ((error = iwn_read_firmware(sc)) != 0) {
8983 device_printf(sc->sc_dev,
8984 "%s: could not read firmware, error %d\n", __func__,
8989 /* Initialize hardware and upload firmware. */
8990 error = iwn_hw_init(sc);
8991 iwn_unload_firmware(sc);
8993 device_printf(sc->sc_dev,
8994 "%s: could not initialize hardware, error %d\n", __func__,
8999 /* Configure adapter now that it is ready. */
9000 if ((error = iwn_config(sc)) != 0) {
9001 device_printf(sc->sc_dev,
9002 "%s: could not configure device, error %d\n", __func__,
9007 callout_reset(&sc->watchdog_to, hz, iwn_watchdog, sc);
9010 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
9015 iwn_stop_locked(sc);
9017 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end in error\n",__func__);
9023 iwn_init(struct iwn_softc *sc)
9028 error = iwn_init_locked(sc);
9035 iwn_stop_locked(struct iwn_softc *sc)
9038 IWN_LOCK_ASSERT(sc);
9040 if (!(sc->sc_flags & IWN_FLAG_RUNNING))
9043 sc->sc_is_scanning = 0;
9044 sc->sc_tx_timer = 0;
9045 callout_stop(&sc->watchdog_to);
9046 callout_stop(&sc->scan_timeout);
9047 callout_stop(&sc->calib_to);
9048 sc->sc_flags &= ~IWN_FLAG_RUNNING;
9050 /* Power OFF hardware. */
9055 iwn_stop(struct iwn_softc *sc)
9058 iwn_stop_locked(sc);
9063 * Callback from net80211 to start a scan.
9066 iwn_scan_start(struct ieee80211com *ic)
9068 struct iwn_softc *sc = ic->ic_softc;
9071 /* make the link LED blink while we're scanning */
9072 iwn_set_led(sc, IWN_LED_LINK, 20, 2);
9077 * Callback from net80211 to terminate a scan.
9080 iwn_scan_end(struct ieee80211com *ic)
9082 struct iwn_softc *sc = ic->ic_softc;
9083 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
9086 if (vap->iv_state == IEEE80211_S_RUN) {
9087 /* Set link LED to ON status if we are associated */
9088 iwn_set_led(sc, IWN_LED_LINK, 0, 1);
9094 * Callback from net80211 to force a channel change.
9097 iwn_set_channel(struct ieee80211com *ic)
9099 const struct ieee80211_channel *c = ic->ic_curchan;
9100 struct iwn_softc *sc = ic->ic_softc;
9103 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
9106 sc->sc_rxtap.wr_chan_freq = htole16(c->ic_freq);
9107 sc->sc_rxtap.wr_chan_flags = htole16(c->ic_flags);
9108 sc->sc_txtap.wt_chan_freq = htole16(c->ic_freq);
9109 sc->sc_txtap.wt_chan_flags = htole16(c->ic_flags);
9112 * Only need to set the channel in Monitor mode. AP scanning and auth
9113 * are already taken care of by their respective firmware commands.
9115 if (ic->ic_opmode == IEEE80211_M_MONITOR) {
9116 error = iwn_config(sc);
9118 device_printf(sc->sc_dev,
9119 "%s: error %d settting channel\n", __func__, error);
9125 * Callback from net80211 to start scanning of the current channel.
9128 iwn_scan_curchan(struct ieee80211_scan_state *ss, unsigned long maxdwell)
9130 struct ieee80211vap *vap = ss->ss_vap;
9131 struct ieee80211com *ic = vap->iv_ic;
9132 struct iwn_softc *sc = ic->ic_softc;
9136 error = iwn_scan(sc, vap, ss, ic->ic_curchan);
9139 ieee80211_cancel_scan(vap);
9143 * Callback from net80211 to handle the minimum dwell time being met.
9144 * The intent is to terminate the scan but we just let the firmware
9145 * notify us when it's finished as we have no safe way to abort it.
9148 iwn_scan_mindwell(struct ieee80211_scan_state *ss)
9150 /* NB: don't try to abort scan; wait for firmware to finish */
9153 #define IWN_DESC(x) case x: return #x
9156 * Translate CSR code to string
9158 static char *iwn_get_csr_string(int csr)
9161 IWN_DESC(IWN_HW_IF_CONFIG);
9162 IWN_DESC(IWN_INT_COALESCING);
9164 IWN_DESC(IWN_INT_MASK);
9165 IWN_DESC(IWN_FH_INT);
9166 IWN_DESC(IWN_GPIO_IN);
9167 IWN_DESC(IWN_RESET);
9168 IWN_DESC(IWN_GP_CNTRL);
9169 IWN_DESC(IWN_HW_REV);
9170 IWN_DESC(IWN_EEPROM);
9171 IWN_DESC(IWN_EEPROM_GP);
9172 IWN_DESC(IWN_OTP_GP);
9174 IWN_DESC(IWN_GP_UCODE);
9175 IWN_DESC(IWN_GP_DRIVER);
9176 IWN_DESC(IWN_UCODE_GP1);
9177 IWN_DESC(IWN_UCODE_GP2);
9179 IWN_DESC(IWN_DRAM_INT_TBL);
9180 IWN_DESC(IWN_GIO_CHICKEN);
9181 IWN_DESC(IWN_ANA_PLL);
9182 IWN_DESC(IWN_HW_REV_WA);
9183 IWN_DESC(IWN_DBG_HPET_MEM);
9185 return "UNKNOWN CSR";
9190 * This function print firmware register
9193 iwn_debug_register(struct iwn_softc *sc)
9196 static const uint32_t csr_tbl[] = {
9221 DPRINTF(sc, IWN_DEBUG_REGISTER,
9222 "CSR values: (2nd byte of IWN_INT_COALESCING is IWN_INT_PERIODIC)%s",
9224 for (i = 0; i < nitems(csr_tbl); i++){
9225 DPRINTF(sc, IWN_DEBUG_REGISTER," %10s: 0x%08x ",
9226 iwn_get_csr_string(csr_tbl[i]), IWN_READ(sc, csr_tbl[i]));
9228 DPRINTF(sc, IWN_DEBUG_REGISTER,"%s","\n");
9230 DPRINTF(sc, IWN_DEBUG_REGISTER,"%s","\n");