2 * Copyright (c) 2007-2009 Damien Bergamini <damien.bergamini@free.fr>
3 * Copyright (c) 2008 Benjamin Close <benjsc@FreeBSD.org>
4 * Copyright (c) 2008 Sam Leffler, Errno Consulting
5 * Copyright (c) 2011 Intel Corporation
6 * Copyright (c) 2013 Cedric GROSS <c.gross@kreiz-it.fr>
7 * Copyright (c) 2013 Adrian Chadd <adrian@FreeBSD.org>
9 * Permission to use, copy, modify, and distribute this software for any
10 * purpose with or without fee is hereby granted, provided that the above
11 * copyright notice and this permission notice appear in all copies.
13 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
14 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
15 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
16 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
17 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
18 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
19 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
23 * Driver for Intel WiFi Link 4965 and 1000/5000/6000 Series 802.11 network
27 #include <sys/cdefs.h>
28 __FBSDID("$FreeBSD$");
33 #include <sys/param.h>
34 #include <sys/sockio.h>
35 #include <sys/sysctl.h>
37 #include <sys/kernel.h>
38 #include <sys/socket.h>
39 #include <sys/systm.h>
40 #include <sys/malloc.h>
44 #include <sys/endian.h>
45 #include <sys/firmware.h>
46 #include <sys/limits.h>
47 #include <sys/module.h>
49 #include <sys/queue.h>
50 #include <sys/taskqueue.h>
52 #include <machine/bus.h>
53 #include <machine/resource.h>
54 #include <machine/clock.h>
56 #include <dev/pci/pcireg.h>
57 #include <dev/pci/pcivar.h>
60 #include <net/if_var.h>
61 #include <net/if_dl.h>
62 #include <net/if_media.h>
64 #include <netinet/in.h>
65 #include <netinet/if_ether.h>
67 #include <net80211/ieee80211_var.h>
68 #include <net80211/ieee80211_radiotap.h>
69 #include <net80211/ieee80211_regdomain.h>
70 #include <net80211/ieee80211_ratectl.h>
72 #include <dev/iwn/if_iwnreg.h>
73 #include <dev/iwn/if_iwnvar.h>
74 #include <dev/iwn/if_iwn_devid.h>
75 #include <dev/iwn/if_iwn_chip_cfg.h>
76 #include <dev/iwn/if_iwn_debug.h>
77 #include <dev/iwn/if_iwn_ioctl.h>
85 static const struct iwn_ident iwn_ident_table[] = {
86 { 0x8086, IWN_DID_6x05_1, "Intel Centrino Advanced-N 6205" },
87 { 0x8086, IWN_DID_1000_1, "Intel Centrino Wireless-N 1000" },
88 { 0x8086, IWN_DID_1000_2, "Intel Centrino Wireless-N 1000" },
89 { 0x8086, IWN_DID_6x05_2, "Intel Centrino Advanced-N 6205" },
90 { 0x8086, IWN_DID_6050_1, "Intel Centrino Advanced-N + WiMAX 6250" },
91 { 0x8086, IWN_DID_6050_2, "Intel Centrino Advanced-N + WiMAX 6250" },
92 { 0x8086, IWN_DID_x030_1, "Intel Centrino Wireless-N 1030" },
93 { 0x8086, IWN_DID_x030_2, "Intel Centrino Wireless-N 1030" },
94 { 0x8086, IWN_DID_x030_3, "Intel Centrino Advanced-N 6230" },
95 { 0x8086, IWN_DID_x030_4, "Intel Centrino Advanced-N 6230" },
96 { 0x8086, IWN_DID_6150_1, "Intel Centrino Wireless-N + WiMAX 6150" },
97 { 0x8086, IWN_DID_6150_2, "Intel Centrino Wireless-N + WiMAX 6150" },
98 { 0x8086, IWN_DID_2x00_1, "Intel(R) Centrino(R) Wireless-N 2200 BGN" },
99 { 0x8086, IWN_DID_2x00_2, "Intel(R) Centrino(R) Wireless-N 2200 BGN" },
100 /* XXX 2200D is IWN_SDID_2x00_4; there's no way to express this here! */
101 { 0x8086, IWN_DID_2x30_1, "Intel Centrino Wireless-N 2230" },
102 { 0x8086, IWN_DID_2x30_2, "Intel Centrino Wireless-N 2230" },
103 { 0x8086, IWN_DID_130_1, "Intel Centrino Wireless-N 130" },
104 { 0x8086, IWN_DID_130_2, "Intel Centrino Wireless-N 130" },
105 { 0x8086, IWN_DID_100_1, "Intel Centrino Wireless-N 100" },
106 { 0x8086, IWN_DID_100_2, "Intel Centrino Wireless-N 100" },
107 { 0x8086, IWN_DID_105_1, "Intel Centrino Wireless-N 105" },
108 { 0x8086, IWN_DID_105_2, "Intel Centrino Wireless-N 105" },
109 { 0x8086, IWN_DID_135_1, "Intel Centrino Wireless-N 135" },
110 { 0x8086, IWN_DID_135_2, "Intel Centrino Wireless-N 135" },
111 { 0x8086, IWN_DID_4965_1, "Intel Wireless WiFi Link 4965" },
112 { 0x8086, IWN_DID_6x00_1, "Intel Centrino Ultimate-N 6300" },
113 { 0x8086, IWN_DID_6x00_2, "Intel Centrino Advanced-N 6200" },
114 { 0x8086, IWN_DID_4965_2, "Intel Wireless WiFi Link 4965" },
115 { 0x8086, IWN_DID_4965_3, "Intel Wireless WiFi Link 4965" },
116 { 0x8086, IWN_DID_5x00_1, "Intel WiFi Link 5100" },
117 { 0x8086, IWN_DID_4965_4, "Intel Wireless WiFi Link 4965" },
118 { 0x8086, IWN_DID_5x00_3, "Intel Ultimate N WiFi Link 5300" },
119 { 0x8086, IWN_DID_5x00_4, "Intel Ultimate N WiFi Link 5300" },
120 { 0x8086, IWN_DID_5x00_2, "Intel WiFi Link 5100" },
121 { 0x8086, IWN_DID_6x00_3, "Intel Centrino Ultimate-N 6300" },
122 { 0x8086, IWN_DID_6x00_4, "Intel Centrino Advanced-N 6200" },
123 { 0x8086, IWN_DID_5x50_1, "Intel WiMAX/WiFi Link 5350" },
124 { 0x8086, IWN_DID_5x50_2, "Intel WiMAX/WiFi Link 5350" },
125 { 0x8086, IWN_DID_5x50_3, "Intel WiMAX/WiFi Link 5150" },
126 { 0x8086, IWN_DID_5x50_4, "Intel WiMAX/WiFi Link 5150" },
127 { 0x8086, IWN_DID_6035_1, "Intel Centrino Advanced 6235" },
128 { 0x8086, IWN_DID_6035_2, "Intel Centrino Advanced 6235" },
132 static int iwn_probe(device_t);
133 static int iwn_attach(device_t);
134 static int iwn4965_attach(struct iwn_softc *, uint16_t);
135 static int iwn5000_attach(struct iwn_softc *, uint16_t);
136 static int iwn_config_specific(struct iwn_softc *, uint16_t);
137 static void iwn_radiotap_attach(struct iwn_softc *);
138 static void iwn_sysctlattach(struct iwn_softc *);
139 static struct ieee80211vap *iwn_vap_create(struct ieee80211com *,
140 const char [IFNAMSIZ], int, enum ieee80211_opmode, int,
141 const uint8_t [IEEE80211_ADDR_LEN],
142 const uint8_t [IEEE80211_ADDR_LEN]);
143 static void iwn_vap_delete(struct ieee80211vap *);
144 static int iwn_detach(device_t);
145 static int iwn_shutdown(device_t);
146 static int iwn_suspend(device_t);
147 static int iwn_resume(device_t);
148 static int iwn_nic_lock(struct iwn_softc *);
149 static int iwn_eeprom_lock(struct iwn_softc *);
150 static int iwn_init_otprom(struct iwn_softc *);
151 static int iwn_read_prom_data(struct iwn_softc *, uint32_t, void *, int);
152 static void iwn_dma_map_addr(void *, bus_dma_segment_t *, int, int);
153 static int iwn_dma_contig_alloc(struct iwn_softc *, struct iwn_dma_info *,
154 void **, bus_size_t, bus_size_t);
155 static void iwn_dma_contig_free(struct iwn_dma_info *);
156 static int iwn_alloc_sched(struct iwn_softc *);
157 static void iwn_free_sched(struct iwn_softc *);
158 static int iwn_alloc_kw(struct iwn_softc *);
159 static void iwn_free_kw(struct iwn_softc *);
160 static int iwn_alloc_ict(struct iwn_softc *);
161 static void iwn_free_ict(struct iwn_softc *);
162 static int iwn_alloc_fwmem(struct iwn_softc *);
163 static void iwn_free_fwmem(struct iwn_softc *);
164 static int iwn_alloc_rx_ring(struct iwn_softc *, struct iwn_rx_ring *);
165 static void iwn_reset_rx_ring(struct iwn_softc *, struct iwn_rx_ring *);
166 static void iwn_free_rx_ring(struct iwn_softc *, struct iwn_rx_ring *);
167 static int iwn_alloc_tx_ring(struct iwn_softc *, struct iwn_tx_ring *,
169 static void iwn_reset_tx_ring(struct iwn_softc *, struct iwn_tx_ring *);
170 static void iwn_free_tx_ring(struct iwn_softc *, struct iwn_tx_ring *);
171 static void iwn5000_ict_reset(struct iwn_softc *);
172 static int iwn_read_eeprom(struct iwn_softc *,
173 uint8_t macaddr[IEEE80211_ADDR_LEN]);
174 static void iwn4965_read_eeprom(struct iwn_softc *);
176 static void iwn4965_print_power_group(struct iwn_softc *, int);
178 static void iwn5000_read_eeprom(struct iwn_softc *);
179 static uint32_t iwn_eeprom_channel_flags(struct iwn_eeprom_chan *);
180 static void iwn_read_eeprom_band(struct iwn_softc *, int, int, int *,
181 struct ieee80211_channel[]);
182 static void iwn_read_eeprom_ht40(struct iwn_softc *, int, int, int *,
183 struct ieee80211_channel[]);
184 static void iwn_read_eeprom_channels(struct iwn_softc *, int, uint32_t);
185 static struct iwn_eeprom_chan *iwn_find_eeprom_channel(struct iwn_softc *,
186 struct ieee80211_channel *);
187 static void iwn_getradiocaps(struct ieee80211com *, int, int *,
188 struct ieee80211_channel[]);
189 static int iwn_setregdomain(struct ieee80211com *,
190 struct ieee80211_regdomain *, int,
191 struct ieee80211_channel[]);
192 static void iwn_read_eeprom_enhinfo(struct iwn_softc *);
193 static struct ieee80211_node *iwn_node_alloc(struct ieee80211vap *,
194 const uint8_t mac[IEEE80211_ADDR_LEN]);
195 static void iwn_newassoc(struct ieee80211_node *, int);
196 static int iwn_media_change(struct ifnet *);
197 static int iwn_newstate(struct ieee80211vap *, enum ieee80211_state, int);
198 static void iwn_calib_timeout(void *);
199 static void iwn_rx_phy(struct iwn_softc *, struct iwn_rx_desc *,
200 struct iwn_rx_data *);
201 static void iwn_rx_done(struct iwn_softc *, struct iwn_rx_desc *,
202 struct iwn_rx_data *);
203 static void iwn_rx_compressed_ba(struct iwn_softc *, struct iwn_rx_desc *,
204 struct iwn_rx_data *);
205 static void iwn5000_rx_calib_results(struct iwn_softc *,
206 struct iwn_rx_desc *, struct iwn_rx_data *);
207 static void iwn_rx_statistics(struct iwn_softc *, struct iwn_rx_desc *,
208 struct iwn_rx_data *);
209 static void iwn4965_tx_done(struct iwn_softc *, struct iwn_rx_desc *,
210 struct iwn_rx_data *);
211 static void iwn5000_tx_done(struct iwn_softc *, struct iwn_rx_desc *,
212 struct iwn_rx_data *);
213 static void iwn_tx_done(struct iwn_softc *, struct iwn_rx_desc *, int, int,
215 static void iwn_ampdu_tx_done(struct iwn_softc *, int, int, int, int, int,
217 static void iwn_cmd_done(struct iwn_softc *, struct iwn_rx_desc *);
218 static void iwn_notif_intr(struct iwn_softc *);
219 static void iwn_wakeup_intr(struct iwn_softc *);
220 static void iwn_rftoggle_task(void *, int);
221 static void iwn_fatal_intr(struct iwn_softc *);
222 static void iwn_intr(void *);
223 static void iwn4965_update_sched(struct iwn_softc *, int, int, uint8_t,
225 static void iwn5000_update_sched(struct iwn_softc *, int, int, uint8_t,
228 static void iwn5000_reset_sched(struct iwn_softc *, int, int);
230 static int iwn_tx_data(struct iwn_softc *, struct mbuf *,
231 struct ieee80211_node *);
232 static int iwn_tx_data_raw(struct iwn_softc *, struct mbuf *,
233 struct ieee80211_node *,
234 const struct ieee80211_bpf_params *params);
235 static void iwn_xmit_task(void *arg0, int pending);
236 static int iwn_raw_xmit(struct ieee80211_node *, struct mbuf *,
237 const struct ieee80211_bpf_params *);
238 static int iwn_transmit(struct ieee80211com *, struct mbuf *);
239 static void iwn_scan_timeout(void *);
240 static void iwn_watchdog(void *);
241 static int iwn_ioctl(struct ieee80211com *, u_long , void *);
242 static void iwn_parent(struct ieee80211com *);
243 static int iwn_cmd(struct iwn_softc *, int, const void *, int, int);
244 static int iwn4965_add_node(struct iwn_softc *, struct iwn_node_info *,
246 static int iwn5000_add_node(struct iwn_softc *, struct iwn_node_info *,
248 static int iwn_set_link_quality(struct iwn_softc *,
249 struct ieee80211_node *);
250 static int iwn_add_broadcast_node(struct iwn_softc *, int);
251 static int iwn_updateedca(struct ieee80211com *);
252 static void iwn_update_mcast(struct ieee80211com *);
253 static void iwn_set_led(struct iwn_softc *, uint8_t, uint8_t, uint8_t);
254 static int iwn_set_critical_temp(struct iwn_softc *);
255 static int iwn_set_timing(struct iwn_softc *, struct ieee80211_node *);
256 static void iwn4965_power_calibration(struct iwn_softc *, int);
257 static int iwn4965_set_txpower(struct iwn_softc *,
258 struct ieee80211_channel *, int);
259 static int iwn5000_set_txpower(struct iwn_softc *,
260 struct ieee80211_channel *, int);
261 static int iwn4965_get_rssi(struct iwn_softc *, struct iwn_rx_stat *);
262 static int iwn5000_get_rssi(struct iwn_softc *, struct iwn_rx_stat *);
263 static int iwn_get_noise(const struct iwn_rx_general_stats *);
264 static int iwn4965_get_temperature(struct iwn_softc *);
265 static int iwn5000_get_temperature(struct iwn_softc *);
266 static int iwn_init_sensitivity(struct iwn_softc *);
267 static void iwn_collect_noise(struct iwn_softc *,
268 const struct iwn_rx_general_stats *);
269 static int iwn4965_init_gains(struct iwn_softc *);
270 static int iwn5000_init_gains(struct iwn_softc *);
271 static int iwn4965_set_gains(struct iwn_softc *);
272 static int iwn5000_set_gains(struct iwn_softc *);
273 static void iwn_tune_sensitivity(struct iwn_softc *,
274 const struct iwn_rx_stats *);
275 static void iwn_save_stats_counters(struct iwn_softc *,
276 const struct iwn_stats *);
277 static int iwn_send_sensitivity(struct iwn_softc *);
278 static void iwn_check_rx_recovery(struct iwn_softc *, struct iwn_stats *);
279 static int iwn_set_pslevel(struct iwn_softc *, int, int, int);
280 static int iwn_send_btcoex(struct iwn_softc *);
281 static int iwn_send_advanced_btcoex(struct iwn_softc *);
282 static int iwn5000_runtime_calib(struct iwn_softc *);
283 static int iwn_config(struct iwn_softc *);
284 static int iwn_scan(struct iwn_softc *, struct ieee80211vap *,
285 struct ieee80211_scan_state *, struct ieee80211_channel *);
286 static int iwn_auth(struct iwn_softc *, struct ieee80211vap *vap);
287 static int iwn_run(struct iwn_softc *, struct ieee80211vap *vap);
288 static int iwn_ampdu_rx_start(struct ieee80211_node *,
289 struct ieee80211_rx_ampdu *, int, int, int);
290 static void iwn_ampdu_rx_stop(struct ieee80211_node *,
291 struct ieee80211_rx_ampdu *);
292 static int iwn_addba_request(struct ieee80211_node *,
293 struct ieee80211_tx_ampdu *, int, int, int);
294 static int iwn_addba_response(struct ieee80211_node *,
295 struct ieee80211_tx_ampdu *, int, int, int);
296 static int iwn_ampdu_tx_start(struct ieee80211com *,
297 struct ieee80211_node *, uint8_t);
298 static void iwn_ampdu_tx_stop(struct ieee80211_node *,
299 struct ieee80211_tx_ampdu *);
300 static void iwn4965_ampdu_tx_start(struct iwn_softc *,
301 struct ieee80211_node *, int, uint8_t, uint16_t);
302 static void iwn4965_ampdu_tx_stop(struct iwn_softc *, int,
304 static void iwn5000_ampdu_tx_start(struct iwn_softc *,
305 struct ieee80211_node *, int, uint8_t, uint16_t);
306 static void iwn5000_ampdu_tx_stop(struct iwn_softc *, int,
308 static int iwn5000_query_calibration(struct iwn_softc *);
309 static int iwn5000_send_calibration(struct iwn_softc *);
310 static int iwn5000_send_wimax_coex(struct iwn_softc *);
311 static int iwn5000_crystal_calib(struct iwn_softc *);
312 static int iwn5000_temp_offset_calib(struct iwn_softc *);
313 static int iwn5000_temp_offset_calibv2(struct iwn_softc *);
314 static int iwn4965_post_alive(struct iwn_softc *);
315 static int iwn5000_post_alive(struct iwn_softc *);
316 static int iwn4965_load_bootcode(struct iwn_softc *, const uint8_t *,
318 static int iwn4965_load_firmware(struct iwn_softc *);
319 static int iwn5000_load_firmware_section(struct iwn_softc *, uint32_t,
320 const uint8_t *, int);
321 static int iwn5000_load_firmware(struct iwn_softc *);
322 static int iwn_read_firmware_leg(struct iwn_softc *,
323 struct iwn_fw_info *);
324 static int iwn_read_firmware_tlv(struct iwn_softc *,
325 struct iwn_fw_info *, uint16_t);
326 static int iwn_read_firmware(struct iwn_softc *);
327 static void iwn_unload_firmware(struct iwn_softc *);
328 static int iwn_clock_wait(struct iwn_softc *);
329 static int iwn_apm_init(struct iwn_softc *);
330 static void iwn_apm_stop_master(struct iwn_softc *);
331 static void iwn_apm_stop(struct iwn_softc *);
332 static int iwn4965_nic_config(struct iwn_softc *);
333 static int iwn5000_nic_config(struct iwn_softc *);
334 static int iwn_hw_prepare(struct iwn_softc *);
335 static int iwn_hw_init(struct iwn_softc *);
336 static void iwn_hw_stop(struct iwn_softc *);
337 static void iwn_panicked(void *, int);
338 static int iwn_init_locked(struct iwn_softc *);
339 static int iwn_init(struct iwn_softc *);
340 static void iwn_stop_locked(struct iwn_softc *);
341 static void iwn_stop(struct iwn_softc *);
342 static void iwn_scan_start(struct ieee80211com *);
343 static void iwn_scan_end(struct ieee80211com *);
344 static void iwn_set_channel(struct ieee80211com *);
345 static void iwn_scan_curchan(struct ieee80211_scan_state *, unsigned long);
346 static void iwn_scan_mindwell(struct ieee80211_scan_state *);
348 static char *iwn_get_csr_string(int);
349 static void iwn_debug_register(struct iwn_softc *);
352 static device_method_t iwn_methods[] = {
353 /* Device interface */
354 DEVMETHOD(device_probe, iwn_probe),
355 DEVMETHOD(device_attach, iwn_attach),
356 DEVMETHOD(device_detach, iwn_detach),
357 DEVMETHOD(device_shutdown, iwn_shutdown),
358 DEVMETHOD(device_suspend, iwn_suspend),
359 DEVMETHOD(device_resume, iwn_resume),
364 static driver_t iwn_driver = {
367 sizeof(struct iwn_softc)
369 static devclass_t iwn_devclass;
371 DRIVER_MODULE(iwn, pci, iwn_driver, iwn_devclass, NULL, NULL);
373 MODULE_VERSION(iwn, 1);
375 MODULE_DEPEND(iwn, firmware, 1, 1, 1);
376 MODULE_DEPEND(iwn, pci, 1, 1, 1);
377 MODULE_DEPEND(iwn, wlan, 1, 1, 1);
379 static d_ioctl_t iwn_cdev_ioctl;
380 static d_open_t iwn_cdev_open;
381 static d_close_t iwn_cdev_close;
383 static struct cdevsw iwn_cdevsw = {
384 .d_version = D_VERSION,
386 .d_open = iwn_cdev_open,
387 .d_close = iwn_cdev_close,
388 .d_ioctl = iwn_cdev_ioctl,
393 iwn_probe(device_t dev)
395 const struct iwn_ident *ident;
397 for (ident = iwn_ident_table; ident->name != NULL; ident++) {
398 if (pci_get_vendor(dev) == ident->vendor &&
399 pci_get_device(dev) == ident->device) {
400 device_set_desc(dev, ident->name);
401 return (BUS_PROBE_DEFAULT);
408 iwn_is_3stream_device(struct iwn_softc *sc)
410 /* XXX for now only 5300, until the 5350 can be tested */
411 if (sc->hw_type == IWN_HW_REV_TYPE_5300)
417 iwn_attach(device_t dev)
419 struct iwn_softc *sc = device_get_softc(dev);
420 struct ieee80211com *ic;
426 error = resource_int_value(device_get_name(sc->sc_dev),
427 device_get_unit(sc->sc_dev), "debug", &(sc->sc_debug));
434 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: begin\n",__func__);
437 * Get the offset of the PCI Express Capability Structure in PCI
438 * Configuration Space.
440 error = pci_find_cap(dev, PCIY_EXPRESS, &sc->sc_cap_off);
442 device_printf(dev, "PCIe capability structure not found!\n");
446 /* Clear device-specific "PCI retry timeout" register (41h). */
447 pci_write_config(dev, 0x41, 0, 1);
449 /* Enable bus-mastering. */
450 pci_enable_busmaster(dev);
453 sc->mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
455 if (sc->mem == NULL) {
456 device_printf(dev, "can't map mem space\n");
460 sc->sc_st = rman_get_bustag(sc->mem);
461 sc->sc_sh = rman_get_bushandle(sc->mem);
465 if (pci_alloc_msi(dev, &i) == 0)
467 /* Install interrupt handler. */
468 sc->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, RF_ACTIVE |
469 (rid != 0 ? 0 : RF_SHAREABLE));
470 if (sc->irq == NULL) {
471 device_printf(dev, "can't map interrupt\n");
478 /* Read hardware revision and attach. */
479 sc->hw_type = (IWN_READ(sc, IWN_HW_REV) >> IWN_HW_REV_TYPE_SHIFT)
480 & IWN_HW_REV_TYPE_MASK;
481 sc->subdevice_id = pci_get_subdevice(dev);
484 * 4965 versus 5000 and later have different methods.
485 * Let's set those up first.
487 if (sc->hw_type == IWN_HW_REV_TYPE_4965)
488 error = iwn4965_attach(sc, pci_get_device(dev));
490 error = iwn5000_attach(sc, pci_get_device(dev));
492 device_printf(dev, "could not attach device, error %d\n",
498 * Next, let's setup the various parameters of each NIC.
500 error = iwn_config_specific(sc, pci_get_device(dev));
502 device_printf(dev, "could not attach device, error %d\n",
507 if ((error = iwn_hw_prepare(sc)) != 0) {
508 device_printf(dev, "hardware not ready, error %d\n", error);
512 /* Allocate DMA memory for firmware transfers. */
513 if ((error = iwn_alloc_fwmem(sc)) != 0) {
515 "could not allocate memory for firmware, error %d\n",
520 /* Allocate "Keep Warm" page. */
521 if ((error = iwn_alloc_kw(sc)) != 0) {
523 "could not allocate keep warm page, error %d\n", error);
527 /* Allocate ICT table for 5000 Series. */
528 if (sc->hw_type != IWN_HW_REV_TYPE_4965 &&
529 (error = iwn_alloc_ict(sc)) != 0) {
530 device_printf(dev, "could not allocate ICT table, error %d\n",
535 /* Allocate TX scheduler "rings". */
536 if ((error = iwn_alloc_sched(sc)) != 0) {
538 "could not allocate TX scheduler rings, error %d\n", error);
542 /* Allocate TX rings (16 on 4965AGN, 20 on >=5000). */
543 for (i = 0; i < sc->ntxqs; i++) {
544 if ((error = iwn_alloc_tx_ring(sc, &sc->txq[i], i)) != 0) {
546 "could not allocate TX ring %d, error %d\n", i,
552 /* Allocate RX ring. */
553 if ((error = iwn_alloc_rx_ring(sc, &sc->rxq)) != 0) {
554 device_printf(dev, "could not allocate RX ring, error %d\n",
559 /* Clear pending interrupts. */
560 IWN_WRITE(sc, IWN_INT, 0xffffffff);
564 ic->ic_name = device_get_nameunit(dev);
565 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */
566 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */
568 /* Set device capabilities. */
570 IEEE80211_C_STA /* station mode supported */
571 | IEEE80211_C_MONITOR /* monitor mode supported */
573 | IEEE80211_C_BGSCAN /* background scanning */
575 | IEEE80211_C_TXPMGT /* tx power management */
576 | IEEE80211_C_SHSLOT /* short slot time supported */
578 | IEEE80211_C_SHPREAMBLE /* short preamble supported */
580 | IEEE80211_C_IBSS /* ibss/adhoc mode */
582 | IEEE80211_C_WME /* WME */
583 | IEEE80211_C_PMGT /* Station-side power mgmt */
586 /* Read MAC address, channels, etc from EEPROM. */
587 if ((error = iwn_read_eeprom(sc, ic->ic_macaddr)) != 0) {
588 device_printf(dev, "could not read EEPROM, error %d\n",
593 /* Count the number of available chains. */
595 ((sc->txchainmask >> 2) & 1) +
596 ((sc->txchainmask >> 1) & 1) +
597 ((sc->txchainmask >> 0) & 1);
599 ((sc->rxchainmask >> 2) & 1) +
600 ((sc->rxchainmask >> 1) & 1) +
601 ((sc->rxchainmask >> 0) & 1);
603 device_printf(dev, "MIMO %dT%dR, %.4s, address %6D\n",
604 sc->ntxchains, sc->nrxchains, sc->eeprom_domain,
605 ic->ic_macaddr, ":");
608 if (sc->sc_flags & IWN_FLAG_HAS_11N) {
609 ic->ic_rxstream = sc->nrxchains;
610 ic->ic_txstream = sc->ntxchains;
613 * Some of the 3 antenna devices (ie, the 4965) only supports
614 * 2x2 operation. So correct the number of streams if
615 * it's not a 3-stream device.
617 if (! iwn_is_3stream_device(sc)) {
618 if (ic->ic_rxstream > 2)
620 if (ic->ic_txstream > 2)
625 IEEE80211_HTCAP_SMPS_OFF /* SMPS mode disabled */
626 | IEEE80211_HTCAP_SHORTGI20 /* short GI in 20MHz */
627 | IEEE80211_HTCAP_CHWIDTH40 /* 40MHz channel width*/
628 | IEEE80211_HTCAP_SHORTGI40 /* short GI in 40MHz */
630 | IEEE80211_HTCAP_GREENFIELD
631 #if IWN_RBUF_SIZE == 8192
632 | IEEE80211_HTCAP_MAXAMSDU_7935 /* max A-MSDU length */
634 | IEEE80211_HTCAP_MAXAMSDU_3839 /* max A-MSDU length */
637 /* s/w capabilities */
638 | IEEE80211_HTC_HT /* HT operation */
639 | IEEE80211_HTC_AMPDU /* tx A-MPDU */
641 | IEEE80211_HTC_AMSDU /* tx A-MSDU */
646 ieee80211_ifattach(ic);
647 ic->ic_vap_create = iwn_vap_create;
648 ic->ic_ioctl = iwn_ioctl;
649 ic->ic_parent = iwn_parent;
650 ic->ic_vap_delete = iwn_vap_delete;
651 ic->ic_transmit = iwn_transmit;
652 ic->ic_raw_xmit = iwn_raw_xmit;
653 ic->ic_node_alloc = iwn_node_alloc;
654 sc->sc_ampdu_rx_start = ic->ic_ampdu_rx_start;
655 ic->ic_ampdu_rx_start = iwn_ampdu_rx_start;
656 sc->sc_ampdu_rx_stop = ic->ic_ampdu_rx_stop;
657 ic->ic_ampdu_rx_stop = iwn_ampdu_rx_stop;
658 sc->sc_addba_request = ic->ic_addba_request;
659 ic->ic_addba_request = iwn_addba_request;
660 sc->sc_addba_response = ic->ic_addba_response;
661 ic->ic_addba_response = iwn_addba_response;
662 sc->sc_addba_stop = ic->ic_addba_stop;
663 ic->ic_addba_stop = iwn_ampdu_tx_stop;
664 ic->ic_newassoc = iwn_newassoc;
665 ic->ic_wme.wme_update = iwn_updateedca;
666 ic->ic_update_mcast = iwn_update_mcast;
667 ic->ic_scan_start = iwn_scan_start;
668 ic->ic_scan_end = iwn_scan_end;
669 ic->ic_set_channel = iwn_set_channel;
670 ic->ic_scan_curchan = iwn_scan_curchan;
671 ic->ic_scan_mindwell = iwn_scan_mindwell;
672 ic->ic_getradiocaps = iwn_getradiocaps;
673 ic->ic_setregdomain = iwn_setregdomain;
675 iwn_radiotap_attach(sc);
677 callout_init_mtx(&sc->calib_to, &sc->sc_mtx, 0);
678 callout_init_mtx(&sc->scan_timeout, &sc->sc_mtx, 0);
679 callout_init_mtx(&sc->watchdog_to, &sc->sc_mtx, 0);
680 TASK_INIT(&sc->sc_rftoggle_task, 0, iwn_rftoggle_task, sc);
681 TASK_INIT(&sc->sc_panic_task, 0, iwn_panicked, sc);
682 TASK_INIT(&sc->sc_xmit_task, 0, iwn_xmit_task, sc);
684 mbufq_init(&sc->sc_xmit_queue, 1024);
686 sc->sc_tq = taskqueue_create("iwn_taskq", M_WAITOK,
687 taskqueue_thread_enqueue, &sc->sc_tq);
688 error = taskqueue_start_threads(&sc->sc_tq, 1, 0, "iwn_taskq");
690 device_printf(dev, "can't start threads, error %d\n", error);
694 iwn_sysctlattach(sc);
697 * Hook our interrupt after all initialization is complete.
699 error = bus_setup_intr(dev, sc->irq, INTR_TYPE_NET | INTR_MPSAFE,
700 NULL, iwn_intr, sc, &sc->sc_ih);
702 device_printf(dev, "can't establish interrupt, error %d\n",
708 device_printf(sc->sc_dev, "%s: rx_stats=%d, rx_stats_bt=%d\n",
710 sizeof(struct iwn_stats),
711 sizeof(struct iwn_stats_bt));
715 ieee80211_announce(ic);
716 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
718 /* Add debug ioctl right at the end */
719 sc->sc_cdev = make_dev(&iwn_cdevsw, device_get_unit(dev),
720 UID_ROOT, GID_WHEEL, 0600, "%s", device_get_nameunit(dev));
721 if (sc->sc_cdev == NULL) {
722 device_printf(dev, "failed to create debug character device\n");
724 sc->sc_cdev->si_drv1 = sc;
729 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end in error\n",__func__);
734 * Define specific configuration based on device id and subdevice id
735 * pid : PCI device id
738 iwn_config_specific(struct iwn_softc *sc, uint16_t pid)
747 sc->base_params = &iwn4965_base_params;
748 sc->limits = &iwn4965_sensitivity_limits;
749 sc->fwname = "iwn4965fw";
750 /* Override chains masks, ROM is known to be broken. */
751 sc->txchainmask = IWN_ANT_AB;
752 sc->rxchainmask = IWN_ANT_ABC;
753 /* Enable normal btcoex */
754 sc->sc_flags |= IWN_FLAG_BTCOEX;
759 switch(sc->subdevice_id) {
760 case IWN_SDID_1000_1:
761 case IWN_SDID_1000_2:
762 case IWN_SDID_1000_3:
763 case IWN_SDID_1000_4:
764 case IWN_SDID_1000_5:
765 case IWN_SDID_1000_6:
766 case IWN_SDID_1000_7:
767 case IWN_SDID_1000_8:
768 case IWN_SDID_1000_9:
769 case IWN_SDID_1000_10:
770 case IWN_SDID_1000_11:
771 case IWN_SDID_1000_12:
772 sc->limits = &iwn1000_sensitivity_limits;
773 sc->base_params = &iwn1000_base_params;
774 sc->fwname = "iwn1000fw";
777 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
778 "0x%04x rev %d not supported (subdevice)\n", pid,
779 sc->subdevice_id,sc->hw_type);
788 sc->fwname = "iwn6000fw";
789 sc->limits = &iwn6000_sensitivity_limits;
790 switch(sc->subdevice_id) {
791 case IWN_SDID_6x00_1:
792 case IWN_SDID_6x00_2:
793 case IWN_SDID_6x00_8:
795 sc->base_params = &iwn_6000_base_params;
797 case IWN_SDID_6x00_3:
798 case IWN_SDID_6x00_6:
799 case IWN_SDID_6x00_9:
801 case IWN_SDID_6x00_4:
802 case IWN_SDID_6x00_7:
803 case IWN_SDID_6x00_10:
805 case IWN_SDID_6x00_5:
807 sc->base_params = &iwn_6000i_base_params;
808 sc->sc_flags |= IWN_FLAG_INTERNAL_PA;
809 sc->txchainmask = IWN_ANT_BC;
810 sc->rxchainmask = IWN_ANT_BC;
813 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
814 "0x%04x rev %d not supported (subdevice)\n", pid,
815 sc->subdevice_id,sc->hw_type);
822 switch(sc->subdevice_id) {
823 case IWN_SDID_6x05_1:
824 case IWN_SDID_6x05_4:
825 case IWN_SDID_6x05_6:
827 case IWN_SDID_6x05_2:
828 case IWN_SDID_6x05_5:
829 case IWN_SDID_6x05_7:
831 case IWN_SDID_6x05_3:
833 case IWN_SDID_6x05_8:
834 case IWN_SDID_6x05_9:
835 //iwl6005_2agn_sff_cfg
836 case IWN_SDID_6x05_10:
838 case IWN_SDID_6x05_11:
839 //iwl6005_2agn_mow1_cfg
840 case IWN_SDID_6x05_12:
841 //iwl6005_2agn_mow2_cfg
842 sc->fwname = "iwn6000g2afw";
843 sc->limits = &iwn6000_sensitivity_limits;
844 sc->base_params = &iwn_6000g2_base_params;
847 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
848 "0x%04x rev %d not supported (subdevice)\n", pid,
849 sc->subdevice_id,sc->hw_type);
856 switch(sc->subdevice_id) {
857 case IWN_SDID_6035_1:
858 case IWN_SDID_6035_2:
859 case IWN_SDID_6035_3:
860 case IWN_SDID_6035_4:
861 sc->fwname = "iwn6000g2bfw";
862 sc->limits = &iwn6235_sensitivity_limits;
863 sc->base_params = &iwn_6235_base_params;
866 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
867 "0x%04x rev %d not supported (subdevice)\n", pid,
868 sc->subdevice_id,sc->hw_type);
872 /* 6x50 WiFi/WiMax Series */
875 switch(sc->subdevice_id) {
876 case IWN_SDID_6050_1:
877 case IWN_SDID_6050_3:
878 case IWN_SDID_6050_5:
880 case IWN_SDID_6050_2:
881 case IWN_SDID_6050_4:
882 case IWN_SDID_6050_6:
884 sc->fwname = "iwn6050fw";
885 sc->txchainmask = IWN_ANT_AB;
886 sc->rxchainmask = IWN_ANT_AB;
887 sc->limits = &iwn6000_sensitivity_limits;
888 sc->base_params = &iwn_6050_base_params;
891 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
892 "0x%04x rev %d not supported (subdevice)\n", pid,
893 sc->subdevice_id,sc->hw_type);
897 /* 6150 WiFi/WiMax Series */
900 switch(sc->subdevice_id) {
901 case IWN_SDID_6150_1:
902 case IWN_SDID_6150_3:
903 case IWN_SDID_6150_5:
905 case IWN_SDID_6150_2:
906 case IWN_SDID_6150_4:
907 case IWN_SDID_6150_6:
909 sc->fwname = "iwn6050fw";
910 sc->limits = &iwn6000_sensitivity_limits;
911 sc->base_params = &iwn_6150_base_params;
914 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
915 "0x%04x rev %d not supported (subdevice)\n", pid,
916 sc->subdevice_id,sc->hw_type);
920 /* 6030 Series and 1030 Series */
925 switch(sc->subdevice_id) {
926 case IWN_SDID_x030_1:
927 case IWN_SDID_x030_3:
928 case IWN_SDID_x030_5:
930 case IWN_SDID_x030_2:
931 case IWN_SDID_x030_4:
932 case IWN_SDID_x030_6:
934 case IWN_SDID_x030_7:
935 case IWN_SDID_x030_10:
936 case IWN_SDID_x030_14:
938 case IWN_SDID_x030_8:
939 case IWN_SDID_x030_11:
940 case IWN_SDID_x030_15:
942 case IWN_SDID_x030_9:
943 case IWN_SDID_x030_12:
944 case IWN_SDID_x030_16:
946 case IWN_SDID_x030_13:
948 sc->fwname = "iwn6000g2bfw";
949 sc->limits = &iwn6000_sensitivity_limits;
950 sc->base_params = &iwn_6000g2b_base_params;
953 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
954 "0x%04x rev %d not supported (subdevice)\n", pid,
955 sc->subdevice_id,sc->hw_type);
959 /* 130 Series WiFi */
960 /* XXX: This series will need adjustment for rate.
961 * see rx_with_siso_diversity in linux kernel
965 switch(sc->subdevice_id) {
974 sc->fwname = "iwn6000g2bfw";
975 sc->limits = &iwn6000_sensitivity_limits;
976 sc->base_params = &iwn_6000g2b_base_params;
979 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
980 "0x%04x rev %d not supported (subdevice)\n", pid,
981 sc->subdevice_id,sc->hw_type);
985 /* 100 Series WiFi */
988 switch(sc->subdevice_id) {
995 sc->limits = &iwn1000_sensitivity_limits;
996 sc->base_params = &iwn1000_base_params;
997 sc->fwname = "iwn100fw";
1000 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
1001 "0x%04x rev %d not supported (subdevice)\n", pid,
1002 sc->subdevice_id,sc->hw_type);
1008 /* XXX: This series will need adjustment for rate.
1009 * see rx_with_siso_diversity in linux kernel
1013 switch(sc->subdevice_id) {
1014 case IWN_SDID_105_1:
1015 case IWN_SDID_105_2:
1016 case IWN_SDID_105_3:
1018 case IWN_SDID_105_4:
1020 sc->limits = &iwn2030_sensitivity_limits;
1021 sc->base_params = &iwn2000_base_params;
1022 sc->fwname = "iwn105fw";
1025 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
1026 "0x%04x rev %d not supported (subdevice)\n", pid,
1027 sc->subdevice_id,sc->hw_type);
1033 /* XXX: This series will need adjustment for rate.
1034 * see rx_with_siso_diversity in linux kernel
1038 switch(sc->subdevice_id) {
1039 case IWN_SDID_135_1:
1040 case IWN_SDID_135_2:
1041 case IWN_SDID_135_3:
1042 sc->limits = &iwn2030_sensitivity_limits;
1043 sc->base_params = &iwn2030_base_params;
1044 sc->fwname = "iwn135fw";
1047 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
1048 "0x%04x rev %d not supported (subdevice)\n", pid,
1049 sc->subdevice_id,sc->hw_type);
1055 case IWN_DID_2x00_1:
1056 case IWN_DID_2x00_2:
1057 switch(sc->subdevice_id) {
1058 case IWN_SDID_2x00_1:
1059 case IWN_SDID_2x00_2:
1060 case IWN_SDID_2x00_3:
1062 case IWN_SDID_2x00_4:
1063 //iwl2000_2bgn_d_cfg
1064 sc->limits = &iwn2030_sensitivity_limits;
1065 sc->base_params = &iwn2000_base_params;
1066 sc->fwname = "iwn2000fw";
1069 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
1070 "0x%04x rev %d not supported (subdevice) \n",
1071 pid, sc->subdevice_id, sc->hw_type);
1076 case IWN_DID_2x30_1:
1077 case IWN_DID_2x30_2:
1078 switch(sc->subdevice_id) {
1079 case IWN_SDID_2x30_1:
1080 case IWN_SDID_2x30_3:
1081 case IWN_SDID_2x30_5:
1083 case IWN_SDID_2x30_2:
1084 case IWN_SDID_2x30_4:
1085 case IWN_SDID_2x30_6:
1087 sc->limits = &iwn2030_sensitivity_limits;
1088 sc->base_params = &iwn2030_base_params;
1089 sc->fwname = "iwn2030fw";
1092 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
1093 "0x%04x rev %d not supported (subdevice)\n", pid,
1094 sc->subdevice_id,sc->hw_type);
1099 case IWN_DID_5x00_1:
1100 case IWN_DID_5x00_2:
1101 case IWN_DID_5x00_3:
1102 case IWN_DID_5x00_4:
1103 sc->limits = &iwn5000_sensitivity_limits;
1104 sc->base_params = &iwn5000_base_params;
1105 sc->fwname = "iwn5000fw";
1106 switch(sc->subdevice_id) {
1107 case IWN_SDID_5x00_1:
1108 case IWN_SDID_5x00_2:
1109 case IWN_SDID_5x00_3:
1110 case IWN_SDID_5x00_4:
1111 case IWN_SDID_5x00_9:
1112 case IWN_SDID_5x00_10:
1113 case IWN_SDID_5x00_11:
1114 case IWN_SDID_5x00_12:
1115 case IWN_SDID_5x00_17:
1116 case IWN_SDID_5x00_18:
1117 case IWN_SDID_5x00_19:
1118 case IWN_SDID_5x00_20:
1120 sc->txchainmask = IWN_ANT_B;
1121 sc->rxchainmask = IWN_ANT_AB;
1123 case IWN_SDID_5x00_5:
1124 case IWN_SDID_5x00_6:
1125 case IWN_SDID_5x00_13:
1126 case IWN_SDID_5x00_14:
1127 case IWN_SDID_5x00_21:
1128 case IWN_SDID_5x00_22:
1130 sc->txchainmask = IWN_ANT_B;
1131 sc->rxchainmask = IWN_ANT_AB;
1133 case IWN_SDID_5x00_7:
1134 case IWN_SDID_5x00_8:
1135 case IWN_SDID_5x00_15:
1136 case IWN_SDID_5x00_16:
1137 case IWN_SDID_5x00_23:
1138 case IWN_SDID_5x00_24:
1140 sc->txchainmask = IWN_ANT_B;
1141 sc->rxchainmask = IWN_ANT_AB;
1143 case IWN_SDID_5x00_25:
1144 case IWN_SDID_5x00_26:
1145 case IWN_SDID_5x00_27:
1146 case IWN_SDID_5x00_28:
1147 case IWN_SDID_5x00_29:
1148 case IWN_SDID_5x00_30:
1149 case IWN_SDID_5x00_31:
1150 case IWN_SDID_5x00_32:
1151 case IWN_SDID_5x00_33:
1152 case IWN_SDID_5x00_34:
1153 case IWN_SDID_5x00_35:
1154 case IWN_SDID_5x00_36:
1156 sc->txchainmask = IWN_ANT_ABC;
1157 sc->rxchainmask = IWN_ANT_ABC;
1160 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
1161 "0x%04x rev %d not supported (subdevice)\n", pid,
1162 sc->subdevice_id,sc->hw_type);
1167 case IWN_DID_5x50_1:
1168 case IWN_DID_5x50_2:
1169 case IWN_DID_5x50_3:
1170 case IWN_DID_5x50_4:
1171 sc->limits = &iwn5000_sensitivity_limits;
1172 sc->base_params = &iwn5000_base_params;
1173 sc->fwname = "iwn5000fw";
1174 switch(sc->subdevice_id) {
1175 case IWN_SDID_5x50_1:
1176 case IWN_SDID_5x50_2:
1177 case IWN_SDID_5x50_3:
1179 sc->limits = &iwn5000_sensitivity_limits;
1180 sc->base_params = &iwn5000_base_params;
1181 sc->fwname = "iwn5000fw";
1183 case IWN_SDID_5x50_4:
1184 case IWN_SDID_5x50_5:
1185 case IWN_SDID_5x50_8:
1186 case IWN_SDID_5x50_9:
1187 case IWN_SDID_5x50_10:
1188 case IWN_SDID_5x50_11:
1190 case IWN_SDID_5x50_6:
1191 case IWN_SDID_5x50_7:
1192 case IWN_SDID_5x50_12:
1193 case IWN_SDID_5x50_13:
1195 sc->limits = &iwn5000_sensitivity_limits;
1196 sc->fwname = "iwn5150fw";
1197 sc->base_params = &iwn_5x50_base_params;
1200 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
1201 "0x%04x rev %d not supported (subdevice)\n", pid,
1202 sc->subdevice_id,sc->hw_type);
1207 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id : 0x%04x"
1208 "rev 0x%08x not supported (device)\n", pid, sc->subdevice_id,
1216 iwn4965_attach(struct iwn_softc *sc, uint16_t pid)
1218 struct iwn_ops *ops = &sc->ops;
1220 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
1221 ops->load_firmware = iwn4965_load_firmware;
1222 ops->read_eeprom = iwn4965_read_eeprom;
1223 ops->post_alive = iwn4965_post_alive;
1224 ops->nic_config = iwn4965_nic_config;
1225 ops->update_sched = iwn4965_update_sched;
1226 ops->get_temperature = iwn4965_get_temperature;
1227 ops->get_rssi = iwn4965_get_rssi;
1228 ops->set_txpower = iwn4965_set_txpower;
1229 ops->init_gains = iwn4965_init_gains;
1230 ops->set_gains = iwn4965_set_gains;
1231 ops->add_node = iwn4965_add_node;
1232 ops->tx_done = iwn4965_tx_done;
1233 ops->ampdu_tx_start = iwn4965_ampdu_tx_start;
1234 ops->ampdu_tx_stop = iwn4965_ampdu_tx_stop;
1235 sc->ntxqs = IWN4965_NTXQUEUES;
1236 sc->firstaggqueue = IWN4965_FIRSTAGGQUEUE;
1237 sc->ndmachnls = IWN4965_NDMACHNLS;
1238 sc->broadcast_id = IWN4965_ID_BROADCAST;
1239 sc->rxonsz = IWN4965_RXONSZ;
1240 sc->schedsz = IWN4965_SCHEDSZ;
1241 sc->fw_text_maxsz = IWN4965_FW_TEXT_MAXSZ;
1242 sc->fw_data_maxsz = IWN4965_FW_DATA_MAXSZ;
1243 sc->fwsz = IWN4965_FWSZ;
1244 sc->sched_txfact_addr = IWN4965_SCHED_TXFACT;
1245 sc->limits = &iwn4965_sensitivity_limits;
1246 sc->fwname = "iwn4965fw";
1247 /* Override chains masks, ROM is known to be broken. */
1248 sc->txchainmask = IWN_ANT_AB;
1249 sc->rxchainmask = IWN_ANT_ABC;
1250 /* Enable normal btcoex */
1251 sc->sc_flags |= IWN_FLAG_BTCOEX;
1253 DPRINTF(sc, IWN_DEBUG_TRACE, "%s: end\n",__func__);
1259 iwn5000_attach(struct iwn_softc *sc, uint16_t pid)
1261 struct iwn_ops *ops = &sc->ops;
1263 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
1265 ops->load_firmware = iwn5000_load_firmware;
1266 ops->read_eeprom = iwn5000_read_eeprom;
1267 ops->post_alive = iwn5000_post_alive;
1268 ops->nic_config = iwn5000_nic_config;
1269 ops->update_sched = iwn5000_update_sched;
1270 ops->get_temperature = iwn5000_get_temperature;
1271 ops->get_rssi = iwn5000_get_rssi;
1272 ops->set_txpower = iwn5000_set_txpower;
1273 ops->init_gains = iwn5000_init_gains;
1274 ops->set_gains = iwn5000_set_gains;
1275 ops->add_node = iwn5000_add_node;
1276 ops->tx_done = iwn5000_tx_done;
1277 ops->ampdu_tx_start = iwn5000_ampdu_tx_start;
1278 ops->ampdu_tx_stop = iwn5000_ampdu_tx_stop;
1279 sc->ntxqs = IWN5000_NTXQUEUES;
1280 sc->firstaggqueue = IWN5000_FIRSTAGGQUEUE;
1281 sc->ndmachnls = IWN5000_NDMACHNLS;
1282 sc->broadcast_id = IWN5000_ID_BROADCAST;
1283 sc->rxonsz = IWN5000_RXONSZ;
1284 sc->schedsz = IWN5000_SCHEDSZ;
1285 sc->fw_text_maxsz = IWN5000_FW_TEXT_MAXSZ;
1286 sc->fw_data_maxsz = IWN5000_FW_DATA_MAXSZ;
1287 sc->fwsz = IWN5000_FWSZ;
1288 sc->sched_txfact_addr = IWN5000_SCHED_TXFACT;
1289 sc->reset_noise_gain = IWN5000_PHY_CALIB_RESET_NOISE_GAIN;
1290 sc->noise_gain = IWN5000_PHY_CALIB_NOISE_GAIN;
1296 * Attach the interface to 802.11 radiotap.
1299 iwn_radiotap_attach(struct iwn_softc *sc)
1302 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
1303 ieee80211_radiotap_attach(&sc->sc_ic,
1304 &sc->sc_txtap.wt_ihdr, sizeof(sc->sc_txtap),
1305 IWN_TX_RADIOTAP_PRESENT,
1306 &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap),
1307 IWN_RX_RADIOTAP_PRESENT);
1308 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
1312 iwn_sysctlattach(struct iwn_softc *sc)
1315 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->sc_dev);
1316 struct sysctl_oid *tree = device_get_sysctl_tree(sc->sc_dev);
1318 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
1319 "debug", CTLFLAG_RW, &sc->sc_debug, sc->sc_debug,
1320 "control debugging printfs");
1324 static struct ieee80211vap *
1325 iwn_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit,
1326 enum ieee80211_opmode opmode, int flags,
1327 const uint8_t bssid[IEEE80211_ADDR_LEN],
1328 const uint8_t mac[IEEE80211_ADDR_LEN])
1330 struct iwn_softc *sc = ic->ic_softc;
1331 struct iwn_vap *ivp;
1332 struct ieee80211vap *vap;
1334 if (!TAILQ_EMPTY(&ic->ic_vaps)) /* only one at a time */
1337 ivp = malloc(sizeof(struct iwn_vap), M_80211_VAP, M_WAITOK | M_ZERO);
1339 ieee80211_vap_setup(ic, vap, name, unit, opmode, flags, bssid);
1340 ivp->ctx = IWN_RXON_BSS_CTX;
1341 vap->iv_bmissthreshold = 10; /* override default */
1342 /* Override with driver methods. */
1343 ivp->iv_newstate = vap->iv_newstate;
1344 vap->iv_newstate = iwn_newstate;
1345 sc->ivap[IWN_RXON_BSS_CTX] = vap;
1347 ieee80211_ratectl_init(vap);
1348 /* Complete setup. */
1349 ieee80211_vap_attach(vap, iwn_media_change, ieee80211_media_status,
1351 ic->ic_opmode = opmode;
1356 iwn_vap_delete(struct ieee80211vap *vap)
1358 struct iwn_vap *ivp = IWN_VAP(vap);
1360 ieee80211_ratectl_deinit(vap);
1361 ieee80211_vap_detach(vap);
1362 free(ivp, M_80211_VAP);
1366 iwn_xmit_queue_drain(struct iwn_softc *sc)
1369 struct ieee80211_node *ni;
1371 IWN_LOCK_ASSERT(sc);
1372 while ((m = mbufq_dequeue(&sc->sc_xmit_queue)) != NULL) {
1373 ni = (struct ieee80211_node *)m->m_pkthdr.rcvif;
1374 ieee80211_free_node(ni);
1380 iwn_xmit_queue_enqueue(struct iwn_softc *sc, struct mbuf *m)
1383 IWN_LOCK_ASSERT(sc);
1384 return (mbufq_enqueue(&sc->sc_xmit_queue, m));
1388 iwn_detach(device_t dev)
1390 struct iwn_softc *sc = device_get_softc(dev);
1393 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
1395 if (sc->sc_ic.ic_softc != NULL) {
1396 /* Free the mbuf queue and node references */
1398 iwn_xmit_queue_drain(sc);
1403 taskqueue_drain_all(sc->sc_tq);
1404 taskqueue_free(sc->sc_tq);
1406 callout_drain(&sc->watchdog_to);
1407 callout_drain(&sc->scan_timeout);
1408 callout_drain(&sc->calib_to);
1409 ieee80211_ifdetach(&sc->sc_ic);
1412 /* Uninstall interrupt handler. */
1413 if (sc->irq != NULL) {
1414 bus_teardown_intr(dev, sc->irq, sc->sc_ih);
1415 bus_release_resource(dev, SYS_RES_IRQ, rman_get_rid(sc->irq),
1417 pci_release_msi(dev);
1420 /* Free DMA resources. */
1421 iwn_free_rx_ring(sc, &sc->rxq);
1422 for (qid = 0; qid < sc->ntxqs; qid++)
1423 iwn_free_tx_ring(sc, &sc->txq[qid]);
1426 if (sc->ict != NULL)
1430 if (sc->mem != NULL)
1431 bus_release_resource(dev, SYS_RES_MEMORY,
1432 rman_get_rid(sc->mem), sc->mem);
1435 destroy_dev(sc->sc_cdev);
1439 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n", __func__);
1440 IWN_LOCK_DESTROY(sc);
1445 iwn_shutdown(device_t dev)
1447 struct iwn_softc *sc = device_get_softc(dev);
1454 iwn_suspend(device_t dev)
1456 struct iwn_softc *sc = device_get_softc(dev);
1458 ieee80211_suspend_all(&sc->sc_ic);
1463 iwn_resume(device_t dev)
1465 struct iwn_softc *sc = device_get_softc(dev);
1467 /* Clear device-specific "PCI retry timeout" register (41h). */
1468 pci_write_config(dev, 0x41, 0, 1);
1470 ieee80211_resume_all(&sc->sc_ic);
1475 iwn_nic_lock(struct iwn_softc *sc)
1479 /* Request exclusive access to NIC. */
1480 IWN_SETBITS(sc, IWN_GP_CNTRL, IWN_GP_CNTRL_MAC_ACCESS_REQ);
1482 /* Spin until we actually get the lock. */
1483 for (ntries = 0; ntries < 1000; ntries++) {
1484 if ((IWN_READ(sc, IWN_GP_CNTRL) &
1485 (IWN_GP_CNTRL_MAC_ACCESS_ENA | IWN_GP_CNTRL_SLEEP)) ==
1486 IWN_GP_CNTRL_MAC_ACCESS_ENA)
1493 static __inline void
1494 iwn_nic_unlock(struct iwn_softc *sc)
1496 IWN_CLRBITS(sc, IWN_GP_CNTRL, IWN_GP_CNTRL_MAC_ACCESS_REQ);
1499 static __inline uint32_t
1500 iwn_prph_read(struct iwn_softc *sc, uint32_t addr)
1502 IWN_WRITE(sc, IWN_PRPH_RADDR, IWN_PRPH_DWORD | addr);
1503 IWN_BARRIER_READ_WRITE(sc);
1504 return IWN_READ(sc, IWN_PRPH_RDATA);
1507 static __inline void
1508 iwn_prph_write(struct iwn_softc *sc, uint32_t addr, uint32_t data)
1510 IWN_WRITE(sc, IWN_PRPH_WADDR, IWN_PRPH_DWORD | addr);
1511 IWN_BARRIER_WRITE(sc);
1512 IWN_WRITE(sc, IWN_PRPH_WDATA, data);
1515 static __inline void
1516 iwn_prph_setbits(struct iwn_softc *sc, uint32_t addr, uint32_t mask)
1518 iwn_prph_write(sc, addr, iwn_prph_read(sc, addr) | mask);
1521 static __inline void
1522 iwn_prph_clrbits(struct iwn_softc *sc, uint32_t addr, uint32_t mask)
1524 iwn_prph_write(sc, addr, iwn_prph_read(sc, addr) & ~mask);
1527 static __inline void
1528 iwn_prph_write_region_4(struct iwn_softc *sc, uint32_t addr,
1529 const uint32_t *data, int count)
1531 for (; count > 0; count--, data++, addr += 4)
1532 iwn_prph_write(sc, addr, *data);
1535 static __inline uint32_t
1536 iwn_mem_read(struct iwn_softc *sc, uint32_t addr)
1538 IWN_WRITE(sc, IWN_MEM_RADDR, addr);
1539 IWN_BARRIER_READ_WRITE(sc);
1540 return IWN_READ(sc, IWN_MEM_RDATA);
1543 static __inline void
1544 iwn_mem_write(struct iwn_softc *sc, uint32_t addr, uint32_t data)
1546 IWN_WRITE(sc, IWN_MEM_WADDR, addr);
1547 IWN_BARRIER_WRITE(sc);
1548 IWN_WRITE(sc, IWN_MEM_WDATA, data);
1551 static __inline void
1552 iwn_mem_write_2(struct iwn_softc *sc, uint32_t addr, uint16_t data)
1556 tmp = iwn_mem_read(sc, addr & ~3);
1558 tmp = (tmp & 0x0000ffff) | data << 16;
1560 tmp = (tmp & 0xffff0000) | data;
1561 iwn_mem_write(sc, addr & ~3, tmp);
1564 static __inline void
1565 iwn_mem_read_region_4(struct iwn_softc *sc, uint32_t addr, uint32_t *data,
1568 for (; count > 0; count--, addr += 4)
1569 *data++ = iwn_mem_read(sc, addr);
1572 static __inline void
1573 iwn_mem_set_region_4(struct iwn_softc *sc, uint32_t addr, uint32_t val,
1576 for (; count > 0; count--, addr += 4)
1577 iwn_mem_write(sc, addr, val);
1581 iwn_eeprom_lock(struct iwn_softc *sc)
1585 for (i = 0; i < 100; i++) {
1586 /* Request exclusive access to EEPROM. */
1587 IWN_SETBITS(sc, IWN_HW_IF_CONFIG,
1588 IWN_HW_IF_CONFIG_EEPROM_LOCKED);
1590 /* Spin until we actually get the lock. */
1591 for (ntries = 0; ntries < 100; ntries++) {
1592 if (IWN_READ(sc, IWN_HW_IF_CONFIG) &
1593 IWN_HW_IF_CONFIG_EEPROM_LOCKED)
1598 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end timeout\n", __func__);
1602 static __inline void
1603 iwn_eeprom_unlock(struct iwn_softc *sc)
1605 IWN_CLRBITS(sc, IWN_HW_IF_CONFIG, IWN_HW_IF_CONFIG_EEPROM_LOCKED);
1609 * Initialize access by host to One Time Programmable ROM.
1610 * NB: This kind of ROM can be found on 1000 or 6000 Series only.
1613 iwn_init_otprom(struct iwn_softc *sc)
1615 uint16_t prev, base, next;
1618 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
1620 /* Wait for clock stabilization before accessing prph. */
1621 if ((error = iwn_clock_wait(sc)) != 0)
1624 if ((error = iwn_nic_lock(sc)) != 0)
1626 iwn_prph_setbits(sc, IWN_APMG_PS, IWN_APMG_PS_RESET_REQ);
1628 iwn_prph_clrbits(sc, IWN_APMG_PS, IWN_APMG_PS_RESET_REQ);
1631 /* Set auto clock gate disable bit for HW with OTP shadow RAM. */
1632 if (sc->base_params->shadow_ram_support) {
1633 IWN_SETBITS(sc, IWN_DBG_LINK_PWR_MGMT,
1634 IWN_RESET_LINK_PWR_MGMT_DIS);
1636 IWN_CLRBITS(sc, IWN_EEPROM_GP, IWN_EEPROM_GP_IF_OWNER);
1637 /* Clear ECC status. */
1638 IWN_SETBITS(sc, IWN_OTP_GP,
1639 IWN_OTP_GP_ECC_CORR_STTS | IWN_OTP_GP_ECC_UNCORR_STTS);
1642 * Find the block before last block (contains the EEPROM image)
1643 * for HW without OTP shadow RAM.
1645 if (! sc->base_params->shadow_ram_support) {
1646 /* Switch to absolute addressing mode. */
1647 IWN_CLRBITS(sc, IWN_OTP_GP, IWN_OTP_GP_RELATIVE_ACCESS);
1649 for (count = 0; count < sc->base_params->max_ll_items;
1651 error = iwn_read_prom_data(sc, base, &next, 2);
1654 if (next == 0) /* End of linked-list. */
1657 base = le16toh(next);
1659 if (count == 0 || count == sc->base_params->max_ll_items)
1661 /* Skip "next" word. */
1662 sc->prom_base = prev + 1;
1665 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
1671 iwn_read_prom_data(struct iwn_softc *sc, uint32_t addr, void *data, int count)
1673 uint8_t *out = data;
1677 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
1679 addr += sc->prom_base;
1680 for (; count > 0; count -= 2, addr++) {
1681 IWN_WRITE(sc, IWN_EEPROM, addr << 2);
1682 for (ntries = 0; ntries < 10; ntries++) {
1683 val = IWN_READ(sc, IWN_EEPROM);
1684 if (val & IWN_EEPROM_READ_VALID)
1689 device_printf(sc->sc_dev,
1690 "timeout reading ROM at 0x%x\n", addr);
1693 if (sc->sc_flags & IWN_FLAG_HAS_OTPROM) {
1694 /* OTPROM, check for ECC errors. */
1695 tmp = IWN_READ(sc, IWN_OTP_GP);
1696 if (tmp & IWN_OTP_GP_ECC_UNCORR_STTS) {
1697 device_printf(sc->sc_dev,
1698 "OTPROM ECC error at 0x%x\n", addr);
1701 if (tmp & IWN_OTP_GP_ECC_CORR_STTS) {
1702 /* Correctable ECC error, clear bit. */
1703 IWN_SETBITS(sc, IWN_OTP_GP,
1704 IWN_OTP_GP_ECC_CORR_STTS);
1712 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
1718 iwn_dma_map_addr(void *arg, bus_dma_segment_t *segs, int nsegs, int error)
1722 KASSERT(nsegs == 1, ("too many DMA segments, %d should be 1", nsegs));
1723 *(bus_addr_t *)arg = segs[0].ds_addr;
1727 iwn_dma_contig_alloc(struct iwn_softc *sc, struct iwn_dma_info *dma,
1728 void **kvap, bus_size_t size, bus_size_t alignment)
1735 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), alignment,
1736 0, BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, size,
1737 1, size, 0, NULL, NULL, &dma->tag);
1741 error = bus_dmamem_alloc(dma->tag, (void **)&dma->vaddr,
1742 BUS_DMA_NOWAIT | BUS_DMA_ZERO | BUS_DMA_COHERENT, &dma->map);
1746 error = bus_dmamap_load(dma->tag, dma->map, dma->vaddr, size,
1747 iwn_dma_map_addr, &dma->paddr, BUS_DMA_NOWAIT);
1751 bus_dmamap_sync(dma->tag, dma->map, BUS_DMASYNC_PREWRITE);
1758 fail: iwn_dma_contig_free(dma);
1763 iwn_dma_contig_free(struct iwn_dma_info *dma)
1765 if (dma->vaddr != NULL) {
1766 bus_dmamap_sync(dma->tag, dma->map,
1767 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
1768 bus_dmamap_unload(dma->tag, dma->map);
1769 bus_dmamem_free(dma->tag, dma->vaddr, dma->map);
1772 if (dma->tag != NULL) {
1773 bus_dma_tag_destroy(dma->tag);
1779 iwn_alloc_sched(struct iwn_softc *sc)
1781 /* TX scheduler rings must be aligned on a 1KB boundary. */
1782 return iwn_dma_contig_alloc(sc, &sc->sched_dma, (void **)&sc->sched,
1787 iwn_free_sched(struct iwn_softc *sc)
1789 iwn_dma_contig_free(&sc->sched_dma);
1793 iwn_alloc_kw(struct iwn_softc *sc)
1795 /* "Keep Warm" page must be aligned on a 4KB boundary. */
1796 return iwn_dma_contig_alloc(sc, &sc->kw_dma, NULL, 4096, 4096);
1800 iwn_free_kw(struct iwn_softc *sc)
1802 iwn_dma_contig_free(&sc->kw_dma);
1806 iwn_alloc_ict(struct iwn_softc *sc)
1808 /* ICT table must be aligned on a 4KB boundary. */
1809 return iwn_dma_contig_alloc(sc, &sc->ict_dma, (void **)&sc->ict,
1810 IWN_ICT_SIZE, 4096);
1814 iwn_free_ict(struct iwn_softc *sc)
1816 iwn_dma_contig_free(&sc->ict_dma);
1820 iwn_alloc_fwmem(struct iwn_softc *sc)
1822 /* Must be aligned on a 16-byte boundary. */
1823 return iwn_dma_contig_alloc(sc, &sc->fw_dma, NULL, sc->fwsz, 16);
1827 iwn_free_fwmem(struct iwn_softc *sc)
1829 iwn_dma_contig_free(&sc->fw_dma);
1833 iwn_alloc_rx_ring(struct iwn_softc *sc, struct iwn_rx_ring *ring)
1840 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
1842 /* Allocate RX descriptors (256-byte aligned). */
1843 size = IWN_RX_RING_COUNT * sizeof (uint32_t);
1844 error = iwn_dma_contig_alloc(sc, &ring->desc_dma, (void **)&ring->desc,
1847 device_printf(sc->sc_dev,
1848 "%s: could not allocate RX ring DMA memory, error %d\n",
1853 /* Allocate RX status area (16-byte aligned). */
1854 error = iwn_dma_contig_alloc(sc, &ring->stat_dma, (void **)&ring->stat,
1855 sizeof (struct iwn_rx_status), 16);
1857 device_printf(sc->sc_dev,
1858 "%s: could not allocate RX status DMA memory, error %d\n",
1863 /* Create RX buffer DMA tag. */
1864 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 1, 0,
1865 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL,
1866 IWN_RBUF_SIZE, 1, IWN_RBUF_SIZE, 0, NULL, NULL, &ring->data_dmat);
1868 device_printf(sc->sc_dev,
1869 "%s: could not create RX buf DMA tag, error %d\n",
1875 * Allocate and map RX buffers.
1877 for (i = 0; i < IWN_RX_RING_COUNT; i++) {
1878 struct iwn_rx_data *data = &ring->data[i];
1881 error = bus_dmamap_create(ring->data_dmat, 0, &data->map);
1883 device_printf(sc->sc_dev,
1884 "%s: could not create RX buf DMA map, error %d\n",
1889 data->m = m_getjcl(M_NOWAIT, MT_DATA, M_PKTHDR,
1891 if (data->m == NULL) {
1892 device_printf(sc->sc_dev,
1893 "%s: could not allocate RX mbuf\n", __func__);
1898 error = bus_dmamap_load(ring->data_dmat, data->map,
1899 mtod(data->m, void *), IWN_RBUF_SIZE, iwn_dma_map_addr,
1900 &paddr, BUS_DMA_NOWAIT);
1901 if (error != 0 && error != EFBIG) {
1902 device_printf(sc->sc_dev,
1903 "%s: can't map mbuf, error %d\n", __func__,
1908 bus_dmamap_sync(ring->data_dmat, data->map,
1909 BUS_DMASYNC_PREREAD);
1911 /* Set physical address of RX buffer (256-byte aligned). */
1912 ring->desc[i] = htole32(paddr >> 8);
1915 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
1916 BUS_DMASYNC_PREWRITE);
1918 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
1922 fail: iwn_free_rx_ring(sc, ring);
1924 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end in error\n",__func__);
1930 iwn_reset_rx_ring(struct iwn_softc *sc, struct iwn_rx_ring *ring)
1934 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
1936 if (iwn_nic_lock(sc) == 0) {
1937 IWN_WRITE(sc, IWN_FH_RX_CONFIG, 0);
1938 for (ntries = 0; ntries < 1000; ntries++) {
1939 if (IWN_READ(sc, IWN_FH_RX_STATUS) &
1940 IWN_FH_RX_STATUS_IDLE)
1947 sc->last_rx_valid = 0;
1951 iwn_free_rx_ring(struct iwn_softc *sc, struct iwn_rx_ring *ring)
1955 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s \n", __func__);
1957 iwn_dma_contig_free(&ring->desc_dma);
1958 iwn_dma_contig_free(&ring->stat_dma);
1960 for (i = 0; i < IWN_RX_RING_COUNT; i++) {
1961 struct iwn_rx_data *data = &ring->data[i];
1963 if (data->m != NULL) {
1964 bus_dmamap_sync(ring->data_dmat, data->map,
1965 BUS_DMASYNC_POSTREAD);
1966 bus_dmamap_unload(ring->data_dmat, data->map);
1970 if (data->map != NULL)
1971 bus_dmamap_destroy(ring->data_dmat, data->map);
1973 if (ring->data_dmat != NULL) {
1974 bus_dma_tag_destroy(ring->data_dmat);
1975 ring->data_dmat = NULL;
1980 iwn_alloc_tx_ring(struct iwn_softc *sc, struct iwn_tx_ring *ring, int qid)
1990 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
1992 /* Allocate TX descriptors (256-byte aligned). */
1993 size = IWN_TX_RING_COUNT * sizeof (struct iwn_tx_desc);
1994 error = iwn_dma_contig_alloc(sc, &ring->desc_dma, (void **)&ring->desc,
1997 device_printf(sc->sc_dev,
1998 "%s: could not allocate TX ring DMA memory, error %d\n",
2003 size = IWN_TX_RING_COUNT * sizeof (struct iwn_tx_cmd);
2004 error = iwn_dma_contig_alloc(sc, &ring->cmd_dma, (void **)&ring->cmd,
2007 device_printf(sc->sc_dev,
2008 "%s: could not allocate TX cmd DMA memory, error %d\n",
2013 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 1, 0,
2014 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES,
2015 IWN_MAX_SCATTER - 1, MCLBYTES, 0, NULL, NULL, &ring->data_dmat);
2017 device_printf(sc->sc_dev,
2018 "%s: could not create TX buf DMA tag, error %d\n",
2023 paddr = ring->cmd_dma.paddr;
2024 for (i = 0; i < IWN_TX_RING_COUNT; i++) {
2025 struct iwn_tx_data *data = &ring->data[i];
2027 data->cmd_paddr = paddr;
2028 data->scratch_paddr = paddr + 12;
2029 paddr += sizeof (struct iwn_tx_cmd);
2031 error = bus_dmamap_create(ring->data_dmat, 0, &data->map);
2033 device_printf(sc->sc_dev,
2034 "%s: could not create TX buf DMA map, error %d\n",
2040 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
2044 fail: iwn_free_tx_ring(sc, ring);
2045 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end in error\n", __func__);
2050 iwn_reset_tx_ring(struct iwn_softc *sc, struct iwn_tx_ring *ring)
2054 DPRINTF(sc, IWN_DEBUG_TRACE, "->doing %s \n", __func__);
2056 for (i = 0; i < IWN_TX_RING_COUNT; i++) {
2057 struct iwn_tx_data *data = &ring->data[i];
2059 if (data->m != NULL) {
2060 bus_dmamap_sync(ring->data_dmat, data->map,
2061 BUS_DMASYNC_POSTWRITE);
2062 bus_dmamap_unload(ring->data_dmat, data->map);
2066 if (data->ni != NULL) {
2067 ieee80211_free_node(data->ni);
2071 /* Clear TX descriptors. */
2072 memset(ring->desc, 0, ring->desc_dma.size);
2073 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
2074 BUS_DMASYNC_PREWRITE);
2075 sc->qfullmsk &= ~(1 << ring->qid);
2081 iwn_free_tx_ring(struct iwn_softc *sc, struct iwn_tx_ring *ring)
2085 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s \n", __func__);
2087 iwn_dma_contig_free(&ring->desc_dma);
2088 iwn_dma_contig_free(&ring->cmd_dma);
2090 for (i = 0; i < IWN_TX_RING_COUNT; i++) {
2091 struct iwn_tx_data *data = &ring->data[i];
2093 if (data->m != NULL) {
2094 bus_dmamap_sync(ring->data_dmat, data->map,
2095 BUS_DMASYNC_POSTWRITE);
2096 bus_dmamap_unload(ring->data_dmat, data->map);
2099 if (data->map != NULL)
2100 bus_dmamap_destroy(ring->data_dmat, data->map);
2102 if (ring->data_dmat != NULL) {
2103 bus_dma_tag_destroy(ring->data_dmat);
2104 ring->data_dmat = NULL;
2109 iwn5000_ict_reset(struct iwn_softc *sc)
2111 /* Disable interrupts. */
2112 IWN_WRITE(sc, IWN_INT_MASK, 0);
2114 /* Reset ICT table. */
2115 memset(sc->ict, 0, IWN_ICT_SIZE);
2118 bus_dmamap_sync(sc->ict_dma.tag, sc->ict_dma.map,
2119 BUS_DMASYNC_PREWRITE);
2121 /* Set physical address of ICT table (4KB aligned). */
2122 DPRINTF(sc, IWN_DEBUG_RESET, "%s: enabling ICT\n", __func__);
2123 IWN_WRITE(sc, IWN_DRAM_INT_TBL, IWN_DRAM_INT_TBL_ENABLE |
2124 IWN_DRAM_INT_TBL_WRAP_CHECK | sc->ict_dma.paddr >> 12);
2126 /* Enable periodic RX interrupt. */
2127 sc->int_mask |= IWN_INT_RX_PERIODIC;
2128 /* Switch to ICT interrupt mode in driver. */
2129 sc->sc_flags |= IWN_FLAG_USE_ICT;
2131 /* Re-enable interrupts. */
2132 IWN_WRITE(sc, IWN_INT, 0xffffffff);
2133 IWN_WRITE(sc, IWN_INT_MASK, sc->int_mask);
2137 iwn_read_eeprom(struct iwn_softc *sc, uint8_t macaddr[IEEE80211_ADDR_LEN])
2139 struct iwn_ops *ops = &sc->ops;
2143 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
2145 /* Check whether adapter has an EEPROM or an OTPROM. */
2146 if (sc->hw_type >= IWN_HW_REV_TYPE_1000 &&
2147 (IWN_READ(sc, IWN_OTP_GP) & IWN_OTP_GP_DEV_SEL_OTP))
2148 sc->sc_flags |= IWN_FLAG_HAS_OTPROM;
2149 DPRINTF(sc, IWN_DEBUG_RESET, "%s found\n",
2150 (sc->sc_flags & IWN_FLAG_HAS_OTPROM) ? "OTPROM" : "EEPROM");
2152 /* Adapter has to be powered on for EEPROM access to work. */
2153 if ((error = iwn_apm_init(sc)) != 0) {
2154 device_printf(sc->sc_dev,
2155 "%s: could not power ON adapter, error %d\n", __func__,
2160 if ((IWN_READ(sc, IWN_EEPROM_GP) & 0x7) == 0) {
2161 device_printf(sc->sc_dev, "%s: bad ROM signature\n", __func__);
2164 if ((error = iwn_eeprom_lock(sc)) != 0) {
2165 device_printf(sc->sc_dev, "%s: could not lock ROM, error %d\n",
2169 if (sc->sc_flags & IWN_FLAG_HAS_OTPROM) {
2170 if ((error = iwn_init_otprom(sc)) != 0) {
2171 device_printf(sc->sc_dev,
2172 "%s: could not initialize OTPROM, error %d\n",
2178 iwn_read_prom_data(sc, IWN_EEPROM_SKU_CAP, &val, 2);
2179 DPRINTF(sc, IWN_DEBUG_RESET, "SKU capabilities=0x%04x\n", le16toh(val));
2180 /* Check if HT support is bonded out. */
2181 if (val & htole16(IWN_EEPROM_SKU_CAP_11N))
2182 sc->sc_flags |= IWN_FLAG_HAS_11N;
2184 iwn_read_prom_data(sc, IWN_EEPROM_RFCFG, &val, 2);
2185 sc->rfcfg = le16toh(val);
2186 DPRINTF(sc, IWN_DEBUG_RESET, "radio config=0x%04x\n", sc->rfcfg);
2187 /* Read Tx/Rx chains from ROM unless it's known to be broken. */
2188 if (sc->txchainmask == 0)
2189 sc->txchainmask = IWN_RFCFG_TXANTMSK(sc->rfcfg);
2190 if (sc->rxchainmask == 0)
2191 sc->rxchainmask = IWN_RFCFG_RXANTMSK(sc->rfcfg);
2193 /* Read MAC address. */
2194 iwn_read_prom_data(sc, IWN_EEPROM_MAC, macaddr, 6);
2196 /* Read adapter-specific information from EEPROM. */
2197 ops->read_eeprom(sc);
2199 iwn_apm_stop(sc); /* Power OFF adapter. */
2201 iwn_eeprom_unlock(sc);
2203 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
2209 iwn4965_read_eeprom(struct iwn_softc *sc)
2215 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
2217 /* Read regulatory domain (4 ASCII characters). */
2218 iwn_read_prom_data(sc, IWN4965_EEPROM_DOMAIN, sc->eeprom_domain, 4);
2220 /* Read the list of authorized channels (20MHz & 40MHz). */
2221 for (i = 0; i < IWN_NBANDS - 1; i++) {
2222 addr = iwn4965_regulatory_bands[i];
2223 iwn_read_eeprom_channels(sc, i, addr);
2226 /* Read maximum allowed TX power for 2GHz and 5GHz bands. */
2227 iwn_read_prom_data(sc, IWN4965_EEPROM_MAXPOW, &val, 2);
2228 sc->maxpwr2GHz = val & 0xff;
2229 sc->maxpwr5GHz = val >> 8;
2230 /* Check that EEPROM values are within valid range. */
2231 if (sc->maxpwr5GHz < 20 || sc->maxpwr5GHz > 50)
2232 sc->maxpwr5GHz = 38;
2233 if (sc->maxpwr2GHz < 20 || sc->maxpwr2GHz > 50)
2234 sc->maxpwr2GHz = 38;
2235 DPRINTF(sc, IWN_DEBUG_RESET, "maxpwr 2GHz=%d 5GHz=%d\n",
2236 sc->maxpwr2GHz, sc->maxpwr5GHz);
2238 /* Read samples for each TX power group. */
2239 iwn_read_prom_data(sc, IWN4965_EEPROM_BANDS, sc->bands,
2242 /* Read voltage at which samples were taken. */
2243 iwn_read_prom_data(sc, IWN4965_EEPROM_VOLTAGE, &val, 2);
2244 sc->eeprom_voltage = (int16_t)le16toh(val);
2245 DPRINTF(sc, IWN_DEBUG_RESET, "voltage=%d (in 0.3V)\n",
2246 sc->eeprom_voltage);
2249 /* Print samples. */
2250 if (sc->sc_debug & IWN_DEBUG_ANY) {
2251 for (i = 0; i < IWN_NBANDS - 1; i++)
2252 iwn4965_print_power_group(sc, i);
2256 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
2261 iwn4965_print_power_group(struct iwn_softc *sc, int i)
2263 struct iwn4965_eeprom_band *band = &sc->bands[i];
2264 struct iwn4965_eeprom_chan_samples *chans = band->chans;
2267 printf("===band %d===\n", i);
2268 printf("chan lo=%d, chan hi=%d\n", band->lo, band->hi);
2269 printf("chan1 num=%d\n", chans[0].num);
2270 for (c = 0; c < 2; c++) {
2271 for (j = 0; j < IWN_NSAMPLES; j++) {
2272 printf("chain %d, sample %d: temp=%d gain=%d "
2273 "power=%d pa_det=%d\n", c, j,
2274 chans[0].samples[c][j].temp,
2275 chans[0].samples[c][j].gain,
2276 chans[0].samples[c][j].power,
2277 chans[0].samples[c][j].pa_det);
2280 printf("chan2 num=%d\n", chans[1].num);
2281 for (c = 0; c < 2; c++) {
2282 for (j = 0; j < IWN_NSAMPLES; j++) {
2283 printf("chain %d, sample %d: temp=%d gain=%d "
2284 "power=%d pa_det=%d\n", c, j,
2285 chans[1].samples[c][j].temp,
2286 chans[1].samples[c][j].gain,
2287 chans[1].samples[c][j].power,
2288 chans[1].samples[c][j].pa_det);
2295 iwn5000_read_eeprom(struct iwn_softc *sc)
2297 struct iwn5000_eeprom_calib_hdr hdr;
2299 uint32_t base, addr;
2303 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
2305 /* Read regulatory domain (4 ASCII characters). */
2306 iwn_read_prom_data(sc, IWN5000_EEPROM_REG, &val, 2);
2307 base = le16toh(val);
2308 iwn_read_prom_data(sc, base + IWN5000_EEPROM_DOMAIN,
2309 sc->eeprom_domain, 4);
2311 /* Read the list of authorized channels (20MHz & 40MHz). */
2312 for (i = 0; i < IWN_NBANDS - 1; i++) {
2313 addr = base + sc->base_params->regulatory_bands[i];
2314 iwn_read_eeprom_channels(sc, i, addr);
2317 /* Read enhanced TX power information for 6000 Series. */
2318 if (sc->base_params->enhanced_TX_power)
2319 iwn_read_eeprom_enhinfo(sc);
2321 iwn_read_prom_data(sc, IWN5000_EEPROM_CAL, &val, 2);
2322 base = le16toh(val);
2323 iwn_read_prom_data(sc, base, &hdr, sizeof hdr);
2324 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
2325 "%s: calib version=%u pa type=%u voltage=%u\n", __func__,
2326 hdr.version, hdr.pa_type, le16toh(hdr.volt));
2327 sc->calib_ver = hdr.version;
2329 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSETv2) {
2330 sc->eeprom_voltage = le16toh(hdr.volt);
2331 iwn_read_prom_data(sc, base + IWN5000_EEPROM_TEMP, &val, 2);
2332 sc->eeprom_temp_high=le16toh(val);
2333 iwn_read_prom_data(sc, base + IWN5000_EEPROM_VOLT, &val, 2);
2334 sc->eeprom_temp = le16toh(val);
2337 if (sc->hw_type == IWN_HW_REV_TYPE_5150) {
2338 /* Compute temperature offset. */
2339 iwn_read_prom_data(sc, base + IWN5000_EEPROM_TEMP, &val, 2);
2340 sc->eeprom_temp = le16toh(val);
2341 iwn_read_prom_data(sc, base + IWN5000_EEPROM_VOLT, &val, 2);
2342 volt = le16toh(val);
2343 sc->temp_off = sc->eeprom_temp - (volt / -5);
2344 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "temp=%d volt=%d offset=%dK\n",
2345 sc->eeprom_temp, volt, sc->temp_off);
2347 /* Read crystal calibration. */
2348 iwn_read_prom_data(sc, base + IWN5000_EEPROM_CRYSTAL,
2349 &sc->eeprom_crystal, sizeof (uint32_t));
2350 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "crystal calibration 0x%08x\n",
2351 le32toh(sc->eeprom_crystal));
2354 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
2359 * Translate EEPROM flags to net80211.
2362 iwn_eeprom_channel_flags(struct iwn_eeprom_chan *channel)
2367 if ((channel->flags & IWN_EEPROM_CHAN_ACTIVE) == 0)
2368 nflags |= IEEE80211_CHAN_PASSIVE;
2369 if ((channel->flags & IWN_EEPROM_CHAN_IBSS) == 0)
2370 nflags |= IEEE80211_CHAN_NOADHOC;
2371 if (channel->flags & IWN_EEPROM_CHAN_RADAR) {
2372 nflags |= IEEE80211_CHAN_DFS;
2373 /* XXX apparently IBSS may still be marked */
2374 nflags |= IEEE80211_CHAN_NOADHOC;
2381 iwn_read_eeprom_band(struct iwn_softc *sc, int n, int maxchans, int *nchans,
2382 struct ieee80211_channel chans[])
2384 struct iwn_eeprom_chan *channels = sc->eeprom_channels[n];
2385 const struct iwn_chan_band *band = &iwn_bands[n];
2386 uint8_t bands[IEEE80211_MODE_BYTES];
2388 int i, error, nflags;
2390 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
2392 memset(bands, 0, sizeof(bands));
2394 setbit(bands, IEEE80211_MODE_11B);
2395 setbit(bands, IEEE80211_MODE_11G);
2396 if (sc->sc_flags & IWN_FLAG_HAS_11N)
2397 setbit(bands, IEEE80211_MODE_11NG);
2399 setbit(bands, IEEE80211_MODE_11A);
2400 if (sc->sc_flags & IWN_FLAG_HAS_11N)
2401 setbit(bands, IEEE80211_MODE_11NA);
2404 for (i = 0; i < band->nchan; i++) {
2405 if (!(channels[i].flags & IWN_EEPROM_CHAN_VALID)) {
2406 DPRINTF(sc, IWN_DEBUG_RESET,
2407 "skip chan %d flags 0x%x maxpwr %d\n",
2408 band->chan[i], channels[i].flags,
2409 channels[i].maxpwr);
2413 chan = band->chan[i];
2414 nflags = iwn_eeprom_channel_flags(&channels[i]);
2415 error = ieee80211_add_channel(chans, maxchans, nchans,
2416 chan, 0, channels[i].maxpwr, nflags, bands);
2420 /* Save maximum allowed TX power for this channel. */
2422 sc->maxpwr[chan] = channels[i].maxpwr;
2424 DPRINTF(sc, IWN_DEBUG_RESET,
2425 "add chan %d flags 0x%x maxpwr %d\n", chan,
2426 channels[i].flags, channels[i].maxpwr);
2429 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
2434 iwn_read_eeprom_ht40(struct iwn_softc *sc, int n, int maxchans, int *nchans,
2435 struct ieee80211_channel chans[])
2437 struct iwn_eeprom_chan *channels = sc->eeprom_channels[n];
2438 const struct iwn_chan_band *band = &iwn_bands[n];
2440 int i, error, nflags;
2442 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s start\n", __func__);
2444 if (!(sc->sc_flags & IWN_FLAG_HAS_11N)) {
2445 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end no 11n\n", __func__);
2449 for (i = 0; i < band->nchan; i++) {
2450 if (!(channels[i].flags & IWN_EEPROM_CHAN_VALID)) {
2451 DPRINTF(sc, IWN_DEBUG_RESET,
2452 "skip chan %d flags 0x%x maxpwr %d\n",
2453 band->chan[i], channels[i].flags,
2454 channels[i].maxpwr);
2458 chan = band->chan[i];
2459 nflags = iwn_eeprom_channel_flags(&channels[i]);
2460 nflags |= (n == 5 ? IEEE80211_CHAN_G : IEEE80211_CHAN_A);
2461 error = ieee80211_add_channel_ht40(chans, maxchans, nchans,
2462 chan, channels[i].maxpwr, nflags);
2465 device_printf(sc->sc_dev,
2466 "%s: no entry for channel %d\n", __func__, chan);
2469 DPRINTF(sc, IWN_DEBUG_RESET,
2470 "%s: skip chan %d, extension channel not found\n",
2474 device_printf(sc->sc_dev,
2475 "%s: channel table is full!\n", __func__);
2478 DPRINTF(sc, IWN_DEBUG_RESET,
2479 "add ht40 chan %d flags 0x%x maxpwr %d\n",
2480 chan, channels[i].flags, channels[i].maxpwr);
2487 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
2492 iwn_read_eeprom_channels(struct iwn_softc *sc, int n, uint32_t addr)
2494 struct ieee80211com *ic = &sc->sc_ic;
2496 iwn_read_prom_data(sc, addr, &sc->eeprom_channels[n],
2497 iwn_bands[n].nchan * sizeof (struct iwn_eeprom_chan));
2500 iwn_read_eeprom_band(sc, n, IEEE80211_CHAN_MAX, &ic->ic_nchans,
2503 iwn_read_eeprom_ht40(sc, n, IEEE80211_CHAN_MAX, &ic->ic_nchans,
2506 ieee80211_sort_channels(ic->ic_channels, ic->ic_nchans);
2509 static struct iwn_eeprom_chan *
2510 iwn_find_eeprom_channel(struct iwn_softc *sc, struct ieee80211_channel *c)
2512 int band, chan, i, j;
2514 if (IEEE80211_IS_CHAN_HT40(c)) {
2515 band = IEEE80211_IS_CHAN_5GHZ(c) ? 6 : 5;
2516 if (IEEE80211_IS_CHAN_HT40D(c))
2517 chan = c->ic_extieee;
2520 for (i = 0; i < iwn_bands[band].nchan; i++) {
2521 if (iwn_bands[band].chan[i] == chan)
2522 return &sc->eeprom_channels[band][i];
2525 for (j = 0; j < 5; j++) {
2526 for (i = 0; i < iwn_bands[j].nchan; i++) {
2527 if (iwn_bands[j].chan[i] == c->ic_ieee &&
2528 ((j == 0) ^ IEEE80211_IS_CHAN_A(c)) == 1)
2529 return &sc->eeprom_channels[j][i];
2537 iwn_getradiocaps(struct ieee80211com *ic,
2538 int maxchans, int *nchans, struct ieee80211_channel chans[])
2540 struct iwn_softc *sc = ic->ic_softc;
2543 /* Parse the list of authorized channels. */
2544 for (i = 0; i < 5 && *nchans < maxchans; i++)
2545 iwn_read_eeprom_band(sc, i, maxchans, nchans, chans);
2546 for (i = 5; i < IWN_NBANDS - 1 && *nchans < maxchans; i++)
2547 iwn_read_eeprom_ht40(sc, i, maxchans, nchans, chans);
2551 * Enforce flags read from EEPROM.
2554 iwn_setregdomain(struct ieee80211com *ic, struct ieee80211_regdomain *rd,
2555 int nchan, struct ieee80211_channel chans[])
2557 struct iwn_softc *sc = ic->ic_softc;
2560 for (i = 0; i < nchan; i++) {
2561 struct ieee80211_channel *c = &chans[i];
2562 struct iwn_eeprom_chan *channel;
2564 channel = iwn_find_eeprom_channel(sc, c);
2565 if (channel == NULL) {
2566 ic_printf(ic, "%s: invalid channel %u freq %u/0x%x\n",
2567 __func__, c->ic_ieee, c->ic_freq, c->ic_flags);
2570 c->ic_flags |= iwn_eeprom_channel_flags(channel);
2577 iwn_read_eeprom_enhinfo(struct iwn_softc *sc)
2579 struct iwn_eeprom_enhinfo enhinfo[35];
2580 struct ieee80211com *ic = &sc->sc_ic;
2581 struct ieee80211_channel *c;
2587 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
2589 iwn_read_prom_data(sc, IWN5000_EEPROM_REG, &val, 2);
2590 base = le16toh(val);
2591 iwn_read_prom_data(sc, base + IWN6000_EEPROM_ENHINFO,
2592 enhinfo, sizeof enhinfo);
2594 for (i = 0; i < nitems(enhinfo); i++) {
2595 flags = enhinfo[i].flags;
2596 if (!(flags & IWN_ENHINFO_VALID))
2597 continue; /* Skip invalid entries. */
2600 if (sc->txchainmask & IWN_ANT_A)
2601 maxpwr = MAX(maxpwr, enhinfo[i].chain[0]);
2602 if (sc->txchainmask & IWN_ANT_B)
2603 maxpwr = MAX(maxpwr, enhinfo[i].chain[1]);
2604 if (sc->txchainmask & IWN_ANT_C)
2605 maxpwr = MAX(maxpwr, enhinfo[i].chain[2]);
2606 if (sc->ntxchains == 2)
2607 maxpwr = MAX(maxpwr, enhinfo[i].mimo2);
2608 else if (sc->ntxchains == 3)
2609 maxpwr = MAX(maxpwr, enhinfo[i].mimo3);
2611 for (j = 0; j < ic->ic_nchans; j++) {
2612 c = &ic->ic_channels[j];
2613 if ((flags & IWN_ENHINFO_5GHZ)) {
2614 if (!IEEE80211_IS_CHAN_A(c))
2616 } else if ((flags & IWN_ENHINFO_OFDM)) {
2617 if (!IEEE80211_IS_CHAN_G(c))
2619 } else if (!IEEE80211_IS_CHAN_B(c))
2621 if ((flags & IWN_ENHINFO_HT40)) {
2622 if (!IEEE80211_IS_CHAN_HT40(c))
2625 if (IEEE80211_IS_CHAN_HT40(c))
2628 if (enhinfo[i].chan != 0 &&
2629 enhinfo[i].chan != c->ic_ieee)
2632 DPRINTF(sc, IWN_DEBUG_RESET,
2633 "channel %d(%x), maxpwr %d\n", c->ic_ieee,
2634 c->ic_flags, maxpwr / 2);
2635 c->ic_maxregpower = maxpwr / 2;
2636 c->ic_maxpower = maxpwr;
2640 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
2644 static struct ieee80211_node *
2645 iwn_node_alloc(struct ieee80211vap *vap, const uint8_t mac[IEEE80211_ADDR_LEN])
2647 return malloc(sizeof (struct iwn_node), M_80211_NODE,M_NOWAIT | M_ZERO);
2653 switch (rate & 0xff) {
2654 case 12: return 0xd;
2655 case 18: return 0xf;
2656 case 24: return 0x5;
2657 case 36: return 0x7;
2658 case 48: return 0x9;
2659 case 72: return 0xb;
2660 case 96: return 0x1;
2661 case 108: return 0x3;
2665 case 22: return 110;
2671 iwn_get_1stream_tx_antmask(struct iwn_softc *sc)
2674 return IWN_LSB(sc->txchainmask);
2678 iwn_get_2stream_tx_antmask(struct iwn_softc *sc)
2683 * The '2 stream' setup is a bit .. odd.
2685 * For NICs that support only 1 antenna, default to IWN_ANT_AB or
2686 * the firmware panics (eg Intel 5100.)
2688 * For NICs that support two antennas, we use ANT_AB.
2690 * For NICs that support three antennas, we use the two that
2691 * wasn't the default one.
2693 * XXX TODO: if bluetooth (full concurrent) is enabled, restrict
2694 * this to only one antenna.
2697 /* Default - transmit on the other antennas */
2698 tx = (sc->txchainmask & ~IWN_LSB(sc->txchainmask));
2700 /* Now, if it's zero, set it to IWN_ANT_AB, so to not panic firmware */
2705 * If the NIC is a two-stream TX NIC, configure the TX mask to
2706 * the default chainmask
2708 else if (sc->ntxchains == 2)
2709 tx = sc->txchainmask;
2717 * Calculate the required PLCP value from the given rate,
2718 * to the given node.
2720 * This will take the node configuration (eg 11n, rate table
2721 * setup, etc) into consideration.
2724 iwn_rate_to_plcp(struct iwn_softc *sc, struct ieee80211_node *ni,
2727 struct ieee80211com *ic = ni->ni_ic;
2732 * If it's an MCS rate, let's set the plcp correctly
2733 * and set the relevant flags based on the node config.
2735 if (rate & IEEE80211_RATE_MCS) {
2737 * Set the initial PLCP value to be between 0->31 for
2738 * MCS 0 -> MCS 31, then set the "I'm an MCS rate!"
2741 plcp = IEEE80211_RV(rate) | IWN_RFLAG_MCS;
2744 * XXX the following should only occur if both
2745 * the local configuration _and_ the remote node
2746 * advertise these capabilities. Thus this code
2751 * Set the channel width and guard interval.
2753 if (IEEE80211_IS_CHAN_HT40(ni->ni_chan)) {
2754 plcp |= IWN_RFLAG_HT40;
2755 if (ni->ni_htcap & IEEE80211_HTCAP_SHORTGI40)
2756 plcp |= IWN_RFLAG_SGI;
2757 } else if (ni->ni_htcap & IEEE80211_HTCAP_SHORTGI20) {
2758 plcp |= IWN_RFLAG_SGI;
2762 * Ensure the selected rate matches the link quality
2763 * table entries being used.
2766 plcp |= IWN_RFLAG_ANT(sc->txchainmask);
2767 else if (rate > 0x87)
2768 plcp |= IWN_RFLAG_ANT(iwn_get_2stream_tx_antmask(sc));
2770 plcp |= IWN_RFLAG_ANT(iwn_get_1stream_tx_antmask(sc));
2773 * Set the initial PLCP - fine for both
2774 * OFDM and CCK rates.
2776 plcp = rate2plcp(rate);
2778 /* Set CCK flag if it's CCK */
2780 /* XXX It would be nice to have a method
2781 * to map the ridx -> phy table entry
2782 * so we could just query that, rather than
2783 * this hack to check against IWN_RIDX_OFDM6.
2785 ridx = ieee80211_legacy_rate_lookup(ic->ic_rt,
2786 rate & IEEE80211_RATE_VAL);
2787 if (ridx < IWN_RIDX_OFDM6 &&
2788 IEEE80211_IS_CHAN_2GHZ(ni->ni_chan))
2789 plcp |= IWN_RFLAG_CCK;
2791 /* Set antenna configuration */
2792 /* XXX TODO: is this the right antenna to use for legacy? */
2793 plcp |= IWN_RFLAG_ANT(iwn_get_1stream_tx_antmask(sc));
2796 DPRINTF(sc, IWN_DEBUG_TXRATE, "%s: rate=0x%02x, plcp=0x%08x\n",
2801 return (htole32(plcp));
2805 iwn_newassoc(struct ieee80211_node *ni, int isnew)
2807 /* Doesn't do anything at the moment */
2811 iwn_media_change(struct ifnet *ifp)
2815 error = ieee80211_media_change(ifp);
2816 /* NB: only the fixed rate can change and that doesn't need a reset */
2817 return (error == ENETRESET ? 0 : error);
2821 iwn_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg)
2823 struct iwn_vap *ivp = IWN_VAP(vap);
2824 struct ieee80211com *ic = vap->iv_ic;
2825 struct iwn_softc *sc = ic->ic_softc;
2828 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
2830 DPRINTF(sc, IWN_DEBUG_STATE, "%s: %s -> %s\n", __func__,
2831 ieee80211_state_name[vap->iv_state], ieee80211_state_name[nstate]);
2833 IEEE80211_UNLOCK(ic);
2835 callout_stop(&sc->calib_to);
2837 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX];
2840 case IEEE80211_S_ASSOC:
2841 if (vap->iv_state != IEEE80211_S_RUN)
2844 case IEEE80211_S_AUTH:
2845 if (vap->iv_state == IEEE80211_S_AUTH)
2849 * !AUTH -> AUTH transition requires state reset to handle
2850 * reassociations correctly.
2852 sc->rxon->associd = 0;
2853 sc->rxon->filter &= ~htole32(IWN_FILTER_BSS);
2854 sc->calib.state = IWN_CALIB_STATE_INIT;
2856 /* Wait until we hear a beacon before we transmit */
2857 if (IEEE80211_IS_CHAN_PASSIVE(ic->ic_curchan))
2858 sc->sc_beacon_wait = 1;
2860 if ((error = iwn_auth(sc, vap)) != 0) {
2861 device_printf(sc->sc_dev,
2862 "%s: could not move to auth state\n", __func__);
2866 case IEEE80211_S_RUN:
2868 * RUN -> RUN transition; Just restart the timers.
2870 if (vap->iv_state == IEEE80211_S_RUN) {
2875 /* Wait until we hear a beacon before we transmit */
2876 if (IEEE80211_IS_CHAN_PASSIVE(ic->ic_curchan))
2877 sc->sc_beacon_wait = 1;
2880 * !RUN -> RUN requires setting the association id
2881 * which is done with a firmware cmd. We also defer
2882 * starting the timers until that work is done.
2884 if ((error = iwn_run(sc, vap)) != 0) {
2885 device_printf(sc->sc_dev,
2886 "%s: could not move to run state\n", __func__);
2890 case IEEE80211_S_INIT:
2891 sc->calib.state = IWN_CALIB_STATE_INIT;
2893 * Purge the xmit queue so we don't have old frames
2894 * during a new association attempt.
2896 sc->sc_beacon_wait = 0;
2897 iwn_xmit_queue_drain(sc);
2906 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end in error\n", __func__);
2910 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
2912 return ivp->iv_newstate(vap, nstate, arg);
2916 iwn_calib_timeout(void *arg)
2918 struct iwn_softc *sc = arg;
2920 IWN_LOCK_ASSERT(sc);
2922 /* Force automatic TX power calibration every 60 secs. */
2923 if (++sc->calib_cnt >= 120) {
2926 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s\n",
2927 "sending request for statistics");
2928 (void)iwn_cmd(sc, IWN_CMD_GET_STATISTICS, &flags,
2932 callout_reset(&sc->calib_to, msecs_to_ticks(500), iwn_calib_timeout,
2937 * Process an RX_PHY firmware notification. This is usually immediately
2938 * followed by an MPDU_RX_DONE notification.
2941 iwn_rx_phy(struct iwn_softc *sc, struct iwn_rx_desc *desc,
2942 struct iwn_rx_data *data)
2944 struct iwn_rx_stat *stat = (struct iwn_rx_stat *)(desc + 1);
2946 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: received PHY stats\n", __func__);
2947 bus_dmamap_sync(sc->rxq.data_dmat, data->map, BUS_DMASYNC_POSTREAD);
2949 /* Save RX statistics, they will be used on MPDU_RX_DONE. */
2950 memcpy(&sc->last_rx_stat, stat, sizeof (*stat));
2951 sc->last_rx_valid = 1;
2955 * Process an RX_DONE (4965AGN only) or MPDU_RX_DONE firmware notification.
2956 * Each MPDU_RX_DONE notification must be preceded by an RX_PHY one.
2959 iwn_rx_done(struct iwn_softc *sc, struct iwn_rx_desc *desc,
2960 struct iwn_rx_data *data)
2962 struct iwn_ops *ops = &sc->ops;
2963 struct ieee80211com *ic = &sc->sc_ic;
2964 struct iwn_rx_ring *ring = &sc->rxq;
2965 struct ieee80211_frame *wh;
2966 struct ieee80211_node *ni;
2967 struct mbuf *m, *m1;
2968 struct iwn_rx_stat *stat;
2972 int error, len, rssi, nf;
2974 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
2976 if (desc->type == IWN_MPDU_RX_DONE) {
2977 /* Check for prior RX_PHY notification. */
2978 if (!sc->last_rx_valid) {
2979 DPRINTF(sc, IWN_DEBUG_ANY,
2980 "%s: missing RX_PHY\n", __func__);
2983 stat = &sc->last_rx_stat;
2985 stat = (struct iwn_rx_stat *)(desc + 1);
2987 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_POSTREAD);
2989 if (stat->cfg_phy_len > IWN_STAT_MAXLEN) {
2990 device_printf(sc->sc_dev,
2991 "%s: invalid RX statistic header, len %d\n", __func__,
2995 if (desc->type == IWN_MPDU_RX_DONE) {
2996 struct iwn_rx_mpdu *mpdu = (struct iwn_rx_mpdu *)(desc + 1);
2997 head = (caddr_t)(mpdu + 1);
2998 len = le16toh(mpdu->len);
3000 head = (caddr_t)(stat + 1) + stat->cfg_phy_len;
3001 len = le16toh(stat->len);
3004 flags = le32toh(*(uint32_t *)(head + len));
3006 /* Discard frames with a bad FCS early. */
3007 if ((flags & IWN_RX_NOERROR) != IWN_RX_NOERROR) {
3008 DPRINTF(sc, IWN_DEBUG_RECV, "%s: RX flags error %x\n",
3010 counter_u64_add(ic->ic_ierrors, 1);
3013 /* Discard frames that are too short. */
3014 if (len < sizeof (struct ieee80211_frame_ack)) {
3015 DPRINTF(sc, IWN_DEBUG_RECV, "%s: frame too short: %d\n",
3017 counter_u64_add(ic->ic_ierrors, 1);
3021 m1 = m_getjcl(M_NOWAIT, MT_DATA, M_PKTHDR, IWN_RBUF_SIZE);
3023 DPRINTF(sc, IWN_DEBUG_ANY, "%s: no mbuf to restock ring\n",
3025 counter_u64_add(ic->ic_ierrors, 1);
3028 bus_dmamap_unload(ring->data_dmat, data->map);
3030 error = bus_dmamap_load(ring->data_dmat, data->map, mtod(m1, void *),
3031 IWN_RBUF_SIZE, iwn_dma_map_addr, &paddr, BUS_DMA_NOWAIT);
3032 if (error != 0 && error != EFBIG) {
3033 device_printf(sc->sc_dev,
3034 "%s: bus_dmamap_load failed, error %d\n", __func__, error);
3037 /* Try to reload the old mbuf. */
3038 error = bus_dmamap_load(ring->data_dmat, data->map,
3039 mtod(data->m, void *), IWN_RBUF_SIZE, iwn_dma_map_addr,
3040 &paddr, BUS_DMA_NOWAIT);
3041 if (error != 0 && error != EFBIG) {
3042 panic("%s: could not load old RX mbuf", __func__);
3044 bus_dmamap_sync(ring->data_dmat, data->map,
3045 BUS_DMASYNC_PREREAD);
3046 /* Physical address may have changed. */
3047 ring->desc[ring->cur] = htole32(paddr >> 8);
3048 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
3049 BUS_DMASYNC_PREWRITE);
3050 counter_u64_add(ic->ic_ierrors, 1);
3054 bus_dmamap_sync(ring->data_dmat, data->map,
3055 BUS_DMASYNC_PREREAD);
3059 /* Update RX descriptor. */
3060 ring->desc[ring->cur] = htole32(paddr >> 8);
3061 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
3062 BUS_DMASYNC_PREWRITE);
3064 /* Finalize mbuf. */
3066 m->m_pkthdr.len = m->m_len = len;
3068 /* Grab a reference to the source node. */
3069 wh = mtod(m, struct ieee80211_frame *);
3070 if (len >= sizeof(struct ieee80211_frame_min))
3071 ni = ieee80211_find_rxnode(ic, (struct ieee80211_frame_min *)wh);
3074 nf = (ni != NULL && ni->ni_vap->iv_state == IEEE80211_S_RUN &&
3075 (ic->ic_flags & IEEE80211_F_SCAN) == 0) ? sc->noise : -95;
3077 rssi = ops->get_rssi(sc, stat);
3079 if (ieee80211_radiotap_active(ic)) {
3080 struct iwn_rx_radiotap_header *tap = &sc->sc_rxtap;
3083 if (stat->flags & htole16(IWN_STAT_FLAG_SHPREAMBLE))
3084 tap->wr_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
3085 tap->wr_dbm_antsignal = (int8_t)rssi;
3086 tap->wr_dbm_antnoise = (int8_t)nf;
3087 tap->wr_tsft = stat->tstamp;
3088 switch (stat->rate) {
3090 case 10: tap->wr_rate = 2; break;
3091 case 20: tap->wr_rate = 4; break;
3092 case 55: tap->wr_rate = 11; break;
3093 case 110: tap->wr_rate = 22; break;
3095 case 0xd: tap->wr_rate = 12; break;
3096 case 0xf: tap->wr_rate = 18; break;
3097 case 0x5: tap->wr_rate = 24; break;
3098 case 0x7: tap->wr_rate = 36; break;
3099 case 0x9: tap->wr_rate = 48; break;
3100 case 0xb: tap->wr_rate = 72; break;
3101 case 0x1: tap->wr_rate = 96; break;
3102 case 0x3: tap->wr_rate = 108; break;
3103 /* Unknown rate: should not happen. */
3104 default: tap->wr_rate = 0;
3109 * If it's a beacon and we're waiting, then do the
3110 * wakeup. This should unblock raw_xmit/start.
3112 if (sc->sc_beacon_wait) {
3113 uint8_t type, subtype;
3114 /* NB: Re-assign wh */
3115 wh = mtod(m, struct ieee80211_frame *);
3116 type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK;
3117 subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
3119 * This assumes at this point we've received our own
3122 DPRINTF(sc, IWN_DEBUG_TRACE,
3123 "%s: beacon_wait, type=%d, subtype=%d\n",
3124 __func__, type, subtype);
3125 if (type == IEEE80211_FC0_TYPE_MGT &&
3126 subtype == IEEE80211_FC0_SUBTYPE_BEACON) {
3127 DPRINTF(sc, IWN_DEBUG_TRACE | IWN_DEBUG_XMIT,
3128 "%s: waking things up\n", __func__);
3129 /* queue taskqueue to transmit! */
3130 taskqueue_enqueue(sc->sc_tq, &sc->sc_xmit_task);
3136 /* Send the frame to the 802.11 layer. */
3138 if (ni->ni_flags & IEEE80211_NODE_HT)
3139 m->m_flags |= M_AMPDU;
3140 (void)ieee80211_input(ni, m, rssi - nf, nf);
3141 /* Node is no longer needed. */
3142 ieee80211_free_node(ni);
3144 (void)ieee80211_input_all(ic, m, rssi - nf, nf);
3148 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
3152 /* Process an incoming Compressed BlockAck. */
3154 iwn_rx_compressed_ba(struct iwn_softc *sc, struct iwn_rx_desc *desc,
3155 struct iwn_rx_data *data)
3157 struct ieee80211_ratectl_tx_status *txs = &sc->sc_txs;
3158 struct iwn_ops *ops = &sc->ops;
3159 struct iwn_node *wn;
3160 struct ieee80211_node *ni;
3161 struct iwn_compressed_ba *ba = (struct iwn_compressed_ba *)(desc + 1);
3162 struct iwn_tx_ring *txq;
3163 struct iwn_tx_data *txdata;
3164 struct ieee80211_tx_ampdu *tap;
3169 int i, lastidx, qid, *res, shift;
3170 int tx_ok = 0, tx_err = 0;
3172 DPRINTF(sc, IWN_DEBUG_TRACE | IWN_DEBUG_XMIT, "->%s begin\n", __func__);
3174 bus_dmamap_sync(sc->rxq.data_dmat, data->map, BUS_DMASYNC_POSTREAD);
3176 qid = le16toh(ba->qid);
3177 txq = &sc->txq[ba->qid];
3178 tap = sc->qid2tap[ba->qid];
3180 wn = (void *)tap->txa_ni;
3184 if (!IEEE80211_AMPDU_RUNNING(tap)) {
3185 res = tap->txa_private;
3186 ssn = tap->txa_start & 0xfff;
3189 for (lastidx = le16toh(ba->ssn) & 0xff; txq->read != lastidx;) {
3190 txdata = &txq->data[txq->read];
3192 /* Unmap and free mbuf. */
3193 bus_dmamap_sync(txq->data_dmat, txdata->map,
3194 BUS_DMASYNC_POSTWRITE);
3195 bus_dmamap_unload(txq->data_dmat, txdata->map);
3196 m = txdata->m, txdata->m = NULL;
3197 ni = txdata->ni, txdata->ni = NULL;
3199 KASSERT(ni != NULL, ("no node"));
3200 KASSERT(m != NULL, ("no mbuf"));
3202 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: freeing m=%p\n", __func__, m);
3203 ieee80211_tx_complete(ni, m, 1);
3206 txq->read = (txq->read + 1) % IWN_TX_RING_COUNT;
3209 if (txq->queued == 0 && res != NULL) {
3211 ops->ampdu_tx_stop(sc, qid, tid, ssn);
3213 sc->qid2tap[qid] = NULL;
3214 free(res, M_DEVBUF);
3218 if (wn->agg[tid].bitmap == 0)
3221 shift = wn->agg[tid].startidx - ((le16toh(ba->seq) >> 4) & 0xff);
3225 if (wn->agg[tid].nframes > (64 - shift))
3229 * Walk the bitmap and calculate how many successful and failed
3230 * attempts are made.
3232 * Yes, the rate control code doesn't know these are A-MPDU
3233 * subframes and that it's okay to fail some of these.
3236 bitmap = (le64toh(ba->bitmap) >> shift) & wn->agg[tid].bitmap;
3237 for (i = 0; bitmap; i++) {
3238 txs->flags = 0; /* XXX TODO */
3239 if ((bitmap & 1) == 0) {
3241 txs->status = IEEE80211_RATECTL_TX_FAIL_UNSPECIFIED;
3244 txs->status = IEEE80211_RATECTL_TX_SUCCESS;
3246 ieee80211_ratectl_tx_complete(ni, txs);
3250 DPRINTF(sc, IWN_DEBUG_TRACE | IWN_DEBUG_XMIT,
3251 "->%s: end; %d ok; %d err\n",__func__, tx_ok, tx_err);
3256 * Process a CALIBRATION_RESULT notification sent by the initialization
3257 * firmware on response to a CMD_CALIB_CONFIG command (5000 only).
3260 iwn5000_rx_calib_results(struct iwn_softc *sc, struct iwn_rx_desc *desc,
3261 struct iwn_rx_data *data)
3263 struct iwn_phy_calib *calib = (struct iwn_phy_calib *)(desc + 1);
3266 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
3268 /* Runtime firmware should not send such a notification. */
3269 if (sc->sc_flags & IWN_FLAG_CALIB_DONE){
3270 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s received after clib done\n",
3274 len = (le32toh(desc->len) & 0x3fff) - 4;
3275 bus_dmamap_sync(sc->rxq.data_dmat, data->map, BUS_DMASYNC_POSTREAD);
3277 switch (calib->code) {
3278 case IWN5000_PHY_CALIB_DC:
3279 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_DC)
3282 case IWN5000_PHY_CALIB_LO:
3283 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_LO)
3286 case IWN5000_PHY_CALIB_TX_IQ:
3287 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TX_IQ)
3290 case IWN5000_PHY_CALIB_TX_IQ_PERIODIC:
3291 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TX_IQ_PERIODIC)
3294 case IWN5000_PHY_CALIB_BASE_BAND:
3295 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_BASE_BAND)
3299 if (idx == -1) /* Ignore other results. */
3302 /* Save calibration result. */
3303 if (sc->calibcmd[idx].buf != NULL)
3304 free(sc->calibcmd[idx].buf, M_DEVBUF);
3305 sc->calibcmd[idx].buf = malloc(len, M_DEVBUF, M_NOWAIT);
3306 if (sc->calibcmd[idx].buf == NULL) {
3307 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
3308 "not enough memory for calibration result %d\n",
3312 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
3313 "saving calibration result idx=%d, code=%d len=%d\n", idx, calib->code, len);
3314 sc->calibcmd[idx].len = len;
3315 memcpy(sc->calibcmd[idx].buf, calib, len);
3319 iwn_stats_update(struct iwn_softc *sc, struct iwn_calib_state *calib,
3320 struct iwn_stats *stats, int len)
3322 struct iwn_stats_bt *stats_bt;
3323 struct iwn_stats *lstats;
3326 * First - check whether the length is the bluetooth or normal.
3328 * If it's normal - just copy it and bump out.
3329 * Otherwise we have to convert things.
3332 if (len == sizeof(struct iwn_stats) + 4) {
3333 memcpy(&sc->last_stat, stats, sizeof(struct iwn_stats));
3334 sc->last_stat_valid = 1;
3339 * If it's not the bluetooth size - log, then just copy.
3341 if (len != sizeof(struct iwn_stats_bt) + 4) {
3342 DPRINTF(sc, IWN_DEBUG_STATS,
3343 "%s: size of rx statistics (%d) not an expected size!\n",
3346 memcpy(&sc->last_stat, stats, sizeof(struct iwn_stats));
3347 sc->last_stat_valid = 1;
3354 stats_bt = (struct iwn_stats_bt *) stats;
3355 lstats = &sc->last_stat;
3358 lstats->flags = stats_bt->flags;
3360 memcpy(&lstats->rx.ofdm, &stats_bt->rx_bt.ofdm,
3361 sizeof(struct iwn_rx_phy_stats));
3362 memcpy(&lstats->rx.cck, &stats_bt->rx_bt.cck,
3363 sizeof(struct iwn_rx_phy_stats));
3364 memcpy(&lstats->rx.general, &stats_bt->rx_bt.general_bt.common,
3365 sizeof(struct iwn_rx_general_stats));
3366 memcpy(&lstats->rx.ht, &stats_bt->rx_bt.ht,
3367 sizeof(struct iwn_rx_ht_phy_stats));
3369 memcpy(&lstats->tx, &stats_bt->tx,
3370 sizeof(struct iwn_tx_stats));
3372 memcpy(&lstats->general, &stats_bt->general,
3373 sizeof(struct iwn_general_stats));
3375 /* XXX TODO: Squirrel away the extra bluetooth stats somewhere */
3376 sc->last_stat_valid = 1;
3380 * Process an RX_STATISTICS or BEACON_STATISTICS firmware notification.
3381 * The latter is sent by the firmware after each received beacon.
3384 iwn_rx_statistics(struct iwn_softc *sc, struct iwn_rx_desc *desc,
3385 struct iwn_rx_data *data)
3387 struct iwn_ops *ops = &sc->ops;
3388 struct ieee80211com *ic = &sc->sc_ic;
3389 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
3390 struct iwn_calib_state *calib = &sc->calib;
3391 struct iwn_stats *stats = (struct iwn_stats *)(desc + 1);
3392 struct iwn_stats *lstats;
3395 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
3397 /* Ignore statistics received during a scan. */
3398 if (vap->iv_state != IEEE80211_S_RUN ||
3399 (ic->ic_flags & IEEE80211_F_SCAN)){
3400 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s received during calib\n",
3405 bus_dmamap_sync(sc->rxq.data_dmat, data->map, BUS_DMASYNC_POSTREAD);
3407 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_STATS,
3408 "%s: received statistics, cmd %d, len %d\n",
3409 __func__, desc->type, le16toh(desc->len));
3410 sc->calib_cnt = 0; /* Reset TX power calibration timeout. */
3413 * Collect/track general statistics for reporting.
3415 * This takes care of ensuring that the bluetooth sized message
3416 * will be correctly converted to the legacy sized message.
3418 iwn_stats_update(sc, calib, stats, le16toh(desc->len));
3421 * And now, let's take a reference of it to use!
3423 lstats = &sc->last_stat;
3425 /* Test if temperature has changed. */
3426 if (lstats->general.temp != sc->rawtemp) {
3427 /* Convert "raw" temperature to degC. */
3428 sc->rawtemp = stats->general.temp;
3429 temp = ops->get_temperature(sc);
3430 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: temperature %d\n",
3433 /* Update TX power if need be (4965AGN only). */
3434 if (sc->hw_type == IWN_HW_REV_TYPE_4965)
3435 iwn4965_power_calibration(sc, temp);
3438 if (desc->type != IWN_BEACON_STATISTICS)
3439 return; /* Reply to a statistics request. */
3441 sc->noise = iwn_get_noise(&lstats->rx.general);
3442 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: noise %d\n", __func__, sc->noise);
3444 /* Test that RSSI and noise are present in stats report. */
3445 if (le32toh(lstats->rx.general.flags) != 1) {
3446 DPRINTF(sc, IWN_DEBUG_ANY, "%s\n",
3447 "received statistics without RSSI");
3451 if (calib->state == IWN_CALIB_STATE_ASSOC)
3452 iwn_collect_noise(sc, &lstats->rx.general);
3453 else if (calib->state == IWN_CALIB_STATE_RUN) {
3454 iwn_tune_sensitivity(sc, &lstats->rx);
3456 * XXX TODO: Only run the RX recovery if we're associated!
3458 iwn_check_rx_recovery(sc, lstats);
3459 iwn_save_stats_counters(sc, lstats);
3462 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
3466 * Save the relevant statistic counters for the next calibration
3470 iwn_save_stats_counters(struct iwn_softc *sc, const struct iwn_stats *rs)
3472 struct iwn_calib_state *calib = &sc->calib;
3474 /* Save counters values for next call. */
3475 calib->bad_plcp_cck = le32toh(rs->rx.cck.bad_plcp);
3476 calib->fa_cck = le32toh(rs->rx.cck.fa);
3477 calib->bad_plcp_ht = le32toh(rs->rx.ht.bad_plcp);
3478 calib->bad_plcp_ofdm = le32toh(rs->rx.ofdm.bad_plcp);
3479 calib->fa_ofdm = le32toh(rs->rx.ofdm.fa);
3481 /* Last time we received these tick values */
3482 sc->last_calib_ticks = ticks;
3486 * Process a TX_DONE firmware notification. Unfortunately, the 4965AGN
3487 * and 5000 adapters have different incompatible TX status formats.
3490 iwn4965_tx_done(struct iwn_softc *sc, struct iwn_rx_desc *desc,
3491 struct iwn_rx_data *data)
3493 struct iwn4965_tx_stat *stat = (struct iwn4965_tx_stat *)(desc + 1);
3494 struct iwn_tx_ring *ring;
3497 qid = desc->qid & 0xf;
3498 ring = &sc->txq[qid];
3500 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: "
3501 "qid %d idx %d RTS retries %d ACK retries %d nkill %d rate %x duration %d status %x\n",
3502 __func__, desc->qid, desc->idx,
3506 stat->rate, le16toh(stat->duration),
3507 le32toh(stat->status));
3509 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_POSTREAD);
3510 if (qid >= sc->firstaggqueue) {
3511 iwn_ampdu_tx_done(sc, qid, desc->idx, stat->nframes,
3512 stat->rtsfailcnt, stat->ackfailcnt, &stat->status);
3514 iwn_tx_done(sc, desc, stat->rtsfailcnt, stat->ackfailcnt,
3515 le32toh(stat->status) & 0xff);
3520 iwn5000_tx_done(struct iwn_softc *sc, struct iwn_rx_desc *desc,
3521 struct iwn_rx_data *data)
3523 struct iwn5000_tx_stat *stat = (struct iwn5000_tx_stat *)(desc + 1);
3524 struct iwn_tx_ring *ring;
3527 qid = desc->qid & 0xf;
3528 ring = &sc->txq[qid];
3530 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: "
3531 "qid %d idx %d RTS retries %d ACK retries %d nkill %d rate %x duration %d status %x\n",
3532 __func__, desc->qid, desc->idx,
3536 stat->rate, le16toh(stat->duration),
3537 le32toh(stat->status));
3540 /* Reset TX scheduler slot. */
3541 iwn5000_reset_sched(sc, desc->qid & 0xf, desc->idx);
3544 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_POSTREAD);
3545 if (qid >= sc->firstaggqueue) {
3546 iwn_ampdu_tx_done(sc, qid, desc->idx, stat->nframes,
3547 stat->rtsfailcnt, stat->ackfailcnt, &stat->status);
3549 iwn_tx_done(sc, desc, stat->rtsfailcnt, stat->ackfailcnt,
3550 le16toh(stat->status) & 0xff);
3555 * Adapter-independent backend for TX_DONE firmware notifications.
3558 iwn_tx_done(struct iwn_softc *sc, struct iwn_rx_desc *desc, int rtsfailcnt,
3559 int ackfailcnt, uint8_t status)
3561 struct ieee80211_ratectl_tx_status *txs = &sc->sc_txs;
3562 struct iwn_tx_ring *ring = &sc->txq[desc->qid & 0xf];
3563 struct iwn_tx_data *data = &ring->data[desc->idx];
3565 struct ieee80211_node *ni;
3567 KASSERT(data->ni != NULL, ("no node"));
3569 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
3571 /* Unmap and free mbuf. */
3572 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_POSTWRITE);
3573 bus_dmamap_unload(ring->data_dmat, data->map);
3574 m = data->m, data->m = NULL;
3575 ni = data->ni, data->ni = NULL;
3578 * Update rate control statistics for the node.
3580 txs->flags = IEEE80211_RATECTL_STATUS_SHORT_RETRY |
3581 IEEE80211_RATECTL_STATUS_LONG_RETRY;
3582 txs->short_retries = rtsfailcnt;
3583 txs->long_retries = ackfailcnt;
3584 if (!(status & IWN_TX_FAIL))
3585 txs->status = IEEE80211_RATECTL_TX_SUCCESS;
3588 case IWN_TX_FAIL_SHORT_LIMIT:
3589 txs->status = IEEE80211_RATECTL_TX_FAIL_SHORT;
3591 case IWN_TX_FAIL_LONG_LIMIT:
3592 txs->status = IEEE80211_RATECTL_TX_FAIL_LONG;
3594 case IWN_TX_STATUS_FAIL_LIFE_EXPIRE:
3595 txs->status = IEEE80211_RATECTL_TX_FAIL_EXPIRED;
3598 txs->status = IEEE80211_RATECTL_TX_FAIL_UNSPECIFIED;
3602 ieee80211_ratectl_tx_complete(ni, txs);
3605 * Channels marked for "radar" require traffic to be received
3606 * to unlock before we can transmit. Until traffic is seen
3607 * any attempt to transmit is returned immediately with status
3608 * set to IWN_TX_FAIL_TX_LOCKED. Unfortunately this can easily
3609 * happen on first authenticate after scanning. To workaround
3610 * this we ignore a failure of this sort in AUTH state so the
3611 * 802.11 layer will fall back to using a timeout to wait for
3612 * the AUTH reply. This allows the firmware time to see
3613 * traffic so a subsequent retry of AUTH succeeds. It's
3614 * unclear why the firmware does not maintain state for
3615 * channels recently visited as this would allow immediate
3616 * use of the channel after a scan (where we see traffic).
3618 if (status == IWN_TX_FAIL_TX_LOCKED &&
3619 ni->ni_vap->iv_state == IEEE80211_S_AUTH)
3620 ieee80211_tx_complete(ni, m, 0);
3622 ieee80211_tx_complete(ni, m,
3623 (status & IWN_TX_FAIL) != 0);
3625 sc->sc_tx_timer = 0;
3626 if (--ring->queued < IWN_TX_RING_LOMARK)
3627 sc->qfullmsk &= ~(1 << ring->qid);
3629 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
3633 * Process a "command done" firmware notification. This is where we wakeup
3634 * processes waiting for a synchronous command completion.
3637 iwn_cmd_done(struct iwn_softc *sc, struct iwn_rx_desc *desc)
3639 struct iwn_tx_ring *ring;
3640 struct iwn_tx_data *data;
3643 if (sc->sc_flags & IWN_FLAG_PAN_SUPPORT)
3644 cmd_queue_num = IWN_PAN_CMD_QUEUE;
3646 cmd_queue_num = IWN_CMD_QUEUE_NUM;
3648 if ((desc->qid & IWN_RX_DESC_QID_MSK) != cmd_queue_num)
3649 return; /* Not a command ack. */
3651 ring = &sc->txq[cmd_queue_num];
3652 data = &ring->data[desc->idx];
3654 /* If the command was mapped in an mbuf, free it. */
3655 if (data->m != NULL) {
3656 bus_dmamap_sync(ring->data_dmat, data->map,
3657 BUS_DMASYNC_POSTWRITE);
3658 bus_dmamap_unload(ring->data_dmat, data->map);
3662 wakeup(&ring->desc[desc->idx]);
3666 iwn_ampdu_tx_done(struct iwn_softc *sc, int qid, int idx, int nframes,
3667 int rtsfailcnt, int ackfailcnt, void *stat)
3669 struct iwn_ops *ops = &sc->ops;
3670 struct iwn_tx_ring *ring = &sc->txq[qid];
3671 struct ieee80211_ratectl_tx_status *txs = &sc->sc_txs;
3672 struct iwn_tx_data *data;
3674 struct iwn_node *wn;
3675 struct ieee80211_node *ni;
3676 struct ieee80211_tx_ampdu *tap;
3678 uint32_t *status = stat;
3679 uint16_t *aggstatus = stat;
3682 int bit, i, lastidx, *res, seqno, shift, start;
3684 /* XXX TODO: status is le16 field! Grr */
3686 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
3687 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: nframes=%d, status=0x%08x\n",
3692 tap = sc->qid2tap[qid];
3694 wn = (void *)tap->txa_ni;
3698 * XXX TODO: ACK and RTS failures would be nice here!
3702 * A-MPDU single frame status - if we failed to transmit it
3703 * in A-MPDU, then it may be a permanent failure.
3705 * XXX TODO: check what the Linux iwlwifi driver does here;
3706 * there's some permanent and temporary failures that may be
3707 * handled differently.
3710 txs->flags = IEEE80211_RATECTL_STATUS_SHORT_RETRY |
3711 IEEE80211_RATECTL_STATUS_LONG_RETRY;
3712 txs->short_retries = rtsfailcnt;
3713 txs->long_retries = ackfailcnt;
3714 if ((*status & 0xff) != 1 && (*status & 0xff) != 2) {
3716 printf("ieee80211_send_bar()\n");
3719 * If we completely fail a transmit, make sure a
3720 * notification is pushed up to the rate control
3724 txs->status = IEEE80211_RATECTL_TX_FAIL_UNSPECIFIED;
3727 * If nframes=1, then we won't be getting a BA for
3728 * this frame. Ensure that we correctly update the
3729 * rate control code with how many retries were
3730 * needed to send it.
3732 txs->status = IEEE80211_RATECTL_TX_SUCCESS;
3734 ieee80211_ratectl_tx_complete(ni, txs);
3739 for (i = 0; i < nframes; i++) {
3740 if (le16toh(aggstatus[i * 2]) & 0xc)
3743 idx = le16toh(aggstatus[2*i + 1]) & 0xff;
3747 shift = 0x100 - idx + start;
3750 } else if (bit <= -64)
3751 bit = 0x100 - start + idx;
3753 shift = start - idx;
3757 bitmap = bitmap << shift;
3758 bitmap |= 1ULL << bit;
3760 tap = sc->qid2tap[qid];
3762 wn = (void *)tap->txa_ni;
3763 wn->agg[tid].bitmap = bitmap;
3764 wn->agg[tid].startidx = start;
3765 wn->agg[tid].nframes = nframes;
3769 if (!IEEE80211_AMPDU_RUNNING(tap)) {
3770 res = tap->txa_private;
3771 ssn = tap->txa_start & 0xfff;
3774 /* This is going nframes DWORDS into the descriptor? */
3775 seqno = le32toh(*(status + nframes)) & 0xfff;
3776 for (lastidx = (seqno & 0xff); ring->read != lastidx;) {
3777 data = &ring->data[ring->read];
3779 /* Unmap and free mbuf. */
3780 bus_dmamap_sync(ring->data_dmat, data->map,
3781 BUS_DMASYNC_POSTWRITE);
3782 bus_dmamap_unload(ring->data_dmat, data->map);
3783 m = data->m, data->m = NULL;
3784 ni = data->ni, data->ni = NULL;
3786 KASSERT(ni != NULL, ("no node"));
3787 KASSERT(m != NULL, ("no mbuf"));
3788 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: freeing m=%p\n", __func__, m);
3789 ieee80211_tx_complete(ni, m, 1);
3792 ring->read = (ring->read + 1) % IWN_TX_RING_COUNT;
3795 if (ring->queued == 0 && res != NULL) {
3797 ops->ampdu_tx_stop(sc, qid, tid, ssn);
3799 sc->qid2tap[qid] = NULL;
3800 free(res, M_DEVBUF);
3804 sc->sc_tx_timer = 0;
3805 if (ring->queued < IWN_TX_RING_LOMARK)
3806 sc->qfullmsk &= ~(1 << ring->qid);
3808 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
3812 * Process an INT_FH_RX or INT_SW_RX interrupt.
3815 iwn_notif_intr(struct iwn_softc *sc)
3817 struct iwn_ops *ops = &sc->ops;
3818 struct ieee80211com *ic = &sc->sc_ic;
3819 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
3822 bus_dmamap_sync(sc->rxq.stat_dma.tag, sc->rxq.stat_dma.map,
3823 BUS_DMASYNC_POSTREAD);
3825 hw = le16toh(sc->rxq.stat->closed_count) & 0xfff;
3826 while (sc->rxq.cur != hw) {
3827 struct iwn_rx_data *data = &sc->rxq.data[sc->rxq.cur];
3828 struct iwn_rx_desc *desc;
3830 bus_dmamap_sync(sc->rxq.data_dmat, data->map,
3831 BUS_DMASYNC_POSTREAD);
3832 desc = mtod(data->m, struct iwn_rx_desc *);
3834 DPRINTF(sc, IWN_DEBUG_RECV,
3835 "%s: cur=%d; qid %x idx %d flags %x type %d(%s) len %d\n",
3836 __func__, sc->rxq.cur, desc->qid & 0xf, desc->idx, desc->flags,
3837 desc->type, iwn_intr_str(desc->type),
3838 le16toh(desc->len));
3840 if (!(desc->qid & IWN_UNSOLICITED_RX_NOTIF)) /* Reply to a command. */
3841 iwn_cmd_done(sc, desc);
3843 switch (desc->type) {
3845 iwn_rx_phy(sc, desc, data);
3848 case IWN_RX_DONE: /* 4965AGN only. */
3849 case IWN_MPDU_RX_DONE:
3850 /* An 802.11 frame has been received. */
3851 iwn_rx_done(sc, desc, data);
3854 case IWN_RX_COMPRESSED_BA:
3855 /* A Compressed BlockAck has been received. */
3856 iwn_rx_compressed_ba(sc, desc, data);
3860 /* An 802.11 frame has been transmitted. */
3861 ops->tx_done(sc, desc, data);
3864 case IWN_RX_STATISTICS:
3865 case IWN_BEACON_STATISTICS:
3866 iwn_rx_statistics(sc, desc, data);
3869 case IWN_BEACON_MISSED:
3871 struct iwn_beacon_missed *miss =
3872 (struct iwn_beacon_missed *)(desc + 1);
3875 bus_dmamap_sync(sc->rxq.data_dmat, data->map,
3876 BUS_DMASYNC_POSTREAD);
3877 misses = le32toh(miss->consecutive);
3879 DPRINTF(sc, IWN_DEBUG_STATE,
3880 "%s: beacons missed %d/%d\n", __func__,
3881 misses, le32toh(miss->total));
3883 * If more than 5 consecutive beacons are missed,
3884 * reinitialize the sensitivity state machine.
3886 if (vap->iv_state == IEEE80211_S_RUN &&
3887 (ic->ic_flags & IEEE80211_F_SCAN) == 0) {
3889 (void)iwn_init_sensitivity(sc);
3890 if (misses >= vap->iv_bmissthreshold) {
3892 ieee80211_beacon_miss(ic);
3900 struct iwn_ucode_info *uc =
3901 (struct iwn_ucode_info *)(desc + 1);
3903 /* The microcontroller is ready. */
3904 bus_dmamap_sync(sc->rxq.data_dmat, data->map,
3905 BUS_DMASYNC_POSTREAD);
3906 DPRINTF(sc, IWN_DEBUG_RESET,
3907 "microcode alive notification version=%d.%d "
3908 "subtype=%x alive=%x\n", uc->major, uc->minor,
3909 uc->subtype, le32toh(uc->valid));
3911 if (le32toh(uc->valid) != 1) {
3912 device_printf(sc->sc_dev,
3913 "microcontroller initialization failed");
3916 if (uc->subtype == IWN_UCODE_INIT) {
3917 /* Save microcontroller report. */
3918 memcpy(&sc->ucode_info, uc, sizeof (*uc));
3920 /* Save the address of the error log in SRAM. */
3921 sc->errptr = le32toh(uc->errptr);
3924 case IWN_STATE_CHANGED:
3927 * State change allows hardware switch change to be
3928 * noted. However, we handle this in iwn_intr as we
3929 * get both the enable/disble intr.
3931 bus_dmamap_sync(sc->rxq.data_dmat, data->map,
3932 BUS_DMASYNC_POSTREAD);
3934 uint32_t *status = (uint32_t *)(desc + 1);
3935 DPRINTF(sc, IWN_DEBUG_INTR | IWN_DEBUG_STATE,
3936 "state changed to %x\n",
3941 case IWN_START_SCAN:
3943 bus_dmamap_sync(sc->rxq.data_dmat, data->map,
3944 BUS_DMASYNC_POSTREAD);
3946 struct iwn_start_scan *scan =
3947 (struct iwn_start_scan *)(desc + 1);
3948 DPRINTF(sc, IWN_DEBUG_ANY,
3949 "%s: scanning channel %d status %x\n",
3950 __func__, scan->chan, le32toh(scan->status));
3956 bus_dmamap_sync(sc->rxq.data_dmat, data->map,
3957 BUS_DMASYNC_POSTREAD);
3959 struct iwn_stop_scan *scan =
3960 (struct iwn_stop_scan *)(desc + 1);
3961 DPRINTF(sc, IWN_DEBUG_STATE | IWN_DEBUG_SCAN,
3962 "scan finished nchan=%d status=%d chan=%d\n",
3963 scan->nchan, scan->status, scan->chan);
3965 sc->sc_is_scanning = 0;
3966 callout_stop(&sc->scan_timeout);
3968 ieee80211_scan_next(vap);
3972 case IWN5000_CALIBRATION_RESULT:
3973 iwn5000_rx_calib_results(sc, desc, data);
3976 case IWN5000_CALIBRATION_DONE:
3977 sc->sc_flags |= IWN_FLAG_CALIB_DONE;
3982 sc->rxq.cur = (sc->rxq.cur + 1) % IWN_RX_RING_COUNT;
3985 /* Tell the firmware what we have processed. */
3986 hw = (hw == 0) ? IWN_RX_RING_COUNT - 1 : hw - 1;
3987 IWN_WRITE(sc, IWN_FH_RX_WPTR, hw & ~7);
3991 * Process an INT_WAKEUP interrupt raised when the microcontroller wakes up
3992 * from power-down sleep mode.
3995 iwn_wakeup_intr(struct iwn_softc *sc)
3999 DPRINTF(sc, IWN_DEBUG_RESET, "%s: ucode wakeup from power-down sleep\n",
4002 /* Wakeup RX and TX rings. */
4003 IWN_WRITE(sc, IWN_FH_RX_WPTR, sc->rxq.cur & ~7);
4004 for (qid = 0; qid < sc->ntxqs; qid++) {
4005 struct iwn_tx_ring *ring = &sc->txq[qid];
4006 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | ring->cur);
4011 iwn_rftoggle_task(void *arg, int npending)
4013 struct iwn_softc *sc = arg;
4014 struct ieee80211com *ic = &sc->sc_ic;
4018 tmp = IWN_READ(sc, IWN_GP_CNTRL);
4021 device_printf(sc->sc_dev, "RF switch: radio %s\n",
4022 (tmp & IWN_GP_CNTRL_RFKILL) ? "enabled" : "disabled");
4023 if (!(tmp & IWN_GP_CNTRL_RFKILL)) {
4024 ieee80211_suspend_all(ic);
4026 /* Enable interrupts to get RF toggle notification. */
4028 IWN_WRITE(sc, IWN_INT, 0xffffffff);
4029 IWN_WRITE(sc, IWN_INT_MASK, sc->int_mask);
4032 ieee80211_resume_all(ic);
4036 * Dump the error log of the firmware when a firmware panic occurs. Although
4037 * we can't debug the firmware because it is neither open source nor free, it
4038 * can help us to identify certain classes of problems.
4041 iwn_fatal_intr(struct iwn_softc *sc)
4043 struct iwn_fw_dump dump;
4046 IWN_LOCK_ASSERT(sc);
4048 /* Force a complete recalibration on next init. */
4049 sc->sc_flags &= ~IWN_FLAG_CALIB_DONE;
4051 /* Check that the error log address is valid. */
4052 if (sc->errptr < IWN_FW_DATA_BASE ||
4053 sc->errptr + sizeof (dump) >
4054 IWN_FW_DATA_BASE + sc->fw_data_maxsz) {
4055 printf("%s: bad firmware error log address 0x%08x\n", __func__,
4059 if (iwn_nic_lock(sc) != 0) {
4060 printf("%s: could not read firmware error log\n", __func__);
4063 /* Read firmware error log from SRAM. */
4064 iwn_mem_read_region_4(sc, sc->errptr, (uint32_t *)&dump,
4065 sizeof (dump) / sizeof (uint32_t));
4068 if (dump.valid == 0) {
4069 printf("%s: firmware error log is empty\n", __func__);
4072 printf("firmware error log:\n");
4073 printf(" error type = \"%s\" (0x%08X)\n",
4074 (dump.id < nitems(iwn_fw_errmsg)) ?
4075 iwn_fw_errmsg[dump.id] : "UNKNOWN",
4077 printf(" program counter = 0x%08X\n", dump.pc);
4078 printf(" source line = 0x%08X\n", dump.src_line);
4079 printf(" error data = 0x%08X%08X\n",
4080 dump.error_data[0], dump.error_data[1]);
4081 printf(" branch link = 0x%08X%08X\n",
4082 dump.branch_link[0], dump.branch_link[1]);
4083 printf(" interrupt link = 0x%08X%08X\n",
4084 dump.interrupt_link[0], dump.interrupt_link[1]);
4085 printf(" time = %u\n", dump.time[0]);
4087 /* Dump driver status (TX and RX rings) while we're here. */
4088 printf("driver status:\n");
4089 for (i = 0; i < sc->ntxqs; i++) {
4090 struct iwn_tx_ring *ring = &sc->txq[i];
4091 printf(" tx ring %2d: qid=%-2d cur=%-3d queued=%-3d\n",
4092 i, ring->qid, ring->cur, ring->queued);
4094 printf(" rx ring: cur=%d\n", sc->rxq.cur);
4100 struct iwn_softc *sc = arg;
4101 uint32_t r1, r2, tmp;
4105 /* Disable interrupts. */
4106 IWN_WRITE(sc, IWN_INT_MASK, 0);
4108 /* Read interrupts from ICT (fast) or from registers (slow). */
4109 if (sc->sc_flags & IWN_FLAG_USE_ICT) {
4110 bus_dmamap_sync(sc->ict_dma.tag, sc->ict_dma.map,
4111 BUS_DMASYNC_POSTREAD);
4113 while (sc->ict[sc->ict_cur] != 0) {
4114 tmp |= sc->ict[sc->ict_cur];
4115 sc->ict[sc->ict_cur] = 0; /* Acknowledge. */
4116 sc->ict_cur = (sc->ict_cur + 1) % IWN_ICT_COUNT;
4119 if (tmp == 0xffffffff) /* Shouldn't happen. */
4121 else if (tmp & 0xc0000) /* Workaround a HW bug. */
4123 r1 = (tmp & 0xff00) << 16 | (tmp & 0xff);
4124 r2 = 0; /* Unused. */
4126 r1 = IWN_READ(sc, IWN_INT);
4127 if (r1 == 0xffffffff || (r1 & 0xfffffff0) == 0xa5a5a5a0) {
4129 return; /* Hardware gone! */
4131 r2 = IWN_READ(sc, IWN_FH_INT);
4134 DPRINTF(sc, IWN_DEBUG_INTR, "interrupt reg1=0x%08x reg2=0x%08x\n"
4137 if (r1 == 0 && r2 == 0)
4138 goto done; /* Interrupt not for us. */
4140 /* Acknowledge interrupts. */
4141 IWN_WRITE(sc, IWN_INT, r1);
4142 if (!(sc->sc_flags & IWN_FLAG_USE_ICT))
4143 IWN_WRITE(sc, IWN_FH_INT, r2);
4145 if (r1 & IWN_INT_RF_TOGGLED) {
4146 taskqueue_enqueue(sc->sc_tq, &sc->sc_rftoggle_task);
4149 if (r1 & IWN_INT_CT_REACHED) {
4150 device_printf(sc->sc_dev, "%s: critical temperature reached!\n",
4153 if (r1 & (IWN_INT_SW_ERR | IWN_INT_HW_ERR)) {
4154 device_printf(sc->sc_dev, "%s: fatal firmware error\n",
4157 iwn_debug_register(sc);
4159 /* Dump firmware error log and stop. */
4162 taskqueue_enqueue(sc->sc_tq, &sc->sc_panic_task);
4165 if ((r1 & (IWN_INT_FH_RX | IWN_INT_SW_RX | IWN_INT_RX_PERIODIC)) ||
4166 (r2 & IWN_FH_INT_RX)) {
4167 if (sc->sc_flags & IWN_FLAG_USE_ICT) {
4168 if (r1 & (IWN_INT_FH_RX | IWN_INT_SW_RX))
4169 IWN_WRITE(sc, IWN_FH_INT, IWN_FH_INT_RX);
4170 IWN_WRITE_1(sc, IWN_INT_PERIODIC,
4171 IWN_INT_PERIODIC_DIS);
4173 if (r1 & (IWN_INT_FH_RX | IWN_INT_SW_RX)) {
4174 IWN_WRITE_1(sc, IWN_INT_PERIODIC,
4175 IWN_INT_PERIODIC_ENA);
4181 if ((r1 & IWN_INT_FH_TX) || (r2 & IWN_FH_INT_TX)) {
4182 if (sc->sc_flags & IWN_FLAG_USE_ICT)
4183 IWN_WRITE(sc, IWN_FH_INT, IWN_FH_INT_TX);
4184 wakeup(sc); /* FH DMA transfer completed. */
4187 if (r1 & IWN_INT_ALIVE)
4188 wakeup(sc); /* Firmware is alive. */
4190 if (r1 & IWN_INT_WAKEUP)
4191 iwn_wakeup_intr(sc);
4194 /* Re-enable interrupts. */
4195 if (sc->sc_flags & IWN_FLAG_RUNNING)
4196 IWN_WRITE(sc, IWN_INT_MASK, sc->int_mask);
4202 * Update TX scheduler ring when transmitting an 802.11 frame (4965AGN and
4203 * 5000 adapters use a slightly different format).
4206 iwn4965_update_sched(struct iwn_softc *sc, int qid, int idx, uint8_t id,
4209 uint16_t *w = &sc->sched[qid * IWN4965_SCHED_COUNT + idx];
4211 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
4213 *w = htole16(len + 8);
4214 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
4215 BUS_DMASYNC_PREWRITE);
4216 if (idx < IWN_SCHED_WINSZ) {
4217 *(w + IWN_TX_RING_COUNT) = *w;
4218 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
4219 BUS_DMASYNC_PREWRITE);
4224 iwn5000_update_sched(struct iwn_softc *sc, int qid, int idx, uint8_t id,
4227 uint16_t *w = &sc->sched[qid * IWN5000_SCHED_COUNT + idx];
4229 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
4231 *w = htole16(id << 12 | (len + 8));
4232 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
4233 BUS_DMASYNC_PREWRITE);
4234 if (idx < IWN_SCHED_WINSZ) {
4235 *(w + IWN_TX_RING_COUNT) = *w;
4236 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
4237 BUS_DMASYNC_PREWRITE);
4243 iwn5000_reset_sched(struct iwn_softc *sc, int qid, int idx)
4245 uint16_t *w = &sc->sched[qid * IWN5000_SCHED_COUNT + idx];
4247 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
4249 *w = (*w & htole16(0xf000)) | htole16(1);
4250 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
4251 BUS_DMASYNC_PREWRITE);
4252 if (idx < IWN_SCHED_WINSZ) {
4253 *(w + IWN_TX_RING_COUNT) = *w;
4254 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
4255 BUS_DMASYNC_PREWRITE);
4261 * Check whether OFDM 11g protection will be enabled for the given rate.
4263 * The original driver code only enabled protection for OFDM rates.
4264 * It didn't check to see whether it was operating in 11a or 11bg mode.
4267 iwn_check_rate_needs_protection(struct iwn_softc *sc,
4268 struct ieee80211vap *vap, uint8_t rate)
4270 struct ieee80211com *ic = vap->iv_ic;
4273 * Not in 2GHz mode? Then there's no need to enable OFDM
4276 if (! IEEE80211_IS_CHAN_2GHZ(ic->ic_curchan)) {
4281 * 11bg protection not enabled? Then don't use it.
4283 if ((ic->ic_flags & IEEE80211_F_USEPROT) == 0)
4287 * If it's an 11n rate - no protection.
4288 * We'll do it via a specific 11n check.
4290 if (rate & IEEE80211_RATE_MCS) {
4295 * Do a rate table lookup. If the PHY is CCK,
4296 * don't do protection.
4298 if (ieee80211_rate2phytype(ic->ic_rt, rate) == IEEE80211_T_CCK)
4302 * Yup, enable protection.
4308 * return a value between 0 and IWN_MAX_TX_RETRIES-1 as an index into
4309 * the link quality table that reflects this particular entry.
4312 iwn_tx_rate_to_linkq_offset(struct iwn_softc *sc, struct ieee80211_node *ni,
4315 struct ieee80211_rateset *rs;
4322 * Figure out if we're using 11n or not here.
4324 if (IEEE80211_IS_CHAN_HT(ni->ni_chan) && ni->ni_htrates.rs_nrates > 0)
4330 * Use the correct rate table.
4333 rs = (struct ieee80211_rateset *) &ni->ni_htrates;
4334 nr = ni->ni_htrates.rs_nrates;
4341 * Find the relevant link quality entry in the table.
4343 for (i = 0; i < nr && i < IWN_MAX_TX_RETRIES - 1 ; i++) {
4345 * The link quality table index starts at 0 == highest
4346 * rate, so we walk the rate table backwards.
4348 cmp_rate = rs->rs_rates[(nr - 1) - i];
4349 if (rate & IEEE80211_RATE_MCS)
4350 cmp_rate |= IEEE80211_RATE_MCS;
4353 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: idx %d: nr=%d, rate=0x%02x, rateentry=0x%02x\n",
4361 if (cmp_rate == rate)
4365 /* Failed? Start at the end */
4366 return (IWN_MAX_TX_RETRIES - 1);
4370 iwn_tx_data(struct iwn_softc *sc, struct mbuf *m, struct ieee80211_node *ni)
4372 struct iwn_ops *ops = &sc->ops;
4373 const struct ieee80211_txparam *tp = ni->ni_txparms;
4374 struct ieee80211vap *vap = ni->ni_vap;
4375 struct ieee80211com *ic = ni->ni_ic;
4376 struct iwn_node *wn = (void *)ni;
4377 struct iwn_tx_ring *ring;
4378 struct iwn_tx_desc *desc;
4379 struct iwn_tx_data *data;
4380 struct iwn_tx_cmd *cmd;
4381 struct iwn_cmd_data *tx;
4382 struct ieee80211_frame *wh;
4383 struct ieee80211_key *k = NULL;
4388 bus_dma_segment_t *seg, segs[IWN_MAX_SCATTER];
4390 int ac, i, totlen, error, pad, nsegs = 0, rate;
4392 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
4394 IWN_LOCK_ASSERT(sc);
4396 wh = mtod(m, struct ieee80211_frame *);
4397 hdrlen = ieee80211_anyhdrsize(wh);
4398 type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK;
4400 /* Select EDCA Access Category and TX ring for this frame. */
4401 if (IEEE80211_QOS_HAS_SEQ(wh)) {
4402 qos = ((const struct ieee80211_qosframe *)wh)->i_qos[0];
4403 tid = qos & IEEE80211_QOS_TID;
4408 ac = M_WME_GETAC(m);
4411 * XXX TODO: Group addressed frames aren't aggregated and must
4412 * go to the normal non-aggregation queue, and have a NONQOS TID
4413 * assigned from net80211.
4416 if (m->m_flags & M_AMPDU_MPDU) {
4418 struct ieee80211_tx_ampdu *tap = &ni->ni_tx_ampdu[ac];
4420 if (!IEEE80211_AMPDU_RUNNING(tap)) {
4425 * Queue this frame to the hardware ring that we've
4426 * negotiated AMPDU TX on.
4428 * Note that the sequence number must match the TX slot
4431 ac = *(int *)tap->txa_private;
4432 seqno = ni->ni_txseqs[tid];
4433 *(uint16_t *)wh->i_seq =
4434 htole16(seqno << IEEE80211_SEQ_SEQ_SHIFT);
4435 ring = &sc->txq[ac];
4436 if ((seqno % 256) != ring->cur) {
4437 device_printf(sc->sc_dev,
4438 "%s: m=%p: seqno (%d) (%d) != ring index (%d) !\n",
4445 ni->ni_txseqs[tid]++;
4447 ring = &sc->txq[ac];
4448 desc = &ring->desc[ring->cur];
4449 data = &ring->data[ring->cur];
4451 /* Choose a TX rate index. */
4452 if (type == IEEE80211_FC0_TYPE_MGT ||
4453 type == IEEE80211_FC0_TYPE_CTL ||
4454 (m->m_flags & M_EAPOL) != 0)
4455 rate = tp->mgmtrate;
4456 else if (IEEE80211_IS_MULTICAST(wh->i_addr1))
4457 rate = tp->mcastrate;
4458 else if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE)
4459 rate = tp->ucastrate;
4461 /* XXX pass pktlen */
4462 (void) ieee80211_ratectl_rate(ni, NULL, 0);
4463 rate = ni->ni_txrate;
4466 /* Encrypt the frame if need be. */
4467 if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) {
4468 /* Retrieve key for TX. */
4469 k = ieee80211_crypto_encap(ni, m);
4473 /* 802.11 header may have moved. */
4474 wh = mtod(m, struct ieee80211_frame *);
4476 totlen = m->m_pkthdr.len;
4478 if (ieee80211_radiotap_active_vap(vap)) {
4479 struct iwn_tx_radiotap_header *tap = &sc->sc_txtap;
4482 tap->wt_rate = rate;
4484 tap->wt_flags |= IEEE80211_RADIOTAP_F_WEP;
4486 ieee80211_radiotap_tx(vap, m);
4489 /* Prepare TX firmware command. */
4490 cmd = &ring->cmd[ring->cur];
4491 cmd->code = IWN_CMD_TX_DATA;
4493 cmd->qid = ring->qid;
4494 cmd->idx = ring->cur;
4496 tx = (struct iwn_cmd_data *)cmd->data;
4497 /* NB: No need to clear tx, all fields are reinitialized here. */
4498 tx->scratch = 0; /* clear "scratch" area */
4501 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
4502 /* Unicast frame, check if an ACK is expected. */
4503 if (!qos || (qos & IEEE80211_QOS_ACKPOLICY) !=
4504 IEEE80211_QOS_ACKPOLICY_NOACK)
4505 flags |= IWN_TX_NEED_ACK;
4508 (IEEE80211_FC0_TYPE_MASK | IEEE80211_FC0_SUBTYPE_MASK)) ==
4509 (IEEE80211_FC0_TYPE_CTL | IEEE80211_FC0_SUBTYPE_BAR))
4510 flags |= IWN_TX_IMM_BA; /* Cannot happen yet. */
4512 if (wh->i_fc[1] & IEEE80211_FC1_MORE_FRAG)
4513 flags |= IWN_TX_MORE_FRAG; /* Cannot happen yet. */
4515 /* Check if frame must be protected using RTS/CTS or CTS-to-self. */
4516 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
4517 /* NB: Group frames are sent using CCK in 802.11b/g. */
4518 if (totlen + IEEE80211_CRC_LEN > vap->iv_rtsthreshold) {
4519 flags |= IWN_TX_NEED_RTS;
4520 } else if (iwn_check_rate_needs_protection(sc, vap, rate)) {
4521 if (ic->ic_protmode == IEEE80211_PROT_CTSONLY)
4522 flags |= IWN_TX_NEED_CTS;
4523 else if (ic->ic_protmode == IEEE80211_PROT_RTSCTS)
4524 flags |= IWN_TX_NEED_RTS;
4525 } else if ((rate & IEEE80211_RATE_MCS) &&
4526 (ic->ic_htprotmode == IEEE80211_PROT_RTSCTS)) {
4527 flags |= IWN_TX_NEED_RTS;
4530 /* XXX HT protection? */
4532 if (flags & (IWN_TX_NEED_RTS | IWN_TX_NEED_CTS)) {
4533 if (sc->hw_type != IWN_HW_REV_TYPE_4965) {
4534 /* 5000 autoselects RTS/CTS or CTS-to-self. */
4535 flags &= ~(IWN_TX_NEED_RTS | IWN_TX_NEED_CTS);
4536 flags |= IWN_TX_NEED_PROTECTION;
4538 flags |= IWN_TX_FULL_TXOP;
4542 if (IEEE80211_IS_MULTICAST(wh->i_addr1) ||
4543 type != IEEE80211_FC0_TYPE_DATA)
4544 tx->id = sc->broadcast_id;
4548 if (type == IEEE80211_FC0_TYPE_MGT) {
4549 uint8_t subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
4551 /* Tell HW to set timestamp in probe responses. */
4552 if (subtype == IEEE80211_FC0_SUBTYPE_PROBE_RESP)
4553 flags |= IWN_TX_INSERT_TSTAMP;
4554 if (subtype == IEEE80211_FC0_SUBTYPE_ASSOC_REQ ||
4555 subtype == IEEE80211_FC0_SUBTYPE_REASSOC_REQ)
4556 tx->timeout = htole16(3);
4558 tx->timeout = htole16(2);
4560 tx->timeout = htole16(0);
4563 /* First segment length must be a multiple of 4. */
4564 flags |= IWN_TX_NEED_PADDING;
4565 pad = 4 - (hdrlen & 3);
4569 tx->len = htole16(totlen);
4571 tx->rts_ntries = 60;
4572 tx->data_ntries = 15;
4573 tx->lifetime = htole32(IWN_LIFETIME_INFINITE);
4574 tx->rate = iwn_rate_to_plcp(sc, ni, rate);
4575 if (tx->id == sc->broadcast_id) {
4576 /* Group or management frame. */
4579 tx->linkq = iwn_tx_rate_to_linkq_offset(sc, ni, rate);
4580 flags |= IWN_TX_LINKQ; /* enable MRR */
4583 /* Set physical address of "scratch area". */
4584 tx->loaddr = htole32(IWN_LOADDR(data->scratch_paddr));
4585 tx->hiaddr = IWN_HIADDR(data->scratch_paddr);
4587 /* Copy 802.11 header in TX command. */
4588 memcpy((uint8_t *)(tx + 1), wh, hdrlen);
4590 /* Trim 802.11 header. */
4593 tx->flags = htole32(flags);
4595 error = bus_dmamap_load_mbuf_sg(ring->data_dmat, data->map, m, segs,
4596 &nsegs, BUS_DMA_NOWAIT);
4598 if (error != EFBIG) {
4599 device_printf(sc->sc_dev,
4600 "%s: can't map mbuf (error %d)\n", __func__, error);
4603 /* Too many DMA segments, linearize mbuf. */
4604 m1 = m_collapse(m, M_NOWAIT, IWN_MAX_SCATTER - 1);
4606 device_printf(sc->sc_dev,
4607 "%s: could not defrag mbuf\n", __func__);
4612 error = bus_dmamap_load_mbuf_sg(ring->data_dmat, data->map, m,
4613 segs, &nsegs, BUS_DMA_NOWAIT);
4615 device_printf(sc->sc_dev,
4616 "%s: can't map mbuf (error %d)\n", __func__, error);
4624 DPRINTF(sc, IWN_DEBUG_XMIT,
4625 "%s: qid %d idx %d len %d nsegs %d flags 0x%08x rate 0x%04x plcp 0x%08x\n",
4635 /* Fill TX descriptor. */
4638 desc->nsegs += nsegs;
4639 /* First DMA segment is used by the TX command. */
4640 desc->segs[0].addr = htole32(IWN_LOADDR(data->cmd_paddr));
4641 desc->segs[0].len = htole16(IWN_HIADDR(data->cmd_paddr) |
4642 (4 + sizeof (*tx) + hdrlen + pad) << 4);
4643 /* Other DMA segments are for data payload. */
4645 for (i = 1; i <= nsegs; i++) {
4646 desc->segs[i].addr = htole32(IWN_LOADDR(seg->ds_addr));
4647 desc->segs[i].len = htole16(IWN_HIADDR(seg->ds_addr) |
4652 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_PREWRITE);
4653 bus_dmamap_sync(ring->cmd_dma.tag, ring->cmd_dma.map,
4654 BUS_DMASYNC_PREWRITE);
4655 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
4656 BUS_DMASYNC_PREWRITE);
4658 /* Update TX scheduler. */
4659 if (ring->qid >= sc->firstaggqueue)
4660 ops->update_sched(sc, ring->qid, ring->cur, tx->id, totlen);
4663 ring->cur = (ring->cur + 1) % IWN_TX_RING_COUNT;
4664 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, ring->qid << 8 | ring->cur);
4666 /* Mark TX ring as full if we reach a certain threshold. */
4667 if (++ring->queued > IWN_TX_RING_HIMARK)
4668 sc->qfullmsk |= 1 << ring->qid;
4670 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
4676 iwn_tx_data_raw(struct iwn_softc *sc, struct mbuf *m,
4677 struct ieee80211_node *ni, const struct ieee80211_bpf_params *params)
4679 struct iwn_ops *ops = &sc->ops;
4680 struct ieee80211vap *vap = ni->ni_vap;
4681 struct iwn_tx_cmd *cmd;
4682 struct iwn_cmd_data *tx;
4683 struct ieee80211_frame *wh;
4684 struct iwn_tx_ring *ring;
4685 struct iwn_tx_desc *desc;
4686 struct iwn_tx_data *data;
4688 bus_dma_segment_t *seg, segs[IWN_MAX_SCATTER];
4691 int ac, totlen, error, pad, nsegs = 0, i, rate;
4694 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
4696 IWN_LOCK_ASSERT(sc);
4698 wh = mtod(m, struct ieee80211_frame *);
4699 hdrlen = ieee80211_anyhdrsize(wh);
4700 type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK;
4702 ac = params->ibp_pri & 3;
4704 ring = &sc->txq[ac];
4705 desc = &ring->desc[ring->cur];
4706 data = &ring->data[ring->cur];
4708 /* Choose a TX rate. */
4709 rate = params->ibp_rate0;
4710 totlen = m->m_pkthdr.len;
4712 /* Prepare TX firmware command. */
4713 cmd = &ring->cmd[ring->cur];
4714 cmd->code = IWN_CMD_TX_DATA;
4716 cmd->qid = ring->qid;
4717 cmd->idx = ring->cur;
4719 tx = (struct iwn_cmd_data *)cmd->data;
4720 /* NB: No need to clear tx, all fields are reinitialized here. */
4721 tx->scratch = 0; /* clear "scratch" area */
4724 if ((params->ibp_flags & IEEE80211_BPF_NOACK) == 0)
4725 flags |= IWN_TX_NEED_ACK;
4726 if (params->ibp_flags & IEEE80211_BPF_RTS) {
4727 if (sc->hw_type != IWN_HW_REV_TYPE_4965) {
4728 /* 5000 autoselects RTS/CTS or CTS-to-self. */
4729 flags &= ~IWN_TX_NEED_RTS;
4730 flags |= IWN_TX_NEED_PROTECTION;
4732 flags |= IWN_TX_NEED_RTS | IWN_TX_FULL_TXOP;
4734 if (params->ibp_flags & IEEE80211_BPF_CTS) {
4735 if (sc->hw_type != IWN_HW_REV_TYPE_4965) {
4736 /* 5000 autoselects RTS/CTS or CTS-to-self. */
4737 flags &= ~IWN_TX_NEED_CTS;
4738 flags |= IWN_TX_NEED_PROTECTION;
4740 flags |= IWN_TX_NEED_CTS | IWN_TX_FULL_TXOP;
4742 if (type == IEEE80211_FC0_TYPE_MGT) {
4743 uint8_t subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
4745 /* Tell HW to set timestamp in probe responses. */
4746 if (subtype == IEEE80211_FC0_SUBTYPE_PROBE_RESP)
4747 flags |= IWN_TX_INSERT_TSTAMP;
4749 if (subtype == IEEE80211_FC0_SUBTYPE_ASSOC_REQ ||
4750 subtype == IEEE80211_FC0_SUBTYPE_REASSOC_REQ)
4751 tx->timeout = htole16(3);
4753 tx->timeout = htole16(2);
4755 tx->timeout = htole16(0);
4758 /* First segment length must be a multiple of 4. */
4759 flags |= IWN_TX_NEED_PADDING;
4760 pad = 4 - (hdrlen & 3);
4764 if (ieee80211_radiotap_active_vap(vap)) {
4765 struct iwn_tx_radiotap_header *tap = &sc->sc_txtap;
4768 tap->wt_rate = rate;
4770 ieee80211_radiotap_tx(vap, m);
4773 tx->len = htole16(totlen);
4775 tx->id = sc->broadcast_id;
4776 tx->rts_ntries = params->ibp_try1;
4777 tx->data_ntries = params->ibp_try0;
4778 tx->lifetime = htole32(IWN_LIFETIME_INFINITE);
4779 tx->rate = iwn_rate_to_plcp(sc, ni, rate);
4781 /* Group or management frame. */
4784 /* Set physical address of "scratch area". */
4785 tx->loaddr = htole32(IWN_LOADDR(data->scratch_paddr));
4786 tx->hiaddr = IWN_HIADDR(data->scratch_paddr);
4788 /* Copy 802.11 header in TX command. */
4789 memcpy((uint8_t *)(tx + 1), wh, hdrlen);
4791 /* Trim 802.11 header. */
4794 tx->flags = htole32(flags);
4796 error = bus_dmamap_load_mbuf_sg(ring->data_dmat, data->map, m, segs,
4797 &nsegs, BUS_DMA_NOWAIT);
4799 if (error != EFBIG) {
4800 device_printf(sc->sc_dev,
4801 "%s: can't map mbuf (error %d)\n", __func__, error);
4804 /* Too many DMA segments, linearize mbuf. */
4805 m1 = m_collapse(m, M_NOWAIT, IWN_MAX_SCATTER - 1);
4807 device_printf(sc->sc_dev,
4808 "%s: could not defrag mbuf\n", __func__);
4813 error = bus_dmamap_load_mbuf_sg(ring->data_dmat, data->map, m,
4814 segs, &nsegs, BUS_DMA_NOWAIT);
4816 device_printf(sc->sc_dev,
4817 "%s: can't map mbuf (error %d)\n", __func__, error);
4825 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: qid %d idx %d len %d nsegs %d\n",
4826 __func__, ring->qid, ring->cur, m->m_pkthdr.len, nsegs);
4828 /* Fill TX descriptor. */
4831 desc->nsegs += nsegs;
4832 /* First DMA segment is used by the TX command. */
4833 desc->segs[0].addr = htole32(IWN_LOADDR(data->cmd_paddr));
4834 desc->segs[0].len = htole16(IWN_HIADDR(data->cmd_paddr) |
4835 (4 + sizeof (*tx) + hdrlen + pad) << 4);
4836 /* Other DMA segments are for data payload. */
4838 for (i = 1; i <= nsegs; i++) {
4839 desc->segs[i].addr = htole32(IWN_LOADDR(seg->ds_addr));
4840 desc->segs[i].len = htole16(IWN_HIADDR(seg->ds_addr) |
4845 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_PREWRITE);
4846 bus_dmamap_sync(ring->cmd_dma.tag, ring->cmd_dma.map,
4847 BUS_DMASYNC_PREWRITE);
4848 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
4849 BUS_DMASYNC_PREWRITE);
4851 /* Update TX scheduler. */
4852 if (ring->qid >= sc->firstaggqueue)
4853 ops->update_sched(sc, ring->qid, ring->cur, tx->id, totlen);
4856 ring->cur = (ring->cur + 1) % IWN_TX_RING_COUNT;
4857 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, ring->qid << 8 | ring->cur);
4859 /* Mark TX ring as full if we reach a certain threshold. */
4860 if (++ring->queued > IWN_TX_RING_HIMARK)
4861 sc->qfullmsk |= 1 << ring->qid;
4863 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
4869 iwn_xmit_task(void *arg0, int pending)
4871 struct iwn_softc *sc = arg0;
4872 struct ieee80211_node *ni;
4875 struct ieee80211_bpf_params p;
4878 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: called\n", __func__);
4882 * Dequeue frames, attempt to transmit,
4883 * then disable beaconwait when we're done.
4885 while ((m = mbufq_dequeue(&sc->sc_xmit_queue)) != NULL) {
4887 ni = (struct ieee80211_node *)m->m_pkthdr.rcvif;
4889 /* Get xmit params if appropriate */
4890 if (ieee80211_get_xmit_params(m, &p) == 0)
4893 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: m=%p, have_p=%d\n",
4894 __func__, m, have_p);
4896 /* If we have xmit params, use them */
4898 error = iwn_tx_data_raw(sc, m, ni, &p);
4900 error = iwn_tx_data(sc, m, ni);
4903 if_inc_counter(ni->ni_vap->iv_ifp,
4904 IFCOUNTER_OERRORS, 1);
4905 ieee80211_free_node(ni);
4910 sc->sc_beacon_wait = 0;
4915 * raw frame xmit - free node/reference if failed.
4918 iwn_raw_xmit(struct ieee80211_node *ni, struct mbuf *m,
4919 const struct ieee80211_bpf_params *params)
4921 struct ieee80211com *ic = ni->ni_ic;
4922 struct iwn_softc *sc = ic->ic_softc;
4925 DPRINTF(sc, IWN_DEBUG_XMIT | IWN_DEBUG_TRACE, "->%s begin\n", __func__);
4928 if ((sc->sc_flags & IWN_FLAG_RUNNING) == 0) {
4934 /* queue frame if we have to */
4935 if (sc->sc_beacon_wait) {
4936 if (iwn_xmit_queue_enqueue(sc, m) != 0) {
4941 /* Queued, so just return OK */
4946 if (params == NULL) {
4948 * Legacy path; interpret frame contents to decide
4949 * precisely how to send the frame.
4951 error = iwn_tx_data(sc, m, ni);
4954 * Caller supplied explicit parameters to use in
4955 * sending the frame.
4957 error = iwn_tx_data_raw(sc, m, ni, params);
4960 sc->sc_tx_timer = 5;
4966 DPRINTF(sc, IWN_DEBUG_TRACE | IWN_DEBUG_XMIT, "->%s: end\n",__func__);
4972 * transmit - don't free mbuf if failed; don't free node ref if failed.
4975 iwn_transmit(struct ieee80211com *ic, struct mbuf *m)
4977 struct iwn_softc *sc = ic->ic_softc;
4978 struct ieee80211_node *ni;
4981 ni = (struct ieee80211_node *)m->m_pkthdr.rcvif;
4984 if ((sc->sc_flags & IWN_FLAG_RUNNING) == 0 || sc->sc_beacon_wait) {
4994 error = iwn_tx_data(sc, m, ni);
4996 sc->sc_tx_timer = 5;
5002 iwn_scan_timeout(void *arg)
5004 struct iwn_softc *sc = arg;
5005 struct ieee80211com *ic = &sc->sc_ic;
5007 ic_printf(ic, "scan timeout\n");
5008 ieee80211_restart_all(ic);
5012 iwn_watchdog(void *arg)
5014 struct iwn_softc *sc = arg;
5015 struct ieee80211com *ic = &sc->sc_ic;
5017 IWN_LOCK_ASSERT(sc);
5019 KASSERT(sc->sc_flags & IWN_FLAG_RUNNING, ("not running"));
5021 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5023 if (sc->sc_tx_timer > 0) {
5024 if (--sc->sc_tx_timer == 0) {
5025 ic_printf(ic, "device timeout\n");
5026 ieee80211_restart_all(ic);
5030 callout_reset(&sc->watchdog_to, hz, iwn_watchdog, sc);
5034 iwn_cdev_open(struct cdev *dev, int flags, int type, struct thread *td)
5041 iwn_cdev_close(struct cdev *dev, int flags, int type, struct thread *td)
5048 iwn_cdev_ioctl(struct cdev *dev, unsigned long cmd, caddr_t data, int fflag,
5052 struct iwn_softc *sc = dev->si_drv1;
5053 struct iwn_ioctl_data *d;
5055 rc = priv_check(td, PRIV_DRIVER);
5061 d = (struct iwn_ioctl_data *) data;
5063 /* XXX validate permissions/memory/etc? */
5064 rc = copyout(&sc->last_stat, d->dst_addr, sizeof(struct iwn_stats));
5069 memset(&sc->last_stat, 0, sizeof(struct iwn_stats));
5080 iwn_ioctl(struct ieee80211com *ic, u_long cmd, void *data)
5087 iwn_parent(struct ieee80211com *ic)
5089 struct iwn_softc *sc = ic->ic_softc;
5090 struct ieee80211vap *vap;
5093 if (ic->ic_nrunning > 0) {
5094 error = iwn_init(sc);
5098 ieee80211_start_all(ic);
5101 /* radio is disabled via RFkill switch */
5102 taskqueue_enqueue(sc->sc_tq, &sc->sc_rftoggle_task);
5105 vap = TAILQ_FIRST(&ic->ic_vaps);
5107 ieee80211_stop(vap);
5115 * Send a command to the firmware.
5118 iwn_cmd(struct iwn_softc *sc, int code, const void *buf, int size, int async)
5120 struct iwn_tx_ring *ring;
5121 struct iwn_tx_desc *desc;
5122 struct iwn_tx_data *data;
5123 struct iwn_tx_cmd *cmd;
5129 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
5132 IWN_LOCK_ASSERT(sc);
5134 if (sc->sc_flags & IWN_FLAG_PAN_SUPPORT)
5135 cmd_queue_num = IWN_PAN_CMD_QUEUE;
5137 cmd_queue_num = IWN_CMD_QUEUE_NUM;
5139 ring = &sc->txq[cmd_queue_num];
5140 desc = &ring->desc[ring->cur];
5141 data = &ring->data[ring->cur];
5144 if (size > sizeof cmd->data) {
5145 /* Command is too large to fit in a descriptor. */
5146 if (totlen > MCLBYTES)
5148 m = m_getjcl(M_NOWAIT, MT_DATA, M_PKTHDR, MJUMPAGESIZE);
5151 cmd = mtod(m, struct iwn_tx_cmd *);
5152 error = bus_dmamap_load(ring->data_dmat, data->map, cmd,
5153 totlen, iwn_dma_map_addr, &paddr, BUS_DMA_NOWAIT);
5160 cmd = &ring->cmd[ring->cur];
5161 paddr = data->cmd_paddr;
5166 cmd->qid = ring->qid;
5167 cmd->idx = ring->cur;
5168 memcpy(cmd->data, buf, size);
5171 desc->segs[0].addr = htole32(IWN_LOADDR(paddr));
5172 desc->segs[0].len = htole16(IWN_HIADDR(paddr) | totlen << 4);
5174 DPRINTF(sc, IWN_DEBUG_CMD, "%s: %s (0x%x) flags %d qid %d idx %d\n",
5175 __func__, iwn_intr_str(cmd->code), cmd->code,
5176 cmd->flags, cmd->qid, cmd->idx);
5178 if (size > sizeof cmd->data) {
5179 bus_dmamap_sync(ring->data_dmat, data->map,
5180 BUS_DMASYNC_PREWRITE);
5182 bus_dmamap_sync(ring->cmd_dma.tag, ring->cmd_dma.map,
5183 BUS_DMASYNC_PREWRITE);
5185 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
5186 BUS_DMASYNC_PREWRITE);
5188 /* Kick command ring. */
5189 ring->cur = (ring->cur + 1) % IWN_TX_RING_COUNT;
5190 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, ring->qid << 8 | ring->cur);
5192 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
5194 return async ? 0 : msleep(desc, &sc->sc_mtx, PCATCH, "iwncmd", hz);
5198 iwn4965_add_node(struct iwn_softc *sc, struct iwn_node_info *node, int async)
5200 struct iwn4965_node_info hnode;
5203 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5206 * We use the node structure for 5000 Series internally (it is
5207 * a superset of the one for 4965AGN). We thus copy the common
5208 * fields before sending the command.
5210 src = (caddr_t)node;
5211 dst = (caddr_t)&hnode;
5212 memcpy(dst, src, 48);
5213 /* Skip TSC, RX MIC and TX MIC fields from ``src''. */
5214 memcpy(dst + 48, src + 72, 20);
5215 return iwn_cmd(sc, IWN_CMD_ADD_NODE, &hnode, sizeof hnode, async);
5219 iwn5000_add_node(struct iwn_softc *sc, struct iwn_node_info *node, int async)
5222 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5224 /* Direct mapping. */
5225 return iwn_cmd(sc, IWN_CMD_ADD_NODE, node, sizeof (*node), async);
5229 iwn_set_link_quality(struct iwn_softc *sc, struct ieee80211_node *ni)
5231 struct iwn_node *wn = (void *)ni;
5232 struct ieee80211_rateset *rs;
5233 struct iwn_cmd_link_quality linkq;
5234 int i, rate, txrate;
5237 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
5239 memset(&linkq, 0, sizeof linkq);
5241 linkq.antmsk_1stream = iwn_get_1stream_tx_antmask(sc);
5242 linkq.antmsk_2stream = iwn_get_2stream_tx_antmask(sc);
5244 linkq.ampdu_max = 32; /* XXX negotiated? */
5245 linkq.ampdu_threshold = 3;
5246 linkq.ampdu_limit = htole16(4000); /* 4ms */
5248 DPRINTF(sc, IWN_DEBUG_XMIT,
5249 "%s: 1stream antenna=0x%02x, 2stream antenna=0x%02x, ntxstreams=%d\n",
5251 linkq.antmsk_1stream,
5252 linkq.antmsk_2stream,
5256 * Are we using 11n rates? Ensure the channel is
5257 * 11n _and_ we have some 11n rates, or don't
5260 if (IEEE80211_IS_CHAN_HT(ni->ni_chan) && ni->ni_htrates.rs_nrates > 0) {
5261 rs = (struct ieee80211_rateset *) &ni->ni_htrates;
5268 /* Start at highest available bit-rate. */
5270 * XXX this is all very dirty!
5273 txrate = ni->ni_htrates.rs_nrates - 1;
5275 txrate = rs->rs_nrates - 1;
5276 for (i = 0; i < IWN_MAX_TX_RETRIES; i++) {
5280 * XXX TODO: ensure the last two slots are the two lowest
5281 * rate entries, just for now.
5283 if (i == 14 || i == 15)
5287 rate = IEEE80211_RATE_MCS | rs->rs_rates[txrate];
5289 rate = IEEE80211_RV(rs->rs_rates[txrate]);
5291 /* Do rate -> PLCP config mapping */
5292 plcp = iwn_rate_to_plcp(sc, ni, rate);
5293 linkq.retry[i] = plcp;
5294 DPRINTF(sc, IWN_DEBUG_XMIT,
5295 "%s: i=%d, txrate=%d, rate=0x%02x, plcp=0x%08x\n",
5303 * The mimo field is an index into the table which
5304 * indicates the first index where it and subsequent entries
5305 * will not be using MIMO.
5307 * Since we're filling linkq from 0..15 and we're filling
5308 * from the highest MCS rates to the lowest rates, if we
5309 * _are_ doing a dual-stream rate, set mimo to idx+1 (ie,
5310 * the next entry.) That way if the next entry is a non-MIMO
5311 * entry, we're already pointing at it.
5313 if ((le32toh(plcp) & IWN_RFLAG_MCS) &&
5314 IEEE80211_RV(le32toh(plcp)) > 7)
5317 /* Next retry at immediate lower bit-rate. */
5322 * If we reached the end of the list and indeed we hit
5323 * all MIMO rates (eg 5300 doing MCS23-15) then yes,
5324 * set mimo to 15. Setting it to 16 panics the firmware.
5326 if (linkq.mimo > 15)
5329 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: mimo = %d\n", __func__, linkq.mimo);
5331 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
5333 return iwn_cmd(sc, IWN_CMD_LINK_QUALITY, &linkq, sizeof linkq, 1);
5337 * Broadcast node is used to send group-addressed and management frames.
5340 iwn_add_broadcast_node(struct iwn_softc *sc, int async)
5342 struct iwn_ops *ops = &sc->ops;
5343 struct ieee80211com *ic = &sc->sc_ic;
5344 struct iwn_node_info node;
5345 struct iwn_cmd_link_quality linkq;
5349 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
5351 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX];
5353 memset(&node, 0, sizeof node);
5354 IEEE80211_ADDR_COPY(node.macaddr, ieee80211broadcastaddr);
5355 node.id = sc->broadcast_id;
5356 DPRINTF(sc, IWN_DEBUG_RESET, "%s: adding broadcast node\n", __func__);
5357 if ((error = ops->add_node(sc, &node, async)) != 0)
5360 /* Use the first valid TX antenna. */
5361 txant = IWN_LSB(sc->txchainmask);
5363 memset(&linkq, 0, sizeof linkq);
5364 linkq.id = sc->broadcast_id;
5365 linkq.antmsk_1stream = iwn_get_1stream_tx_antmask(sc);
5366 linkq.antmsk_2stream = iwn_get_2stream_tx_antmask(sc);
5367 linkq.ampdu_max = 64;
5368 linkq.ampdu_threshold = 3;
5369 linkq.ampdu_limit = htole16(4000); /* 4ms */
5371 /* Use lowest mandatory bit-rate. */
5372 /* XXX rate table lookup? */
5373 if (IEEE80211_IS_CHAN_5GHZ(ic->ic_curchan))
5374 linkq.retry[0] = htole32(0xd);
5376 linkq.retry[0] = htole32(10 | IWN_RFLAG_CCK);
5377 linkq.retry[0] |= htole32(IWN_RFLAG_ANT(txant));
5378 /* Use same bit-rate for all TX retries. */
5379 for (i = 1; i < IWN_MAX_TX_RETRIES; i++) {
5380 linkq.retry[i] = linkq.retry[0];
5383 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
5385 return iwn_cmd(sc, IWN_CMD_LINK_QUALITY, &linkq, sizeof linkq, async);
5389 iwn_updateedca(struct ieee80211com *ic)
5391 #define IWN_EXP2(x) ((1 << (x)) - 1) /* CWmin = 2^ECWmin - 1 */
5392 struct iwn_softc *sc = ic->ic_softc;
5393 struct iwn_edca_params cmd;
5396 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
5398 memset(&cmd, 0, sizeof cmd);
5399 cmd.flags = htole32(IWN_EDCA_UPDATE);
5402 for (aci = 0; aci < WME_NUM_AC; aci++) {
5403 const struct wmeParams *ac =
5404 &ic->ic_wme.wme_chanParams.cap_wmeParams[aci];
5405 cmd.ac[aci].aifsn = ac->wmep_aifsn;
5406 cmd.ac[aci].cwmin = htole16(IWN_EXP2(ac->wmep_logcwmin));
5407 cmd.ac[aci].cwmax = htole16(IWN_EXP2(ac->wmep_logcwmax));
5408 cmd.ac[aci].txoplimit =
5409 htole16(IEEE80211_TXOP_TO_US(ac->wmep_txopLimit));
5411 IEEE80211_UNLOCK(ic);
5414 (void)iwn_cmd(sc, IWN_CMD_EDCA_PARAMS, &cmd, sizeof cmd, 1);
5417 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
5424 iwn_update_mcast(struct ieee80211com *ic)
5430 iwn_set_led(struct iwn_softc *sc, uint8_t which, uint8_t off, uint8_t on)
5432 struct iwn_cmd_led led;
5434 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5437 /* XXX don't set LEDs during scan? */
5438 if (sc->sc_is_scanning)
5442 /* Clear microcode LED ownership. */
5443 IWN_CLRBITS(sc, IWN_LED, IWN_LED_BSM_CTRL);
5446 led.unit = htole32(10000); /* on/off in unit of 100ms */
5449 (void)iwn_cmd(sc, IWN_CMD_SET_LED, &led, sizeof led, 1);
5453 * Set the critical temperature at which the firmware will stop the radio
5457 iwn_set_critical_temp(struct iwn_softc *sc)
5459 struct iwn_critical_temp crit;
5462 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5464 IWN_WRITE(sc, IWN_UCODE_GP1_CLR, IWN_UCODE_GP1_CTEMP_STOP_RF);
5466 if (sc->hw_type == IWN_HW_REV_TYPE_5150)
5467 temp = (IWN_CTOK(110) - sc->temp_off) * -5;
5468 else if (sc->hw_type == IWN_HW_REV_TYPE_4965)
5469 temp = IWN_CTOK(110);
5472 memset(&crit, 0, sizeof crit);
5473 crit.tempR = htole32(temp);
5474 DPRINTF(sc, IWN_DEBUG_RESET, "setting critical temp to %d\n", temp);
5475 return iwn_cmd(sc, IWN_CMD_SET_CRITICAL_TEMP, &crit, sizeof crit, 0);
5479 iwn_set_timing(struct iwn_softc *sc, struct ieee80211_node *ni)
5481 struct iwn_cmd_timing cmd;
5484 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5486 memset(&cmd, 0, sizeof cmd);
5487 memcpy(&cmd.tstamp, ni->ni_tstamp.data, sizeof (uint64_t));
5488 cmd.bintval = htole16(ni->ni_intval);
5489 cmd.lintval = htole16(10);
5491 /* Compute remaining time until next beacon. */
5492 val = (uint64_t)ni->ni_intval * IEEE80211_DUR_TU;
5493 mod = le64toh(cmd.tstamp) % val;
5494 cmd.binitval = htole32((uint32_t)(val - mod));
5496 DPRINTF(sc, IWN_DEBUG_RESET, "timing bintval=%u tstamp=%ju, init=%u\n",
5497 ni->ni_intval, le64toh(cmd.tstamp), (uint32_t)(val - mod));
5499 return iwn_cmd(sc, IWN_CMD_TIMING, &cmd, sizeof cmd, 1);
5503 iwn4965_power_calibration(struct iwn_softc *sc, int temp)
5505 struct ieee80211com *ic = &sc->sc_ic;
5507 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5509 /* Adjust TX power if need be (delta >= 3 degC). */
5510 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: temperature %d->%d\n",
5511 __func__, sc->temp, temp);
5512 if (abs(temp - sc->temp) >= 3) {
5513 /* Record temperature of last calibration. */
5515 (void)iwn4965_set_txpower(sc, ic->ic_bsschan, 1);
5520 * Set TX power for current channel (each rate has its own power settings).
5521 * This function takes into account the regulatory information from EEPROM,
5522 * the current temperature and the current voltage.
5525 iwn4965_set_txpower(struct iwn_softc *sc, struct ieee80211_channel *ch,
5528 /* Fixed-point arithmetic division using a n-bit fractional part. */
5529 #define fdivround(a, b, n) \
5530 ((((1 << n) * (a)) / (b) + (1 << n) / 2) / (1 << n))
5531 /* Linear interpolation. */
5532 #define interpolate(x, x1, y1, x2, y2, n) \
5533 ((y1) + fdivround(((int)(x) - (x1)) * ((y2) - (y1)), (x2) - (x1), n))
5535 static const int tdiv[IWN_NATTEN_GROUPS] = { 9, 8, 8, 8, 6 };
5536 struct iwn_ucode_info *uc = &sc->ucode_info;
5537 struct iwn4965_cmd_txpower cmd;
5538 struct iwn4965_eeprom_chan_samples *chans;
5539 const uint8_t *rf_gain, *dsp_gain;
5540 int32_t vdiff, tdiff;
5541 int i, c, grp, maxpwr;
5544 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX];
5545 /* Retrieve current channel from last RXON. */
5546 chan = sc->rxon->chan;
5547 DPRINTF(sc, IWN_DEBUG_RESET, "setting TX power for channel %d\n",
5550 memset(&cmd, 0, sizeof cmd);
5551 cmd.band = IEEE80211_IS_CHAN_5GHZ(ch) ? 0 : 1;
5554 if (IEEE80211_IS_CHAN_5GHZ(ch)) {
5555 maxpwr = sc->maxpwr5GHz;
5556 rf_gain = iwn4965_rf_gain_5ghz;
5557 dsp_gain = iwn4965_dsp_gain_5ghz;
5559 maxpwr = sc->maxpwr2GHz;
5560 rf_gain = iwn4965_rf_gain_2ghz;
5561 dsp_gain = iwn4965_dsp_gain_2ghz;
5564 /* Compute voltage compensation. */
5565 vdiff = ((int32_t)le32toh(uc->volt) - sc->eeprom_voltage) / 7;
5570 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
5571 "%s: voltage compensation=%d (UCODE=%d, EEPROM=%d)\n",
5572 __func__, vdiff, le32toh(uc->volt), sc->eeprom_voltage);
5574 /* Get channel attenuation group. */
5575 if (chan <= 20) /* 1-20 */
5577 else if (chan <= 43) /* 34-43 */
5579 else if (chan <= 70) /* 44-70 */
5581 else if (chan <= 124) /* 71-124 */
5585 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
5586 "%s: chan %d, attenuation group=%d\n", __func__, chan, grp);
5588 /* Get channel sub-band. */
5589 for (i = 0; i < IWN_NBANDS; i++)
5590 if (sc->bands[i].lo != 0 &&
5591 sc->bands[i].lo <= chan && chan <= sc->bands[i].hi)
5593 if (i == IWN_NBANDS) /* Can't happen in real-life. */
5595 chans = sc->bands[i].chans;
5596 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
5597 "%s: chan %d sub-band=%d\n", __func__, chan, i);
5599 for (c = 0; c < 2; c++) {
5600 uint8_t power, gain, temp;
5601 int maxchpwr, pwr, ridx, idx;
5603 power = interpolate(chan,
5604 chans[0].num, chans[0].samples[c][1].power,
5605 chans[1].num, chans[1].samples[c][1].power, 1);
5606 gain = interpolate(chan,
5607 chans[0].num, chans[0].samples[c][1].gain,
5608 chans[1].num, chans[1].samples[c][1].gain, 1);
5609 temp = interpolate(chan,
5610 chans[0].num, chans[0].samples[c][1].temp,
5611 chans[1].num, chans[1].samples[c][1].temp, 1);
5612 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
5613 "%s: Tx chain %d: power=%d gain=%d temp=%d\n",
5614 __func__, c, power, gain, temp);
5616 /* Compute temperature compensation. */
5617 tdiff = ((sc->temp - temp) * 2) / tdiv[grp];
5618 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
5619 "%s: temperature compensation=%d (current=%d, EEPROM=%d)\n",
5620 __func__, tdiff, sc->temp, temp);
5622 for (ridx = 0; ridx <= IWN_RIDX_MAX; ridx++) {
5623 /* Convert dBm to half-dBm. */
5624 maxchpwr = sc->maxpwr[chan] * 2;
5626 maxchpwr -= 6; /* MIMO 2T: -3dB */
5630 /* Adjust TX power based on rate. */
5631 if ((ridx % 8) == 5)
5632 pwr -= 15; /* OFDM48: -7.5dB */
5633 else if ((ridx % 8) == 6)
5634 pwr -= 17; /* OFDM54: -8.5dB */
5635 else if ((ridx % 8) == 7)
5636 pwr -= 20; /* OFDM60: -10dB */
5638 pwr -= 10; /* Others: -5dB */
5640 /* Do not exceed channel max TX power. */
5644 idx = gain - (pwr - power) - tdiff - vdiff;
5645 if ((ridx / 8) & 1) /* MIMO */
5646 idx += (int32_t)le32toh(uc->atten[grp][c]);
5649 idx += 9; /* 5GHz */
5650 if (ridx == IWN_RIDX_MAX)
5653 /* Make sure idx stays in a valid range. */
5656 else if (idx > IWN4965_MAX_PWR_INDEX)
5657 idx = IWN4965_MAX_PWR_INDEX;
5659 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
5660 "%s: Tx chain %d, rate idx %d: power=%d\n",
5661 __func__, c, ridx, idx);
5662 cmd.power[ridx].rf_gain[c] = rf_gain[idx];
5663 cmd.power[ridx].dsp_gain[c] = dsp_gain[idx];
5667 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
5668 "%s: set tx power for chan %d\n", __func__, chan);
5669 return iwn_cmd(sc, IWN_CMD_TXPOWER, &cmd, sizeof cmd, async);
5676 iwn5000_set_txpower(struct iwn_softc *sc, struct ieee80211_channel *ch,
5679 struct iwn5000_cmd_txpower cmd;
5682 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5685 * TX power calibration is handled automatically by the firmware
5688 memset(&cmd, 0, sizeof cmd);
5689 cmd.global_limit = 2 * IWN5000_TXPOWER_MAX_DBM; /* 16 dBm */
5690 cmd.flags = IWN5000_TXPOWER_NO_CLOSED;
5691 cmd.srv_limit = IWN5000_TXPOWER_AUTO;
5692 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_XMIT,
5693 "%s: setting TX power; rev=%d\n",
5695 IWN_UCODE_API(sc->ucode_rev));
5696 if (IWN_UCODE_API(sc->ucode_rev) == 1)
5697 cmdid = IWN_CMD_TXPOWER_DBM_V1;
5699 cmdid = IWN_CMD_TXPOWER_DBM;
5700 return iwn_cmd(sc, cmdid, &cmd, sizeof cmd, async);
5704 * Retrieve the maximum RSSI (in dBm) among receivers.
5707 iwn4965_get_rssi(struct iwn_softc *sc, struct iwn_rx_stat *stat)
5709 struct iwn4965_rx_phystat *phy = (void *)stat->phybuf;
5713 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5715 mask = (le16toh(phy->antenna) >> 4) & IWN_ANT_ABC;
5716 agc = (le16toh(phy->agc) >> 7) & 0x7f;
5719 if (mask & IWN_ANT_A)
5720 rssi = MAX(rssi, phy->rssi[0]);
5721 if (mask & IWN_ANT_B)
5722 rssi = MAX(rssi, phy->rssi[2]);
5723 if (mask & IWN_ANT_C)
5724 rssi = MAX(rssi, phy->rssi[4]);
5726 DPRINTF(sc, IWN_DEBUG_RECV,
5727 "%s: agc %d mask 0x%x rssi %d %d %d result %d\n", __func__, agc,
5728 mask, phy->rssi[0], phy->rssi[2], phy->rssi[4],
5729 rssi - agc - IWN_RSSI_TO_DBM);
5730 return rssi - agc - IWN_RSSI_TO_DBM;
5734 iwn5000_get_rssi(struct iwn_softc *sc, struct iwn_rx_stat *stat)
5736 struct iwn5000_rx_phystat *phy = (void *)stat->phybuf;
5740 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5742 agc = (le32toh(phy->agc) >> 9) & 0x7f;
5744 rssi = MAX(le16toh(phy->rssi[0]) & 0xff,
5745 le16toh(phy->rssi[1]) & 0xff);
5746 rssi = MAX(le16toh(phy->rssi[2]) & 0xff, rssi);
5748 DPRINTF(sc, IWN_DEBUG_RECV,
5749 "%s: agc %d rssi %d %d %d result %d\n", __func__, agc,
5750 phy->rssi[0], phy->rssi[1], phy->rssi[2],
5751 rssi - agc - IWN_RSSI_TO_DBM);
5752 return rssi - agc - IWN_RSSI_TO_DBM;
5756 * Retrieve the average noise (in dBm) among receivers.
5759 iwn_get_noise(const struct iwn_rx_general_stats *stats)
5761 int i, total, nbant, noise;
5764 for (i = 0; i < 3; i++) {
5765 if ((noise = le32toh(stats->noise[i]) & 0xff) == 0)
5770 /* There should be at least one antenna but check anyway. */
5771 return (nbant == 0) ? -127 : (total / nbant) - 107;
5775 * Compute temperature (in degC) from last received statistics.
5778 iwn4965_get_temperature(struct iwn_softc *sc)
5780 struct iwn_ucode_info *uc = &sc->ucode_info;
5781 int32_t r1, r2, r3, r4, temp;
5783 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5785 r1 = le32toh(uc->temp[0].chan20MHz);
5786 r2 = le32toh(uc->temp[1].chan20MHz);
5787 r3 = le32toh(uc->temp[2].chan20MHz);
5788 r4 = le32toh(sc->rawtemp);
5790 if (r1 == r3) /* Prevents division by 0 (should not happen). */
5793 /* Sign-extend 23-bit R4 value to 32-bit. */
5794 r4 = ((r4 & 0xffffff) ^ 0x800000) - 0x800000;
5795 /* Compute temperature in Kelvin. */
5796 temp = (259 * (r4 - r2)) / (r3 - r1);
5797 temp = (temp * 97) / 100 + 8;
5799 DPRINTF(sc, IWN_DEBUG_ANY, "temperature %dK/%dC\n", temp,
5801 return IWN_KTOC(temp);
5805 iwn5000_get_temperature(struct iwn_softc *sc)
5809 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5812 * Temperature is not used by the driver for 5000 Series because
5813 * TX power calibration is handled by firmware.
5815 temp = le32toh(sc->rawtemp);
5816 if (sc->hw_type == IWN_HW_REV_TYPE_5150) {
5817 temp = (temp / -5) + sc->temp_off;
5818 temp = IWN_KTOC(temp);
5824 * Initialize sensitivity calibration state machine.
5827 iwn_init_sensitivity(struct iwn_softc *sc)
5829 struct iwn_ops *ops = &sc->ops;
5830 struct iwn_calib_state *calib = &sc->calib;
5834 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5836 /* Reset calibration state machine. */
5837 memset(calib, 0, sizeof (*calib));
5838 calib->state = IWN_CALIB_STATE_INIT;
5839 calib->cck_state = IWN_CCK_STATE_HIFA;
5840 /* Set initial correlation values. */
5841 calib->ofdm_x1 = sc->limits->min_ofdm_x1;
5842 calib->ofdm_mrc_x1 = sc->limits->min_ofdm_mrc_x1;
5843 calib->ofdm_x4 = sc->limits->min_ofdm_x4;
5844 calib->ofdm_mrc_x4 = sc->limits->min_ofdm_mrc_x4;
5845 calib->cck_x4 = 125;
5846 calib->cck_mrc_x4 = sc->limits->min_cck_mrc_x4;
5847 calib->energy_cck = sc->limits->energy_cck;
5849 /* Write initial sensitivity. */
5850 if ((error = iwn_send_sensitivity(sc)) != 0)
5853 /* Write initial gains. */
5854 if ((error = ops->init_gains(sc)) != 0)
5857 /* Request statistics at each beacon interval. */
5859 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: sending request for statistics\n",
5861 return iwn_cmd(sc, IWN_CMD_GET_STATISTICS, &flags, sizeof flags, 1);
5865 * Collect noise and RSSI statistics for the first 20 beacons received
5866 * after association and use them to determine connected antennas and
5867 * to set differential gains.
5870 iwn_collect_noise(struct iwn_softc *sc,
5871 const struct iwn_rx_general_stats *stats)
5873 struct iwn_ops *ops = &sc->ops;
5874 struct iwn_calib_state *calib = &sc->calib;
5875 struct ieee80211com *ic = &sc->sc_ic;
5879 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
5881 /* Accumulate RSSI and noise for all 3 antennas. */
5882 for (i = 0; i < 3; i++) {
5883 calib->rssi[i] += le32toh(stats->rssi[i]) & 0xff;
5884 calib->noise[i] += le32toh(stats->noise[i]) & 0xff;
5886 /* NB: We update differential gains only once after 20 beacons. */
5887 if (++calib->nbeacons < 20)
5890 /* Determine highest average RSSI. */
5891 val = MAX(calib->rssi[0], calib->rssi[1]);
5892 val = MAX(calib->rssi[2], val);
5894 /* Determine which antennas are connected. */
5895 sc->chainmask = sc->rxchainmask;
5896 for (i = 0; i < 3; i++)
5897 if (val - calib->rssi[i] > 15 * 20)
5898 sc->chainmask &= ~(1 << i);
5899 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_XMIT,
5900 "%s: RX chains mask: theoretical=0x%x, actual=0x%x\n",
5901 __func__, sc->rxchainmask, sc->chainmask);
5903 /* If none of the TX antennas are connected, keep at least one. */
5904 if ((sc->chainmask & sc->txchainmask) == 0)
5905 sc->chainmask |= IWN_LSB(sc->txchainmask);
5907 (void)ops->set_gains(sc);
5908 calib->state = IWN_CALIB_STATE_RUN;
5911 /* XXX Disable RX chains with no antennas connected. */
5912 sc->rxon->rxchain = htole16(IWN_RXCHAIN_SEL(sc->chainmask));
5913 if (sc->sc_is_scanning)
5914 device_printf(sc->sc_dev,
5915 "%s: is_scanning set, before RXON\n",
5917 (void)iwn_cmd(sc, IWN_CMD_RXON, sc->rxon, sc->rxonsz, 1);
5920 /* Enable power-saving mode if requested by user. */
5921 if (ic->ic_flags & IEEE80211_F_PMGTON)
5922 (void)iwn_set_pslevel(sc, 0, 3, 1);
5924 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
5929 iwn4965_init_gains(struct iwn_softc *sc)
5931 struct iwn_phy_calib_gain cmd;
5933 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5935 memset(&cmd, 0, sizeof cmd);
5936 cmd.code = IWN4965_PHY_CALIB_DIFF_GAIN;
5937 /* Differential gains initially set to 0 for all 3 antennas. */
5938 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
5939 "%s: setting initial differential gains\n", __func__);
5940 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 1);
5944 iwn5000_init_gains(struct iwn_softc *sc)
5946 struct iwn_phy_calib cmd;
5948 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5950 memset(&cmd, 0, sizeof cmd);
5951 cmd.code = sc->reset_noise_gain;
5954 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
5955 "%s: setting initial differential gains\n", __func__);
5956 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 1);
5960 iwn4965_set_gains(struct iwn_softc *sc)
5962 struct iwn_calib_state *calib = &sc->calib;
5963 struct iwn_phy_calib_gain cmd;
5964 int i, delta, noise;
5966 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5968 /* Get minimal noise among connected antennas. */
5969 noise = INT_MAX; /* NB: There's at least one antenna. */
5970 for (i = 0; i < 3; i++)
5971 if (sc->chainmask & (1 << i))
5972 noise = MIN(calib->noise[i], noise);
5974 memset(&cmd, 0, sizeof cmd);
5975 cmd.code = IWN4965_PHY_CALIB_DIFF_GAIN;
5976 /* Set differential gains for connected antennas. */
5977 for (i = 0; i < 3; i++) {
5978 if (sc->chainmask & (1 << i)) {
5979 /* Compute attenuation (in unit of 1.5dB). */
5980 delta = (noise - (int32_t)calib->noise[i]) / 30;
5981 /* NB: delta <= 0 */
5982 /* Limit to [-4.5dB,0]. */
5983 cmd.gain[i] = MIN(abs(delta), 3);
5985 cmd.gain[i] |= 1 << 2; /* sign bit */
5988 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
5989 "setting differential gains Ant A/B/C: %x/%x/%x (%x)\n",
5990 cmd.gain[0], cmd.gain[1], cmd.gain[2], sc->chainmask);
5991 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 1);
5995 iwn5000_set_gains(struct iwn_softc *sc)
5997 struct iwn_calib_state *calib = &sc->calib;
5998 struct iwn_phy_calib_gain cmd;
5999 int i, ant, div, delta;
6001 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
6003 /* We collected 20 beacons and !=6050 need a 1.5 factor. */
6004 div = (sc->hw_type == IWN_HW_REV_TYPE_6050) ? 20 : 30;
6006 memset(&cmd, 0, sizeof cmd);
6007 cmd.code = sc->noise_gain;
6010 /* Get first available RX antenna as referential. */
6011 ant = IWN_LSB(sc->rxchainmask);
6012 /* Set differential gains for other antennas. */
6013 for (i = ant + 1; i < 3; i++) {
6014 if (sc->chainmask & (1 << i)) {
6015 /* The delta is relative to antenna "ant". */
6016 delta = ((int32_t)calib->noise[ant] -
6017 (int32_t)calib->noise[i]) / div;
6018 /* Limit to [-4.5dB,+4.5dB]. */
6019 cmd.gain[i - 1] = MIN(abs(delta), 3);
6021 cmd.gain[i - 1] |= 1 << 2; /* sign bit */
6024 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_XMIT,
6025 "setting differential gains Ant B/C: %x/%x (%x)\n",
6026 cmd.gain[0], cmd.gain[1], sc->chainmask);
6027 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 1);
6031 * Tune RF RX sensitivity based on the number of false alarms detected
6032 * during the last beacon period.
6035 iwn_tune_sensitivity(struct iwn_softc *sc, const struct iwn_rx_stats *stats)
6037 #define inc(val, inc, max) \
6038 if ((val) < (max)) { \
6039 if ((val) < (max) - (inc)) \
6045 #define dec(val, dec, min) \
6046 if ((val) > (min)) { \
6047 if ((val) > (min) + (dec)) \
6054 const struct iwn_sensitivity_limits *limits = sc->limits;
6055 struct iwn_calib_state *calib = &sc->calib;
6056 uint32_t val, rxena, fa;
6057 uint32_t energy[3], energy_min;
6058 uint8_t noise[3], noise_ref;
6059 int i, needs_update = 0;
6061 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
6063 /* Check that we've been enabled long enough. */
6064 if ((rxena = le32toh(stats->general.load)) == 0){
6065 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end not so long\n", __func__);
6069 /* Compute number of false alarms since last call for OFDM. */
6070 fa = le32toh(stats->ofdm.bad_plcp) - calib->bad_plcp_ofdm;
6071 fa += le32toh(stats->ofdm.fa) - calib->fa_ofdm;
6072 fa *= 200 * IEEE80211_DUR_TU; /* 200TU */
6074 if (fa > 50 * rxena) {
6075 /* High false alarm count, decrease sensitivity. */
6076 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
6077 "%s: OFDM high false alarm count: %u\n", __func__, fa);
6078 inc(calib->ofdm_x1, 1, limits->max_ofdm_x1);
6079 inc(calib->ofdm_mrc_x1, 1, limits->max_ofdm_mrc_x1);
6080 inc(calib->ofdm_x4, 1, limits->max_ofdm_x4);
6081 inc(calib->ofdm_mrc_x4, 1, limits->max_ofdm_mrc_x4);
6083 } else if (fa < 5 * rxena) {
6084 /* Low false alarm count, increase sensitivity. */
6085 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
6086 "%s: OFDM low false alarm count: %u\n", __func__, fa);
6087 dec(calib->ofdm_x1, 1, limits->min_ofdm_x1);
6088 dec(calib->ofdm_mrc_x1, 1, limits->min_ofdm_mrc_x1);
6089 dec(calib->ofdm_x4, 1, limits->min_ofdm_x4);
6090 dec(calib->ofdm_mrc_x4, 1, limits->min_ofdm_mrc_x4);
6093 /* Compute maximum noise among 3 receivers. */
6094 for (i = 0; i < 3; i++)
6095 noise[i] = (le32toh(stats->general.noise[i]) >> 8) & 0xff;
6096 val = MAX(noise[0], noise[1]);
6097 val = MAX(noise[2], val);
6098 /* Insert it into our samples table. */
6099 calib->noise_samples[calib->cur_noise_sample] = val;
6100 calib->cur_noise_sample = (calib->cur_noise_sample + 1) % 20;
6102 /* Compute maximum noise among last 20 samples. */
6103 noise_ref = calib->noise_samples[0];
6104 for (i = 1; i < 20; i++)
6105 noise_ref = MAX(noise_ref, calib->noise_samples[i]);
6107 /* Compute maximum energy among 3 receivers. */
6108 for (i = 0; i < 3; i++)
6109 energy[i] = le32toh(stats->general.energy[i]);
6110 val = MIN(energy[0], energy[1]);
6111 val = MIN(energy[2], val);
6112 /* Insert it into our samples table. */
6113 calib->energy_samples[calib->cur_energy_sample] = val;
6114 calib->cur_energy_sample = (calib->cur_energy_sample + 1) % 10;
6116 /* Compute minimum energy among last 10 samples. */
6117 energy_min = calib->energy_samples[0];
6118 for (i = 1; i < 10; i++)
6119 energy_min = MAX(energy_min, calib->energy_samples[i]);
6122 /* Compute number of false alarms since last call for CCK. */
6123 fa = le32toh(stats->cck.bad_plcp) - calib->bad_plcp_cck;
6124 fa += le32toh(stats->cck.fa) - calib->fa_cck;
6125 fa *= 200 * IEEE80211_DUR_TU; /* 200TU */
6127 if (fa > 50 * rxena) {
6128 /* High false alarm count, decrease sensitivity. */
6129 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
6130 "%s: CCK high false alarm count: %u\n", __func__, fa);
6131 calib->cck_state = IWN_CCK_STATE_HIFA;
6134 if (calib->cck_x4 > 160) {
6135 calib->noise_ref = noise_ref;
6136 if (calib->energy_cck > 2)
6137 dec(calib->energy_cck, 2, energy_min);
6139 if (calib->cck_x4 < 160) {
6140 calib->cck_x4 = 161;
6143 inc(calib->cck_x4, 3, limits->max_cck_x4);
6145 inc(calib->cck_mrc_x4, 3, limits->max_cck_mrc_x4);
6147 } else if (fa < 5 * rxena) {
6148 /* Low false alarm count, increase sensitivity. */
6149 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
6150 "%s: CCK low false alarm count: %u\n", __func__, fa);
6151 calib->cck_state = IWN_CCK_STATE_LOFA;
6154 if (calib->cck_state != IWN_CCK_STATE_INIT &&
6155 (((int32_t)calib->noise_ref - (int32_t)noise_ref) > 2 ||
6156 calib->low_fa > 100)) {
6157 inc(calib->energy_cck, 2, limits->min_energy_cck);
6158 dec(calib->cck_x4, 3, limits->min_cck_x4);
6159 dec(calib->cck_mrc_x4, 3, limits->min_cck_mrc_x4);
6162 /* Not worth to increase or decrease sensitivity. */
6163 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
6164 "%s: CCK normal false alarm count: %u\n", __func__, fa);
6166 calib->noise_ref = noise_ref;
6168 if (calib->cck_state == IWN_CCK_STATE_HIFA) {
6169 /* Previous interval had many false alarms. */
6170 dec(calib->energy_cck, 8, energy_min);
6172 calib->cck_state = IWN_CCK_STATE_INIT;
6176 (void)iwn_send_sensitivity(sc);
6178 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
6185 iwn_send_sensitivity(struct iwn_softc *sc)
6187 struct iwn_calib_state *calib = &sc->calib;
6188 struct iwn_enhanced_sensitivity_cmd cmd;
6191 memset(&cmd, 0, sizeof cmd);
6192 len = sizeof (struct iwn_sensitivity_cmd);
6193 cmd.which = IWN_SENSITIVITY_WORKTBL;
6194 /* OFDM modulation. */
6195 cmd.corr_ofdm_x1 = htole16(calib->ofdm_x1);
6196 cmd.corr_ofdm_mrc_x1 = htole16(calib->ofdm_mrc_x1);
6197 cmd.corr_ofdm_x4 = htole16(calib->ofdm_x4);
6198 cmd.corr_ofdm_mrc_x4 = htole16(calib->ofdm_mrc_x4);
6199 cmd.energy_ofdm = htole16(sc->limits->energy_ofdm);
6200 cmd.energy_ofdm_th = htole16(62);
6201 /* CCK modulation. */
6202 cmd.corr_cck_x4 = htole16(calib->cck_x4);
6203 cmd.corr_cck_mrc_x4 = htole16(calib->cck_mrc_x4);
6204 cmd.energy_cck = htole16(calib->energy_cck);
6205 /* Barker modulation: use default values. */
6206 cmd.corr_barker = htole16(190);
6207 cmd.corr_barker_mrc = htole16(sc->limits->barker_mrc);
6209 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
6210 "%s: set sensitivity %d/%d/%d/%d/%d/%d/%d\n", __func__,
6211 calib->ofdm_x1, calib->ofdm_mrc_x1, calib->ofdm_x4,
6212 calib->ofdm_mrc_x4, calib->cck_x4,
6213 calib->cck_mrc_x4, calib->energy_cck);
6215 if (!(sc->sc_flags & IWN_FLAG_ENH_SENS))
6217 /* Enhanced sensitivity settings. */
6218 len = sizeof (struct iwn_enhanced_sensitivity_cmd);
6219 cmd.ofdm_det_slope_mrc = htole16(668);
6220 cmd.ofdm_det_icept_mrc = htole16(4);
6221 cmd.ofdm_det_slope = htole16(486);
6222 cmd.ofdm_det_icept = htole16(37);
6223 cmd.cck_det_slope_mrc = htole16(853);
6224 cmd.cck_det_icept_mrc = htole16(4);
6225 cmd.cck_det_slope = htole16(476);
6226 cmd.cck_det_icept = htole16(99);
6228 return iwn_cmd(sc, IWN_CMD_SET_SENSITIVITY, &cmd, len, 1);
6232 * Look at the increase of PLCP errors over time; if it exceeds
6233 * a programmed threshold then trigger an RF retune.
6236 iwn_check_rx_recovery(struct iwn_softc *sc, struct iwn_stats *rs)
6238 int32_t delta_ofdm, delta_ht, delta_cck;
6239 struct iwn_calib_state *calib = &sc->calib;
6240 int delta_ticks, cur_ticks;
6245 * Calculate the difference between the current and
6246 * previous statistics.
6248 delta_cck = le32toh(rs->rx.cck.bad_plcp) - calib->bad_plcp_cck;
6249 delta_ofdm = le32toh(rs->rx.ofdm.bad_plcp) - calib->bad_plcp_ofdm;
6250 delta_ht = le32toh(rs->rx.ht.bad_plcp) - calib->bad_plcp_ht;
6253 * Calculate the delta in time between successive statistics
6254 * messages. Yes, it can roll over; so we make sure that
6255 * this doesn't happen.
6257 * XXX go figure out what to do about rollover
6258 * XXX go figure out what to do if ticks rolls over to -ve instead!
6259 * XXX go stab signed integer overflow undefined-ness in the face.
6262 delta_ticks = cur_ticks - sc->last_calib_ticks;
6265 * If any are negative, then the firmware likely reset; so just
6266 * bail. We'll pick this up next time.
6268 if (delta_cck < 0 || delta_ofdm < 0 || delta_ht < 0 || delta_ticks < 0)
6272 * delta_ticks is in ticks; we need to convert it up to milliseconds
6273 * so we can do some useful math with it.
6275 delta_msec = ticks_to_msecs(delta_ticks);
6278 * Calculate what our threshold is given the current delta_msec.
6280 thresh = sc->base_params->plcp_err_threshold * delta_msec;
6282 DPRINTF(sc, IWN_DEBUG_STATE,
6283 "%s: time delta: %d; cck=%d, ofdm=%d, ht=%d, total=%d, thresh=%d\n",
6289 (delta_msec + delta_cck + delta_ofdm + delta_ht),
6293 * If we need a retune, then schedule a single channel scan
6294 * to a channel that isn't the currently active one!
6296 * The math from linux iwlwifi:
6298 * if ((delta * 100 / msecs) > threshold)
6300 if (thresh > 0 && (delta_cck + delta_ofdm + delta_ht) * 100 > thresh) {
6301 DPRINTF(sc, IWN_DEBUG_ANY,
6302 "%s: PLCP error threshold raw (%d) comparison (%d) "
6303 "over limit (%d); retune!\n",
6305 (delta_cck + delta_ofdm + delta_ht),
6306 (delta_cck + delta_ofdm + delta_ht) * 100,
6312 * Set STA mode power saving level (between 0 and 5).
6313 * Level 0 is CAM (Continuously Aware Mode), 5 is for maximum power saving.
6316 iwn_set_pslevel(struct iwn_softc *sc, int dtim, int level, int async)
6318 struct iwn_pmgt_cmd cmd;
6319 const struct iwn_pmgt *pmgt;
6320 uint32_t max, skip_dtim;
6324 DPRINTF(sc, IWN_DEBUG_PWRSAVE,
6325 "%s: dtim=%d, level=%d, async=%d\n",
6331 /* Select which PS parameters to use. */
6333 pmgt = &iwn_pmgt[0][level];
6334 else if (dtim <= 10)
6335 pmgt = &iwn_pmgt[1][level];
6337 pmgt = &iwn_pmgt[2][level];
6339 memset(&cmd, 0, sizeof cmd);
6340 if (level != 0) /* not CAM */
6341 cmd.flags |= htole16(IWN_PS_ALLOW_SLEEP);
6343 cmd.flags |= htole16(IWN_PS_FAST_PD);
6344 /* Retrieve PCIe Active State Power Management (ASPM). */
6345 reg = pci_read_config(sc->sc_dev, sc->sc_cap_off + PCIER_LINK_CTL, 4);
6346 if (!(reg & PCIEM_LINK_CTL_ASPMC_L0S)) /* L0s Entry disabled. */
6347 cmd.flags |= htole16(IWN_PS_PCI_PMGT);
6348 cmd.rxtimeout = htole32(pmgt->rxtimeout * 1024);
6349 cmd.txtimeout = htole32(pmgt->txtimeout * 1024);
6355 skip_dtim = pmgt->skip_dtim;
6356 if (skip_dtim != 0) {
6357 cmd.flags |= htole16(IWN_PS_SLEEP_OVER_DTIM);
6358 max = pmgt->intval[4];
6359 if (max == (uint32_t)-1)
6360 max = dtim * (skip_dtim + 1);
6361 else if (max > dtim)
6362 max = rounddown(max, dtim);
6365 for (i = 0; i < 5; i++)
6366 cmd.intval[i] = htole32(MIN(max, pmgt->intval[i]));
6368 DPRINTF(sc, IWN_DEBUG_RESET, "setting power saving level to %d\n",
6370 return iwn_cmd(sc, IWN_CMD_SET_POWER_MODE, &cmd, sizeof cmd, async);
6374 iwn_send_btcoex(struct iwn_softc *sc)
6376 struct iwn_bluetooth cmd;
6378 memset(&cmd, 0, sizeof cmd);
6379 cmd.flags = IWN_BT_COEX_CHAN_ANN | IWN_BT_COEX_BT_PRIO;
6380 cmd.lead_time = IWN_BT_LEAD_TIME_DEF;
6381 cmd.max_kill = IWN_BT_MAX_KILL_DEF;
6382 DPRINTF(sc, IWN_DEBUG_RESET, "%s: configuring bluetooth coexistence\n",
6384 return iwn_cmd(sc, IWN_CMD_BT_COEX, &cmd, sizeof(cmd), 0);
6388 iwn_send_advanced_btcoex(struct iwn_softc *sc)
6390 static const uint32_t btcoex_3wire[12] = {
6391 0xaaaaaaaa, 0xaaaaaaaa, 0xaeaaaaaa, 0xaaaaaaaa,
6392 0xcc00ff28, 0x0000aaaa, 0xcc00aaaa, 0x0000aaaa,
6393 0xc0004000, 0x00004000, 0xf0005000, 0xf0005000,
6395 struct iwn6000_btcoex_config btconfig;
6396 struct iwn2000_btcoex_config btconfig2k;
6397 struct iwn_btcoex_priotable btprio;
6398 struct iwn_btcoex_prot btprot;
6402 memset(&btconfig, 0, sizeof btconfig);
6403 memset(&btconfig2k, 0, sizeof btconfig2k);
6405 flags = IWN_BT_FLAG_COEX6000_MODE_3W <<
6406 IWN_BT_FLAG_COEX6000_MODE_SHIFT; // Done as is in linux kernel 3.2
6408 if (sc->base_params->bt_sco_disable)
6409 flags &= ~IWN_BT_FLAG_SYNC_2_BT_DISABLE;
6411 flags |= IWN_BT_FLAG_SYNC_2_BT_DISABLE;
6413 flags |= IWN_BT_FLAG_COEX6000_CHAN_INHIBITION;
6415 /* Default flags result is 145 as old value */
6418 * Flags value has to be review. Values must change if we
6419 * which to disable it
6421 if (sc->base_params->bt_session_2) {
6422 btconfig2k.flags = flags;
6423 btconfig2k.max_kill = 5;
6424 btconfig2k.bt3_t7_timer = 1;
6425 btconfig2k.kill_ack = htole32(0xffff0000);
6426 btconfig2k.kill_cts = htole32(0xffff0000);
6427 btconfig2k.sample_time = 2;
6428 btconfig2k.bt3_t2_timer = 0xc;
6430 for (i = 0; i < 12; i++)
6431 btconfig2k.lookup_table[i] = htole32(btcoex_3wire[i]);
6432 btconfig2k.valid = htole16(0xff);
6433 btconfig2k.prio_boost = htole32(0xf0);
6434 DPRINTF(sc, IWN_DEBUG_RESET,
6435 "%s: configuring advanced bluetooth coexistence"
6436 " session 2, flags : 0x%x\n",
6439 error = iwn_cmd(sc, IWN_CMD_BT_COEX, &btconfig2k,
6440 sizeof(btconfig2k), 1);
6442 btconfig.flags = flags;
6443 btconfig.max_kill = 5;
6444 btconfig.bt3_t7_timer = 1;
6445 btconfig.kill_ack = htole32(0xffff0000);
6446 btconfig.kill_cts = htole32(0xffff0000);
6447 btconfig.sample_time = 2;
6448 btconfig.bt3_t2_timer = 0xc;
6450 for (i = 0; i < 12; i++)
6451 btconfig.lookup_table[i] = htole32(btcoex_3wire[i]);
6452 btconfig.valid = htole16(0xff);
6453 btconfig.prio_boost = 0xf0;
6454 DPRINTF(sc, IWN_DEBUG_RESET,
6455 "%s: configuring advanced bluetooth coexistence,"
6459 error = iwn_cmd(sc, IWN_CMD_BT_COEX, &btconfig,
6460 sizeof(btconfig), 1);
6466 memset(&btprio, 0, sizeof btprio);
6467 btprio.calib_init1 = 0x6;
6468 btprio.calib_init2 = 0x7;
6469 btprio.calib_periodic_low1 = 0x2;
6470 btprio.calib_periodic_low2 = 0x3;
6471 btprio.calib_periodic_high1 = 0x4;
6472 btprio.calib_periodic_high2 = 0x5;
6474 btprio.scan52 = 0x8;
6475 btprio.scan24 = 0xa;
6476 error = iwn_cmd(sc, IWN_CMD_BT_COEX_PRIOTABLE, &btprio, sizeof(btprio),
6481 /* Force BT state machine change. */
6482 memset(&btprot, 0, sizeof btprot);
6485 error = iwn_cmd(sc, IWN_CMD_BT_COEX_PROT, &btprot, sizeof(btprot), 1);
6489 return iwn_cmd(sc, IWN_CMD_BT_COEX_PROT, &btprot, sizeof(btprot), 1);
6493 iwn5000_runtime_calib(struct iwn_softc *sc)
6495 struct iwn5000_calib_config cmd;
6497 memset(&cmd, 0, sizeof cmd);
6498 cmd.ucode.once.enable = 0xffffffff;
6499 cmd.ucode.once.start = IWN5000_CALIB_DC;
6500 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
6501 "%s: configuring runtime calibration\n", __func__);
6502 return iwn_cmd(sc, IWN5000_CMD_CALIB_CONFIG, &cmd, sizeof(cmd), 0);
6506 iwn_get_rxon_ht_flags(struct iwn_softc *sc, struct ieee80211_channel *c)
6508 struct ieee80211com *ic = &sc->sc_ic;
6509 uint32_t htflags = 0;
6511 if (! IEEE80211_IS_CHAN_HT(c))
6514 htflags |= IWN_RXON_HT_PROTMODE(ic->ic_curhtprotmode);
6516 if (IEEE80211_IS_CHAN_HT40(c)) {
6517 switch (ic->ic_curhtprotmode) {
6518 case IEEE80211_HTINFO_OPMODE_HT20PR:
6519 htflags |= IWN_RXON_HT_MODEPURE40;
6522 htflags |= IWN_RXON_HT_MODEMIXED;
6526 if (IEEE80211_IS_CHAN_HT40D(c))
6527 htflags |= IWN_RXON_HT_HT40MINUS;
6533 iwn_config(struct iwn_softc *sc)
6535 struct iwn_ops *ops = &sc->ops;
6536 struct ieee80211com *ic = &sc->sc_ic;
6537 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
6538 const uint8_t *macaddr;
6543 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
6545 if ((sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSET)
6546 && (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSETv2)) {
6547 device_printf(sc->sc_dev,"%s: temp_offset and temp_offsetv2 are"
6548 " exclusive each together. Review NIC config file. Conf"
6549 " : 0x%08x Flags : 0x%08x \n", __func__,
6550 sc->base_params->calib_need,
6551 (IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSET |
6552 IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSETv2));
6556 /* Compute temperature calib if needed. Will be send by send calib */
6557 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSET) {
6558 error = iwn5000_temp_offset_calib(sc);
6560 device_printf(sc->sc_dev,
6561 "%s: could not set temperature offset\n", __func__);
6564 } else if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSETv2) {
6565 error = iwn5000_temp_offset_calibv2(sc);
6567 device_printf(sc->sc_dev,
6568 "%s: could not compute temperature offset v2\n",
6574 if (sc->hw_type == IWN_HW_REV_TYPE_6050) {
6575 /* Configure runtime DC calibration. */
6576 error = iwn5000_runtime_calib(sc);
6578 device_printf(sc->sc_dev,
6579 "%s: could not configure runtime calibration\n",
6585 /* Configure valid TX chains for >=5000 Series. */
6586 if (sc->hw_type != IWN_HW_REV_TYPE_4965 &&
6587 IWN_UCODE_API(sc->ucode_rev) > 1) {
6588 txmask = htole32(sc->txchainmask);
6589 DPRINTF(sc, IWN_DEBUG_RESET | IWN_DEBUG_XMIT,
6590 "%s: configuring valid TX chains 0x%x\n", __func__, txmask);
6591 error = iwn_cmd(sc, IWN5000_CMD_TX_ANT_CONFIG, &txmask,
6594 device_printf(sc->sc_dev,
6595 "%s: could not configure valid TX chains, "
6596 "error %d\n", __func__, error);
6601 /* Configure bluetooth coexistence. */
6604 /* Configure bluetooth coexistence if needed. */
6605 if (sc->base_params->bt_mode == IWN_BT_ADVANCED)
6606 error = iwn_send_advanced_btcoex(sc);
6607 if (sc->base_params->bt_mode == IWN_BT_SIMPLE)
6608 error = iwn_send_btcoex(sc);
6611 device_printf(sc->sc_dev,
6612 "%s: could not configure bluetooth coexistence, error %d\n",
6617 /* Set mode, channel, RX filter and enable RX. */
6618 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX];
6619 memset(sc->rxon, 0, sizeof (struct iwn_rxon));
6620 macaddr = vap ? vap->iv_myaddr : ic->ic_macaddr;
6621 IEEE80211_ADDR_COPY(sc->rxon->myaddr, macaddr);
6622 IEEE80211_ADDR_COPY(sc->rxon->wlap, macaddr);
6623 sc->rxon->chan = ieee80211_chan2ieee(ic, ic->ic_curchan);
6624 sc->rxon->flags = htole32(IWN_RXON_TSF | IWN_RXON_CTS_TO_SELF);
6625 if (IEEE80211_IS_CHAN_2GHZ(ic->ic_curchan))
6626 sc->rxon->flags |= htole32(IWN_RXON_AUTO | IWN_RXON_24GHZ);
6627 switch (ic->ic_opmode) {
6628 case IEEE80211_M_STA:
6629 sc->rxon->mode = IWN_MODE_STA;
6630 sc->rxon->filter = htole32(IWN_FILTER_MULTICAST);
6632 case IEEE80211_M_MONITOR:
6633 sc->rxon->mode = IWN_MODE_MONITOR;
6634 sc->rxon->filter = htole32(IWN_FILTER_MULTICAST |
6635 IWN_FILTER_CTL | IWN_FILTER_PROMISC);
6638 /* Should not get there. */
6641 sc->rxon->cck_mask = 0x0f; /* not yet negotiated */
6642 sc->rxon->ofdm_mask = 0xff; /* not yet negotiated */
6643 sc->rxon->ht_single_mask = 0xff;
6644 sc->rxon->ht_dual_mask = 0xff;
6645 sc->rxon->ht_triple_mask = 0xff;
6647 * In active association mode, ensure that
6648 * all the receive chains are enabled.
6650 * Since we're not yet doing SMPS, don't allow the
6651 * number of idle RX chains to be less than the active
6655 IWN_RXCHAIN_VALID(sc->rxchainmask) |
6656 IWN_RXCHAIN_MIMO_COUNT(sc->nrxchains) |
6657 IWN_RXCHAIN_IDLE_COUNT(sc->nrxchains);
6658 sc->rxon->rxchain = htole16(rxchain);
6659 DPRINTF(sc, IWN_DEBUG_RESET | IWN_DEBUG_XMIT,
6660 "%s: rxchainmask=0x%x, nrxchains=%d\n",
6665 sc->rxon->flags |= htole32(iwn_get_rxon_ht_flags(sc, ic->ic_curchan));
6667 DPRINTF(sc, IWN_DEBUG_RESET,
6668 "%s: setting configuration; flags=0x%08x\n",
6669 __func__, le32toh(sc->rxon->flags));
6670 if (sc->sc_is_scanning)
6671 device_printf(sc->sc_dev,
6672 "%s: is_scanning set, before RXON\n",
6674 error = iwn_cmd(sc, IWN_CMD_RXON, sc->rxon, sc->rxonsz, 0);
6676 device_printf(sc->sc_dev, "%s: RXON command failed\n",
6681 if ((error = iwn_add_broadcast_node(sc, 0)) != 0) {
6682 device_printf(sc->sc_dev, "%s: could not add broadcast node\n",
6687 /* Configuration has changed, set TX power accordingly. */
6688 if ((error = ops->set_txpower(sc, ic->ic_curchan, 0)) != 0) {
6689 device_printf(sc->sc_dev, "%s: could not set TX power\n",
6694 if ((error = iwn_set_critical_temp(sc)) != 0) {
6695 device_printf(sc->sc_dev,
6696 "%s: could not set critical temperature\n", __func__);
6700 /* Set power saving level to CAM during initialization. */
6701 if ((error = iwn_set_pslevel(sc, 0, 0, 0)) != 0) {
6702 device_printf(sc->sc_dev,
6703 "%s: could not set power saving level\n", __func__);
6707 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
6713 iwn_get_active_dwell_time(struct iwn_softc *sc,
6714 struct ieee80211_channel *c, uint8_t n_probes)
6716 /* No channel? Default to 2GHz settings */
6717 if (c == NULL || IEEE80211_IS_CHAN_2GHZ(c)) {
6718 return (IWN_ACTIVE_DWELL_TIME_2GHZ +
6719 IWN_ACTIVE_DWELL_FACTOR_2GHZ * (n_probes + 1));
6722 /* 5GHz dwell time */
6723 return (IWN_ACTIVE_DWELL_TIME_5GHZ +
6724 IWN_ACTIVE_DWELL_FACTOR_5GHZ * (n_probes + 1));
6728 * Limit the total dwell time to 85% of the beacon interval.
6730 * Returns the dwell time in milliseconds.
6733 iwn_limit_dwell(struct iwn_softc *sc, uint16_t dwell_time)
6735 struct ieee80211com *ic = &sc->sc_ic;
6736 struct ieee80211vap *vap = NULL;
6739 /* bintval is in TU (1.024mS) */
6740 if (! TAILQ_EMPTY(&ic->ic_vaps)) {
6741 vap = TAILQ_FIRST(&ic->ic_vaps);
6742 bintval = vap->iv_bss->ni_intval;
6746 * If it's non-zero, we should calculate the minimum of
6747 * it and the DWELL_BASE.
6749 * XXX Yes, the math should take into account that bintval
6750 * is 1.024mS, not 1mS..
6753 DPRINTF(sc, IWN_DEBUG_SCAN,
6757 return (MIN(IWN_PASSIVE_DWELL_BASE, ((bintval * 85) / 100)));
6760 /* No association context? Default */
6761 return (IWN_PASSIVE_DWELL_BASE);
6765 iwn_get_passive_dwell_time(struct iwn_softc *sc, struct ieee80211_channel *c)
6769 if (c == NULL || IEEE80211_IS_CHAN_2GHZ(c)) {
6770 passive = IWN_PASSIVE_DWELL_BASE + IWN_PASSIVE_DWELL_TIME_2GHZ;
6772 passive = IWN_PASSIVE_DWELL_BASE + IWN_PASSIVE_DWELL_TIME_5GHZ;
6775 /* Clamp to the beacon interval if we're associated */
6776 return (iwn_limit_dwell(sc, passive));
6780 iwn_scan(struct iwn_softc *sc, struct ieee80211vap *vap,
6781 struct ieee80211_scan_state *ss, struct ieee80211_channel *c)
6783 struct ieee80211com *ic = &sc->sc_ic;
6784 struct ieee80211_node *ni = vap->iv_bss;
6785 struct iwn_scan_hdr *hdr;
6786 struct iwn_cmd_data *tx;
6787 struct iwn_scan_essid *essid;
6788 struct iwn_scan_chan *chan;
6789 struct ieee80211_frame *wh;
6790 struct ieee80211_rateset *rs;
6796 uint16_t dwell_active, dwell_passive;
6797 uint32_t extra, scan_service_time;
6799 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
6802 * We are absolutely not allowed to send a scan command when another
6803 * scan command is pending.
6805 if (sc->sc_is_scanning) {
6806 device_printf(sc->sc_dev, "%s: called whilst scanning!\n",
6811 /* Assign the scan channel */
6814 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX];
6815 buf = malloc(IWN_SCAN_MAXSZ, M_DEVBUF, M_NOWAIT | M_ZERO);
6817 device_printf(sc->sc_dev,
6818 "%s: could not allocate buffer for scan command\n",
6822 hdr = (struct iwn_scan_hdr *)buf;
6824 * Move to the next channel if no frames are received within 10ms
6825 * after sending the probe request.
6827 hdr->quiet_time = htole16(10); /* timeout in milliseconds */
6828 hdr->quiet_threshold = htole16(1); /* min # of packets */
6830 * Max needs to be greater than active and passive and quiet!
6831 * It's also in microseconds!
6833 hdr->max_svc = htole32(250 * 1024);
6836 * Reset scan: interval=100
6837 * Normal scan: interval=becaon interval
6838 * suspend_time: 100 (TU)
6841 extra = (100 /* suspend_time */ / 100 /* beacon interval */) << 22;
6842 //scan_service_time = extra | ((100 /* susp */ % 100 /* int */) * 1024);
6843 scan_service_time = (4 << 22) | (100 * 1024); /* Hardcode for now! */
6844 hdr->pause_svc = htole32(scan_service_time);
6846 /* Select antennas for scanning. */
6848 IWN_RXCHAIN_VALID(sc->rxchainmask) |
6849 IWN_RXCHAIN_FORCE_MIMO_SEL(sc->rxchainmask) |
6850 IWN_RXCHAIN_DRIVER_FORCE;
6851 if (IEEE80211_IS_CHAN_A(c) &&
6852 sc->hw_type == IWN_HW_REV_TYPE_4965) {
6853 /* Ant A must be avoided in 5GHz because of an HW bug. */
6854 rxchain |= IWN_RXCHAIN_FORCE_SEL(IWN_ANT_B);
6855 } else /* Use all available RX antennas. */
6856 rxchain |= IWN_RXCHAIN_FORCE_SEL(sc->rxchainmask);
6857 hdr->rxchain = htole16(rxchain);
6858 hdr->filter = htole32(IWN_FILTER_MULTICAST | IWN_FILTER_BEACON);
6860 tx = (struct iwn_cmd_data *)(hdr + 1);
6861 tx->flags = htole32(IWN_TX_AUTO_SEQ);
6862 tx->id = sc->broadcast_id;
6863 tx->lifetime = htole32(IWN_LIFETIME_INFINITE);
6865 if (IEEE80211_IS_CHAN_5GHZ(c)) {
6866 /* Send probe requests at 6Mbps. */
6867 tx->rate = htole32(0xd);
6868 rs = &ic->ic_sup_rates[IEEE80211_MODE_11A];
6870 hdr->flags = htole32(IWN_RXON_24GHZ | IWN_RXON_AUTO);
6871 if (sc->hw_type == IWN_HW_REV_TYPE_4965 &&
6872 sc->rxon->associd && sc->rxon->chan > 14)
6873 tx->rate = htole32(0xd);
6875 /* Send probe requests at 1Mbps. */
6876 tx->rate = htole32(10 | IWN_RFLAG_CCK);
6878 rs = &ic->ic_sup_rates[IEEE80211_MODE_11G];
6880 /* Use the first valid TX antenna. */
6881 txant = IWN_LSB(sc->txchainmask);
6882 tx->rate |= htole32(IWN_RFLAG_ANT(txant));
6885 * Only do active scanning if we're announcing a probe request
6886 * for a given SSID (or more, if we ever add it to the driver.)
6891 * If we're scanning for a specific SSID, add it to the command.
6893 * XXX maybe look at adding support for scanning multiple SSIDs?
6895 essid = (struct iwn_scan_essid *)(tx + 1);
6897 if (ss->ss_ssid[0].len != 0) {
6898 essid[0].id = IEEE80211_ELEMID_SSID;
6899 essid[0].len = ss->ss_ssid[0].len;
6900 memcpy(essid[0].data, ss->ss_ssid[0].ssid, ss->ss_ssid[0].len);
6903 DPRINTF(sc, IWN_DEBUG_SCAN, "%s: ssid_len=%d, ssid=%*s\n",
6907 ss->ss_ssid[0].ssid);
6909 if (ss->ss_nssid > 0)
6914 * Build a probe request frame. Most of the following code is a
6915 * copy & paste of what is done in net80211.
6917 wh = (struct ieee80211_frame *)(essid + 20);
6918 wh->i_fc[0] = IEEE80211_FC0_VERSION_0 | IEEE80211_FC0_TYPE_MGT |
6919 IEEE80211_FC0_SUBTYPE_PROBE_REQ;
6920 wh->i_fc[1] = IEEE80211_FC1_DIR_NODS;
6921 IEEE80211_ADDR_COPY(wh->i_addr1, vap->iv_ifp->if_broadcastaddr);
6922 IEEE80211_ADDR_COPY(wh->i_addr2, IF_LLADDR(vap->iv_ifp));
6923 IEEE80211_ADDR_COPY(wh->i_addr3, vap->iv_ifp->if_broadcastaddr);
6924 *(uint16_t *)&wh->i_dur[0] = 0; /* filled by HW */
6925 *(uint16_t *)&wh->i_seq[0] = 0; /* filled by HW */
6927 frm = (uint8_t *)(wh + 1);
6928 frm = ieee80211_add_ssid(frm, NULL, 0);
6929 frm = ieee80211_add_rates(frm, rs);
6930 if (rs->rs_nrates > IEEE80211_RATE_SIZE)
6931 frm = ieee80211_add_xrates(frm, rs);
6932 if (ic->ic_htcaps & IEEE80211_HTC_HT)
6933 frm = ieee80211_add_htcap(frm, ni);
6935 /* Set length of probe request. */
6936 tx->len = htole16(frm - (uint8_t *)wh);
6939 * If active scanning is requested but a certain channel is
6940 * marked passive, we can do active scanning if we detect
6943 * There is an issue with some firmware versions that triggers
6944 * a sysassert on a "good CRC threshold" of zero (== disabled),
6945 * on a radar channel even though this means that we should NOT
6948 * The "good CRC threshold" is the number of frames that we
6949 * need to receive during our dwell time on a channel before
6950 * sending out probes -- setting this to a huge value will
6951 * mean we never reach it, but at the same time work around
6952 * the aforementioned issue. Thus use IWL_GOOD_CRC_TH_NEVER
6953 * here instead of IWL_GOOD_CRC_TH_DISABLED.
6955 * This was fixed in later versions along with some other
6956 * scan changes, and the threshold behaves as a flag in those
6961 * If we're doing active scanning, set the crc_threshold
6962 * to a suitable value. This is different to active veruss
6963 * passive scanning depending upon the channel flags; the
6964 * firmware will obey that particular check for us.
6966 if (sc->tlv_feature_flags & IWN_UCODE_TLV_FLAGS_NEWSCAN)
6967 hdr->crc_threshold = is_active ?
6968 IWN_GOOD_CRC_TH_DEFAULT : IWN_GOOD_CRC_TH_DISABLED;
6970 hdr->crc_threshold = is_active ?
6971 IWN_GOOD_CRC_TH_DEFAULT : IWN_GOOD_CRC_TH_NEVER;
6973 chan = (struct iwn_scan_chan *)frm;
6974 chan->chan = htole16(ieee80211_chan2ieee(ic, c));
6976 if (ss->ss_nssid > 0)
6977 chan->flags |= htole32(IWN_CHAN_NPBREQS(1));
6978 chan->dsp_gain = 0x6e;
6981 * Set the passive/active flag depending upon the channel mode.
6982 * XXX TODO: take the is_active flag into account as well?
6984 if (c->ic_flags & IEEE80211_CHAN_PASSIVE)
6985 chan->flags |= htole32(IWN_CHAN_PASSIVE);
6987 chan->flags |= htole32(IWN_CHAN_ACTIVE);
6990 * Calculate the active/passive dwell times.
6993 dwell_active = iwn_get_active_dwell_time(sc, c, ss->ss_nssid);
6994 dwell_passive = iwn_get_passive_dwell_time(sc, c);
6996 /* Make sure they're valid */
6997 if (dwell_passive <= dwell_active)
6998 dwell_passive = dwell_active + 1;
7000 chan->active = htole16(dwell_active);
7001 chan->passive = htole16(dwell_passive);
7003 if (IEEE80211_IS_CHAN_5GHZ(c))
7004 chan->rf_gain = 0x3b;
7006 chan->rf_gain = 0x28;
7008 DPRINTF(sc, IWN_DEBUG_STATE,
7009 "%s: chan %u flags 0x%x rf_gain 0x%x "
7010 "dsp_gain 0x%x active %d passive %d scan_svc_time %d crc 0x%x "
7011 "isactive=%d numssid=%d\n", __func__,
7012 chan->chan, chan->flags, chan->rf_gain, chan->dsp_gain,
7013 dwell_active, dwell_passive, scan_service_time,
7014 hdr->crc_threshold, is_active, ss->ss_nssid);
7018 buflen = (uint8_t *)chan - buf;
7019 hdr->len = htole16(buflen);
7021 if (sc->sc_is_scanning) {
7022 device_printf(sc->sc_dev,
7023 "%s: called with is_scanning set!\n",
7026 sc->sc_is_scanning = 1;
7028 DPRINTF(sc, IWN_DEBUG_STATE, "sending scan command nchan=%d\n",
7030 error = iwn_cmd(sc, IWN_CMD_SCAN, buf, buflen, 1);
7031 free(buf, M_DEVBUF);
7033 callout_reset(&sc->scan_timeout, 5*hz, iwn_scan_timeout, sc);
7035 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
7041 iwn_auth(struct iwn_softc *sc, struct ieee80211vap *vap)
7043 struct iwn_ops *ops = &sc->ops;
7044 struct ieee80211com *ic = &sc->sc_ic;
7045 struct ieee80211_node *ni = vap->iv_bss;
7048 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
7050 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX];
7051 /* Update adapter configuration. */
7052 IEEE80211_ADDR_COPY(sc->rxon->bssid, ni->ni_bssid);
7053 sc->rxon->chan = ieee80211_chan2ieee(ic, ni->ni_chan);
7054 sc->rxon->flags = htole32(IWN_RXON_TSF | IWN_RXON_CTS_TO_SELF);
7055 if (IEEE80211_IS_CHAN_2GHZ(ni->ni_chan))
7056 sc->rxon->flags |= htole32(IWN_RXON_AUTO | IWN_RXON_24GHZ);
7057 if (ic->ic_flags & IEEE80211_F_SHSLOT)
7058 sc->rxon->flags |= htole32(IWN_RXON_SHSLOT);
7059 if (ic->ic_flags & IEEE80211_F_SHPREAMBLE)
7060 sc->rxon->flags |= htole32(IWN_RXON_SHPREAMBLE);
7061 if (IEEE80211_IS_CHAN_A(ni->ni_chan)) {
7062 sc->rxon->cck_mask = 0;
7063 sc->rxon->ofdm_mask = 0x15;
7064 } else if (IEEE80211_IS_CHAN_B(ni->ni_chan)) {
7065 sc->rxon->cck_mask = 0x03;
7066 sc->rxon->ofdm_mask = 0;
7068 /* Assume 802.11b/g. */
7069 sc->rxon->cck_mask = 0x03;
7070 sc->rxon->ofdm_mask = 0x15;
7074 sc->rxon->flags |= htole32(iwn_get_rxon_ht_flags(sc, ic->ic_curchan));
7076 DPRINTF(sc, IWN_DEBUG_STATE, "rxon chan %d flags %x cck %x ofdm %x\n",
7077 sc->rxon->chan, sc->rxon->flags, sc->rxon->cck_mask,
7078 sc->rxon->ofdm_mask);
7079 if (sc->sc_is_scanning)
7080 device_printf(sc->sc_dev,
7081 "%s: is_scanning set, before RXON\n",
7083 error = iwn_cmd(sc, IWN_CMD_RXON, sc->rxon, sc->rxonsz, 1);
7085 device_printf(sc->sc_dev, "%s: RXON command failed, error %d\n",
7090 /* Configuration has changed, set TX power accordingly. */
7091 if ((error = ops->set_txpower(sc, ni->ni_chan, 1)) != 0) {
7092 device_printf(sc->sc_dev,
7093 "%s: could not set TX power, error %d\n", __func__, error);
7097 * Reconfiguring RXON clears the firmware nodes table so we must
7098 * add the broadcast node again.
7100 if ((error = iwn_add_broadcast_node(sc, 1)) != 0) {
7101 device_printf(sc->sc_dev,
7102 "%s: could not add broadcast node, error %d\n", __func__,
7107 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
7113 iwn_run(struct iwn_softc *sc, struct ieee80211vap *vap)
7115 struct iwn_ops *ops = &sc->ops;
7116 struct ieee80211com *ic = &sc->sc_ic;
7117 struct ieee80211_node *ni = vap->iv_bss;
7118 struct iwn_node_info node;
7121 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
7123 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX];
7124 if (ic->ic_opmode == IEEE80211_M_MONITOR) {
7125 /* Link LED blinks while monitoring. */
7126 iwn_set_led(sc, IWN_LED_LINK, 5, 5);
7129 if ((error = iwn_set_timing(sc, ni)) != 0) {
7130 device_printf(sc->sc_dev,
7131 "%s: could not set timing, error %d\n", __func__, error);
7135 /* Update adapter configuration. */
7136 IEEE80211_ADDR_COPY(sc->rxon->bssid, ni->ni_bssid);
7137 sc->rxon->associd = htole16(IEEE80211_AID(ni->ni_associd));
7138 sc->rxon->chan = ieee80211_chan2ieee(ic, ni->ni_chan);
7139 sc->rxon->flags = htole32(IWN_RXON_TSF | IWN_RXON_CTS_TO_SELF);
7140 if (IEEE80211_IS_CHAN_2GHZ(ni->ni_chan))
7141 sc->rxon->flags |= htole32(IWN_RXON_AUTO | IWN_RXON_24GHZ);
7142 if (ic->ic_flags & IEEE80211_F_SHSLOT)
7143 sc->rxon->flags |= htole32(IWN_RXON_SHSLOT);
7144 if (ic->ic_flags & IEEE80211_F_SHPREAMBLE)
7145 sc->rxon->flags |= htole32(IWN_RXON_SHPREAMBLE);
7146 if (IEEE80211_IS_CHAN_A(ni->ni_chan)) {
7147 sc->rxon->cck_mask = 0;
7148 sc->rxon->ofdm_mask = 0x15;
7149 } else if (IEEE80211_IS_CHAN_B(ni->ni_chan)) {
7150 sc->rxon->cck_mask = 0x03;
7151 sc->rxon->ofdm_mask = 0;
7153 /* Assume 802.11b/g. */
7154 sc->rxon->cck_mask = 0x0f;
7155 sc->rxon->ofdm_mask = 0x15;
7158 sc->rxon->flags |= htole32(iwn_get_rxon_ht_flags(sc, ni->ni_chan));
7159 sc->rxon->filter |= htole32(IWN_FILTER_BSS);
7160 DPRINTF(sc, IWN_DEBUG_STATE, "rxon chan %d flags %x, curhtprotmode=%d\n",
7161 sc->rxon->chan, le32toh(sc->rxon->flags), ic->ic_curhtprotmode);
7162 if (sc->sc_is_scanning)
7163 device_printf(sc->sc_dev,
7164 "%s: is_scanning set, before RXON\n",
7166 error = iwn_cmd(sc, IWN_CMD_RXON, sc->rxon, sc->rxonsz, 1);
7168 device_printf(sc->sc_dev,
7169 "%s: could not update configuration, error %d\n", __func__,
7174 /* Configuration has changed, set TX power accordingly. */
7175 if ((error = ops->set_txpower(sc, ni->ni_chan, 1)) != 0) {
7176 device_printf(sc->sc_dev,
7177 "%s: could not set TX power, error %d\n", __func__, error);
7181 /* Fake a join to initialize the TX rate. */
7182 ((struct iwn_node *)ni)->id = IWN_ID_BSS;
7183 iwn_newassoc(ni, 1);
7186 memset(&node, 0, sizeof node);
7187 IEEE80211_ADDR_COPY(node.macaddr, ni->ni_macaddr);
7188 node.id = IWN_ID_BSS;
7189 if (IEEE80211_IS_CHAN_HT(ni->ni_chan)) {
7190 switch (ni->ni_htcap & IEEE80211_HTCAP_SMPS) {
7191 case IEEE80211_HTCAP_SMPS_ENA:
7192 node.htflags |= htole32(IWN_SMPS_MIMO_DIS);
7194 case IEEE80211_HTCAP_SMPS_DYNAMIC:
7195 node.htflags |= htole32(IWN_SMPS_MIMO_PROT);
7198 node.htflags |= htole32(IWN_AMDPU_SIZE_FACTOR(3) |
7199 IWN_AMDPU_DENSITY(5)); /* 4us */
7200 if (IEEE80211_IS_CHAN_HT40(ni->ni_chan))
7201 node.htflags |= htole32(IWN_NODE_HT40);
7203 DPRINTF(sc, IWN_DEBUG_STATE, "%s: adding BSS node\n", __func__);
7204 error = ops->add_node(sc, &node, 1);
7206 device_printf(sc->sc_dev,
7207 "%s: could not add BSS node, error %d\n", __func__, error);
7210 DPRINTF(sc, IWN_DEBUG_STATE, "%s: setting link quality for node %d\n",
7212 if ((error = iwn_set_link_quality(sc, ni)) != 0) {
7213 device_printf(sc->sc_dev,
7214 "%s: could not setup link quality for node %d, error %d\n",
7215 __func__, node.id, error);
7219 if ((error = iwn_init_sensitivity(sc)) != 0) {
7220 device_printf(sc->sc_dev,
7221 "%s: could not set sensitivity, error %d\n", __func__,
7225 /* Start periodic calibration timer. */
7226 sc->calib.state = IWN_CALIB_STATE_ASSOC;
7228 callout_reset(&sc->calib_to, msecs_to_ticks(500), iwn_calib_timeout,
7231 /* Link LED always on while associated. */
7232 iwn_set_led(sc, IWN_LED_LINK, 0, 1);
7234 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
7240 * This function is called by upper layer when an ADDBA request is received
7241 * from another STA and before the ADDBA response is sent.
7244 iwn_ampdu_rx_start(struct ieee80211_node *ni, struct ieee80211_rx_ampdu *rap,
7245 int baparamset, int batimeout, int baseqctl)
7247 #define MS(_v, _f) (((_v) & _f) >> _f##_S)
7248 struct iwn_softc *sc = ni->ni_ic->ic_softc;
7249 struct iwn_ops *ops = &sc->ops;
7250 struct iwn_node *wn = (void *)ni;
7251 struct iwn_node_info node;
7256 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7258 tid = MS(le16toh(baparamset), IEEE80211_BAPS_TID);
7259 ssn = MS(le16toh(baseqctl), IEEE80211_BASEQ_START);
7261 memset(&node, 0, sizeof node);
7263 node.control = IWN_NODE_UPDATE;
7264 node.flags = IWN_FLAG_SET_ADDBA;
7265 node.addba_tid = tid;
7266 node.addba_ssn = htole16(ssn);
7267 DPRINTF(sc, IWN_DEBUG_RECV, "ADDBA RA=%d TID=%d SSN=%d\n",
7269 error = ops->add_node(sc, &node, 1);
7272 return sc->sc_ampdu_rx_start(ni, rap, baparamset, batimeout, baseqctl);
7277 * This function is called by upper layer on teardown of an HT-immediate
7278 * Block Ack agreement (eg. uppon receipt of a DELBA frame).
7281 iwn_ampdu_rx_stop(struct ieee80211_node *ni, struct ieee80211_rx_ampdu *rap)
7283 struct ieee80211com *ic = ni->ni_ic;
7284 struct iwn_softc *sc = ic->ic_softc;
7285 struct iwn_ops *ops = &sc->ops;
7286 struct iwn_node *wn = (void *)ni;
7287 struct iwn_node_info node;
7290 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7292 /* XXX: tid as an argument */
7293 for (tid = 0; tid < WME_NUM_TID; tid++) {
7294 if (&ni->ni_rx_ampdu[tid] == rap)
7298 memset(&node, 0, sizeof node);
7300 node.control = IWN_NODE_UPDATE;
7301 node.flags = IWN_FLAG_SET_DELBA;
7302 node.delba_tid = tid;
7303 DPRINTF(sc, IWN_DEBUG_RECV, "DELBA RA=%d TID=%d\n", wn->id, tid);
7304 (void)ops->add_node(sc, &node, 1);
7305 sc->sc_ampdu_rx_stop(ni, rap);
7309 iwn_addba_request(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap,
7310 int dialogtoken, int baparamset, int batimeout)
7312 struct iwn_softc *sc = ni->ni_ic->ic_softc;
7315 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7317 for (qid = sc->firstaggqueue; qid < sc->ntxqs; qid++) {
7318 if (sc->qid2tap[qid] == NULL)
7321 if (qid == sc->ntxqs) {
7322 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: not free aggregation queue\n",
7326 tap->txa_private = malloc(sizeof(int), M_DEVBUF, M_NOWAIT);
7327 if (tap->txa_private == NULL) {
7328 device_printf(sc->sc_dev,
7329 "%s: failed to alloc TX aggregation structure\n", __func__);
7332 sc->qid2tap[qid] = tap;
7333 *(int *)tap->txa_private = qid;
7334 return sc->sc_addba_request(ni, tap, dialogtoken, baparamset,
7339 iwn_addba_response(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap,
7340 int code, int baparamset, int batimeout)
7342 struct iwn_softc *sc = ni->ni_ic->ic_softc;
7343 int qid = *(int *)tap->txa_private;
7344 uint8_t tid = tap->txa_tid;
7347 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7349 if (code == IEEE80211_STATUS_SUCCESS) {
7350 ni->ni_txseqs[tid] = tap->txa_start & 0xfff;
7351 ret = iwn_ampdu_tx_start(ni->ni_ic, ni, tid);
7355 sc->qid2tap[qid] = NULL;
7356 free(tap->txa_private, M_DEVBUF);
7357 tap->txa_private = NULL;
7359 return sc->sc_addba_response(ni, tap, code, baparamset, batimeout);
7363 * This function is called by upper layer when an ADDBA response is received
7367 iwn_ampdu_tx_start(struct ieee80211com *ic, struct ieee80211_node *ni,
7370 struct ieee80211_tx_ampdu *tap = &ni->ni_tx_ampdu[tid];
7371 struct iwn_softc *sc = ni->ni_ic->ic_softc;
7372 struct iwn_ops *ops = &sc->ops;
7373 struct iwn_node *wn = (void *)ni;
7374 struct iwn_node_info node;
7377 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7379 /* Enable TX for the specified RA/TID. */
7380 wn->disable_tid &= ~(1 << tid);
7381 memset(&node, 0, sizeof node);
7383 node.control = IWN_NODE_UPDATE;
7384 node.flags = IWN_FLAG_SET_DISABLE_TID;
7385 node.disable_tid = htole16(wn->disable_tid);
7386 error = ops->add_node(sc, &node, 1);
7390 if ((error = iwn_nic_lock(sc)) != 0)
7392 qid = *(int *)tap->txa_private;
7393 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: ra=%d tid=%d ssn=%d qid=%d\n",
7394 __func__, wn->id, tid, tap->txa_start, qid);
7395 ops->ampdu_tx_start(sc, ni, qid, tid, tap->txa_start & 0xfff);
7398 iwn_set_link_quality(sc, ni);
7403 iwn_ampdu_tx_stop(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap)
7405 struct iwn_softc *sc = ni->ni_ic->ic_softc;
7406 struct iwn_ops *ops = &sc->ops;
7407 uint8_t tid = tap->txa_tid;
7410 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7412 sc->sc_addba_stop(ni, tap);
7414 if (tap->txa_private == NULL)
7417 qid = *(int *)tap->txa_private;
7418 if (sc->txq[qid].queued != 0)
7420 if (iwn_nic_lock(sc) != 0)
7422 ops->ampdu_tx_stop(sc, qid, tid, tap->txa_start & 0xfff);
7424 sc->qid2tap[qid] = NULL;
7425 free(tap->txa_private, M_DEVBUF);
7426 tap->txa_private = NULL;
7430 iwn4965_ampdu_tx_start(struct iwn_softc *sc, struct ieee80211_node *ni,
7431 int qid, uint8_t tid, uint16_t ssn)
7433 struct iwn_node *wn = (void *)ni;
7435 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7437 /* Stop TX scheduler while we're changing its configuration. */
7438 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid),
7439 IWN4965_TXQ_STATUS_CHGACT);
7441 /* Assign RA/TID translation to the queue. */
7442 iwn_mem_write_2(sc, sc->sched_base + IWN4965_SCHED_TRANS_TBL(qid),
7445 /* Enable chain-building mode for the queue. */
7446 iwn_prph_setbits(sc, IWN4965_SCHED_QCHAIN_SEL, 1 << qid);
7448 /* Set starting sequence number from the ADDBA request. */
7449 sc->txq[qid].cur = sc->txq[qid].read = (ssn & 0xff);
7450 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | (ssn & 0xff));
7451 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_RDPTR(qid), ssn);
7453 /* Set scheduler window size. */
7454 iwn_mem_write(sc, sc->sched_base + IWN4965_SCHED_QUEUE_OFFSET(qid),
7456 /* Set scheduler frame limit. */
7457 iwn_mem_write(sc, sc->sched_base + IWN4965_SCHED_QUEUE_OFFSET(qid) + 4,
7458 IWN_SCHED_LIMIT << 16);
7460 /* Enable interrupts for the queue. */
7461 iwn_prph_setbits(sc, IWN4965_SCHED_INTR_MASK, 1 << qid);
7463 /* Mark the queue as active. */
7464 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid),
7465 IWN4965_TXQ_STATUS_ACTIVE | IWN4965_TXQ_STATUS_AGGR_ENA |
7466 iwn_tid2fifo[tid] << 1);
7470 iwn4965_ampdu_tx_stop(struct iwn_softc *sc, int qid, uint8_t tid, uint16_t ssn)
7472 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7474 /* Stop TX scheduler while we're changing its configuration. */
7475 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid),
7476 IWN4965_TXQ_STATUS_CHGACT);
7478 /* Set starting sequence number from the ADDBA request. */
7479 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | (ssn & 0xff));
7480 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_RDPTR(qid), ssn);
7482 /* Disable interrupts for the queue. */
7483 iwn_prph_clrbits(sc, IWN4965_SCHED_INTR_MASK, 1 << qid);
7485 /* Mark the queue as inactive. */
7486 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid),
7487 IWN4965_TXQ_STATUS_INACTIVE | iwn_tid2fifo[tid] << 1);
7491 iwn5000_ampdu_tx_start(struct iwn_softc *sc, struct ieee80211_node *ni,
7492 int qid, uint8_t tid, uint16_t ssn)
7494 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7496 struct iwn_node *wn = (void *)ni;
7498 /* Stop TX scheduler while we're changing its configuration. */
7499 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
7500 IWN5000_TXQ_STATUS_CHGACT);
7502 /* Assign RA/TID translation to the queue. */
7503 iwn_mem_write_2(sc, sc->sched_base + IWN5000_SCHED_TRANS_TBL(qid),
7506 /* Enable chain-building mode for the queue. */
7507 iwn_prph_setbits(sc, IWN5000_SCHED_QCHAIN_SEL, 1 << qid);
7509 /* Enable aggregation for the queue. */
7510 iwn_prph_setbits(sc, IWN5000_SCHED_AGGR_SEL, 1 << qid);
7512 /* Set starting sequence number from the ADDBA request. */
7513 sc->txq[qid].cur = sc->txq[qid].read = (ssn & 0xff);
7514 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | (ssn & 0xff));
7515 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_RDPTR(qid), ssn);
7517 /* Set scheduler window size and frame limit. */
7518 iwn_mem_write(sc, sc->sched_base + IWN5000_SCHED_QUEUE_OFFSET(qid) + 4,
7519 IWN_SCHED_LIMIT << 16 | IWN_SCHED_WINSZ);
7521 /* Enable interrupts for the queue. */
7522 iwn_prph_setbits(sc, IWN5000_SCHED_INTR_MASK, 1 << qid);
7524 /* Mark the queue as active. */
7525 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
7526 IWN5000_TXQ_STATUS_ACTIVE | iwn_tid2fifo[tid]);
7530 iwn5000_ampdu_tx_stop(struct iwn_softc *sc, int qid, uint8_t tid, uint16_t ssn)
7532 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7534 /* Stop TX scheduler while we're changing its configuration. */
7535 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
7536 IWN5000_TXQ_STATUS_CHGACT);
7538 /* Disable aggregation for the queue. */
7539 iwn_prph_clrbits(sc, IWN5000_SCHED_AGGR_SEL, 1 << qid);
7541 /* Set starting sequence number from the ADDBA request. */
7542 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | (ssn & 0xff));
7543 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_RDPTR(qid), ssn);
7545 /* Disable interrupts for the queue. */
7546 iwn_prph_clrbits(sc, IWN5000_SCHED_INTR_MASK, 1 << qid);
7548 /* Mark the queue as inactive. */
7549 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
7550 IWN5000_TXQ_STATUS_INACTIVE | iwn_tid2fifo[tid]);
7554 * Query calibration tables from the initialization firmware. We do this
7555 * only once at first boot. Called from a process context.
7558 iwn5000_query_calibration(struct iwn_softc *sc)
7560 struct iwn5000_calib_config cmd;
7563 memset(&cmd, 0, sizeof cmd);
7564 cmd.ucode.once.enable = htole32(0xffffffff);
7565 cmd.ucode.once.start = htole32(0xffffffff);
7566 cmd.ucode.once.send = htole32(0xffffffff);
7567 cmd.ucode.flags = htole32(0xffffffff);
7568 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: sending calibration query\n",
7570 error = iwn_cmd(sc, IWN5000_CMD_CALIB_CONFIG, &cmd, sizeof cmd, 0);
7574 /* Wait at most two seconds for calibration to complete. */
7575 if (!(sc->sc_flags & IWN_FLAG_CALIB_DONE))
7576 error = msleep(sc, &sc->sc_mtx, PCATCH, "iwncal", 2 * hz);
7581 * Send calibration results to the runtime firmware. These results were
7582 * obtained on first boot from the initialization firmware.
7585 iwn5000_send_calibration(struct iwn_softc *sc)
7589 for (idx = 0; idx < IWN5000_PHY_CALIB_MAX_RESULT; idx++) {
7590 if (!(sc->base_params->calib_need & (1<<idx))) {
7591 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
7592 "No need of calib %d\n",
7594 continue; /* no need for this calib */
7596 if (sc->calibcmd[idx].buf == NULL) {
7597 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
7598 "Need calib idx : %d but no available data\n",
7603 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
7604 "send calibration result idx=%d len=%d\n", idx,
7605 sc->calibcmd[idx].len);
7606 error = iwn_cmd(sc, IWN_CMD_PHY_CALIB, sc->calibcmd[idx].buf,
7607 sc->calibcmd[idx].len, 0);
7609 device_printf(sc->sc_dev,
7610 "%s: could not send calibration result, error %d\n",
7619 iwn5000_send_wimax_coex(struct iwn_softc *sc)
7621 struct iwn5000_wimax_coex wimax;
7624 if (sc->hw_type == IWN_HW_REV_TYPE_6050) {
7625 /* Enable WiMAX coexistence for combo adapters. */
7627 IWN_WIMAX_COEX_ASSOC_WA_UNMASK |
7628 IWN_WIMAX_COEX_UNASSOC_WA_UNMASK |
7629 IWN_WIMAX_COEX_STA_TABLE_VALID |
7630 IWN_WIMAX_COEX_ENABLE;
7631 memcpy(wimax.events, iwn6050_wimax_events,
7632 sizeof iwn6050_wimax_events);
7636 /* Disable WiMAX coexistence. */
7638 memset(wimax.events, 0, sizeof wimax.events);
7640 DPRINTF(sc, IWN_DEBUG_RESET, "%s: Configuring WiMAX coexistence\n",
7642 return iwn_cmd(sc, IWN5000_CMD_WIMAX_COEX, &wimax, sizeof wimax, 0);
7646 iwn5000_crystal_calib(struct iwn_softc *sc)
7648 struct iwn5000_phy_calib_crystal cmd;
7650 memset(&cmd, 0, sizeof cmd);
7651 cmd.code = IWN5000_PHY_CALIB_CRYSTAL;
7654 cmd.cap_pin[0] = le32toh(sc->eeprom_crystal) & 0xff;
7655 cmd.cap_pin[1] = (le32toh(sc->eeprom_crystal) >> 16) & 0xff;
7656 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "sending crystal calibration %d, %d\n",
7657 cmd.cap_pin[0], cmd.cap_pin[1]);
7658 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 0);
7662 iwn5000_temp_offset_calib(struct iwn_softc *sc)
7664 struct iwn5000_phy_calib_temp_offset cmd;
7666 memset(&cmd, 0, sizeof cmd);
7667 cmd.code = IWN5000_PHY_CALIB_TEMP_OFFSET;
7670 if (sc->eeprom_temp != 0)
7671 cmd.offset = htole16(sc->eeprom_temp);
7673 cmd.offset = htole16(IWN_DEFAULT_TEMP_OFFSET);
7674 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "setting radio sensor offset to %d\n",
7675 le16toh(cmd.offset));
7676 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 0);
7680 iwn5000_temp_offset_calibv2(struct iwn_softc *sc)
7682 struct iwn5000_phy_calib_temp_offsetv2 cmd;
7684 memset(&cmd, 0, sizeof cmd);
7685 cmd.code = IWN5000_PHY_CALIB_TEMP_OFFSET;
7688 if (sc->eeprom_temp != 0) {
7689 cmd.offset_low = htole16(sc->eeprom_temp);
7690 cmd.offset_high = htole16(sc->eeprom_temp_high);
7692 cmd.offset_low = htole16(IWN_DEFAULT_TEMP_OFFSET);
7693 cmd.offset_high = htole16(IWN_DEFAULT_TEMP_OFFSET);
7695 cmd.burnt_voltage_ref = htole16(sc->eeprom_voltage);
7697 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
7698 "setting radio sensor low offset to %d, high offset to %d, voltage to %d\n",
7699 le16toh(cmd.offset_low),
7700 le16toh(cmd.offset_high),
7701 le16toh(cmd.burnt_voltage_ref));
7703 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 0);
7707 * This function is called after the runtime firmware notifies us of its
7708 * readiness (called in a process context).
7711 iwn4965_post_alive(struct iwn_softc *sc)
7715 if ((error = iwn_nic_lock(sc)) != 0)
7718 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7720 /* Clear TX scheduler state in SRAM. */
7721 sc->sched_base = iwn_prph_read(sc, IWN_SCHED_SRAM_ADDR);
7722 iwn_mem_set_region_4(sc, sc->sched_base + IWN4965_SCHED_CTX_OFF, 0,
7723 IWN4965_SCHED_CTX_LEN / sizeof (uint32_t));
7725 /* Set physical address of TX scheduler rings (1KB aligned). */
7726 iwn_prph_write(sc, IWN4965_SCHED_DRAM_ADDR, sc->sched_dma.paddr >> 10);
7728 IWN_SETBITS(sc, IWN_FH_TX_CHICKEN, IWN_FH_TX_CHICKEN_SCHED_RETRY);
7730 /* Disable chain mode for all our 16 queues. */
7731 iwn_prph_write(sc, IWN4965_SCHED_QCHAIN_SEL, 0);
7733 for (qid = 0; qid < IWN4965_NTXQUEUES; qid++) {
7734 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_RDPTR(qid), 0);
7735 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | 0);
7737 /* Set scheduler window size. */
7738 iwn_mem_write(sc, sc->sched_base +
7739 IWN4965_SCHED_QUEUE_OFFSET(qid), IWN_SCHED_WINSZ);
7740 /* Set scheduler frame limit. */
7741 iwn_mem_write(sc, sc->sched_base +
7742 IWN4965_SCHED_QUEUE_OFFSET(qid) + 4,
7743 IWN_SCHED_LIMIT << 16);
7746 /* Enable interrupts for all our 16 queues. */
7747 iwn_prph_write(sc, IWN4965_SCHED_INTR_MASK, 0xffff);
7748 /* Identify TX FIFO rings (0-7). */
7749 iwn_prph_write(sc, IWN4965_SCHED_TXFACT, 0xff);
7751 /* Mark TX rings (4 EDCA + cmd + 2 HCCA) as active. */
7752 for (qid = 0; qid < 7; qid++) {
7753 static uint8_t qid2fifo[] = { 3, 2, 1, 0, 4, 5, 6 };
7754 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid),
7755 IWN4965_TXQ_STATUS_ACTIVE | qid2fifo[qid] << 1);
7762 * This function is called after the initialization or runtime firmware
7763 * notifies us of its readiness (called in a process context).
7766 iwn5000_post_alive(struct iwn_softc *sc)
7770 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
7772 /* Switch to using ICT interrupt mode. */
7773 iwn5000_ict_reset(sc);
7775 if ((error = iwn_nic_lock(sc)) != 0){
7776 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end in error\n", __func__);
7780 /* Clear TX scheduler state in SRAM. */
7781 sc->sched_base = iwn_prph_read(sc, IWN_SCHED_SRAM_ADDR);
7782 iwn_mem_set_region_4(sc, sc->sched_base + IWN5000_SCHED_CTX_OFF, 0,
7783 IWN5000_SCHED_CTX_LEN / sizeof (uint32_t));
7785 /* Set physical address of TX scheduler rings (1KB aligned). */
7786 iwn_prph_write(sc, IWN5000_SCHED_DRAM_ADDR, sc->sched_dma.paddr >> 10);
7788 IWN_SETBITS(sc, IWN_FH_TX_CHICKEN, IWN_FH_TX_CHICKEN_SCHED_RETRY);
7790 /* Enable chain mode for all queues, except command queue. */
7791 if (sc->sc_flags & IWN_FLAG_PAN_SUPPORT)
7792 iwn_prph_write(sc, IWN5000_SCHED_QCHAIN_SEL, 0xfffdf);
7794 iwn_prph_write(sc, IWN5000_SCHED_QCHAIN_SEL, 0xfffef);
7795 iwn_prph_write(sc, IWN5000_SCHED_AGGR_SEL, 0);
7797 for (qid = 0; qid < IWN5000_NTXQUEUES; qid++) {
7798 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_RDPTR(qid), 0);
7799 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | 0);
7801 iwn_mem_write(sc, sc->sched_base +
7802 IWN5000_SCHED_QUEUE_OFFSET(qid), 0);
7803 /* Set scheduler window size and frame limit. */
7804 iwn_mem_write(sc, sc->sched_base +
7805 IWN5000_SCHED_QUEUE_OFFSET(qid) + 4,
7806 IWN_SCHED_LIMIT << 16 | IWN_SCHED_WINSZ);
7809 /* Enable interrupts for all our 20 queues. */
7810 iwn_prph_write(sc, IWN5000_SCHED_INTR_MASK, 0xfffff);
7811 /* Identify TX FIFO rings (0-7). */
7812 iwn_prph_write(sc, IWN5000_SCHED_TXFACT, 0xff);
7814 /* Mark TX rings (4 EDCA + cmd + 2 HCCA) as active. */
7815 if (sc->sc_flags & IWN_FLAG_PAN_SUPPORT) {
7816 /* Mark TX rings as active. */
7817 for (qid = 0; qid < 11; qid++) {
7818 static uint8_t qid2fifo[] = { 3, 2, 1, 0, 0, 4, 2, 5, 4, 7, 5 };
7819 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
7820 IWN5000_TXQ_STATUS_ACTIVE | qid2fifo[qid]);
7823 /* Mark TX rings (4 EDCA + cmd + 2 HCCA) as active. */
7824 for (qid = 0; qid < 7; qid++) {
7825 static uint8_t qid2fifo[] = { 3, 2, 1, 0, 7, 5, 6 };
7826 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
7827 IWN5000_TXQ_STATUS_ACTIVE | qid2fifo[qid]);
7832 /* Configure WiMAX coexistence for combo adapters. */
7833 error = iwn5000_send_wimax_coex(sc);
7835 device_printf(sc->sc_dev,
7836 "%s: could not configure WiMAX coexistence, error %d\n",
7840 if (sc->hw_type != IWN_HW_REV_TYPE_5150) {
7841 /* Perform crystal calibration. */
7842 error = iwn5000_crystal_calib(sc);
7844 device_printf(sc->sc_dev,
7845 "%s: crystal calibration failed, error %d\n",
7850 if (!(sc->sc_flags & IWN_FLAG_CALIB_DONE)) {
7851 /* Query calibration from the initialization firmware. */
7852 if ((error = iwn5000_query_calibration(sc)) != 0) {
7853 device_printf(sc->sc_dev,
7854 "%s: could not query calibration, error %d\n",
7859 * We have the calibration results now, reboot with the
7860 * runtime firmware (call ourselves recursively!)
7863 error = iwn_hw_init(sc);
7865 /* Send calibration results to runtime firmware. */
7866 error = iwn5000_send_calibration(sc);
7869 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
7875 * The firmware boot code is small and is intended to be copied directly into
7876 * the NIC internal memory (no DMA transfer).
7879 iwn4965_load_bootcode(struct iwn_softc *sc, const uint8_t *ucode, int size)
7883 size /= sizeof (uint32_t);
7885 if ((error = iwn_nic_lock(sc)) != 0)
7888 /* Copy microcode image into NIC memory. */
7889 iwn_prph_write_region_4(sc, IWN_BSM_SRAM_BASE,
7890 (const uint32_t *)ucode, size);
7892 iwn_prph_write(sc, IWN_BSM_WR_MEM_SRC, 0);
7893 iwn_prph_write(sc, IWN_BSM_WR_MEM_DST, IWN_FW_TEXT_BASE);
7894 iwn_prph_write(sc, IWN_BSM_WR_DWCOUNT, size);
7896 /* Start boot load now. */
7897 iwn_prph_write(sc, IWN_BSM_WR_CTRL, IWN_BSM_WR_CTRL_START);
7899 /* Wait for transfer to complete. */
7900 for (ntries = 0; ntries < 1000; ntries++) {
7901 if (!(iwn_prph_read(sc, IWN_BSM_WR_CTRL) &
7902 IWN_BSM_WR_CTRL_START))
7906 if (ntries == 1000) {
7907 device_printf(sc->sc_dev, "%s: could not load boot firmware\n",
7913 /* Enable boot after power up. */
7914 iwn_prph_write(sc, IWN_BSM_WR_CTRL, IWN_BSM_WR_CTRL_START_EN);
7921 iwn4965_load_firmware(struct iwn_softc *sc)
7923 struct iwn_fw_info *fw = &sc->fw;
7924 struct iwn_dma_info *dma = &sc->fw_dma;
7927 /* Copy initialization sections into pre-allocated DMA-safe memory. */
7928 memcpy(dma->vaddr, fw->init.data, fw->init.datasz);
7929 bus_dmamap_sync(dma->tag, dma->map, BUS_DMASYNC_PREWRITE);
7930 memcpy(dma->vaddr + IWN4965_FW_DATA_MAXSZ,
7931 fw->init.text, fw->init.textsz);
7932 bus_dmamap_sync(dma->tag, dma->map, BUS_DMASYNC_PREWRITE);
7934 /* Tell adapter where to find initialization sections. */
7935 if ((error = iwn_nic_lock(sc)) != 0)
7937 iwn_prph_write(sc, IWN_BSM_DRAM_DATA_ADDR, dma->paddr >> 4);
7938 iwn_prph_write(sc, IWN_BSM_DRAM_DATA_SIZE, fw->init.datasz);
7939 iwn_prph_write(sc, IWN_BSM_DRAM_TEXT_ADDR,
7940 (dma->paddr + IWN4965_FW_DATA_MAXSZ) >> 4);
7941 iwn_prph_write(sc, IWN_BSM_DRAM_TEXT_SIZE, fw->init.textsz);
7944 /* Load firmware boot code. */
7945 error = iwn4965_load_bootcode(sc, fw->boot.text, fw->boot.textsz);
7947 device_printf(sc->sc_dev, "%s: could not load boot firmware\n",
7951 /* Now press "execute". */
7952 IWN_WRITE(sc, IWN_RESET, 0);
7954 /* Wait at most one second for first alive notification. */
7955 if ((error = msleep(sc, &sc->sc_mtx, PCATCH, "iwninit", hz)) != 0) {
7956 device_printf(sc->sc_dev,
7957 "%s: timeout waiting for adapter to initialize, error %d\n",
7962 /* Retrieve current temperature for initial TX power calibration. */
7963 sc->rawtemp = sc->ucode_info.temp[3].chan20MHz;
7964 sc->temp = iwn4965_get_temperature(sc);
7966 /* Copy runtime sections into pre-allocated DMA-safe memory. */
7967 memcpy(dma->vaddr, fw->main.data, fw->main.datasz);
7968 bus_dmamap_sync(dma->tag, dma->map, BUS_DMASYNC_PREWRITE);
7969 memcpy(dma->vaddr + IWN4965_FW_DATA_MAXSZ,
7970 fw->main.text, fw->main.textsz);
7971 bus_dmamap_sync(dma->tag, dma->map, BUS_DMASYNC_PREWRITE);
7973 /* Tell adapter where to find runtime sections. */
7974 if ((error = iwn_nic_lock(sc)) != 0)
7976 iwn_prph_write(sc, IWN_BSM_DRAM_DATA_ADDR, dma->paddr >> 4);
7977 iwn_prph_write(sc, IWN_BSM_DRAM_DATA_SIZE, fw->main.datasz);
7978 iwn_prph_write(sc, IWN_BSM_DRAM_TEXT_ADDR,
7979 (dma->paddr + IWN4965_FW_DATA_MAXSZ) >> 4);
7980 iwn_prph_write(sc, IWN_BSM_DRAM_TEXT_SIZE,
7981 IWN_FW_UPDATED | fw->main.textsz);
7988 iwn5000_load_firmware_section(struct iwn_softc *sc, uint32_t dst,
7989 const uint8_t *section, int size)
7991 struct iwn_dma_info *dma = &sc->fw_dma;
7994 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7996 /* Copy firmware section into pre-allocated DMA-safe memory. */
7997 memcpy(dma->vaddr, section, size);
7998 bus_dmamap_sync(dma->tag, dma->map, BUS_DMASYNC_PREWRITE);
8000 if ((error = iwn_nic_lock(sc)) != 0)
8003 IWN_WRITE(sc, IWN_FH_TX_CONFIG(IWN_SRVC_DMACHNL),
8004 IWN_FH_TX_CONFIG_DMA_PAUSE);
8006 IWN_WRITE(sc, IWN_FH_SRAM_ADDR(IWN_SRVC_DMACHNL), dst);
8007 IWN_WRITE(sc, IWN_FH_TFBD_CTRL0(IWN_SRVC_DMACHNL),
8008 IWN_LOADDR(dma->paddr));
8009 IWN_WRITE(sc, IWN_FH_TFBD_CTRL1(IWN_SRVC_DMACHNL),
8010 IWN_HIADDR(dma->paddr) << 28 | size);
8011 IWN_WRITE(sc, IWN_FH_TXBUF_STATUS(IWN_SRVC_DMACHNL),
8012 IWN_FH_TXBUF_STATUS_TBNUM(1) |
8013 IWN_FH_TXBUF_STATUS_TBIDX(1) |
8014 IWN_FH_TXBUF_STATUS_TFBD_VALID);
8016 /* Kick Flow Handler to start DMA transfer. */
8017 IWN_WRITE(sc, IWN_FH_TX_CONFIG(IWN_SRVC_DMACHNL),
8018 IWN_FH_TX_CONFIG_DMA_ENA | IWN_FH_TX_CONFIG_CIRQ_HOST_ENDTFD);
8022 /* Wait at most five seconds for FH DMA transfer to complete. */
8023 return msleep(sc, &sc->sc_mtx, PCATCH, "iwninit", 5 * hz);
8027 iwn5000_load_firmware(struct iwn_softc *sc)
8029 struct iwn_fw_part *fw;
8032 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8034 /* Load the initialization firmware on first boot only. */
8035 fw = (sc->sc_flags & IWN_FLAG_CALIB_DONE) ?
8036 &sc->fw.main : &sc->fw.init;
8038 error = iwn5000_load_firmware_section(sc, IWN_FW_TEXT_BASE,
8039 fw->text, fw->textsz);
8041 device_printf(sc->sc_dev,
8042 "%s: could not load firmware %s section, error %d\n",
8043 __func__, ".text", error);
8046 error = iwn5000_load_firmware_section(sc, IWN_FW_DATA_BASE,
8047 fw->data, fw->datasz);
8049 device_printf(sc->sc_dev,
8050 "%s: could not load firmware %s section, error %d\n",
8051 __func__, ".data", error);
8055 /* Now press "execute". */
8056 IWN_WRITE(sc, IWN_RESET, 0);
8061 * Extract text and data sections from a legacy firmware image.
8064 iwn_read_firmware_leg(struct iwn_softc *sc, struct iwn_fw_info *fw)
8066 const uint32_t *ptr;
8070 ptr = (const uint32_t *)fw->data;
8071 rev = le32toh(*ptr++);
8073 sc->ucode_rev = rev;
8075 /* Check firmware API version. */
8076 if (IWN_FW_API(rev) <= 1) {
8077 device_printf(sc->sc_dev,
8078 "%s: bad firmware, need API version >=2\n", __func__);
8081 if (IWN_FW_API(rev) >= 3) {
8082 /* Skip build number (version 2 header). */
8086 if (fw->size < hdrlen) {
8087 device_printf(sc->sc_dev, "%s: firmware too short: %zu bytes\n",
8088 __func__, fw->size);
8091 fw->main.textsz = le32toh(*ptr++);
8092 fw->main.datasz = le32toh(*ptr++);
8093 fw->init.textsz = le32toh(*ptr++);
8094 fw->init.datasz = le32toh(*ptr++);
8095 fw->boot.textsz = le32toh(*ptr++);
8097 /* Check that all firmware sections fit. */
8098 if (fw->size < hdrlen + fw->main.textsz + fw->main.datasz +
8099 fw->init.textsz + fw->init.datasz + fw->boot.textsz) {
8100 device_printf(sc->sc_dev, "%s: firmware too short: %zu bytes\n",
8101 __func__, fw->size);
8105 /* Get pointers to firmware sections. */
8106 fw->main.text = (const uint8_t *)ptr;
8107 fw->main.data = fw->main.text + fw->main.textsz;
8108 fw->init.text = fw->main.data + fw->main.datasz;
8109 fw->init.data = fw->init.text + fw->init.textsz;
8110 fw->boot.text = fw->init.data + fw->init.datasz;
8115 * Extract text and data sections from a TLV firmware image.
8118 iwn_read_firmware_tlv(struct iwn_softc *sc, struct iwn_fw_info *fw,
8121 const struct iwn_fw_tlv_hdr *hdr;
8122 const struct iwn_fw_tlv *tlv;
8123 const uint8_t *ptr, *end;
8127 if (fw->size < sizeof (*hdr)) {
8128 device_printf(sc->sc_dev, "%s: firmware too short: %zu bytes\n",
8129 __func__, fw->size);
8132 hdr = (const struct iwn_fw_tlv_hdr *)fw->data;
8133 if (hdr->signature != htole32(IWN_FW_SIGNATURE)) {
8134 device_printf(sc->sc_dev, "%s: bad firmware signature 0x%08x\n",
8135 __func__, le32toh(hdr->signature));
8138 DPRINTF(sc, IWN_DEBUG_RESET, "FW: \"%.64s\", build 0x%x\n", hdr->descr,
8139 le32toh(hdr->build));
8140 sc->ucode_rev = le32toh(hdr->rev);
8143 * Select the closest supported alternative that is less than
8144 * or equal to the specified one.
8146 altmask = le64toh(hdr->altmask);
8147 while (alt > 0 && !(altmask & (1ULL << alt)))
8148 alt--; /* Downgrade. */
8149 DPRINTF(sc, IWN_DEBUG_RESET, "using alternative %d\n", alt);
8151 ptr = (const uint8_t *)(hdr + 1);
8152 end = (const uint8_t *)(fw->data + fw->size);
8154 /* Parse type-length-value fields. */
8155 while (ptr + sizeof (*tlv) <= end) {
8156 tlv = (const struct iwn_fw_tlv *)ptr;
8157 len = le32toh(tlv->len);
8159 ptr += sizeof (*tlv);
8160 if (ptr + len > end) {
8161 device_printf(sc->sc_dev,
8162 "%s: firmware too short: %zu bytes\n", __func__,
8166 /* Skip other alternatives. */
8167 if (tlv->alt != 0 && tlv->alt != htole16(alt))
8170 switch (le16toh(tlv->type)) {
8171 case IWN_FW_TLV_MAIN_TEXT:
8172 fw->main.text = ptr;
8173 fw->main.textsz = len;
8175 case IWN_FW_TLV_MAIN_DATA:
8176 fw->main.data = ptr;
8177 fw->main.datasz = len;
8179 case IWN_FW_TLV_INIT_TEXT:
8180 fw->init.text = ptr;
8181 fw->init.textsz = len;
8183 case IWN_FW_TLV_INIT_DATA:
8184 fw->init.data = ptr;
8185 fw->init.datasz = len;
8187 case IWN_FW_TLV_BOOT_TEXT:
8188 fw->boot.text = ptr;
8189 fw->boot.textsz = len;
8191 case IWN_FW_TLV_ENH_SENS:
8193 sc->sc_flags |= IWN_FLAG_ENH_SENS;
8195 case IWN_FW_TLV_PHY_CALIB:
8196 tmp = le32toh(*ptr);
8198 sc->reset_noise_gain = tmp;
8199 sc->noise_gain = tmp + 1;
8202 case IWN_FW_TLV_PAN:
8203 sc->sc_flags |= IWN_FLAG_PAN_SUPPORT;
8204 DPRINTF(sc, IWN_DEBUG_RESET,
8205 "PAN Support found: %d\n", 1);
8207 case IWN_FW_TLV_FLAGS:
8208 if (len < sizeof(uint32_t))
8210 if (len % sizeof(uint32_t))
8212 sc->tlv_feature_flags = le32toh(*ptr);
8213 DPRINTF(sc, IWN_DEBUG_RESET,
8214 "%s: feature: 0x%08x\n",
8216 sc->tlv_feature_flags);
8218 case IWN_FW_TLV_PBREQ_MAXLEN:
8219 case IWN_FW_TLV_RUNT_EVTLOG_PTR:
8220 case IWN_FW_TLV_RUNT_EVTLOG_SIZE:
8221 case IWN_FW_TLV_RUNT_ERRLOG_PTR:
8222 case IWN_FW_TLV_INIT_EVTLOG_PTR:
8223 case IWN_FW_TLV_INIT_EVTLOG_SIZE:
8224 case IWN_FW_TLV_INIT_ERRLOG_PTR:
8225 case IWN_FW_TLV_WOWLAN_INST:
8226 case IWN_FW_TLV_WOWLAN_DATA:
8227 DPRINTF(sc, IWN_DEBUG_RESET,
8228 "TLV type %d recognized but not handled\n",
8229 le16toh(tlv->type));
8232 DPRINTF(sc, IWN_DEBUG_RESET,
8233 "TLV type %d not handled\n", le16toh(tlv->type));
8236 next: /* TLV fields are 32-bit aligned. */
8237 ptr += (len + 3) & ~3;
8243 iwn_read_firmware(struct iwn_softc *sc)
8245 struct iwn_fw_info *fw = &sc->fw;
8248 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8252 memset(fw, 0, sizeof (*fw));
8254 /* Read firmware image from filesystem. */
8255 sc->fw_fp = firmware_get(sc->fwname);
8256 if (sc->fw_fp == NULL) {
8257 device_printf(sc->sc_dev, "%s: could not read firmware %s\n",
8258 __func__, sc->fwname);
8264 fw->size = sc->fw_fp->datasize;
8265 fw->data = (const uint8_t *)sc->fw_fp->data;
8266 if (fw->size < sizeof (uint32_t)) {
8267 device_printf(sc->sc_dev, "%s: firmware too short: %zu bytes\n",
8268 __func__, fw->size);
8273 /* Retrieve text and data sections. */
8274 if (*(const uint32_t *)fw->data != 0) /* Legacy image. */
8275 error = iwn_read_firmware_leg(sc, fw);
8277 error = iwn_read_firmware_tlv(sc, fw, 1);
8279 device_printf(sc->sc_dev,
8280 "%s: could not read firmware sections, error %d\n",
8285 device_printf(sc->sc_dev, "%s: ucode rev=0x%08x\n", __func__, sc->ucode_rev);
8287 /* Make sure text and data sections fit in hardware memory. */
8288 if (fw->main.textsz > sc->fw_text_maxsz ||
8289 fw->main.datasz > sc->fw_data_maxsz ||
8290 fw->init.textsz > sc->fw_text_maxsz ||
8291 fw->init.datasz > sc->fw_data_maxsz ||
8292 fw->boot.textsz > IWN_FW_BOOT_TEXT_MAXSZ ||
8293 (fw->boot.textsz & 3) != 0) {
8294 device_printf(sc->sc_dev, "%s: firmware sections too large\n",
8300 /* We can proceed with loading the firmware. */
8303 fail: iwn_unload_firmware(sc);
8308 iwn_unload_firmware(struct iwn_softc *sc)
8310 firmware_put(sc->fw_fp, FIRMWARE_UNLOAD);
8315 iwn_clock_wait(struct iwn_softc *sc)
8319 /* Set "initialization complete" bit. */
8320 IWN_SETBITS(sc, IWN_GP_CNTRL, IWN_GP_CNTRL_INIT_DONE);
8322 /* Wait for clock stabilization. */
8323 for (ntries = 0; ntries < 2500; ntries++) {
8324 if (IWN_READ(sc, IWN_GP_CNTRL) & IWN_GP_CNTRL_MAC_CLOCK_READY)
8328 device_printf(sc->sc_dev,
8329 "%s: timeout waiting for clock stabilization\n", __func__);
8334 iwn_apm_init(struct iwn_softc *sc)
8339 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8341 /* Disable L0s exit timer (NMI bug workaround). */
8342 IWN_SETBITS(sc, IWN_GIO_CHICKEN, IWN_GIO_CHICKEN_DIS_L0S_TIMER);
8343 /* Don't wait for ICH L0s (ICH bug workaround). */
8344 IWN_SETBITS(sc, IWN_GIO_CHICKEN, IWN_GIO_CHICKEN_L1A_NO_L0S_RX);
8346 /* Set FH wait threshold to max (HW bug under stress workaround). */
8347 IWN_SETBITS(sc, IWN_DBG_HPET_MEM, 0xffff0000);
8349 /* Enable HAP INTA to move adapter from L1a to L0s. */
8350 IWN_SETBITS(sc, IWN_HW_IF_CONFIG, IWN_HW_IF_CONFIG_HAP_WAKE_L1A);
8352 /* Retrieve PCIe Active State Power Management (ASPM). */
8353 reg = pci_read_config(sc->sc_dev, sc->sc_cap_off + PCIER_LINK_CTL, 4);
8354 /* Workaround for HW instability in PCIe L0->L0s->L1 transition. */
8355 if (reg & PCIEM_LINK_CTL_ASPMC_L1) /* L1 Entry enabled. */
8356 IWN_SETBITS(sc, IWN_GIO, IWN_GIO_L0S_ENA);
8358 IWN_CLRBITS(sc, IWN_GIO, IWN_GIO_L0S_ENA);
8360 if (sc->base_params->pll_cfg_val)
8361 IWN_SETBITS(sc, IWN_ANA_PLL, sc->base_params->pll_cfg_val);
8363 /* Wait for clock stabilization before accessing prph. */
8364 if ((error = iwn_clock_wait(sc)) != 0)
8367 if ((error = iwn_nic_lock(sc)) != 0)
8369 if (sc->hw_type == IWN_HW_REV_TYPE_4965) {
8370 /* Enable DMA and BSM (Bootstrap State Machine). */
8371 iwn_prph_write(sc, IWN_APMG_CLK_EN,
8372 IWN_APMG_CLK_CTRL_DMA_CLK_RQT |
8373 IWN_APMG_CLK_CTRL_BSM_CLK_RQT);
8376 iwn_prph_write(sc, IWN_APMG_CLK_EN,
8377 IWN_APMG_CLK_CTRL_DMA_CLK_RQT);
8380 /* Disable L1-Active. */
8381 iwn_prph_setbits(sc, IWN_APMG_PCI_STT, IWN_APMG_PCI_STT_L1A_DIS);
8388 iwn_apm_stop_master(struct iwn_softc *sc)
8392 /* Stop busmaster DMA activity. */
8393 IWN_SETBITS(sc, IWN_RESET, IWN_RESET_STOP_MASTER);
8394 for (ntries = 0; ntries < 100; ntries++) {
8395 if (IWN_READ(sc, IWN_RESET) & IWN_RESET_MASTER_DISABLED)
8399 device_printf(sc->sc_dev, "%s: timeout waiting for master\n", __func__);
8403 iwn_apm_stop(struct iwn_softc *sc)
8405 iwn_apm_stop_master(sc);
8407 /* Reset the entire device. */
8408 IWN_SETBITS(sc, IWN_RESET, IWN_RESET_SW);
8410 /* Clear "initialization complete" bit. */
8411 IWN_CLRBITS(sc, IWN_GP_CNTRL, IWN_GP_CNTRL_INIT_DONE);
8415 iwn4965_nic_config(struct iwn_softc *sc)
8417 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8419 if (IWN_RFCFG_TYPE(sc->rfcfg) == 1) {
8421 * I don't believe this to be correct but this is what the
8422 * vendor driver is doing. Probably the bits should not be
8423 * shifted in IWN_RFCFG_*.
8425 IWN_SETBITS(sc, IWN_HW_IF_CONFIG,
8426 IWN_RFCFG_TYPE(sc->rfcfg) |
8427 IWN_RFCFG_STEP(sc->rfcfg) |
8428 IWN_RFCFG_DASH(sc->rfcfg));
8430 IWN_SETBITS(sc, IWN_HW_IF_CONFIG,
8431 IWN_HW_IF_CONFIG_RADIO_SI | IWN_HW_IF_CONFIG_MAC_SI);
8436 iwn5000_nic_config(struct iwn_softc *sc)
8441 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8443 if (IWN_RFCFG_TYPE(sc->rfcfg) < 3) {
8444 IWN_SETBITS(sc, IWN_HW_IF_CONFIG,
8445 IWN_RFCFG_TYPE(sc->rfcfg) |
8446 IWN_RFCFG_STEP(sc->rfcfg) |
8447 IWN_RFCFG_DASH(sc->rfcfg));
8449 IWN_SETBITS(sc, IWN_HW_IF_CONFIG,
8450 IWN_HW_IF_CONFIG_RADIO_SI | IWN_HW_IF_CONFIG_MAC_SI);
8452 if ((error = iwn_nic_lock(sc)) != 0)
8454 iwn_prph_setbits(sc, IWN_APMG_PS, IWN_APMG_PS_EARLY_PWROFF_DIS);
8456 if (sc->hw_type == IWN_HW_REV_TYPE_1000) {
8458 * Select first Switching Voltage Regulator (1.32V) to
8459 * solve a stability issue related to noisy DC2DC line
8460 * in the silicon of 1000 Series.
8462 tmp = iwn_prph_read(sc, IWN_APMG_DIGITAL_SVR);
8463 tmp &= ~IWN_APMG_DIGITAL_SVR_VOLTAGE_MASK;
8464 tmp |= IWN_APMG_DIGITAL_SVR_VOLTAGE_1_32;
8465 iwn_prph_write(sc, IWN_APMG_DIGITAL_SVR, tmp);
8469 if (sc->sc_flags & IWN_FLAG_INTERNAL_PA) {
8470 /* Use internal power amplifier only. */
8471 IWN_WRITE(sc, IWN_GP_DRIVER, IWN_GP_DRIVER_RADIO_2X2_IPA);
8473 if (sc->base_params->additional_nic_config && sc->calib_ver >= 6) {
8474 /* Indicate that ROM calibration version is >=6. */
8475 IWN_SETBITS(sc, IWN_GP_DRIVER, IWN_GP_DRIVER_CALIB_VER6);
8477 if (sc->base_params->additional_gp_drv_bit)
8478 IWN_SETBITS(sc, IWN_GP_DRIVER,
8479 sc->base_params->additional_gp_drv_bit);
8484 * Take NIC ownership over Intel Active Management Technology (AMT).
8487 iwn_hw_prepare(struct iwn_softc *sc)
8491 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8493 /* Check if hardware is ready. */
8494 IWN_SETBITS(sc, IWN_HW_IF_CONFIG, IWN_HW_IF_CONFIG_NIC_READY);
8495 for (ntries = 0; ntries < 5; ntries++) {
8496 if (IWN_READ(sc, IWN_HW_IF_CONFIG) &
8497 IWN_HW_IF_CONFIG_NIC_READY)
8502 /* Hardware not ready, force into ready state. */
8503 IWN_SETBITS(sc, IWN_HW_IF_CONFIG, IWN_HW_IF_CONFIG_PREPARE);
8504 for (ntries = 0; ntries < 15000; ntries++) {
8505 if (!(IWN_READ(sc, IWN_HW_IF_CONFIG) &
8506 IWN_HW_IF_CONFIG_PREPARE_DONE))
8510 if (ntries == 15000)
8513 /* Hardware should be ready now. */
8514 IWN_SETBITS(sc, IWN_HW_IF_CONFIG, IWN_HW_IF_CONFIG_NIC_READY);
8515 for (ntries = 0; ntries < 5; ntries++) {
8516 if (IWN_READ(sc, IWN_HW_IF_CONFIG) &
8517 IWN_HW_IF_CONFIG_NIC_READY)
8525 iwn_hw_init(struct iwn_softc *sc)
8527 struct iwn_ops *ops = &sc->ops;
8528 int error, chnl, qid;
8530 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
8532 /* Clear pending interrupts. */
8533 IWN_WRITE(sc, IWN_INT, 0xffffffff);
8535 if ((error = iwn_apm_init(sc)) != 0) {
8536 device_printf(sc->sc_dev,
8537 "%s: could not power ON adapter, error %d\n", __func__,
8542 /* Select VMAIN power source. */
8543 if ((error = iwn_nic_lock(sc)) != 0)
8545 iwn_prph_clrbits(sc, IWN_APMG_PS, IWN_APMG_PS_PWR_SRC_MASK);
8548 /* Perform adapter-specific initialization. */
8549 if ((error = ops->nic_config(sc)) != 0)
8552 /* Initialize RX ring. */
8553 if ((error = iwn_nic_lock(sc)) != 0)
8555 IWN_WRITE(sc, IWN_FH_RX_CONFIG, 0);
8556 IWN_WRITE(sc, IWN_FH_RX_WPTR, 0);
8557 /* Set physical address of RX ring (256-byte aligned). */
8558 IWN_WRITE(sc, IWN_FH_RX_BASE, sc->rxq.desc_dma.paddr >> 8);
8559 /* Set physical address of RX status (16-byte aligned). */
8560 IWN_WRITE(sc, IWN_FH_STATUS_WPTR, sc->rxq.stat_dma.paddr >> 4);
8562 IWN_WRITE(sc, IWN_FH_RX_CONFIG,
8563 IWN_FH_RX_CONFIG_ENA |
8564 IWN_FH_RX_CONFIG_IGN_RXF_EMPTY | /* HW bug workaround */
8565 IWN_FH_RX_CONFIG_IRQ_DST_HOST |
8566 IWN_FH_RX_CONFIG_SINGLE_FRAME |
8567 IWN_FH_RX_CONFIG_RB_TIMEOUT(0) |
8568 IWN_FH_RX_CONFIG_NRBD(IWN_RX_RING_COUNT_LOG));
8570 IWN_WRITE(sc, IWN_FH_RX_WPTR, (IWN_RX_RING_COUNT - 1) & ~7);
8572 if ((error = iwn_nic_lock(sc)) != 0)
8575 /* Initialize TX scheduler. */
8576 iwn_prph_write(sc, sc->sched_txfact_addr, 0);
8578 /* Set physical address of "keep warm" page (16-byte aligned). */
8579 IWN_WRITE(sc, IWN_FH_KW_ADDR, sc->kw_dma.paddr >> 4);
8581 /* Initialize TX rings. */
8582 for (qid = 0; qid < sc->ntxqs; qid++) {
8583 struct iwn_tx_ring *txq = &sc->txq[qid];
8585 /* Set physical address of TX ring (256-byte aligned). */
8586 IWN_WRITE(sc, IWN_FH_CBBC_QUEUE(qid),
8587 txq->desc_dma.paddr >> 8);
8591 /* Enable DMA channels. */
8592 for (chnl = 0; chnl < sc->ndmachnls; chnl++) {
8593 IWN_WRITE(sc, IWN_FH_TX_CONFIG(chnl),
8594 IWN_FH_TX_CONFIG_DMA_ENA |
8595 IWN_FH_TX_CONFIG_DMA_CREDIT_ENA);
8598 /* Clear "radio off" and "commands blocked" bits. */
8599 IWN_WRITE(sc, IWN_UCODE_GP1_CLR, IWN_UCODE_GP1_RFKILL);
8600 IWN_WRITE(sc, IWN_UCODE_GP1_CLR, IWN_UCODE_GP1_CMD_BLOCKED);
8602 /* Clear pending interrupts. */
8603 IWN_WRITE(sc, IWN_INT, 0xffffffff);
8604 /* Enable interrupt coalescing. */
8605 IWN_WRITE(sc, IWN_INT_COALESCING, 512 / 8);
8606 /* Enable interrupts. */
8607 IWN_WRITE(sc, IWN_INT_MASK, sc->int_mask);
8609 /* _Really_ make sure "radio off" bit is cleared! */
8610 IWN_WRITE(sc, IWN_UCODE_GP1_CLR, IWN_UCODE_GP1_RFKILL);
8611 IWN_WRITE(sc, IWN_UCODE_GP1_CLR, IWN_UCODE_GP1_RFKILL);
8613 /* Enable shadow registers. */
8614 if (sc->base_params->shadow_reg_enable)
8615 IWN_SETBITS(sc, IWN_SHADOW_REG_CTRL, 0x800fffff);
8617 if ((error = ops->load_firmware(sc)) != 0) {
8618 device_printf(sc->sc_dev,
8619 "%s: could not load firmware, error %d\n", __func__,
8623 /* Wait at most one second for firmware alive notification. */
8624 if ((error = msleep(sc, &sc->sc_mtx, PCATCH, "iwninit", hz)) != 0) {
8625 device_printf(sc->sc_dev,
8626 "%s: timeout waiting for adapter to initialize, error %d\n",
8630 /* Do post-firmware initialization. */
8632 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
8634 return ops->post_alive(sc);
8638 iwn_hw_stop(struct iwn_softc *sc)
8640 int chnl, qid, ntries;
8642 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8644 IWN_WRITE(sc, IWN_RESET, IWN_RESET_NEVO);
8646 /* Disable interrupts. */
8647 IWN_WRITE(sc, IWN_INT_MASK, 0);
8648 IWN_WRITE(sc, IWN_INT, 0xffffffff);
8649 IWN_WRITE(sc, IWN_FH_INT, 0xffffffff);
8650 sc->sc_flags &= ~IWN_FLAG_USE_ICT;
8652 /* Make sure we no longer hold the NIC lock. */
8655 /* Stop TX scheduler. */
8656 iwn_prph_write(sc, sc->sched_txfact_addr, 0);
8658 /* Stop all DMA channels. */
8659 if (iwn_nic_lock(sc) == 0) {
8660 for (chnl = 0; chnl < sc->ndmachnls; chnl++) {
8661 IWN_WRITE(sc, IWN_FH_TX_CONFIG(chnl), 0);
8662 for (ntries = 0; ntries < 200; ntries++) {
8663 if (IWN_READ(sc, IWN_FH_TX_STATUS) &
8664 IWN_FH_TX_STATUS_IDLE(chnl))
8673 iwn_reset_rx_ring(sc, &sc->rxq);
8675 /* Reset all TX rings. */
8676 for (qid = 0; qid < sc->ntxqs; qid++)
8677 iwn_reset_tx_ring(sc, &sc->txq[qid]);
8679 if (iwn_nic_lock(sc) == 0) {
8680 iwn_prph_write(sc, IWN_APMG_CLK_DIS,
8681 IWN_APMG_CLK_CTRL_DMA_CLK_RQT);
8685 /* Power OFF adapter. */
8690 iwn_panicked(void *arg0, int pending)
8692 struct iwn_softc *sc = arg0;
8693 struct ieee80211com *ic = &sc->sc_ic;
8694 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
8700 printf("%s: null vap\n", __func__);
8704 device_printf(sc->sc_dev, "%s: controller panicked, iv_state = %d; "
8705 "restarting\n", __func__, vap->iv_state);
8708 * This is not enough work. We need to also reinitialise
8709 * the correct transmit state for aggregation enabled queues,
8710 * which has a very specific requirement of
8711 * ring index = 802.11 seqno % 256. If we don't do this (which
8712 * we definitely don't!) then the firmware will just panic again.
8715 ieee80211_restart_all(ic);
8719 iwn_stop_locked(sc);
8720 if ((error = iwn_init_locked(sc)) != 0) {
8721 device_printf(sc->sc_dev,
8722 "%s: could not init hardware\n", __func__);
8725 if (vap->iv_state >= IEEE80211_S_AUTH &&
8726 (error = iwn_auth(sc, vap)) != 0) {
8727 device_printf(sc->sc_dev,
8728 "%s: could not move to auth state\n", __func__);
8730 if (vap->iv_state >= IEEE80211_S_RUN &&
8731 (error = iwn_run(sc, vap)) != 0) {
8732 device_printf(sc->sc_dev,
8733 "%s: could not move to run state\n", __func__);
8742 iwn_init_locked(struct iwn_softc *sc)
8746 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
8748 IWN_LOCK_ASSERT(sc);
8750 if (sc->sc_flags & IWN_FLAG_RUNNING)
8753 sc->sc_flags |= IWN_FLAG_RUNNING;
8755 if ((error = iwn_hw_prepare(sc)) != 0) {
8756 device_printf(sc->sc_dev, "%s: hardware not ready, error %d\n",
8761 /* Initialize interrupt mask to default value. */
8762 sc->int_mask = IWN_INT_MASK_DEF;
8763 sc->sc_flags &= ~IWN_FLAG_USE_ICT;
8765 /* Check that the radio is not disabled by hardware switch. */
8766 if (!(IWN_READ(sc, IWN_GP_CNTRL) & IWN_GP_CNTRL_RFKILL)) {
8771 /* Read firmware images from the filesystem. */
8772 if ((error = iwn_read_firmware(sc)) != 0) {
8773 device_printf(sc->sc_dev,
8774 "%s: could not read firmware, error %d\n", __func__,
8779 /* Initialize hardware and upload firmware. */
8780 error = iwn_hw_init(sc);
8781 iwn_unload_firmware(sc);
8783 device_printf(sc->sc_dev,
8784 "%s: could not initialize hardware, error %d\n", __func__,
8789 /* Configure adapter now that it is ready. */
8790 if ((error = iwn_config(sc)) != 0) {
8791 device_printf(sc->sc_dev,
8792 "%s: could not configure device, error %d\n", __func__,
8797 callout_reset(&sc->watchdog_to, hz, iwn_watchdog, sc);
8800 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
8805 iwn_stop_locked(sc);
8807 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end in error\n",__func__);
8813 iwn_init(struct iwn_softc *sc)
8818 error = iwn_init_locked(sc);
8825 iwn_stop_locked(struct iwn_softc *sc)
8828 IWN_LOCK_ASSERT(sc);
8830 if (!(sc->sc_flags & IWN_FLAG_RUNNING))
8833 sc->sc_is_scanning = 0;
8834 sc->sc_tx_timer = 0;
8835 callout_stop(&sc->watchdog_to);
8836 callout_stop(&sc->scan_timeout);
8837 callout_stop(&sc->calib_to);
8838 sc->sc_flags &= ~IWN_FLAG_RUNNING;
8840 /* Power OFF hardware. */
8845 iwn_stop(struct iwn_softc *sc)
8848 iwn_stop_locked(sc);
8853 * Callback from net80211 to start a scan.
8856 iwn_scan_start(struct ieee80211com *ic)
8858 struct iwn_softc *sc = ic->ic_softc;
8861 /* make the link LED blink while we're scanning */
8862 iwn_set_led(sc, IWN_LED_LINK, 20, 2);
8867 * Callback from net80211 to terminate a scan.
8870 iwn_scan_end(struct ieee80211com *ic)
8872 struct iwn_softc *sc = ic->ic_softc;
8873 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
8876 if (vap->iv_state == IEEE80211_S_RUN) {
8877 /* Set link LED to ON status if we are associated */
8878 iwn_set_led(sc, IWN_LED_LINK, 0, 1);
8884 * Callback from net80211 to force a channel change.
8887 iwn_set_channel(struct ieee80211com *ic)
8889 const struct ieee80211_channel *c = ic->ic_curchan;
8890 struct iwn_softc *sc = ic->ic_softc;
8893 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8896 sc->sc_rxtap.wr_chan_freq = htole16(c->ic_freq);
8897 sc->sc_rxtap.wr_chan_flags = htole16(c->ic_flags);
8898 sc->sc_txtap.wt_chan_freq = htole16(c->ic_freq);
8899 sc->sc_txtap.wt_chan_flags = htole16(c->ic_flags);
8902 * Only need to set the channel in Monitor mode. AP scanning and auth
8903 * are already taken care of by their respective firmware commands.
8905 if (ic->ic_opmode == IEEE80211_M_MONITOR) {
8906 error = iwn_config(sc);
8908 device_printf(sc->sc_dev,
8909 "%s: error %d settting channel\n", __func__, error);
8915 * Callback from net80211 to start scanning of the current channel.
8918 iwn_scan_curchan(struct ieee80211_scan_state *ss, unsigned long maxdwell)
8920 struct ieee80211vap *vap = ss->ss_vap;
8921 struct ieee80211com *ic = vap->iv_ic;
8922 struct iwn_softc *sc = ic->ic_softc;
8926 error = iwn_scan(sc, vap, ss, ic->ic_curchan);
8929 ieee80211_cancel_scan(vap);
8933 * Callback from net80211 to handle the minimum dwell time being met.
8934 * The intent is to terminate the scan but we just let the firmware
8935 * notify us when it's finished as we have no safe way to abort it.
8938 iwn_scan_mindwell(struct ieee80211_scan_state *ss)
8940 /* NB: don't try to abort scan; wait for firmware to finish */
8943 #define IWN_DESC(x) case x: return #x
8946 * Translate CSR code to string
8948 static char *iwn_get_csr_string(int csr)
8951 IWN_DESC(IWN_HW_IF_CONFIG);
8952 IWN_DESC(IWN_INT_COALESCING);
8954 IWN_DESC(IWN_INT_MASK);
8955 IWN_DESC(IWN_FH_INT);
8956 IWN_DESC(IWN_GPIO_IN);
8957 IWN_DESC(IWN_RESET);
8958 IWN_DESC(IWN_GP_CNTRL);
8959 IWN_DESC(IWN_HW_REV);
8960 IWN_DESC(IWN_EEPROM);
8961 IWN_DESC(IWN_EEPROM_GP);
8962 IWN_DESC(IWN_OTP_GP);
8964 IWN_DESC(IWN_GP_UCODE);
8965 IWN_DESC(IWN_GP_DRIVER);
8966 IWN_DESC(IWN_UCODE_GP1);
8967 IWN_DESC(IWN_UCODE_GP2);
8969 IWN_DESC(IWN_DRAM_INT_TBL);
8970 IWN_DESC(IWN_GIO_CHICKEN);
8971 IWN_DESC(IWN_ANA_PLL);
8972 IWN_DESC(IWN_HW_REV_WA);
8973 IWN_DESC(IWN_DBG_HPET_MEM);
8975 return "UNKNOWN CSR";
8980 * This function print firmware register
8983 iwn_debug_register(struct iwn_softc *sc)
8986 static const uint32_t csr_tbl[] = {
9011 DPRINTF(sc, IWN_DEBUG_REGISTER,
9012 "CSR values: (2nd byte of IWN_INT_COALESCING is IWN_INT_PERIODIC)%s",
9014 for (i = 0; i < nitems(csr_tbl); i++){
9015 DPRINTF(sc, IWN_DEBUG_REGISTER," %10s: 0x%08x ",
9016 iwn_get_csr_string(csr_tbl[i]), IWN_READ(sc, csr_tbl[i]));
9018 DPRINTF(sc, IWN_DEBUG_REGISTER,"%s","\n");
9020 DPRINTF(sc, IWN_DEBUG_REGISTER,"%s","\n");