2 * Copyright (c) 2007-2009 Damien Bergamini <damien.bergamini@free.fr>
3 * Copyright (c) 2008 Benjamin Close <benjsc@FreeBSD.org>
4 * Copyright (c) 2008 Sam Leffler, Errno Consulting
5 * Copyright (c) 2011 Intel Corporation
6 * Copyright (c) 2013 Cedric GROSS <c.gross@kreiz-it.fr>
7 * Copyright (c) 2013 Adrian Chadd <adrian@FreeBSD.org>
9 * Permission to use, copy, modify, and distribute this software for any
10 * purpose with or without fee is hereby granted, provided that the above
11 * copyright notice and this permission notice appear in all copies.
13 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
14 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
15 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
16 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
17 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
18 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
19 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
23 * Driver for Intel WiFi Link 4965 and 1000/5000/6000 Series 802.11 network
27 #include <sys/cdefs.h>
28 __FBSDID("$FreeBSD$");
33 #include <sys/param.h>
34 #include <sys/sockio.h>
35 #include <sys/sysctl.h>
37 #include <sys/kernel.h>
38 #include <sys/socket.h>
39 #include <sys/systm.h>
40 #include <sys/malloc.h>
44 #include <sys/endian.h>
45 #include <sys/firmware.h>
46 #include <sys/limits.h>
47 #include <sys/module.h>
49 #include <sys/queue.h>
50 #include <sys/taskqueue.h>
52 #include <machine/bus.h>
53 #include <machine/resource.h>
54 #include <machine/clock.h>
56 #include <dev/pci/pcireg.h>
57 #include <dev/pci/pcivar.h>
60 #include <net/if_var.h>
61 #include <net/if_dl.h>
62 #include <net/if_media.h>
64 #include <netinet/in.h>
65 #include <netinet/if_ether.h>
67 #include <net80211/ieee80211_var.h>
68 #include <net80211/ieee80211_radiotap.h>
69 #include <net80211/ieee80211_regdomain.h>
70 #include <net80211/ieee80211_ratectl.h>
72 #include <dev/iwn/if_iwnreg.h>
73 #include <dev/iwn/if_iwnvar.h>
74 #include <dev/iwn/if_iwn_devid.h>
75 #include <dev/iwn/if_iwn_chip_cfg.h>
76 #include <dev/iwn/if_iwn_debug.h>
77 #include <dev/iwn/if_iwn_ioctl.h>
85 static const struct iwn_ident iwn_ident_table[] = {
86 { 0x8086, IWN_DID_6x05_1, "Intel Centrino Advanced-N 6205" },
87 { 0x8086, IWN_DID_1000_1, "Intel Centrino Wireless-N 1000" },
88 { 0x8086, IWN_DID_1000_2, "Intel Centrino Wireless-N 1000" },
89 { 0x8086, IWN_DID_6x05_2, "Intel Centrino Advanced-N 6205" },
90 { 0x8086, IWN_DID_6050_1, "Intel Centrino Advanced-N + WiMAX 6250" },
91 { 0x8086, IWN_DID_6050_2, "Intel Centrino Advanced-N + WiMAX 6250" },
92 { 0x8086, IWN_DID_x030_1, "Intel Centrino Wireless-N 1030" },
93 { 0x8086, IWN_DID_x030_2, "Intel Centrino Wireless-N 1030" },
94 { 0x8086, IWN_DID_x030_3, "Intel Centrino Advanced-N 6230" },
95 { 0x8086, IWN_DID_x030_4, "Intel Centrino Advanced-N 6230" },
96 { 0x8086, IWN_DID_6150_1, "Intel Centrino Wireless-N + WiMAX 6150" },
97 { 0x8086, IWN_DID_6150_2, "Intel Centrino Wireless-N + WiMAX 6150" },
98 { 0x8086, IWN_DID_2x00_1, "Intel(R) Centrino(R) Wireless-N 2200 BGN" },
99 { 0x8086, IWN_DID_2x00_2, "Intel(R) Centrino(R) Wireless-N 2200 BGN" },
100 /* XXX 2200D is IWN_SDID_2x00_4; there's no way to express this here! */
101 { 0x8086, IWN_DID_2x30_1, "Intel Centrino Wireless-N 2230" },
102 { 0x8086, IWN_DID_2x30_2, "Intel Centrino Wireless-N 2230" },
103 { 0x8086, IWN_DID_130_1, "Intel Centrino Wireless-N 130" },
104 { 0x8086, IWN_DID_130_2, "Intel Centrino Wireless-N 130" },
105 { 0x8086, IWN_DID_100_1, "Intel Centrino Wireless-N 100" },
106 { 0x8086, IWN_DID_100_2, "Intel Centrino Wireless-N 100" },
107 { 0x8086, IWN_DID_105_1, "Intel Centrino Wireless-N 105" },
108 { 0x8086, IWN_DID_105_2, "Intel Centrino Wireless-N 105" },
109 { 0x8086, IWN_DID_135_1, "Intel Centrino Wireless-N 135" },
110 { 0x8086, IWN_DID_135_2, "Intel Centrino Wireless-N 135" },
111 { 0x8086, IWN_DID_4965_1, "Intel Wireless WiFi Link 4965" },
112 { 0x8086, IWN_DID_6x00_1, "Intel Centrino Ultimate-N 6300" },
113 { 0x8086, IWN_DID_6x00_2, "Intel Centrino Advanced-N 6200" },
114 { 0x8086, IWN_DID_4965_2, "Intel Wireless WiFi Link 4965" },
115 { 0x8086, IWN_DID_4965_3, "Intel Wireless WiFi Link 4965" },
116 { 0x8086, IWN_DID_5x00_1, "Intel WiFi Link 5100" },
117 { 0x8086, IWN_DID_4965_4, "Intel Wireless WiFi Link 4965" },
118 { 0x8086, IWN_DID_5x00_3, "Intel Ultimate N WiFi Link 5300" },
119 { 0x8086, IWN_DID_5x00_4, "Intel Ultimate N WiFi Link 5300" },
120 { 0x8086, IWN_DID_5x00_2, "Intel WiFi Link 5100" },
121 { 0x8086, IWN_DID_6x00_3, "Intel Centrino Ultimate-N 6300" },
122 { 0x8086, IWN_DID_6x00_4, "Intel Centrino Advanced-N 6200" },
123 { 0x8086, IWN_DID_5x50_1, "Intel WiMAX/WiFi Link 5350" },
124 { 0x8086, IWN_DID_5x50_2, "Intel WiMAX/WiFi Link 5350" },
125 { 0x8086, IWN_DID_5x50_3, "Intel WiMAX/WiFi Link 5150" },
126 { 0x8086, IWN_DID_5x50_4, "Intel WiMAX/WiFi Link 5150" },
127 { 0x8086, IWN_DID_6035_1, "Intel Centrino Advanced 6235" },
128 { 0x8086, IWN_DID_6035_2, "Intel Centrino Advanced 6235" },
132 static int iwn_probe(device_t);
133 static int iwn_attach(device_t);
134 static int iwn4965_attach(struct iwn_softc *, uint16_t);
135 static int iwn5000_attach(struct iwn_softc *, uint16_t);
136 static int iwn_config_specific(struct iwn_softc *, uint16_t);
137 static void iwn_radiotap_attach(struct iwn_softc *);
138 static void iwn_sysctlattach(struct iwn_softc *);
139 static struct ieee80211vap *iwn_vap_create(struct ieee80211com *,
140 const char [IFNAMSIZ], int, enum ieee80211_opmode, int,
141 const uint8_t [IEEE80211_ADDR_LEN],
142 const uint8_t [IEEE80211_ADDR_LEN]);
143 static void iwn_vap_delete(struct ieee80211vap *);
144 static int iwn_detach(device_t);
145 static int iwn_shutdown(device_t);
146 static int iwn_suspend(device_t);
147 static int iwn_resume(device_t);
148 static int iwn_nic_lock(struct iwn_softc *);
149 static int iwn_eeprom_lock(struct iwn_softc *);
150 static int iwn_init_otprom(struct iwn_softc *);
151 static int iwn_read_prom_data(struct iwn_softc *, uint32_t, void *, int);
152 static void iwn_dma_map_addr(void *, bus_dma_segment_t *, int, int);
153 static int iwn_dma_contig_alloc(struct iwn_softc *, struct iwn_dma_info *,
154 void **, bus_size_t, bus_size_t);
155 static void iwn_dma_contig_free(struct iwn_dma_info *);
156 static int iwn_alloc_sched(struct iwn_softc *);
157 static void iwn_free_sched(struct iwn_softc *);
158 static int iwn_alloc_kw(struct iwn_softc *);
159 static void iwn_free_kw(struct iwn_softc *);
160 static int iwn_alloc_ict(struct iwn_softc *);
161 static void iwn_free_ict(struct iwn_softc *);
162 static int iwn_alloc_fwmem(struct iwn_softc *);
163 static void iwn_free_fwmem(struct iwn_softc *);
164 static int iwn_alloc_rx_ring(struct iwn_softc *, struct iwn_rx_ring *);
165 static void iwn_reset_rx_ring(struct iwn_softc *, struct iwn_rx_ring *);
166 static void iwn_free_rx_ring(struct iwn_softc *, struct iwn_rx_ring *);
167 static int iwn_alloc_tx_ring(struct iwn_softc *, struct iwn_tx_ring *,
169 static void iwn_reset_tx_ring(struct iwn_softc *, struct iwn_tx_ring *);
170 static void iwn_free_tx_ring(struct iwn_softc *, struct iwn_tx_ring *);
171 static void iwn5000_ict_reset(struct iwn_softc *);
172 static int iwn_read_eeprom(struct iwn_softc *,
173 uint8_t macaddr[IEEE80211_ADDR_LEN]);
174 static void iwn4965_read_eeprom(struct iwn_softc *);
176 static void iwn4965_print_power_group(struct iwn_softc *, int);
178 static void iwn5000_read_eeprom(struct iwn_softc *);
179 static uint32_t iwn_eeprom_channel_flags(struct iwn_eeprom_chan *);
180 static void iwn_read_eeprom_band(struct iwn_softc *, int, int, int *,
181 struct ieee80211_channel[]);
182 static void iwn_read_eeprom_ht40(struct iwn_softc *, int, int, int *,
183 struct ieee80211_channel[]);
184 static void iwn_read_eeprom_channels(struct iwn_softc *, int, uint32_t);
185 static struct iwn_eeprom_chan *iwn_find_eeprom_channel(struct iwn_softc *,
186 struct ieee80211_channel *);
187 static void iwn_getradiocaps(struct ieee80211com *, int, int *,
188 struct ieee80211_channel[]);
189 static int iwn_setregdomain(struct ieee80211com *,
190 struct ieee80211_regdomain *, int,
191 struct ieee80211_channel[]);
192 static void iwn_read_eeprom_enhinfo(struct iwn_softc *);
193 static struct ieee80211_node *iwn_node_alloc(struct ieee80211vap *,
194 const uint8_t mac[IEEE80211_ADDR_LEN]);
195 static void iwn_newassoc(struct ieee80211_node *, int);
196 static int iwn_media_change(struct ifnet *);
197 static int iwn_newstate(struct ieee80211vap *, enum ieee80211_state, int);
198 static void iwn_calib_timeout(void *);
199 static void iwn_rx_phy(struct iwn_softc *, struct iwn_rx_desc *,
200 struct iwn_rx_data *);
201 static void iwn_rx_done(struct iwn_softc *, struct iwn_rx_desc *,
202 struct iwn_rx_data *);
203 static void iwn_rx_compressed_ba(struct iwn_softc *, struct iwn_rx_desc *,
204 struct iwn_rx_data *);
205 static void iwn5000_rx_calib_results(struct iwn_softc *,
206 struct iwn_rx_desc *, struct iwn_rx_data *);
207 static void iwn_rx_statistics(struct iwn_softc *, struct iwn_rx_desc *,
208 struct iwn_rx_data *);
209 static void iwn4965_tx_done(struct iwn_softc *, struct iwn_rx_desc *,
210 struct iwn_rx_data *);
211 static void iwn5000_tx_done(struct iwn_softc *, struct iwn_rx_desc *,
212 struct iwn_rx_data *);
213 static void iwn_tx_done(struct iwn_softc *, struct iwn_rx_desc *, int, int,
215 static void iwn_ampdu_tx_done(struct iwn_softc *, int, int, int, int, int,
217 static void iwn_cmd_done(struct iwn_softc *, struct iwn_rx_desc *);
218 static void iwn_notif_intr(struct iwn_softc *);
219 static void iwn_wakeup_intr(struct iwn_softc *);
220 static void iwn_rftoggle_task(void *, int);
221 static void iwn_fatal_intr(struct iwn_softc *);
222 static void iwn_intr(void *);
223 static void iwn4965_update_sched(struct iwn_softc *, int, int, uint8_t,
225 static void iwn5000_update_sched(struct iwn_softc *, int, int, uint8_t,
228 static void iwn5000_reset_sched(struct iwn_softc *, int, int);
230 static int iwn_tx_data(struct iwn_softc *, struct mbuf *,
231 struct ieee80211_node *);
232 static int iwn_tx_data_raw(struct iwn_softc *, struct mbuf *,
233 struct ieee80211_node *,
234 const struct ieee80211_bpf_params *params);
235 static void iwn_xmit_task(void *arg0, int pending);
236 static int iwn_raw_xmit(struct ieee80211_node *, struct mbuf *,
237 const struct ieee80211_bpf_params *);
238 static int iwn_transmit(struct ieee80211com *, struct mbuf *);
239 static void iwn_scan_timeout(void *);
240 static void iwn_watchdog(void *);
241 static int iwn_ioctl(struct ieee80211com *, u_long , void *);
242 static void iwn_parent(struct ieee80211com *);
243 static int iwn_cmd(struct iwn_softc *, int, const void *, int, int);
244 static int iwn4965_add_node(struct iwn_softc *, struct iwn_node_info *,
246 static int iwn5000_add_node(struct iwn_softc *, struct iwn_node_info *,
248 static int iwn_set_link_quality(struct iwn_softc *,
249 struct ieee80211_node *);
250 static int iwn_add_broadcast_node(struct iwn_softc *, int);
251 static int iwn_updateedca(struct ieee80211com *);
252 static void iwn_update_mcast(struct ieee80211com *);
253 static void iwn_set_led(struct iwn_softc *, uint8_t, uint8_t, uint8_t);
254 static int iwn_set_critical_temp(struct iwn_softc *);
255 static int iwn_set_timing(struct iwn_softc *, struct ieee80211_node *);
256 static void iwn4965_power_calibration(struct iwn_softc *, int);
257 static int iwn4965_set_txpower(struct iwn_softc *, int);
258 static int iwn5000_set_txpower(struct iwn_softc *, int);
259 static int iwn4965_get_rssi(struct iwn_softc *, struct iwn_rx_stat *);
260 static int iwn5000_get_rssi(struct iwn_softc *, struct iwn_rx_stat *);
261 static int iwn_get_noise(const struct iwn_rx_general_stats *);
262 static int iwn4965_get_temperature(struct iwn_softc *);
263 static int iwn5000_get_temperature(struct iwn_softc *);
264 static int iwn_init_sensitivity(struct iwn_softc *);
265 static void iwn_collect_noise(struct iwn_softc *,
266 const struct iwn_rx_general_stats *);
267 static int iwn4965_init_gains(struct iwn_softc *);
268 static int iwn5000_init_gains(struct iwn_softc *);
269 static int iwn4965_set_gains(struct iwn_softc *);
270 static int iwn5000_set_gains(struct iwn_softc *);
271 static void iwn_tune_sensitivity(struct iwn_softc *,
272 const struct iwn_rx_stats *);
273 static void iwn_save_stats_counters(struct iwn_softc *,
274 const struct iwn_stats *);
275 static int iwn_send_sensitivity(struct iwn_softc *);
276 static void iwn_check_rx_recovery(struct iwn_softc *, struct iwn_stats *);
277 static int iwn_set_pslevel(struct iwn_softc *, int, int, int);
278 static int iwn_send_btcoex(struct iwn_softc *);
279 static int iwn_send_advanced_btcoex(struct iwn_softc *);
280 static int iwn5000_runtime_calib(struct iwn_softc *);
281 static int iwn_send_rxon(struct iwn_softc *, int, int);
282 static int iwn_config(struct iwn_softc *);
283 static int iwn_scan(struct iwn_softc *, struct ieee80211vap *,
284 struct ieee80211_scan_state *, struct ieee80211_channel *);
285 static int iwn_auth(struct iwn_softc *, struct ieee80211vap *vap);
286 static int iwn_run(struct iwn_softc *, struct ieee80211vap *vap);
287 static int iwn_ampdu_rx_start(struct ieee80211_node *,
288 struct ieee80211_rx_ampdu *, int, int, int);
289 static void iwn_ampdu_rx_stop(struct ieee80211_node *,
290 struct ieee80211_rx_ampdu *);
291 static int iwn_addba_request(struct ieee80211_node *,
292 struct ieee80211_tx_ampdu *, int, int, int);
293 static int iwn_addba_response(struct ieee80211_node *,
294 struct ieee80211_tx_ampdu *, int, int, int);
295 static int iwn_ampdu_tx_start(struct ieee80211com *,
296 struct ieee80211_node *, uint8_t);
297 static void iwn_ampdu_tx_stop(struct ieee80211_node *,
298 struct ieee80211_tx_ampdu *);
299 static void iwn4965_ampdu_tx_start(struct iwn_softc *,
300 struct ieee80211_node *, int, uint8_t, uint16_t);
301 static void iwn4965_ampdu_tx_stop(struct iwn_softc *, int,
303 static void iwn5000_ampdu_tx_start(struct iwn_softc *,
304 struct ieee80211_node *, int, uint8_t, uint16_t);
305 static void iwn5000_ampdu_tx_stop(struct iwn_softc *, int,
307 static int iwn5000_query_calibration(struct iwn_softc *);
308 static int iwn5000_send_calibration(struct iwn_softc *);
309 static int iwn5000_send_wimax_coex(struct iwn_softc *);
310 static int iwn5000_crystal_calib(struct iwn_softc *);
311 static int iwn5000_temp_offset_calib(struct iwn_softc *);
312 static int iwn5000_temp_offset_calibv2(struct iwn_softc *);
313 static int iwn4965_post_alive(struct iwn_softc *);
314 static int iwn5000_post_alive(struct iwn_softc *);
315 static int iwn4965_load_bootcode(struct iwn_softc *, const uint8_t *,
317 static int iwn4965_load_firmware(struct iwn_softc *);
318 static int iwn5000_load_firmware_section(struct iwn_softc *, uint32_t,
319 const uint8_t *, int);
320 static int iwn5000_load_firmware(struct iwn_softc *);
321 static int iwn_read_firmware_leg(struct iwn_softc *,
322 struct iwn_fw_info *);
323 static int iwn_read_firmware_tlv(struct iwn_softc *,
324 struct iwn_fw_info *, uint16_t);
325 static int iwn_read_firmware(struct iwn_softc *);
326 static void iwn_unload_firmware(struct iwn_softc *);
327 static int iwn_clock_wait(struct iwn_softc *);
328 static int iwn_apm_init(struct iwn_softc *);
329 static void iwn_apm_stop_master(struct iwn_softc *);
330 static void iwn_apm_stop(struct iwn_softc *);
331 static int iwn4965_nic_config(struct iwn_softc *);
332 static int iwn5000_nic_config(struct iwn_softc *);
333 static int iwn_hw_prepare(struct iwn_softc *);
334 static int iwn_hw_init(struct iwn_softc *);
335 static void iwn_hw_stop(struct iwn_softc *);
336 static void iwn_panicked(void *, int);
337 static int iwn_init_locked(struct iwn_softc *);
338 static int iwn_init(struct iwn_softc *);
339 static void iwn_stop_locked(struct iwn_softc *);
340 static void iwn_stop(struct iwn_softc *);
341 static void iwn_scan_start(struct ieee80211com *);
342 static void iwn_scan_end(struct ieee80211com *);
343 static void iwn_set_channel(struct ieee80211com *);
344 static void iwn_scan_curchan(struct ieee80211_scan_state *, unsigned long);
345 static void iwn_scan_mindwell(struct ieee80211_scan_state *);
347 static char *iwn_get_csr_string(int);
348 static void iwn_debug_register(struct iwn_softc *);
351 static device_method_t iwn_methods[] = {
352 /* Device interface */
353 DEVMETHOD(device_probe, iwn_probe),
354 DEVMETHOD(device_attach, iwn_attach),
355 DEVMETHOD(device_detach, iwn_detach),
356 DEVMETHOD(device_shutdown, iwn_shutdown),
357 DEVMETHOD(device_suspend, iwn_suspend),
358 DEVMETHOD(device_resume, iwn_resume),
363 static driver_t iwn_driver = {
366 sizeof(struct iwn_softc)
368 static devclass_t iwn_devclass;
370 DRIVER_MODULE(iwn, pci, iwn_driver, iwn_devclass, NULL, NULL);
372 MODULE_VERSION(iwn, 1);
374 MODULE_DEPEND(iwn, firmware, 1, 1, 1);
375 MODULE_DEPEND(iwn, pci, 1, 1, 1);
376 MODULE_DEPEND(iwn, wlan, 1, 1, 1);
378 static d_ioctl_t iwn_cdev_ioctl;
379 static d_open_t iwn_cdev_open;
380 static d_close_t iwn_cdev_close;
382 static struct cdevsw iwn_cdevsw = {
383 .d_version = D_VERSION,
385 .d_open = iwn_cdev_open,
386 .d_close = iwn_cdev_close,
387 .d_ioctl = iwn_cdev_ioctl,
392 iwn_probe(device_t dev)
394 const struct iwn_ident *ident;
396 for (ident = iwn_ident_table; ident->name != NULL; ident++) {
397 if (pci_get_vendor(dev) == ident->vendor &&
398 pci_get_device(dev) == ident->device) {
399 device_set_desc(dev, ident->name);
400 return (BUS_PROBE_DEFAULT);
407 iwn_is_3stream_device(struct iwn_softc *sc)
409 /* XXX for now only 5300, until the 5350 can be tested */
410 if (sc->hw_type == IWN_HW_REV_TYPE_5300)
416 iwn_attach(device_t dev)
418 struct iwn_softc *sc = device_get_softc(dev);
419 struct ieee80211com *ic;
425 error = resource_int_value(device_get_name(sc->sc_dev),
426 device_get_unit(sc->sc_dev), "debug", &(sc->sc_debug));
433 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: begin\n",__func__);
436 * Get the offset of the PCI Express Capability Structure in PCI
437 * Configuration Space.
439 error = pci_find_cap(dev, PCIY_EXPRESS, &sc->sc_cap_off);
441 device_printf(dev, "PCIe capability structure not found!\n");
445 /* Clear device-specific "PCI retry timeout" register (41h). */
446 pci_write_config(dev, 0x41, 0, 1);
448 /* Enable bus-mastering. */
449 pci_enable_busmaster(dev);
452 sc->mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
454 if (sc->mem == NULL) {
455 device_printf(dev, "can't map mem space\n");
459 sc->sc_st = rman_get_bustag(sc->mem);
460 sc->sc_sh = rman_get_bushandle(sc->mem);
464 if (pci_alloc_msi(dev, &i) == 0)
466 /* Install interrupt handler. */
467 sc->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, RF_ACTIVE |
468 (rid != 0 ? 0 : RF_SHAREABLE));
469 if (sc->irq == NULL) {
470 device_printf(dev, "can't map interrupt\n");
477 /* Read hardware revision and attach. */
478 sc->hw_type = (IWN_READ(sc, IWN_HW_REV) >> IWN_HW_REV_TYPE_SHIFT)
479 & IWN_HW_REV_TYPE_MASK;
480 sc->subdevice_id = pci_get_subdevice(dev);
483 * 4965 versus 5000 and later have different methods.
484 * Let's set those up first.
486 if (sc->hw_type == IWN_HW_REV_TYPE_4965)
487 error = iwn4965_attach(sc, pci_get_device(dev));
489 error = iwn5000_attach(sc, pci_get_device(dev));
491 device_printf(dev, "could not attach device, error %d\n",
497 * Next, let's setup the various parameters of each NIC.
499 error = iwn_config_specific(sc, pci_get_device(dev));
501 device_printf(dev, "could not attach device, error %d\n",
506 if ((error = iwn_hw_prepare(sc)) != 0) {
507 device_printf(dev, "hardware not ready, error %d\n", error);
511 /* Allocate DMA memory for firmware transfers. */
512 if ((error = iwn_alloc_fwmem(sc)) != 0) {
514 "could not allocate memory for firmware, error %d\n",
519 /* Allocate "Keep Warm" page. */
520 if ((error = iwn_alloc_kw(sc)) != 0) {
522 "could not allocate keep warm page, error %d\n", error);
526 /* Allocate ICT table for 5000 Series. */
527 if (sc->hw_type != IWN_HW_REV_TYPE_4965 &&
528 (error = iwn_alloc_ict(sc)) != 0) {
529 device_printf(dev, "could not allocate ICT table, error %d\n",
534 /* Allocate TX scheduler "rings". */
535 if ((error = iwn_alloc_sched(sc)) != 0) {
537 "could not allocate TX scheduler rings, error %d\n", error);
541 /* Allocate TX rings (16 on 4965AGN, 20 on >=5000). */
542 for (i = 0; i < sc->ntxqs; i++) {
543 if ((error = iwn_alloc_tx_ring(sc, &sc->txq[i], i)) != 0) {
545 "could not allocate TX ring %d, error %d\n", i,
551 /* Allocate RX ring. */
552 if ((error = iwn_alloc_rx_ring(sc, &sc->rxq)) != 0) {
553 device_printf(dev, "could not allocate RX ring, error %d\n",
558 /* Clear pending interrupts. */
559 IWN_WRITE(sc, IWN_INT, 0xffffffff);
563 ic->ic_name = device_get_nameunit(dev);
564 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */
565 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */
567 /* Set device capabilities. */
569 IEEE80211_C_STA /* station mode supported */
570 | IEEE80211_C_MONITOR /* monitor mode supported */
572 | IEEE80211_C_BGSCAN /* background scanning */
574 | IEEE80211_C_TXPMGT /* tx power management */
575 | IEEE80211_C_SHSLOT /* short slot time supported */
577 | IEEE80211_C_SHPREAMBLE /* short preamble supported */
579 | IEEE80211_C_IBSS /* ibss/adhoc mode */
581 | IEEE80211_C_WME /* WME */
582 | IEEE80211_C_PMGT /* Station-side power mgmt */
585 /* Read MAC address, channels, etc from EEPROM. */
586 if ((error = iwn_read_eeprom(sc, ic->ic_macaddr)) != 0) {
587 device_printf(dev, "could not read EEPROM, error %d\n",
592 /* Count the number of available chains. */
594 ((sc->txchainmask >> 2) & 1) +
595 ((sc->txchainmask >> 1) & 1) +
596 ((sc->txchainmask >> 0) & 1);
598 ((sc->rxchainmask >> 2) & 1) +
599 ((sc->rxchainmask >> 1) & 1) +
600 ((sc->rxchainmask >> 0) & 1);
602 device_printf(dev, "MIMO %dT%dR, %.4s, address %6D\n",
603 sc->ntxchains, sc->nrxchains, sc->eeprom_domain,
604 ic->ic_macaddr, ":");
607 if (sc->sc_flags & IWN_FLAG_HAS_11N) {
608 ic->ic_rxstream = sc->nrxchains;
609 ic->ic_txstream = sc->ntxchains;
612 * Some of the 3 antenna devices (ie, the 4965) only supports
613 * 2x2 operation. So correct the number of streams if
614 * it's not a 3-stream device.
616 if (! iwn_is_3stream_device(sc)) {
617 if (ic->ic_rxstream > 2)
619 if (ic->ic_txstream > 2)
624 IEEE80211_HTCAP_SMPS_OFF /* SMPS mode disabled */
625 | IEEE80211_HTCAP_SHORTGI20 /* short GI in 20MHz */
626 | IEEE80211_HTCAP_CHWIDTH40 /* 40MHz channel width*/
627 | IEEE80211_HTCAP_SHORTGI40 /* short GI in 40MHz */
629 | IEEE80211_HTCAP_GREENFIELD
630 #if IWN_RBUF_SIZE == 8192
631 | IEEE80211_HTCAP_MAXAMSDU_7935 /* max A-MSDU length */
633 | IEEE80211_HTCAP_MAXAMSDU_3839 /* max A-MSDU length */
636 /* s/w capabilities */
637 | IEEE80211_HTC_HT /* HT operation */
638 | IEEE80211_HTC_AMPDU /* tx A-MPDU */
640 | IEEE80211_HTC_AMSDU /* tx A-MSDU */
645 ieee80211_ifattach(ic);
646 ic->ic_vap_create = iwn_vap_create;
647 ic->ic_ioctl = iwn_ioctl;
648 ic->ic_parent = iwn_parent;
649 ic->ic_vap_delete = iwn_vap_delete;
650 ic->ic_transmit = iwn_transmit;
651 ic->ic_raw_xmit = iwn_raw_xmit;
652 ic->ic_node_alloc = iwn_node_alloc;
653 sc->sc_ampdu_rx_start = ic->ic_ampdu_rx_start;
654 ic->ic_ampdu_rx_start = iwn_ampdu_rx_start;
655 sc->sc_ampdu_rx_stop = ic->ic_ampdu_rx_stop;
656 ic->ic_ampdu_rx_stop = iwn_ampdu_rx_stop;
657 sc->sc_addba_request = ic->ic_addba_request;
658 ic->ic_addba_request = iwn_addba_request;
659 sc->sc_addba_response = ic->ic_addba_response;
660 ic->ic_addba_response = iwn_addba_response;
661 sc->sc_addba_stop = ic->ic_addba_stop;
662 ic->ic_addba_stop = iwn_ampdu_tx_stop;
663 ic->ic_newassoc = iwn_newassoc;
664 ic->ic_wme.wme_update = iwn_updateedca;
665 ic->ic_update_mcast = iwn_update_mcast;
666 ic->ic_scan_start = iwn_scan_start;
667 ic->ic_scan_end = iwn_scan_end;
668 ic->ic_set_channel = iwn_set_channel;
669 ic->ic_scan_curchan = iwn_scan_curchan;
670 ic->ic_scan_mindwell = iwn_scan_mindwell;
671 ic->ic_getradiocaps = iwn_getradiocaps;
672 ic->ic_setregdomain = iwn_setregdomain;
674 iwn_radiotap_attach(sc);
676 callout_init_mtx(&sc->calib_to, &sc->sc_mtx, 0);
677 callout_init_mtx(&sc->scan_timeout, &sc->sc_mtx, 0);
678 callout_init_mtx(&sc->watchdog_to, &sc->sc_mtx, 0);
679 TASK_INIT(&sc->sc_rftoggle_task, 0, iwn_rftoggle_task, sc);
680 TASK_INIT(&sc->sc_panic_task, 0, iwn_panicked, sc);
681 TASK_INIT(&sc->sc_xmit_task, 0, iwn_xmit_task, sc);
683 mbufq_init(&sc->sc_xmit_queue, 1024);
685 sc->sc_tq = taskqueue_create("iwn_taskq", M_WAITOK,
686 taskqueue_thread_enqueue, &sc->sc_tq);
687 error = taskqueue_start_threads(&sc->sc_tq, 1, 0, "iwn_taskq");
689 device_printf(dev, "can't start threads, error %d\n", error);
693 iwn_sysctlattach(sc);
696 * Hook our interrupt after all initialization is complete.
698 error = bus_setup_intr(dev, sc->irq, INTR_TYPE_NET | INTR_MPSAFE,
699 NULL, iwn_intr, sc, &sc->sc_ih);
701 device_printf(dev, "can't establish interrupt, error %d\n",
707 device_printf(sc->sc_dev, "%s: rx_stats=%d, rx_stats_bt=%d\n",
709 sizeof(struct iwn_stats),
710 sizeof(struct iwn_stats_bt));
714 ieee80211_announce(ic);
715 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
717 /* Add debug ioctl right at the end */
718 sc->sc_cdev = make_dev(&iwn_cdevsw, device_get_unit(dev),
719 UID_ROOT, GID_WHEEL, 0600, "%s", device_get_nameunit(dev));
720 if (sc->sc_cdev == NULL) {
721 device_printf(dev, "failed to create debug character device\n");
723 sc->sc_cdev->si_drv1 = sc;
728 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end in error\n",__func__);
733 * Define specific configuration based on device id and subdevice id
734 * pid : PCI device id
737 iwn_config_specific(struct iwn_softc *sc, uint16_t pid)
746 sc->base_params = &iwn4965_base_params;
747 sc->limits = &iwn4965_sensitivity_limits;
748 sc->fwname = "iwn4965fw";
749 /* Override chains masks, ROM is known to be broken. */
750 sc->txchainmask = IWN_ANT_AB;
751 sc->rxchainmask = IWN_ANT_ABC;
752 /* Enable normal btcoex */
753 sc->sc_flags |= IWN_FLAG_BTCOEX;
758 switch(sc->subdevice_id) {
759 case IWN_SDID_1000_1:
760 case IWN_SDID_1000_2:
761 case IWN_SDID_1000_3:
762 case IWN_SDID_1000_4:
763 case IWN_SDID_1000_5:
764 case IWN_SDID_1000_6:
765 case IWN_SDID_1000_7:
766 case IWN_SDID_1000_8:
767 case IWN_SDID_1000_9:
768 case IWN_SDID_1000_10:
769 case IWN_SDID_1000_11:
770 case IWN_SDID_1000_12:
771 sc->limits = &iwn1000_sensitivity_limits;
772 sc->base_params = &iwn1000_base_params;
773 sc->fwname = "iwn1000fw";
776 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
777 "0x%04x rev %d not supported (subdevice)\n", pid,
778 sc->subdevice_id,sc->hw_type);
787 sc->fwname = "iwn6000fw";
788 sc->limits = &iwn6000_sensitivity_limits;
789 switch(sc->subdevice_id) {
790 case IWN_SDID_6x00_1:
791 case IWN_SDID_6x00_2:
792 case IWN_SDID_6x00_8:
794 sc->base_params = &iwn_6000_base_params;
796 case IWN_SDID_6x00_3:
797 case IWN_SDID_6x00_6:
798 case IWN_SDID_6x00_9:
800 case IWN_SDID_6x00_4:
801 case IWN_SDID_6x00_7:
802 case IWN_SDID_6x00_10:
804 case IWN_SDID_6x00_5:
806 sc->base_params = &iwn_6000i_base_params;
807 sc->sc_flags |= IWN_FLAG_INTERNAL_PA;
808 sc->txchainmask = IWN_ANT_BC;
809 sc->rxchainmask = IWN_ANT_BC;
812 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
813 "0x%04x rev %d not supported (subdevice)\n", pid,
814 sc->subdevice_id,sc->hw_type);
821 switch(sc->subdevice_id) {
822 case IWN_SDID_6x05_1:
823 case IWN_SDID_6x05_4:
824 case IWN_SDID_6x05_6:
826 case IWN_SDID_6x05_2:
827 case IWN_SDID_6x05_5:
828 case IWN_SDID_6x05_7:
830 case IWN_SDID_6x05_3:
832 case IWN_SDID_6x05_8:
833 case IWN_SDID_6x05_9:
834 //iwl6005_2agn_sff_cfg
835 case IWN_SDID_6x05_10:
837 case IWN_SDID_6x05_11:
838 //iwl6005_2agn_mow1_cfg
839 case IWN_SDID_6x05_12:
840 //iwl6005_2agn_mow2_cfg
841 sc->fwname = "iwn6000g2afw";
842 sc->limits = &iwn6000_sensitivity_limits;
843 sc->base_params = &iwn_6000g2_base_params;
846 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
847 "0x%04x rev %d not supported (subdevice)\n", pid,
848 sc->subdevice_id,sc->hw_type);
855 switch(sc->subdevice_id) {
856 case IWN_SDID_6035_1:
857 case IWN_SDID_6035_2:
858 case IWN_SDID_6035_3:
859 case IWN_SDID_6035_4:
860 sc->fwname = "iwn6000g2bfw";
861 sc->limits = &iwn6235_sensitivity_limits;
862 sc->base_params = &iwn_6235_base_params;
865 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
866 "0x%04x rev %d not supported (subdevice)\n", pid,
867 sc->subdevice_id,sc->hw_type);
871 /* 6x50 WiFi/WiMax Series */
874 switch(sc->subdevice_id) {
875 case IWN_SDID_6050_1:
876 case IWN_SDID_6050_3:
877 case IWN_SDID_6050_5:
879 case IWN_SDID_6050_2:
880 case IWN_SDID_6050_4:
881 case IWN_SDID_6050_6:
883 sc->fwname = "iwn6050fw";
884 sc->txchainmask = IWN_ANT_AB;
885 sc->rxchainmask = IWN_ANT_AB;
886 sc->limits = &iwn6000_sensitivity_limits;
887 sc->base_params = &iwn_6050_base_params;
890 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
891 "0x%04x rev %d not supported (subdevice)\n", pid,
892 sc->subdevice_id,sc->hw_type);
896 /* 6150 WiFi/WiMax Series */
899 switch(sc->subdevice_id) {
900 case IWN_SDID_6150_1:
901 case IWN_SDID_6150_3:
902 case IWN_SDID_6150_5:
904 case IWN_SDID_6150_2:
905 case IWN_SDID_6150_4:
906 case IWN_SDID_6150_6:
908 sc->fwname = "iwn6050fw";
909 sc->limits = &iwn6000_sensitivity_limits;
910 sc->base_params = &iwn_6150_base_params;
913 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
914 "0x%04x rev %d not supported (subdevice)\n", pid,
915 sc->subdevice_id,sc->hw_type);
919 /* 6030 Series and 1030 Series */
924 switch(sc->subdevice_id) {
925 case IWN_SDID_x030_1:
926 case IWN_SDID_x030_3:
927 case IWN_SDID_x030_5:
929 case IWN_SDID_x030_2:
930 case IWN_SDID_x030_4:
931 case IWN_SDID_x030_6:
933 case IWN_SDID_x030_7:
934 case IWN_SDID_x030_10:
935 case IWN_SDID_x030_14:
937 case IWN_SDID_x030_8:
938 case IWN_SDID_x030_11:
939 case IWN_SDID_x030_15:
941 case IWN_SDID_x030_9:
942 case IWN_SDID_x030_12:
943 case IWN_SDID_x030_16:
945 case IWN_SDID_x030_13:
947 sc->fwname = "iwn6000g2bfw";
948 sc->limits = &iwn6000_sensitivity_limits;
949 sc->base_params = &iwn_6000g2b_base_params;
952 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
953 "0x%04x rev %d not supported (subdevice)\n", pid,
954 sc->subdevice_id,sc->hw_type);
958 /* 130 Series WiFi */
959 /* XXX: This series will need adjustment for rate.
960 * see rx_with_siso_diversity in linux kernel
964 switch(sc->subdevice_id) {
973 sc->fwname = "iwn6000g2bfw";
974 sc->limits = &iwn6000_sensitivity_limits;
975 sc->base_params = &iwn_6000g2b_base_params;
978 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
979 "0x%04x rev %d not supported (subdevice)\n", pid,
980 sc->subdevice_id,sc->hw_type);
984 /* 100 Series WiFi */
987 switch(sc->subdevice_id) {
994 sc->limits = &iwn1000_sensitivity_limits;
995 sc->base_params = &iwn1000_base_params;
996 sc->fwname = "iwn100fw";
999 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
1000 "0x%04x rev %d not supported (subdevice)\n", pid,
1001 sc->subdevice_id,sc->hw_type);
1007 /* XXX: This series will need adjustment for rate.
1008 * see rx_with_siso_diversity in linux kernel
1012 switch(sc->subdevice_id) {
1013 case IWN_SDID_105_1:
1014 case IWN_SDID_105_2:
1015 case IWN_SDID_105_3:
1017 case IWN_SDID_105_4:
1019 sc->limits = &iwn2030_sensitivity_limits;
1020 sc->base_params = &iwn2000_base_params;
1021 sc->fwname = "iwn105fw";
1024 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
1025 "0x%04x rev %d not supported (subdevice)\n", pid,
1026 sc->subdevice_id,sc->hw_type);
1032 /* XXX: This series will need adjustment for rate.
1033 * see rx_with_siso_diversity in linux kernel
1037 switch(sc->subdevice_id) {
1038 case IWN_SDID_135_1:
1039 case IWN_SDID_135_2:
1040 case IWN_SDID_135_3:
1041 sc->limits = &iwn2030_sensitivity_limits;
1042 sc->base_params = &iwn2030_base_params;
1043 sc->fwname = "iwn135fw";
1046 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
1047 "0x%04x rev %d not supported (subdevice)\n", pid,
1048 sc->subdevice_id,sc->hw_type);
1054 case IWN_DID_2x00_1:
1055 case IWN_DID_2x00_2:
1056 switch(sc->subdevice_id) {
1057 case IWN_SDID_2x00_1:
1058 case IWN_SDID_2x00_2:
1059 case IWN_SDID_2x00_3:
1061 case IWN_SDID_2x00_4:
1062 //iwl2000_2bgn_d_cfg
1063 sc->limits = &iwn2030_sensitivity_limits;
1064 sc->base_params = &iwn2000_base_params;
1065 sc->fwname = "iwn2000fw";
1068 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
1069 "0x%04x rev %d not supported (subdevice) \n",
1070 pid, sc->subdevice_id, sc->hw_type);
1075 case IWN_DID_2x30_1:
1076 case IWN_DID_2x30_2:
1077 switch(sc->subdevice_id) {
1078 case IWN_SDID_2x30_1:
1079 case IWN_SDID_2x30_3:
1080 case IWN_SDID_2x30_5:
1082 case IWN_SDID_2x30_2:
1083 case IWN_SDID_2x30_4:
1084 case IWN_SDID_2x30_6:
1086 sc->limits = &iwn2030_sensitivity_limits;
1087 sc->base_params = &iwn2030_base_params;
1088 sc->fwname = "iwn2030fw";
1091 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
1092 "0x%04x rev %d not supported (subdevice)\n", pid,
1093 sc->subdevice_id,sc->hw_type);
1098 case IWN_DID_5x00_1:
1099 case IWN_DID_5x00_2:
1100 case IWN_DID_5x00_3:
1101 case IWN_DID_5x00_4:
1102 sc->limits = &iwn5000_sensitivity_limits;
1103 sc->base_params = &iwn5000_base_params;
1104 sc->fwname = "iwn5000fw";
1105 switch(sc->subdevice_id) {
1106 case IWN_SDID_5x00_1:
1107 case IWN_SDID_5x00_2:
1108 case IWN_SDID_5x00_3:
1109 case IWN_SDID_5x00_4:
1110 case IWN_SDID_5x00_9:
1111 case IWN_SDID_5x00_10:
1112 case IWN_SDID_5x00_11:
1113 case IWN_SDID_5x00_12:
1114 case IWN_SDID_5x00_17:
1115 case IWN_SDID_5x00_18:
1116 case IWN_SDID_5x00_19:
1117 case IWN_SDID_5x00_20:
1119 sc->txchainmask = IWN_ANT_B;
1120 sc->rxchainmask = IWN_ANT_AB;
1122 case IWN_SDID_5x00_5:
1123 case IWN_SDID_5x00_6:
1124 case IWN_SDID_5x00_13:
1125 case IWN_SDID_5x00_14:
1126 case IWN_SDID_5x00_21:
1127 case IWN_SDID_5x00_22:
1129 sc->txchainmask = IWN_ANT_B;
1130 sc->rxchainmask = IWN_ANT_AB;
1132 case IWN_SDID_5x00_7:
1133 case IWN_SDID_5x00_8:
1134 case IWN_SDID_5x00_15:
1135 case IWN_SDID_5x00_16:
1136 case IWN_SDID_5x00_23:
1137 case IWN_SDID_5x00_24:
1139 sc->txchainmask = IWN_ANT_B;
1140 sc->rxchainmask = IWN_ANT_AB;
1142 case IWN_SDID_5x00_25:
1143 case IWN_SDID_5x00_26:
1144 case IWN_SDID_5x00_27:
1145 case IWN_SDID_5x00_28:
1146 case IWN_SDID_5x00_29:
1147 case IWN_SDID_5x00_30:
1148 case IWN_SDID_5x00_31:
1149 case IWN_SDID_5x00_32:
1150 case IWN_SDID_5x00_33:
1151 case IWN_SDID_5x00_34:
1152 case IWN_SDID_5x00_35:
1153 case IWN_SDID_5x00_36:
1155 sc->txchainmask = IWN_ANT_ABC;
1156 sc->rxchainmask = IWN_ANT_ABC;
1159 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
1160 "0x%04x rev %d not supported (subdevice)\n", pid,
1161 sc->subdevice_id,sc->hw_type);
1166 case IWN_DID_5x50_1:
1167 case IWN_DID_5x50_2:
1168 case IWN_DID_5x50_3:
1169 case IWN_DID_5x50_4:
1170 sc->limits = &iwn5000_sensitivity_limits;
1171 sc->base_params = &iwn5000_base_params;
1172 sc->fwname = "iwn5000fw";
1173 switch(sc->subdevice_id) {
1174 case IWN_SDID_5x50_1:
1175 case IWN_SDID_5x50_2:
1176 case IWN_SDID_5x50_3:
1178 sc->limits = &iwn5000_sensitivity_limits;
1179 sc->base_params = &iwn5000_base_params;
1180 sc->fwname = "iwn5000fw";
1182 case IWN_SDID_5x50_4:
1183 case IWN_SDID_5x50_5:
1184 case IWN_SDID_5x50_8:
1185 case IWN_SDID_5x50_9:
1186 case IWN_SDID_5x50_10:
1187 case IWN_SDID_5x50_11:
1189 case IWN_SDID_5x50_6:
1190 case IWN_SDID_5x50_7:
1191 case IWN_SDID_5x50_12:
1192 case IWN_SDID_5x50_13:
1194 sc->limits = &iwn5000_sensitivity_limits;
1195 sc->fwname = "iwn5150fw";
1196 sc->base_params = &iwn_5x50_base_params;
1199 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
1200 "0x%04x rev %d not supported (subdevice)\n", pid,
1201 sc->subdevice_id,sc->hw_type);
1206 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id : 0x%04x"
1207 "rev 0x%08x not supported (device)\n", pid, sc->subdevice_id,
1215 iwn4965_attach(struct iwn_softc *sc, uint16_t pid)
1217 struct iwn_ops *ops = &sc->ops;
1219 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
1220 ops->load_firmware = iwn4965_load_firmware;
1221 ops->read_eeprom = iwn4965_read_eeprom;
1222 ops->post_alive = iwn4965_post_alive;
1223 ops->nic_config = iwn4965_nic_config;
1224 ops->update_sched = iwn4965_update_sched;
1225 ops->get_temperature = iwn4965_get_temperature;
1226 ops->get_rssi = iwn4965_get_rssi;
1227 ops->set_txpower = iwn4965_set_txpower;
1228 ops->init_gains = iwn4965_init_gains;
1229 ops->set_gains = iwn4965_set_gains;
1230 ops->add_node = iwn4965_add_node;
1231 ops->tx_done = iwn4965_tx_done;
1232 ops->ampdu_tx_start = iwn4965_ampdu_tx_start;
1233 ops->ampdu_tx_stop = iwn4965_ampdu_tx_stop;
1234 sc->ntxqs = IWN4965_NTXQUEUES;
1235 sc->firstaggqueue = IWN4965_FIRSTAGGQUEUE;
1236 sc->ndmachnls = IWN4965_NDMACHNLS;
1237 sc->broadcast_id = IWN4965_ID_BROADCAST;
1238 sc->rxonsz = IWN4965_RXONSZ;
1239 sc->schedsz = IWN4965_SCHEDSZ;
1240 sc->fw_text_maxsz = IWN4965_FW_TEXT_MAXSZ;
1241 sc->fw_data_maxsz = IWN4965_FW_DATA_MAXSZ;
1242 sc->fwsz = IWN4965_FWSZ;
1243 sc->sched_txfact_addr = IWN4965_SCHED_TXFACT;
1244 sc->limits = &iwn4965_sensitivity_limits;
1245 sc->fwname = "iwn4965fw";
1246 /* Override chains masks, ROM is known to be broken. */
1247 sc->txchainmask = IWN_ANT_AB;
1248 sc->rxchainmask = IWN_ANT_ABC;
1249 /* Enable normal btcoex */
1250 sc->sc_flags |= IWN_FLAG_BTCOEX;
1252 DPRINTF(sc, IWN_DEBUG_TRACE, "%s: end\n",__func__);
1258 iwn5000_attach(struct iwn_softc *sc, uint16_t pid)
1260 struct iwn_ops *ops = &sc->ops;
1262 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
1264 ops->load_firmware = iwn5000_load_firmware;
1265 ops->read_eeprom = iwn5000_read_eeprom;
1266 ops->post_alive = iwn5000_post_alive;
1267 ops->nic_config = iwn5000_nic_config;
1268 ops->update_sched = iwn5000_update_sched;
1269 ops->get_temperature = iwn5000_get_temperature;
1270 ops->get_rssi = iwn5000_get_rssi;
1271 ops->set_txpower = iwn5000_set_txpower;
1272 ops->init_gains = iwn5000_init_gains;
1273 ops->set_gains = iwn5000_set_gains;
1274 ops->add_node = iwn5000_add_node;
1275 ops->tx_done = iwn5000_tx_done;
1276 ops->ampdu_tx_start = iwn5000_ampdu_tx_start;
1277 ops->ampdu_tx_stop = iwn5000_ampdu_tx_stop;
1278 sc->ntxqs = IWN5000_NTXQUEUES;
1279 sc->firstaggqueue = IWN5000_FIRSTAGGQUEUE;
1280 sc->ndmachnls = IWN5000_NDMACHNLS;
1281 sc->broadcast_id = IWN5000_ID_BROADCAST;
1282 sc->rxonsz = IWN5000_RXONSZ;
1283 sc->schedsz = IWN5000_SCHEDSZ;
1284 sc->fw_text_maxsz = IWN5000_FW_TEXT_MAXSZ;
1285 sc->fw_data_maxsz = IWN5000_FW_DATA_MAXSZ;
1286 sc->fwsz = IWN5000_FWSZ;
1287 sc->sched_txfact_addr = IWN5000_SCHED_TXFACT;
1288 sc->reset_noise_gain = IWN5000_PHY_CALIB_RESET_NOISE_GAIN;
1289 sc->noise_gain = IWN5000_PHY_CALIB_NOISE_GAIN;
1295 * Attach the interface to 802.11 radiotap.
1298 iwn_radiotap_attach(struct iwn_softc *sc)
1301 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
1302 ieee80211_radiotap_attach(&sc->sc_ic,
1303 &sc->sc_txtap.wt_ihdr, sizeof(sc->sc_txtap),
1304 IWN_TX_RADIOTAP_PRESENT,
1305 &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap),
1306 IWN_RX_RADIOTAP_PRESENT);
1307 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
1311 iwn_sysctlattach(struct iwn_softc *sc)
1314 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->sc_dev);
1315 struct sysctl_oid *tree = device_get_sysctl_tree(sc->sc_dev);
1317 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
1318 "debug", CTLFLAG_RW, &sc->sc_debug, sc->sc_debug,
1319 "control debugging printfs");
1323 static struct ieee80211vap *
1324 iwn_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit,
1325 enum ieee80211_opmode opmode, int flags,
1326 const uint8_t bssid[IEEE80211_ADDR_LEN],
1327 const uint8_t mac[IEEE80211_ADDR_LEN])
1329 struct iwn_softc *sc = ic->ic_softc;
1330 struct iwn_vap *ivp;
1331 struct ieee80211vap *vap;
1333 if (!TAILQ_EMPTY(&ic->ic_vaps)) /* only one at a time */
1336 ivp = malloc(sizeof(struct iwn_vap), M_80211_VAP, M_WAITOK | M_ZERO);
1338 ieee80211_vap_setup(ic, vap, name, unit, opmode, flags, bssid);
1339 ivp->ctx = IWN_RXON_BSS_CTX;
1340 vap->iv_bmissthreshold = 10; /* override default */
1341 /* Override with driver methods. */
1342 ivp->iv_newstate = vap->iv_newstate;
1343 vap->iv_newstate = iwn_newstate;
1344 sc->ivap[IWN_RXON_BSS_CTX] = vap;
1346 ieee80211_ratectl_init(vap);
1347 /* Complete setup. */
1348 ieee80211_vap_attach(vap, iwn_media_change, ieee80211_media_status,
1350 ic->ic_opmode = opmode;
1355 iwn_vap_delete(struct ieee80211vap *vap)
1357 struct iwn_vap *ivp = IWN_VAP(vap);
1359 ieee80211_ratectl_deinit(vap);
1360 ieee80211_vap_detach(vap);
1361 free(ivp, M_80211_VAP);
1365 iwn_xmit_queue_drain(struct iwn_softc *sc)
1368 struct ieee80211_node *ni;
1370 IWN_LOCK_ASSERT(sc);
1371 while ((m = mbufq_dequeue(&sc->sc_xmit_queue)) != NULL) {
1372 ni = (struct ieee80211_node *)m->m_pkthdr.rcvif;
1373 ieee80211_free_node(ni);
1379 iwn_xmit_queue_enqueue(struct iwn_softc *sc, struct mbuf *m)
1382 IWN_LOCK_ASSERT(sc);
1383 return (mbufq_enqueue(&sc->sc_xmit_queue, m));
1387 iwn_detach(device_t dev)
1389 struct iwn_softc *sc = device_get_softc(dev);
1392 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
1394 if (sc->sc_ic.ic_softc != NULL) {
1395 /* Free the mbuf queue and node references */
1397 iwn_xmit_queue_drain(sc);
1402 taskqueue_drain_all(sc->sc_tq);
1403 taskqueue_free(sc->sc_tq);
1405 callout_drain(&sc->watchdog_to);
1406 callout_drain(&sc->scan_timeout);
1407 callout_drain(&sc->calib_to);
1408 ieee80211_ifdetach(&sc->sc_ic);
1411 /* Uninstall interrupt handler. */
1412 if (sc->irq != NULL) {
1413 bus_teardown_intr(dev, sc->irq, sc->sc_ih);
1414 bus_release_resource(dev, SYS_RES_IRQ, rman_get_rid(sc->irq),
1416 pci_release_msi(dev);
1419 /* Free DMA resources. */
1420 iwn_free_rx_ring(sc, &sc->rxq);
1421 for (qid = 0; qid < sc->ntxqs; qid++)
1422 iwn_free_tx_ring(sc, &sc->txq[qid]);
1425 if (sc->ict != NULL)
1429 if (sc->mem != NULL)
1430 bus_release_resource(dev, SYS_RES_MEMORY,
1431 rman_get_rid(sc->mem), sc->mem);
1434 destroy_dev(sc->sc_cdev);
1438 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n", __func__);
1439 IWN_LOCK_DESTROY(sc);
1444 iwn_shutdown(device_t dev)
1446 struct iwn_softc *sc = device_get_softc(dev);
1453 iwn_suspend(device_t dev)
1455 struct iwn_softc *sc = device_get_softc(dev);
1457 ieee80211_suspend_all(&sc->sc_ic);
1462 iwn_resume(device_t dev)
1464 struct iwn_softc *sc = device_get_softc(dev);
1466 /* Clear device-specific "PCI retry timeout" register (41h). */
1467 pci_write_config(dev, 0x41, 0, 1);
1469 ieee80211_resume_all(&sc->sc_ic);
1474 iwn_nic_lock(struct iwn_softc *sc)
1478 /* Request exclusive access to NIC. */
1479 IWN_SETBITS(sc, IWN_GP_CNTRL, IWN_GP_CNTRL_MAC_ACCESS_REQ);
1481 /* Spin until we actually get the lock. */
1482 for (ntries = 0; ntries < 1000; ntries++) {
1483 if ((IWN_READ(sc, IWN_GP_CNTRL) &
1484 (IWN_GP_CNTRL_MAC_ACCESS_ENA | IWN_GP_CNTRL_SLEEP)) ==
1485 IWN_GP_CNTRL_MAC_ACCESS_ENA)
1492 static __inline void
1493 iwn_nic_unlock(struct iwn_softc *sc)
1495 IWN_CLRBITS(sc, IWN_GP_CNTRL, IWN_GP_CNTRL_MAC_ACCESS_REQ);
1498 static __inline uint32_t
1499 iwn_prph_read(struct iwn_softc *sc, uint32_t addr)
1501 IWN_WRITE(sc, IWN_PRPH_RADDR, IWN_PRPH_DWORD | addr);
1502 IWN_BARRIER_READ_WRITE(sc);
1503 return IWN_READ(sc, IWN_PRPH_RDATA);
1506 static __inline void
1507 iwn_prph_write(struct iwn_softc *sc, uint32_t addr, uint32_t data)
1509 IWN_WRITE(sc, IWN_PRPH_WADDR, IWN_PRPH_DWORD | addr);
1510 IWN_BARRIER_WRITE(sc);
1511 IWN_WRITE(sc, IWN_PRPH_WDATA, data);
1514 static __inline void
1515 iwn_prph_setbits(struct iwn_softc *sc, uint32_t addr, uint32_t mask)
1517 iwn_prph_write(sc, addr, iwn_prph_read(sc, addr) | mask);
1520 static __inline void
1521 iwn_prph_clrbits(struct iwn_softc *sc, uint32_t addr, uint32_t mask)
1523 iwn_prph_write(sc, addr, iwn_prph_read(sc, addr) & ~mask);
1526 static __inline void
1527 iwn_prph_write_region_4(struct iwn_softc *sc, uint32_t addr,
1528 const uint32_t *data, int count)
1530 for (; count > 0; count--, data++, addr += 4)
1531 iwn_prph_write(sc, addr, *data);
1534 static __inline uint32_t
1535 iwn_mem_read(struct iwn_softc *sc, uint32_t addr)
1537 IWN_WRITE(sc, IWN_MEM_RADDR, addr);
1538 IWN_BARRIER_READ_WRITE(sc);
1539 return IWN_READ(sc, IWN_MEM_RDATA);
1542 static __inline void
1543 iwn_mem_write(struct iwn_softc *sc, uint32_t addr, uint32_t data)
1545 IWN_WRITE(sc, IWN_MEM_WADDR, addr);
1546 IWN_BARRIER_WRITE(sc);
1547 IWN_WRITE(sc, IWN_MEM_WDATA, data);
1550 static __inline void
1551 iwn_mem_write_2(struct iwn_softc *sc, uint32_t addr, uint16_t data)
1555 tmp = iwn_mem_read(sc, addr & ~3);
1557 tmp = (tmp & 0x0000ffff) | data << 16;
1559 tmp = (tmp & 0xffff0000) | data;
1560 iwn_mem_write(sc, addr & ~3, tmp);
1563 static __inline void
1564 iwn_mem_read_region_4(struct iwn_softc *sc, uint32_t addr, uint32_t *data,
1567 for (; count > 0; count--, addr += 4)
1568 *data++ = iwn_mem_read(sc, addr);
1571 static __inline void
1572 iwn_mem_set_region_4(struct iwn_softc *sc, uint32_t addr, uint32_t val,
1575 for (; count > 0; count--, addr += 4)
1576 iwn_mem_write(sc, addr, val);
1580 iwn_eeprom_lock(struct iwn_softc *sc)
1584 for (i = 0; i < 100; i++) {
1585 /* Request exclusive access to EEPROM. */
1586 IWN_SETBITS(sc, IWN_HW_IF_CONFIG,
1587 IWN_HW_IF_CONFIG_EEPROM_LOCKED);
1589 /* Spin until we actually get the lock. */
1590 for (ntries = 0; ntries < 100; ntries++) {
1591 if (IWN_READ(sc, IWN_HW_IF_CONFIG) &
1592 IWN_HW_IF_CONFIG_EEPROM_LOCKED)
1597 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end timeout\n", __func__);
1601 static __inline void
1602 iwn_eeprom_unlock(struct iwn_softc *sc)
1604 IWN_CLRBITS(sc, IWN_HW_IF_CONFIG, IWN_HW_IF_CONFIG_EEPROM_LOCKED);
1608 * Initialize access by host to One Time Programmable ROM.
1609 * NB: This kind of ROM can be found on 1000 or 6000 Series only.
1612 iwn_init_otprom(struct iwn_softc *sc)
1614 uint16_t prev, base, next;
1617 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
1619 /* Wait for clock stabilization before accessing prph. */
1620 if ((error = iwn_clock_wait(sc)) != 0)
1623 if ((error = iwn_nic_lock(sc)) != 0)
1625 iwn_prph_setbits(sc, IWN_APMG_PS, IWN_APMG_PS_RESET_REQ);
1627 iwn_prph_clrbits(sc, IWN_APMG_PS, IWN_APMG_PS_RESET_REQ);
1630 /* Set auto clock gate disable bit for HW with OTP shadow RAM. */
1631 if (sc->base_params->shadow_ram_support) {
1632 IWN_SETBITS(sc, IWN_DBG_LINK_PWR_MGMT,
1633 IWN_RESET_LINK_PWR_MGMT_DIS);
1635 IWN_CLRBITS(sc, IWN_EEPROM_GP, IWN_EEPROM_GP_IF_OWNER);
1636 /* Clear ECC status. */
1637 IWN_SETBITS(sc, IWN_OTP_GP,
1638 IWN_OTP_GP_ECC_CORR_STTS | IWN_OTP_GP_ECC_UNCORR_STTS);
1641 * Find the block before last block (contains the EEPROM image)
1642 * for HW without OTP shadow RAM.
1644 if (! sc->base_params->shadow_ram_support) {
1645 /* Switch to absolute addressing mode. */
1646 IWN_CLRBITS(sc, IWN_OTP_GP, IWN_OTP_GP_RELATIVE_ACCESS);
1648 for (count = 0; count < sc->base_params->max_ll_items;
1650 error = iwn_read_prom_data(sc, base, &next, 2);
1653 if (next == 0) /* End of linked-list. */
1656 base = le16toh(next);
1658 if (count == 0 || count == sc->base_params->max_ll_items)
1660 /* Skip "next" word. */
1661 sc->prom_base = prev + 1;
1664 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
1670 iwn_read_prom_data(struct iwn_softc *sc, uint32_t addr, void *data, int count)
1672 uint8_t *out = data;
1676 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
1678 addr += sc->prom_base;
1679 for (; count > 0; count -= 2, addr++) {
1680 IWN_WRITE(sc, IWN_EEPROM, addr << 2);
1681 for (ntries = 0; ntries < 10; ntries++) {
1682 val = IWN_READ(sc, IWN_EEPROM);
1683 if (val & IWN_EEPROM_READ_VALID)
1688 device_printf(sc->sc_dev,
1689 "timeout reading ROM at 0x%x\n", addr);
1692 if (sc->sc_flags & IWN_FLAG_HAS_OTPROM) {
1693 /* OTPROM, check for ECC errors. */
1694 tmp = IWN_READ(sc, IWN_OTP_GP);
1695 if (tmp & IWN_OTP_GP_ECC_UNCORR_STTS) {
1696 device_printf(sc->sc_dev,
1697 "OTPROM ECC error at 0x%x\n", addr);
1700 if (tmp & IWN_OTP_GP_ECC_CORR_STTS) {
1701 /* Correctable ECC error, clear bit. */
1702 IWN_SETBITS(sc, IWN_OTP_GP,
1703 IWN_OTP_GP_ECC_CORR_STTS);
1711 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
1717 iwn_dma_map_addr(void *arg, bus_dma_segment_t *segs, int nsegs, int error)
1721 KASSERT(nsegs == 1, ("too many DMA segments, %d should be 1", nsegs));
1722 *(bus_addr_t *)arg = segs[0].ds_addr;
1726 iwn_dma_contig_alloc(struct iwn_softc *sc, struct iwn_dma_info *dma,
1727 void **kvap, bus_size_t size, bus_size_t alignment)
1734 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), alignment,
1735 0, BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, size,
1736 1, size, 0, NULL, NULL, &dma->tag);
1740 error = bus_dmamem_alloc(dma->tag, (void **)&dma->vaddr,
1741 BUS_DMA_NOWAIT | BUS_DMA_ZERO | BUS_DMA_COHERENT, &dma->map);
1745 error = bus_dmamap_load(dma->tag, dma->map, dma->vaddr, size,
1746 iwn_dma_map_addr, &dma->paddr, BUS_DMA_NOWAIT);
1750 bus_dmamap_sync(dma->tag, dma->map, BUS_DMASYNC_PREWRITE);
1757 fail: iwn_dma_contig_free(dma);
1762 iwn_dma_contig_free(struct iwn_dma_info *dma)
1764 if (dma->vaddr != NULL) {
1765 bus_dmamap_sync(dma->tag, dma->map,
1766 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
1767 bus_dmamap_unload(dma->tag, dma->map);
1768 bus_dmamem_free(dma->tag, dma->vaddr, dma->map);
1771 if (dma->tag != NULL) {
1772 bus_dma_tag_destroy(dma->tag);
1778 iwn_alloc_sched(struct iwn_softc *sc)
1780 /* TX scheduler rings must be aligned on a 1KB boundary. */
1781 return iwn_dma_contig_alloc(sc, &sc->sched_dma, (void **)&sc->sched,
1786 iwn_free_sched(struct iwn_softc *sc)
1788 iwn_dma_contig_free(&sc->sched_dma);
1792 iwn_alloc_kw(struct iwn_softc *sc)
1794 /* "Keep Warm" page must be aligned on a 4KB boundary. */
1795 return iwn_dma_contig_alloc(sc, &sc->kw_dma, NULL, 4096, 4096);
1799 iwn_free_kw(struct iwn_softc *sc)
1801 iwn_dma_contig_free(&sc->kw_dma);
1805 iwn_alloc_ict(struct iwn_softc *sc)
1807 /* ICT table must be aligned on a 4KB boundary. */
1808 return iwn_dma_contig_alloc(sc, &sc->ict_dma, (void **)&sc->ict,
1809 IWN_ICT_SIZE, 4096);
1813 iwn_free_ict(struct iwn_softc *sc)
1815 iwn_dma_contig_free(&sc->ict_dma);
1819 iwn_alloc_fwmem(struct iwn_softc *sc)
1821 /* Must be aligned on a 16-byte boundary. */
1822 return iwn_dma_contig_alloc(sc, &sc->fw_dma, NULL, sc->fwsz, 16);
1826 iwn_free_fwmem(struct iwn_softc *sc)
1828 iwn_dma_contig_free(&sc->fw_dma);
1832 iwn_alloc_rx_ring(struct iwn_softc *sc, struct iwn_rx_ring *ring)
1839 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
1841 /* Allocate RX descriptors (256-byte aligned). */
1842 size = IWN_RX_RING_COUNT * sizeof (uint32_t);
1843 error = iwn_dma_contig_alloc(sc, &ring->desc_dma, (void **)&ring->desc,
1846 device_printf(sc->sc_dev,
1847 "%s: could not allocate RX ring DMA memory, error %d\n",
1852 /* Allocate RX status area (16-byte aligned). */
1853 error = iwn_dma_contig_alloc(sc, &ring->stat_dma, (void **)&ring->stat,
1854 sizeof (struct iwn_rx_status), 16);
1856 device_printf(sc->sc_dev,
1857 "%s: could not allocate RX status DMA memory, error %d\n",
1862 /* Create RX buffer DMA tag. */
1863 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 1, 0,
1864 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL,
1865 IWN_RBUF_SIZE, 1, IWN_RBUF_SIZE, 0, NULL, NULL, &ring->data_dmat);
1867 device_printf(sc->sc_dev,
1868 "%s: could not create RX buf DMA tag, error %d\n",
1874 * Allocate and map RX buffers.
1876 for (i = 0; i < IWN_RX_RING_COUNT; i++) {
1877 struct iwn_rx_data *data = &ring->data[i];
1880 error = bus_dmamap_create(ring->data_dmat, 0, &data->map);
1882 device_printf(sc->sc_dev,
1883 "%s: could not create RX buf DMA map, error %d\n",
1888 data->m = m_getjcl(M_NOWAIT, MT_DATA, M_PKTHDR,
1890 if (data->m == NULL) {
1891 device_printf(sc->sc_dev,
1892 "%s: could not allocate RX mbuf\n", __func__);
1897 error = bus_dmamap_load(ring->data_dmat, data->map,
1898 mtod(data->m, void *), IWN_RBUF_SIZE, iwn_dma_map_addr,
1899 &paddr, BUS_DMA_NOWAIT);
1900 if (error != 0 && error != EFBIG) {
1901 device_printf(sc->sc_dev,
1902 "%s: can't map mbuf, error %d\n", __func__,
1907 bus_dmamap_sync(ring->data_dmat, data->map,
1908 BUS_DMASYNC_PREREAD);
1910 /* Set physical address of RX buffer (256-byte aligned). */
1911 ring->desc[i] = htole32(paddr >> 8);
1914 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
1915 BUS_DMASYNC_PREWRITE);
1917 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
1921 fail: iwn_free_rx_ring(sc, ring);
1923 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end in error\n",__func__);
1929 iwn_reset_rx_ring(struct iwn_softc *sc, struct iwn_rx_ring *ring)
1933 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
1935 if (iwn_nic_lock(sc) == 0) {
1936 IWN_WRITE(sc, IWN_FH_RX_CONFIG, 0);
1937 for (ntries = 0; ntries < 1000; ntries++) {
1938 if (IWN_READ(sc, IWN_FH_RX_STATUS) &
1939 IWN_FH_RX_STATUS_IDLE)
1946 sc->last_rx_valid = 0;
1950 iwn_free_rx_ring(struct iwn_softc *sc, struct iwn_rx_ring *ring)
1954 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s \n", __func__);
1956 iwn_dma_contig_free(&ring->desc_dma);
1957 iwn_dma_contig_free(&ring->stat_dma);
1959 for (i = 0; i < IWN_RX_RING_COUNT; i++) {
1960 struct iwn_rx_data *data = &ring->data[i];
1962 if (data->m != NULL) {
1963 bus_dmamap_sync(ring->data_dmat, data->map,
1964 BUS_DMASYNC_POSTREAD);
1965 bus_dmamap_unload(ring->data_dmat, data->map);
1969 if (data->map != NULL)
1970 bus_dmamap_destroy(ring->data_dmat, data->map);
1972 if (ring->data_dmat != NULL) {
1973 bus_dma_tag_destroy(ring->data_dmat);
1974 ring->data_dmat = NULL;
1979 iwn_alloc_tx_ring(struct iwn_softc *sc, struct iwn_tx_ring *ring, int qid)
1989 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
1991 /* Allocate TX descriptors (256-byte aligned). */
1992 size = IWN_TX_RING_COUNT * sizeof (struct iwn_tx_desc);
1993 error = iwn_dma_contig_alloc(sc, &ring->desc_dma, (void **)&ring->desc,
1996 device_printf(sc->sc_dev,
1997 "%s: could not allocate TX ring DMA memory, error %d\n",
2002 size = IWN_TX_RING_COUNT * sizeof (struct iwn_tx_cmd);
2003 error = iwn_dma_contig_alloc(sc, &ring->cmd_dma, (void **)&ring->cmd,
2006 device_printf(sc->sc_dev,
2007 "%s: could not allocate TX cmd DMA memory, error %d\n",
2012 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 1, 0,
2013 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES,
2014 IWN_MAX_SCATTER - 1, MCLBYTES, 0, NULL, NULL, &ring->data_dmat);
2016 device_printf(sc->sc_dev,
2017 "%s: could not create TX buf DMA tag, error %d\n",
2022 paddr = ring->cmd_dma.paddr;
2023 for (i = 0; i < IWN_TX_RING_COUNT; i++) {
2024 struct iwn_tx_data *data = &ring->data[i];
2026 data->cmd_paddr = paddr;
2027 data->scratch_paddr = paddr + 12;
2028 paddr += sizeof (struct iwn_tx_cmd);
2030 error = bus_dmamap_create(ring->data_dmat, 0, &data->map);
2032 device_printf(sc->sc_dev,
2033 "%s: could not create TX buf DMA map, error %d\n",
2039 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
2043 fail: iwn_free_tx_ring(sc, ring);
2044 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end in error\n", __func__);
2049 iwn_reset_tx_ring(struct iwn_softc *sc, struct iwn_tx_ring *ring)
2053 DPRINTF(sc, IWN_DEBUG_TRACE, "->doing %s \n", __func__);
2055 for (i = 0; i < IWN_TX_RING_COUNT; i++) {
2056 struct iwn_tx_data *data = &ring->data[i];
2058 if (data->m != NULL) {
2059 bus_dmamap_sync(ring->data_dmat, data->map,
2060 BUS_DMASYNC_POSTWRITE);
2061 bus_dmamap_unload(ring->data_dmat, data->map);
2065 if (data->ni != NULL) {
2066 ieee80211_free_node(data->ni);
2070 /* Clear TX descriptors. */
2071 memset(ring->desc, 0, ring->desc_dma.size);
2072 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
2073 BUS_DMASYNC_PREWRITE);
2074 sc->qfullmsk &= ~(1 << ring->qid);
2080 iwn_free_tx_ring(struct iwn_softc *sc, struct iwn_tx_ring *ring)
2084 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s \n", __func__);
2086 iwn_dma_contig_free(&ring->desc_dma);
2087 iwn_dma_contig_free(&ring->cmd_dma);
2089 for (i = 0; i < IWN_TX_RING_COUNT; i++) {
2090 struct iwn_tx_data *data = &ring->data[i];
2092 if (data->m != NULL) {
2093 bus_dmamap_sync(ring->data_dmat, data->map,
2094 BUS_DMASYNC_POSTWRITE);
2095 bus_dmamap_unload(ring->data_dmat, data->map);
2098 if (data->map != NULL)
2099 bus_dmamap_destroy(ring->data_dmat, data->map);
2101 if (ring->data_dmat != NULL) {
2102 bus_dma_tag_destroy(ring->data_dmat);
2103 ring->data_dmat = NULL;
2108 iwn5000_ict_reset(struct iwn_softc *sc)
2110 /* Disable interrupts. */
2111 IWN_WRITE(sc, IWN_INT_MASK, 0);
2113 /* Reset ICT table. */
2114 memset(sc->ict, 0, IWN_ICT_SIZE);
2117 bus_dmamap_sync(sc->ict_dma.tag, sc->ict_dma.map,
2118 BUS_DMASYNC_PREWRITE);
2120 /* Set physical address of ICT table (4KB aligned). */
2121 DPRINTF(sc, IWN_DEBUG_RESET, "%s: enabling ICT\n", __func__);
2122 IWN_WRITE(sc, IWN_DRAM_INT_TBL, IWN_DRAM_INT_TBL_ENABLE |
2123 IWN_DRAM_INT_TBL_WRAP_CHECK | sc->ict_dma.paddr >> 12);
2125 /* Enable periodic RX interrupt. */
2126 sc->int_mask |= IWN_INT_RX_PERIODIC;
2127 /* Switch to ICT interrupt mode in driver. */
2128 sc->sc_flags |= IWN_FLAG_USE_ICT;
2130 /* Re-enable interrupts. */
2131 IWN_WRITE(sc, IWN_INT, 0xffffffff);
2132 IWN_WRITE(sc, IWN_INT_MASK, sc->int_mask);
2136 iwn_read_eeprom(struct iwn_softc *sc, uint8_t macaddr[IEEE80211_ADDR_LEN])
2138 struct iwn_ops *ops = &sc->ops;
2142 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
2144 /* Check whether adapter has an EEPROM or an OTPROM. */
2145 if (sc->hw_type >= IWN_HW_REV_TYPE_1000 &&
2146 (IWN_READ(sc, IWN_OTP_GP) & IWN_OTP_GP_DEV_SEL_OTP))
2147 sc->sc_flags |= IWN_FLAG_HAS_OTPROM;
2148 DPRINTF(sc, IWN_DEBUG_RESET, "%s found\n",
2149 (sc->sc_flags & IWN_FLAG_HAS_OTPROM) ? "OTPROM" : "EEPROM");
2151 /* Adapter has to be powered on for EEPROM access to work. */
2152 if ((error = iwn_apm_init(sc)) != 0) {
2153 device_printf(sc->sc_dev,
2154 "%s: could not power ON adapter, error %d\n", __func__,
2159 if ((IWN_READ(sc, IWN_EEPROM_GP) & 0x7) == 0) {
2160 device_printf(sc->sc_dev, "%s: bad ROM signature\n", __func__);
2163 if ((error = iwn_eeprom_lock(sc)) != 0) {
2164 device_printf(sc->sc_dev, "%s: could not lock ROM, error %d\n",
2168 if (sc->sc_flags & IWN_FLAG_HAS_OTPROM) {
2169 if ((error = iwn_init_otprom(sc)) != 0) {
2170 device_printf(sc->sc_dev,
2171 "%s: could not initialize OTPROM, error %d\n",
2177 iwn_read_prom_data(sc, IWN_EEPROM_SKU_CAP, &val, 2);
2178 DPRINTF(sc, IWN_DEBUG_RESET, "SKU capabilities=0x%04x\n", le16toh(val));
2179 /* Check if HT support is bonded out. */
2180 if (val & htole16(IWN_EEPROM_SKU_CAP_11N))
2181 sc->sc_flags |= IWN_FLAG_HAS_11N;
2183 iwn_read_prom_data(sc, IWN_EEPROM_RFCFG, &val, 2);
2184 sc->rfcfg = le16toh(val);
2185 DPRINTF(sc, IWN_DEBUG_RESET, "radio config=0x%04x\n", sc->rfcfg);
2186 /* Read Tx/Rx chains from ROM unless it's known to be broken. */
2187 if (sc->txchainmask == 0)
2188 sc->txchainmask = IWN_RFCFG_TXANTMSK(sc->rfcfg);
2189 if (sc->rxchainmask == 0)
2190 sc->rxchainmask = IWN_RFCFG_RXANTMSK(sc->rfcfg);
2192 /* Read MAC address. */
2193 iwn_read_prom_data(sc, IWN_EEPROM_MAC, macaddr, 6);
2195 /* Read adapter-specific information from EEPROM. */
2196 ops->read_eeprom(sc);
2198 iwn_apm_stop(sc); /* Power OFF adapter. */
2200 iwn_eeprom_unlock(sc);
2202 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
2208 iwn4965_read_eeprom(struct iwn_softc *sc)
2214 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
2216 /* Read regulatory domain (4 ASCII characters). */
2217 iwn_read_prom_data(sc, IWN4965_EEPROM_DOMAIN, sc->eeprom_domain, 4);
2219 /* Read the list of authorized channels (20MHz & 40MHz). */
2220 for (i = 0; i < IWN_NBANDS - 1; i++) {
2221 addr = iwn4965_regulatory_bands[i];
2222 iwn_read_eeprom_channels(sc, i, addr);
2225 /* Read maximum allowed TX power for 2GHz and 5GHz bands. */
2226 iwn_read_prom_data(sc, IWN4965_EEPROM_MAXPOW, &val, 2);
2227 sc->maxpwr2GHz = val & 0xff;
2228 sc->maxpwr5GHz = val >> 8;
2229 /* Check that EEPROM values are within valid range. */
2230 if (sc->maxpwr5GHz < 20 || sc->maxpwr5GHz > 50)
2231 sc->maxpwr5GHz = 38;
2232 if (sc->maxpwr2GHz < 20 || sc->maxpwr2GHz > 50)
2233 sc->maxpwr2GHz = 38;
2234 DPRINTF(sc, IWN_DEBUG_RESET, "maxpwr 2GHz=%d 5GHz=%d\n",
2235 sc->maxpwr2GHz, sc->maxpwr5GHz);
2237 /* Read samples for each TX power group. */
2238 iwn_read_prom_data(sc, IWN4965_EEPROM_BANDS, sc->bands,
2241 /* Read voltage at which samples were taken. */
2242 iwn_read_prom_data(sc, IWN4965_EEPROM_VOLTAGE, &val, 2);
2243 sc->eeprom_voltage = (int16_t)le16toh(val);
2244 DPRINTF(sc, IWN_DEBUG_RESET, "voltage=%d (in 0.3V)\n",
2245 sc->eeprom_voltage);
2248 /* Print samples. */
2249 if (sc->sc_debug & IWN_DEBUG_ANY) {
2250 for (i = 0; i < IWN_NBANDS - 1; i++)
2251 iwn4965_print_power_group(sc, i);
2255 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
2260 iwn4965_print_power_group(struct iwn_softc *sc, int i)
2262 struct iwn4965_eeprom_band *band = &sc->bands[i];
2263 struct iwn4965_eeprom_chan_samples *chans = band->chans;
2266 printf("===band %d===\n", i);
2267 printf("chan lo=%d, chan hi=%d\n", band->lo, band->hi);
2268 printf("chan1 num=%d\n", chans[0].num);
2269 for (c = 0; c < 2; c++) {
2270 for (j = 0; j < IWN_NSAMPLES; j++) {
2271 printf("chain %d, sample %d: temp=%d gain=%d "
2272 "power=%d pa_det=%d\n", c, j,
2273 chans[0].samples[c][j].temp,
2274 chans[0].samples[c][j].gain,
2275 chans[0].samples[c][j].power,
2276 chans[0].samples[c][j].pa_det);
2279 printf("chan2 num=%d\n", chans[1].num);
2280 for (c = 0; c < 2; c++) {
2281 for (j = 0; j < IWN_NSAMPLES; j++) {
2282 printf("chain %d, sample %d: temp=%d gain=%d "
2283 "power=%d pa_det=%d\n", c, j,
2284 chans[1].samples[c][j].temp,
2285 chans[1].samples[c][j].gain,
2286 chans[1].samples[c][j].power,
2287 chans[1].samples[c][j].pa_det);
2294 iwn5000_read_eeprom(struct iwn_softc *sc)
2296 struct iwn5000_eeprom_calib_hdr hdr;
2298 uint32_t base, addr;
2302 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
2304 /* Read regulatory domain (4 ASCII characters). */
2305 iwn_read_prom_data(sc, IWN5000_EEPROM_REG, &val, 2);
2306 base = le16toh(val);
2307 iwn_read_prom_data(sc, base + IWN5000_EEPROM_DOMAIN,
2308 sc->eeprom_domain, 4);
2310 /* Read the list of authorized channels (20MHz & 40MHz). */
2311 for (i = 0; i < IWN_NBANDS - 1; i++) {
2312 addr = base + sc->base_params->regulatory_bands[i];
2313 iwn_read_eeprom_channels(sc, i, addr);
2316 /* Read enhanced TX power information for 6000 Series. */
2317 if (sc->base_params->enhanced_TX_power)
2318 iwn_read_eeprom_enhinfo(sc);
2320 iwn_read_prom_data(sc, IWN5000_EEPROM_CAL, &val, 2);
2321 base = le16toh(val);
2322 iwn_read_prom_data(sc, base, &hdr, sizeof hdr);
2323 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
2324 "%s: calib version=%u pa type=%u voltage=%u\n", __func__,
2325 hdr.version, hdr.pa_type, le16toh(hdr.volt));
2326 sc->calib_ver = hdr.version;
2328 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSETv2) {
2329 sc->eeprom_voltage = le16toh(hdr.volt);
2330 iwn_read_prom_data(sc, base + IWN5000_EEPROM_TEMP, &val, 2);
2331 sc->eeprom_temp_high=le16toh(val);
2332 iwn_read_prom_data(sc, base + IWN5000_EEPROM_VOLT, &val, 2);
2333 sc->eeprom_temp = le16toh(val);
2336 if (sc->hw_type == IWN_HW_REV_TYPE_5150) {
2337 /* Compute temperature offset. */
2338 iwn_read_prom_data(sc, base + IWN5000_EEPROM_TEMP, &val, 2);
2339 sc->eeprom_temp = le16toh(val);
2340 iwn_read_prom_data(sc, base + IWN5000_EEPROM_VOLT, &val, 2);
2341 volt = le16toh(val);
2342 sc->temp_off = sc->eeprom_temp - (volt / -5);
2343 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "temp=%d volt=%d offset=%dK\n",
2344 sc->eeprom_temp, volt, sc->temp_off);
2346 /* Read crystal calibration. */
2347 iwn_read_prom_data(sc, base + IWN5000_EEPROM_CRYSTAL,
2348 &sc->eeprom_crystal, sizeof (uint32_t));
2349 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "crystal calibration 0x%08x\n",
2350 le32toh(sc->eeprom_crystal));
2353 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
2358 * Translate EEPROM flags to net80211.
2361 iwn_eeprom_channel_flags(struct iwn_eeprom_chan *channel)
2366 if ((channel->flags & IWN_EEPROM_CHAN_ACTIVE) == 0)
2367 nflags |= IEEE80211_CHAN_PASSIVE;
2368 if ((channel->flags & IWN_EEPROM_CHAN_IBSS) == 0)
2369 nflags |= IEEE80211_CHAN_NOADHOC;
2370 if (channel->flags & IWN_EEPROM_CHAN_RADAR) {
2371 nflags |= IEEE80211_CHAN_DFS;
2372 /* XXX apparently IBSS may still be marked */
2373 nflags |= IEEE80211_CHAN_NOADHOC;
2380 iwn_read_eeprom_band(struct iwn_softc *sc, int n, int maxchans, int *nchans,
2381 struct ieee80211_channel chans[])
2383 struct iwn_eeprom_chan *channels = sc->eeprom_channels[n];
2384 const struct iwn_chan_band *band = &iwn_bands[n];
2385 uint8_t bands[IEEE80211_MODE_BYTES];
2387 int i, error, nflags;
2389 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
2391 memset(bands, 0, sizeof(bands));
2393 setbit(bands, IEEE80211_MODE_11B);
2394 setbit(bands, IEEE80211_MODE_11G);
2395 if (sc->sc_flags & IWN_FLAG_HAS_11N)
2396 setbit(bands, IEEE80211_MODE_11NG);
2398 setbit(bands, IEEE80211_MODE_11A);
2399 if (sc->sc_flags & IWN_FLAG_HAS_11N)
2400 setbit(bands, IEEE80211_MODE_11NA);
2403 for (i = 0; i < band->nchan; i++) {
2404 if (!(channels[i].flags & IWN_EEPROM_CHAN_VALID)) {
2405 DPRINTF(sc, IWN_DEBUG_RESET,
2406 "skip chan %d flags 0x%x maxpwr %d\n",
2407 band->chan[i], channels[i].flags,
2408 channels[i].maxpwr);
2412 chan = band->chan[i];
2413 nflags = iwn_eeprom_channel_flags(&channels[i]);
2414 error = ieee80211_add_channel(chans, maxchans, nchans,
2415 chan, 0, channels[i].maxpwr, nflags, bands);
2419 /* Save maximum allowed TX power for this channel. */
2421 sc->maxpwr[chan] = channels[i].maxpwr;
2423 DPRINTF(sc, IWN_DEBUG_RESET,
2424 "add chan %d flags 0x%x maxpwr %d\n", chan,
2425 channels[i].flags, channels[i].maxpwr);
2428 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
2433 iwn_read_eeprom_ht40(struct iwn_softc *sc, int n, int maxchans, int *nchans,
2434 struct ieee80211_channel chans[])
2436 struct iwn_eeprom_chan *channels = sc->eeprom_channels[n];
2437 const struct iwn_chan_band *band = &iwn_bands[n];
2439 int i, error, nflags;
2441 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s start\n", __func__);
2443 if (!(sc->sc_flags & IWN_FLAG_HAS_11N)) {
2444 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end no 11n\n", __func__);
2448 for (i = 0; i < band->nchan; i++) {
2449 if (!(channels[i].flags & IWN_EEPROM_CHAN_VALID)) {
2450 DPRINTF(sc, IWN_DEBUG_RESET,
2451 "skip chan %d flags 0x%x maxpwr %d\n",
2452 band->chan[i], channels[i].flags,
2453 channels[i].maxpwr);
2457 chan = band->chan[i];
2458 nflags = iwn_eeprom_channel_flags(&channels[i]);
2459 nflags |= (n == 5 ? IEEE80211_CHAN_G : IEEE80211_CHAN_A);
2460 error = ieee80211_add_channel_ht40(chans, maxchans, nchans,
2461 chan, channels[i].maxpwr, nflags);
2464 device_printf(sc->sc_dev,
2465 "%s: no entry for channel %d\n", __func__, chan);
2468 DPRINTF(sc, IWN_DEBUG_RESET,
2469 "%s: skip chan %d, extension channel not found\n",
2473 device_printf(sc->sc_dev,
2474 "%s: channel table is full!\n", __func__);
2477 DPRINTF(sc, IWN_DEBUG_RESET,
2478 "add ht40 chan %d flags 0x%x maxpwr %d\n",
2479 chan, channels[i].flags, channels[i].maxpwr);
2486 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
2491 iwn_read_eeprom_channels(struct iwn_softc *sc, int n, uint32_t addr)
2493 struct ieee80211com *ic = &sc->sc_ic;
2495 iwn_read_prom_data(sc, addr, &sc->eeprom_channels[n],
2496 iwn_bands[n].nchan * sizeof (struct iwn_eeprom_chan));
2499 iwn_read_eeprom_band(sc, n, IEEE80211_CHAN_MAX, &ic->ic_nchans,
2502 iwn_read_eeprom_ht40(sc, n, IEEE80211_CHAN_MAX, &ic->ic_nchans,
2505 ieee80211_sort_channels(ic->ic_channels, ic->ic_nchans);
2508 static struct iwn_eeprom_chan *
2509 iwn_find_eeprom_channel(struct iwn_softc *sc, struct ieee80211_channel *c)
2511 int band, chan, i, j;
2513 if (IEEE80211_IS_CHAN_HT40(c)) {
2514 band = IEEE80211_IS_CHAN_5GHZ(c) ? 6 : 5;
2515 if (IEEE80211_IS_CHAN_HT40D(c))
2516 chan = c->ic_extieee;
2519 for (i = 0; i < iwn_bands[band].nchan; i++) {
2520 if (iwn_bands[band].chan[i] == chan)
2521 return &sc->eeprom_channels[band][i];
2524 for (j = 0; j < 5; j++) {
2525 for (i = 0; i < iwn_bands[j].nchan; i++) {
2526 if (iwn_bands[j].chan[i] == c->ic_ieee &&
2527 ((j == 0) ^ IEEE80211_IS_CHAN_A(c)) == 1)
2528 return &sc->eeprom_channels[j][i];
2536 iwn_getradiocaps(struct ieee80211com *ic,
2537 int maxchans, int *nchans, struct ieee80211_channel chans[])
2539 struct iwn_softc *sc = ic->ic_softc;
2542 /* Parse the list of authorized channels. */
2543 for (i = 0; i < 5 && *nchans < maxchans; i++)
2544 iwn_read_eeprom_band(sc, i, maxchans, nchans, chans);
2545 for (i = 5; i < IWN_NBANDS - 1 && *nchans < maxchans; i++)
2546 iwn_read_eeprom_ht40(sc, i, maxchans, nchans, chans);
2550 * Enforce flags read from EEPROM.
2553 iwn_setregdomain(struct ieee80211com *ic, struct ieee80211_regdomain *rd,
2554 int nchan, struct ieee80211_channel chans[])
2556 struct iwn_softc *sc = ic->ic_softc;
2559 for (i = 0; i < nchan; i++) {
2560 struct ieee80211_channel *c = &chans[i];
2561 struct iwn_eeprom_chan *channel;
2563 channel = iwn_find_eeprom_channel(sc, c);
2564 if (channel == NULL) {
2565 ic_printf(ic, "%s: invalid channel %u freq %u/0x%x\n",
2566 __func__, c->ic_ieee, c->ic_freq, c->ic_flags);
2569 c->ic_flags |= iwn_eeprom_channel_flags(channel);
2576 iwn_read_eeprom_enhinfo(struct iwn_softc *sc)
2578 struct iwn_eeprom_enhinfo enhinfo[35];
2579 struct ieee80211com *ic = &sc->sc_ic;
2580 struct ieee80211_channel *c;
2586 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
2588 iwn_read_prom_data(sc, IWN5000_EEPROM_REG, &val, 2);
2589 base = le16toh(val);
2590 iwn_read_prom_data(sc, base + IWN6000_EEPROM_ENHINFO,
2591 enhinfo, sizeof enhinfo);
2593 for (i = 0; i < nitems(enhinfo); i++) {
2594 flags = enhinfo[i].flags;
2595 if (!(flags & IWN_ENHINFO_VALID))
2596 continue; /* Skip invalid entries. */
2599 if (sc->txchainmask & IWN_ANT_A)
2600 maxpwr = MAX(maxpwr, enhinfo[i].chain[0]);
2601 if (sc->txchainmask & IWN_ANT_B)
2602 maxpwr = MAX(maxpwr, enhinfo[i].chain[1]);
2603 if (sc->txchainmask & IWN_ANT_C)
2604 maxpwr = MAX(maxpwr, enhinfo[i].chain[2]);
2605 if (sc->ntxchains == 2)
2606 maxpwr = MAX(maxpwr, enhinfo[i].mimo2);
2607 else if (sc->ntxchains == 3)
2608 maxpwr = MAX(maxpwr, enhinfo[i].mimo3);
2610 for (j = 0; j < ic->ic_nchans; j++) {
2611 c = &ic->ic_channels[j];
2612 if ((flags & IWN_ENHINFO_5GHZ)) {
2613 if (!IEEE80211_IS_CHAN_A(c))
2615 } else if ((flags & IWN_ENHINFO_OFDM)) {
2616 if (!IEEE80211_IS_CHAN_G(c))
2618 } else if (!IEEE80211_IS_CHAN_B(c))
2620 if ((flags & IWN_ENHINFO_HT40)) {
2621 if (!IEEE80211_IS_CHAN_HT40(c))
2624 if (IEEE80211_IS_CHAN_HT40(c))
2627 if (enhinfo[i].chan != 0 &&
2628 enhinfo[i].chan != c->ic_ieee)
2631 DPRINTF(sc, IWN_DEBUG_RESET,
2632 "channel %d(%x), maxpwr %d\n", c->ic_ieee,
2633 c->ic_flags, maxpwr / 2);
2634 c->ic_maxregpower = maxpwr / 2;
2635 c->ic_maxpower = maxpwr;
2639 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
2643 static struct ieee80211_node *
2644 iwn_node_alloc(struct ieee80211vap *vap, const uint8_t mac[IEEE80211_ADDR_LEN])
2646 return malloc(sizeof (struct iwn_node), M_80211_NODE,M_NOWAIT | M_ZERO);
2652 switch (rate & 0xff) {
2653 case 12: return 0xd;
2654 case 18: return 0xf;
2655 case 24: return 0x5;
2656 case 36: return 0x7;
2657 case 48: return 0x9;
2658 case 72: return 0xb;
2659 case 96: return 0x1;
2660 case 108: return 0x3;
2664 case 22: return 110;
2669 static __inline uint8_t
2670 plcp2rate(const uint8_t rate_plcp)
2672 switch (rate_plcp) {
2673 case 0xd: return 12;
2674 case 0xf: return 18;
2675 case 0x5: return 24;
2676 case 0x7: return 36;
2677 case 0x9: return 48;
2678 case 0xb: return 72;
2679 case 0x1: return 96;
2680 case 0x3: return 108;
2684 case 110: return 22;
2690 iwn_get_1stream_tx_antmask(struct iwn_softc *sc)
2693 return IWN_LSB(sc->txchainmask);
2697 iwn_get_2stream_tx_antmask(struct iwn_softc *sc)
2702 * The '2 stream' setup is a bit .. odd.
2704 * For NICs that support only 1 antenna, default to IWN_ANT_AB or
2705 * the firmware panics (eg Intel 5100.)
2707 * For NICs that support two antennas, we use ANT_AB.
2709 * For NICs that support three antennas, we use the two that
2710 * wasn't the default one.
2712 * XXX TODO: if bluetooth (full concurrent) is enabled, restrict
2713 * this to only one antenna.
2716 /* Default - transmit on the other antennas */
2717 tx = (sc->txchainmask & ~IWN_LSB(sc->txchainmask));
2719 /* Now, if it's zero, set it to IWN_ANT_AB, so to not panic firmware */
2724 * If the NIC is a two-stream TX NIC, configure the TX mask to
2725 * the default chainmask
2727 else if (sc->ntxchains == 2)
2728 tx = sc->txchainmask;
2736 * Calculate the required PLCP value from the given rate,
2737 * to the given node.
2739 * This will take the node configuration (eg 11n, rate table
2740 * setup, etc) into consideration.
2743 iwn_rate_to_plcp(struct iwn_softc *sc, struct ieee80211_node *ni,
2746 struct ieee80211com *ic = ni->ni_ic;
2751 * If it's an MCS rate, let's set the plcp correctly
2752 * and set the relevant flags based on the node config.
2754 if (rate & IEEE80211_RATE_MCS) {
2756 * Set the initial PLCP value to be between 0->31 for
2757 * MCS 0 -> MCS 31, then set the "I'm an MCS rate!"
2760 plcp = IEEE80211_RV(rate) | IWN_RFLAG_MCS;
2763 * XXX the following should only occur if both
2764 * the local configuration _and_ the remote node
2765 * advertise these capabilities. Thus this code
2770 * Set the channel width and guard interval.
2772 if (IEEE80211_IS_CHAN_HT40(ni->ni_chan)) {
2773 plcp |= IWN_RFLAG_HT40;
2774 if (ni->ni_htcap & IEEE80211_HTCAP_SHORTGI40)
2775 plcp |= IWN_RFLAG_SGI;
2776 } else if (ni->ni_htcap & IEEE80211_HTCAP_SHORTGI20) {
2777 plcp |= IWN_RFLAG_SGI;
2781 * Ensure the selected rate matches the link quality
2782 * table entries being used.
2785 plcp |= IWN_RFLAG_ANT(sc->txchainmask);
2786 else if (rate > 0x87)
2787 plcp |= IWN_RFLAG_ANT(iwn_get_2stream_tx_antmask(sc));
2789 plcp |= IWN_RFLAG_ANT(iwn_get_1stream_tx_antmask(sc));
2792 * Set the initial PLCP - fine for both
2793 * OFDM and CCK rates.
2795 plcp = rate2plcp(rate);
2797 /* Set CCK flag if it's CCK */
2799 /* XXX It would be nice to have a method
2800 * to map the ridx -> phy table entry
2801 * so we could just query that, rather than
2802 * this hack to check against IWN_RIDX_OFDM6.
2804 ridx = ieee80211_legacy_rate_lookup(ic->ic_rt,
2805 rate & IEEE80211_RATE_VAL);
2806 if (ridx < IWN_RIDX_OFDM6 &&
2807 IEEE80211_IS_CHAN_2GHZ(ni->ni_chan))
2808 plcp |= IWN_RFLAG_CCK;
2810 /* Set antenna configuration */
2811 /* XXX TODO: is this the right antenna to use for legacy? */
2812 plcp |= IWN_RFLAG_ANT(iwn_get_1stream_tx_antmask(sc));
2815 DPRINTF(sc, IWN_DEBUG_TXRATE, "%s: rate=0x%02x, plcp=0x%08x\n",
2820 return (htole32(plcp));
2824 iwn_newassoc(struct ieee80211_node *ni, int isnew)
2826 /* Doesn't do anything at the moment */
2830 iwn_media_change(struct ifnet *ifp)
2834 error = ieee80211_media_change(ifp);
2835 /* NB: only the fixed rate can change and that doesn't need a reset */
2836 return (error == ENETRESET ? 0 : error);
2840 iwn_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg)
2842 struct iwn_vap *ivp = IWN_VAP(vap);
2843 struct ieee80211com *ic = vap->iv_ic;
2844 struct iwn_softc *sc = ic->ic_softc;
2847 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
2849 DPRINTF(sc, IWN_DEBUG_STATE, "%s: %s -> %s\n", __func__,
2850 ieee80211_state_name[vap->iv_state], ieee80211_state_name[nstate]);
2852 IEEE80211_UNLOCK(ic);
2854 callout_stop(&sc->calib_to);
2856 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX];
2859 case IEEE80211_S_ASSOC:
2860 if (vap->iv_state != IEEE80211_S_RUN)
2863 case IEEE80211_S_AUTH:
2864 if (vap->iv_state == IEEE80211_S_AUTH)
2868 * !AUTH -> AUTH transition requires state reset to handle
2869 * reassociations correctly.
2871 sc->rxon->associd = 0;
2872 sc->rxon->filter &= ~htole32(IWN_FILTER_BSS);
2873 sc->calib.state = IWN_CALIB_STATE_INIT;
2875 /* Wait until we hear a beacon before we transmit */
2876 if (IEEE80211_IS_CHAN_PASSIVE(ic->ic_curchan))
2877 sc->sc_beacon_wait = 1;
2879 if ((error = iwn_auth(sc, vap)) != 0) {
2880 device_printf(sc->sc_dev,
2881 "%s: could not move to auth state\n", __func__);
2885 case IEEE80211_S_RUN:
2887 * RUN -> RUN transition; Just restart the timers.
2889 if (vap->iv_state == IEEE80211_S_RUN) {
2894 /* Wait until we hear a beacon before we transmit */
2895 if (IEEE80211_IS_CHAN_PASSIVE(ic->ic_curchan))
2896 sc->sc_beacon_wait = 1;
2899 * !RUN -> RUN requires setting the association id
2900 * which is done with a firmware cmd. We also defer
2901 * starting the timers until that work is done.
2903 if ((error = iwn_run(sc, vap)) != 0) {
2904 device_printf(sc->sc_dev,
2905 "%s: could not move to run state\n", __func__);
2909 case IEEE80211_S_INIT:
2910 sc->calib.state = IWN_CALIB_STATE_INIT;
2912 * Purge the xmit queue so we don't have old frames
2913 * during a new association attempt.
2915 sc->sc_beacon_wait = 0;
2916 iwn_xmit_queue_drain(sc);
2925 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end in error\n", __func__);
2929 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
2931 return ivp->iv_newstate(vap, nstate, arg);
2935 iwn_calib_timeout(void *arg)
2937 struct iwn_softc *sc = arg;
2939 IWN_LOCK_ASSERT(sc);
2941 /* Force automatic TX power calibration every 60 secs. */
2942 if (++sc->calib_cnt >= 120) {
2945 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s\n",
2946 "sending request for statistics");
2947 (void)iwn_cmd(sc, IWN_CMD_GET_STATISTICS, &flags,
2951 callout_reset(&sc->calib_to, msecs_to_ticks(500), iwn_calib_timeout,
2956 * Process an RX_PHY firmware notification. This is usually immediately
2957 * followed by an MPDU_RX_DONE notification.
2960 iwn_rx_phy(struct iwn_softc *sc, struct iwn_rx_desc *desc,
2961 struct iwn_rx_data *data)
2963 struct iwn_rx_stat *stat = (struct iwn_rx_stat *)(desc + 1);
2965 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: received PHY stats\n", __func__);
2966 bus_dmamap_sync(sc->rxq.data_dmat, data->map, BUS_DMASYNC_POSTREAD);
2968 /* Save RX statistics, they will be used on MPDU_RX_DONE. */
2969 memcpy(&sc->last_rx_stat, stat, sizeof (*stat));
2970 sc->last_rx_valid = 1;
2974 * Process an RX_DONE (4965AGN only) or MPDU_RX_DONE firmware notification.
2975 * Each MPDU_RX_DONE notification must be preceded by an RX_PHY one.
2978 iwn_rx_done(struct iwn_softc *sc, struct iwn_rx_desc *desc,
2979 struct iwn_rx_data *data)
2981 struct iwn_ops *ops = &sc->ops;
2982 struct ieee80211com *ic = &sc->sc_ic;
2983 struct iwn_rx_ring *ring = &sc->rxq;
2984 struct ieee80211_frame *wh;
2985 struct ieee80211_node *ni;
2986 struct mbuf *m, *m1;
2987 struct iwn_rx_stat *stat;
2991 int error, len, rssi, nf;
2993 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
2995 if (desc->type == IWN_MPDU_RX_DONE) {
2996 /* Check for prior RX_PHY notification. */
2997 if (!sc->last_rx_valid) {
2998 DPRINTF(sc, IWN_DEBUG_ANY,
2999 "%s: missing RX_PHY\n", __func__);
3002 stat = &sc->last_rx_stat;
3004 stat = (struct iwn_rx_stat *)(desc + 1);
3006 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_POSTREAD);
3008 if (stat->cfg_phy_len > IWN_STAT_MAXLEN) {
3009 device_printf(sc->sc_dev,
3010 "%s: invalid RX statistic header, len %d\n", __func__,
3014 if (desc->type == IWN_MPDU_RX_DONE) {
3015 struct iwn_rx_mpdu *mpdu = (struct iwn_rx_mpdu *)(desc + 1);
3016 head = (caddr_t)(mpdu + 1);
3017 len = le16toh(mpdu->len);
3019 head = (caddr_t)(stat + 1) + stat->cfg_phy_len;
3020 len = le16toh(stat->len);
3023 flags = le32toh(*(uint32_t *)(head + len));
3025 /* Discard frames with a bad FCS early. */
3026 if ((flags & IWN_RX_NOERROR) != IWN_RX_NOERROR) {
3027 DPRINTF(sc, IWN_DEBUG_RECV, "%s: RX flags error %x\n",
3029 counter_u64_add(ic->ic_ierrors, 1);
3032 /* Discard frames that are too short. */
3033 if (len < sizeof (struct ieee80211_frame_ack)) {
3034 DPRINTF(sc, IWN_DEBUG_RECV, "%s: frame too short: %d\n",
3036 counter_u64_add(ic->ic_ierrors, 1);
3040 m1 = m_getjcl(M_NOWAIT, MT_DATA, M_PKTHDR, IWN_RBUF_SIZE);
3042 DPRINTF(sc, IWN_DEBUG_ANY, "%s: no mbuf to restock ring\n",
3044 counter_u64_add(ic->ic_ierrors, 1);
3047 bus_dmamap_unload(ring->data_dmat, data->map);
3049 error = bus_dmamap_load(ring->data_dmat, data->map, mtod(m1, void *),
3050 IWN_RBUF_SIZE, iwn_dma_map_addr, &paddr, BUS_DMA_NOWAIT);
3051 if (error != 0 && error != EFBIG) {
3052 device_printf(sc->sc_dev,
3053 "%s: bus_dmamap_load failed, error %d\n", __func__, error);
3056 /* Try to reload the old mbuf. */
3057 error = bus_dmamap_load(ring->data_dmat, data->map,
3058 mtod(data->m, void *), IWN_RBUF_SIZE, iwn_dma_map_addr,
3059 &paddr, BUS_DMA_NOWAIT);
3060 if (error != 0 && error != EFBIG) {
3061 panic("%s: could not load old RX mbuf", __func__);
3063 bus_dmamap_sync(ring->data_dmat, data->map,
3064 BUS_DMASYNC_PREREAD);
3065 /* Physical address may have changed. */
3066 ring->desc[ring->cur] = htole32(paddr >> 8);
3067 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
3068 BUS_DMASYNC_PREWRITE);
3069 counter_u64_add(ic->ic_ierrors, 1);
3073 bus_dmamap_sync(ring->data_dmat, data->map,
3074 BUS_DMASYNC_PREREAD);
3078 /* Update RX descriptor. */
3079 ring->desc[ring->cur] = htole32(paddr >> 8);
3080 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
3081 BUS_DMASYNC_PREWRITE);
3083 /* Finalize mbuf. */
3085 m->m_pkthdr.len = m->m_len = len;
3087 /* Grab a reference to the source node. */
3088 wh = mtod(m, struct ieee80211_frame *);
3089 if (len >= sizeof(struct ieee80211_frame_min))
3090 ni = ieee80211_find_rxnode(ic, (struct ieee80211_frame_min *)wh);
3093 nf = (ni != NULL && ni->ni_vap->iv_state == IEEE80211_S_RUN &&
3094 (ic->ic_flags & IEEE80211_F_SCAN) == 0) ? sc->noise : -95;
3096 rssi = ops->get_rssi(sc, stat);
3098 if (ieee80211_radiotap_active(ic)) {
3099 struct iwn_rx_radiotap_header *tap = &sc->sc_rxtap;
3100 uint32_t rate = le32toh(stat->rate);
3103 if (stat->flags & htole16(IWN_STAT_FLAG_SHPREAMBLE))
3104 tap->wr_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
3105 tap->wr_dbm_antsignal = (int8_t)rssi;
3106 tap->wr_dbm_antnoise = (int8_t)nf;
3107 tap->wr_tsft = stat->tstamp;
3108 if (rate & IWN_RFLAG_MCS) {
3109 tap->wr_rate = rate & IWN_RFLAG_RATE_MCS;
3110 tap->wr_rate |= IEEE80211_RATE_MCS;
3112 tap->wr_rate = plcp2rate(rate & IWN_RFLAG_RATE);
3116 * If it's a beacon and we're waiting, then do the
3117 * wakeup. This should unblock raw_xmit/start.
3119 if (sc->sc_beacon_wait) {
3120 uint8_t type, subtype;
3121 /* NB: Re-assign wh */
3122 wh = mtod(m, struct ieee80211_frame *);
3123 type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK;
3124 subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
3126 * This assumes at this point we've received our own
3129 DPRINTF(sc, IWN_DEBUG_TRACE,
3130 "%s: beacon_wait, type=%d, subtype=%d\n",
3131 __func__, type, subtype);
3132 if (type == IEEE80211_FC0_TYPE_MGT &&
3133 subtype == IEEE80211_FC0_SUBTYPE_BEACON) {
3134 DPRINTF(sc, IWN_DEBUG_TRACE | IWN_DEBUG_XMIT,
3135 "%s: waking things up\n", __func__);
3136 /* queue taskqueue to transmit! */
3137 taskqueue_enqueue(sc->sc_tq, &sc->sc_xmit_task);
3143 /* Send the frame to the 802.11 layer. */
3145 if (ni->ni_flags & IEEE80211_NODE_HT)
3146 m->m_flags |= M_AMPDU;
3147 (void)ieee80211_input(ni, m, rssi - nf, nf);
3148 /* Node is no longer needed. */
3149 ieee80211_free_node(ni);
3151 (void)ieee80211_input_all(ic, m, rssi - nf, nf);
3155 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
3159 /* Process an incoming Compressed BlockAck. */
3161 iwn_rx_compressed_ba(struct iwn_softc *sc, struct iwn_rx_desc *desc,
3162 struct iwn_rx_data *data)
3164 struct ieee80211_ratectl_tx_status *txs = &sc->sc_txs;
3165 struct iwn_ops *ops = &sc->ops;
3166 struct iwn_node *wn;
3167 struct ieee80211_node *ni;
3168 struct iwn_compressed_ba *ba = (struct iwn_compressed_ba *)(desc + 1);
3169 struct iwn_tx_ring *txq;
3170 struct iwn_tx_data *txdata;
3171 struct ieee80211_tx_ampdu *tap;
3176 int i, lastidx, qid, *res, shift;
3177 int tx_ok = 0, tx_err = 0;
3179 DPRINTF(sc, IWN_DEBUG_TRACE | IWN_DEBUG_XMIT, "->%s begin\n", __func__);
3181 bus_dmamap_sync(sc->rxq.data_dmat, data->map, BUS_DMASYNC_POSTREAD);
3183 qid = le16toh(ba->qid);
3184 txq = &sc->txq[ba->qid];
3185 tap = sc->qid2tap[ba->qid];
3187 wn = (void *)tap->txa_ni;
3191 if (!IEEE80211_AMPDU_RUNNING(tap)) {
3192 res = tap->txa_private;
3193 ssn = tap->txa_start & 0xfff;
3196 for (lastidx = le16toh(ba->ssn) & 0xff; txq->read != lastidx;) {
3197 txdata = &txq->data[txq->read];
3199 /* Unmap and free mbuf. */
3200 bus_dmamap_sync(txq->data_dmat, txdata->map,
3201 BUS_DMASYNC_POSTWRITE);
3202 bus_dmamap_unload(txq->data_dmat, txdata->map);
3203 m = txdata->m, txdata->m = NULL;
3204 ni = txdata->ni, txdata->ni = NULL;
3206 KASSERT(ni != NULL, ("no node"));
3207 KASSERT(m != NULL, ("no mbuf"));
3209 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: freeing m=%p\n", __func__, m);
3210 ieee80211_tx_complete(ni, m, 1);
3213 txq->read = (txq->read + 1) % IWN_TX_RING_COUNT;
3216 if (txq->queued == 0 && res != NULL) {
3218 ops->ampdu_tx_stop(sc, qid, tid, ssn);
3220 sc->qid2tap[qid] = NULL;
3221 free(res, M_DEVBUF);
3225 if (wn->agg[tid].bitmap == 0)
3228 shift = wn->agg[tid].startidx - ((le16toh(ba->seq) >> 4) & 0xff);
3232 if (wn->agg[tid].nframes > (64 - shift))
3236 * Walk the bitmap and calculate how many successful and failed
3237 * attempts are made.
3239 * Yes, the rate control code doesn't know these are A-MPDU
3240 * subframes and that it's okay to fail some of these.
3243 bitmap = (le64toh(ba->bitmap) >> shift) & wn->agg[tid].bitmap;
3244 for (i = 0; bitmap; i++) {
3245 txs->flags = 0; /* XXX TODO */
3246 if ((bitmap & 1) == 0) {
3248 txs->status = IEEE80211_RATECTL_TX_FAIL_UNSPECIFIED;
3251 txs->status = IEEE80211_RATECTL_TX_SUCCESS;
3253 ieee80211_ratectl_tx_complete(ni, txs);
3257 DPRINTF(sc, IWN_DEBUG_TRACE | IWN_DEBUG_XMIT,
3258 "->%s: end; %d ok; %d err\n",__func__, tx_ok, tx_err);
3263 * Process a CALIBRATION_RESULT notification sent by the initialization
3264 * firmware on response to a CMD_CALIB_CONFIG command (5000 only).
3267 iwn5000_rx_calib_results(struct iwn_softc *sc, struct iwn_rx_desc *desc,
3268 struct iwn_rx_data *data)
3270 struct iwn_phy_calib *calib = (struct iwn_phy_calib *)(desc + 1);
3273 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
3275 /* Runtime firmware should not send such a notification. */
3276 if (sc->sc_flags & IWN_FLAG_CALIB_DONE){
3277 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s received after clib done\n",
3281 len = (le32toh(desc->len) & 0x3fff) - 4;
3282 bus_dmamap_sync(sc->rxq.data_dmat, data->map, BUS_DMASYNC_POSTREAD);
3284 switch (calib->code) {
3285 case IWN5000_PHY_CALIB_DC:
3286 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_DC)
3289 case IWN5000_PHY_CALIB_LO:
3290 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_LO)
3293 case IWN5000_PHY_CALIB_TX_IQ:
3294 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TX_IQ)
3297 case IWN5000_PHY_CALIB_TX_IQ_PERIODIC:
3298 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TX_IQ_PERIODIC)
3301 case IWN5000_PHY_CALIB_BASE_BAND:
3302 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_BASE_BAND)
3306 if (idx == -1) /* Ignore other results. */
3309 /* Save calibration result. */
3310 if (sc->calibcmd[idx].buf != NULL)
3311 free(sc->calibcmd[idx].buf, M_DEVBUF);
3312 sc->calibcmd[idx].buf = malloc(len, M_DEVBUF, M_NOWAIT);
3313 if (sc->calibcmd[idx].buf == NULL) {
3314 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
3315 "not enough memory for calibration result %d\n",
3319 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
3320 "saving calibration result idx=%d, code=%d len=%d\n", idx, calib->code, len);
3321 sc->calibcmd[idx].len = len;
3322 memcpy(sc->calibcmd[idx].buf, calib, len);
3326 iwn_stats_update(struct iwn_softc *sc, struct iwn_calib_state *calib,
3327 struct iwn_stats *stats, int len)
3329 struct iwn_stats_bt *stats_bt;
3330 struct iwn_stats *lstats;
3333 * First - check whether the length is the bluetooth or normal.
3335 * If it's normal - just copy it and bump out.
3336 * Otherwise we have to convert things.
3339 if (len == sizeof(struct iwn_stats) + 4) {
3340 memcpy(&sc->last_stat, stats, sizeof(struct iwn_stats));
3341 sc->last_stat_valid = 1;
3346 * If it's not the bluetooth size - log, then just copy.
3348 if (len != sizeof(struct iwn_stats_bt) + 4) {
3349 DPRINTF(sc, IWN_DEBUG_STATS,
3350 "%s: size of rx statistics (%d) not an expected size!\n",
3353 memcpy(&sc->last_stat, stats, sizeof(struct iwn_stats));
3354 sc->last_stat_valid = 1;
3361 stats_bt = (struct iwn_stats_bt *) stats;
3362 lstats = &sc->last_stat;
3365 lstats->flags = stats_bt->flags;
3367 memcpy(&lstats->rx.ofdm, &stats_bt->rx_bt.ofdm,
3368 sizeof(struct iwn_rx_phy_stats));
3369 memcpy(&lstats->rx.cck, &stats_bt->rx_bt.cck,
3370 sizeof(struct iwn_rx_phy_stats));
3371 memcpy(&lstats->rx.general, &stats_bt->rx_bt.general_bt.common,
3372 sizeof(struct iwn_rx_general_stats));
3373 memcpy(&lstats->rx.ht, &stats_bt->rx_bt.ht,
3374 sizeof(struct iwn_rx_ht_phy_stats));
3376 memcpy(&lstats->tx, &stats_bt->tx,
3377 sizeof(struct iwn_tx_stats));
3379 memcpy(&lstats->general, &stats_bt->general,
3380 sizeof(struct iwn_general_stats));
3382 /* XXX TODO: Squirrel away the extra bluetooth stats somewhere */
3383 sc->last_stat_valid = 1;
3387 * Process an RX_STATISTICS or BEACON_STATISTICS firmware notification.
3388 * The latter is sent by the firmware after each received beacon.
3391 iwn_rx_statistics(struct iwn_softc *sc, struct iwn_rx_desc *desc,
3392 struct iwn_rx_data *data)
3394 struct iwn_ops *ops = &sc->ops;
3395 struct ieee80211com *ic = &sc->sc_ic;
3396 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
3397 struct iwn_calib_state *calib = &sc->calib;
3398 struct iwn_stats *stats = (struct iwn_stats *)(desc + 1);
3399 struct iwn_stats *lstats;
3402 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
3404 /* Ignore statistics received during a scan. */
3405 if (vap->iv_state != IEEE80211_S_RUN ||
3406 (ic->ic_flags & IEEE80211_F_SCAN)){
3407 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s received during calib\n",
3412 bus_dmamap_sync(sc->rxq.data_dmat, data->map, BUS_DMASYNC_POSTREAD);
3414 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_STATS,
3415 "%s: received statistics, cmd %d, len %d\n",
3416 __func__, desc->type, le16toh(desc->len));
3417 sc->calib_cnt = 0; /* Reset TX power calibration timeout. */
3420 * Collect/track general statistics for reporting.
3422 * This takes care of ensuring that the bluetooth sized message
3423 * will be correctly converted to the legacy sized message.
3425 iwn_stats_update(sc, calib, stats, le16toh(desc->len));
3428 * And now, let's take a reference of it to use!
3430 lstats = &sc->last_stat;
3432 /* Test if temperature has changed. */
3433 if (lstats->general.temp != sc->rawtemp) {
3434 /* Convert "raw" temperature to degC. */
3435 sc->rawtemp = stats->general.temp;
3436 temp = ops->get_temperature(sc);
3437 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: temperature %d\n",
3440 /* Update TX power if need be (4965AGN only). */
3441 if (sc->hw_type == IWN_HW_REV_TYPE_4965)
3442 iwn4965_power_calibration(sc, temp);
3445 if (desc->type != IWN_BEACON_STATISTICS)
3446 return; /* Reply to a statistics request. */
3448 sc->noise = iwn_get_noise(&lstats->rx.general);
3449 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: noise %d\n", __func__, sc->noise);
3451 /* Test that RSSI and noise are present in stats report. */
3452 if (le32toh(lstats->rx.general.flags) != 1) {
3453 DPRINTF(sc, IWN_DEBUG_ANY, "%s\n",
3454 "received statistics without RSSI");
3458 if (calib->state == IWN_CALIB_STATE_ASSOC)
3459 iwn_collect_noise(sc, &lstats->rx.general);
3460 else if (calib->state == IWN_CALIB_STATE_RUN) {
3461 iwn_tune_sensitivity(sc, &lstats->rx);
3463 * XXX TODO: Only run the RX recovery if we're associated!
3465 iwn_check_rx_recovery(sc, lstats);
3466 iwn_save_stats_counters(sc, lstats);
3469 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
3473 * Save the relevant statistic counters for the next calibration
3477 iwn_save_stats_counters(struct iwn_softc *sc, const struct iwn_stats *rs)
3479 struct iwn_calib_state *calib = &sc->calib;
3481 /* Save counters values for next call. */
3482 calib->bad_plcp_cck = le32toh(rs->rx.cck.bad_plcp);
3483 calib->fa_cck = le32toh(rs->rx.cck.fa);
3484 calib->bad_plcp_ht = le32toh(rs->rx.ht.bad_plcp);
3485 calib->bad_plcp_ofdm = le32toh(rs->rx.ofdm.bad_plcp);
3486 calib->fa_ofdm = le32toh(rs->rx.ofdm.fa);
3488 /* Last time we received these tick values */
3489 sc->last_calib_ticks = ticks;
3493 * Process a TX_DONE firmware notification. Unfortunately, the 4965AGN
3494 * and 5000 adapters have different incompatible TX status formats.
3497 iwn4965_tx_done(struct iwn_softc *sc, struct iwn_rx_desc *desc,
3498 struct iwn_rx_data *data)
3500 struct iwn4965_tx_stat *stat = (struct iwn4965_tx_stat *)(desc + 1);
3501 struct iwn_tx_ring *ring;
3504 qid = desc->qid & 0xf;
3505 ring = &sc->txq[qid];
3507 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: "
3508 "qid %d idx %d RTS retries %d ACK retries %d nkill %d rate %x duration %d status %x\n",
3509 __func__, desc->qid, desc->idx,
3513 stat->rate, le16toh(stat->duration),
3514 le32toh(stat->status));
3516 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_POSTREAD);
3517 if (qid >= sc->firstaggqueue) {
3518 iwn_ampdu_tx_done(sc, qid, desc->idx, stat->nframes,
3519 stat->rtsfailcnt, stat->ackfailcnt, &stat->status);
3521 iwn_tx_done(sc, desc, stat->rtsfailcnt, stat->ackfailcnt,
3522 le32toh(stat->status) & 0xff);
3527 iwn5000_tx_done(struct iwn_softc *sc, struct iwn_rx_desc *desc,
3528 struct iwn_rx_data *data)
3530 struct iwn5000_tx_stat *stat = (struct iwn5000_tx_stat *)(desc + 1);
3531 struct iwn_tx_ring *ring;
3534 qid = desc->qid & 0xf;
3535 ring = &sc->txq[qid];
3537 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: "
3538 "qid %d idx %d RTS retries %d ACK retries %d nkill %d rate %x duration %d status %x\n",
3539 __func__, desc->qid, desc->idx,
3543 stat->rate, le16toh(stat->duration),
3544 le32toh(stat->status));
3547 /* Reset TX scheduler slot. */
3548 iwn5000_reset_sched(sc, desc->qid & 0xf, desc->idx);
3551 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_POSTREAD);
3552 if (qid >= sc->firstaggqueue) {
3553 iwn_ampdu_tx_done(sc, qid, desc->idx, stat->nframes,
3554 stat->rtsfailcnt, stat->ackfailcnt, &stat->status);
3556 iwn_tx_done(sc, desc, stat->rtsfailcnt, stat->ackfailcnt,
3557 le16toh(stat->status) & 0xff);
3562 * Adapter-independent backend for TX_DONE firmware notifications.
3565 iwn_tx_done(struct iwn_softc *sc, struct iwn_rx_desc *desc, int rtsfailcnt,
3566 int ackfailcnt, uint8_t status)
3568 struct ieee80211_ratectl_tx_status *txs = &sc->sc_txs;
3569 struct iwn_tx_ring *ring = &sc->txq[desc->qid & 0xf];
3570 struct iwn_tx_data *data = &ring->data[desc->idx];
3572 struct ieee80211_node *ni;
3574 KASSERT(data->ni != NULL, ("no node"));
3576 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
3578 /* Unmap and free mbuf. */
3579 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_POSTWRITE);
3580 bus_dmamap_unload(ring->data_dmat, data->map);
3581 m = data->m, data->m = NULL;
3582 ni = data->ni, data->ni = NULL;
3585 * Update rate control statistics for the node.
3587 txs->flags = IEEE80211_RATECTL_STATUS_SHORT_RETRY |
3588 IEEE80211_RATECTL_STATUS_LONG_RETRY;
3589 txs->short_retries = rtsfailcnt;
3590 txs->long_retries = ackfailcnt;
3591 if (!(status & IWN_TX_FAIL))
3592 txs->status = IEEE80211_RATECTL_TX_SUCCESS;
3595 case IWN_TX_FAIL_SHORT_LIMIT:
3596 txs->status = IEEE80211_RATECTL_TX_FAIL_SHORT;
3598 case IWN_TX_FAIL_LONG_LIMIT:
3599 txs->status = IEEE80211_RATECTL_TX_FAIL_LONG;
3601 case IWN_TX_STATUS_FAIL_LIFE_EXPIRE:
3602 txs->status = IEEE80211_RATECTL_TX_FAIL_EXPIRED;
3605 txs->status = IEEE80211_RATECTL_TX_FAIL_UNSPECIFIED;
3609 ieee80211_ratectl_tx_complete(ni, txs);
3612 * Channels marked for "radar" require traffic to be received
3613 * to unlock before we can transmit. Until traffic is seen
3614 * any attempt to transmit is returned immediately with status
3615 * set to IWN_TX_FAIL_TX_LOCKED. Unfortunately this can easily
3616 * happen on first authenticate after scanning. To workaround
3617 * this we ignore a failure of this sort in AUTH state so the
3618 * 802.11 layer will fall back to using a timeout to wait for
3619 * the AUTH reply. This allows the firmware time to see
3620 * traffic so a subsequent retry of AUTH succeeds. It's
3621 * unclear why the firmware does not maintain state for
3622 * channels recently visited as this would allow immediate
3623 * use of the channel after a scan (where we see traffic).
3625 if (status == IWN_TX_FAIL_TX_LOCKED &&
3626 ni->ni_vap->iv_state == IEEE80211_S_AUTH)
3627 ieee80211_tx_complete(ni, m, 0);
3629 ieee80211_tx_complete(ni, m,
3630 (status & IWN_TX_FAIL) != 0);
3632 sc->sc_tx_timer = 0;
3633 if (--ring->queued < IWN_TX_RING_LOMARK)
3634 sc->qfullmsk &= ~(1 << ring->qid);
3636 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
3640 * Process a "command done" firmware notification. This is where we wakeup
3641 * processes waiting for a synchronous command completion.
3644 iwn_cmd_done(struct iwn_softc *sc, struct iwn_rx_desc *desc)
3646 struct iwn_tx_ring *ring;
3647 struct iwn_tx_data *data;
3650 if (sc->sc_flags & IWN_FLAG_PAN_SUPPORT)
3651 cmd_queue_num = IWN_PAN_CMD_QUEUE;
3653 cmd_queue_num = IWN_CMD_QUEUE_NUM;
3655 if ((desc->qid & IWN_RX_DESC_QID_MSK) != cmd_queue_num)
3656 return; /* Not a command ack. */
3658 ring = &sc->txq[cmd_queue_num];
3659 data = &ring->data[desc->idx];
3661 /* If the command was mapped in an mbuf, free it. */
3662 if (data->m != NULL) {
3663 bus_dmamap_sync(ring->data_dmat, data->map,
3664 BUS_DMASYNC_POSTWRITE);
3665 bus_dmamap_unload(ring->data_dmat, data->map);
3669 wakeup(&ring->desc[desc->idx]);
3673 iwn_ampdu_tx_done(struct iwn_softc *sc, int qid, int idx, int nframes,
3674 int rtsfailcnt, int ackfailcnt, void *stat)
3676 struct iwn_ops *ops = &sc->ops;
3677 struct iwn_tx_ring *ring = &sc->txq[qid];
3678 struct ieee80211_ratectl_tx_status *txs = &sc->sc_txs;
3679 struct iwn_tx_data *data;
3681 struct iwn_node *wn;
3682 struct ieee80211_node *ni;
3683 struct ieee80211_tx_ampdu *tap;
3685 uint32_t *status = stat;
3686 uint16_t *aggstatus = stat;
3689 int bit, i, lastidx, *res, seqno, shift, start;
3691 /* XXX TODO: status is le16 field! Grr */
3693 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
3694 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: nframes=%d, status=0x%08x\n",
3699 tap = sc->qid2tap[qid];
3701 wn = (void *)tap->txa_ni;
3705 * XXX TODO: ACK and RTS failures would be nice here!
3709 * A-MPDU single frame status - if we failed to transmit it
3710 * in A-MPDU, then it may be a permanent failure.
3712 * XXX TODO: check what the Linux iwlwifi driver does here;
3713 * there's some permanent and temporary failures that may be
3714 * handled differently.
3717 txs->flags = IEEE80211_RATECTL_STATUS_SHORT_RETRY |
3718 IEEE80211_RATECTL_STATUS_LONG_RETRY;
3719 txs->short_retries = rtsfailcnt;
3720 txs->long_retries = ackfailcnt;
3721 if ((*status & 0xff) != 1 && (*status & 0xff) != 2) {
3723 printf("ieee80211_send_bar()\n");
3726 * If we completely fail a transmit, make sure a
3727 * notification is pushed up to the rate control
3731 txs->status = IEEE80211_RATECTL_TX_FAIL_UNSPECIFIED;
3734 * If nframes=1, then we won't be getting a BA for
3735 * this frame. Ensure that we correctly update the
3736 * rate control code with how many retries were
3737 * needed to send it.
3739 txs->status = IEEE80211_RATECTL_TX_SUCCESS;
3741 ieee80211_ratectl_tx_complete(ni, txs);
3746 for (i = 0; i < nframes; i++) {
3747 if (le16toh(aggstatus[i * 2]) & 0xc)
3750 idx = le16toh(aggstatus[2*i + 1]) & 0xff;
3754 shift = 0x100 - idx + start;
3757 } else if (bit <= -64)
3758 bit = 0x100 - start + idx;
3760 shift = start - idx;
3764 bitmap = bitmap << shift;
3765 bitmap |= 1ULL << bit;
3767 tap = sc->qid2tap[qid];
3769 wn = (void *)tap->txa_ni;
3770 wn->agg[tid].bitmap = bitmap;
3771 wn->agg[tid].startidx = start;
3772 wn->agg[tid].nframes = nframes;
3776 if (!IEEE80211_AMPDU_RUNNING(tap)) {
3777 res = tap->txa_private;
3778 ssn = tap->txa_start & 0xfff;
3781 /* This is going nframes DWORDS into the descriptor? */
3782 seqno = le32toh(*(status + nframes)) & 0xfff;
3783 for (lastidx = (seqno & 0xff); ring->read != lastidx;) {
3784 data = &ring->data[ring->read];
3786 /* Unmap and free mbuf. */
3787 bus_dmamap_sync(ring->data_dmat, data->map,
3788 BUS_DMASYNC_POSTWRITE);
3789 bus_dmamap_unload(ring->data_dmat, data->map);
3790 m = data->m, data->m = NULL;
3791 ni = data->ni, data->ni = NULL;
3793 KASSERT(ni != NULL, ("no node"));
3794 KASSERT(m != NULL, ("no mbuf"));
3795 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: freeing m=%p\n", __func__, m);
3796 ieee80211_tx_complete(ni, m, 1);
3799 ring->read = (ring->read + 1) % IWN_TX_RING_COUNT;
3802 if (ring->queued == 0 && res != NULL) {
3804 ops->ampdu_tx_stop(sc, qid, tid, ssn);
3806 sc->qid2tap[qid] = NULL;
3807 free(res, M_DEVBUF);
3811 sc->sc_tx_timer = 0;
3812 if (ring->queued < IWN_TX_RING_LOMARK)
3813 sc->qfullmsk &= ~(1 << ring->qid);
3815 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
3819 * Process an INT_FH_RX or INT_SW_RX interrupt.
3822 iwn_notif_intr(struct iwn_softc *sc)
3824 struct iwn_ops *ops = &sc->ops;
3825 struct ieee80211com *ic = &sc->sc_ic;
3826 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
3829 bus_dmamap_sync(sc->rxq.stat_dma.tag, sc->rxq.stat_dma.map,
3830 BUS_DMASYNC_POSTREAD);
3832 hw = le16toh(sc->rxq.stat->closed_count) & 0xfff;
3833 while (sc->rxq.cur != hw) {
3834 struct iwn_rx_data *data = &sc->rxq.data[sc->rxq.cur];
3835 struct iwn_rx_desc *desc;
3837 bus_dmamap_sync(sc->rxq.data_dmat, data->map,
3838 BUS_DMASYNC_POSTREAD);
3839 desc = mtod(data->m, struct iwn_rx_desc *);
3841 DPRINTF(sc, IWN_DEBUG_RECV,
3842 "%s: cur=%d; qid %x idx %d flags %x type %d(%s) len %d\n",
3843 __func__, sc->rxq.cur, desc->qid & 0xf, desc->idx, desc->flags,
3844 desc->type, iwn_intr_str(desc->type),
3845 le16toh(desc->len));
3847 if (!(desc->qid & IWN_UNSOLICITED_RX_NOTIF)) /* Reply to a command. */
3848 iwn_cmd_done(sc, desc);
3850 switch (desc->type) {
3852 iwn_rx_phy(sc, desc, data);
3855 case IWN_RX_DONE: /* 4965AGN only. */
3856 case IWN_MPDU_RX_DONE:
3857 /* An 802.11 frame has been received. */
3858 iwn_rx_done(sc, desc, data);
3861 case IWN_RX_COMPRESSED_BA:
3862 /* A Compressed BlockAck has been received. */
3863 iwn_rx_compressed_ba(sc, desc, data);
3867 /* An 802.11 frame has been transmitted. */
3868 ops->tx_done(sc, desc, data);
3871 case IWN_RX_STATISTICS:
3872 case IWN_BEACON_STATISTICS:
3873 iwn_rx_statistics(sc, desc, data);
3876 case IWN_BEACON_MISSED:
3878 struct iwn_beacon_missed *miss =
3879 (struct iwn_beacon_missed *)(desc + 1);
3882 bus_dmamap_sync(sc->rxq.data_dmat, data->map,
3883 BUS_DMASYNC_POSTREAD);
3884 misses = le32toh(miss->consecutive);
3886 DPRINTF(sc, IWN_DEBUG_STATE,
3887 "%s: beacons missed %d/%d\n", __func__,
3888 misses, le32toh(miss->total));
3890 * If more than 5 consecutive beacons are missed,
3891 * reinitialize the sensitivity state machine.
3893 if (vap->iv_state == IEEE80211_S_RUN &&
3894 (ic->ic_flags & IEEE80211_F_SCAN) == 0) {
3896 (void)iwn_init_sensitivity(sc);
3897 if (misses >= vap->iv_bmissthreshold) {
3899 ieee80211_beacon_miss(ic);
3907 struct iwn_ucode_info *uc =
3908 (struct iwn_ucode_info *)(desc + 1);
3910 /* The microcontroller is ready. */
3911 bus_dmamap_sync(sc->rxq.data_dmat, data->map,
3912 BUS_DMASYNC_POSTREAD);
3913 DPRINTF(sc, IWN_DEBUG_RESET,
3914 "microcode alive notification version=%d.%d "
3915 "subtype=%x alive=%x\n", uc->major, uc->minor,
3916 uc->subtype, le32toh(uc->valid));
3918 if (le32toh(uc->valid) != 1) {
3919 device_printf(sc->sc_dev,
3920 "microcontroller initialization failed");
3923 if (uc->subtype == IWN_UCODE_INIT) {
3924 /* Save microcontroller report. */
3925 memcpy(&sc->ucode_info, uc, sizeof (*uc));
3927 /* Save the address of the error log in SRAM. */
3928 sc->errptr = le32toh(uc->errptr);
3931 case IWN_STATE_CHANGED:
3934 * State change allows hardware switch change to be
3935 * noted. However, we handle this in iwn_intr as we
3936 * get both the enable/disble intr.
3938 bus_dmamap_sync(sc->rxq.data_dmat, data->map,
3939 BUS_DMASYNC_POSTREAD);
3941 uint32_t *status = (uint32_t *)(desc + 1);
3942 DPRINTF(sc, IWN_DEBUG_INTR | IWN_DEBUG_STATE,
3943 "state changed to %x\n",
3948 case IWN_START_SCAN:
3950 bus_dmamap_sync(sc->rxq.data_dmat, data->map,
3951 BUS_DMASYNC_POSTREAD);
3953 struct iwn_start_scan *scan =
3954 (struct iwn_start_scan *)(desc + 1);
3955 DPRINTF(sc, IWN_DEBUG_ANY,
3956 "%s: scanning channel %d status %x\n",
3957 __func__, scan->chan, le32toh(scan->status));
3963 bus_dmamap_sync(sc->rxq.data_dmat, data->map,
3964 BUS_DMASYNC_POSTREAD);
3966 struct iwn_stop_scan *scan =
3967 (struct iwn_stop_scan *)(desc + 1);
3968 DPRINTF(sc, IWN_DEBUG_STATE | IWN_DEBUG_SCAN,
3969 "scan finished nchan=%d status=%d chan=%d\n",
3970 scan->nchan, scan->status, scan->chan);
3972 sc->sc_is_scanning = 0;
3973 callout_stop(&sc->scan_timeout);
3975 ieee80211_scan_next(vap);
3979 case IWN5000_CALIBRATION_RESULT:
3980 iwn5000_rx_calib_results(sc, desc, data);
3983 case IWN5000_CALIBRATION_DONE:
3984 sc->sc_flags |= IWN_FLAG_CALIB_DONE;
3989 sc->rxq.cur = (sc->rxq.cur + 1) % IWN_RX_RING_COUNT;
3992 /* Tell the firmware what we have processed. */
3993 hw = (hw == 0) ? IWN_RX_RING_COUNT - 1 : hw - 1;
3994 IWN_WRITE(sc, IWN_FH_RX_WPTR, hw & ~7);
3998 * Process an INT_WAKEUP interrupt raised when the microcontroller wakes up
3999 * from power-down sleep mode.
4002 iwn_wakeup_intr(struct iwn_softc *sc)
4006 DPRINTF(sc, IWN_DEBUG_RESET, "%s: ucode wakeup from power-down sleep\n",
4009 /* Wakeup RX and TX rings. */
4010 IWN_WRITE(sc, IWN_FH_RX_WPTR, sc->rxq.cur & ~7);
4011 for (qid = 0; qid < sc->ntxqs; qid++) {
4012 struct iwn_tx_ring *ring = &sc->txq[qid];
4013 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | ring->cur);
4018 iwn_rftoggle_task(void *arg, int npending)
4020 struct iwn_softc *sc = arg;
4021 struct ieee80211com *ic = &sc->sc_ic;
4025 tmp = IWN_READ(sc, IWN_GP_CNTRL);
4028 device_printf(sc->sc_dev, "RF switch: radio %s\n",
4029 (tmp & IWN_GP_CNTRL_RFKILL) ? "enabled" : "disabled");
4030 if (!(tmp & IWN_GP_CNTRL_RFKILL)) {
4031 ieee80211_suspend_all(ic);
4033 /* Enable interrupts to get RF toggle notification. */
4035 IWN_WRITE(sc, IWN_INT, 0xffffffff);
4036 IWN_WRITE(sc, IWN_INT_MASK, sc->int_mask);
4039 ieee80211_resume_all(ic);
4043 * Dump the error log of the firmware when a firmware panic occurs. Although
4044 * we can't debug the firmware because it is neither open source nor free, it
4045 * can help us to identify certain classes of problems.
4048 iwn_fatal_intr(struct iwn_softc *sc)
4050 struct iwn_fw_dump dump;
4053 IWN_LOCK_ASSERT(sc);
4055 /* Force a complete recalibration on next init. */
4056 sc->sc_flags &= ~IWN_FLAG_CALIB_DONE;
4058 /* Check that the error log address is valid. */
4059 if (sc->errptr < IWN_FW_DATA_BASE ||
4060 sc->errptr + sizeof (dump) >
4061 IWN_FW_DATA_BASE + sc->fw_data_maxsz) {
4062 printf("%s: bad firmware error log address 0x%08x\n", __func__,
4066 if (iwn_nic_lock(sc) != 0) {
4067 printf("%s: could not read firmware error log\n", __func__);
4070 /* Read firmware error log from SRAM. */
4071 iwn_mem_read_region_4(sc, sc->errptr, (uint32_t *)&dump,
4072 sizeof (dump) / sizeof (uint32_t));
4075 if (dump.valid == 0) {
4076 printf("%s: firmware error log is empty\n", __func__);
4079 printf("firmware error log:\n");
4080 printf(" error type = \"%s\" (0x%08X)\n",
4081 (dump.id < nitems(iwn_fw_errmsg)) ?
4082 iwn_fw_errmsg[dump.id] : "UNKNOWN",
4084 printf(" program counter = 0x%08X\n", dump.pc);
4085 printf(" source line = 0x%08X\n", dump.src_line);
4086 printf(" error data = 0x%08X%08X\n",
4087 dump.error_data[0], dump.error_data[1]);
4088 printf(" branch link = 0x%08X%08X\n",
4089 dump.branch_link[0], dump.branch_link[1]);
4090 printf(" interrupt link = 0x%08X%08X\n",
4091 dump.interrupt_link[0], dump.interrupt_link[1]);
4092 printf(" time = %u\n", dump.time[0]);
4094 /* Dump driver status (TX and RX rings) while we're here. */
4095 printf("driver status:\n");
4096 for (i = 0; i < sc->ntxqs; i++) {
4097 struct iwn_tx_ring *ring = &sc->txq[i];
4098 printf(" tx ring %2d: qid=%-2d cur=%-3d queued=%-3d\n",
4099 i, ring->qid, ring->cur, ring->queued);
4101 printf(" rx ring: cur=%d\n", sc->rxq.cur);
4107 struct iwn_softc *sc = arg;
4108 uint32_t r1, r2, tmp;
4112 /* Disable interrupts. */
4113 IWN_WRITE(sc, IWN_INT_MASK, 0);
4115 /* Read interrupts from ICT (fast) or from registers (slow). */
4116 if (sc->sc_flags & IWN_FLAG_USE_ICT) {
4117 bus_dmamap_sync(sc->ict_dma.tag, sc->ict_dma.map,
4118 BUS_DMASYNC_POSTREAD);
4120 while (sc->ict[sc->ict_cur] != 0) {
4121 tmp |= sc->ict[sc->ict_cur];
4122 sc->ict[sc->ict_cur] = 0; /* Acknowledge. */
4123 sc->ict_cur = (sc->ict_cur + 1) % IWN_ICT_COUNT;
4126 if (tmp == 0xffffffff) /* Shouldn't happen. */
4128 else if (tmp & 0xc0000) /* Workaround a HW bug. */
4130 r1 = (tmp & 0xff00) << 16 | (tmp & 0xff);
4131 r2 = 0; /* Unused. */
4133 r1 = IWN_READ(sc, IWN_INT);
4134 if (r1 == 0xffffffff || (r1 & 0xfffffff0) == 0xa5a5a5a0) {
4136 return; /* Hardware gone! */
4138 r2 = IWN_READ(sc, IWN_FH_INT);
4141 DPRINTF(sc, IWN_DEBUG_INTR, "interrupt reg1=0x%08x reg2=0x%08x\n"
4144 if (r1 == 0 && r2 == 0)
4145 goto done; /* Interrupt not for us. */
4147 /* Acknowledge interrupts. */
4148 IWN_WRITE(sc, IWN_INT, r1);
4149 if (!(sc->sc_flags & IWN_FLAG_USE_ICT))
4150 IWN_WRITE(sc, IWN_FH_INT, r2);
4152 if (r1 & IWN_INT_RF_TOGGLED) {
4153 taskqueue_enqueue(sc->sc_tq, &sc->sc_rftoggle_task);
4156 if (r1 & IWN_INT_CT_REACHED) {
4157 device_printf(sc->sc_dev, "%s: critical temperature reached!\n",
4160 if (r1 & (IWN_INT_SW_ERR | IWN_INT_HW_ERR)) {
4161 device_printf(sc->sc_dev, "%s: fatal firmware error\n",
4164 iwn_debug_register(sc);
4166 /* Dump firmware error log and stop. */
4169 taskqueue_enqueue(sc->sc_tq, &sc->sc_panic_task);
4172 if ((r1 & (IWN_INT_FH_RX | IWN_INT_SW_RX | IWN_INT_RX_PERIODIC)) ||
4173 (r2 & IWN_FH_INT_RX)) {
4174 if (sc->sc_flags & IWN_FLAG_USE_ICT) {
4175 if (r1 & (IWN_INT_FH_RX | IWN_INT_SW_RX))
4176 IWN_WRITE(sc, IWN_FH_INT, IWN_FH_INT_RX);
4177 IWN_WRITE_1(sc, IWN_INT_PERIODIC,
4178 IWN_INT_PERIODIC_DIS);
4180 if (r1 & (IWN_INT_FH_RX | IWN_INT_SW_RX)) {
4181 IWN_WRITE_1(sc, IWN_INT_PERIODIC,
4182 IWN_INT_PERIODIC_ENA);
4188 if ((r1 & IWN_INT_FH_TX) || (r2 & IWN_FH_INT_TX)) {
4189 if (sc->sc_flags & IWN_FLAG_USE_ICT)
4190 IWN_WRITE(sc, IWN_FH_INT, IWN_FH_INT_TX);
4191 wakeup(sc); /* FH DMA transfer completed. */
4194 if (r1 & IWN_INT_ALIVE)
4195 wakeup(sc); /* Firmware is alive. */
4197 if (r1 & IWN_INT_WAKEUP)
4198 iwn_wakeup_intr(sc);
4201 /* Re-enable interrupts. */
4202 if (sc->sc_flags & IWN_FLAG_RUNNING)
4203 IWN_WRITE(sc, IWN_INT_MASK, sc->int_mask);
4209 * Update TX scheduler ring when transmitting an 802.11 frame (4965AGN and
4210 * 5000 adapters use a slightly different format).
4213 iwn4965_update_sched(struct iwn_softc *sc, int qid, int idx, uint8_t id,
4216 uint16_t *w = &sc->sched[qid * IWN4965_SCHED_COUNT + idx];
4218 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
4220 *w = htole16(len + 8);
4221 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
4222 BUS_DMASYNC_PREWRITE);
4223 if (idx < IWN_SCHED_WINSZ) {
4224 *(w + IWN_TX_RING_COUNT) = *w;
4225 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
4226 BUS_DMASYNC_PREWRITE);
4231 iwn5000_update_sched(struct iwn_softc *sc, int qid, int idx, uint8_t id,
4234 uint16_t *w = &sc->sched[qid * IWN5000_SCHED_COUNT + idx];
4236 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
4238 *w = htole16(id << 12 | (len + 8));
4239 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
4240 BUS_DMASYNC_PREWRITE);
4241 if (idx < IWN_SCHED_WINSZ) {
4242 *(w + IWN_TX_RING_COUNT) = *w;
4243 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
4244 BUS_DMASYNC_PREWRITE);
4250 iwn5000_reset_sched(struct iwn_softc *sc, int qid, int idx)
4252 uint16_t *w = &sc->sched[qid * IWN5000_SCHED_COUNT + idx];
4254 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
4256 *w = (*w & htole16(0xf000)) | htole16(1);
4257 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
4258 BUS_DMASYNC_PREWRITE);
4259 if (idx < IWN_SCHED_WINSZ) {
4260 *(w + IWN_TX_RING_COUNT) = *w;
4261 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
4262 BUS_DMASYNC_PREWRITE);
4268 * Check whether OFDM 11g protection will be enabled for the given rate.
4270 * The original driver code only enabled protection for OFDM rates.
4271 * It didn't check to see whether it was operating in 11a or 11bg mode.
4274 iwn_check_rate_needs_protection(struct iwn_softc *sc,
4275 struct ieee80211vap *vap, uint8_t rate)
4277 struct ieee80211com *ic = vap->iv_ic;
4280 * Not in 2GHz mode? Then there's no need to enable OFDM
4283 if (! IEEE80211_IS_CHAN_2GHZ(ic->ic_curchan)) {
4288 * 11bg protection not enabled? Then don't use it.
4290 if ((ic->ic_flags & IEEE80211_F_USEPROT) == 0)
4294 * If it's an 11n rate - no protection.
4295 * We'll do it via a specific 11n check.
4297 if (rate & IEEE80211_RATE_MCS) {
4302 * Do a rate table lookup. If the PHY is CCK,
4303 * don't do protection.
4305 if (ieee80211_rate2phytype(ic->ic_rt, rate) == IEEE80211_T_CCK)
4309 * Yup, enable protection.
4315 * return a value between 0 and IWN_MAX_TX_RETRIES-1 as an index into
4316 * the link quality table that reflects this particular entry.
4319 iwn_tx_rate_to_linkq_offset(struct iwn_softc *sc, struct ieee80211_node *ni,
4322 struct ieee80211_rateset *rs;
4329 * Figure out if we're using 11n or not here.
4331 if (IEEE80211_IS_CHAN_HT(ni->ni_chan) && ni->ni_htrates.rs_nrates > 0)
4337 * Use the correct rate table.
4340 rs = (struct ieee80211_rateset *) &ni->ni_htrates;
4341 nr = ni->ni_htrates.rs_nrates;
4348 * Find the relevant link quality entry in the table.
4350 for (i = 0; i < nr && i < IWN_MAX_TX_RETRIES - 1 ; i++) {
4352 * The link quality table index starts at 0 == highest
4353 * rate, so we walk the rate table backwards.
4355 cmp_rate = rs->rs_rates[(nr - 1) - i];
4356 if (rate & IEEE80211_RATE_MCS)
4357 cmp_rate |= IEEE80211_RATE_MCS;
4360 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: idx %d: nr=%d, rate=0x%02x, rateentry=0x%02x\n",
4368 if (cmp_rate == rate)
4372 /* Failed? Start at the end */
4373 return (IWN_MAX_TX_RETRIES - 1);
4377 iwn_tx_data(struct iwn_softc *sc, struct mbuf *m, struct ieee80211_node *ni)
4379 struct iwn_ops *ops = &sc->ops;
4380 const struct ieee80211_txparam *tp = ni->ni_txparms;
4381 struct ieee80211vap *vap = ni->ni_vap;
4382 struct ieee80211com *ic = ni->ni_ic;
4383 struct iwn_node *wn = (void *)ni;
4384 struct iwn_tx_ring *ring;
4385 struct iwn_tx_desc *desc;
4386 struct iwn_tx_data *data;
4387 struct iwn_tx_cmd *cmd;
4388 struct iwn_cmd_data *tx;
4389 struct ieee80211_frame *wh;
4390 struct ieee80211_key *k = NULL;
4395 bus_dma_segment_t *seg, segs[IWN_MAX_SCATTER];
4397 int ac, i, totlen, error, pad, nsegs = 0, rate;
4399 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
4401 IWN_LOCK_ASSERT(sc);
4403 wh = mtod(m, struct ieee80211_frame *);
4404 hdrlen = ieee80211_anyhdrsize(wh);
4405 type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK;
4407 /* Select EDCA Access Category and TX ring for this frame. */
4408 if (IEEE80211_QOS_HAS_SEQ(wh)) {
4409 qos = ((const struct ieee80211_qosframe *)wh)->i_qos[0];
4410 tid = qos & IEEE80211_QOS_TID;
4415 ac = M_WME_GETAC(m);
4418 * XXX TODO: Group addressed frames aren't aggregated and must
4419 * go to the normal non-aggregation queue, and have a NONQOS TID
4420 * assigned from net80211.
4423 if (m->m_flags & M_AMPDU_MPDU) {
4425 struct ieee80211_tx_ampdu *tap = &ni->ni_tx_ampdu[ac];
4427 if (!IEEE80211_AMPDU_RUNNING(tap)) {
4432 * Queue this frame to the hardware ring that we've
4433 * negotiated AMPDU TX on.
4435 * Note that the sequence number must match the TX slot
4438 ac = *(int *)tap->txa_private;
4439 seqno = ni->ni_txseqs[tid];
4440 *(uint16_t *)wh->i_seq =
4441 htole16(seqno << IEEE80211_SEQ_SEQ_SHIFT);
4442 ring = &sc->txq[ac];
4443 if ((seqno % 256) != ring->cur) {
4444 device_printf(sc->sc_dev,
4445 "%s: m=%p: seqno (%d) (%d) != ring index (%d) !\n",
4452 ni->ni_txseqs[tid]++;
4454 ring = &sc->txq[ac];
4455 desc = &ring->desc[ring->cur];
4456 data = &ring->data[ring->cur];
4458 /* Choose a TX rate index. */
4459 if (type == IEEE80211_FC0_TYPE_MGT ||
4460 type == IEEE80211_FC0_TYPE_CTL ||
4461 (m->m_flags & M_EAPOL) != 0)
4462 rate = tp->mgmtrate;
4463 else if (IEEE80211_IS_MULTICAST(wh->i_addr1))
4464 rate = tp->mcastrate;
4465 else if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE)
4466 rate = tp->ucastrate;
4468 /* XXX pass pktlen */
4469 (void) ieee80211_ratectl_rate(ni, NULL, 0);
4470 rate = ni->ni_txrate;
4473 /* Encrypt the frame if need be. */
4474 if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) {
4475 /* Retrieve key for TX. */
4476 k = ieee80211_crypto_encap(ni, m);
4480 /* 802.11 header may have moved. */
4481 wh = mtod(m, struct ieee80211_frame *);
4483 totlen = m->m_pkthdr.len;
4485 if (ieee80211_radiotap_active_vap(vap)) {
4486 struct iwn_tx_radiotap_header *tap = &sc->sc_txtap;
4489 tap->wt_rate = rate;
4491 tap->wt_flags |= IEEE80211_RADIOTAP_F_WEP;
4493 ieee80211_radiotap_tx(vap, m);
4496 /* Prepare TX firmware command. */
4497 cmd = &ring->cmd[ring->cur];
4498 cmd->code = IWN_CMD_TX_DATA;
4500 cmd->qid = ring->qid;
4501 cmd->idx = ring->cur;
4503 tx = (struct iwn_cmd_data *)cmd->data;
4504 /* NB: No need to clear tx, all fields are reinitialized here. */
4505 tx->scratch = 0; /* clear "scratch" area */
4508 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
4509 /* Unicast frame, check if an ACK is expected. */
4510 if (!qos || (qos & IEEE80211_QOS_ACKPOLICY) !=
4511 IEEE80211_QOS_ACKPOLICY_NOACK)
4512 flags |= IWN_TX_NEED_ACK;
4515 (IEEE80211_FC0_TYPE_MASK | IEEE80211_FC0_SUBTYPE_MASK)) ==
4516 (IEEE80211_FC0_TYPE_CTL | IEEE80211_FC0_SUBTYPE_BAR))
4517 flags |= IWN_TX_IMM_BA; /* Cannot happen yet. */
4519 if (wh->i_fc[1] & IEEE80211_FC1_MORE_FRAG)
4520 flags |= IWN_TX_MORE_FRAG; /* Cannot happen yet. */
4522 /* Check if frame must be protected using RTS/CTS or CTS-to-self. */
4523 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
4524 /* NB: Group frames are sent using CCK in 802.11b/g. */
4525 if (totlen + IEEE80211_CRC_LEN > vap->iv_rtsthreshold) {
4526 flags |= IWN_TX_NEED_RTS;
4527 } else if (iwn_check_rate_needs_protection(sc, vap, rate)) {
4528 if (ic->ic_protmode == IEEE80211_PROT_CTSONLY)
4529 flags |= IWN_TX_NEED_CTS;
4530 else if (ic->ic_protmode == IEEE80211_PROT_RTSCTS)
4531 flags |= IWN_TX_NEED_RTS;
4532 } else if ((rate & IEEE80211_RATE_MCS) &&
4533 (ic->ic_htprotmode == IEEE80211_PROT_RTSCTS)) {
4534 flags |= IWN_TX_NEED_RTS;
4537 /* XXX HT protection? */
4539 if (flags & (IWN_TX_NEED_RTS | IWN_TX_NEED_CTS)) {
4540 if (sc->hw_type != IWN_HW_REV_TYPE_4965) {
4541 /* 5000 autoselects RTS/CTS or CTS-to-self. */
4542 flags &= ~(IWN_TX_NEED_RTS | IWN_TX_NEED_CTS);
4543 flags |= IWN_TX_NEED_PROTECTION;
4545 flags |= IWN_TX_FULL_TXOP;
4549 if (IEEE80211_IS_MULTICAST(wh->i_addr1) ||
4550 type != IEEE80211_FC0_TYPE_DATA)
4551 tx->id = sc->broadcast_id;
4555 if (type == IEEE80211_FC0_TYPE_MGT) {
4556 uint8_t subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
4558 /* Tell HW to set timestamp in probe responses. */
4559 if (subtype == IEEE80211_FC0_SUBTYPE_PROBE_RESP)
4560 flags |= IWN_TX_INSERT_TSTAMP;
4561 if (subtype == IEEE80211_FC0_SUBTYPE_ASSOC_REQ ||
4562 subtype == IEEE80211_FC0_SUBTYPE_REASSOC_REQ)
4563 tx->timeout = htole16(3);
4565 tx->timeout = htole16(2);
4567 tx->timeout = htole16(0);
4570 /* First segment length must be a multiple of 4. */
4571 flags |= IWN_TX_NEED_PADDING;
4572 pad = 4 - (hdrlen & 3);
4576 tx->len = htole16(totlen);
4578 tx->rts_ntries = 60;
4579 tx->data_ntries = 15;
4580 tx->lifetime = htole32(IWN_LIFETIME_INFINITE);
4581 tx->rate = iwn_rate_to_plcp(sc, ni, rate);
4582 if (tx->id == sc->broadcast_id) {
4583 /* Group or management frame. */
4586 tx->linkq = iwn_tx_rate_to_linkq_offset(sc, ni, rate);
4587 flags |= IWN_TX_LINKQ; /* enable MRR */
4590 /* Set physical address of "scratch area". */
4591 tx->loaddr = htole32(IWN_LOADDR(data->scratch_paddr));
4592 tx->hiaddr = IWN_HIADDR(data->scratch_paddr);
4594 /* Copy 802.11 header in TX command. */
4595 memcpy((uint8_t *)(tx + 1), wh, hdrlen);
4597 /* Trim 802.11 header. */
4600 tx->flags = htole32(flags);
4602 error = bus_dmamap_load_mbuf_sg(ring->data_dmat, data->map, m, segs,
4603 &nsegs, BUS_DMA_NOWAIT);
4605 if (error != EFBIG) {
4606 device_printf(sc->sc_dev,
4607 "%s: can't map mbuf (error %d)\n", __func__, error);
4610 /* Too many DMA segments, linearize mbuf. */
4611 m1 = m_collapse(m, M_NOWAIT, IWN_MAX_SCATTER - 1);
4613 device_printf(sc->sc_dev,
4614 "%s: could not defrag mbuf\n", __func__);
4619 error = bus_dmamap_load_mbuf_sg(ring->data_dmat, data->map, m,
4620 segs, &nsegs, BUS_DMA_NOWAIT);
4622 device_printf(sc->sc_dev,
4623 "%s: can't map mbuf (error %d)\n", __func__, error);
4631 DPRINTF(sc, IWN_DEBUG_XMIT,
4632 "%s: qid %d idx %d len %d nsegs %d flags 0x%08x rate 0x%04x plcp 0x%08x\n",
4642 /* Fill TX descriptor. */
4645 desc->nsegs += nsegs;
4646 /* First DMA segment is used by the TX command. */
4647 desc->segs[0].addr = htole32(IWN_LOADDR(data->cmd_paddr));
4648 desc->segs[0].len = htole16(IWN_HIADDR(data->cmd_paddr) |
4649 (4 + sizeof (*tx) + hdrlen + pad) << 4);
4650 /* Other DMA segments are for data payload. */
4652 for (i = 1; i <= nsegs; i++) {
4653 desc->segs[i].addr = htole32(IWN_LOADDR(seg->ds_addr));
4654 desc->segs[i].len = htole16(IWN_HIADDR(seg->ds_addr) |
4659 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_PREWRITE);
4660 bus_dmamap_sync(ring->cmd_dma.tag, ring->cmd_dma.map,
4661 BUS_DMASYNC_PREWRITE);
4662 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
4663 BUS_DMASYNC_PREWRITE);
4665 /* Update TX scheduler. */
4666 if (ring->qid >= sc->firstaggqueue)
4667 ops->update_sched(sc, ring->qid, ring->cur, tx->id, totlen);
4670 ring->cur = (ring->cur + 1) % IWN_TX_RING_COUNT;
4671 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, ring->qid << 8 | ring->cur);
4673 /* Mark TX ring as full if we reach a certain threshold. */
4674 if (++ring->queued > IWN_TX_RING_HIMARK)
4675 sc->qfullmsk |= 1 << ring->qid;
4677 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
4683 iwn_tx_data_raw(struct iwn_softc *sc, struct mbuf *m,
4684 struct ieee80211_node *ni, const struct ieee80211_bpf_params *params)
4686 struct iwn_ops *ops = &sc->ops;
4687 struct ieee80211vap *vap = ni->ni_vap;
4688 struct iwn_tx_cmd *cmd;
4689 struct iwn_cmd_data *tx;
4690 struct ieee80211_frame *wh;
4691 struct iwn_tx_ring *ring;
4692 struct iwn_tx_desc *desc;
4693 struct iwn_tx_data *data;
4695 bus_dma_segment_t *seg, segs[IWN_MAX_SCATTER];
4698 int ac, totlen, error, pad, nsegs = 0, i, rate;
4701 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
4703 IWN_LOCK_ASSERT(sc);
4705 wh = mtod(m, struct ieee80211_frame *);
4706 hdrlen = ieee80211_anyhdrsize(wh);
4707 type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK;
4709 ac = params->ibp_pri & 3;
4711 ring = &sc->txq[ac];
4712 desc = &ring->desc[ring->cur];
4713 data = &ring->data[ring->cur];
4715 /* Choose a TX rate. */
4716 rate = params->ibp_rate0;
4717 totlen = m->m_pkthdr.len;
4719 /* Prepare TX firmware command. */
4720 cmd = &ring->cmd[ring->cur];
4721 cmd->code = IWN_CMD_TX_DATA;
4723 cmd->qid = ring->qid;
4724 cmd->idx = ring->cur;
4726 tx = (struct iwn_cmd_data *)cmd->data;
4727 /* NB: No need to clear tx, all fields are reinitialized here. */
4728 tx->scratch = 0; /* clear "scratch" area */
4731 if ((params->ibp_flags & IEEE80211_BPF_NOACK) == 0)
4732 flags |= IWN_TX_NEED_ACK;
4733 if (params->ibp_flags & IEEE80211_BPF_RTS) {
4734 if (sc->hw_type != IWN_HW_REV_TYPE_4965) {
4735 /* 5000 autoselects RTS/CTS or CTS-to-self. */
4736 flags &= ~IWN_TX_NEED_RTS;
4737 flags |= IWN_TX_NEED_PROTECTION;
4739 flags |= IWN_TX_NEED_RTS | IWN_TX_FULL_TXOP;
4741 if (params->ibp_flags & IEEE80211_BPF_CTS) {
4742 if (sc->hw_type != IWN_HW_REV_TYPE_4965) {
4743 /* 5000 autoselects RTS/CTS or CTS-to-self. */
4744 flags &= ~IWN_TX_NEED_CTS;
4745 flags |= IWN_TX_NEED_PROTECTION;
4747 flags |= IWN_TX_NEED_CTS | IWN_TX_FULL_TXOP;
4749 if (type == IEEE80211_FC0_TYPE_MGT) {
4750 uint8_t subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
4752 /* Tell HW to set timestamp in probe responses. */
4753 if (subtype == IEEE80211_FC0_SUBTYPE_PROBE_RESP)
4754 flags |= IWN_TX_INSERT_TSTAMP;
4756 if (subtype == IEEE80211_FC0_SUBTYPE_ASSOC_REQ ||
4757 subtype == IEEE80211_FC0_SUBTYPE_REASSOC_REQ)
4758 tx->timeout = htole16(3);
4760 tx->timeout = htole16(2);
4762 tx->timeout = htole16(0);
4765 /* First segment length must be a multiple of 4. */
4766 flags |= IWN_TX_NEED_PADDING;
4767 pad = 4 - (hdrlen & 3);
4771 if (ieee80211_radiotap_active_vap(vap)) {
4772 struct iwn_tx_radiotap_header *tap = &sc->sc_txtap;
4775 tap->wt_rate = rate;
4777 ieee80211_radiotap_tx(vap, m);
4780 tx->len = htole16(totlen);
4782 tx->id = sc->broadcast_id;
4783 tx->rts_ntries = params->ibp_try1;
4784 tx->data_ntries = params->ibp_try0;
4785 tx->lifetime = htole32(IWN_LIFETIME_INFINITE);
4786 tx->rate = iwn_rate_to_plcp(sc, ni, rate);
4788 /* Group or management frame. */
4791 /* Set physical address of "scratch area". */
4792 tx->loaddr = htole32(IWN_LOADDR(data->scratch_paddr));
4793 tx->hiaddr = IWN_HIADDR(data->scratch_paddr);
4795 /* Copy 802.11 header in TX command. */
4796 memcpy((uint8_t *)(tx + 1), wh, hdrlen);
4798 /* Trim 802.11 header. */
4801 tx->flags = htole32(flags);
4803 error = bus_dmamap_load_mbuf_sg(ring->data_dmat, data->map, m, segs,
4804 &nsegs, BUS_DMA_NOWAIT);
4806 if (error != EFBIG) {
4807 device_printf(sc->sc_dev,
4808 "%s: can't map mbuf (error %d)\n", __func__, error);
4811 /* Too many DMA segments, linearize mbuf. */
4812 m1 = m_collapse(m, M_NOWAIT, IWN_MAX_SCATTER - 1);
4814 device_printf(sc->sc_dev,
4815 "%s: could not defrag mbuf\n", __func__);
4820 error = bus_dmamap_load_mbuf_sg(ring->data_dmat, data->map, m,
4821 segs, &nsegs, BUS_DMA_NOWAIT);
4823 device_printf(sc->sc_dev,
4824 "%s: can't map mbuf (error %d)\n", __func__, error);
4832 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: qid %d idx %d len %d nsegs %d\n",
4833 __func__, ring->qid, ring->cur, m->m_pkthdr.len, nsegs);
4835 /* Fill TX descriptor. */
4838 desc->nsegs += nsegs;
4839 /* First DMA segment is used by the TX command. */
4840 desc->segs[0].addr = htole32(IWN_LOADDR(data->cmd_paddr));
4841 desc->segs[0].len = htole16(IWN_HIADDR(data->cmd_paddr) |
4842 (4 + sizeof (*tx) + hdrlen + pad) << 4);
4843 /* Other DMA segments are for data payload. */
4845 for (i = 1; i <= nsegs; i++) {
4846 desc->segs[i].addr = htole32(IWN_LOADDR(seg->ds_addr));
4847 desc->segs[i].len = htole16(IWN_HIADDR(seg->ds_addr) |
4852 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_PREWRITE);
4853 bus_dmamap_sync(ring->cmd_dma.tag, ring->cmd_dma.map,
4854 BUS_DMASYNC_PREWRITE);
4855 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
4856 BUS_DMASYNC_PREWRITE);
4858 /* Update TX scheduler. */
4859 if (ring->qid >= sc->firstaggqueue)
4860 ops->update_sched(sc, ring->qid, ring->cur, tx->id, totlen);
4863 ring->cur = (ring->cur + 1) % IWN_TX_RING_COUNT;
4864 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, ring->qid << 8 | ring->cur);
4866 /* Mark TX ring as full if we reach a certain threshold. */
4867 if (++ring->queued > IWN_TX_RING_HIMARK)
4868 sc->qfullmsk |= 1 << ring->qid;
4870 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
4876 iwn_xmit_task(void *arg0, int pending)
4878 struct iwn_softc *sc = arg0;
4879 struct ieee80211_node *ni;
4882 struct ieee80211_bpf_params p;
4885 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: called\n", __func__);
4889 * Dequeue frames, attempt to transmit,
4890 * then disable beaconwait when we're done.
4892 while ((m = mbufq_dequeue(&sc->sc_xmit_queue)) != NULL) {
4894 ni = (struct ieee80211_node *)m->m_pkthdr.rcvif;
4896 /* Get xmit params if appropriate */
4897 if (ieee80211_get_xmit_params(m, &p) == 0)
4900 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: m=%p, have_p=%d\n",
4901 __func__, m, have_p);
4903 /* If we have xmit params, use them */
4905 error = iwn_tx_data_raw(sc, m, ni, &p);
4907 error = iwn_tx_data(sc, m, ni);
4910 if_inc_counter(ni->ni_vap->iv_ifp,
4911 IFCOUNTER_OERRORS, 1);
4912 ieee80211_free_node(ni);
4917 sc->sc_beacon_wait = 0;
4922 * raw frame xmit - free node/reference if failed.
4925 iwn_raw_xmit(struct ieee80211_node *ni, struct mbuf *m,
4926 const struct ieee80211_bpf_params *params)
4928 struct ieee80211com *ic = ni->ni_ic;
4929 struct iwn_softc *sc = ic->ic_softc;
4932 DPRINTF(sc, IWN_DEBUG_XMIT | IWN_DEBUG_TRACE, "->%s begin\n", __func__);
4935 if ((sc->sc_flags & IWN_FLAG_RUNNING) == 0) {
4941 /* queue frame if we have to */
4942 if (sc->sc_beacon_wait) {
4943 if (iwn_xmit_queue_enqueue(sc, m) != 0) {
4948 /* Queued, so just return OK */
4953 if (params == NULL) {
4955 * Legacy path; interpret frame contents to decide
4956 * precisely how to send the frame.
4958 error = iwn_tx_data(sc, m, ni);
4961 * Caller supplied explicit parameters to use in
4962 * sending the frame.
4964 error = iwn_tx_data_raw(sc, m, ni, params);
4967 sc->sc_tx_timer = 5;
4973 DPRINTF(sc, IWN_DEBUG_TRACE | IWN_DEBUG_XMIT, "->%s: end\n",__func__);
4979 * transmit - don't free mbuf if failed; don't free node ref if failed.
4982 iwn_transmit(struct ieee80211com *ic, struct mbuf *m)
4984 struct iwn_softc *sc = ic->ic_softc;
4985 struct ieee80211_node *ni;
4988 ni = (struct ieee80211_node *)m->m_pkthdr.rcvif;
4991 if ((sc->sc_flags & IWN_FLAG_RUNNING) == 0 || sc->sc_beacon_wait) {
5001 error = iwn_tx_data(sc, m, ni);
5003 sc->sc_tx_timer = 5;
5009 iwn_scan_timeout(void *arg)
5011 struct iwn_softc *sc = arg;
5012 struct ieee80211com *ic = &sc->sc_ic;
5014 ic_printf(ic, "scan timeout\n");
5015 ieee80211_restart_all(ic);
5019 iwn_watchdog(void *arg)
5021 struct iwn_softc *sc = arg;
5022 struct ieee80211com *ic = &sc->sc_ic;
5024 IWN_LOCK_ASSERT(sc);
5026 KASSERT(sc->sc_flags & IWN_FLAG_RUNNING, ("not running"));
5028 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5030 if (sc->sc_tx_timer > 0) {
5031 if (--sc->sc_tx_timer == 0) {
5032 ic_printf(ic, "device timeout\n");
5033 ieee80211_restart_all(ic);
5037 callout_reset(&sc->watchdog_to, hz, iwn_watchdog, sc);
5041 iwn_cdev_open(struct cdev *dev, int flags, int type, struct thread *td)
5048 iwn_cdev_close(struct cdev *dev, int flags, int type, struct thread *td)
5055 iwn_cdev_ioctl(struct cdev *dev, unsigned long cmd, caddr_t data, int fflag,
5059 struct iwn_softc *sc = dev->si_drv1;
5060 struct iwn_ioctl_data *d;
5062 rc = priv_check(td, PRIV_DRIVER);
5068 d = (struct iwn_ioctl_data *) data;
5070 /* XXX validate permissions/memory/etc? */
5071 rc = copyout(&sc->last_stat, d->dst_addr, sizeof(struct iwn_stats));
5076 memset(&sc->last_stat, 0, sizeof(struct iwn_stats));
5087 iwn_ioctl(struct ieee80211com *ic, u_long cmd, void *data)
5094 iwn_parent(struct ieee80211com *ic)
5096 struct iwn_softc *sc = ic->ic_softc;
5097 struct ieee80211vap *vap;
5100 if (ic->ic_nrunning > 0) {
5101 error = iwn_init(sc);
5105 ieee80211_start_all(ic);
5108 /* radio is disabled via RFkill switch */
5109 taskqueue_enqueue(sc->sc_tq, &sc->sc_rftoggle_task);
5112 vap = TAILQ_FIRST(&ic->ic_vaps);
5114 ieee80211_stop(vap);
5122 * Send a command to the firmware.
5125 iwn_cmd(struct iwn_softc *sc, int code, const void *buf, int size, int async)
5127 struct iwn_tx_ring *ring;
5128 struct iwn_tx_desc *desc;
5129 struct iwn_tx_data *data;
5130 struct iwn_tx_cmd *cmd;
5136 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
5139 IWN_LOCK_ASSERT(sc);
5141 if (sc->sc_flags & IWN_FLAG_PAN_SUPPORT)
5142 cmd_queue_num = IWN_PAN_CMD_QUEUE;
5144 cmd_queue_num = IWN_CMD_QUEUE_NUM;
5146 ring = &sc->txq[cmd_queue_num];
5147 desc = &ring->desc[ring->cur];
5148 data = &ring->data[ring->cur];
5151 if (size > sizeof cmd->data) {
5152 /* Command is too large to fit in a descriptor. */
5153 if (totlen > MCLBYTES)
5155 m = m_getjcl(M_NOWAIT, MT_DATA, M_PKTHDR, MJUMPAGESIZE);
5158 cmd = mtod(m, struct iwn_tx_cmd *);
5159 error = bus_dmamap_load(ring->data_dmat, data->map, cmd,
5160 totlen, iwn_dma_map_addr, &paddr, BUS_DMA_NOWAIT);
5167 cmd = &ring->cmd[ring->cur];
5168 paddr = data->cmd_paddr;
5173 cmd->qid = ring->qid;
5174 cmd->idx = ring->cur;
5175 memcpy(cmd->data, buf, size);
5178 desc->segs[0].addr = htole32(IWN_LOADDR(paddr));
5179 desc->segs[0].len = htole16(IWN_HIADDR(paddr) | totlen << 4);
5181 DPRINTF(sc, IWN_DEBUG_CMD, "%s: %s (0x%x) flags %d qid %d idx %d\n",
5182 __func__, iwn_intr_str(cmd->code), cmd->code,
5183 cmd->flags, cmd->qid, cmd->idx);
5185 if (size > sizeof cmd->data) {
5186 bus_dmamap_sync(ring->data_dmat, data->map,
5187 BUS_DMASYNC_PREWRITE);
5189 bus_dmamap_sync(ring->cmd_dma.tag, ring->cmd_dma.map,
5190 BUS_DMASYNC_PREWRITE);
5192 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
5193 BUS_DMASYNC_PREWRITE);
5195 /* Kick command ring. */
5196 ring->cur = (ring->cur + 1) % IWN_TX_RING_COUNT;
5197 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, ring->qid << 8 | ring->cur);
5199 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
5201 return async ? 0 : msleep(desc, &sc->sc_mtx, PCATCH, "iwncmd", hz);
5205 iwn4965_add_node(struct iwn_softc *sc, struct iwn_node_info *node, int async)
5207 struct iwn4965_node_info hnode;
5210 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5213 * We use the node structure for 5000 Series internally (it is
5214 * a superset of the one for 4965AGN). We thus copy the common
5215 * fields before sending the command.
5217 src = (caddr_t)node;
5218 dst = (caddr_t)&hnode;
5219 memcpy(dst, src, 48);
5220 /* Skip TSC, RX MIC and TX MIC fields from ``src''. */
5221 memcpy(dst + 48, src + 72, 20);
5222 return iwn_cmd(sc, IWN_CMD_ADD_NODE, &hnode, sizeof hnode, async);
5226 iwn5000_add_node(struct iwn_softc *sc, struct iwn_node_info *node, int async)
5229 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5231 /* Direct mapping. */
5232 return iwn_cmd(sc, IWN_CMD_ADD_NODE, node, sizeof (*node), async);
5236 iwn_set_link_quality(struct iwn_softc *sc, struct ieee80211_node *ni)
5238 struct iwn_node *wn = (void *)ni;
5239 struct ieee80211_rateset *rs;
5240 struct iwn_cmd_link_quality linkq;
5241 int i, rate, txrate;
5244 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
5246 memset(&linkq, 0, sizeof linkq);
5248 linkq.antmsk_1stream = iwn_get_1stream_tx_antmask(sc);
5249 linkq.antmsk_2stream = iwn_get_2stream_tx_antmask(sc);
5251 linkq.ampdu_max = 32; /* XXX negotiated? */
5252 linkq.ampdu_threshold = 3;
5253 linkq.ampdu_limit = htole16(4000); /* 4ms */
5255 DPRINTF(sc, IWN_DEBUG_XMIT,
5256 "%s: 1stream antenna=0x%02x, 2stream antenna=0x%02x, ntxstreams=%d\n",
5258 linkq.antmsk_1stream,
5259 linkq.antmsk_2stream,
5263 * Are we using 11n rates? Ensure the channel is
5264 * 11n _and_ we have some 11n rates, or don't
5267 if (IEEE80211_IS_CHAN_HT(ni->ni_chan) && ni->ni_htrates.rs_nrates > 0) {
5268 rs = (struct ieee80211_rateset *) &ni->ni_htrates;
5275 /* Start at highest available bit-rate. */
5277 * XXX this is all very dirty!
5280 txrate = ni->ni_htrates.rs_nrates - 1;
5282 txrate = rs->rs_nrates - 1;
5283 for (i = 0; i < IWN_MAX_TX_RETRIES; i++) {
5287 * XXX TODO: ensure the last two slots are the two lowest
5288 * rate entries, just for now.
5290 if (i == 14 || i == 15)
5294 rate = IEEE80211_RATE_MCS | rs->rs_rates[txrate];
5296 rate = IEEE80211_RV(rs->rs_rates[txrate]);
5298 /* Do rate -> PLCP config mapping */
5299 plcp = iwn_rate_to_plcp(sc, ni, rate);
5300 linkq.retry[i] = plcp;
5301 DPRINTF(sc, IWN_DEBUG_XMIT,
5302 "%s: i=%d, txrate=%d, rate=0x%02x, plcp=0x%08x\n",
5310 * The mimo field is an index into the table which
5311 * indicates the first index where it and subsequent entries
5312 * will not be using MIMO.
5314 * Since we're filling linkq from 0..15 and we're filling
5315 * from the highest MCS rates to the lowest rates, if we
5316 * _are_ doing a dual-stream rate, set mimo to idx+1 (ie,
5317 * the next entry.) That way if the next entry is a non-MIMO
5318 * entry, we're already pointing at it.
5320 if ((le32toh(plcp) & IWN_RFLAG_MCS) &&
5321 IEEE80211_RV(le32toh(plcp)) > 7)
5324 /* Next retry at immediate lower bit-rate. */
5329 * If we reached the end of the list and indeed we hit
5330 * all MIMO rates (eg 5300 doing MCS23-15) then yes,
5331 * set mimo to 15. Setting it to 16 panics the firmware.
5333 if (linkq.mimo > 15)
5336 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: mimo = %d\n", __func__, linkq.mimo);
5338 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
5340 return iwn_cmd(sc, IWN_CMD_LINK_QUALITY, &linkq, sizeof linkq, 1);
5344 * Broadcast node is used to send group-addressed and management frames.
5347 iwn_add_broadcast_node(struct iwn_softc *sc, int async)
5349 struct iwn_ops *ops = &sc->ops;
5350 struct ieee80211com *ic = &sc->sc_ic;
5351 struct iwn_node_info node;
5352 struct iwn_cmd_link_quality linkq;
5356 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
5358 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX];
5360 memset(&node, 0, sizeof node);
5361 IEEE80211_ADDR_COPY(node.macaddr, ieee80211broadcastaddr);
5362 node.id = sc->broadcast_id;
5363 DPRINTF(sc, IWN_DEBUG_RESET, "%s: adding broadcast node\n", __func__);
5364 if ((error = ops->add_node(sc, &node, async)) != 0)
5367 /* Use the first valid TX antenna. */
5368 txant = IWN_LSB(sc->txchainmask);
5370 memset(&linkq, 0, sizeof linkq);
5371 linkq.id = sc->broadcast_id;
5372 linkq.antmsk_1stream = iwn_get_1stream_tx_antmask(sc);
5373 linkq.antmsk_2stream = iwn_get_2stream_tx_antmask(sc);
5374 linkq.ampdu_max = 64;
5375 linkq.ampdu_threshold = 3;
5376 linkq.ampdu_limit = htole16(4000); /* 4ms */
5378 /* Use lowest mandatory bit-rate. */
5379 /* XXX rate table lookup? */
5380 if (IEEE80211_IS_CHAN_5GHZ(ic->ic_curchan))
5381 linkq.retry[0] = htole32(0xd);
5383 linkq.retry[0] = htole32(10 | IWN_RFLAG_CCK);
5384 linkq.retry[0] |= htole32(IWN_RFLAG_ANT(txant));
5385 /* Use same bit-rate for all TX retries. */
5386 for (i = 1; i < IWN_MAX_TX_RETRIES; i++) {
5387 linkq.retry[i] = linkq.retry[0];
5390 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
5392 return iwn_cmd(sc, IWN_CMD_LINK_QUALITY, &linkq, sizeof linkq, async);
5396 iwn_updateedca(struct ieee80211com *ic)
5398 #define IWN_EXP2(x) ((1 << (x)) - 1) /* CWmin = 2^ECWmin - 1 */
5399 struct iwn_softc *sc = ic->ic_softc;
5400 struct iwn_edca_params cmd;
5403 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
5405 memset(&cmd, 0, sizeof cmd);
5406 cmd.flags = htole32(IWN_EDCA_UPDATE);
5409 for (aci = 0; aci < WME_NUM_AC; aci++) {
5410 const struct wmeParams *ac =
5411 &ic->ic_wme.wme_chanParams.cap_wmeParams[aci];
5412 cmd.ac[aci].aifsn = ac->wmep_aifsn;
5413 cmd.ac[aci].cwmin = htole16(IWN_EXP2(ac->wmep_logcwmin));
5414 cmd.ac[aci].cwmax = htole16(IWN_EXP2(ac->wmep_logcwmax));
5415 cmd.ac[aci].txoplimit =
5416 htole16(IEEE80211_TXOP_TO_US(ac->wmep_txopLimit));
5418 IEEE80211_UNLOCK(ic);
5421 (void)iwn_cmd(sc, IWN_CMD_EDCA_PARAMS, &cmd, sizeof cmd, 1);
5424 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
5431 iwn_update_mcast(struct ieee80211com *ic)
5437 iwn_set_led(struct iwn_softc *sc, uint8_t which, uint8_t off, uint8_t on)
5439 struct iwn_cmd_led led;
5441 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5444 /* XXX don't set LEDs during scan? */
5445 if (sc->sc_is_scanning)
5449 /* Clear microcode LED ownership. */
5450 IWN_CLRBITS(sc, IWN_LED, IWN_LED_BSM_CTRL);
5453 led.unit = htole32(10000); /* on/off in unit of 100ms */
5456 (void)iwn_cmd(sc, IWN_CMD_SET_LED, &led, sizeof led, 1);
5460 * Set the critical temperature at which the firmware will stop the radio
5464 iwn_set_critical_temp(struct iwn_softc *sc)
5466 struct iwn_critical_temp crit;
5469 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5471 IWN_WRITE(sc, IWN_UCODE_GP1_CLR, IWN_UCODE_GP1_CTEMP_STOP_RF);
5473 if (sc->hw_type == IWN_HW_REV_TYPE_5150)
5474 temp = (IWN_CTOK(110) - sc->temp_off) * -5;
5475 else if (sc->hw_type == IWN_HW_REV_TYPE_4965)
5476 temp = IWN_CTOK(110);
5479 memset(&crit, 0, sizeof crit);
5480 crit.tempR = htole32(temp);
5481 DPRINTF(sc, IWN_DEBUG_RESET, "setting critical temp to %d\n", temp);
5482 return iwn_cmd(sc, IWN_CMD_SET_CRITICAL_TEMP, &crit, sizeof crit, 0);
5486 iwn_set_timing(struct iwn_softc *sc, struct ieee80211_node *ni)
5488 struct iwn_cmd_timing cmd;
5491 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5493 memset(&cmd, 0, sizeof cmd);
5494 memcpy(&cmd.tstamp, ni->ni_tstamp.data, sizeof (uint64_t));
5495 cmd.bintval = htole16(ni->ni_intval);
5496 cmd.lintval = htole16(10);
5498 /* Compute remaining time until next beacon. */
5499 val = (uint64_t)ni->ni_intval * IEEE80211_DUR_TU;
5500 mod = le64toh(cmd.tstamp) % val;
5501 cmd.binitval = htole32((uint32_t)(val - mod));
5503 DPRINTF(sc, IWN_DEBUG_RESET, "timing bintval=%u tstamp=%ju, init=%u\n",
5504 ni->ni_intval, le64toh(cmd.tstamp), (uint32_t)(val - mod));
5506 return iwn_cmd(sc, IWN_CMD_TIMING, &cmd, sizeof cmd, 1);
5510 iwn4965_power_calibration(struct iwn_softc *sc, int temp)
5513 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5515 /* Adjust TX power if need be (delta >= 3 degC). */
5516 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: temperature %d->%d\n",
5517 __func__, sc->temp, temp);
5518 if (abs(temp - sc->temp) >= 3) {
5519 /* Record temperature of last calibration. */
5521 (void)iwn4965_set_txpower(sc, 1);
5526 * Set TX power for current channel (each rate has its own power settings).
5527 * This function takes into account the regulatory information from EEPROM,
5528 * the current temperature and the current voltage.
5531 iwn4965_set_txpower(struct iwn_softc *sc, int async)
5533 /* Fixed-point arithmetic division using a n-bit fractional part. */
5534 #define fdivround(a, b, n) \
5535 ((((1 << n) * (a)) / (b) + (1 << n) / 2) / (1 << n))
5536 /* Linear interpolation. */
5537 #define interpolate(x, x1, y1, x2, y2, n) \
5538 ((y1) + fdivround(((int)(x) - (x1)) * ((y2) - (y1)), (x2) - (x1), n))
5540 static const int tdiv[IWN_NATTEN_GROUPS] = { 9, 8, 8, 8, 6 };
5541 struct iwn_ucode_info *uc = &sc->ucode_info;
5542 struct iwn4965_cmd_txpower cmd;
5543 struct iwn4965_eeprom_chan_samples *chans;
5544 const uint8_t *rf_gain, *dsp_gain;
5545 int32_t vdiff, tdiff;
5546 int i, is_chan_5ghz, c, grp, maxpwr;
5549 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX];
5550 /* Retrieve current channel from last RXON. */
5551 chan = sc->rxon->chan;
5552 is_chan_5ghz = (sc->rxon->flags & htole32(IWN_RXON_24GHZ)) == 0;
5553 DPRINTF(sc, IWN_DEBUG_RESET, "setting TX power for channel %d\n",
5556 memset(&cmd, 0, sizeof cmd);
5557 cmd.band = is_chan_5ghz ? 0 : 1;
5561 maxpwr = sc->maxpwr5GHz;
5562 rf_gain = iwn4965_rf_gain_5ghz;
5563 dsp_gain = iwn4965_dsp_gain_5ghz;
5565 maxpwr = sc->maxpwr2GHz;
5566 rf_gain = iwn4965_rf_gain_2ghz;
5567 dsp_gain = iwn4965_dsp_gain_2ghz;
5570 /* Compute voltage compensation. */
5571 vdiff = ((int32_t)le32toh(uc->volt) - sc->eeprom_voltage) / 7;
5576 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
5577 "%s: voltage compensation=%d (UCODE=%d, EEPROM=%d)\n",
5578 __func__, vdiff, le32toh(uc->volt), sc->eeprom_voltage);
5580 /* Get channel attenuation group. */
5581 if (chan <= 20) /* 1-20 */
5583 else if (chan <= 43) /* 34-43 */
5585 else if (chan <= 70) /* 44-70 */
5587 else if (chan <= 124) /* 71-124 */
5591 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
5592 "%s: chan %d, attenuation group=%d\n", __func__, chan, grp);
5594 /* Get channel sub-band. */
5595 for (i = 0; i < IWN_NBANDS; i++)
5596 if (sc->bands[i].lo != 0 &&
5597 sc->bands[i].lo <= chan && chan <= sc->bands[i].hi)
5599 if (i == IWN_NBANDS) /* Can't happen in real-life. */
5601 chans = sc->bands[i].chans;
5602 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
5603 "%s: chan %d sub-band=%d\n", __func__, chan, i);
5605 for (c = 0; c < 2; c++) {
5606 uint8_t power, gain, temp;
5607 int maxchpwr, pwr, ridx, idx;
5609 power = interpolate(chan,
5610 chans[0].num, chans[0].samples[c][1].power,
5611 chans[1].num, chans[1].samples[c][1].power, 1);
5612 gain = interpolate(chan,
5613 chans[0].num, chans[0].samples[c][1].gain,
5614 chans[1].num, chans[1].samples[c][1].gain, 1);
5615 temp = interpolate(chan,
5616 chans[0].num, chans[0].samples[c][1].temp,
5617 chans[1].num, chans[1].samples[c][1].temp, 1);
5618 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
5619 "%s: Tx chain %d: power=%d gain=%d temp=%d\n",
5620 __func__, c, power, gain, temp);
5622 /* Compute temperature compensation. */
5623 tdiff = ((sc->temp - temp) * 2) / tdiv[grp];
5624 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
5625 "%s: temperature compensation=%d (current=%d, EEPROM=%d)\n",
5626 __func__, tdiff, sc->temp, temp);
5628 for (ridx = 0; ridx <= IWN_RIDX_MAX; ridx++) {
5629 /* Convert dBm to half-dBm. */
5630 maxchpwr = sc->maxpwr[chan] * 2;
5632 maxchpwr -= 6; /* MIMO 2T: -3dB */
5636 /* Adjust TX power based on rate. */
5637 if ((ridx % 8) == 5)
5638 pwr -= 15; /* OFDM48: -7.5dB */
5639 else if ((ridx % 8) == 6)
5640 pwr -= 17; /* OFDM54: -8.5dB */
5641 else if ((ridx % 8) == 7)
5642 pwr -= 20; /* OFDM60: -10dB */
5644 pwr -= 10; /* Others: -5dB */
5646 /* Do not exceed channel max TX power. */
5650 idx = gain - (pwr - power) - tdiff - vdiff;
5651 if ((ridx / 8) & 1) /* MIMO */
5652 idx += (int32_t)le32toh(uc->atten[grp][c]);
5655 idx += 9; /* 5GHz */
5656 if (ridx == IWN_RIDX_MAX)
5659 /* Make sure idx stays in a valid range. */
5662 else if (idx > IWN4965_MAX_PWR_INDEX)
5663 idx = IWN4965_MAX_PWR_INDEX;
5665 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
5666 "%s: Tx chain %d, rate idx %d: power=%d\n",
5667 __func__, c, ridx, idx);
5668 cmd.power[ridx].rf_gain[c] = rf_gain[idx];
5669 cmd.power[ridx].dsp_gain[c] = dsp_gain[idx];
5673 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
5674 "%s: set tx power for chan %d\n", __func__, chan);
5675 return iwn_cmd(sc, IWN_CMD_TXPOWER, &cmd, sizeof cmd, async);
5682 iwn5000_set_txpower(struct iwn_softc *sc, int async)
5684 struct iwn5000_cmd_txpower cmd;
5687 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5690 * TX power calibration is handled automatically by the firmware
5693 memset(&cmd, 0, sizeof cmd);
5694 cmd.global_limit = 2 * IWN5000_TXPOWER_MAX_DBM; /* 16 dBm */
5695 cmd.flags = IWN5000_TXPOWER_NO_CLOSED;
5696 cmd.srv_limit = IWN5000_TXPOWER_AUTO;
5697 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_XMIT,
5698 "%s: setting TX power; rev=%d\n",
5700 IWN_UCODE_API(sc->ucode_rev));
5701 if (IWN_UCODE_API(sc->ucode_rev) == 1)
5702 cmdid = IWN_CMD_TXPOWER_DBM_V1;
5704 cmdid = IWN_CMD_TXPOWER_DBM;
5705 return iwn_cmd(sc, cmdid, &cmd, sizeof cmd, async);
5709 * Retrieve the maximum RSSI (in dBm) among receivers.
5712 iwn4965_get_rssi(struct iwn_softc *sc, struct iwn_rx_stat *stat)
5714 struct iwn4965_rx_phystat *phy = (void *)stat->phybuf;
5718 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5720 mask = (le16toh(phy->antenna) >> 4) & IWN_ANT_ABC;
5721 agc = (le16toh(phy->agc) >> 7) & 0x7f;
5724 if (mask & IWN_ANT_A)
5725 rssi = MAX(rssi, phy->rssi[0]);
5726 if (mask & IWN_ANT_B)
5727 rssi = MAX(rssi, phy->rssi[2]);
5728 if (mask & IWN_ANT_C)
5729 rssi = MAX(rssi, phy->rssi[4]);
5731 DPRINTF(sc, IWN_DEBUG_RECV,
5732 "%s: agc %d mask 0x%x rssi %d %d %d result %d\n", __func__, agc,
5733 mask, phy->rssi[0], phy->rssi[2], phy->rssi[4],
5734 rssi - agc - IWN_RSSI_TO_DBM);
5735 return rssi - agc - IWN_RSSI_TO_DBM;
5739 iwn5000_get_rssi(struct iwn_softc *sc, struct iwn_rx_stat *stat)
5741 struct iwn5000_rx_phystat *phy = (void *)stat->phybuf;
5745 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5747 agc = (le32toh(phy->agc) >> 9) & 0x7f;
5749 rssi = MAX(le16toh(phy->rssi[0]) & 0xff,
5750 le16toh(phy->rssi[1]) & 0xff);
5751 rssi = MAX(le16toh(phy->rssi[2]) & 0xff, rssi);
5753 DPRINTF(sc, IWN_DEBUG_RECV,
5754 "%s: agc %d rssi %d %d %d result %d\n", __func__, agc,
5755 phy->rssi[0], phy->rssi[1], phy->rssi[2],
5756 rssi - agc - IWN_RSSI_TO_DBM);
5757 return rssi - agc - IWN_RSSI_TO_DBM;
5761 * Retrieve the average noise (in dBm) among receivers.
5764 iwn_get_noise(const struct iwn_rx_general_stats *stats)
5766 int i, total, nbant, noise;
5769 for (i = 0; i < 3; i++) {
5770 if ((noise = le32toh(stats->noise[i]) & 0xff) == 0)
5775 /* There should be at least one antenna but check anyway. */
5776 return (nbant == 0) ? -127 : (total / nbant) - 107;
5780 * Compute temperature (in degC) from last received statistics.
5783 iwn4965_get_temperature(struct iwn_softc *sc)
5785 struct iwn_ucode_info *uc = &sc->ucode_info;
5786 int32_t r1, r2, r3, r4, temp;
5788 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5790 r1 = le32toh(uc->temp[0].chan20MHz);
5791 r2 = le32toh(uc->temp[1].chan20MHz);
5792 r3 = le32toh(uc->temp[2].chan20MHz);
5793 r4 = le32toh(sc->rawtemp);
5795 if (r1 == r3) /* Prevents division by 0 (should not happen). */
5798 /* Sign-extend 23-bit R4 value to 32-bit. */
5799 r4 = ((r4 & 0xffffff) ^ 0x800000) - 0x800000;
5800 /* Compute temperature in Kelvin. */
5801 temp = (259 * (r4 - r2)) / (r3 - r1);
5802 temp = (temp * 97) / 100 + 8;
5804 DPRINTF(sc, IWN_DEBUG_ANY, "temperature %dK/%dC\n", temp,
5806 return IWN_KTOC(temp);
5810 iwn5000_get_temperature(struct iwn_softc *sc)
5814 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5817 * Temperature is not used by the driver for 5000 Series because
5818 * TX power calibration is handled by firmware.
5820 temp = le32toh(sc->rawtemp);
5821 if (sc->hw_type == IWN_HW_REV_TYPE_5150) {
5822 temp = (temp / -5) + sc->temp_off;
5823 temp = IWN_KTOC(temp);
5829 * Initialize sensitivity calibration state machine.
5832 iwn_init_sensitivity(struct iwn_softc *sc)
5834 struct iwn_ops *ops = &sc->ops;
5835 struct iwn_calib_state *calib = &sc->calib;
5839 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5841 /* Reset calibration state machine. */
5842 memset(calib, 0, sizeof (*calib));
5843 calib->state = IWN_CALIB_STATE_INIT;
5844 calib->cck_state = IWN_CCK_STATE_HIFA;
5845 /* Set initial correlation values. */
5846 calib->ofdm_x1 = sc->limits->min_ofdm_x1;
5847 calib->ofdm_mrc_x1 = sc->limits->min_ofdm_mrc_x1;
5848 calib->ofdm_x4 = sc->limits->min_ofdm_x4;
5849 calib->ofdm_mrc_x4 = sc->limits->min_ofdm_mrc_x4;
5850 calib->cck_x4 = 125;
5851 calib->cck_mrc_x4 = sc->limits->min_cck_mrc_x4;
5852 calib->energy_cck = sc->limits->energy_cck;
5854 /* Write initial sensitivity. */
5855 if ((error = iwn_send_sensitivity(sc)) != 0)
5858 /* Write initial gains. */
5859 if ((error = ops->init_gains(sc)) != 0)
5862 /* Request statistics at each beacon interval. */
5864 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: sending request for statistics\n",
5866 return iwn_cmd(sc, IWN_CMD_GET_STATISTICS, &flags, sizeof flags, 1);
5870 * Collect noise and RSSI statistics for the first 20 beacons received
5871 * after association and use them to determine connected antennas and
5872 * to set differential gains.
5875 iwn_collect_noise(struct iwn_softc *sc,
5876 const struct iwn_rx_general_stats *stats)
5878 struct iwn_ops *ops = &sc->ops;
5879 struct iwn_calib_state *calib = &sc->calib;
5880 struct ieee80211com *ic = &sc->sc_ic;
5884 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
5886 /* Accumulate RSSI and noise for all 3 antennas. */
5887 for (i = 0; i < 3; i++) {
5888 calib->rssi[i] += le32toh(stats->rssi[i]) & 0xff;
5889 calib->noise[i] += le32toh(stats->noise[i]) & 0xff;
5891 /* NB: We update differential gains only once after 20 beacons. */
5892 if (++calib->nbeacons < 20)
5895 /* Determine highest average RSSI. */
5896 val = MAX(calib->rssi[0], calib->rssi[1]);
5897 val = MAX(calib->rssi[2], val);
5899 /* Determine which antennas are connected. */
5900 sc->chainmask = sc->rxchainmask;
5901 for (i = 0; i < 3; i++)
5902 if (val - calib->rssi[i] > 15 * 20)
5903 sc->chainmask &= ~(1 << i);
5904 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_XMIT,
5905 "%s: RX chains mask: theoretical=0x%x, actual=0x%x\n",
5906 __func__, sc->rxchainmask, sc->chainmask);
5908 /* If none of the TX antennas are connected, keep at least one. */
5909 if ((sc->chainmask & sc->txchainmask) == 0)
5910 sc->chainmask |= IWN_LSB(sc->txchainmask);
5912 (void)ops->set_gains(sc);
5913 calib->state = IWN_CALIB_STATE_RUN;
5916 /* XXX Disable RX chains with no antennas connected. */
5917 sc->rxon->rxchain = htole16(IWN_RXCHAIN_SEL(sc->chainmask));
5918 if (sc->sc_is_scanning)
5919 device_printf(sc->sc_dev,
5920 "%s: is_scanning set, before RXON\n",
5922 (void)iwn_cmd(sc, IWN_CMD_RXON, sc->rxon, sc->rxonsz, 1);
5925 /* Enable power-saving mode if requested by user. */
5926 if (ic->ic_flags & IEEE80211_F_PMGTON)
5927 (void)iwn_set_pslevel(sc, 0, 3, 1);
5929 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
5934 iwn4965_init_gains(struct iwn_softc *sc)
5936 struct iwn_phy_calib_gain cmd;
5938 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5940 memset(&cmd, 0, sizeof cmd);
5941 cmd.code = IWN4965_PHY_CALIB_DIFF_GAIN;
5942 /* Differential gains initially set to 0 for all 3 antennas. */
5943 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
5944 "%s: setting initial differential gains\n", __func__);
5945 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 1);
5949 iwn5000_init_gains(struct iwn_softc *sc)
5951 struct iwn_phy_calib cmd;
5953 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5955 memset(&cmd, 0, sizeof cmd);
5956 cmd.code = sc->reset_noise_gain;
5959 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
5960 "%s: setting initial differential gains\n", __func__);
5961 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 1);
5965 iwn4965_set_gains(struct iwn_softc *sc)
5967 struct iwn_calib_state *calib = &sc->calib;
5968 struct iwn_phy_calib_gain cmd;
5969 int i, delta, noise;
5971 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5973 /* Get minimal noise among connected antennas. */
5974 noise = INT_MAX; /* NB: There's at least one antenna. */
5975 for (i = 0; i < 3; i++)
5976 if (sc->chainmask & (1 << i))
5977 noise = MIN(calib->noise[i], noise);
5979 memset(&cmd, 0, sizeof cmd);
5980 cmd.code = IWN4965_PHY_CALIB_DIFF_GAIN;
5981 /* Set differential gains for connected antennas. */
5982 for (i = 0; i < 3; i++) {
5983 if (sc->chainmask & (1 << i)) {
5984 /* Compute attenuation (in unit of 1.5dB). */
5985 delta = (noise - (int32_t)calib->noise[i]) / 30;
5986 /* NB: delta <= 0 */
5987 /* Limit to [-4.5dB,0]. */
5988 cmd.gain[i] = MIN(abs(delta), 3);
5990 cmd.gain[i] |= 1 << 2; /* sign bit */
5993 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
5994 "setting differential gains Ant A/B/C: %x/%x/%x (%x)\n",
5995 cmd.gain[0], cmd.gain[1], cmd.gain[2], sc->chainmask);
5996 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 1);
6000 iwn5000_set_gains(struct iwn_softc *sc)
6002 struct iwn_calib_state *calib = &sc->calib;
6003 struct iwn_phy_calib_gain cmd;
6004 int i, ant, div, delta;
6006 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
6008 /* We collected 20 beacons and !=6050 need a 1.5 factor. */
6009 div = (sc->hw_type == IWN_HW_REV_TYPE_6050) ? 20 : 30;
6011 memset(&cmd, 0, sizeof cmd);
6012 cmd.code = sc->noise_gain;
6015 /* Get first available RX antenna as referential. */
6016 ant = IWN_LSB(sc->rxchainmask);
6017 /* Set differential gains for other antennas. */
6018 for (i = ant + 1; i < 3; i++) {
6019 if (sc->chainmask & (1 << i)) {
6020 /* The delta is relative to antenna "ant". */
6021 delta = ((int32_t)calib->noise[ant] -
6022 (int32_t)calib->noise[i]) / div;
6023 /* Limit to [-4.5dB,+4.5dB]. */
6024 cmd.gain[i - 1] = MIN(abs(delta), 3);
6026 cmd.gain[i - 1] |= 1 << 2; /* sign bit */
6029 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_XMIT,
6030 "setting differential gains Ant B/C: %x/%x (%x)\n",
6031 cmd.gain[0], cmd.gain[1], sc->chainmask);
6032 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 1);
6036 * Tune RF RX sensitivity based on the number of false alarms detected
6037 * during the last beacon period.
6040 iwn_tune_sensitivity(struct iwn_softc *sc, const struct iwn_rx_stats *stats)
6042 #define inc(val, inc, max) \
6043 if ((val) < (max)) { \
6044 if ((val) < (max) - (inc)) \
6050 #define dec(val, dec, min) \
6051 if ((val) > (min)) { \
6052 if ((val) > (min) + (dec)) \
6059 const struct iwn_sensitivity_limits *limits = sc->limits;
6060 struct iwn_calib_state *calib = &sc->calib;
6061 uint32_t val, rxena, fa;
6062 uint32_t energy[3], energy_min;
6063 uint8_t noise[3], noise_ref;
6064 int i, needs_update = 0;
6066 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
6068 /* Check that we've been enabled long enough. */
6069 if ((rxena = le32toh(stats->general.load)) == 0){
6070 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end not so long\n", __func__);
6074 /* Compute number of false alarms since last call for OFDM. */
6075 fa = le32toh(stats->ofdm.bad_plcp) - calib->bad_plcp_ofdm;
6076 fa += le32toh(stats->ofdm.fa) - calib->fa_ofdm;
6077 fa *= 200 * IEEE80211_DUR_TU; /* 200TU */
6079 if (fa > 50 * rxena) {
6080 /* High false alarm count, decrease sensitivity. */
6081 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
6082 "%s: OFDM high false alarm count: %u\n", __func__, fa);
6083 inc(calib->ofdm_x1, 1, limits->max_ofdm_x1);
6084 inc(calib->ofdm_mrc_x1, 1, limits->max_ofdm_mrc_x1);
6085 inc(calib->ofdm_x4, 1, limits->max_ofdm_x4);
6086 inc(calib->ofdm_mrc_x4, 1, limits->max_ofdm_mrc_x4);
6088 } else if (fa < 5 * rxena) {
6089 /* Low false alarm count, increase sensitivity. */
6090 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
6091 "%s: OFDM low false alarm count: %u\n", __func__, fa);
6092 dec(calib->ofdm_x1, 1, limits->min_ofdm_x1);
6093 dec(calib->ofdm_mrc_x1, 1, limits->min_ofdm_mrc_x1);
6094 dec(calib->ofdm_x4, 1, limits->min_ofdm_x4);
6095 dec(calib->ofdm_mrc_x4, 1, limits->min_ofdm_mrc_x4);
6098 /* Compute maximum noise among 3 receivers. */
6099 for (i = 0; i < 3; i++)
6100 noise[i] = (le32toh(stats->general.noise[i]) >> 8) & 0xff;
6101 val = MAX(noise[0], noise[1]);
6102 val = MAX(noise[2], val);
6103 /* Insert it into our samples table. */
6104 calib->noise_samples[calib->cur_noise_sample] = val;
6105 calib->cur_noise_sample = (calib->cur_noise_sample + 1) % 20;
6107 /* Compute maximum noise among last 20 samples. */
6108 noise_ref = calib->noise_samples[0];
6109 for (i = 1; i < 20; i++)
6110 noise_ref = MAX(noise_ref, calib->noise_samples[i]);
6112 /* Compute maximum energy among 3 receivers. */
6113 for (i = 0; i < 3; i++)
6114 energy[i] = le32toh(stats->general.energy[i]);
6115 val = MIN(energy[0], energy[1]);
6116 val = MIN(energy[2], val);
6117 /* Insert it into our samples table. */
6118 calib->energy_samples[calib->cur_energy_sample] = val;
6119 calib->cur_energy_sample = (calib->cur_energy_sample + 1) % 10;
6121 /* Compute minimum energy among last 10 samples. */
6122 energy_min = calib->energy_samples[0];
6123 for (i = 1; i < 10; i++)
6124 energy_min = MAX(energy_min, calib->energy_samples[i]);
6127 /* Compute number of false alarms since last call for CCK. */
6128 fa = le32toh(stats->cck.bad_plcp) - calib->bad_plcp_cck;
6129 fa += le32toh(stats->cck.fa) - calib->fa_cck;
6130 fa *= 200 * IEEE80211_DUR_TU; /* 200TU */
6132 if (fa > 50 * rxena) {
6133 /* High false alarm count, decrease sensitivity. */
6134 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
6135 "%s: CCK high false alarm count: %u\n", __func__, fa);
6136 calib->cck_state = IWN_CCK_STATE_HIFA;
6139 if (calib->cck_x4 > 160) {
6140 calib->noise_ref = noise_ref;
6141 if (calib->energy_cck > 2)
6142 dec(calib->energy_cck, 2, energy_min);
6144 if (calib->cck_x4 < 160) {
6145 calib->cck_x4 = 161;
6148 inc(calib->cck_x4, 3, limits->max_cck_x4);
6150 inc(calib->cck_mrc_x4, 3, limits->max_cck_mrc_x4);
6152 } else if (fa < 5 * rxena) {
6153 /* Low false alarm count, increase sensitivity. */
6154 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
6155 "%s: CCK low false alarm count: %u\n", __func__, fa);
6156 calib->cck_state = IWN_CCK_STATE_LOFA;
6159 if (calib->cck_state != IWN_CCK_STATE_INIT &&
6160 (((int32_t)calib->noise_ref - (int32_t)noise_ref) > 2 ||
6161 calib->low_fa > 100)) {
6162 inc(calib->energy_cck, 2, limits->min_energy_cck);
6163 dec(calib->cck_x4, 3, limits->min_cck_x4);
6164 dec(calib->cck_mrc_x4, 3, limits->min_cck_mrc_x4);
6167 /* Not worth to increase or decrease sensitivity. */
6168 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
6169 "%s: CCK normal false alarm count: %u\n", __func__, fa);
6171 calib->noise_ref = noise_ref;
6173 if (calib->cck_state == IWN_CCK_STATE_HIFA) {
6174 /* Previous interval had many false alarms. */
6175 dec(calib->energy_cck, 8, energy_min);
6177 calib->cck_state = IWN_CCK_STATE_INIT;
6181 (void)iwn_send_sensitivity(sc);
6183 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
6190 iwn_send_sensitivity(struct iwn_softc *sc)
6192 struct iwn_calib_state *calib = &sc->calib;
6193 struct iwn_enhanced_sensitivity_cmd cmd;
6196 memset(&cmd, 0, sizeof cmd);
6197 len = sizeof (struct iwn_sensitivity_cmd);
6198 cmd.which = IWN_SENSITIVITY_WORKTBL;
6199 /* OFDM modulation. */
6200 cmd.corr_ofdm_x1 = htole16(calib->ofdm_x1);
6201 cmd.corr_ofdm_mrc_x1 = htole16(calib->ofdm_mrc_x1);
6202 cmd.corr_ofdm_x4 = htole16(calib->ofdm_x4);
6203 cmd.corr_ofdm_mrc_x4 = htole16(calib->ofdm_mrc_x4);
6204 cmd.energy_ofdm = htole16(sc->limits->energy_ofdm);
6205 cmd.energy_ofdm_th = htole16(62);
6206 /* CCK modulation. */
6207 cmd.corr_cck_x4 = htole16(calib->cck_x4);
6208 cmd.corr_cck_mrc_x4 = htole16(calib->cck_mrc_x4);
6209 cmd.energy_cck = htole16(calib->energy_cck);
6210 /* Barker modulation: use default values. */
6211 cmd.corr_barker = htole16(190);
6212 cmd.corr_barker_mrc = htole16(sc->limits->barker_mrc);
6214 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
6215 "%s: set sensitivity %d/%d/%d/%d/%d/%d/%d\n", __func__,
6216 calib->ofdm_x1, calib->ofdm_mrc_x1, calib->ofdm_x4,
6217 calib->ofdm_mrc_x4, calib->cck_x4,
6218 calib->cck_mrc_x4, calib->energy_cck);
6220 if (!(sc->sc_flags & IWN_FLAG_ENH_SENS))
6222 /* Enhanced sensitivity settings. */
6223 len = sizeof (struct iwn_enhanced_sensitivity_cmd);
6224 cmd.ofdm_det_slope_mrc = htole16(668);
6225 cmd.ofdm_det_icept_mrc = htole16(4);
6226 cmd.ofdm_det_slope = htole16(486);
6227 cmd.ofdm_det_icept = htole16(37);
6228 cmd.cck_det_slope_mrc = htole16(853);
6229 cmd.cck_det_icept_mrc = htole16(4);
6230 cmd.cck_det_slope = htole16(476);
6231 cmd.cck_det_icept = htole16(99);
6233 return iwn_cmd(sc, IWN_CMD_SET_SENSITIVITY, &cmd, len, 1);
6237 * Look at the increase of PLCP errors over time; if it exceeds
6238 * a programmed threshold then trigger an RF retune.
6241 iwn_check_rx_recovery(struct iwn_softc *sc, struct iwn_stats *rs)
6243 int32_t delta_ofdm, delta_ht, delta_cck;
6244 struct iwn_calib_state *calib = &sc->calib;
6245 int delta_ticks, cur_ticks;
6250 * Calculate the difference between the current and
6251 * previous statistics.
6253 delta_cck = le32toh(rs->rx.cck.bad_plcp) - calib->bad_plcp_cck;
6254 delta_ofdm = le32toh(rs->rx.ofdm.bad_plcp) - calib->bad_plcp_ofdm;
6255 delta_ht = le32toh(rs->rx.ht.bad_plcp) - calib->bad_plcp_ht;
6258 * Calculate the delta in time between successive statistics
6259 * messages. Yes, it can roll over; so we make sure that
6260 * this doesn't happen.
6262 * XXX go figure out what to do about rollover
6263 * XXX go figure out what to do if ticks rolls over to -ve instead!
6264 * XXX go stab signed integer overflow undefined-ness in the face.
6267 delta_ticks = cur_ticks - sc->last_calib_ticks;
6270 * If any are negative, then the firmware likely reset; so just
6271 * bail. We'll pick this up next time.
6273 if (delta_cck < 0 || delta_ofdm < 0 || delta_ht < 0 || delta_ticks < 0)
6277 * delta_ticks is in ticks; we need to convert it up to milliseconds
6278 * so we can do some useful math with it.
6280 delta_msec = ticks_to_msecs(delta_ticks);
6283 * Calculate what our threshold is given the current delta_msec.
6285 thresh = sc->base_params->plcp_err_threshold * delta_msec;
6287 DPRINTF(sc, IWN_DEBUG_STATE,
6288 "%s: time delta: %d; cck=%d, ofdm=%d, ht=%d, total=%d, thresh=%d\n",
6294 (delta_msec + delta_cck + delta_ofdm + delta_ht),
6298 * If we need a retune, then schedule a single channel scan
6299 * to a channel that isn't the currently active one!
6301 * The math from linux iwlwifi:
6303 * if ((delta * 100 / msecs) > threshold)
6305 if (thresh > 0 && (delta_cck + delta_ofdm + delta_ht) * 100 > thresh) {
6306 DPRINTF(sc, IWN_DEBUG_ANY,
6307 "%s: PLCP error threshold raw (%d) comparison (%d) "
6308 "over limit (%d); retune!\n",
6310 (delta_cck + delta_ofdm + delta_ht),
6311 (delta_cck + delta_ofdm + delta_ht) * 100,
6317 * Set STA mode power saving level (between 0 and 5).
6318 * Level 0 is CAM (Continuously Aware Mode), 5 is for maximum power saving.
6321 iwn_set_pslevel(struct iwn_softc *sc, int dtim, int level, int async)
6323 struct iwn_pmgt_cmd cmd;
6324 const struct iwn_pmgt *pmgt;
6325 uint32_t max, skip_dtim;
6329 DPRINTF(sc, IWN_DEBUG_PWRSAVE,
6330 "%s: dtim=%d, level=%d, async=%d\n",
6336 /* Select which PS parameters to use. */
6338 pmgt = &iwn_pmgt[0][level];
6339 else if (dtim <= 10)
6340 pmgt = &iwn_pmgt[1][level];
6342 pmgt = &iwn_pmgt[2][level];
6344 memset(&cmd, 0, sizeof cmd);
6345 if (level != 0) /* not CAM */
6346 cmd.flags |= htole16(IWN_PS_ALLOW_SLEEP);
6348 cmd.flags |= htole16(IWN_PS_FAST_PD);
6349 /* Retrieve PCIe Active State Power Management (ASPM). */
6350 reg = pci_read_config(sc->sc_dev, sc->sc_cap_off + PCIER_LINK_CTL, 4);
6351 if (!(reg & PCIEM_LINK_CTL_ASPMC_L0S)) /* L0s Entry disabled. */
6352 cmd.flags |= htole16(IWN_PS_PCI_PMGT);
6353 cmd.rxtimeout = htole32(pmgt->rxtimeout * 1024);
6354 cmd.txtimeout = htole32(pmgt->txtimeout * 1024);
6360 skip_dtim = pmgt->skip_dtim;
6361 if (skip_dtim != 0) {
6362 cmd.flags |= htole16(IWN_PS_SLEEP_OVER_DTIM);
6363 max = pmgt->intval[4];
6364 if (max == (uint32_t)-1)
6365 max = dtim * (skip_dtim + 1);
6366 else if (max > dtim)
6367 max = rounddown(max, dtim);
6370 for (i = 0; i < 5; i++)
6371 cmd.intval[i] = htole32(MIN(max, pmgt->intval[i]));
6373 DPRINTF(sc, IWN_DEBUG_RESET, "setting power saving level to %d\n",
6375 return iwn_cmd(sc, IWN_CMD_SET_POWER_MODE, &cmd, sizeof cmd, async);
6379 iwn_send_btcoex(struct iwn_softc *sc)
6381 struct iwn_bluetooth cmd;
6383 memset(&cmd, 0, sizeof cmd);
6384 cmd.flags = IWN_BT_COEX_CHAN_ANN | IWN_BT_COEX_BT_PRIO;
6385 cmd.lead_time = IWN_BT_LEAD_TIME_DEF;
6386 cmd.max_kill = IWN_BT_MAX_KILL_DEF;
6387 DPRINTF(sc, IWN_DEBUG_RESET, "%s: configuring bluetooth coexistence\n",
6389 return iwn_cmd(sc, IWN_CMD_BT_COEX, &cmd, sizeof(cmd), 0);
6393 iwn_send_advanced_btcoex(struct iwn_softc *sc)
6395 static const uint32_t btcoex_3wire[12] = {
6396 0xaaaaaaaa, 0xaaaaaaaa, 0xaeaaaaaa, 0xaaaaaaaa,
6397 0xcc00ff28, 0x0000aaaa, 0xcc00aaaa, 0x0000aaaa,
6398 0xc0004000, 0x00004000, 0xf0005000, 0xf0005000,
6400 struct iwn6000_btcoex_config btconfig;
6401 struct iwn2000_btcoex_config btconfig2k;
6402 struct iwn_btcoex_priotable btprio;
6403 struct iwn_btcoex_prot btprot;
6407 memset(&btconfig, 0, sizeof btconfig);
6408 memset(&btconfig2k, 0, sizeof btconfig2k);
6410 flags = IWN_BT_FLAG_COEX6000_MODE_3W <<
6411 IWN_BT_FLAG_COEX6000_MODE_SHIFT; // Done as is in linux kernel 3.2
6413 if (sc->base_params->bt_sco_disable)
6414 flags &= ~IWN_BT_FLAG_SYNC_2_BT_DISABLE;
6416 flags |= IWN_BT_FLAG_SYNC_2_BT_DISABLE;
6418 flags |= IWN_BT_FLAG_COEX6000_CHAN_INHIBITION;
6420 /* Default flags result is 145 as old value */
6423 * Flags value has to be review. Values must change if we
6424 * which to disable it
6426 if (sc->base_params->bt_session_2) {
6427 btconfig2k.flags = flags;
6428 btconfig2k.max_kill = 5;
6429 btconfig2k.bt3_t7_timer = 1;
6430 btconfig2k.kill_ack = htole32(0xffff0000);
6431 btconfig2k.kill_cts = htole32(0xffff0000);
6432 btconfig2k.sample_time = 2;
6433 btconfig2k.bt3_t2_timer = 0xc;
6435 for (i = 0; i < 12; i++)
6436 btconfig2k.lookup_table[i] = htole32(btcoex_3wire[i]);
6437 btconfig2k.valid = htole16(0xff);
6438 btconfig2k.prio_boost = htole32(0xf0);
6439 DPRINTF(sc, IWN_DEBUG_RESET,
6440 "%s: configuring advanced bluetooth coexistence"
6441 " session 2, flags : 0x%x\n",
6444 error = iwn_cmd(sc, IWN_CMD_BT_COEX, &btconfig2k,
6445 sizeof(btconfig2k), 1);
6447 btconfig.flags = flags;
6448 btconfig.max_kill = 5;
6449 btconfig.bt3_t7_timer = 1;
6450 btconfig.kill_ack = htole32(0xffff0000);
6451 btconfig.kill_cts = htole32(0xffff0000);
6452 btconfig.sample_time = 2;
6453 btconfig.bt3_t2_timer = 0xc;
6455 for (i = 0; i < 12; i++)
6456 btconfig.lookup_table[i] = htole32(btcoex_3wire[i]);
6457 btconfig.valid = htole16(0xff);
6458 btconfig.prio_boost = 0xf0;
6459 DPRINTF(sc, IWN_DEBUG_RESET,
6460 "%s: configuring advanced bluetooth coexistence,"
6464 error = iwn_cmd(sc, IWN_CMD_BT_COEX, &btconfig,
6465 sizeof(btconfig), 1);
6471 memset(&btprio, 0, sizeof btprio);
6472 btprio.calib_init1 = 0x6;
6473 btprio.calib_init2 = 0x7;
6474 btprio.calib_periodic_low1 = 0x2;
6475 btprio.calib_periodic_low2 = 0x3;
6476 btprio.calib_periodic_high1 = 0x4;
6477 btprio.calib_periodic_high2 = 0x5;
6479 btprio.scan52 = 0x8;
6480 btprio.scan24 = 0xa;
6481 error = iwn_cmd(sc, IWN_CMD_BT_COEX_PRIOTABLE, &btprio, sizeof(btprio),
6486 /* Force BT state machine change. */
6487 memset(&btprot, 0, sizeof btprot);
6490 error = iwn_cmd(sc, IWN_CMD_BT_COEX_PROT, &btprot, sizeof(btprot), 1);
6494 return iwn_cmd(sc, IWN_CMD_BT_COEX_PROT, &btprot, sizeof(btprot), 1);
6498 iwn5000_runtime_calib(struct iwn_softc *sc)
6500 struct iwn5000_calib_config cmd;
6502 memset(&cmd, 0, sizeof cmd);
6503 cmd.ucode.once.enable = 0xffffffff;
6504 cmd.ucode.once.start = IWN5000_CALIB_DC;
6505 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
6506 "%s: configuring runtime calibration\n", __func__);
6507 return iwn_cmd(sc, IWN5000_CMD_CALIB_CONFIG, &cmd, sizeof(cmd), 0);
6511 iwn_get_rxon_ht_flags(struct iwn_softc *sc, struct ieee80211_channel *c)
6513 struct ieee80211com *ic = &sc->sc_ic;
6514 uint32_t htflags = 0;
6516 if (! IEEE80211_IS_CHAN_HT(c))
6519 htflags |= IWN_RXON_HT_PROTMODE(ic->ic_curhtprotmode);
6521 if (IEEE80211_IS_CHAN_HT40(c)) {
6522 switch (ic->ic_curhtprotmode) {
6523 case IEEE80211_HTINFO_OPMODE_HT20PR:
6524 htflags |= IWN_RXON_HT_MODEPURE40;
6527 htflags |= IWN_RXON_HT_MODEMIXED;
6531 if (IEEE80211_IS_CHAN_HT40D(c))
6532 htflags |= IWN_RXON_HT_HT40MINUS;
6538 iwn_send_rxon(struct iwn_softc *sc, int assoc, int async)
6540 struct iwn_ops *ops = &sc->ops;
6543 IWN_LOCK_ASSERT(sc);
6545 if (sc->sc_is_scanning)
6546 device_printf(sc->sc_dev,
6547 "%s: is_scanning set, before RXON\n",
6549 error = iwn_cmd(sc, IWN_CMD_RXON, sc->rxon, sc->rxonsz, async);
6551 device_printf(sc->sc_dev, "%s: RXON command failed\n",
6557 * Reconfiguring RXON clears the firmware nodes table so we must
6558 * add the broadcast node again.
6560 if ((sc->rxon->filter & htole32(IWN_FILTER_BSS)) == 0) {
6561 if ((error = iwn_add_broadcast_node(sc, async)) != 0) {
6562 device_printf(sc->sc_dev,
6563 "%s: could not add broadcast node\n", __func__);
6568 /* Configuration has changed, set TX power accordingly. */
6569 if ((error = ops->set_txpower(sc, async)) != 0) {
6570 device_printf(sc->sc_dev, "%s: could not set TX power\n",
6579 iwn_config(struct iwn_softc *sc)
6581 struct ieee80211com *ic = &sc->sc_ic;
6582 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
6583 const uint8_t *macaddr;
6588 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
6590 if ((sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSET)
6591 && (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSETv2)) {
6592 device_printf(sc->sc_dev,"%s: temp_offset and temp_offsetv2 are"
6593 " exclusive each together. Review NIC config file. Conf"
6594 " : 0x%08x Flags : 0x%08x \n", __func__,
6595 sc->base_params->calib_need,
6596 (IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSET |
6597 IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSETv2));
6601 /* Compute temperature calib if needed. Will be send by send calib */
6602 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSET) {
6603 error = iwn5000_temp_offset_calib(sc);
6605 device_printf(sc->sc_dev,
6606 "%s: could not set temperature offset\n", __func__);
6609 } else if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSETv2) {
6610 error = iwn5000_temp_offset_calibv2(sc);
6612 device_printf(sc->sc_dev,
6613 "%s: could not compute temperature offset v2\n",
6619 if (sc->hw_type == IWN_HW_REV_TYPE_6050) {
6620 /* Configure runtime DC calibration. */
6621 error = iwn5000_runtime_calib(sc);
6623 device_printf(sc->sc_dev,
6624 "%s: could not configure runtime calibration\n",
6630 /* Configure valid TX chains for >=5000 Series. */
6631 if (sc->hw_type != IWN_HW_REV_TYPE_4965 &&
6632 IWN_UCODE_API(sc->ucode_rev) > 1) {
6633 txmask = htole32(sc->txchainmask);
6634 DPRINTF(sc, IWN_DEBUG_RESET | IWN_DEBUG_XMIT,
6635 "%s: configuring valid TX chains 0x%x\n", __func__, txmask);
6636 error = iwn_cmd(sc, IWN5000_CMD_TX_ANT_CONFIG, &txmask,
6639 device_printf(sc->sc_dev,
6640 "%s: could not configure valid TX chains, "
6641 "error %d\n", __func__, error);
6646 /* Configure bluetooth coexistence. */
6649 /* Configure bluetooth coexistence if needed. */
6650 if (sc->base_params->bt_mode == IWN_BT_ADVANCED)
6651 error = iwn_send_advanced_btcoex(sc);
6652 if (sc->base_params->bt_mode == IWN_BT_SIMPLE)
6653 error = iwn_send_btcoex(sc);
6656 device_printf(sc->sc_dev,
6657 "%s: could not configure bluetooth coexistence, error %d\n",
6662 /* Set mode, channel, RX filter and enable RX. */
6663 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX];
6664 memset(sc->rxon, 0, sizeof (struct iwn_rxon));
6665 macaddr = vap ? vap->iv_myaddr : ic->ic_macaddr;
6666 IEEE80211_ADDR_COPY(sc->rxon->myaddr, macaddr);
6667 IEEE80211_ADDR_COPY(sc->rxon->wlap, macaddr);
6668 sc->rxon->chan = ieee80211_chan2ieee(ic, ic->ic_curchan);
6669 sc->rxon->flags = htole32(IWN_RXON_TSF | IWN_RXON_CTS_TO_SELF);
6670 if (IEEE80211_IS_CHAN_2GHZ(ic->ic_curchan))
6671 sc->rxon->flags |= htole32(IWN_RXON_AUTO | IWN_RXON_24GHZ);
6672 switch (ic->ic_opmode) {
6673 case IEEE80211_M_STA:
6674 sc->rxon->mode = IWN_MODE_STA;
6675 sc->rxon->filter = htole32(IWN_FILTER_MULTICAST);
6677 case IEEE80211_M_MONITOR:
6678 sc->rxon->mode = IWN_MODE_MONITOR;
6679 sc->rxon->filter = htole32(IWN_FILTER_MULTICAST |
6680 IWN_FILTER_CTL | IWN_FILTER_PROMISC);
6683 /* Should not get there. */
6686 sc->rxon->cck_mask = 0x0f; /* not yet negotiated */
6687 sc->rxon->ofdm_mask = 0xff; /* not yet negotiated */
6688 sc->rxon->ht_single_mask = 0xff;
6689 sc->rxon->ht_dual_mask = 0xff;
6690 sc->rxon->ht_triple_mask = 0xff;
6692 * In active association mode, ensure that
6693 * all the receive chains are enabled.
6695 * Since we're not yet doing SMPS, don't allow the
6696 * number of idle RX chains to be less than the active
6700 IWN_RXCHAIN_VALID(sc->rxchainmask) |
6701 IWN_RXCHAIN_MIMO_COUNT(sc->nrxchains) |
6702 IWN_RXCHAIN_IDLE_COUNT(sc->nrxchains);
6703 sc->rxon->rxchain = htole16(rxchain);
6704 DPRINTF(sc, IWN_DEBUG_RESET | IWN_DEBUG_XMIT,
6705 "%s: rxchainmask=0x%x, nrxchains=%d\n",
6710 sc->rxon->flags |= htole32(iwn_get_rxon_ht_flags(sc, ic->ic_curchan));
6712 DPRINTF(sc, IWN_DEBUG_RESET,
6713 "%s: setting configuration; flags=0x%08x\n",
6714 __func__, le32toh(sc->rxon->flags));
6715 if ((error = iwn_send_rxon(sc, 0, 0)) != 0) {
6716 device_printf(sc->sc_dev, "%s: could not send RXON\n",
6721 if ((error = iwn_set_critical_temp(sc)) != 0) {
6722 device_printf(sc->sc_dev,
6723 "%s: could not set critical temperature\n", __func__);
6727 /* Set power saving level to CAM during initialization. */
6728 if ((error = iwn_set_pslevel(sc, 0, 0, 0)) != 0) {
6729 device_printf(sc->sc_dev,
6730 "%s: could not set power saving level\n", __func__);
6734 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
6740 iwn_get_active_dwell_time(struct iwn_softc *sc,
6741 struct ieee80211_channel *c, uint8_t n_probes)
6743 /* No channel? Default to 2GHz settings */
6744 if (c == NULL || IEEE80211_IS_CHAN_2GHZ(c)) {
6745 return (IWN_ACTIVE_DWELL_TIME_2GHZ +
6746 IWN_ACTIVE_DWELL_FACTOR_2GHZ * (n_probes + 1));
6749 /* 5GHz dwell time */
6750 return (IWN_ACTIVE_DWELL_TIME_5GHZ +
6751 IWN_ACTIVE_DWELL_FACTOR_5GHZ * (n_probes + 1));
6755 * Limit the total dwell time to 85% of the beacon interval.
6757 * Returns the dwell time in milliseconds.
6760 iwn_limit_dwell(struct iwn_softc *sc, uint16_t dwell_time)
6762 struct ieee80211com *ic = &sc->sc_ic;
6763 struct ieee80211vap *vap = NULL;
6766 /* bintval is in TU (1.024mS) */
6767 if (! TAILQ_EMPTY(&ic->ic_vaps)) {
6768 vap = TAILQ_FIRST(&ic->ic_vaps);
6769 bintval = vap->iv_bss->ni_intval;
6773 * If it's non-zero, we should calculate the minimum of
6774 * it and the DWELL_BASE.
6776 * XXX Yes, the math should take into account that bintval
6777 * is 1.024mS, not 1mS..
6780 DPRINTF(sc, IWN_DEBUG_SCAN,
6784 return (MIN(IWN_PASSIVE_DWELL_BASE, ((bintval * 85) / 100)));
6787 /* No association context? Default */
6788 return (IWN_PASSIVE_DWELL_BASE);
6792 iwn_get_passive_dwell_time(struct iwn_softc *sc, struct ieee80211_channel *c)
6796 if (c == NULL || IEEE80211_IS_CHAN_2GHZ(c)) {
6797 passive = IWN_PASSIVE_DWELL_BASE + IWN_PASSIVE_DWELL_TIME_2GHZ;
6799 passive = IWN_PASSIVE_DWELL_BASE + IWN_PASSIVE_DWELL_TIME_5GHZ;
6802 /* Clamp to the beacon interval if we're associated */
6803 return (iwn_limit_dwell(sc, passive));
6807 iwn_scan(struct iwn_softc *sc, struct ieee80211vap *vap,
6808 struct ieee80211_scan_state *ss, struct ieee80211_channel *c)
6810 struct ieee80211com *ic = &sc->sc_ic;
6811 struct ieee80211_node *ni = vap->iv_bss;
6812 struct iwn_scan_hdr *hdr;
6813 struct iwn_cmd_data *tx;
6814 struct iwn_scan_essid *essid;
6815 struct iwn_scan_chan *chan;
6816 struct ieee80211_frame *wh;
6817 struct ieee80211_rateset *rs;
6823 uint16_t dwell_active, dwell_passive;
6824 uint32_t extra, scan_service_time;
6826 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
6829 * We are absolutely not allowed to send a scan command when another
6830 * scan command is pending.
6832 if (sc->sc_is_scanning) {
6833 device_printf(sc->sc_dev, "%s: called whilst scanning!\n",
6838 /* Assign the scan channel */
6841 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX];
6842 buf = malloc(IWN_SCAN_MAXSZ, M_DEVBUF, M_NOWAIT | M_ZERO);
6844 device_printf(sc->sc_dev,
6845 "%s: could not allocate buffer for scan command\n",
6849 hdr = (struct iwn_scan_hdr *)buf;
6851 * Move to the next channel if no frames are received within 10ms
6852 * after sending the probe request.
6854 hdr->quiet_time = htole16(10); /* timeout in milliseconds */
6855 hdr->quiet_threshold = htole16(1); /* min # of packets */
6857 * Max needs to be greater than active and passive and quiet!
6858 * It's also in microseconds!
6860 hdr->max_svc = htole32(250 * 1024);
6863 * Reset scan: interval=100
6864 * Normal scan: interval=becaon interval
6865 * suspend_time: 100 (TU)
6868 extra = (100 /* suspend_time */ / 100 /* beacon interval */) << 22;
6869 //scan_service_time = extra | ((100 /* susp */ % 100 /* int */) * 1024);
6870 scan_service_time = (4 << 22) | (100 * 1024); /* Hardcode for now! */
6871 hdr->pause_svc = htole32(scan_service_time);
6873 /* Select antennas for scanning. */
6875 IWN_RXCHAIN_VALID(sc->rxchainmask) |
6876 IWN_RXCHAIN_FORCE_MIMO_SEL(sc->rxchainmask) |
6877 IWN_RXCHAIN_DRIVER_FORCE;
6878 if (IEEE80211_IS_CHAN_A(c) &&
6879 sc->hw_type == IWN_HW_REV_TYPE_4965) {
6880 /* Ant A must be avoided in 5GHz because of an HW bug. */
6881 rxchain |= IWN_RXCHAIN_FORCE_SEL(IWN_ANT_B);
6882 } else /* Use all available RX antennas. */
6883 rxchain |= IWN_RXCHAIN_FORCE_SEL(sc->rxchainmask);
6884 hdr->rxchain = htole16(rxchain);
6885 hdr->filter = htole32(IWN_FILTER_MULTICAST | IWN_FILTER_BEACON);
6887 tx = (struct iwn_cmd_data *)(hdr + 1);
6888 tx->flags = htole32(IWN_TX_AUTO_SEQ);
6889 tx->id = sc->broadcast_id;
6890 tx->lifetime = htole32(IWN_LIFETIME_INFINITE);
6892 if (IEEE80211_IS_CHAN_5GHZ(c)) {
6893 /* Send probe requests at 6Mbps. */
6894 tx->rate = htole32(0xd);
6895 rs = &ic->ic_sup_rates[IEEE80211_MODE_11A];
6897 hdr->flags = htole32(IWN_RXON_24GHZ | IWN_RXON_AUTO);
6898 if (sc->hw_type == IWN_HW_REV_TYPE_4965 &&
6899 sc->rxon->associd && sc->rxon->chan > 14)
6900 tx->rate = htole32(0xd);
6902 /* Send probe requests at 1Mbps. */
6903 tx->rate = htole32(10 | IWN_RFLAG_CCK);
6905 rs = &ic->ic_sup_rates[IEEE80211_MODE_11G];
6907 /* Use the first valid TX antenna. */
6908 txant = IWN_LSB(sc->txchainmask);
6909 tx->rate |= htole32(IWN_RFLAG_ANT(txant));
6912 * Only do active scanning if we're announcing a probe request
6913 * for a given SSID (or more, if we ever add it to the driver.)
6918 * If we're scanning for a specific SSID, add it to the command.
6920 * XXX maybe look at adding support for scanning multiple SSIDs?
6922 essid = (struct iwn_scan_essid *)(tx + 1);
6924 if (ss->ss_ssid[0].len != 0) {
6925 essid[0].id = IEEE80211_ELEMID_SSID;
6926 essid[0].len = ss->ss_ssid[0].len;
6927 memcpy(essid[0].data, ss->ss_ssid[0].ssid, ss->ss_ssid[0].len);
6930 DPRINTF(sc, IWN_DEBUG_SCAN, "%s: ssid_len=%d, ssid=%*s\n",
6934 ss->ss_ssid[0].ssid);
6936 if (ss->ss_nssid > 0)
6941 * Build a probe request frame. Most of the following code is a
6942 * copy & paste of what is done in net80211.
6944 wh = (struct ieee80211_frame *)(essid + 20);
6945 wh->i_fc[0] = IEEE80211_FC0_VERSION_0 | IEEE80211_FC0_TYPE_MGT |
6946 IEEE80211_FC0_SUBTYPE_PROBE_REQ;
6947 wh->i_fc[1] = IEEE80211_FC1_DIR_NODS;
6948 IEEE80211_ADDR_COPY(wh->i_addr1, vap->iv_ifp->if_broadcastaddr);
6949 IEEE80211_ADDR_COPY(wh->i_addr2, IF_LLADDR(vap->iv_ifp));
6950 IEEE80211_ADDR_COPY(wh->i_addr3, vap->iv_ifp->if_broadcastaddr);
6951 *(uint16_t *)&wh->i_dur[0] = 0; /* filled by HW */
6952 *(uint16_t *)&wh->i_seq[0] = 0; /* filled by HW */
6954 frm = (uint8_t *)(wh + 1);
6955 frm = ieee80211_add_ssid(frm, NULL, 0);
6956 frm = ieee80211_add_rates(frm, rs);
6957 if (rs->rs_nrates > IEEE80211_RATE_SIZE)
6958 frm = ieee80211_add_xrates(frm, rs);
6959 if (ic->ic_htcaps & IEEE80211_HTC_HT)
6960 frm = ieee80211_add_htcap(frm, ni);
6962 /* Set length of probe request. */
6963 tx->len = htole16(frm - (uint8_t *)wh);
6966 * If active scanning is requested but a certain channel is
6967 * marked passive, we can do active scanning if we detect
6970 * There is an issue with some firmware versions that triggers
6971 * a sysassert on a "good CRC threshold" of zero (== disabled),
6972 * on a radar channel even though this means that we should NOT
6975 * The "good CRC threshold" is the number of frames that we
6976 * need to receive during our dwell time on a channel before
6977 * sending out probes -- setting this to a huge value will
6978 * mean we never reach it, but at the same time work around
6979 * the aforementioned issue. Thus use IWL_GOOD_CRC_TH_NEVER
6980 * here instead of IWL_GOOD_CRC_TH_DISABLED.
6982 * This was fixed in later versions along with some other
6983 * scan changes, and the threshold behaves as a flag in those
6988 * If we're doing active scanning, set the crc_threshold
6989 * to a suitable value. This is different to active veruss
6990 * passive scanning depending upon the channel flags; the
6991 * firmware will obey that particular check for us.
6993 if (sc->tlv_feature_flags & IWN_UCODE_TLV_FLAGS_NEWSCAN)
6994 hdr->crc_threshold = is_active ?
6995 IWN_GOOD_CRC_TH_DEFAULT : IWN_GOOD_CRC_TH_DISABLED;
6997 hdr->crc_threshold = is_active ?
6998 IWN_GOOD_CRC_TH_DEFAULT : IWN_GOOD_CRC_TH_NEVER;
7000 chan = (struct iwn_scan_chan *)frm;
7001 chan->chan = htole16(ieee80211_chan2ieee(ic, c));
7003 if (ss->ss_nssid > 0)
7004 chan->flags |= htole32(IWN_CHAN_NPBREQS(1));
7005 chan->dsp_gain = 0x6e;
7008 * Set the passive/active flag depending upon the channel mode.
7009 * XXX TODO: take the is_active flag into account as well?
7011 if (c->ic_flags & IEEE80211_CHAN_PASSIVE)
7012 chan->flags |= htole32(IWN_CHAN_PASSIVE);
7014 chan->flags |= htole32(IWN_CHAN_ACTIVE);
7017 * Calculate the active/passive dwell times.
7020 dwell_active = iwn_get_active_dwell_time(sc, c, ss->ss_nssid);
7021 dwell_passive = iwn_get_passive_dwell_time(sc, c);
7023 /* Make sure they're valid */
7024 if (dwell_passive <= dwell_active)
7025 dwell_passive = dwell_active + 1;
7027 chan->active = htole16(dwell_active);
7028 chan->passive = htole16(dwell_passive);
7030 if (IEEE80211_IS_CHAN_5GHZ(c))
7031 chan->rf_gain = 0x3b;
7033 chan->rf_gain = 0x28;
7035 DPRINTF(sc, IWN_DEBUG_STATE,
7036 "%s: chan %u flags 0x%x rf_gain 0x%x "
7037 "dsp_gain 0x%x active %d passive %d scan_svc_time %d crc 0x%x "
7038 "isactive=%d numssid=%d\n", __func__,
7039 chan->chan, chan->flags, chan->rf_gain, chan->dsp_gain,
7040 dwell_active, dwell_passive, scan_service_time,
7041 hdr->crc_threshold, is_active, ss->ss_nssid);
7045 buflen = (uint8_t *)chan - buf;
7046 hdr->len = htole16(buflen);
7048 if (sc->sc_is_scanning) {
7049 device_printf(sc->sc_dev,
7050 "%s: called with is_scanning set!\n",
7053 sc->sc_is_scanning = 1;
7055 DPRINTF(sc, IWN_DEBUG_STATE, "sending scan command nchan=%d\n",
7057 error = iwn_cmd(sc, IWN_CMD_SCAN, buf, buflen, 1);
7058 free(buf, M_DEVBUF);
7060 callout_reset(&sc->scan_timeout, 5*hz, iwn_scan_timeout, sc);
7062 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
7068 iwn_auth(struct iwn_softc *sc, struct ieee80211vap *vap)
7070 struct ieee80211com *ic = &sc->sc_ic;
7071 struct ieee80211_node *ni = vap->iv_bss;
7074 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
7076 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX];
7077 /* Update adapter configuration. */
7078 IEEE80211_ADDR_COPY(sc->rxon->bssid, ni->ni_bssid);
7079 sc->rxon->chan = ieee80211_chan2ieee(ic, ni->ni_chan);
7080 sc->rxon->flags = htole32(IWN_RXON_TSF | IWN_RXON_CTS_TO_SELF);
7081 if (IEEE80211_IS_CHAN_2GHZ(ni->ni_chan))
7082 sc->rxon->flags |= htole32(IWN_RXON_AUTO | IWN_RXON_24GHZ);
7083 if (ic->ic_flags & IEEE80211_F_SHSLOT)
7084 sc->rxon->flags |= htole32(IWN_RXON_SHSLOT);
7085 if (ic->ic_flags & IEEE80211_F_SHPREAMBLE)
7086 sc->rxon->flags |= htole32(IWN_RXON_SHPREAMBLE);
7087 if (IEEE80211_IS_CHAN_A(ni->ni_chan)) {
7088 sc->rxon->cck_mask = 0;
7089 sc->rxon->ofdm_mask = 0x15;
7090 } else if (IEEE80211_IS_CHAN_B(ni->ni_chan)) {
7091 sc->rxon->cck_mask = 0x03;
7092 sc->rxon->ofdm_mask = 0;
7094 /* Assume 802.11b/g. */
7095 sc->rxon->cck_mask = 0x03;
7096 sc->rxon->ofdm_mask = 0x15;
7100 sc->rxon->flags |= htole32(iwn_get_rxon_ht_flags(sc, ic->ic_curchan));
7102 DPRINTF(sc, IWN_DEBUG_STATE, "rxon chan %d flags %x cck %x ofdm %x\n",
7103 sc->rxon->chan, sc->rxon->flags, sc->rxon->cck_mask,
7104 sc->rxon->ofdm_mask);
7106 if ((error = iwn_send_rxon(sc, 0, 1)) != 0) {
7107 device_printf(sc->sc_dev, "%s: could not send RXON\n",
7112 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
7118 iwn_run(struct iwn_softc *sc, struct ieee80211vap *vap)
7120 struct iwn_ops *ops = &sc->ops;
7121 struct ieee80211com *ic = &sc->sc_ic;
7122 struct ieee80211_node *ni = vap->iv_bss;
7123 struct iwn_node_info node;
7126 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
7128 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX];
7129 if (ic->ic_opmode == IEEE80211_M_MONITOR) {
7130 /* Link LED blinks while monitoring. */
7131 iwn_set_led(sc, IWN_LED_LINK, 5, 5);
7134 if ((error = iwn_set_timing(sc, ni)) != 0) {
7135 device_printf(sc->sc_dev,
7136 "%s: could not set timing, error %d\n", __func__, error);
7140 /* Update adapter configuration. */
7141 IEEE80211_ADDR_COPY(sc->rxon->bssid, ni->ni_bssid);
7142 sc->rxon->associd = htole16(IEEE80211_AID(ni->ni_associd));
7143 sc->rxon->chan = ieee80211_chan2ieee(ic, ni->ni_chan);
7144 sc->rxon->flags = htole32(IWN_RXON_TSF | IWN_RXON_CTS_TO_SELF);
7145 if (IEEE80211_IS_CHAN_2GHZ(ni->ni_chan))
7146 sc->rxon->flags |= htole32(IWN_RXON_AUTO | IWN_RXON_24GHZ);
7147 if (ic->ic_flags & IEEE80211_F_SHSLOT)
7148 sc->rxon->flags |= htole32(IWN_RXON_SHSLOT);
7149 if (ic->ic_flags & IEEE80211_F_SHPREAMBLE)
7150 sc->rxon->flags |= htole32(IWN_RXON_SHPREAMBLE);
7151 if (IEEE80211_IS_CHAN_A(ni->ni_chan)) {
7152 sc->rxon->cck_mask = 0;
7153 sc->rxon->ofdm_mask = 0x15;
7154 } else if (IEEE80211_IS_CHAN_B(ni->ni_chan)) {
7155 sc->rxon->cck_mask = 0x03;
7156 sc->rxon->ofdm_mask = 0;
7158 /* Assume 802.11b/g. */
7159 sc->rxon->cck_mask = 0x0f;
7160 sc->rxon->ofdm_mask = 0x15;
7163 sc->rxon->flags |= htole32(iwn_get_rxon_ht_flags(sc, ni->ni_chan));
7164 sc->rxon->filter |= htole32(IWN_FILTER_BSS);
7165 DPRINTF(sc, IWN_DEBUG_STATE, "rxon chan %d flags %x, curhtprotmode=%d\n",
7166 sc->rxon->chan, le32toh(sc->rxon->flags), ic->ic_curhtprotmode);
7168 if ((error = iwn_send_rxon(sc, 0, 1)) != 0) {
7169 device_printf(sc->sc_dev, "%s: could not send RXON\n",
7174 /* Fake a join to initialize the TX rate. */
7175 ((struct iwn_node *)ni)->id = IWN_ID_BSS;
7176 iwn_newassoc(ni, 1);
7179 memset(&node, 0, sizeof node);
7180 IEEE80211_ADDR_COPY(node.macaddr, ni->ni_macaddr);
7181 node.id = IWN_ID_BSS;
7182 if (IEEE80211_IS_CHAN_HT(ni->ni_chan)) {
7183 switch (ni->ni_htcap & IEEE80211_HTCAP_SMPS) {
7184 case IEEE80211_HTCAP_SMPS_ENA:
7185 node.htflags |= htole32(IWN_SMPS_MIMO_DIS);
7187 case IEEE80211_HTCAP_SMPS_DYNAMIC:
7188 node.htflags |= htole32(IWN_SMPS_MIMO_PROT);
7191 node.htflags |= htole32(IWN_AMDPU_SIZE_FACTOR(3) |
7192 IWN_AMDPU_DENSITY(5)); /* 4us */
7193 if (IEEE80211_IS_CHAN_HT40(ni->ni_chan))
7194 node.htflags |= htole32(IWN_NODE_HT40);
7196 DPRINTF(sc, IWN_DEBUG_STATE, "%s: adding BSS node\n", __func__);
7197 error = ops->add_node(sc, &node, 1);
7199 device_printf(sc->sc_dev,
7200 "%s: could not add BSS node, error %d\n", __func__, error);
7203 DPRINTF(sc, IWN_DEBUG_STATE, "%s: setting link quality for node %d\n",
7205 if ((error = iwn_set_link_quality(sc, ni)) != 0) {
7206 device_printf(sc->sc_dev,
7207 "%s: could not setup link quality for node %d, error %d\n",
7208 __func__, node.id, error);
7212 if ((error = iwn_init_sensitivity(sc)) != 0) {
7213 device_printf(sc->sc_dev,
7214 "%s: could not set sensitivity, error %d\n", __func__,
7218 /* Start periodic calibration timer. */
7219 sc->calib.state = IWN_CALIB_STATE_ASSOC;
7221 callout_reset(&sc->calib_to, msecs_to_ticks(500), iwn_calib_timeout,
7224 /* Link LED always on while associated. */
7225 iwn_set_led(sc, IWN_LED_LINK, 0, 1);
7227 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
7233 * This function is called by upper layer when an ADDBA request is received
7234 * from another STA and before the ADDBA response is sent.
7237 iwn_ampdu_rx_start(struct ieee80211_node *ni, struct ieee80211_rx_ampdu *rap,
7238 int baparamset, int batimeout, int baseqctl)
7240 #define MS(_v, _f) (((_v) & _f) >> _f##_S)
7241 struct iwn_softc *sc = ni->ni_ic->ic_softc;
7242 struct iwn_ops *ops = &sc->ops;
7243 struct iwn_node *wn = (void *)ni;
7244 struct iwn_node_info node;
7249 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7251 tid = MS(le16toh(baparamset), IEEE80211_BAPS_TID);
7252 ssn = MS(le16toh(baseqctl), IEEE80211_BASEQ_START);
7254 memset(&node, 0, sizeof node);
7256 node.control = IWN_NODE_UPDATE;
7257 node.flags = IWN_FLAG_SET_ADDBA;
7258 node.addba_tid = tid;
7259 node.addba_ssn = htole16(ssn);
7260 DPRINTF(sc, IWN_DEBUG_RECV, "ADDBA RA=%d TID=%d SSN=%d\n",
7262 error = ops->add_node(sc, &node, 1);
7265 return sc->sc_ampdu_rx_start(ni, rap, baparamset, batimeout, baseqctl);
7270 * This function is called by upper layer on teardown of an HT-immediate
7271 * Block Ack agreement (eg. uppon receipt of a DELBA frame).
7274 iwn_ampdu_rx_stop(struct ieee80211_node *ni, struct ieee80211_rx_ampdu *rap)
7276 struct ieee80211com *ic = ni->ni_ic;
7277 struct iwn_softc *sc = ic->ic_softc;
7278 struct iwn_ops *ops = &sc->ops;
7279 struct iwn_node *wn = (void *)ni;
7280 struct iwn_node_info node;
7283 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7285 /* XXX: tid as an argument */
7286 for (tid = 0; tid < WME_NUM_TID; tid++) {
7287 if (&ni->ni_rx_ampdu[tid] == rap)
7291 memset(&node, 0, sizeof node);
7293 node.control = IWN_NODE_UPDATE;
7294 node.flags = IWN_FLAG_SET_DELBA;
7295 node.delba_tid = tid;
7296 DPRINTF(sc, IWN_DEBUG_RECV, "DELBA RA=%d TID=%d\n", wn->id, tid);
7297 (void)ops->add_node(sc, &node, 1);
7298 sc->sc_ampdu_rx_stop(ni, rap);
7302 iwn_addba_request(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap,
7303 int dialogtoken, int baparamset, int batimeout)
7305 struct iwn_softc *sc = ni->ni_ic->ic_softc;
7308 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7310 for (qid = sc->firstaggqueue; qid < sc->ntxqs; qid++) {
7311 if (sc->qid2tap[qid] == NULL)
7314 if (qid == sc->ntxqs) {
7315 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: not free aggregation queue\n",
7319 tap->txa_private = malloc(sizeof(int), M_DEVBUF, M_NOWAIT);
7320 if (tap->txa_private == NULL) {
7321 device_printf(sc->sc_dev,
7322 "%s: failed to alloc TX aggregation structure\n", __func__);
7325 sc->qid2tap[qid] = tap;
7326 *(int *)tap->txa_private = qid;
7327 return sc->sc_addba_request(ni, tap, dialogtoken, baparamset,
7332 iwn_addba_response(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap,
7333 int code, int baparamset, int batimeout)
7335 struct iwn_softc *sc = ni->ni_ic->ic_softc;
7336 int qid = *(int *)tap->txa_private;
7337 uint8_t tid = tap->txa_tid;
7340 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7342 if (code == IEEE80211_STATUS_SUCCESS) {
7343 ni->ni_txseqs[tid] = tap->txa_start & 0xfff;
7344 ret = iwn_ampdu_tx_start(ni->ni_ic, ni, tid);
7348 sc->qid2tap[qid] = NULL;
7349 free(tap->txa_private, M_DEVBUF);
7350 tap->txa_private = NULL;
7352 return sc->sc_addba_response(ni, tap, code, baparamset, batimeout);
7356 * This function is called by upper layer when an ADDBA response is received
7360 iwn_ampdu_tx_start(struct ieee80211com *ic, struct ieee80211_node *ni,
7363 struct ieee80211_tx_ampdu *tap = &ni->ni_tx_ampdu[tid];
7364 struct iwn_softc *sc = ni->ni_ic->ic_softc;
7365 struct iwn_ops *ops = &sc->ops;
7366 struct iwn_node *wn = (void *)ni;
7367 struct iwn_node_info node;
7370 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7372 /* Enable TX for the specified RA/TID. */
7373 wn->disable_tid &= ~(1 << tid);
7374 memset(&node, 0, sizeof node);
7376 node.control = IWN_NODE_UPDATE;
7377 node.flags = IWN_FLAG_SET_DISABLE_TID;
7378 node.disable_tid = htole16(wn->disable_tid);
7379 error = ops->add_node(sc, &node, 1);
7383 if ((error = iwn_nic_lock(sc)) != 0)
7385 qid = *(int *)tap->txa_private;
7386 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: ra=%d tid=%d ssn=%d qid=%d\n",
7387 __func__, wn->id, tid, tap->txa_start, qid);
7388 ops->ampdu_tx_start(sc, ni, qid, tid, tap->txa_start & 0xfff);
7391 iwn_set_link_quality(sc, ni);
7396 iwn_ampdu_tx_stop(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap)
7398 struct iwn_softc *sc = ni->ni_ic->ic_softc;
7399 struct iwn_ops *ops = &sc->ops;
7400 uint8_t tid = tap->txa_tid;
7403 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7405 sc->sc_addba_stop(ni, tap);
7407 if (tap->txa_private == NULL)
7410 qid = *(int *)tap->txa_private;
7411 if (sc->txq[qid].queued != 0)
7413 if (iwn_nic_lock(sc) != 0)
7415 ops->ampdu_tx_stop(sc, qid, tid, tap->txa_start & 0xfff);
7417 sc->qid2tap[qid] = NULL;
7418 free(tap->txa_private, M_DEVBUF);
7419 tap->txa_private = NULL;
7423 iwn4965_ampdu_tx_start(struct iwn_softc *sc, struct ieee80211_node *ni,
7424 int qid, uint8_t tid, uint16_t ssn)
7426 struct iwn_node *wn = (void *)ni;
7428 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7430 /* Stop TX scheduler while we're changing its configuration. */
7431 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid),
7432 IWN4965_TXQ_STATUS_CHGACT);
7434 /* Assign RA/TID translation to the queue. */
7435 iwn_mem_write_2(sc, sc->sched_base + IWN4965_SCHED_TRANS_TBL(qid),
7438 /* Enable chain-building mode for the queue. */
7439 iwn_prph_setbits(sc, IWN4965_SCHED_QCHAIN_SEL, 1 << qid);
7441 /* Set starting sequence number from the ADDBA request. */
7442 sc->txq[qid].cur = sc->txq[qid].read = (ssn & 0xff);
7443 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | (ssn & 0xff));
7444 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_RDPTR(qid), ssn);
7446 /* Set scheduler window size. */
7447 iwn_mem_write(sc, sc->sched_base + IWN4965_SCHED_QUEUE_OFFSET(qid),
7449 /* Set scheduler frame limit. */
7450 iwn_mem_write(sc, sc->sched_base + IWN4965_SCHED_QUEUE_OFFSET(qid) + 4,
7451 IWN_SCHED_LIMIT << 16);
7453 /* Enable interrupts for the queue. */
7454 iwn_prph_setbits(sc, IWN4965_SCHED_INTR_MASK, 1 << qid);
7456 /* Mark the queue as active. */
7457 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid),
7458 IWN4965_TXQ_STATUS_ACTIVE | IWN4965_TXQ_STATUS_AGGR_ENA |
7459 iwn_tid2fifo[tid] << 1);
7463 iwn4965_ampdu_tx_stop(struct iwn_softc *sc, int qid, uint8_t tid, uint16_t ssn)
7465 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7467 /* Stop TX scheduler while we're changing its configuration. */
7468 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid),
7469 IWN4965_TXQ_STATUS_CHGACT);
7471 /* Set starting sequence number from the ADDBA request. */
7472 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | (ssn & 0xff));
7473 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_RDPTR(qid), ssn);
7475 /* Disable interrupts for the queue. */
7476 iwn_prph_clrbits(sc, IWN4965_SCHED_INTR_MASK, 1 << qid);
7478 /* Mark the queue as inactive. */
7479 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid),
7480 IWN4965_TXQ_STATUS_INACTIVE | iwn_tid2fifo[tid] << 1);
7484 iwn5000_ampdu_tx_start(struct iwn_softc *sc, struct ieee80211_node *ni,
7485 int qid, uint8_t tid, uint16_t ssn)
7487 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7489 struct iwn_node *wn = (void *)ni;
7491 /* Stop TX scheduler while we're changing its configuration. */
7492 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
7493 IWN5000_TXQ_STATUS_CHGACT);
7495 /* Assign RA/TID translation to the queue. */
7496 iwn_mem_write_2(sc, sc->sched_base + IWN5000_SCHED_TRANS_TBL(qid),
7499 /* Enable chain-building mode for the queue. */
7500 iwn_prph_setbits(sc, IWN5000_SCHED_QCHAIN_SEL, 1 << qid);
7502 /* Enable aggregation for the queue. */
7503 iwn_prph_setbits(sc, IWN5000_SCHED_AGGR_SEL, 1 << qid);
7505 /* Set starting sequence number from the ADDBA request. */
7506 sc->txq[qid].cur = sc->txq[qid].read = (ssn & 0xff);
7507 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | (ssn & 0xff));
7508 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_RDPTR(qid), ssn);
7510 /* Set scheduler window size and frame limit. */
7511 iwn_mem_write(sc, sc->sched_base + IWN5000_SCHED_QUEUE_OFFSET(qid) + 4,
7512 IWN_SCHED_LIMIT << 16 | IWN_SCHED_WINSZ);
7514 /* Enable interrupts for the queue. */
7515 iwn_prph_setbits(sc, IWN5000_SCHED_INTR_MASK, 1 << qid);
7517 /* Mark the queue as active. */
7518 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
7519 IWN5000_TXQ_STATUS_ACTIVE | iwn_tid2fifo[tid]);
7523 iwn5000_ampdu_tx_stop(struct iwn_softc *sc, int qid, uint8_t tid, uint16_t ssn)
7525 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7527 /* Stop TX scheduler while we're changing its configuration. */
7528 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
7529 IWN5000_TXQ_STATUS_CHGACT);
7531 /* Disable aggregation for the queue. */
7532 iwn_prph_clrbits(sc, IWN5000_SCHED_AGGR_SEL, 1 << qid);
7534 /* Set starting sequence number from the ADDBA request. */
7535 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | (ssn & 0xff));
7536 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_RDPTR(qid), ssn);
7538 /* Disable interrupts for the queue. */
7539 iwn_prph_clrbits(sc, IWN5000_SCHED_INTR_MASK, 1 << qid);
7541 /* Mark the queue as inactive. */
7542 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
7543 IWN5000_TXQ_STATUS_INACTIVE | iwn_tid2fifo[tid]);
7547 * Query calibration tables from the initialization firmware. We do this
7548 * only once at first boot. Called from a process context.
7551 iwn5000_query_calibration(struct iwn_softc *sc)
7553 struct iwn5000_calib_config cmd;
7556 memset(&cmd, 0, sizeof cmd);
7557 cmd.ucode.once.enable = htole32(0xffffffff);
7558 cmd.ucode.once.start = htole32(0xffffffff);
7559 cmd.ucode.once.send = htole32(0xffffffff);
7560 cmd.ucode.flags = htole32(0xffffffff);
7561 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: sending calibration query\n",
7563 error = iwn_cmd(sc, IWN5000_CMD_CALIB_CONFIG, &cmd, sizeof cmd, 0);
7567 /* Wait at most two seconds for calibration to complete. */
7568 if (!(sc->sc_flags & IWN_FLAG_CALIB_DONE))
7569 error = msleep(sc, &sc->sc_mtx, PCATCH, "iwncal", 2 * hz);
7574 * Send calibration results to the runtime firmware. These results were
7575 * obtained on first boot from the initialization firmware.
7578 iwn5000_send_calibration(struct iwn_softc *sc)
7582 for (idx = 0; idx < IWN5000_PHY_CALIB_MAX_RESULT; idx++) {
7583 if (!(sc->base_params->calib_need & (1<<idx))) {
7584 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
7585 "No need of calib %d\n",
7587 continue; /* no need for this calib */
7589 if (sc->calibcmd[idx].buf == NULL) {
7590 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
7591 "Need calib idx : %d but no available data\n",
7596 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
7597 "send calibration result idx=%d len=%d\n", idx,
7598 sc->calibcmd[idx].len);
7599 error = iwn_cmd(sc, IWN_CMD_PHY_CALIB, sc->calibcmd[idx].buf,
7600 sc->calibcmd[idx].len, 0);
7602 device_printf(sc->sc_dev,
7603 "%s: could not send calibration result, error %d\n",
7612 iwn5000_send_wimax_coex(struct iwn_softc *sc)
7614 struct iwn5000_wimax_coex wimax;
7617 if (sc->hw_type == IWN_HW_REV_TYPE_6050) {
7618 /* Enable WiMAX coexistence for combo adapters. */
7620 IWN_WIMAX_COEX_ASSOC_WA_UNMASK |
7621 IWN_WIMAX_COEX_UNASSOC_WA_UNMASK |
7622 IWN_WIMAX_COEX_STA_TABLE_VALID |
7623 IWN_WIMAX_COEX_ENABLE;
7624 memcpy(wimax.events, iwn6050_wimax_events,
7625 sizeof iwn6050_wimax_events);
7629 /* Disable WiMAX coexistence. */
7631 memset(wimax.events, 0, sizeof wimax.events);
7633 DPRINTF(sc, IWN_DEBUG_RESET, "%s: Configuring WiMAX coexistence\n",
7635 return iwn_cmd(sc, IWN5000_CMD_WIMAX_COEX, &wimax, sizeof wimax, 0);
7639 iwn5000_crystal_calib(struct iwn_softc *sc)
7641 struct iwn5000_phy_calib_crystal cmd;
7643 memset(&cmd, 0, sizeof cmd);
7644 cmd.code = IWN5000_PHY_CALIB_CRYSTAL;
7647 cmd.cap_pin[0] = le32toh(sc->eeprom_crystal) & 0xff;
7648 cmd.cap_pin[1] = (le32toh(sc->eeprom_crystal) >> 16) & 0xff;
7649 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "sending crystal calibration %d, %d\n",
7650 cmd.cap_pin[0], cmd.cap_pin[1]);
7651 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 0);
7655 iwn5000_temp_offset_calib(struct iwn_softc *sc)
7657 struct iwn5000_phy_calib_temp_offset cmd;
7659 memset(&cmd, 0, sizeof cmd);
7660 cmd.code = IWN5000_PHY_CALIB_TEMP_OFFSET;
7663 if (sc->eeprom_temp != 0)
7664 cmd.offset = htole16(sc->eeprom_temp);
7666 cmd.offset = htole16(IWN_DEFAULT_TEMP_OFFSET);
7667 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "setting radio sensor offset to %d\n",
7668 le16toh(cmd.offset));
7669 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 0);
7673 iwn5000_temp_offset_calibv2(struct iwn_softc *sc)
7675 struct iwn5000_phy_calib_temp_offsetv2 cmd;
7677 memset(&cmd, 0, sizeof cmd);
7678 cmd.code = IWN5000_PHY_CALIB_TEMP_OFFSET;
7681 if (sc->eeprom_temp != 0) {
7682 cmd.offset_low = htole16(sc->eeprom_temp);
7683 cmd.offset_high = htole16(sc->eeprom_temp_high);
7685 cmd.offset_low = htole16(IWN_DEFAULT_TEMP_OFFSET);
7686 cmd.offset_high = htole16(IWN_DEFAULT_TEMP_OFFSET);
7688 cmd.burnt_voltage_ref = htole16(sc->eeprom_voltage);
7690 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
7691 "setting radio sensor low offset to %d, high offset to %d, voltage to %d\n",
7692 le16toh(cmd.offset_low),
7693 le16toh(cmd.offset_high),
7694 le16toh(cmd.burnt_voltage_ref));
7696 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 0);
7700 * This function is called after the runtime firmware notifies us of its
7701 * readiness (called in a process context).
7704 iwn4965_post_alive(struct iwn_softc *sc)
7708 if ((error = iwn_nic_lock(sc)) != 0)
7711 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7713 /* Clear TX scheduler state in SRAM. */
7714 sc->sched_base = iwn_prph_read(sc, IWN_SCHED_SRAM_ADDR);
7715 iwn_mem_set_region_4(sc, sc->sched_base + IWN4965_SCHED_CTX_OFF, 0,
7716 IWN4965_SCHED_CTX_LEN / sizeof (uint32_t));
7718 /* Set physical address of TX scheduler rings (1KB aligned). */
7719 iwn_prph_write(sc, IWN4965_SCHED_DRAM_ADDR, sc->sched_dma.paddr >> 10);
7721 IWN_SETBITS(sc, IWN_FH_TX_CHICKEN, IWN_FH_TX_CHICKEN_SCHED_RETRY);
7723 /* Disable chain mode for all our 16 queues. */
7724 iwn_prph_write(sc, IWN4965_SCHED_QCHAIN_SEL, 0);
7726 for (qid = 0; qid < IWN4965_NTXQUEUES; qid++) {
7727 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_RDPTR(qid), 0);
7728 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | 0);
7730 /* Set scheduler window size. */
7731 iwn_mem_write(sc, sc->sched_base +
7732 IWN4965_SCHED_QUEUE_OFFSET(qid), IWN_SCHED_WINSZ);
7733 /* Set scheduler frame limit. */
7734 iwn_mem_write(sc, sc->sched_base +
7735 IWN4965_SCHED_QUEUE_OFFSET(qid) + 4,
7736 IWN_SCHED_LIMIT << 16);
7739 /* Enable interrupts for all our 16 queues. */
7740 iwn_prph_write(sc, IWN4965_SCHED_INTR_MASK, 0xffff);
7741 /* Identify TX FIFO rings (0-7). */
7742 iwn_prph_write(sc, IWN4965_SCHED_TXFACT, 0xff);
7744 /* Mark TX rings (4 EDCA + cmd + 2 HCCA) as active. */
7745 for (qid = 0; qid < 7; qid++) {
7746 static uint8_t qid2fifo[] = { 3, 2, 1, 0, 4, 5, 6 };
7747 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid),
7748 IWN4965_TXQ_STATUS_ACTIVE | qid2fifo[qid] << 1);
7755 * This function is called after the initialization or runtime firmware
7756 * notifies us of its readiness (called in a process context).
7759 iwn5000_post_alive(struct iwn_softc *sc)
7763 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
7765 /* Switch to using ICT interrupt mode. */
7766 iwn5000_ict_reset(sc);
7768 if ((error = iwn_nic_lock(sc)) != 0){
7769 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end in error\n", __func__);
7773 /* Clear TX scheduler state in SRAM. */
7774 sc->sched_base = iwn_prph_read(sc, IWN_SCHED_SRAM_ADDR);
7775 iwn_mem_set_region_4(sc, sc->sched_base + IWN5000_SCHED_CTX_OFF, 0,
7776 IWN5000_SCHED_CTX_LEN / sizeof (uint32_t));
7778 /* Set physical address of TX scheduler rings (1KB aligned). */
7779 iwn_prph_write(sc, IWN5000_SCHED_DRAM_ADDR, sc->sched_dma.paddr >> 10);
7781 IWN_SETBITS(sc, IWN_FH_TX_CHICKEN, IWN_FH_TX_CHICKEN_SCHED_RETRY);
7783 /* Enable chain mode for all queues, except command queue. */
7784 if (sc->sc_flags & IWN_FLAG_PAN_SUPPORT)
7785 iwn_prph_write(sc, IWN5000_SCHED_QCHAIN_SEL, 0xfffdf);
7787 iwn_prph_write(sc, IWN5000_SCHED_QCHAIN_SEL, 0xfffef);
7788 iwn_prph_write(sc, IWN5000_SCHED_AGGR_SEL, 0);
7790 for (qid = 0; qid < IWN5000_NTXQUEUES; qid++) {
7791 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_RDPTR(qid), 0);
7792 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | 0);
7794 iwn_mem_write(sc, sc->sched_base +
7795 IWN5000_SCHED_QUEUE_OFFSET(qid), 0);
7796 /* Set scheduler window size and frame limit. */
7797 iwn_mem_write(sc, sc->sched_base +
7798 IWN5000_SCHED_QUEUE_OFFSET(qid) + 4,
7799 IWN_SCHED_LIMIT << 16 | IWN_SCHED_WINSZ);
7802 /* Enable interrupts for all our 20 queues. */
7803 iwn_prph_write(sc, IWN5000_SCHED_INTR_MASK, 0xfffff);
7804 /* Identify TX FIFO rings (0-7). */
7805 iwn_prph_write(sc, IWN5000_SCHED_TXFACT, 0xff);
7807 /* Mark TX rings (4 EDCA + cmd + 2 HCCA) as active. */
7808 if (sc->sc_flags & IWN_FLAG_PAN_SUPPORT) {
7809 /* Mark TX rings as active. */
7810 for (qid = 0; qid < 11; qid++) {
7811 static uint8_t qid2fifo[] = { 3, 2, 1, 0, 0, 4, 2, 5, 4, 7, 5 };
7812 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
7813 IWN5000_TXQ_STATUS_ACTIVE | qid2fifo[qid]);
7816 /* Mark TX rings (4 EDCA + cmd + 2 HCCA) as active. */
7817 for (qid = 0; qid < 7; qid++) {
7818 static uint8_t qid2fifo[] = { 3, 2, 1, 0, 7, 5, 6 };
7819 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
7820 IWN5000_TXQ_STATUS_ACTIVE | qid2fifo[qid]);
7825 /* Configure WiMAX coexistence for combo adapters. */
7826 error = iwn5000_send_wimax_coex(sc);
7828 device_printf(sc->sc_dev,
7829 "%s: could not configure WiMAX coexistence, error %d\n",
7833 if (sc->hw_type != IWN_HW_REV_TYPE_5150) {
7834 /* Perform crystal calibration. */
7835 error = iwn5000_crystal_calib(sc);
7837 device_printf(sc->sc_dev,
7838 "%s: crystal calibration failed, error %d\n",
7843 if (!(sc->sc_flags & IWN_FLAG_CALIB_DONE)) {
7844 /* Query calibration from the initialization firmware. */
7845 if ((error = iwn5000_query_calibration(sc)) != 0) {
7846 device_printf(sc->sc_dev,
7847 "%s: could not query calibration, error %d\n",
7852 * We have the calibration results now, reboot with the
7853 * runtime firmware (call ourselves recursively!)
7856 error = iwn_hw_init(sc);
7858 /* Send calibration results to runtime firmware. */
7859 error = iwn5000_send_calibration(sc);
7862 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
7868 * The firmware boot code is small and is intended to be copied directly into
7869 * the NIC internal memory (no DMA transfer).
7872 iwn4965_load_bootcode(struct iwn_softc *sc, const uint8_t *ucode, int size)
7876 size /= sizeof (uint32_t);
7878 if ((error = iwn_nic_lock(sc)) != 0)
7881 /* Copy microcode image into NIC memory. */
7882 iwn_prph_write_region_4(sc, IWN_BSM_SRAM_BASE,
7883 (const uint32_t *)ucode, size);
7885 iwn_prph_write(sc, IWN_BSM_WR_MEM_SRC, 0);
7886 iwn_prph_write(sc, IWN_BSM_WR_MEM_DST, IWN_FW_TEXT_BASE);
7887 iwn_prph_write(sc, IWN_BSM_WR_DWCOUNT, size);
7889 /* Start boot load now. */
7890 iwn_prph_write(sc, IWN_BSM_WR_CTRL, IWN_BSM_WR_CTRL_START);
7892 /* Wait for transfer to complete. */
7893 for (ntries = 0; ntries < 1000; ntries++) {
7894 if (!(iwn_prph_read(sc, IWN_BSM_WR_CTRL) &
7895 IWN_BSM_WR_CTRL_START))
7899 if (ntries == 1000) {
7900 device_printf(sc->sc_dev, "%s: could not load boot firmware\n",
7906 /* Enable boot after power up. */
7907 iwn_prph_write(sc, IWN_BSM_WR_CTRL, IWN_BSM_WR_CTRL_START_EN);
7914 iwn4965_load_firmware(struct iwn_softc *sc)
7916 struct iwn_fw_info *fw = &sc->fw;
7917 struct iwn_dma_info *dma = &sc->fw_dma;
7920 /* Copy initialization sections into pre-allocated DMA-safe memory. */
7921 memcpy(dma->vaddr, fw->init.data, fw->init.datasz);
7922 bus_dmamap_sync(dma->tag, dma->map, BUS_DMASYNC_PREWRITE);
7923 memcpy(dma->vaddr + IWN4965_FW_DATA_MAXSZ,
7924 fw->init.text, fw->init.textsz);
7925 bus_dmamap_sync(dma->tag, dma->map, BUS_DMASYNC_PREWRITE);
7927 /* Tell adapter where to find initialization sections. */
7928 if ((error = iwn_nic_lock(sc)) != 0)
7930 iwn_prph_write(sc, IWN_BSM_DRAM_DATA_ADDR, dma->paddr >> 4);
7931 iwn_prph_write(sc, IWN_BSM_DRAM_DATA_SIZE, fw->init.datasz);
7932 iwn_prph_write(sc, IWN_BSM_DRAM_TEXT_ADDR,
7933 (dma->paddr + IWN4965_FW_DATA_MAXSZ) >> 4);
7934 iwn_prph_write(sc, IWN_BSM_DRAM_TEXT_SIZE, fw->init.textsz);
7937 /* Load firmware boot code. */
7938 error = iwn4965_load_bootcode(sc, fw->boot.text, fw->boot.textsz);
7940 device_printf(sc->sc_dev, "%s: could not load boot firmware\n",
7944 /* Now press "execute". */
7945 IWN_WRITE(sc, IWN_RESET, 0);
7947 /* Wait at most one second for first alive notification. */
7948 if ((error = msleep(sc, &sc->sc_mtx, PCATCH, "iwninit", hz)) != 0) {
7949 device_printf(sc->sc_dev,
7950 "%s: timeout waiting for adapter to initialize, error %d\n",
7955 /* Retrieve current temperature for initial TX power calibration. */
7956 sc->rawtemp = sc->ucode_info.temp[3].chan20MHz;
7957 sc->temp = iwn4965_get_temperature(sc);
7959 /* Copy runtime sections into pre-allocated DMA-safe memory. */
7960 memcpy(dma->vaddr, fw->main.data, fw->main.datasz);
7961 bus_dmamap_sync(dma->tag, dma->map, BUS_DMASYNC_PREWRITE);
7962 memcpy(dma->vaddr + IWN4965_FW_DATA_MAXSZ,
7963 fw->main.text, fw->main.textsz);
7964 bus_dmamap_sync(dma->tag, dma->map, BUS_DMASYNC_PREWRITE);
7966 /* Tell adapter where to find runtime sections. */
7967 if ((error = iwn_nic_lock(sc)) != 0)
7969 iwn_prph_write(sc, IWN_BSM_DRAM_DATA_ADDR, dma->paddr >> 4);
7970 iwn_prph_write(sc, IWN_BSM_DRAM_DATA_SIZE, fw->main.datasz);
7971 iwn_prph_write(sc, IWN_BSM_DRAM_TEXT_ADDR,
7972 (dma->paddr + IWN4965_FW_DATA_MAXSZ) >> 4);
7973 iwn_prph_write(sc, IWN_BSM_DRAM_TEXT_SIZE,
7974 IWN_FW_UPDATED | fw->main.textsz);
7981 iwn5000_load_firmware_section(struct iwn_softc *sc, uint32_t dst,
7982 const uint8_t *section, int size)
7984 struct iwn_dma_info *dma = &sc->fw_dma;
7987 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7989 /* Copy firmware section into pre-allocated DMA-safe memory. */
7990 memcpy(dma->vaddr, section, size);
7991 bus_dmamap_sync(dma->tag, dma->map, BUS_DMASYNC_PREWRITE);
7993 if ((error = iwn_nic_lock(sc)) != 0)
7996 IWN_WRITE(sc, IWN_FH_TX_CONFIG(IWN_SRVC_DMACHNL),
7997 IWN_FH_TX_CONFIG_DMA_PAUSE);
7999 IWN_WRITE(sc, IWN_FH_SRAM_ADDR(IWN_SRVC_DMACHNL), dst);
8000 IWN_WRITE(sc, IWN_FH_TFBD_CTRL0(IWN_SRVC_DMACHNL),
8001 IWN_LOADDR(dma->paddr));
8002 IWN_WRITE(sc, IWN_FH_TFBD_CTRL1(IWN_SRVC_DMACHNL),
8003 IWN_HIADDR(dma->paddr) << 28 | size);
8004 IWN_WRITE(sc, IWN_FH_TXBUF_STATUS(IWN_SRVC_DMACHNL),
8005 IWN_FH_TXBUF_STATUS_TBNUM(1) |
8006 IWN_FH_TXBUF_STATUS_TBIDX(1) |
8007 IWN_FH_TXBUF_STATUS_TFBD_VALID);
8009 /* Kick Flow Handler to start DMA transfer. */
8010 IWN_WRITE(sc, IWN_FH_TX_CONFIG(IWN_SRVC_DMACHNL),
8011 IWN_FH_TX_CONFIG_DMA_ENA | IWN_FH_TX_CONFIG_CIRQ_HOST_ENDTFD);
8015 /* Wait at most five seconds for FH DMA transfer to complete. */
8016 return msleep(sc, &sc->sc_mtx, PCATCH, "iwninit", 5 * hz);
8020 iwn5000_load_firmware(struct iwn_softc *sc)
8022 struct iwn_fw_part *fw;
8025 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8027 /* Load the initialization firmware on first boot only. */
8028 fw = (sc->sc_flags & IWN_FLAG_CALIB_DONE) ?
8029 &sc->fw.main : &sc->fw.init;
8031 error = iwn5000_load_firmware_section(sc, IWN_FW_TEXT_BASE,
8032 fw->text, fw->textsz);
8034 device_printf(sc->sc_dev,
8035 "%s: could not load firmware %s section, error %d\n",
8036 __func__, ".text", error);
8039 error = iwn5000_load_firmware_section(sc, IWN_FW_DATA_BASE,
8040 fw->data, fw->datasz);
8042 device_printf(sc->sc_dev,
8043 "%s: could not load firmware %s section, error %d\n",
8044 __func__, ".data", error);
8048 /* Now press "execute". */
8049 IWN_WRITE(sc, IWN_RESET, 0);
8054 * Extract text and data sections from a legacy firmware image.
8057 iwn_read_firmware_leg(struct iwn_softc *sc, struct iwn_fw_info *fw)
8059 const uint32_t *ptr;
8063 ptr = (const uint32_t *)fw->data;
8064 rev = le32toh(*ptr++);
8066 sc->ucode_rev = rev;
8068 /* Check firmware API version. */
8069 if (IWN_FW_API(rev) <= 1) {
8070 device_printf(sc->sc_dev,
8071 "%s: bad firmware, need API version >=2\n", __func__);
8074 if (IWN_FW_API(rev) >= 3) {
8075 /* Skip build number (version 2 header). */
8079 if (fw->size < hdrlen) {
8080 device_printf(sc->sc_dev, "%s: firmware too short: %zu bytes\n",
8081 __func__, fw->size);
8084 fw->main.textsz = le32toh(*ptr++);
8085 fw->main.datasz = le32toh(*ptr++);
8086 fw->init.textsz = le32toh(*ptr++);
8087 fw->init.datasz = le32toh(*ptr++);
8088 fw->boot.textsz = le32toh(*ptr++);
8090 /* Check that all firmware sections fit. */
8091 if (fw->size < hdrlen + fw->main.textsz + fw->main.datasz +
8092 fw->init.textsz + fw->init.datasz + fw->boot.textsz) {
8093 device_printf(sc->sc_dev, "%s: firmware too short: %zu bytes\n",
8094 __func__, fw->size);
8098 /* Get pointers to firmware sections. */
8099 fw->main.text = (const uint8_t *)ptr;
8100 fw->main.data = fw->main.text + fw->main.textsz;
8101 fw->init.text = fw->main.data + fw->main.datasz;
8102 fw->init.data = fw->init.text + fw->init.textsz;
8103 fw->boot.text = fw->init.data + fw->init.datasz;
8108 * Extract text and data sections from a TLV firmware image.
8111 iwn_read_firmware_tlv(struct iwn_softc *sc, struct iwn_fw_info *fw,
8114 const struct iwn_fw_tlv_hdr *hdr;
8115 const struct iwn_fw_tlv *tlv;
8116 const uint8_t *ptr, *end;
8120 if (fw->size < sizeof (*hdr)) {
8121 device_printf(sc->sc_dev, "%s: firmware too short: %zu bytes\n",
8122 __func__, fw->size);
8125 hdr = (const struct iwn_fw_tlv_hdr *)fw->data;
8126 if (hdr->signature != htole32(IWN_FW_SIGNATURE)) {
8127 device_printf(sc->sc_dev, "%s: bad firmware signature 0x%08x\n",
8128 __func__, le32toh(hdr->signature));
8131 DPRINTF(sc, IWN_DEBUG_RESET, "FW: \"%.64s\", build 0x%x\n", hdr->descr,
8132 le32toh(hdr->build));
8133 sc->ucode_rev = le32toh(hdr->rev);
8136 * Select the closest supported alternative that is less than
8137 * or equal to the specified one.
8139 altmask = le64toh(hdr->altmask);
8140 while (alt > 0 && !(altmask & (1ULL << alt)))
8141 alt--; /* Downgrade. */
8142 DPRINTF(sc, IWN_DEBUG_RESET, "using alternative %d\n", alt);
8144 ptr = (const uint8_t *)(hdr + 1);
8145 end = (const uint8_t *)(fw->data + fw->size);
8147 /* Parse type-length-value fields. */
8148 while (ptr + sizeof (*tlv) <= end) {
8149 tlv = (const struct iwn_fw_tlv *)ptr;
8150 len = le32toh(tlv->len);
8152 ptr += sizeof (*tlv);
8153 if (ptr + len > end) {
8154 device_printf(sc->sc_dev,
8155 "%s: firmware too short: %zu bytes\n", __func__,
8159 /* Skip other alternatives. */
8160 if (tlv->alt != 0 && tlv->alt != htole16(alt))
8163 switch (le16toh(tlv->type)) {
8164 case IWN_FW_TLV_MAIN_TEXT:
8165 fw->main.text = ptr;
8166 fw->main.textsz = len;
8168 case IWN_FW_TLV_MAIN_DATA:
8169 fw->main.data = ptr;
8170 fw->main.datasz = len;
8172 case IWN_FW_TLV_INIT_TEXT:
8173 fw->init.text = ptr;
8174 fw->init.textsz = len;
8176 case IWN_FW_TLV_INIT_DATA:
8177 fw->init.data = ptr;
8178 fw->init.datasz = len;
8180 case IWN_FW_TLV_BOOT_TEXT:
8181 fw->boot.text = ptr;
8182 fw->boot.textsz = len;
8184 case IWN_FW_TLV_ENH_SENS:
8186 sc->sc_flags |= IWN_FLAG_ENH_SENS;
8188 case IWN_FW_TLV_PHY_CALIB:
8189 tmp = le32toh(*ptr);
8191 sc->reset_noise_gain = tmp;
8192 sc->noise_gain = tmp + 1;
8195 case IWN_FW_TLV_PAN:
8196 sc->sc_flags |= IWN_FLAG_PAN_SUPPORT;
8197 DPRINTF(sc, IWN_DEBUG_RESET,
8198 "PAN Support found: %d\n", 1);
8200 case IWN_FW_TLV_FLAGS:
8201 if (len < sizeof(uint32_t))
8203 if (len % sizeof(uint32_t))
8205 sc->tlv_feature_flags = le32toh(*ptr);
8206 DPRINTF(sc, IWN_DEBUG_RESET,
8207 "%s: feature: 0x%08x\n",
8209 sc->tlv_feature_flags);
8211 case IWN_FW_TLV_PBREQ_MAXLEN:
8212 case IWN_FW_TLV_RUNT_EVTLOG_PTR:
8213 case IWN_FW_TLV_RUNT_EVTLOG_SIZE:
8214 case IWN_FW_TLV_RUNT_ERRLOG_PTR:
8215 case IWN_FW_TLV_INIT_EVTLOG_PTR:
8216 case IWN_FW_TLV_INIT_EVTLOG_SIZE:
8217 case IWN_FW_TLV_INIT_ERRLOG_PTR:
8218 case IWN_FW_TLV_WOWLAN_INST:
8219 case IWN_FW_TLV_WOWLAN_DATA:
8220 DPRINTF(sc, IWN_DEBUG_RESET,
8221 "TLV type %d recognized but not handled\n",
8222 le16toh(tlv->type));
8225 DPRINTF(sc, IWN_DEBUG_RESET,
8226 "TLV type %d not handled\n", le16toh(tlv->type));
8229 next: /* TLV fields are 32-bit aligned. */
8230 ptr += (len + 3) & ~3;
8236 iwn_read_firmware(struct iwn_softc *sc)
8238 struct iwn_fw_info *fw = &sc->fw;
8241 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8245 memset(fw, 0, sizeof (*fw));
8247 /* Read firmware image from filesystem. */
8248 sc->fw_fp = firmware_get(sc->fwname);
8249 if (sc->fw_fp == NULL) {
8250 device_printf(sc->sc_dev, "%s: could not read firmware %s\n",
8251 __func__, sc->fwname);
8257 fw->size = sc->fw_fp->datasize;
8258 fw->data = (const uint8_t *)sc->fw_fp->data;
8259 if (fw->size < sizeof (uint32_t)) {
8260 device_printf(sc->sc_dev, "%s: firmware too short: %zu bytes\n",
8261 __func__, fw->size);
8266 /* Retrieve text and data sections. */
8267 if (*(const uint32_t *)fw->data != 0) /* Legacy image. */
8268 error = iwn_read_firmware_leg(sc, fw);
8270 error = iwn_read_firmware_tlv(sc, fw, 1);
8272 device_printf(sc->sc_dev,
8273 "%s: could not read firmware sections, error %d\n",
8278 device_printf(sc->sc_dev, "%s: ucode rev=0x%08x\n", __func__, sc->ucode_rev);
8280 /* Make sure text and data sections fit in hardware memory. */
8281 if (fw->main.textsz > sc->fw_text_maxsz ||
8282 fw->main.datasz > sc->fw_data_maxsz ||
8283 fw->init.textsz > sc->fw_text_maxsz ||
8284 fw->init.datasz > sc->fw_data_maxsz ||
8285 fw->boot.textsz > IWN_FW_BOOT_TEXT_MAXSZ ||
8286 (fw->boot.textsz & 3) != 0) {
8287 device_printf(sc->sc_dev, "%s: firmware sections too large\n",
8293 /* We can proceed with loading the firmware. */
8296 fail: iwn_unload_firmware(sc);
8301 iwn_unload_firmware(struct iwn_softc *sc)
8303 firmware_put(sc->fw_fp, FIRMWARE_UNLOAD);
8308 iwn_clock_wait(struct iwn_softc *sc)
8312 /* Set "initialization complete" bit. */
8313 IWN_SETBITS(sc, IWN_GP_CNTRL, IWN_GP_CNTRL_INIT_DONE);
8315 /* Wait for clock stabilization. */
8316 for (ntries = 0; ntries < 2500; ntries++) {
8317 if (IWN_READ(sc, IWN_GP_CNTRL) & IWN_GP_CNTRL_MAC_CLOCK_READY)
8321 device_printf(sc->sc_dev,
8322 "%s: timeout waiting for clock stabilization\n", __func__);
8327 iwn_apm_init(struct iwn_softc *sc)
8332 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8334 /* Disable L0s exit timer (NMI bug workaround). */
8335 IWN_SETBITS(sc, IWN_GIO_CHICKEN, IWN_GIO_CHICKEN_DIS_L0S_TIMER);
8336 /* Don't wait for ICH L0s (ICH bug workaround). */
8337 IWN_SETBITS(sc, IWN_GIO_CHICKEN, IWN_GIO_CHICKEN_L1A_NO_L0S_RX);
8339 /* Set FH wait threshold to max (HW bug under stress workaround). */
8340 IWN_SETBITS(sc, IWN_DBG_HPET_MEM, 0xffff0000);
8342 /* Enable HAP INTA to move adapter from L1a to L0s. */
8343 IWN_SETBITS(sc, IWN_HW_IF_CONFIG, IWN_HW_IF_CONFIG_HAP_WAKE_L1A);
8345 /* Retrieve PCIe Active State Power Management (ASPM). */
8346 reg = pci_read_config(sc->sc_dev, sc->sc_cap_off + PCIER_LINK_CTL, 4);
8347 /* Workaround for HW instability in PCIe L0->L0s->L1 transition. */
8348 if (reg & PCIEM_LINK_CTL_ASPMC_L1) /* L1 Entry enabled. */
8349 IWN_SETBITS(sc, IWN_GIO, IWN_GIO_L0S_ENA);
8351 IWN_CLRBITS(sc, IWN_GIO, IWN_GIO_L0S_ENA);
8353 if (sc->base_params->pll_cfg_val)
8354 IWN_SETBITS(sc, IWN_ANA_PLL, sc->base_params->pll_cfg_val);
8356 /* Wait for clock stabilization before accessing prph. */
8357 if ((error = iwn_clock_wait(sc)) != 0)
8360 if ((error = iwn_nic_lock(sc)) != 0)
8362 if (sc->hw_type == IWN_HW_REV_TYPE_4965) {
8363 /* Enable DMA and BSM (Bootstrap State Machine). */
8364 iwn_prph_write(sc, IWN_APMG_CLK_EN,
8365 IWN_APMG_CLK_CTRL_DMA_CLK_RQT |
8366 IWN_APMG_CLK_CTRL_BSM_CLK_RQT);
8369 iwn_prph_write(sc, IWN_APMG_CLK_EN,
8370 IWN_APMG_CLK_CTRL_DMA_CLK_RQT);
8373 /* Disable L1-Active. */
8374 iwn_prph_setbits(sc, IWN_APMG_PCI_STT, IWN_APMG_PCI_STT_L1A_DIS);
8381 iwn_apm_stop_master(struct iwn_softc *sc)
8385 /* Stop busmaster DMA activity. */
8386 IWN_SETBITS(sc, IWN_RESET, IWN_RESET_STOP_MASTER);
8387 for (ntries = 0; ntries < 100; ntries++) {
8388 if (IWN_READ(sc, IWN_RESET) & IWN_RESET_MASTER_DISABLED)
8392 device_printf(sc->sc_dev, "%s: timeout waiting for master\n", __func__);
8396 iwn_apm_stop(struct iwn_softc *sc)
8398 iwn_apm_stop_master(sc);
8400 /* Reset the entire device. */
8401 IWN_SETBITS(sc, IWN_RESET, IWN_RESET_SW);
8403 /* Clear "initialization complete" bit. */
8404 IWN_CLRBITS(sc, IWN_GP_CNTRL, IWN_GP_CNTRL_INIT_DONE);
8408 iwn4965_nic_config(struct iwn_softc *sc)
8410 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8412 if (IWN_RFCFG_TYPE(sc->rfcfg) == 1) {
8414 * I don't believe this to be correct but this is what the
8415 * vendor driver is doing. Probably the bits should not be
8416 * shifted in IWN_RFCFG_*.
8418 IWN_SETBITS(sc, IWN_HW_IF_CONFIG,
8419 IWN_RFCFG_TYPE(sc->rfcfg) |
8420 IWN_RFCFG_STEP(sc->rfcfg) |
8421 IWN_RFCFG_DASH(sc->rfcfg));
8423 IWN_SETBITS(sc, IWN_HW_IF_CONFIG,
8424 IWN_HW_IF_CONFIG_RADIO_SI | IWN_HW_IF_CONFIG_MAC_SI);
8429 iwn5000_nic_config(struct iwn_softc *sc)
8434 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8436 if (IWN_RFCFG_TYPE(sc->rfcfg) < 3) {
8437 IWN_SETBITS(sc, IWN_HW_IF_CONFIG,
8438 IWN_RFCFG_TYPE(sc->rfcfg) |
8439 IWN_RFCFG_STEP(sc->rfcfg) |
8440 IWN_RFCFG_DASH(sc->rfcfg));
8442 IWN_SETBITS(sc, IWN_HW_IF_CONFIG,
8443 IWN_HW_IF_CONFIG_RADIO_SI | IWN_HW_IF_CONFIG_MAC_SI);
8445 if ((error = iwn_nic_lock(sc)) != 0)
8447 iwn_prph_setbits(sc, IWN_APMG_PS, IWN_APMG_PS_EARLY_PWROFF_DIS);
8449 if (sc->hw_type == IWN_HW_REV_TYPE_1000) {
8451 * Select first Switching Voltage Regulator (1.32V) to
8452 * solve a stability issue related to noisy DC2DC line
8453 * in the silicon of 1000 Series.
8455 tmp = iwn_prph_read(sc, IWN_APMG_DIGITAL_SVR);
8456 tmp &= ~IWN_APMG_DIGITAL_SVR_VOLTAGE_MASK;
8457 tmp |= IWN_APMG_DIGITAL_SVR_VOLTAGE_1_32;
8458 iwn_prph_write(sc, IWN_APMG_DIGITAL_SVR, tmp);
8462 if (sc->sc_flags & IWN_FLAG_INTERNAL_PA) {
8463 /* Use internal power amplifier only. */
8464 IWN_WRITE(sc, IWN_GP_DRIVER, IWN_GP_DRIVER_RADIO_2X2_IPA);
8466 if (sc->base_params->additional_nic_config && sc->calib_ver >= 6) {
8467 /* Indicate that ROM calibration version is >=6. */
8468 IWN_SETBITS(sc, IWN_GP_DRIVER, IWN_GP_DRIVER_CALIB_VER6);
8470 if (sc->base_params->additional_gp_drv_bit)
8471 IWN_SETBITS(sc, IWN_GP_DRIVER,
8472 sc->base_params->additional_gp_drv_bit);
8477 * Take NIC ownership over Intel Active Management Technology (AMT).
8480 iwn_hw_prepare(struct iwn_softc *sc)
8484 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8486 /* Check if hardware is ready. */
8487 IWN_SETBITS(sc, IWN_HW_IF_CONFIG, IWN_HW_IF_CONFIG_NIC_READY);
8488 for (ntries = 0; ntries < 5; ntries++) {
8489 if (IWN_READ(sc, IWN_HW_IF_CONFIG) &
8490 IWN_HW_IF_CONFIG_NIC_READY)
8495 /* Hardware not ready, force into ready state. */
8496 IWN_SETBITS(sc, IWN_HW_IF_CONFIG, IWN_HW_IF_CONFIG_PREPARE);
8497 for (ntries = 0; ntries < 15000; ntries++) {
8498 if (!(IWN_READ(sc, IWN_HW_IF_CONFIG) &
8499 IWN_HW_IF_CONFIG_PREPARE_DONE))
8503 if (ntries == 15000)
8506 /* Hardware should be ready now. */
8507 IWN_SETBITS(sc, IWN_HW_IF_CONFIG, IWN_HW_IF_CONFIG_NIC_READY);
8508 for (ntries = 0; ntries < 5; ntries++) {
8509 if (IWN_READ(sc, IWN_HW_IF_CONFIG) &
8510 IWN_HW_IF_CONFIG_NIC_READY)
8518 iwn_hw_init(struct iwn_softc *sc)
8520 struct iwn_ops *ops = &sc->ops;
8521 int error, chnl, qid;
8523 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
8525 /* Clear pending interrupts. */
8526 IWN_WRITE(sc, IWN_INT, 0xffffffff);
8528 if ((error = iwn_apm_init(sc)) != 0) {
8529 device_printf(sc->sc_dev,
8530 "%s: could not power ON adapter, error %d\n", __func__,
8535 /* Select VMAIN power source. */
8536 if ((error = iwn_nic_lock(sc)) != 0)
8538 iwn_prph_clrbits(sc, IWN_APMG_PS, IWN_APMG_PS_PWR_SRC_MASK);
8541 /* Perform adapter-specific initialization. */
8542 if ((error = ops->nic_config(sc)) != 0)
8545 /* Initialize RX ring. */
8546 if ((error = iwn_nic_lock(sc)) != 0)
8548 IWN_WRITE(sc, IWN_FH_RX_CONFIG, 0);
8549 IWN_WRITE(sc, IWN_FH_RX_WPTR, 0);
8550 /* Set physical address of RX ring (256-byte aligned). */
8551 IWN_WRITE(sc, IWN_FH_RX_BASE, sc->rxq.desc_dma.paddr >> 8);
8552 /* Set physical address of RX status (16-byte aligned). */
8553 IWN_WRITE(sc, IWN_FH_STATUS_WPTR, sc->rxq.stat_dma.paddr >> 4);
8555 IWN_WRITE(sc, IWN_FH_RX_CONFIG,
8556 IWN_FH_RX_CONFIG_ENA |
8557 IWN_FH_RX_CONFIG_IGN_RXF_EMPTY | /* HW bug workaround */
8558 IWN_FH_RX_CONFIG_IRQ_DST_HOST |
8559 IWN_FH_RX_CONFIG_SINGLE_FRAME |
8560 IWN_FH_RX_CONFIG_RB_TIMEOUT(0) |
8561 IWN_FH_RX_CONFIG_NRBD(IWN_RX_RING_COUNT_LOG));
8563 IWN_WRITE(sc, IWN_FH_RX_WPTR, (IWN_RX_RING_COUNT - 1) & ~7);
8565 if ((error = iwn_nic_lock(sc)) != 0)
8568 /* Initialize TX scheduler. */
8569 iwn_prph_write(sc, sc->sched_txfact_addr, 0);
8571 /* Set physical address of "keep warm" page (16-byte aligned). */
8572 IWN_WRITE(sc, IWN_FH_KW_ADDR, sc->kw_dma.paddr >> 4);
8574 /* Initialize TX rings. */
8575 for (qid = 0; qid < sc->ntxqs; qid++) {
8576 struct iwn_tx_ring *txq = &sc->txq[qid];
8578 /* Set physical address of TX ring (256-byte aligned). */
8579 IWN_WRITE(sc, IWN_FH_CBBC_QUEUE(qid),
8580 txq->desc_dma.paddr >> 8);
8584 /* Enable DMA channels. */
8585 for (chnl = 0; chnl < sc->ndmachnls; chnl++) {
8586 IWN_WRITE(sc, IWN_FH_TX_CONFIG(chnl),
8587 IWN_FH_TX_CONFIG_DMA_ENA |
8588 IWN_FH_TX_CONFIG_DMA_CREDIT_ENA);
8591 /* Clear "radio off" and "commands blocked" bits. */
8592 IWN_WRITE(sc, IWN_UCODE_GP1_CLR, IWN_UCODE_GP1_RFKILL);
8593 IWN_WRITE(sc, IWN_UCODE_GP1_CLR, IWN_UCODE_GP1_CMD_BLOCKED);
8595 /* Clear pending interrupts. */
8596 IWN_WRITE(sc, IWN_INT, 0xffffffff);
8597 /* Enable interrupt coalescing. */
8598 IWN_WRITE(sc, IWN_INT_COALESCING, 512 / 8);
8599 /* Enable interrupts. */
8600 IWN_WRITE(sc, IWN_INT_MASK, sc->int_mask);
8602 /* _Really_ make sure "radio off" bit is cleared! */
8603 IWN_WRITE(sc, IWN_UCODE_GP1_CLR, IWN_UCODE_GP1_RFKILL);
8604 IWN_WRITE(sc, IWN_UCODE_GP1_CLR, IWN_UCODE_GP1_RFKILL);
8606 /* Enable shadow registers. */
8607 if (sc->base_params->shadow_reg_enable)
8608 IWN_SETBITS(sc, IWN_SHADOW_REG_CTRL, 0x800fffff);
8610 if ((error = ops->load_firmware(sc)) != 0) {
8611 device_printf(sc->sc_dev,
8612 "%s: could not load firmware, error %d\n", __func__,
8616 /* Wait at most one second for firmware alive notification. */
8617 if ((error = msleep(sc, &sc->sc_mtx, PCATCH, "iwninit", hz)) != 0) {
8618 device_printf(sc->sc_dev,
8619 "%s: timeout waiting for adapter to initialize, error %d\n",
8623 /* Do post-firmware initialization. */
8625 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
8627 return ops->post_alive(sc);
8631 iwn_hw_stop(struct iwn_softc *sc)
8633 int chnl, qid, ntries;
8635 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8637 IWN_WRITE(sc, IWN_RESET, IWN_RESET_NEVO);
8639 /* Disable interrupts. */
8640 IWN_WRITE(sc, IWN_INT_MASK, 0);
8641 IWN_WRITE(sc, IWN_INT, 0xffffffff);
8642 IWN_WRITE(sc, IWN_FH_INT, 0xffffffff);
8643 sc->sc_flags &= ~IWN_FLAG_USE_ICT;
8645 /* Make sure we no longer hold the NIC lock. */
8648 /* Stop TX scheduler. */
8649 iwn_prph_write(sc, sc->sched_txfact_addr, 0);
8651 /* Stop all DMA channels. */
8652 if (iwn_nic_lock(sc) == 0) {
8653 for (chnl = 0; chnl < sc->ndmachnls; chnl++) {
8654 IWN_WRITE(sc, IWN_FH_TX_CONFIG(chnl), 0);
8655 for (ntries = 0; ntries < 200; ntries++) {
8656 if (IWN_READ(sc, IWN_FH_TX_STATUS) &
8657 IWN_FH_TX_STATUS_IDLE(chnl))
8666 iwn_reset_rx_ring(sc, &sc->rxq);
8668 /* Reset all TX rings. */
8669 for (qid = 0; qid < sc->ntxqs; qid++)
8670 iwn_reset_tx_ring(sc, &sc->txq[qid]);
8672 if (iwn_nic_lock(sc) == 0) {
8673 iwn_prph_write(sc, IWN_APMG_CLK_DIS,
8674 IWN_APMG_CLK_CTRL_DMA_CLK_RQT);
8678 /* Power OFF adapter. */
8683 iwn_panicked(void *arg0, int pending)
8685 struct iwn_softc *sc = arg0;
8686 struct ieee80211com *ic = &sc->sc_ic;
8687 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
8693 printf("%s: null vap\n", __func__);
8697 device_printf(sc->sc_dev, "%s: controller panicked, iv_state = %d; "
8698 "restarting\n", __func__, vap->iv_state);
8701 * This is not enough work. We need to also reinitialise
8702 * the correct transmit state for aggregation enabled queues,
8703 * which has a very specific requirement of
8704 * ring index = 802.11 seqno % 256. If we don't do this (which
8705 * we definitely don't!) then the firmware will just panic again.
8708 ieee80211_restart_all(ic);
8712 iwn_stop_locked(sc);
8713 if ((error = iwn_init_locked(sc)) != 0) {
8714 device_printf(sc->sc_dev,
8715 "%s: could not init hardware\n", __func__);
8718 if (vap->iv_state >= IEEE80211_S_AUTH &&
8719 (error = iwn_auth(sc, vap)) != 0) {
8720 device_printf(sc->sc_dev,
8721 "%s: could not move to auth state\n", __func__);
8723 if (vap->iv_state >= IEEE80211_S_RUN &&
8724 (error = iwn_run(sc, vap)) != 0) {
8725 device_printf(sc->sc_dev,
8726 "%s: could not move to run state\n", __func__);
8735 iwn_init_locked(struct iwn_softc *sc)
8739 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
8741 IWN_LOCK_ASSERT(sc);
8743 if (sc->sc_flags & IWN_FLAG_RUNNING)
8746 sc->sc_flags |= IWN_FLAG_RUNNING;
8748 if ((error = iwn_hw_prepare(sc)) != 0) {
8749 device_printf(sc->sc_dev, "%s: hardware not ready, error %d\n",
8754 /* Initialize interrupt mask to default value. */
8755 sc->int_mask = IWN_INT_MASK_DEF;
8756 sc->sc_flags &= ~IWN_FLAG_USE_ICT;
8758 /* Check that the radio is not disabled by hardware switch. */
8759 if (!(IWN_READ(sc, IWN_GP_CNTRL) & IWN_GP_CNTRL_RFKILL)) {
8764 /* Read firmware images from the filesystem. */
8765 if ((error = iwn_read_firmware(sc)) != 0) {
8766 device_printf(sc->sc_dev,
8767 "%s: could not read firmware, error %d\n", __func__,
8772 /* Initialize hardware and upload firmware. */
8773 error = iwn_hw_init(sc);
8774 iwn_unload_firmware(sc);
8776 device_printf(sc->sc_dev,
8777 "%s: could not initialize hardware, error %d\n", __func__,
8782 /* Configure adapter now that it is ready. */
8783 if ((error = iwn_config(sc)) != 0) {
8784 device_printf(sc->sc_dev,
8785 "%s: could not configure device, error %d\n", __func__,
8790 callout_reset(&sc->watchdog_to, hz, iwn_watchdog, sc);
8793 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
8798 iwn_stop_locked(sc);
8800 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end in error\n",__func__);
8806 iwn_init(struct iwn_softc *sc)
8811 error = iwn_init_locked(sc);
8818 iwn_stop_locked(struct iwn_softc *sc)
8821 IWN_LOCK_ASSERT(sc);
8823 if (!(sc->sc_flags & IWN_FLAG_RUNNING))
8826 sc->sc_is_scanning = 0;
8827 sc->sc_tx_timer = 0;
8828 callout_stop(&sc->watchdog_to);
8829 callout_stop(&sc->scan_timeout);
8830 callout_stop(&sc->calib_to);
8831 sc->sc_flags &= ~IWN_FLAG_RUNNING;
8833 /* Power OFF hardware. */
8838 iwn_stop(struct iwn_softc *sc)
8841 iwn_stop_locked(sc);
8846 * Callback from net80211 to start a scan.
8849 iwn_scan_start(struct ieee80211com *ic)
8851 struct iwn_softc *sc = ic->ic_softc;
8854 /* make the link LED blink while we're scanning */
8855 iwn_set_led(sc, IWN_LED_LINK, 20, 2);
8860 * Callback from net80211 to terminate a scan.
8863 iwn_scan_end(struct ieee80211com *ic)
8865 struct iwn_softc *sc = ic->ic_softc;
8866 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
8869 if (vap->iv_state == IEEE80211_S_RUN) {
8870 /* Set link LED to ON status if we are associated */
8871 iwn_set_led(sc, IWN_LED_LINK, 0, 1);
8877 * Callback from net80211 to force a channel change.
8880 iwn_set_channel(struct ieee80211com *ic)
8882 const struct ieee80211_channel *c = ic->ic_curchan;
8883 struct iwn_softc *sc = ic->ic_softc;
8886 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8889 sc->sc_rxtap.wr_chan_freq = htole16(c->ic_freq);
8890 sc->sc_rxtap.wr_chan_flags = htole16(c->ic_flags);
8891 sc->sc_txtap.wt_chan_freq = htole16(c->ic_freq);
8892 sc->sc_txtap.wt_chan_flags = htole16(c->ic_flags);
8895 * Only need to set the channel in Monitor mode. AP scanning and auth
8896 * are already taken care of by their respective firmware commands.
8898 if (ic->ic_opmode == IEEE80211_M_MONITOR) {
8899 error = iwn_config(sc);
8901 device_printf(sc->sc_dev,
8902 "%s: error %d settting channel\n", __func__, error);
8908 * Callback from net80211 to start scanning of the current channel.
8911 iwn_scan_curchan(struct ieee80211_scan_state *ss, unsigned long maxdwell)
8913 struct ieee80211vap *vap = ss->ss_vap;
8914 struct ieee80211com *ic = vap->iv_ic;
8915 struct iwn_softc *sc = ic->ic_softc;
8919 error = iwn_scan(sc, vap, ss, ic->ic_curchan);
8922 ieee80211_cancel_scan(vap);
8926 * Callback from net80211 to handle the minimum dwell time being met.
8927 * The intent is to terminate the scan but we just let the firmware
8928 * notify us when it's finished as we have no safe way to abort it.
8931 iwn_scan_mindwell(struct ieee80211_scan_state *ss)
8933 /* NB: don't try to abort scan; wait for firmware to finish */
8936 #define IWN_DESC(x) case x: return #x
8939 * Translate CSR code to string
8941 static char *iwn_get_csr_string(int csr)
8944 IWN_DESC(IWN_HW_IF_CONFIG);
8945 IWN_DESC(IWN_INT_COALESCING);
8947 IWN_DESC(IWN_INT_MASK);
8948 IWN_DESC(IWN_FH_INT);
8949 IWN_DESC(IWN_GPIO_IN);
8950 IWN_DESC(IWN_RESET);
8951 IWN_DESC(IWN_GP_CNTRL);
8952 IWN_DESC(IWN_HW_REV);
8953 IWN_DESC(IWN_EEPROM);
8954 IWN_DESC(IWN_EEPROM_GP);
8955 IWN_DESC(IWN_OTP_GP);
8957 IWN_DESC(IWN_GP_UCODE);
8958 IWN_DESC(IWN_GP_DRIVER);
8959 IWN_DESC(IWN_UCODE_GP1);
8960 IWN_DESC(IWN_UCODE_GP2);
8962 IWN_DESC(IWN_DRAM_INT_TBL);
8963 IWN_DESC(IWN_GIO_CHICKEN);
8964 IWN_DESC(IWN_ANA_PLL);
8965 IWN_DESC(IWN_HW_REV_WA);
8966 IWN_DESC(IWN_DBG_HPET_MEM);
8968 return "UNKNOWN CSR";
8973 * This function print firmware register
8976 iwn_debug_register(struct iwn_softc *sc)
8979 static const uint32_t csr_tbl[] = {
9004 DPRINTF(sc, IWN_DEBUG_REGISTER,
9005 "CSR values: (2nd byte of IWN_INT_COALESCING is IWN_INT_PERIODIC)%s",
9007 for (i = 0; i < nitems(csr_tbl); i++){
9008 DPRINTF(sc, IWN_DEBUG_REGISTER," %10s: 0x%08x ",
9009 iwn_get_csr_string(csr_tbl[i]), IWN_READ(sc, csr_tbl[i]));
9011 DPRINTF(sc, IWN_DEBUG_REGISTER,"%s","\n");
9013 DPRINTF(sc, IWN_DEBUG_REGISTER,"%s","\n");