2 * Copyright (c) 2007-2009 Damien Bergamini <damien.bergamini@free.fr>
3 * Copyright (c) 2008 Benjamin Close <benjsc@FreeBSD.org>
4 * Copyright (c) 2008 Sam Leffler, Errno Consulting
5 * Copyright (c) 2011 Intel Corporation
6 * Copyright (c) 2013 Cedric GROSS <c.gross@kreiz-it.fr>
7 * Copyright (c) 2013 Adrian Chadd <adrian@FreeBSD.org>
9 * Permission to use, copy, modify, and distribute this software for any
10 * purpose with or without fee is hereby granted, provided that the above
11 * copyright notice and this permission notice appear in all copies.
13 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
14 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
15 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
16 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
17 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
18 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
19 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
23 * Driver for Intel WiFi Link 4965 and 1000/5000/6000 Series 802.11 network
27 #include <sys/cdefs.h>
28 __FBSDID("$FreeBSD$");
33 #include <sys/param.h>
34 #include <sys/sockio.h>
35 #include <sys/sysctl.h>
37 #include <sys/kernel.h>
38 #include <sys/socket.h>
39 #include <sys/systm.h>
40 #include <sys/malloc.h>
44 #include <sys/endian.h>
45 #include <sys/firmware.h>
46 #include <sys/limits.h>
47 #include <sys/module.h>
49 #include <sys/queue.h>
50 #include <sys/taskqueue.h>
52 #include <machine/bus.h>
53 #include <machine/resource.h>
54 #include <machine/clock.h>
56 #include <dev/pci/pcireg.h>
57 #include <dev/pci/pcivar.h>
60 #include <net/if_var.h>
61 #include <net/if_dl.h>
62 #include <net/if_media.h>
64 #include <netinet/in.h>
65 #include <netinet/if_ether.h>
67 #include <net80211/ieee80211_var.h>
68 #include <net80211/ieee80211_radiotap.h>
69 #include <net80211/ieee80211_regdomain.h>
70 #include <net80211/ieee80211_ratectl.h>
72 #include <dev/iwn/if_iwnreg.h>
73 #include <dev/iwn/if_iwnvar.h>
74 #include <dev/iwn/if_iwn_devid.h>
75 #include <dev/iwn/if_iwn_chip_cfg.h>
76 #include <dev/iwn/if_iwn_debug.h>
77 #include <dev/iwn/if_iwn_ioctl.h>
85 static const struct iwn_ident iwn_ident_table[] = {
86 { 0x8086, IWN_DID_6x05_1, "Intel Centrino Advanced-N 6205" },
87 { 0x8086, IWN_DID_1000_1, "Intel Centrino Wireless-N 1000" },
88 { 0x8086, IWN_DID_1000_2, "Intel Centrino Wireless-N 1000" },
89 { 0x8086, IWN_DID_6x05_2, "Intel Centrino Advanced-N 6205" },
90 { 0x8086, IWN_DID_6050_1, "Intel Centrino Advanced-N + WiMAX 6250" },
91 { 0x8086, IWN_DID_6050_2, "Intel Centrino Advanced-N + WiMAX 6250" },
92 { 0x8086, IWN_DID_x030_1, "Intel Centrino Wireless-N 1030" },
93 { 0x8086, IWN_DID_x030_2, "Intel Centrino Wireless-N 1030" },
94 { 0x8086, IWN_DID_x030_3, "Intel Centrino Advanced-N 6230" },
95 { 0x8086, IWN_DID_x030_4, "Intel Centrino Advanced-N 6230" },
96 { 0x8086, IWN_DID_6150_1, "Intel Centrino Wireless-N + WiMAX 6150" },
97 { 0x8086, IWN_DID_6150_2, "Intel Centrino Wireless-N + WiMAX 6150" },
98 { 0x8086, IWN_DID_2x00_1, "Intel(R) Centrino(R) Wireless-N 2200 BGN" },
99 { 0x8086, IWN_DID_2x00_2, "Intel(R) Centrino(R) Wireless-N 2200 BGN" },
100 /* XXX 2200D is IWN_SDID_2x00_4; there's no way to express this here! */
101 { 0x8086, IWN_DID_2x30_1, "Intel Centrino Wireless-N 2230" },
102 { 0x8086, IWN_DID_2x30_2, "Intel Centrino Wireless-N 2230" },
103 { 0x8086, IWN_DID_130_1, "Intel Centrino Wireless-N 130" },
104 { 0x8086, IWN_DID_130_2, "Intel Centrino Wireless-N 130" },
105 { 0x8086, IWN_DID_100_1, "Intel Centrino Wireless-N 100" },
106 { 0x8086, IWN_DID_100_2, "Intel Centrino Wireless-N 100" },
107 { 0x8086, IWN_DID_105_1, "Intel Centrino Wireless-N 105" },
108 { 0x8086, IWN_DID_105_2, "Intel Centrino Wireless-N 105" },
109 { 0x8086, IWN_DID_135_1, "Intel Centrino Wireless-N 135" },
110 { 0x8086, IWN_DID_135_2, "Intel Centrino Wireless-N 135" },
111 { 0x8086, IWN_DID_4965_1, "Intel Wireless WiFi Link 4965" },
112 { 0x8086, IWN_DID_6x00_1, "Intel Centrino Ultimate-N 6300" },
113 { 0x8086, IWN_DID_6x00_2, "Intel Centrino Advanced-N 6200" },
114 { 0x8086, IWN_DID_4965_2, "Intel Wireless WiFi Link 4965" },
115 { 0x8086, IWN_DID_4965_3, "Intel Wireless WiFi Link 4965" },
116 { 0x8086, IWN_DID_5x00_1, "Intel WiFi Link 5100" },
117 { 0x8086, IWN_DID_4965_4, "Intel Wireless WiFi Link 4965" },
118 { 0x8086, IWN_DID_5x00_3, "Intel Ultimate N WiFi Link 5300" },
119 { 0x8086, IWN_DID_5x00_4, "Intel Ultimate N WiFi Link 5300" },
120 { 0x8086, IWN_DID_5x00_2, "Intel WiFi Link 5100" },
121 { 0x8086, IWN_DID_6x00_3, "Intel Centrino Ultimate-N 6300" },
122 { 0x8086, IWN_DID_6x00_4, "Intel Centrino Advanced-N 6200" },
123 { 0x8086, IWN_DID_5x50_1, "Intel WiMAX/WiFi Link 5350" },
124 { 0x8086, IWN_DID_5x50_2, "Intel WiMAX/WiFi Link 5350" },
125 { 0x8086, IWN_DID_5x50_3, "Intel WiMAX/WiFi Link 5150" },
126 { 0x8086, IWN_DID_5x50_4, "Intel WiMAX/WiFi Link 5150" },
127 { 0x8086, IWN_DID_6035_1, "Intel Centrino Advanced 6235" },
128 { 0x8086, IWN_DID_6035_2, "Intel Centrino Advanced 6235" },
132 static int iwn_probe(device_t);
133 static int iwn_attach(device_t);
134 static int iwn4965_attach(struct iwn_softc *, uint16_t);
135 static int iwn5000_attach(struct iwn_softc *, uint16_t);
136 static int iwn_config_specific(struct iwn_softc *, uint16_t);
137 static void iwn_radiotap_attach(struct iwn_softc *);
138 static void iwn_sysctlattach(struct iwn_softc *);
139 static struct ieee80211vap *iwn_vap_create(struct ieee80211com *,
140 const char [IFNAMSIZ], int, enum ieee80211_opmode, int,
141 const uint8_t [IEEE80211_ADDR_LEN],
142 const uint8_t [IEEE80211_ADDR_LEN]);
143 static void iwn_vap_delete(struct ieee80211vap *);
144 static int iwn_detach(device_t);
145 static int iwn_shutdown(device_t);
146 static int iwn_suspend(device_t);
147 static int iwn_resume(device_t);
148 static int iwn_nic_lock(struct iwn_softc *);
149 static int iwn_eeprom_lock(struct iwn_softc *);
150 static int iwn_init_otprom(struct iwn_softc *);
151 static int iwn_read_prom_data(struct iwn_softc *, uint32_t, void *, int);
152 static void iwn_dma_map_addr(void *, bus_dma_segment_t *, int, int);
153 static int iwn_dma_contig_alloc(struct iwn_softc *, struct iwn_dma_info *,
154 void **, bus_size_t, bus_size_t);
155 static void iwn_dma_contig_free(struct iwn_dma_info *);
156 static int iwn_alloc_sched(struct iwn_softc *);
157 static void iwn_free_sched(struct iwn_softc *);
158 static int iwn_alloc_kw(struct iwn_softc *);
159 static void iwn_free_kw(struct iwn_softc *);
160 static int iwn_alloc_ict(struct iwn_softc *);
161 static void iwn_free_ict(struct iwn_softc *);
162 static int iwn_alloc_fwmem(struct iwn_softc *);
163 static void iwn_free_fwmem(struct iwn_softc *);
164 static int iwn_alloc_rx_ring(struct iwn_softc *, struct iwn_rx_ring *);
165 static void iwn_reset_rx_ring(struct iwn_softc *, struct iwn_rx_ring *);
166 static void iwn_free_rx_ring(struct iwn_softc *, struct iwn_rx_ring *);
167 static int iwn_alloc_tx_ring(struct iwn_softc *, struct iwn_tx_ring *,
169 static void iwn_reset_tx_ring(struct iwn_softc *, struct iwn_tx_ring *);
170 static void iwn_free_tx_ring(struct iwn_softc *, struct iwn_tx_ring *);
171 static void iwn5000_ict_reset(struct iwn_softc *);
172 static int iwn_read_eeprom(struct iwn_softc *,
173 uint8_t macaddr[IEEE80211_ADDR_LEN]);
174 static void iwn4965_read_eeprom(struct iwn_softc *);
176 static void iwn4965_print_power_group(struct iwn_softc *, int);
178 static void iwn5000_read_eeprom(struct iwn_softc *);
179 static uint32_t iwn_eeprom_channel_flags(struct iwn_eeprom_chan *);
180 static void iwn_read_eeprom_band(struct iwn_softc *, int, int, int *,
181 struct ieee80211_channel[]);
182 static void iwn_read_eeprom_ht40(struct iwn_softc *, int, int, int *,
183 struct ieee80211_channel[]);
184 static void iwn_read_eeprom_channels(struct iwn_softc *, int, uint32_t);
185 static struct iwn_eeprom_chan *iwn_find_eeprom_channel(struct iwn_softc *,
186 struct ieee80211_channel *);
187 static void iwn_getradiocaps(struct ieee80211com *, int, int *,
188 struct ieee80211_channel[]);
189 static int iwn_setregdomain(struct ieee80211com *,
190 struct ieee80211_regdomain *, int,
191 struct ieee80211_channel[]);
192 static void iwn_read_eeprom_enhinfo(struct iwn_softc *);
193 static struct ieee80211_node *iwn_node_alloc(struct ieee80211vap *,
194 const uint8_t mac[IEEE80211_ADDR_LEN]);
195 static void iwn_newassoc(struct ieee80211_node *, int);
196 static int iwn_media_change(struct ifnet *);
197 static int iwn_newstate(struct ieee80211vap *, enum ieee80211_state, int);
198 static void iwn_calib_timeout(void *);
199 static void iwn_rx_phy(struct iwn_softc *, struct iwn_rx_desc *,
200 struct iwn_rx_data *);
201 static void iwn_rx_done(struct iwn_softc *, struct iwn_rx_desc *,
202 struct iwn_rx_data *);
203 static void iwn_rx_compressed_ba(struct iwn_softc *, struct iwn_rx_desc *,
204 struct iwn_rx_data *);
205 static void iwn5000_rx_calib_results(struct iwn_softc *,
206 struct iwn_rx_desc *, struct iwn_rx_data *);
207 static void iwn_rx_statistics(struct iwn_softc *, struct iwn_rx_desc *,
208 struct iwn_rx_data *);
209 static void iwn4965_tx_done(struct iwn_softc *, struct iwn_rx_desc *,
210 struct iwn_rx_data *);
211 static void iwn5000_tx_done(struct iwn_softc *, struct iwn_rx_desc *,
212 struct iwn_rx_data *);
213 static void iwn_tx_done(struct iwn_softc *, struct iwn_rx_desc *, int, int,
215 static void iwn_ampdu_tx_done(struct iwn_softc *, int, int, int, int, int,
217 static void iwn_cmd_done(struct iwn_softc *, struct iwn_rx_desc *);
218 static void iwn_notif_intr(struct iwn_softc *);
219 static void iwn_wakeup_intr(struct iwn_softc *);
220 static void iwn_rftoggle_intr(struct iwn_softc *);
221 static void iwn_fatal_intr(struct iwn_softc *);
222 static void iwn_intr(void *);
223 static void iwn4965_update_sched(struct iwn_softc *, int, int, uint8_t,
225 static void iwn5000_update_sched(struct iwn_softc *, int, int, uint8_t,
228 static void iwn5000_reset_sched(struct iwn_softc *, int, int);
230 static int iwn_tx_data(struct iwn_softc *, struct mbuf *,
231 struct ieee80211_node *);
232 static int iwn_tx_data_raw(struct iwn_softc *, struct mbuf *,
233 struct ieee80211_node *,
234 const struct ieee80211_bpf_params *params);
235 static void iwn_xmit_task(void *arg0, int pending);
236 static int iwn_raw_xmit(struct ieee80211_node *, struct mbuf *,
237 const struct ieee80211_bpf_params *);
238 static int iwn_transmit(struct ieee80211com *, struct mbuf *);
239 static void iwn_scan_timeout(void *);
240 static void iwn_watchdog(void *);
241 static int iwn_ioctl(struct ieee80211com *, u_long , void *);
242 static void iwn_parent(struct ieee80211com *);
243 static int iwn_cmd(struct iwn_softc *, int, const void *, int, int);
244 static int iwn4965_add_node(struct iwn_softc *, struct iwn_node_info *,
246 static int iwn5000_add_node(struct iwn_softc *, struct iwn_node_info *,
248 static int iwn_set_link_quality(struct iwn_softc *,
249 struct ieee80211_node *);
250 static int iwn_add_broadcast_node(struct iwn_softc *, int);
251 static int iwn_updateedca(struct ieee80211com *);
252 static void iwn_update_mcast(struct ieee80211com *);
253 static void iwn_set_led(struct iwn_softc *, uint8_t, uint8_t, uint8_t);
254 static int iwn_set_critical_temp(struct iwn_softc *);
255 static int iwn_set_timing(struct iwn_softc *, struct ieee80211_node *);
256 static void iwn4965_power_calibration(struct iwn_softc *, int);
257 static int iwn4965_set_txpower(struct iwn_softc *,
258 struct ieee80211_channel *, int);
259 static int iwn5000_set_txpower(struct iwn_softc *,
260 struct ieee80211_channel *, int);
261 static int iwn4965_get_rssi(struct iwn_softc *, struct iwn_rx_stat *);
262 static int iwn5000_get_rssi(struct iwn_softc *, struct iwn_rx_stat *);
263 static int iwn_get_noise(const struct iwn_rx_general_stats *);
264 static int iwn4965_get_temperature(struct iwn_softc *);
265 static int iwn5000_get_temperature(struct iwn_softc *);
266 static int iwn_init_sensitivity(struct iwn_softc *);
267 static void iwn_collect_noise(struct iwn_softc *,
268 const struct iwn_rx_general_stats *);
269 static int iwn4965_init_gains(struct iwn_softc *);
270 static int iwn5000_init_gains(struct iwn_softc *);
271 static int iwn4965_set_gains(struct iwn_softc *);
272 static int iwn5000_set_gains(struct iwn_softc *);
273 static void iwn_tune_sensitivity(struct iwn_softc *,
274 const struct iwn_rx_stats *);
275 static void iwn_save_stats_counters(struct iwn_softc *,
276 const struct iwn_stats *);
277 static int iwn_send_sensitivity(struct iwn_softc *);
278 static void iwn_check_rx_recovery(struct iwn_softc *, struct iwn_stats *);
279 static int iwn_set_pslevel(struct iwn_softc *, int, int, int);
280 static int iwn_send_btcoex(struct iwn_softc *);
281 static int iwn_send_advanced_btcoex(struct iwn_softc *);
282 static int iwn5000_runtime_calib(struct iwn_softc *);
283 static int iwn_config(struct iwn_softc *);
284 static int iwn_scan(struct iwn_softc *, struct ieee80211vap *,
285 struct ieee80211_scan_state *, struct ieee80211_channel *);
286 static int iwn_auth(struct iwn_softc *, struct ieee80211vap *vap);
287 static int iwn_run(struct iwn_softc *, struct ieee80211vap *vap);
288 static int iwn_ampdu_rx_start(struct ieee80211_node *,
289 struct ieee80211_rx_ampdu *, int, int, int);
290 static void iwn_ampdu_rx_stop(struct ieee80211_node *,
291 struct ieee80211_rx_ampdu *);
292 static int iwn_addba_request(struct ieee80211_node *,
293 struct ieee80211_tx_ampdu *, int, int, int);
294 static int iwn_addba_response(struct ieee80211_node *,
295 struct ieee80211_tx_ampdu *, int, int, int);
296 static int iwn_ampdu_tx_start(struct ieee80211com *,
297 struct ieee80211_node *, uint8_t);
298 static void iwn_ampdu_tx_stop(struct ieee80211_node *,
299 struct ieee80211_tx_ampdu *);
300 static void iwn4965_ampdu_tx_start(struct iwn_softc *,
301 struct ieee80211_node *, int, uint8_t, uint16_t);
302 static void iwn4965_ampdu_tx_stop(struct iwn_softc *, int,
304 static void iwn5000_ampdu_tx_start(struct iwn_softc *,
305 struct ieee80211_node *, int, uint8_t, uint16_t);
306 static void iwn5000_ampdu_tx_stop(struct iwn_softc *, int,
308 static int iwn5000_query_calibration(struct iwn_softc *);
309 static int iwn5000_send_calibration(struct iwn_softc *);
310 static int iwn5000_send_wimax_coex(struct iwn_softc *);
311 static int iwn5000_crystal_calib(struct iwn_softc *);
312 static int iwn5000_temp_offset_calib(struct iwn_softc *);
313 static int iwn5000_temp_offset_calibv2(struct iwn_softc *);
314 static int iwn4965_post_alive(struct iwn_softc *);
315 static int iwn5000_post_alive(struct iwn_softc *);
316 static int iwn4965_load_bootcode(struct iwn_softc *, const uint8_t *,
318 static int iwn4965_load_firmware(struct iwn_softc *);
319 static int iwn5000_load_firmware_section(struct iwn_softc *, uint32_t,
320 const uint8_t *, int);
321 static int iwn5000_load_firmware(struct iwn_softc *);
322 static int iwn_read_firmware_leg(struct iwn_softc *,
323 struct iwn_fw_info *);
324 static int iwn_read_firmware_tlv(struct iwn_softc *,
325 struct iwn_fw_info *, uint16_t);
326 static int iwn_read_firmware(struct iwn_softc *);
327 static void iwn_unload_firmware(struct iwn_softc *);
328 static int iwn_clock_wait(struct iwn_softc *);
329 static int iwn_apm_init(struct iwn_softc *);
330 static void iwn_apm_stop_master(struct iwn_softc *);
331 static void iwn_apm_stop(struct iwn_softc *);
332 static int iwn4965_nic_config(struct iwn_softc *);
333 static int iwn5000_nic_config(struct iwn_softc *);
334 static int iwn_hw_prepare(struct iwn_softc *);
335 static int iwn_hw_init(struct iwn_softc *);
336 static void iwn_hw_stop(struct iwn_softc *);
337 static void iwn_radio_on(void *, int);
338 static void iwn_radio_off(void *, int);
339 static void iwn_panicked(void *, int);
340 static void iwn_init_locked(struct iwn_softc *);
341 static void iwn_init(struct iwn_softc *);
342 static void iwn_stop_locked(struct iwn_softc *);
343 static void iwn_stop(struct iwn_softc *);
344 static void iwn_scan_start(struct ieee80211com *);
345 static void iwn_scan_end(struct ieee80211com *);
346 static void iwn_set_channel(struct ieee80211com *);
347 static void iwn_scan_curchan(struct ieee80211_scan_state *, unsigned long);
348 static void iwn_scan_mindwell(struct ieee80211_scan_state *);
350 static char *iwn_get_csr_string(int);
351 static void iwn_debug_register(struct iwn_softc *);
354 static device_method_t iwn_methods[] = {
355 /* Device interface */
356 DEVMETHOD(device_probe, iwn_probe),
357 DEVMETHOD(device_attach, iwn_attach),
358 DEVMETHOD(device_detach, iwn_detach),
359 DEVMETHOD(device_shutdown, iwn_shutdown),
360 DEVMETHOD(device_suspend, iwn_suspend),
361 DEVMETHOD(device_resume, iwn_resume),
366 static driver_t iwn_driver = {
369 sizeof(struct iwn_softc)
371 static devclass_t iwn_devclass;
373 DRIVER_MODULE(iwn, pci, iwn_driver, iwn_devclass, NULL, NULL);
375 MODULE_VERSION(iwn, 1);
377 MODULE_DEPEND(iwn, firmware, 1, 1, 1);
378 MODULE_DEPEND(iwn, pci, 1, 1, 1);
379 MODULE_DEPEND(iwn, wlan, 1, 1, 1);
381 static d_ioctl_t iwn_cdev_ioctl;
382 static d_open_t iwn_cdev_open;
383 static d_close_t iwn_cdev_close;
385 static struct cdevsw iwn_cdevsw = {
386 .d_version = D_VERSION,
388 .d_open = iwn_cdev_open,
389 .d_close = iwn_cdev_close,
390 .d_ioctl = iwn_cdev_ioctl,
395 iwn_probe(device_t dev)
397 const struct iwn_ident *ident;
399 for (ident = iwn_ident_table; ident->name != NULL; ident++) {
400 if (pci_get_vendor(dev) == ident->vendor &&
401 pci_get_device(dev) == ident->device) {
402 device_set_desc(dev, ident->name);
403 return (BUS_PROBE_DEFAULT);
410 iwn_is_3stream_device(struct iwn_softc *sc)
412 /* XXX for now only 5300, until the 5350 can be tested */
413 if (sc->hw_type == IWN_HW_REV_TYPE_5300)
419 iwn_attach(device_t dev)
421 struct iwn_softc *sc = device_get_softc(dev);
422 struct ieee80211com *ic;
428 error = resource_int_value(device_get_name(sc->sc_dev),
429 device_get_unit(sc->sc_dev), "debug", &(sc->sc_debug));
436 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: begin\n",__func__);
439 * Get the offset of the PCI Express Capability Structure in PCI
440 * Configuration Space.
442 error = pci_find_cap(dev, PCIY_EXPRESS, &sc->sc_cap_off);
444 device_printf(dev, "PCIe capability structure not found!\n");
448 /* Clear device-specific "PCI retry timeout" register (41h). */
449 pci_write_config(dev, 0x41, 0, 1);
451 /* Enable bus-mastering. */
452 pci_enable_busmaster(dev);
455 sc->mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
457 if (sc->mem == NULL) {
458 device_printf(dev, "can't map mem space\n");
462 sc->sc_st = rman_get_bustag(sc->mem);
463 sc->sc_sh = rman_get_bushandle(sc->mem);
467 if (pci_alloc_msi(dev, &i) == 0)
469 /* Install interrupt handler. */
470 sc->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, RF_ACTIVE |
471 (rid != 0 ? 0 : RF_SHAREABLE));
472 if (sc->irq == NULL) {
473 device_printf(dev, "can't map interrupt\n");
480 /* Read hardware revision and attach. */
481 sc->hw_type = (IWN_READ(sc, IWN_HW_REV) >> IWN_HW_REV_TYPE_SHIFT)
482 & IWN_HW_REV_TYPE_MASK;
483 sc->subdevice_id = pci_get_subdevice(dev);
486 * 4965 versus 5000 and later have different methods.
487 * Let's set those up first.
489 if (sc->hw_type == IWN_HW_REV_TYPE_4965)
490 error = iwn4965_attach(sc, pci_get_device(dev));
492 error = iwn5000_attach(sc, pci_get_device(dev));
494 device_printf(dev, "could not attach device, error %d\n",
500 * Next, let's setup the various parameters of each NIC.
502 error = iwn_config_specific(sc, pci_get_device(dev));
504 device_printf(dev, "could not attach device, error %d\n",
509 if ((error = iwn_hw_prepare(sc)) != 0) {
510 device_printf(dev, "hardware not ready, error %d\n", error);
514 /* Allocate DMA memory for firmware transfers. */
515 if ((error = iwn_alloc_fwmem(sc)) != 0) {
517 "could not allocate memory for firmware, error %d\n",
522 /* Allocate "Keep Warm" page. */
523 if ((error = iwn_alloc_kw(sc)) != 0) {
525 "could not allocate keep warm page, error %d\n", error);
529 /* Allocate ICT table for 5000 Series. */
530 if (sc->hw_type != IWN_HW_REV_TYPE_4965 &&
531 (error = iwn_alloc_ict(sc)) != 0) {
532 device_printf(dev, "could not allocate ICT table, error %d\n",
537 /* Allocate TX scheduler "rings". */
538 if ((error = iwn_alloc_sched(sc)) != 0) {
540 "could not allocate TX scheduler rings, error %d\n", error);
544 /* Allocate TX rings (16 on 4965AGN, 20 on >=5000). */
545 for (i = 0; i < sc->ntxqs; i++) {
546 if ((error = iwn_alloc_tx_ring(sc, &sc->txq[i], i)) != 0) {
548 "could not allocate TX ring %d, error %d\n", i,
554 /* Allocate RX ring. */
555 if ((error = iwn_alloc_rx_ring(sc, &sc->rxq)) != 0) {
556 device_printf(dev, "could not allocate RX ring, error %d\n",
561 /* Clear pending interrupts. */
562 IWN_WRITE(sc, IWN_INT, 0xffffffff);
566 ic->ic_name = device_get_nameunit(dev);
567 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */
568 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */
570 /* Set device capabilities. */
572 IEEE80211_C_STA /* station mode supported */
573 | IEEE80211_C_MONITOR /* monitor mode supported */
575 | IEEE80211_C_BGSCAN /* background scanning */
577 | IEEE80211_C_TXPMGT /* tx power management */
578 | IEEE80211_C_SHSLOT /* short slot time supported */
580 | IEEE80211_C_SHPREAMBLE /* short preamble supported */
582 | IEEE80211_C_IBSS /* ibss/adhoc mode */
584 | IEEE80211_C_WME /* WME */
585 | IEEE80211_C_PMGT /* Station-side power mgmt */
588 /* Read MAC address, channels, etc from EEPROM. */
589 if ((error = iwn_read_eeprom(sc, ic->ic_macaddr)) != 0) {
590 device_printf(dev, "could not read EEPROM, error %d\n",
595 /* Count the number of available chains. */
597 ((sc->txchainmask >> 2) & 1) +
598 ((sc->txchainmask >> 1) & 1) +
599 ((sc->txchainmask >> 0) & 1);
601 ((sc->rxchainmask >> 2) & 1) +
602 ((sc->rxchainmask >> 1) & 1) +
603 ((sc->rxchainmask >> 0) & 1);
605 device_printf(dev, "MIMO %dT%dR, %.4s, address %6D\n",
606 sc->ntxchains, sc->nrxchains, sc->eeprom_domain,
607 ic->ic_macaddr, ":");
610 if (sc->sc_flags & IWN_FLAG_HAS_11N) {
611 ic->ic_rxstream = sc->nrxchains;
612 ic->ic_txstream = sc->ntxchains;
615 * Some of the 3 antenna devices (ie, the 4965) only supports
616 * 2x2 operation. So correct the number of streams if
617 * it's not a 3-stream device.
619 if (! iwn_is_3stream_device(sc)) {
620 if (ic->ic_rxstream > 2)
622 if (ic->ic_txstream > 2)
627 IEEE80211_HTCAP_SMPS_OFF /* SMPS mode disabled */
628 | IEEE80211_HTCAP_SHORTGI20 /* short GI in 20MHz */
629 | IEEE80211_HTCAP_CHWIDTH40 /* 40MHz channel width*/
630 | IEEE80211_HTCAP_SHORTGI40 /* short GI in 40MHz */
632 | IEEE80211_HTCAP_GREENFIELD
633 #if IWN_RBUF_SIZE == 8192
634 | IEEE80211_HTCAP_MAXAMSDU_7935 /* max A-MSDU length */
636 | IEEE80211_HTCAP_MAXAMSDU_3839 /* max A-MSDU length */
639 /* s/w capabilities */
640 | IEEE80211_HTC_HT /* HT operation */
641 | IEEE80211_HTC_AMPDU /* tx A-MPDU */
643 | IEEE80211_HTC_AMSDU /* tx A-MSDU */
648 ieee80211_ifattach(ic);
649 ic->ic_vap_create = iwn_vap_create;
650 ic->ic_ioctl = iwn_ioctl;
651 ic->ic_parent = iwn_parent;
652 ic->ic_vap_delete = iwn_vap_delete;
653 ic->ic_transmit = iwn_transmit;
654 ic->ic_raw_xmit = iwn_raw_xmit;
655 ic->ic_node_alloc = iwn_node_alloc;
656 sc->sc_ampdu_rx_start = ic->ic_ampdu_rx_start;
657 ic->ic_ampdu_rx_start = iwn_ampdu_rx_start;
658 sc->sc_ampdu_rx_stop = ic->ic_ampdu_rx_stop;
659 ic->ic_ampdu_rx_stop = iwn_ampdu_rx_stop;
660 sc->sc_addba_request = ic->ic_addba_request;
661 ic->ic_addba_request = iwn_addba_request;
662 sc->sc_addba_response = ic->ic_addba_response;
663 ic->ic_addba_response = iwn_addba_response;
664 sc->sc_addba_stop = ic->ic_addba_stop;
665 ic->ic_addba_stop = iwn_ampdu_tx_stop;
666 ic->ic_newassoc = iwn_newassoc;
667 ic->ic_wme.wme_update = iwn_updateedca;
668 ic->ic_update_mcast = iwn_update_mcast;
669 ic->ic_scan_start = iwn_scan_start;
670 ic->ic_scan_end = iwn_scan_end;
671 ic->ic_set_channel = iwn_set_channel;
672 ic->ic_scan_curchan = iwn_scan_curchan;
673 ic->ic_scan_mindwell = iwn_scan_mindwell;
674 ic->ic_getradiocaps = iwn_getradiocaps;
675 ic->ic_setregdomain = iwn_setregdomain;
677 iwn_radiotap_attach(sc);
679 callout_init_mtx(&sc->calib_to, &sc->sc_mtx, 0);
680 callout_init_mtx(&sc->scan_timeout, &sc->sc_mtx, 0);
681 callout_init_mtx(&sc->watchdog_to, &sc->sc_mtx, 0);
682 TASK_INIT(&sc->sc_radioon_task, 0, iwn_radio_on, sc);
683 TASK_INIT(&sc->sc_radiooff_task, 0, iwn_radio_off, sc);
684 TASK_INIT(&sc->sc_panic_task, 0, iwn_panicked, sc);
685 TASK_INIT(&sc->sc_xmit_task, 0, iwn_xmit_task, sc);
687 mbufq_init(&sc->sc_xmit_queue, 1024);
689 sc->sc_tq = taskqueue_create("iwn_taskq", M_WAITOK,
690 taskqueue_thread_enqueue, &sc->sc_tq);
691 error = taskqueue_start_threads(&sc->sc_tq, 1, 0, "iwn_taskq");
693 device_printf(dev, "can't start threads, error %d\n", error);
697 iwn_sysctlattach(sc);
700 * Hook our interrupt after all initialization is complete.
702 error = bus_setup_intr(dev, sc->irq, INTR_TYPE_NET | INTR_MPSAFE,
703 NULL, iwn_intr, sc, &sc->sc_ih);
705 device_printf(dev, "can't establish interrupt, error %d\n",
711 device_printf(sc->sc_dev, "%s: rx_stats=%d, rx_stats_bt=%d\n",
713 sizeof(struct iwn_stats),
714 sizeof(struct iwn_stats_bt));
718 ieee80211_announce(ic);
719 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
721 /* Add debug ioctl right at the end */
722 sc->sc_cdev = make_dev(&iwn_cdevsw, device_get_unit(dev),
723 UID_ROOT, GID_WHEEL, 0600, "%s", device_get_nameunit(dev));
724 if (sc->sc_cdev == NULL) {
725 device_printf(dev, "failed to create debug character device\n");
727 sc->sc_cdev->si_drv1 = sc;
732 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end in error\n",__func__);
737 * Define specific configuration based on device id and subdevice id
738 * pid : PCI device id
741 iwn_config_specific(struct iwn_softc *sc, uint16_t pid)
750 sc->base_params = &iwn4965_base_params;
751 sc->limits = &iwn4965_sensitivity_limits;
752 sc->fwname = "iwn4965fw";
753 /* Override chains masks, ROM is known to be broken. */
754 sc->txchainmask = IWN_ANT_AB;
755 sc->rxchainmask = IWN_ANT_ABC;
756 /* Enable normal btcoex */
757 sc->sc_flags |= IWN_FLAG_BTCOEX;
762 switch(sc->subdevice_id) {
763 case IWN_SDID_1000_1:
764 case IWN_SDID_1000_2:
765 case IWN_SDID_1000_3:
766 case IWN_SDID_1000_4:
767 case IWN_SDID_1000_5:
768 case IWN_SDID_1000_6:
769 case IWN_SDID_1000_7:
770 case IWN_SDID_1000_8:
771 case IWN_SDID_1000_9:
772 case IWN_SDID_1000_10:
773 case IWN_SDID_1000_11:
774 case IWN_SDID_1000_12:
775 sc->limits = &iwn1000_sensitivity_limits;
776 sc->base_params = &iwn1000_base_params;
777 sc->fwname = "iwn1000fw";
780 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
781 "0x%04x rev %d not supported (subdevice)\n", pid,
782 sc->subdevice_id,sc->hw_type);
791 sc->fwname = "iwn6000fw";
792 sc->limits = &iwn6000_sensitivity_limits;
793 switch(sc->subdevice_id) {
794 case IWN_SDID_6x00_1:
795 case IWN_SDID_6x00_2:
796 case IWN_SDID_6x00_8:
798 sc->base_params = &iwn_6000_base_params;
800 case IWN_SDID_6x00_3:
801 case IWN_SDID_6x00_6:
802 case IWN_SDID_6x00_9:
804 case IWN_SDID_6x00_4:
805 case IWN_SDID_6x00_7:
806 case IWN_SDID_6x00_10:
808 case IWN_SDID_6x00_5:
810 sc->base_params = &iwn_6000i_base_params;
811 sc->sc_flags |= IWN_FLAG_INTERNAL_PA;
812 sc->txchainmask = IWN_ANT_BC;
813 sc->rxchainmask = IWN_ANT_BC;
816 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
817 "0x%04x rev %d not supported (subdevice)\n", pid,
818 sc->subdevice_id,sc->hw_type);
825 switch(sc->subdevice_id) {
826 case IWN_SDID_6x05_1:
827 case IWN_SDID_6x05_4:
828 case IWN_SDID_6x05_6:
830 case IWN_SDID_6x05_2:
831 case IWN_SDID_6x05_5:
832 case IWN_SDID_6x05_7:
834 case IWN_SDID_6x05_3:
836 case IWN_SDID_6x05_8:
837 case IWN_SDID_6x05_9:
838 //iwl6005_2agn_sff_cfg
839 case IWN_SDID_6x05_10:
841 case IWN_SDID_6x05_11:
842 //iwl6005_2agn_mow1_cfg
843 case IWN_SDID_6x05_12:
844 //iwl6005_2agn_mow2_cfg
845 sc->fwname = "iwn6000g2afw";
846 sc->limits = &iwn6000_sensitivity_limits;
847 sc->base_params = &iwn_6000g2_base_params;
850 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
851 "0x%04x rev %d not supported (subdevice)\n", pid,
852 sc->subdevice_id,sc->hw_type);
859 switch(sc->subdevice_id) {
860 case IWN_SDID_6035_1:
861 case IWN_SDID_6035_2:
862 case IWN_SDID_6035_3:
863 case IWN_SDID_6035_4:
864 sc->fwname = "iwn6000g2bfw";
865 sc->limits = &iwn6235_sensitivity_limits;
866 sc->base_params = &iwn_6235_base_params;
869 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
870 "0x%04x rev %d not supported (subdevice)\n", pid,
871 sc->subdevice_id,sc->hw_type);
875 /* 6x50 WiFi/WiMax Series */
878 switch(sc->subdevice_id) {
879 case IWN_SDID_6050_1:
880 case IWN_SDID_6050_3:
881 case IWN_SDID_6050_5:
883 case IWN_SDID_6050_2:
884 case IWN_SDID_6050_4:
885 case IWN_SDID_6050_6:
887 sc->fwname = "iwn6050fw";
888 sc->txchainmask = IWN_ANT_AB;
889 sc->rxchainmask = IWN_ANT_AB;
890 sc->limits = &iwn6000_sensitivity_limits;
891 sc->base_params = &iwn_6050_base_params;
894 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
895 "0x%04x rev %d not supported (subdevice)\n", pid,
896 sc->subdevice_id,sc->hw_type);
900 /* 6150 WiFi/WiMax Series */
903 switch(sc->subdevice_id) {
904 case IWN_SDID_6150_1:
905 case IWN_SDID_6150_3:
906 case IWN_SDID_6150_5:
908 case IWN_SDID_6150_2:
909 case IWN_SDID_6150_4:
910 case IWN_SDID_6150_6:
912 sc->fwname = "iwn6050fw";
913 sc->limits = &iwn6000_sensitivity_limits;
914 sc->base_params = &iwn_6150_base_params;
917 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
918 "0x%04x rev %d not supported (subdevice)\n", pid,
919 sc->subdevice_id,sc->hw_type);
923 /* 6030 Series and 1030 Series */
928 switch(sc->subdevice_id) {
929 case IWN_SDID_x030_1:
930 case IWN_SDID_x030_3:
931 case IWN_SDID_x030_5:
933 case IWN_SDID_x030_2:
934 case IWN_SDID_x030_4:
935 case IWN_SDID_x030_6:
937 case IWN_SDID_x030_7:
938 case IWN_SDID_x030_10:
939 case IWN_SDID_x030_14:
941 case IWN_SDID_x030_8:
942 case IWN_SDID_x030_11:
943 case IWN_SDID_x030_15:
945 case IWN_SDID_x030_9:
946 case IWN_SDID_x030_12:
947 case IWN_SDID_x030_16:
949 case IWN_SDID_x030_13:
951 sc->fwname = "iwn6000g2bfw";
952 sc->limits = &iwn6000_sensitivity_limits;
953 sc->base_params = &iwn_6000g2b_base_params;
956 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
957 "0x%04x rev %d not supported (subdevice)\n", pid,
958 sc->subdevice_id,sc->hw_type);
962 /* 130 Series WiFi */
963 /* XXX: This series will need adjustment for rate.
964 * see rx_with_siso_diversity in linux kernel
968 switch(sc->subdevice_id) {
977 sc->fwname = "iwn6000g2bfw";
978 sc->limits = &iwn6000_sensitivity_limits;
979 sc->base_params = &iwn_6000g2b_base_params;
982 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
983 "0x%04x rev %d not supported (subdevice)\n", pid,
984 sc->subdevice_id,sc->hw_type);
988 /* 100 Series WiFi */
991 switch(sc->subdevice_id) {
998 sc->limits = &iwn1000_sensitivity_limits;
999 sc->base_params = &iwn1000_base_params;
1000 sc->fwname = "iwn100fw";
1003 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
1004 "0x%04x rev %d not supported (subdevice)\n", pid,
1005 sc->subdevice_id,sc->hw_type);
1011 /* XXX: This series will need adjustment for rate.
1012 * see rx_with_siso_diversity in linux kernel
1016 switch(sc->subdevice_id) {
1017 case IWN_SDID_105_1:
1018 case IWN_SDID_105_2:
1019 case IWN_SDID_105_3:
1021 case IWN_SDID_105_4:
1023 sc->limits = &iwn2030_sensitivity_limits;
1024 sc->base_params = &iwn2000_base_params;
1025 sc->fwname = "iwn105fw";
1028 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
1029 "0x%04x rev %d not supported (subdevice)\n", pid,
1030 sc->subdevice_id,sc->hw_type);
1036 /* XXX: This series will need adjustment for rate.
1037 * see rx_with_siso_diversity in linux kernel
1041 switch(sc->subdevice_id) {
1042 case IWN_SDID_135_1:
1043 case IWN_SDID_135_2:
1044 case IWN_SDID_135_3:
1045 sc->limits = &iwn2030_sensitivity_limits;
1046 sc->base_params = &iwn2030_base_params;
1047 sc->fwname = "iwn135fw";
1050 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
1051 "0x%04x rev %d not supported (subdevice)\n", pid,
1052 sc->subdevice_id,sc->hw_type);
1058 case IWN_DID_2x00_1:
1059 case IWN_DID_2x00_2:
1060 switch(sc->subdevice_id) {
1061 case IWN_SDID_2x00_1:
1062 case IWN_SDID_2x00_2:
1063 case IWN_SDID_2x00_3:
1065 case IWN_SDID_2x00_4:
1066 //iwl2000_2bgn_d_cfg
1067 sc->limits = &iwn2030_sensitivity_limits;
1068 sc->base_params = &iwn2000_base_params;
1069 sc->fwname = "iwn2000fw";
1072 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
1073 "0x%04x rev %d not supported (subdevice) \n",
1074 pid, sc->subdevice_id, sc->hw_type);
1079 case IWN_DID_2x30_1:
1080 case IWN_DID_2x30_2:
1081 switch(sc->subdevice_id) {
1082 case IWN_SDID_2x30_1:
1083 case IWN_SDID_2x30_3:
1084 case IWN_SDID_2x30_5:
1086 case IWN_SDID_2x30_2:
1087 case IWN_SDID_2x30_4:
1088 case IWN_SDID_2x30_6:
1090 sc->limits = &iwn2030_sensitivity_limits;
1091 sc->base_params = &iwn2030_base_params;
1092 sc->fwname = "iwn2030fw";
1095 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
1096 "0x%04x rev %d not supported (subdevice)\n", pid,
1097 sc->subdevice_id,sc->hw_type);
1102 case IWN_DID_5x00_1:
1103 case IWN_DID_5x00_2:
1104 case IWN_DID_5x00_3:
1105 case IWN_DID_5x00_4:
1106 sc->limits = &iwn5000_sensitivity_limits;
1107 sc->base_params = &iwn5000_base_params;
1108 sc->fwname = "iwn5000fw";
1109 switch(sc->subdevice_id) {
1110 case IWN_SDID_5x00_1:
1111 case IWN_SDID_5x00_2:
1112 case IWN_SDID_5x00_3:
1113 case IWN_SDID_5x00_4:
1114 case IWN_SDID_5x00_9:
1115 case IWN_SDID_5x00_10:
1116 case IWN_SDID_5x00_11:
1117 case IWN_SDID_5x00_12:
1118 case IWN_SDID_5x00_17:
1119 case IWN_SDID_5x00_18:
1120 case IWN_SDID_5x00_19:
1121 case IWN_SDID_5x00_20:
1123 sc->txchainmask = IWN_ANT_B;
1124 sc->rxchainmask = IWN_ANT_AB;
1126 case IWN_SDID_5x00_5:
1127 case IWN_SDID_5x00_6:
1128 case IWN_SDID_5x00_13:
1129 case IWN_SDID_5x00_14:
1130 case IWN_SDID_5x00_21:
1131 case IWN_SDID_5x00_22:
1133 sc->txchainmask = IWN_ANT_B;
1134 sc->rxchainmask = IWN_ANT_AB;
1136 case IWN_SDID_5x00_7:
1137 case IWN_SDID_5x00_8:
1138 case IWN_SDID_5x00_15:
1139 case IWN_SDID_5x00_16:
1140 case IWN_SDID_5x00_23:
1141 case IWN_SDID_5x00_24:
1143 sc->txchainmask = IWN_ANT_B;
1144 sc->rxchainmask = IWN_ANT_AB;
1146 case IWN_SDID_5x00_25:
1147 case IWN_SDID_5x00_26:
1148 case IWN_SDID_5x00_27:
1149 case IWN_SDID_5x00_28:
1150 case IWN_SDID_5x00_29:
1151 case IWN_SDID_5x00_30:
1152 case IWN_SDID_5x00_31:
1153 case IWN_SDID_5x00_32:
1154 case IWN_SDID_5x00_33:
1155 case IWN_SDID_5x00_34:
1156 case IWN_SDID_5x00_35:
1157 case IWN_SDID_5x00_36:
1159 sc->txchainmask = IWN_ANT_ABC;
1160 sc->rxchainmask = IWN_ANT_ABC;
1163 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
1164 "0x%04x rev %d not supported (subdevice)\n", pid,
1165 sc->subdevice_id,sc->hw_type);
1170 case IWN_DID_5x50_1:
1171 case IWN_DID_5x50_2:
1172 case IWN_DID_5x50_3:
1173 case IWN_DID_5x50_4:
1174 sc->limits = &iwn5000_sensitivity_limits;
1175 sc->base_params = &iwn5000_base_params;
1176 sc->fwname = "iwn5000fw";
1177 switch(sc->subdevice_id) {
1178 case IWN_SDID_5x50_1:
1179 case IWN_SDID_5x50_2:
1180 case IWN_SDID_5x50_3:
1182 sc->limits = &iwn5000_sensitivity_limits;
1183 sc->base_params = &iwn5000_base_params;
1184 sc->fwname = "iwn5000fw";
1186 case IWN_SDID_5x50_4:
1187 case IWN_SDID_5x50_5:
1188 case IWN_SDID_5x50_8:
1189 case IWN_SDID_5x50_9:
1190 case IWN_SDID_5x50_10:
1191 case IWN_SDID_5x50_11:
1193 case IWN_SDID_5x50_6:
1194 case IWN_SDID_5x50_7:
1195 case IWN_SDID_5x50_12:
1196 case IWN_SDID_5x50_13:
1198 sc->limits = &iwn5000_sensitivity_limits;
1199 sc->fwname = "iwn5150fw";
1200 sc->base_params = &iwn_5x50_base_params;
1203 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
1204 "0x%04x rev %d not supported (subdevice)\n", pid,
1205 sc->subdevice_id,sc->hw_type);
1210 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id : 0x%04x"
1211 "rev 0x%08x not supported (device)\n", pid, sc->subdevice_id,
1219 iwn4965_attach(struct iwn_softc *sc, uint16_t pid)
1221 struct iwn_ops *ops = &sc->ops;
1223 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
1224 ops->load_firmware = iwn4965_load_firmware;
1225 ops->read_eeprom = iwn4965_read_eeprom;
1226 ops->post_alive = iwn4965_post_alive;
1227 ops->nic_config = iwn4965_nic_config;
1228 ops->update_sched = iwn4965_update_sched;
1229 ops->get_temperature = iwn4965_get_temperature;
1230 ops->get_rssi = iwn4965_get_rssi;
1231 ops->set_txpower = iwn4965_set_txpower;
1232 ops->init_gains = iwn4965_init_gains;
1233 ops->set_gains = iwn4965_set_gains;
1234 ops->add_node = iwn4965_add_node;
1235 ops->tx_done = iwn4965_tx_done;
1236 ops->ampdu_tx_start = iwn4965_ampdu_tx_start;
1237 ops->ampdu_tx_stop = iwn4965_ampdu_tx_stop;
1238 sc->ntxqs = IWN4965_NTXQUEUES;
1239 sc->firstaggqueue = IWN4965_FIRSTAGGQUEUE;
1240 sc->ndmachnls = IWN4965_NDMACHNLS;
1241 sc->broadcast_id = IWN4965_ID_BROADCAST;
1242 sc->rxonsz = IWN4965_RXONSZ;
1243 sc->schedsz = IWN4965_SCHEDSZ;
1244 sc->fw_text_maxsz = IWN4965_FW_TEXT_MAXSZ;
1245 sc->fw_data_maxsz = IWN4965_FW_DATA_MAXSZ;
1246 sc->fwsz = IWN4965_FWSZ;
1247 sc->sched_txfact_addr = IWN4965_SCHED_TXFACT;
1248 sc->limits = &iwn4965_sensitivity_limits;
1249 sc->fwname = "iwn4965fw";
1250 /* Override chains masks, ROM is known to be broken. */
1251 sc->txchainmask = IWN_ANT_AB;
1252 sc->rxchainmask = IWN_ANT_ABC;
1253 /* Enable normal btcoex */
1254 sc->sc_flags |= IWN_FLAG_BTCOEX;
1256 DPRINTF(sc, IWN_DEBUG_TRACE, "%s: end\n",__func__);
1262 iwn5000_attach(struct iwn_softc *sc, uint16_t pid)
1264 struct iwn_ops *ops = &sc->ops;
1266 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
1268 ops->load_firmware = iwn5000_load_firmware;
1269 ops->read_eeprom = iwn5000_read_eeprom;
1270 ops->post_alive = iwn5000_post_alive;
1271 ops->nic_config = iwn5000_nic_config;
1272 ops->update_sched = iwn5000_update_sched;
1273 ops->get_temperature = iwn5000_get_temperature;
1274 ops->get_rssi = iwn5000_get_rssi;
1275 ops->set_txpower = iwn5000_set_txpower;
1276 ops->init_gains = iwn5000_init_gains;
1277 ops->set_gains = iwn5000_set_gains;
1278 ops->add_node = iwn5000_add_node;
1279 ops->tx_done = iwn5000_tx_done;
1280 ops->ampdu_tx_start = iwn5000_ampdu_tx_start;
1281 ops->ampdu_tx_stop = iwn5000_ampdu_tx_stop;
1282 sc->ntxqs = IWN5000_NTXQUEUES;
1283 sc->firstaggqueue = IWN5000_FIRSTAGGQUEUE;
1284 sc->ndmachnls = IWN5000_NDMACHNLS;
1285 sc->broadcast_id = IWN5000_ID_BROADCAST;
1286 sc->rxonsz = IWN5000_RXONSZ;
1287 sc->schedsz = IWN5000_SCHEDSZ;
1288 sc->fw_text_maxsz = IWN5000_FW_TEXT_MAXSZ;
1289 sc->fw_data_maxsz = IWN5000_FW_DATA_MAXSZ;
1290 sc->fwsz = IWN5000_FWSZ;
1291 sc->sched_txfact_addr = IWN5000_SCHED_TXFACT;
1292 sc->reset_noise_gain = IWN5000_PHY_CALIB_RESET_NOISE_GAIN;
1293 sc->noise_gain = IWN5000_PHY_CALIB_NOISE_GAIN;
1299 * Attach the interface to 802.11 radiotap.
1302 iwn_radiotap_attach(struct iwn_softc *sc)
1305 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
1306 ieee80211_radiotap_attach(&sc->sc_ic,
1307 &sc->sc_txtap.wt_ihdr, sizeof(sc->sc_txtap),
1308 IWN_TX_RADIOTAP_PRESENT,
1309 &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap),
1310 IWN_RX_RADIOTAP_PRESENT);
1311 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
1315 iwn_sysctlattach(struct iwn_softc *sc)
1318 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->sc_dev);
1319 struct sysctl_oid *tree = device_get_sysctl_tree(sc->sc_dev);
1321 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
1322 "debug", CTLFLAG_RW, &sc->sc_debug, sc->sc_debug,
1323 "control debugging printfs");
1327 static struct ieee80211vap *
1328 iwn_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit,
1329 enum ieee80211_opmode opmode, int flags,
1330 const uint8_t bssid[IEEE80211_ADDR_LEN],
1331 const uint8_t mac[IEEE80211_ADDR_LEN])
1333 struct iwn_softc *sc = ic->ic_softc;
1334 struct iwn_vap *ivp;
1335 struct ieee80211vap *vap;
1337 if (!TAILQ_EMPTY(&ic->ic_vaps)) /* only one at a time */
1340 ivp = malloc(sizeof(struct iwn_vap), M_80211_VAP, M_WAITOK | M_ZERO);
1342 ieee80211_vap_setup(ic, vap, name, unit, opmode, flags, bssid);
1343 ivp->ctx = IWN_RXON_BSS_CTX;
1344 vap->iv_bmissthreshold = 10; /* override default */
1345 /* Override with driver methods. */
1346 ivp->iv_newstate = vap->iv_newstate;
1347 vap->iv_newstate = iwn_newstate;
1348 sc->ivap[IWN_RXON_BSS_CTX] = vap;
1350 ieee80211_ratectl_init(vap);
1351 /* Complete setup. */
1352 ieee80211_vap_attach(vap, iwn_media_change, ieee80211_media_status,
1354 ic->ic_opmode = opmode;
1359 iwn_vap_delete(struct ieee80211vap *vap)
1361 struct iwn_vap *ivp = IWN_VAP(vap);
1363 ieee80211_ratectl_deinit(vap);
1364 ieee80211_vap_detach(vap);
1365 free(ivp, M_80211_VAP);
1369 iwn_xmit_queue_drain(struct iwn_softc *sc)
1372 struct ieee80211_node *ni;
1374 IWN_LOCK_ASSERT(sc);
1375 while ((m = mbufq_dequeue(&sc->sc_xmit_queue)) != NULL) {
1376 ni = (struct ieee80211_node *)m->m_pkthdr.rcvif;
1377 ieee80211_free_node(ni);
1383 iwn_xmit_queue_enqueue(struct iwn_softc *sc, struct mbuf *m)
1386 IWN_LOCK_ASSERT(sc);
1387 return (mbufq_enqueue(&sc->sc_xmit_queue, m));
1391 iwn_detach(device_t dev)
1393 struct iwn_softc *sc = device_get_softc(dev);
1396 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
1398 if (sc->sc_ic.ic_softc != NULL) {
1399 /* Free the mbuf queue and node references */
1401 iwn_xmit_queue_drain(sc);
1404 ieee80211_draintask(&sc->sc_ic, &sc->sc_radioon_task);
1405 ieee80211_draintask(&sc->sc_ic, &sc->sc_radiooff_task);
1408 taskqueue_drain_all(sc->sc_tq);
1409 taskqueue_free(sc->sc_tq);
1411 callout_drain(&sc->watchdog_to);
1412 callout_drain(&sc->scan_timeout);
1413 callout_drain(&sc->calib_to);
1414 ieee80211_ifdetach(&sc->sc_ic);
1417 /* Uninstall interrupt handler. */
1418 if (sc->irq != NULL) {
1419 bus_teardown_intr(dev, sc->irq, sc->sc_ih);
1420 bus_release_resource(dev, SYS_RES_IRQ, rman_get_rid(sc->irq),
1422 pci_release_msi(dev);
1425 /* Free DMA resources. */
1426 iwn_free_rx_ring(sc, &sc->rxq);
1427 for (qid = 0; qid < sc->ntxqs; qid++)
1428 iwn_free_tx_ring(sc, &sc->txq[qid]);
1431 if (sc->ict != NULL)
1435 if (sc->mem != NULL)
1436 bus_release_resource(dev, SYS_RES_MEMORY,
1437 rman_get_rid(sc->mem), sc->mem);
1440 destroy_dev(sc->sc_cdev);
1444 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n", __func__);
1445 IWN_LOCK_DESTROY(sc);
1450 iwn_shutdown(device_t dev)
1452 struct iwn_softc *sc = device_get_softc(dev);
1459 iwn_suspend(device_t dev)
1461 struct iwn_softc *sc = device_get_softc(dev);
1463 ieee80211_suspend_all(&sc->sc_ic);
1468 iwn_resume(device_t dev)
1470 struct iwn_softc *sc = device_get_softc(dev);
1472 /* Clear device-specific "PCI retry timeout" register (41h). */
1473 pci_write_config(dev, 0x41, 0, 1);
1475 ieee80211_resume_all(&sc->sc_ic);
1480 iwn_nic_lock(struct iwn_softc *sc)
1484 /* Request exclusive access to NIC. */
1485 IWN_SETBITS(sc, IWN_GP_CNTRL, IWN_GP_CNTRL_MAC_ACCESS_REQ);
1487 /* Spin until we actually get the lock. */
1488 for (ntries = 0; ntries < 1000; ntries++) {
1489 if ((IWN_READ(sc, IWN_GP_CNTRL) &
1490 (IWN_GP_CNTRL_MAC_ACCESS_ENA | IWN_GP_CNTRL_SLEEP)) ==
1491 IWN_GP_CNTRL_MAC_ACCESS_ENA)
1498 static __inline void
1499 iwn_nic_unlock(struct iwn_softc *sc)
1501 IWN_CLRBITS(sc, IWN_GP_CNTRL, IWN_GP_CNTRL_MAC_ACCESS_REQ);
1504 static __inline uint32_t
1505 iwn_prph_read(struct iwn_softc *sc, uint32_t addr)
1507 IWN_WRITE(sc, IWN_PRPH_RADDR, IWN_PRPH_DWORD | addr);
1508 IWN_BARRIER_READ_WRITE(sc);
1509 return IWN_READ(sc, IWN_PRPH_RDATA);
1512 static __inline void
1513 iwn_prph_write(struct iwn_softc *sc, uint32_t addr, uint32_t data)
1515 IWN_WRITE(sc, IWN_PRPH_WADDR, IWN_PRPH_DWORD | addr);
1516 IWN_BARRIER_WRITE(sc);
1517 IWN_WRITE(sc, IWN_PRPH_WDATA, data);
1520 static __inline void
1521 iwn_prph_setbits(struct iwn_softc *sc, uint32_t addr, uint32_t mask)
1523 iwn_prph_write(sc, addr, iwn_prph_read(sc, addr) | mask);
1526 static __inline void
1527 iwn_prph_clrbits(struct iwn_softc *sc, uint32_t addr, uint32_t mask)
1529 iwn_prph_write(sc, addr, iwn_prph_read(sc, addr) & ~mask);
1532 static __inline void
1533 iwn_prph_write_region_4(struct iwn_softc *sc, uint32_t addr,
1534 const uint32_t *data, int count)
1536 for (; count > 0; count--, data++, addr += 4)
1537 iwn_prph_write(sc, addr, *data);
1540 static __inline uint32_t
1541 iwn_mem_read(struct iwn_softc *sc, uint32_t addr)
1543 IWN_WRITE(sc, IWN_MEM_RADDR, addr);
1544 IWN_BARRIER_READ_WRITE(sc);
1545 return IWN_READ(sc, IWN_MEM_RDATA);
1548 static __inline void
1549 iwn_mem_write(struct iwn_softc *sc, uint32_t addr, uint32_t data)
1551 IWN_WRITE(sc, IWN_MEM_WADDR, addr);
1552 IWN_BARRIER_WRITE(sc);
1553 IWN_WRITE(sc, IWN_MEM_WDATA, data);
1556 static __inline void
1557 iwn_mem_write_2(struct iwn_softc *sc, uint32_t addr, uint16_t data)
1561 tmp = iwn_mem_read(sc, addr & ~3);
1563 tmp = (tmp & 0x0000ffff) | data << 16;
1565 tmp = (tmp & 0xffff0000) | data;
1566 iwn_mem_write(sc, addr & ~3, tmp);
1569 static __inline void
1570 iwn_mem_read_region_4(struct iwn_softc *sc, uint32_t addr, uint32_t *data,
1573 for (; count > 0; count--, addr += 4)
1574 *data++ = iwn_mem_read(sc, addr);
1577 static __inline void
1578 iwn_mem_set_region_4(struct iwn_softc *sc, uint32_t addr, uint32_t val,
1581 for (; count > 0; count--, addr += 4)
1582 iwn_mem_write(sc, addr, val);
1586 iwn_eeprom_lock(struct iwn_softc *sc)
1590 for (i = 0; i < 100; i++) {
1591 /* Request exclusive access to EEPROM. */
1592 IWN_SETBITS(sc, IWN_HW_IF_CONFIG,
1593 IWN_HW_IF_CONFIG_EEPROM_LOCKED);
1595 /* Spin until we actually get the lock. */
1596 for (ntries = 0; ntries < 100; ntries++) {
1597 if (IWN_READ(sc, IWN_HW_IF_CONFIG) &
1598 IWN_HW_IF_CONFIG_EEPROM_LOCKED)
1603 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end timeout\n", __func__);
1607 static __inline void
1608 iwn_eeprom_unlock(struct iwn_softc *sc)
1610 IWN_CLRBITS(sc, IWN_HW_IF_CONFIG, IWN_HW_IF_CONFIG_EEPROM_LOCKED);
1614 * Initialize access by host to One Time Programmable ROM.
1615 * NB: This kind of ROM can be found on 1000 or 6000 Series only.
1618 iwn_init_otprom(struct iwn_softc *sc)
1620 uint16_t prev, base, next;
1623 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
1625 /* Wait for clock stabilization before accessing prph. */
1626 if ((error = iwn_clock_wait(sc)) != 0)
1629 if ((error = iwn_nic_lock(sc)) != 0)
1631 iwn_prph_setbits(sc, IWN_APMG_PS, IWN_APMG_PS_RESET_REQ);
1633 iwn_prph_clrbits(sc, IWN_APMG_PS, IWN_APMG_PS_RESET_REQ);
1636 /* Set auto clock gate disable bit for HW with OTP shadow RAM. */
1637 if (sc->base_params->shadow_ram_support) {
1638 IWN_SETBITS(sc, IWN_DBG_LINK_PWR_MGMT,
1639 IWN_RESET_LINK_PWR_MGMT_DIS);
1641 IWN_CLRBITS(sc, IWN_EEPROM_GP, IWN_EEPROM_GP_IF_OWNER);
1642 /* Clear ECC status. */
1643 IWN_SETBITS(sc, IWN_OTP_GP,
1644 IWN_OTP_GP_ECC_CORR_STTS | IWN_OTP_GP_ECC_UNCORR_STTS);
1647 * Find the block before last block (contains the EEPROM image)
1648 * for HW without OTP shadow RAM.
1650 if (! sc->base_params->shadow_ram_support) {
1651 /* Switch to absolute addressing mode. */
1652 IWN_CLRBITS(sc, IWN_OTP_GP, IWN_OTP_GP_RELATIVE_ACCESS);
1654 for (count = 0; count < sc->base_params->max_ll_items;
1656 error = iwn_read_prom_data(sc, base, &next, 2);
1659 if (next == 0) /* End of linked-list. */
1662 base = le16toh(next);
1664 if (count == 0 || count == sc->base_params->max_ll_items)
1666 /* Skip "next" word. */
1667 sc->prom_base = prev + 1;
1670 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
1676 iwn_read_prom_data(struct iwn_softc *sc, uint32_t addr, void *data, int count)
1678 uint8_t *out = data;
1682 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
1684 addr += sc->prom_base;
1685 for (; count > 0; count -= 2, addr++) {
1686 IWN_WRITE(sc, IWN_EEPROM, addr << 2);
1687 for (ntries = 0; ntries < 10; ntries++) {
1688 val = IWN_READ(sc, IWN_EEPROM);
1689 if (val & IWN_EEPROM_READ_VALID)
1694 device_printf(sc->sc_dev,
1695 "timeout reading ROM at 0x%x\n", addr);
1698 if (sc->sc_flags & IWN_FLAG_HAS_OTPROM) {
1699 /* OTPROM, check for ECC errors. */
1700 tmp = IWN_READ(sc, IWN_OTP_GP);
1701 if (tmp & IWN_OTP_GP_ECC_UNCORR_STTS) {
1702 device_printf(sc->sc_dev,
1703 "OTPROM ECC error at 0x%x\n", addr);
1706 if (tmp & IWN_OTP_GP_ECC_CORR_STTS) {
1707 /* Correctable ECC error, clear bit. */
1708 IWN_SETBITS(sc, IWN_OTP_GP,
1709 IWN_OTP_GP_ECC_CORR_STTS);
1717 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
1723 iwn_dma_map_addr(void *arg, bus_dma_segment_t *segs, int nsegs, int error)
1727 KASSERT(nsegs == 1, ("too many DMA segments, %d should be 1", nsegs));
1728 *(bus_addr_t *)arg = segs[0].ds_addr;
1732 iwn_dma_contig_alloc(struct iwn_softc *sc, struct iwn_dma_info *dma,
1733 void **kvap, bus_size_t size, bus_size_t alignment)
1740 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), alignment,
1741 0, BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, size,
1742 1, size, 0, NULL, NULL, &dma->tag);
1746 error = bus_dmamem_alloc(dma->tag, (void **)&dma->vaddr,
1747 BUS_DMA_NOWAIT | BUS_DMA_ZERO | BUS_DMA_COHERENT, &dma->map);
1751 error = bus_dmamap_load(dma->tag, dma->map, dma->vaddr, size,
1752 iwn_dma_map_addr, &dma->paddr, BUS_DMA_NOWAIT);
1756 bus_dmamap_sync(dma->tag, dma->map, BUS_DMASYNC_PREWRITE);
1763 fail: iwn_dma_contig_free(dma);
1768 iwn_dma_contig_free(struct iwn_dma_info *dma)
1770 if (dma->vaddr != NULL) {
1771 bus_dmamap_sync(dma->tag, dma->map,
1772 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
1773 bus_dmamap_unload(dma->tag, dma->map);
1774 bus_dmamem_free(dma->tag, dma->vaddr, dma->map);
1777 if (dma->tag != NULL) {
1778 bus_dma_tag_destroy(dma->tag);
1784 iwn_alloc_sched(struct iwn_softc *sc)
1786 /* TX scheduler rings must be aligned on a 1KB boundary. */
1787 return iwn_dma_contig_alloc(sc, &sc->sched_dma, (void **)&sc->sched,
1792 iwn_free_sched(struct iwn_softc *sc)
1794 iwn_dma_contig_free(&sc->sched_dma);
1798 iwn_alloc_kw(struct iwn_softc *sc)
1800 /* "Keep Warm" page must be aligned on a 4KB boundary. */
1801 return iwn_dma_contig_alloc(sc, &sc->kw_dma, NULL, 4096, 4096);
1805 iwn_free_kw(struct iwn_softc *sc)
1807 iwn_dma_contig_free(&sc->kw_dma);
1811 iwn_alloc_ict(struct iwn_softc *sc)
1813 /* ICT table must be aligned on a 4KB boundary. */
1814 return iwn_dma_contig_alloc(sc, &sc->ict_dma, (void **)&sc->ict,
1815 IWN_ICT_SIZE, 4096);
1819 iwn_free_ict(struct iwn_softc *sc)
1821 iwn_dma_contig_free(&sc->ict_dma);
1825 iwn_alloc_fwmem(struct iwn_softc *sc)
1827 /* Must be aligned on a 16-byte boundary. */
1828 return iwn_dma_contig_alloc(sc, &sc->fw_dma, NULL, sc->fwsz, 16);
1832 iwn_free_fwmem(struct iwn_softc *sc)
1834 iwn_dma_contig_free(&sc->fw_dma);
1838 iwn_alloc_rx_ring(struct iwn_softc *sc, struct iwn_rx_ring *ring)
1845 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
1847 /* Allocate RX descriptors (256-byte aligned). */
1848 size = IWN_RX_RING_COUNT * sizeof (uint32_t);
1849 error = iwn_dma_contig_alloc(sc, &ring->desc_dma, (void **)&ring->desc,
1852 device_printf(sc->sc_dev,
1853 "%s: could not allocate RX ring DMA memory, error %d\n",
1858 /* Allocate RX status area (16-byte aligned). */
1859 error = iwn_dma_contig_alloc(sc, &ring->stat_dma, (void **)&ring->stat,
1860 sizeof (struct iwn_rx_status), 16);
1862 device_printf(sc->sc_dev,
1863 "%s: could not allocate RX status DMA memory, error %d\n",
1868 /* Create RX buffer DMA tag. */
1869 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 1, 0,
1870 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL,
1871 IWN_RBUF_SIZE, 1, IWN_RBUF_SIZE, 0, NULL, NULL, &ring->data_dmat);
1873 device_printf(sc->sc_dev,
1874 "%s: could not create RX buf DMA tag, error %d\n",
1880 * Allocate and map RX buffers.
1882 for (i = 0; i < IWN_RX_RING_COUNT; i++) {
1883 struct iwn_rx_data *data = &ring->data[i];
1886 error = bus_dmamap_create(ring->data_dmat, 0, &data->map);
1888 device_printf(sc->sc_dev,
1889 "%s: could not create RX buf DMA map, error %d\n",
1894 data->m = m_getjcl(M_NOWAIT, MT_DATA, M_PKTHDR,
1896 if (data->m == NULL) {
1897 device_printf(sc->sc_dev,
1898 "%s: could not allocate RX mbuf\n", __func__);
1903 error = bus_dmamap_load(ring->data_dmat, data->map,
1904 mtod(data->m, void *), IWN_RBUF_SIZE, iwn_dma_map_addr,
1905 &paddr, BUS_DMA_NOWAIT);
1906 if (error != 0 && error != EFBIG) {
1907 device_printf(sc->sc_dev,
1908 "%s: can't map mbuf, error %d\n", __func__,
1913 bus_dmamap_sync(ring->data_dmat, data->map,
1914 BUS_DMASYNC_PREREAD);
1916 /* Set physical address of RX buffer (256-byte aligned). */
1917 ring->desc[i] = htole32(paddr >> 8);
1920 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
1921 BUS_DMASYNC_PREWRITE);
1923 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
1927 fail: iwn_free_rx_ring(sc, ring);
1929 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end in error\n",__func__);
1935 iwn_reset_rx_ring(struct iwn_softc *sc, struct iwn_rx_ring *ring)
1939 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
1941 if (iwn_nic_lock(sc) == 0) {
1942 IWN_WRITE(sc, IWN_FH_RX_CONFIG, 0);
1943 for (ntries = 0; ntries < 1000; ntries++) {
1944 if (IWN_READ(sc, IWN_FH_RX_STATUS) &
1945 IWN_FH_RX_STATUS_IDLE)
1952 sc->last_rx_valid = 0;
1956 iwn_free_rx_ring(struct iwn_softc *sc, struct iwn_rx_ring *ring)
1960 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s \n", __func__);
1962 iwn_dma_contig_free(&ring->desc_dma);
1963 iwn_dma_contig_free(&ring->stat_dma);
1965 for (i = 0; i < IWN_RX_RING_COUNT; i++) {
1966 struct iwn_rx_data *data = &ring->data[i];
1968 if (data->m != NULL) {
1969 bus_dmamap_sync(ring->data_dmat, data->map,
1970 BUS_DMASYNC_POSTREAD);
1971 bus_dmamap_unload(ring->data_dmat, data->map);
1975 if (data->map != NULL)
1976 bus_dmamap_destroy(ring->data_dmat, data->map);
1978 if (ring->data_dmat != NULL) {
1979 bus_dma_tag_destroy(ring->data_dmat);
1980 ring->data_dmat = NULL;
1985 iwn_alloc_tx_ring(struct iwn_softc *sc, struct iwn_tx_ring *ring, int qid)
1995 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
1997 /* Allocate TX descriptors (256-byte aligned). */
1998 size = IWN_TX_RING_COUNT * sizeof (struct iwn_tx_desc);
1999 error = iwn_dma_contig_alloc(sc, &ring->desc_dma, (void **)&ring->desc,
2002 device_printf(sc->sc_dev,
2003 "%s: could not allocate TX ring DMA memory, error %d\n",
2008 size = IWN_TX_RING_COUNT * sizeof (struct iwn_tx_cmd);
2009 error = iwn_dma_contig_alloc(sc, &ring->cmd_dma, (void **)&ring->cmd,
2012 device_printf(sc->sc_dev,
2013 "%s: could not allocate TX cmd DMA memory, error %d\n",
2018 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 1, 0,
2019 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES,
2020 IWN_MAX_SCATTER - 1, MCLBYTES, 0, NULL, NULL, &ring->data_dmat);
2022 device_printf(sc->sc_dev,
2023 "%s: could not create TX buf DMA tag, error %d\n",
2028 paddr = ring->cmd_dma.paddr;
2029 for (i = 0; i < IWN_TX_RING_COUNT; i++) {
2030 struct iwn_tx_data *data = &ring->data[i];
2032 data->cmd_paddr = paddr;
2033 data->scratch_paddr = paddr + 12;
2034 paddr += sizeof (struct iwn_tx_cmd);
2036 error = bus_dmamap_create(ring->data_dmat, 0, &data->map);
2038 device_printf(sc->sc_dev,
2039 "%s: could not create TX buf DMA map, error %d\n",
2045 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
2049 fail: iwn_free_tx_ring(sc, ring);
2050 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end in error\n", __func__);
2055 iwn_reset_tx_ring(struct iwn_softc *sc, struct iwn_tx_ring *ring)
2059 DPRINTF(sc, IWN_DEBUG_TRACE, "->doing %s \n", __func__);
2061 for (i = 0; i < IWN_TX_RING_COUNT; i++) {
2062 struct iwn_tx_data *data = &ring->data[i];
2064 if (data->m != NULL) {
2065 bus_dmamap_sync(ring->data_dmat, data->map,
2066 BUS_DMASYNC_POSTWRITE);
2067 bus_dmamap_unload(ring->data_dmat, data->map);
2071 if (data->ni != NULL) {
2072 ieee80211_free_node(data->ni);
2076 /* Clear TX descriptors. */
2077 memset(ring->desc, 0, ring->desc_dma.size);
2078 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
2079 BUS_DMASYNC_PREWRITE);
2080 sc->qfullmsk &= ~(1 << ring->qid);
2086 iwn_free_tx_ring(struct iwn_softc *sc, struct iwn_tx_ring *ring)
2090 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s \n", __func__);
2092 iwn_dma_contig_free(&ring->desc_dma);
2093 iwn_dma_contig_free(&ring->cmd_dma);
2095 for (i = 0; i < IWN_TX_RING_COUNT; i++) {
2096 struct iwn_tx_data *data = &ring->data[i];
2098 if (data->m != NULL) {
2099 bus_dmamap_sync(ring->data_dmat, data->map,
2100 BUS_DMASYNC_POSTWRITE);
2101 bus_dmamap_unload(ring->data_dmat, data->map);
2104 if (data->map != NULL)
2105 bus_dmamap_destroy(ring->data_dmat, data->map);
2107 if (ring->data_dmat != NULL) {
2108 bus_dma_tag_destroy(ring->data_dmat);
2109 ring->data_dmat = NULL;
2114 iwn5000_ict_reset(struct iwn_softc *sc)
2116 /* Disable interrupts. */
2117 IWN_WRITE(sc, IWN_INT_MASK, 0);
2119 /* Reset ICT table. */
2120 memset(sc->ict, 0, IWN_ICT_SIZE);
2123 bus_dmamap_sync(sc->ict_dma.tag, sc->ict_dma.map,
2124 BUS_DMASYNC_PREWRITE);
2126 /* Set physical address of ICT table (4KB aligned). */
2127 DPRINTF(sc, IWN_DEBUG_RESET, "%s: enabling ICT\n", __func__);
2128 IWN_WRITE(sc, IWN_DRAM_INT_TBL, IWN_DRAM_INT_TBL_ENABLE |
2129 IWN_DRAM_INT_TBL_WRAP_CHECK | sc->ict_dma.paddr >> 12);
2131 /* Enable periodic RX interrupt. */
2132 sc->int_mask |= IWN_INT_RX_PERIODIC;
2133 /* Switch to ICT interrupt mode in driver. */
2134 sc->sc_flags |= IWN_FLAG_USE_ICT;
2136 /* Re-enable interrupts. */
2137 IWN_WRITE(sc, IWN_INT, 0xffffffff);
2138 IWN_WRITE(sc, IWN_INT_MASK, sc->int_mask);
2142 iwn_read_eeprom(struct iwn_softc *sc, uint8_t macaddr[IEEE80211_ADDR_LEN])
2144 struct iwn_ops *ops = &sc->ops;
2148 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
2150 /* Check whether adapter has an EEPROM or an OTPROM. */
2151 if (sc->hw_type >= IWN_HW_REV_TYPE_1000 &&
2152 (IWN_READ(sc, IWN_OTP_GP) & IWN_OTP_GP_DEV_SEL_OTP))
2153 sc->sc_flags |= IWN_FLAG_HAS_OTPROM;
2154 DPRINTF(sc, IWN_DEBUG_RESET, "%s found\n",
2155 (sc->sc_flags & IWN_FLAG_HAS_OTPROM) ? "OTPROM" : "EEPROM");
2157 /* Adapter has to be powered on for EEPROM access to work. */
2158 if ((error = iwn_apm_init(sc)) != 0) {
2159 device_printf(sc->sc_dev,
2160 "%s: could not power ON adapter, error %d\n", __func__,
2165 if ((IWN_READ(sc, IWN_EEPROM_GP) & 0x7) == 0) {
2166 device_printf(sc->sc_dev, "%s: bad ROM signature\n", __func__);
2169 if ((error = iwn_eeprom_lock(sc)) != 0) {
2170 device_printf(sc->sc_dev, "%s: could not lock ROM, error %d\n",
2174 if (sc->sc_flags & IWN_FLAG_HAS_OTPROM) {
2175 if ((error = iwn_init_otprom(sc)) != 0) {
2176 device_printf(sc->sc_dev,
2177 "%s: could not initialize OTPROM, error %d\n",
2183 iwn_read_prom_data(sc, IWN_EEPROM_SKU_CAP, &val, 2);
2184 DPRINTF(sc, IWN_DEBUG_RESET, "SKU capabilities=0x%04x\n", le16toh(val));
2185 /* Check if HT support is bonded out. */
2186 if (val & htole16(IWN_EEPROM_SKU_CAP_11N))
2187 sc->sc_flags |= IWN_FLAG_HAS_11N;
2189 iwn_read_prom_data(sc, IWN_EEPROM_RFCFG, &val, 2);
2190 sc->rfcfg = le16toh(val);
2191 DPRINTF(sc, IWN_DEBUG_RESET, "radio config=0x%04x\n", sc->rfcfg);
2192 /* Read Tx/Rx chains from ROM unless it's known to be broken. */
2193 if (sc->txchainmask == 0)
2194 sc->txchainmask = IWN_RFCFG_TXANTMSK(sc->rfcfg);
2195 if (sc->rxchainmask == 0)
2196 sc->rxchainmask = IWN_RFCFG_RXANTMSK(sc->rfcfg);
2198 /* Read MAC address. */
2199 iwn_read_prom_data(sc, IWN_EEPROM_MAC, macaddr, 6);
2201 /* Read adapter-specific information from EEPROM. */
2202 ops->read_eeprom(sc);
2204 iwn_apm_stop(sc); /* Power OFF adapter. */
2206 iwn_eeprom_unlock(sc);
2208 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
2214 iwn4965_read_eeprom(struct iwn_softc *sc)
2220 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
2222 /* Read regulatory domain (4 ASCII characters). */
2223 iwn_read_prom_data(sc, IWN4965_EEPROM_DOMAIN, sc->eeprom_domain, 4);
2225 /* Read the list of authorized channels (20MHz & 40MHz). */
2226 for (i = 0; i < IWN_NBANDS - 1; i++) {
2227 addr = iwn4965_regulatory_bands[i];
2228 iwn_read_eeprom_channels(sc, i, addr);
2231 /* Read maximum allowed TX power for 2GHz and 5GHz bands. */
2232 iwn_read_prom_data(sc, IWN4965_EEPROM_MAXPOW, &val, 2);
2233 sc->maxpwr2GHz = val & 0xff;
2234 sc->maxpwr5GHz = val >> 8;
2235 /* Check that EEPROM values are within valid range. */
2236 if (sc->maxpwr5GHz < 20 || sc->maxpwr5GHz > 50)
2237 sc->maxpwr5GHz = 38;
2238 if (sc->maxpwr2GHz < 20 || sc->maxpwr2GHz > 50)
2239 sc->maxpwr2GHz = 38;
2240 DPRINTF(sc, IWN_DEBUG_RESET, "maxpwr 2GHz=%d 5GHz=%d\n",
2241 sc->maxpwr2GHz, sc->maxpwr5GHz);
2243 /* Read samples for each TX power group. */
2244 iwn_read_prom_data(sc, IWN4965_EEPROM_BANDS, sc->bands,
2247 /* Read voltage at which samples were taken. */
2248 iwn_read_prom_data(sc, IWN4965_EEPROM_VOLTAGE, &val, 2);
2249 sc->eeprom_voltage = (int16_t)le16toh(val);
2250 DPRINTF(sc, IWN_DEBUG_RESET, "voltage=%d (in 0.3V)\n",
2251 sc->eeprom_voltage);
2254 /* Print samples. */
2255 if (sc->sc_debug & IWN_DEBUG_ANY) {
2256 for (i = 0; i < IWN_NBANDS - 1; i++)
2257 iwn4965_print_power_group(sc, i);
2261 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
2266 iwn4965_print_power_group(struct iwn_softc *sc, int i)
2268 struct iwn4965_eeprom_band *band = &sc->bands[i];
2269 struct iwn4965_eeprom_chan_samples *chans = band->chans;
2272 printf("===band %d===\n", i);
2273 printf("chan lo=%d, chan hi=%d\n", band->lo, band->hi);
2274 printf("chan1 num=%d\n", chans[0].num);
2275 for (c = 0; c < 2; c++) {
2276 for (j = 0; j < IWN_NSAMPLES; j++) {
2277 printf("chain %d, sample %d: temp=%d gain=%d "
2278 "power=%d pa_det=%d\n", c, j,
2279 chans[0].samples[c][j].temp,
2280 chans[0].samples[c][j].gain,
2281 chans[0].samples[c][j].power,
2282 chans[0].samples[c][j].pa_det);
2285 printf("chan2 num=%d\n", chans[1].num);
2286 for (c = 0; c < 2; c++) {
2287 for (j = 0; j < IWN_NSAMPLES; j++) {
2288 printf("chain %d, sample %d: temp=%d gain=%d "
2289 "power=%d pa_det=%d\n", c, j,
2290 chans[1].samples[c][j].temp,
2291 chans[1].samples[c][j].gain,
2292 chans[1].samples[c][j].power,
2293 chans[1].samples[c][j].pa_det);
2300 iwn5000_read_eeprom(struct iwn_softc *sc)
2302 struct iwn5000_eeprom_calib_hdr hdr;
2304 uint32_t base, addr;
2308 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
2310 /* Read regulatory domain (4 ASCII characters). */
2311 iwn_read_prom_data(sc, IWN5000_EEPROM_REG, &val, 2);
2312 base = le16toh(val);
2313 iwn_read_prom_data(sc, base + IWN5000_EEPROM_DOMAIN,
2314 sc->eeprom_domain, 4);
2316 /* Read the list of authorized channels (20MHz & 40MHz). */
2317 for (i = 0; i < IWN_NBANDS - 1; i++) {
2318 addr = base + sc->base_params->regulatory_bands[i];
2319 iwn_read_eeprom_channels(sc, i, addr);
2322 /* Read enhanced TX power information for 6000 Series. */
2323 if (sc->base_params->enhanced_TX_power)
2324 iwn_read_eeprom_enhinfo(sc);
2326 iwn_read_prom_data(sc, IWN5000_EEPROM_CAL, &val, 2);
2327 base = le16toh(val);
2328 iwn_read_prom_data(sc, base, &hdr, sizeof hdr);
2329 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
2330 "%s: calib version=%u pa type=%u voltage=%u\n", __func__,
2331 hdr.version, hdr.pa_type, le16toh(hdr.volt));
2332 sc->calib_ver = hdr.version;
2334 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSETv2) {
2335 sc->eeprom_voltage = le16toh(hdr.volt);
2336 iwn_read_prom_data(sc, base + IWN5000_EEPROM_TEMP, &val, 2);
2337 sc->eeprom_temp_high=le16toh(val);
2338 iwn_read_prom_data(sc, base + IWN5000_EEPROM_VOLT, &val, 2);
2339 sc->eeprom_temp = le16toh(val);
2342 if (sc->hw_type == IWN_HW_REV_TYPE_5150) {
2343 /* Compute temperature offset. */
2344 iwn_read_prom_data(sc, base + IWN5000_EEPROM_TEMP, &val, 2);
2345 sc->eeprom_temp = le16toh(val);
2346 iwn_read_prom_data(sc, base + IWN5000_EEPROM_VOLT, &val, 2);
2347 volt = le16toh(val);
2348 sc->temp_off = sc->eeprom_temp - (volt / -5);
2349 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "temp=%d volt=%d offset=%dK\n",
2350 sc->eeprom_temp, volt, sc->temp_off);
2352 /* Read crystal calibration. */
2353 iwn_read_prom_data(sc, base + IWN5000_EEPROM_CRYSTAL,
2354 &sc->eeprom_crystal, sizeof (uint32_t));
2355 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "crystal calibration 0x%08x\n",
2356 le32toh(sc->eeprom_crystal));
2359 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
2364 * Translate EEPROM flags to net80211.
2367 iwn_eeprom_channel_flags(struct iwn_eeprom_chan *channel)
2372 if ((channel->flags & IWN_EEPROM_CHAN_ACTIVE) == 0)
2373 nflags |= IEEE80211_CHAN_PASSIVE;
2374 if ((channel->flags & IWN_EEPROM_CHAN_IBSS) == 0)
2375 nflags |= IEEE80211_CHAN_NOADHOC;
2376 if (channel->flags & IWN_EEPROM_CHAN_RADAR) {
2377 nflags |= IEEE80211_CHAN_DFS;
2378 /* XXX apparently IBSS may still be marked */
2379 nflags |= IEEE80211_CHAN_NOADHOC;
2386 iwn_read_eeprom_band(struct iwn_softc *sc, int n, int maxchans, int *nchans,
2387 struct ieee80211_channel chans[])
2389 struct iwn_eeprom_chan *channels = sc->eeprom_channels[n];
2390 const struct iwn_chan_band *band = &iwn_bands[n];
2391 uint8_t bands[IEEE80211_MODE_BYTES];
2393 int i, error, nflags;
2395 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
2397 memset(bands, 0, sizeof(bands));
2399 setbit(bands, IEEE80211_MODE_11B);
2400 setbit(bands, IEEE80211_MODE_11G);
2401 if (sc->sc_flags & IWN_FLAG_HAS_11N)
2402 setbit(bands, IEEE80211_MODE_11NG);
2404 setbit(bands, IEEE80211_MODE_11A);
2405 if (sc->sc_flags & IWN_FLAG_HAS_11N)
2406 setbit(bands, IEEE80211_MODE_11NA);
2409 for (i = 0; i < band->nchan; i++) {
2410 if (!(channels[i].flags & IWN_EEPROM_CHAN_VALID)) {
2411 DPRINTF(sc, IWN_DEBUG_RESET,
2412 "skip chan %d flags 0x%x maxpwr %d\n",
2413 band->chan[i], channels[i].flags,
2414 channels[i].maxpwr);
2418 chan = band->chan[i];
2419 nflags = iwn_eeprom_channel_flags(&channels[i]);
2420 error = ieee80211_add_channel(chans, maxchans, nchans,
2421 chan, 0, channels[i].maxpwr, nflags, bands);
2425 /* Save maximum allowed TX power for this channel. */
2427 sc->maxpwr[chan] = channels[i].maxpwr;
2429 DPRINTF(sc, IWN_DEBUG_RESET,
2430 "add chan %d flags 0x%x maxpwr %d\n", chan,
2431 channels[i].flags, channels[i].maxpwr);
2434 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
2439 iwn_read_eeprom_ht40(struct iwn_softc *sc, int n, int maxchans, int *nchans,
2440 struct ieee80211_channel chans[])
2442 struct iwn_eeprom_chan *channels = sc->eeprom_channels[n];
2443 const struct iwn_chan_band *band = &iwn_bands[n];
2445 int i, error, nflags;
2447 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s start\n", __func__);
2449 if (!(sc->sc_flags & IWN_FLAG_HAS_11N)) {
2450 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end no 11n\n", __func__);
2454 for (i = 0; i < band->nchan; i++) {
2455 if (!(channels[i].flags & IWN_EEPROM_CHAN_VALID)) {
2456 DPRINTF(sc, IWN_DEBUG_RESET,
2457 "skip chan %d flags 0x%x maxpwr %d\n",
2458 band->chan[i], channels[i].flags,
2459 channels[i].maxpwr);
2463 chan = band->chan[i];
2464 nflags = iwn_eeprom_channel_flags(&channels[i]);
2465 nflags |= (n == 5 ? IEEE80211_CHAN_G : IEEE80211_CHAN_A);
2466 error = ieee80211_add_channel_ht40(chans, maxchans, nchans,
2467 chan, channels[i].maxpwr, nflags);
2470 device_printf(sc->sc_dev,
2471 "%s: no entry for channel %d\n", __func__, chan);
2474 DPRINTF(sc, IWN_DEBUG_RESET,
2475 "%s: skip chan %d, extension channel not found\n",
2479 device_printf(sc->sc_dev,
2480 "%s: channel table is full!\n", __func__);
2483 DPRINTF(sc, IWN_DEBUG_RESET,
2484 "add ht40 chan %d flags 0x%x maxpwr %d\n",
2485 chan, channels[i].flags, channels[i].maxpwr);
2492 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
2497 iwn_read_eeprom_channels(struct iwn_softc *sc, int n, uint32_t addr)
2499 struct ieee80211com *ic = &sc->sc_ic;
2501 iwn_read_prom_data(sc, addr, &sc->eeprom_channels[n],
2502 iwn_bands[n].nchan * sizeof (struct iwn_eeprom_chan));
2505 iwn_read_eeprom_band(sc, n, IEEE80211_CHAN_MAX, &ic->ic_nchans,
2508 iwn_read_eeprom_ht40(sc, n, IEEE80211_CHAN_MAX, &ic->ic_nchans,
2511 ieee80211_sort_channels(ic->ic_channels, ic->ic_nchans);
2514 static struct iwn_eeprom_chan *
2515 iwn_find_eeprom_channel(struct iwn_softc *sc, struct ieee80211_channel *c)
2517 int band, chan, i, j;
2519 if (IEEE80211_IS_CHAN_HT40(c)) {
2520 band = IEEE80211_IS_CHAN_5GHZ(c) ? 6 : 5;
2521 if (IEEE80211_IS_CHAN_HT40D(c))
2522 chan = c->ic_extieee;
2525 for (i = 0; i < iwn_bands[band].nchan; i++) {
2526 if (iwn_bands[band].chan[i] == chan)
2527 return &sc->eeprom_channels[band][i];
2530 for (j = 0; j < 5; j++) {
2531 for (i = 0; i < iwn_bands[j].nchan; i++) {
2532 if (iwn_bands[j].chan[i] == c->ic_ieee &&
2533 ((j == 0) ^ IEEE80211_IS_CHAN_A(c)) == 1)
2534 return &sc->eeprom_channels[j][i];
2542 iwn_getradiocaps(struct ieee80211com *ic,
2543 int maxchans, int *nchans, struct ieee80211_channel chans[])
2545 struct iwn_softc *sc = ic->ic_softc;
2548 /* Parse the list of authorized channels. */
2549 for (i = 0; i < 5 && *nchans < maxchans; i++)
2550 iwn_read_eeprom_band(sc, i, maxchans, nchans, chans);
2551 for (i = 5; i < IWN_NBANDS - 1 && *nchans < maxchans; i++)
2552 iwn_read_eeprom_ht40(sc, i, maxchans, nchans, chans);
2556 * Enforce flags read from EEPROM.
2559 iwn_setregdomain(struct ieee80211com *ic, struct ieee80211_regdomain *rd,
2560 int nchan, struct ieee80211_channel chans[])
2562 struct iwn_softc *sc = ic->ic_softc;
2565 for (i = 0; i < nchan; i++) {
2566 struct ieee80211_channel *c = &chans[i];
2567 struct iwn_eeprom_chan *channel;
2569 channel = iwn_find_eeprom_channel(sc, c);
2570 if (channel == NULL) {
2571 ic_printf(ic, "%s: invalid channel %u freq %u/0x%x\n",
2572 __func__, c->ic_ieee, c->ic_freq, c->ic_flags);
2575 c->ic_flags |= iwn_eeprom_channel_flags(channel);
2582 iwn_read_eeprom_enhinfo(struct iwn_softc *sc)
2584 struct iwn_eeprom_enhinfo enhinfo[35];
2585 struct ieee80211com *ic = &sc->sc_ic;
2586 struct ieee80211_channel *c;
2592 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
2594 iwn_read_prom_data(sc, IWN5000_EEPROM_REG, &val, 2);
2595 base = le16toh(val);
2596 iwn_read_prom_data(sc, base + IWN6000_EEPROM_ENHINFO,
2597 enhinfo, sizeof enhinfo);
2599 for (i = 0; i < nitems(enhinfo); i++) {
2600 flags = enhinfo[i].flags;
2601 if (!(flags & IWN_ENHINFO_VALID))
2602 continue; /* Skip invalid entries. */
2605 if (sc->txchainmask & IWN_ANT_A)
2606 maxpwr = MAX(maxpwr, enhinfo[i].chain[0]);
2607 if (sc->txchainmask & IWN_ANT_B)
2608 maxpwr = MAX(maxpwr, enhinfo[i].chain[1]);
2609 if (sc->txchainmask & IWN_ANT_C)
2610 maxpwr = MAX(maxpwr, enhinfo[i].chain[2]);
2611 if (sc->ntxchains == 2)
2612 maxpwr = MAX(maxpwr, enhinfo[i].mimo2);
2613 else if (sc->ntxchains == 3)
2614 maxpwr = MAX(maxpwr, enhinfo[i].mimo3);
2616 for (j = 0; j < ic->ic_nchans; j++) {
2617 c = &ic->ic_channels[j];
2618 if ((flags & IWN_ENHINFO_5GHZ)) {
2619 if (!IEEE80211_IS_CHAN_A(c))
2621 } else if ((flags & IWN_ENHINFO_OFDM)) {
2622 if (!IEEE80211_IS_CHAN_G(c))
2624 } else if (!IEEE80211_IS_CHAN_B(c))
2626 if ((flags & IWN_ENHINFO_HT40)) {
2627 if (!IEEE80211_IS_CHAN_HT40(c))
2630 if (IEEE80211_IS_CHAN_HT40(c))
2633 if (enhinfo[i].chan != 0 &&
2634 enhinfo[i].chan != c->ic_ieee)
2637 DPRINTF(sc, IWN_DEBUG_RESET,
2638 "channel %d(%x), maxpwr %d\n", c->ic_ieee,
2639 c->ic_flags, maxpwr / 2);
2640 c->ic_maxregpower = maxpwr / 2;
2641 c->ic_maxpower = maxpwr;
2645 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
2649 static struct ieee80211_node *
2650 iwn_node_alloc(struct ieee80211vap *vap, const uint8_t mac[IEEE80211_ADDR_LEN])
2652 return malloc(sizeof (struct iwn_node), M_80211_NODE,M_NOWAIT | M_ZERO);
2658 switch (rate & 0xff) {
2659 case 12: return 0xd;
2660 case 18: return 0xf;
2661 case 24: return 0x5;
2662 case 36: return 0x7;
2663 case 48: return 0x9;
2664 case 72: return 0xb;
2665 case 96: return 0x1;
2666 case 108: return 0x3;
2670 case 22: return 110;
2676 iwn_get_1stream_tx_antmask(struct iwn_softc *sc)
2679 return IWN_LSB(sc->txchainmask);
2683 iwn_get_2stream_tx_antmask(struct iwn_softc *sc)
2688 * The '2 stream' setup is a bit .. odd.
2690 * For NICs that support only 1 antenna, default to IWN_ANT_AB or
2691 * the firmware panics (eg Intel 5100.)
2693 * For NICs that support two antennas, we use ANT_AB.
2695 * For NICs that support three antennas, we use the two that
2696 * wasn't the default one.
2698 * XXX TODO: if bluetooth (full concurrent) is enabled, restrict
2699 * this to only one antenna.
2702 /* Default - transmit on the other antennas */
2703 tx = (sc->txchainmask & ~IWN_LSB(sc->txchainmask));
2705 /* Now, if it's zero, set it to IWN_ANT_AB, so to not panic firmware */
2710 * If the NIC is a two-stream TX NIC, configure the TX mask to
2711 * the default chainmask
2713 else if (sc->ntxchains == 2)
2714 tx = sc->txchainmask;
2722 * Calculate the required PLCP value from the given rate,
2723 * to the given node.
2725 * This will take the node configuration (eg 11n, rate table
2726 * setup, etc) into consideration.
2729 iwn_rate_to_plcp(struct iwn_softc *sc, struct ieee80211_node *ni,
2732 struct ieee80211com *ic = ni->ni_ic;
2737 * If it's an MCS rate, let's set the plcp correctly
2738 * and set the relevant flags based on the node config.
2740 if (rate & IEEE80211_RATE_MCS) {
2742 * Set the initial PLCP value to be between 0->31 for
2743 * MCS 0 -> MCS 31, then set the "I'm an MCS rate!"
2746 plcp = IEEE80211_RV(rate) | IWN_RFLAG_MCS;
2749 * XXX the following should only occur if both
2750 * the local configuration _and_ the remote node
2751 * advertise these capabilities. Thus this code
2756 * Set the channel width and guard interval.
2758 if (IEEE80211_IS_CHAN_HT40(ni->ni_chan)) {
2759 plcp |= IWN_RFLAG_HT40;
2760 if (ni->ni_htcap & IEEE80211_HTCAP_SHORTGI40)
2761 plcp |= IWN_RFLAG_SGI;
2762 } else if (ni->ni_htcap & IEEE80211_HTCAP_SHORTGI20) {
2763 plcp |= IWN_RFLAG_SGI;
2767 * Ensure the selected rate matches the link quality
2768 * table entries being used.
2771 plcp |= IWN_RFLAG_ANT(sc->txchainmask);
2772 else if (rate > 0x87)
2773 plcp |= IWN_RFLAG_ANT(iwn_get_2stream_tx_antmask(sc));
2775 plcp |= IWN_RFLAG_ANT(iwn_get_1stream_tx_antmask(sc));
2778 * Set the initial PLCP - fine for both
2779 * OFDM and CCK rates.
2781 plcp = rate2plcp(rate);
2783 /* Set CCK flag if it's CCK */
2785 /* XXX It would be nice to have a method
2786 * to map the ridx -> phy table entry
2787 * so we could just query that, rather than
2788 * this hack to check against IWN_RIDX_OFDM6.
2790 ridx = ieee80211_legacy_rate_lookup(ic->ic_rt,
2791 rate & IEEE80211_RATE_VAL);
2792 if (ridx < IWN_RIDX_OFDM6 &&
2793 IEEE80211_IS_CHAN_2GHZ(ni->ni_chan))
2794 plcp |= IWN_RFLAG_CCK;
2796 /* Set antenna configuration */
2797 /* XXX TODO: is this the right antenna to use for legacy? */
2798 plcp |= IWN_RFLAG_ANT(iwn_get_1stream_tx_antmask(sc));
2801 DPRINTF(sc, IWN_DEBUG_TXRATE, "%s: rate=0x%02x, plcp=0x%08x\n",
2806 return (htole32(plcp));
2810 iwn_newassoc(struct ieee80211_node *ni, int isnew)
2812 /* Doesn't do anything at the moment */
2816 iwn_media_change(struct ifnet *ifp)
2820 error = ieee80211_media_change(ifp);
2821 /* NB: only the fixed rate can change and that doesn't need a reset */
2822 return (error == ENETRESET ? 0 : error);
2826 iwn_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg)
2828 struct iwn_vap *ivp = IWN_VAP(vap);
2829 struct ieee80211com *ic = vap->iv_ic;
2830 struct iwn_softc *sc = ic->ic_softc;
2833 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
2835 DPRINTF(sc, IWN_DEBUG_STATE, "%s: %s -> %s\n", __func__,
2836 ieee80211_state_name[vap->iv_state], ieee80211_state_name[nstate]);
2838 IEEE80211_UNLOCK(ic);
2840 callout_stop(&sc->calib_to);
2842 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX];
2845 case IEEE80211_S_ASSOC:
2846 if (vap->iv_state != IEEE80211_S_RUN)
2849 case IEEE80211_S_AUTH:
2850 if (vap->iv_state == IEEE80211_S_AUTH)
2854 * !AUTH -> AUTH transition requires state reset to handle
2855 * reassociations correctly.
2857 sc->rxon->associd = 0;
2858 sc->rxon->filter &= ~htole32(IWN_FILTER_BSS);
2859 sc->calib.state = IWN_CALIB_STATE_INIT;
2861 /* Wait until we hear a beacon before we transmit */
2862 if (IEEE80211_IS_CHAN_PASSIVE(ic->ic_curchan))
2863 sc->sc_beacon_wait = 1;
2865 if ((error = iwn_auth(sc, vap)) != 0) {
2866 device_printf(sc->sc_dev,
2867 "%s: could not move to auth state\n", __func__);
2871 case IEEE80211_S_RUN:
2873 * RUN -> RUN transition; Just restart the timers.
2875 if (vap->iv_state == IEEE80211_S_RUN) {
2880 /* Wait until we hear a beacon before we transmit */
2881 if (IEEE80211_IS_CHAN_PASSIVE(ic->ic_curchan))
2882 sc->sc_beacon_wait = 1;
2885 * !RUN -> RUN requires setting the association id
2886 * which is done with a firmware cmd. We also defer
2887 * starting the timers until that work is done.
2889 if ((error = iwn_run(sc, vap)) != 0) {
2890 device_printf(sc->sc_dev,
2891 "%s: could not move to run state\n", __func__);
2895 case IEEE80211_S_INIT:
2896 sc->calib.state = IWN_CALIB_STATE_INIT;
2898 * Purge the xmit queue so we don't have old frames
2899 * during a new association attempt.
2901 sc->sc_beacon_wait = 0;
2902 iwn_xmit_queue_drain(sc);
2911 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end in error\n", __func__);
2915 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
2917 return ivp->iv_newstate(vap, nstate, arg);
2921 iwn_calib_timeout(void *arg)
2923 struct iwn_softc *sc = arg;
2925 IWN_LOCK_ASSERT(sc);
2927 /* Force automatic TX power calibration every 60 secs. */
2928 if (++sc->calib_cnt >= 120) {
2931 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s\n",
2932 "sending request for statistics");
2933 (void)iwn_cmd(sc, IWN_CMD_GET_STATISTICS, &flags,
2937 callout_reset(&sc->calib_to, msecs_to_ticks(500), iwn_calib_timeout,
2942 * Process an RX_PHY firmware notification. This is usually immediately
2943 * followed by an MPDU_RX_DONE notification.
2946 iwn_rx_phy(struct iwn_softc *sc, struct iwn_rx_desc *desc,
2947 struct iwn_rx_data *data)
2949 struct iwn_rx_stat *stat = (struct iwn_rx_stat *)(desc + 1);
2951 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: received PHY stats\n", __func__);
2952 bus_dmamap_sync(sc->rxq.data_dmat, data->map, BUS_DMASYNC_POSTREAD);
2954 /* Save RX statistics, they will be used on MPDU_RX_DONE. */
2955 memcpy(&sc->last_rx_stat, stat, sizeof (*stat));
2956 sc->last_rx_valid = 1;
2960 * Process an RX_DONE (4965AGN only) or MPDU_RX_DONE firmware notification.
2961 * Each MPDU_RX_DONE notification must be preceded by an RX_PHY one.
2964 iwn_rx_done(struct iwn_softc *sc, struct iwn_rx_desc *desc,
2965 struct iwn_rx_data *data)
2967 struct iwn_ops *ops = &sc->ops;
2968 struct ieee80211com *ic = &sc->sc_ic;
2969 struct iwn_rx_ring *ring = &sc->rxq;
2970 struct ieee80211_frame *wh;
2971 struct ieee80211_node *ni;
2972 struct mbuf *m, *m1;
2973 struct iwn_rx_stat *stat;
2977 int error, len, rssi, nf;
2979 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
2981 if (desc->type == IWN_MPDU_RX_DONE) {
2982 /* Check for prior RX_PHY notification. */
2983 if (!sc->last_rx_valid) {
2984 DPRINTF(sc, IWN_DEBUG_ANY,
2985 "%s: missing RX_PHY\n", __func__);
2988 stat = &sc->last_rx_stat;
2990 stat = (struct iwn_rx_stat *)(desc + 1);
2992 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_POSTREAD);
2994 if (stat->cfg_phy_len > IWN_STAT_MAXLEN) {
2995 device_printf(sc->sc_dev,
2996 "%s: invalid RX statistic header, len %d\n", __func__,
3000 if (desc->type == IWN_MPDU_RX_DONE) {
3001 struct iwn_rx_mpdu *mpdu = (struct iwn_rx_mpdu *)(desc + 1);
3002 head = (caddr_t)(mpdu + 1);
3003 len = le16toh(mpdu->len);
3005 head = (caddr_t)(stat + 1) + stat->cfg_phy_len;
3006 len = le16toh(stat->len);
3009 flags = le32toh(*(uint32_t *)(head + len));
3011 /* Discard frames with a bad FCS early. */
3012 if ((flags & IWN_RX_NOERROR) != IWN_RX_NOERROR) {
3013 DPRINTF(sc, IWN_DEBUG_RECV, "%s: RX flags error %x\n",
3015 counter_u64_add(ic->ic_ierrors, 1);
3018 /* Discard frames that are too short. */
3019 if (len < sizeof (struct ieee80211_frame_ack)) {
3020 DPRINTF(sc, IWN_DEBUG_RECV, "%s: frame too short: %d\n",
3022 counter_u64_add(ic->ic_ierrors, 1);
3026 m1 = m_getjcl(M_NOWAIT, MT_DATA, M_PKTHDR, IWN_RBUF_SIZE);
3028 DPRINTF(sc, IWN_DEBUG_ANY, "%s: no mbuf to restock ring\n",
3030 counter_u64_add(ic->ic_ierrors, 1);
3033 bus_dmamap_unload(ring->data_dmat, data->map);
3035 error = bus_dmamap_load(ring->data_dmat, data->map, mtod(m1, void *),
3036 IWN_RBUF_SIZE, iwn_dma_map_addr, &paddr, BUS_DMA_NOWAIT);
3037 if (error != 0 && error != EFBIG) {
3038 device_printf(sc->sc_dev,
3039 "%s: bus_dmamap_load failed, error %d\n", __func__, error);
3042 /* Try to reload the old mbuf. */
3043 error = bus_dmamap_load(ring->data_dmat, data->map,
3044 mtod(data->m, void *), IWN_RBUF_SIZE, iwn_dma_map_addr,
3045 &paddr, BUS_DMA_NOWAIT);
3046 if (error != 0 && error != EFBIG) {
3047 panic("%s: could not load old RX mbuf", __func__);
3049 bus_dmamap_sync(ring->data_dmat, data->map,
3050 BUS_DMASYNC_PREREAD);
3051 /* Physical address may have changed. */
3052 ring->desc[ring->cur] = htole32(paddr >> 8);
3053 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
3054 BUS_DMASYNC_PREWRITE);
3055 counter_u64_add(ic->ic_ierrors, 1);
3059 bus_dmamap_sync(ring->data_dmat, data->map,
3060 BUS_DMASYNC_PREREAD);
3064 /* Update RX descriptor. */
3065 ring->desc[ring->cur] = htole32(paddr >> 8);
3066 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
3067 BUS_DMASYNC_PREWRITE);
3069 /* Finalize mbuf. */
3071 m->m_pkthdr.len = m->m_len = len;
3073 /* Grab a reference to the source node. */
3074 wh = mtod(m, struct ieee80211_frame *);
3075 if (len >= sizeof(struct ieee80211_frame_min))
3076 ni = ieee80211_find_rxnode(ic, (struct ieee80211_frame_min *)wh);
3079 nf = (ni != NULL && ni->ni_vap->iv_state == IEEE80211_S_RUN &&
3080 (ic->ic_flags & IEEE80211_F_SCAN) == 0) ? sc->noise : -95;
3082 rssi = ops->get_rssi(sc, stat);
3084 if (ieee80211_radiotap_active(ic)) {
3085 struct iwn_rx_radiotap_header *tap = &sc->sc_rxtap;
3088 if (stat->flags & htole16(IWN_STAT_FLAG_SHPREAMBLE))
3089 tap->wr_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
3090 tap->wr_dbm_antsignal = (int8_t)rssi;
3091 tap->wr_dbm_antnoise = (int8_t)nf;
3092 tap->wr_tsft = stat->tstamp;
3093 switch (stat->rate) {
3095 case 10: tap->wr_rate = 2; break;
3096 case 20: tap->wr_rate = 4; break;
3097 case 55: tap->wr_rate = 11; break;
3098 case 110: tap->wr_rate = 22; break;
3100 case 0xd: tap->wr_rate = 12; break;
3101 case 0xf: tap->wr_rate = 18; break;
3102 case 0x5: tap->wr_rate = 24; break;
3103 case 0x7: tap->wr_rate = 36; break;
3104 case 0x9: tap->wr_rate = 48; break;
3105 case 0xb: tap->wr_rate = 72; break;
3106 case 0x1: tap->wr_rate = 96; break;
3107 case 0x3: tap->wr_rate = 108; break;
3108 /* Unknown rate: should not happen. */
3109 default: tap->wr_rate = 0;
3114 * If it's a beacon and we're waiting, then do the
3115 * wakeup. This should unblock raw_xmit/start.
3117 if (sc->sc_beacon_wait) {
3118 uint8_t type, subtype;
3119 /* NB: Re-assign wh */
3120 wh = mtod(m, struct ieee80211_frame *);
3121 type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK;
3122 subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
3124 * This assumes at this point we've received our own
3127 DPRINTF(sc, IWN_DEBUG_TRACE,
3128 "%s: beacon_wait, type=%d, subtype=%d\n",
3129 __func__, type, subtype);
3130 if (type == IEEE80211_FC0_TYPE_MGT &&
3131 subtype == IEEE80211_FC0_SUBTYPE_BEACON) {
3132 DPRINTF(sc, IWN_DEBUG_TRACE | IWN_DEBUG_XMIT,
3133 "%s: waking things up\n", __func__);
3134 /* queue taskqueue to transmit! */
3135 taskqueue_enqueue(sc->sc_tq, &sc->sc_xmit_task);
3141 /* Send the frame to the 802.11 layer. */
3143 if (ni->ni_flags & IEEE80211_NODE_HT)
3144 m->m_flags |= M_AMPDU;
3145 (void)ieee80211_input(ni, m, rssi - nf, nf);
3146 /* Node is no longer needed. */
3147 ieee80211_free_node(ni);
3149 (void)ieee80211_input_all(ic, m, rssi - nf, nf);
3153 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
3157 /* Process an incoming Compressed BlockAck. */
3159 iwn_rx_compressed_ba(struct iwn_softc *sc, struct iwn_rx_desc *desc,
3160 struct iwn_rx_data *data)
3162 struct ieee80211_ratectl_tx_status *txs = &sc->sc_txs;
3163 struct iwn_ops *ops = &sc->ops;
3164 struct iwn_node *wn;
3165 struct ieee80211_node *ni;
3166 struct iwn_compressed_ba *ba = (struct iwn_compressed_ba *)(desc + 1);
3167 struct iwn_tx_ring *txq;
3168 struct iwn_tx_data *txdata;
3169 struct ieee80211_tx_ampdu *tap;
3174 int i, lastidx, qid, *res, shift;
3175 int tx_ok = 0, tx_err = 0;
3177 DPRINTF(sc, IWN_DEBUG_TRACE | IWN_DEBUG_XMIT, "->%s begin\n", __func__);
3179 bus_dmamap_sync(sc->rxq.data_dmat, data->map, BUS_DMASYNC_POSTREAD);
3181 qid = le16toh(ba->qid);
3182 txq = &sc->txq[ba->qid];
3183 tap = sc->qid2tap[ba->qid];
3185 wn = (void *)tap->txa_ni;
3189 if (!IEEE80211_AMPDU_RUNNING(tap)) {
3190 res = tap->txa_private;
3191 ssn = tap->txa_start & 0xfff;
3194 for (lastidx = le16toh(ba->ssn) & 0xff; txq->read != lastidx;) {
3195 txdata = &txq->data[txq->read];
3197 /* Unmap and free mbuf. */
3198 bus_dmamap_sync(txq->data_dmat, txdata->map,
3199 BUS_DMASYNC_POSTWRITE);
3200 bus_dmamap_unload(txq->data_dmat, txdata->map);
3201 m = txdata->m, txdata->m = NULL;
3202 ni = txdata->ni, txdata->ni = NULL;
3204 KASSERT(ni != NULL, ("no node"));
3205 KASSERT(m != NULL, ("no mbuf"));
3207 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: freeing m=%p\n", __func__, m);
3208 ieee80211_tx_complete(ni, m, 1);
3211 txq->read = (txq->read + 1) % IWN_TX_RING_COUNT;
3214 if (txq->queued == 0 && res != NULL) {
3216 ops->ampdu_tx_stop(sc, qid, tid, ssn);
3218 sc->qid2tap[qid] = NULL;
3219 free(res, M_DEVBUF);
3223 if (wn->agg[tid].bitmap == 0)
3226 shift = wn->agg[tid].startidx - ((le16toh(ba->seq) >> 4) & 0xff);
3230 if (wn->agg[tid].nframes > (64 - shift))
3234 * Walk the bitmap and calculate how many successful and failed
3235 * attempts are made.
3237 * Yes, the rate control code doesn't know these are A-MPDU
3238 * subframes and that it's okay to fail some of these.
3241 bitmap = (le64toh(ba->bitmap) >> shift) & wn->agg[tid].bitmap;
3242 for (i = 0; bitmap; i++) {
3243 txs->flags = 0; /* XXX TODO */
3244 if ((bitmap & 1) == 0) {
3246 txs->status = IEEE80211_RATECTL_TX_FAIL_UNSPECIFIED;
3249 txs->status = IEEE80211_RATECTL_TX_SUCCESS;
3251 ieee80211_ratectl_tx_complete(ni, txs);
3255 DPRINTF(sc, IWN_DEBUG_TRACE | IWN_DEBUG_XMIT,
3256 "->%s: end; %d ok; %d err\n",__func__, tx_ok, tx_err);
3261 * Process a CALIBRATION_RESULT notification sent by the initialization
3262 * firmware on response to a CMD_CALIB_CONFIG command (5000 only).
3265 iwn5000_rx_calib_results(struct iwn_softc *sc, struct iwn_rx_desc *desc,
3266 struct iwn_rx_data *data)
3268 struct iwn_phy_calib *calib = (struct iwn_phy_calib *)(desc + 1);
3271 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
3273 /* Runtime firmware should not send such a notification. */
3274 if (sc->sc_flags & IWN_FLAG_CALIB_DONE){
3275 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s received after clib done\n",
3279 len = (le32toh(desc->len) & 0x3fff) - 4;
3280 bus_dmamap_sync(sc->rxq.data_dmat, data->map, BUS_DMASYNC_POSTREAD);
3282 switch (calib->code) {
3283 case IWN5000_PHY_CALIB_DC:
3284 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_DC)
3287 case IWN5000_PHY_CALIB_LO:
3288 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_LO)
3291 case IWN5000_PHY_CALIB_TX_IQ:
3292 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TX_IQ)
3295 case IWN5000_PHY_CALIB_TX_IQ_PERIODIC:
3296 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TX_IQ_PERIODIC)
3299 case IWN5000_PHY_CALIB_BASE_BAND:
3300 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_BASE_BAND)
3304 if (idx == -1) /* Ignore other results. */
3307 /* Save calibration result. */
3308 if (sc->calibcmd[idx].buf != NULL)
3309 free(sc->calibcmd[idx].buf, M_DEVBUF);
3310 sc->calibcmd[idx].buf = malloc(len, M_DEVBUF, M_NOWAIT);
3311 if (sc->calibcmd[idx].buf == NULL) {
3312 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
3313 "not enough memory for calibration result %d\n",
3317 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
3318 "saving calibration result idx=%d, code=%d len=%d\n", idx, calib->code, len);
3319 sc->calibcmd[idx].len = len;
3320 memcpy(sc->calibcmd[idx].buf, calib, len);
3324 iwn_stats_update(struct iwn_softc *sc, struct iwn_calib_state *calib,
3325 struct iwn_stats *stats, int len)
3327 struct iwn_stats_bt *stats_bt;
3328 struct iwn_stats *lstats;
3331 * First - check whether the length is the bluetooth or normal.
3333 * If it's normal - just copy it and bump out.
3334 * Otherwise we have to convert things.
3337 if (len == sizeof(struct iwn_stats) + 4) {
3338 memcpy(&sc->last_stat, stats, sizeof(struct iwn_stats));
3339 sc->last_stat_valid = 1;
3344 * If it's not the bluetooth size - log, then just copy.
3346 if (len != sizeof(struct iwn_stats_bt) + 4) {
3347 DPRINTF(sc, IWN_DEBUG_STATS,
3348 "%s: size of rx statistics (%d) not an expected size!\n",
3351 memcpy(&sc->last_stat, stats, sizeof(struct iwn_stats));
3352 sc->last_stat_valid = 1;
3359 stats_bt = (struct iwn_stats_bt *) stats;
3360 lstats = &sc->last_stat;
3363 lstats->flags = stats_bt->flags;
3365 memcpy(&lstats->rx.ofdm, &stats_bt->rx_bt.ofdm,
3366 sizeof(struct iwn_rx_phy_stats));
3367 memcpy(&lstats->rx.cck, &stats_bt->rx_bt.cck,
3368 sizeof(struct iwn_rx_phy_stats));
3369 memcpy(&lstats->rx.general, &stats_bt->rx_bt.general_bt.common,
3370 sizeof(struct iwn_rx_general_stats));
3371 memcpy(&lstats->rx.ht, &stats_bt->rx_bt.ht,
3372 sizeof(struct iwn_rx_ht_phy_stats));
3374 memcpy(&lstats->tx, &stats_bt->tx,
3375 sizeof(struct iwn_tx_stats));
3377 memcpy(&lstats->general, &stats_bt->general,
3378 sizeof(struct iwn_general_stats));
3380 /* XXX TODO: Squirrel away the extra bluetooth stats somewhere */
3381 sc->last_stat_valid = 1;
3385 * Process an RX_STATISTICS or BEACON_STATISTICS firmware notification.
3386 * The latter is sent by the firmware after each received beacon.
3389 iwn_rx_statistics(struct iwn_softc *sc, struct iwn_rx_desc *desc,
3390 struct iwn_rx_data *data)
3392 struct iwn_ops *ops = &sc->ops;
3393 struct ieee80211com *ic = &sc->sc_ic;
3394 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
3395 struct iwn_calib_state *calib = &sc->calib;
3396 struct iwn_stats *stats = (struct iwn_stats *)(desc + 1);
3397 struct iwn_stats *lstats;
3400 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
3402 /* Ignore statistics received during a scan. */
3403 if (vap->iv_state != IEEE80211_S_RUN ||
3404 (ic->ic_flags & IEEE80211_F_SCAN)){
3405 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s received during calib\n",
3410 bus_dmamap_sync(sc->rxq.data_dmat, data->map, BUS_DMASYNC_POSTREAD);
3412 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_STATS,
3413 "%s: received statistics, cmd %d, len %d\n",
3414 __func__, desc->type, le16toh(desc->len));
3415 sc->calib_cnt = 0; /* Reset TX power calibration timeout. */
3418 * Collect/track general statistics for reporting.
3420 * This takes care of ensuring that the bluetooth sized message
3421 * will be correctly converted to the legacy sized message.
3423 iwn_stats_update(sc, calib, stats, le16toh(desc->len));
3426 * And now, let's take a reference of it to use!
3428 lstats = &sc->last_stat;
3430 /* Test if temperature has changed. */
3431 if (lstats->general.temp != sc->rawtemp) {
3432 /* Convert "raw" temperature to degC. */
3433 sc->rawtemp = stats->general.temp;
3434 temp = ops->get_temperature(sc);
3435 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: temperature %d\n",
3438 /* Update TX power if need be (4965AGN only). */
3439 if (sc->hw_type == IWN_HW_REV_TYPE_4965)
3440 iwn4965_power_calibration(sc, temp);
3443 if (desc->type != IWN_BEACON_STATISTICS)
3444 return; /* Reply to a statistics request. */
3446 sc->noise = iwn_get_noise(&lstats->rx.general);
3447 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: noise %d\n", __func__, sc->noise);
3449 /* Test that RSSI and noise are present in stats report. */
3450 if (le32toh(lstats->rx.general.flags) != 1) {
3451 DPRINTF(sc, IWN_DEBUG_ANY, "%s\n",
3452 "received statistics without RSSI");
3456 if (calib->state == IWN_CALIB_STATE_ASSOC)
3457 iwn_collect_noise(sc, &lstats->rx.general);
3458 else if (calib->state == IWN_CALIB_STATE_RUN) {
3459 iwn_tune_sensitivity(sc, &lstats->rx);
3461 * XXX TODO: Only run the RX recovery if we're associated!
3463 iwn_check_rx_recovery(sc, lstats);
3464 iwn_save_stats_counters(sc, lstats);
3467 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
3471 * Save the relevant statistic counters for the next calibration
3475 iwn_save_stats_counters(struct iwn_softc *sc, const struct iwn_stats *rs)
3477 struct iwn_calib_state *calib = &sc->calib;
3479 /* Save counters values for next call. */
3480 calib->bad_plcp_cck = le32toh(rs->rx.cck.bad_plcp);
3481 calib->fa_cck = le32toh(rs->rx.cck.fa);
3482 calib->bad_plcp_ht = le32toh(rs->rx.ht.bad_plcp);
3483 calib->bad_plcp_ofdm = le32toh(rs->rx.ofdm.bad_plcp);
3484 calib->fa_ofdm = le32toh(rs->rx.ofdm.fa);
3486 /* Last time we received these tick values */
3487 sc->last_calib_ticks = ticks;
3491 * Process a TX_DONE firmware notification. Unfortunately, the 4965AGN
3492 * and 5000 adapters have different incompatible TX status formats.
3495 iwn4965_tx_done(struct iwn_softc *sc, struct iwn_rx_desc *desc,
3496 struct iwn_rx_data *data)
3498 struct iwn4965_tx_stat *stat = (struct iwn4965_tx_stat *)(desc + 1);
3499 struct iwn_tx_ring *ring;
3502 qid = desc->qid & 0xf;
3503 ring = &sc->txq[qid];
3505 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: "
3506 "qid %d idx %d RTS retries %d ACK retries %d nkill %d rate %x duration %d status %x\n",
3507 __func__, desc->qid, desc->idx,
3511 stat->rate, le16toh(stat->duration),
3512 le32toh(stat->status));
3514 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_POSTREAD);
3515 if (qid >= sc->firstaggqueue) {
3516 iwn_ampdu_tx_done(sc, qid, desc->idx, stat->nframes,
3517 stat->rtsfailcnt, stat->ackfailcnt, &stat->status);
3519 iwn_tx_done(sc, desc, stat->rtsfailcnt, stat->ackfailcnt,
3520 le32toh(stat->status) & 0xff);
3525 iwn5000_tx_done(struct iwn_softc *sc, struct iwn_rx_desc *desc,
3526 struct iwn_rx_data *data)
3528 struct iwn5000_tx_stat *stat = (struct iwn5000_tx_stat *)(desc + 1);
3529 struct iwn_tx_ring *ring;
3532 qid = desc->qid & 0xf;
3533 ring = &sc->txq[qid];
3535 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: "
3536 "qid %d idx %d RTS retries %d ACK retries %d nkill %d rate %x duration %d status %x\n",
3537 __func__, desc->qid, desc->idx,
3541 stat->rate, le16toh(stat->duration),
3542 le32toh(stat->status));
3545 /* Reset TX scheduler slot. */
3546 iwn5000_reset_sched(sc, desc->qid & 0xf, desc->idx);
3549 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_POSTREAD);
3550 if (qid >= sc->firstaggqueue) {
3551 iwn_ampdu_tx_done(sc, qid, desc->idx, stat->nframes,
3552 stat->rtsfailcnt, stat->ackfailcnt, &stat->status);
3554 iwn_tx_done(sc, desc, stat->rtsfailcnt, stat->ackfailcnt,
3555 le16toh(stat->status) & 0xff);
3560 * Adapter-independent backend for TX_DONE firmware notifications.
3563 iwn_tx_done(struct iwn_softc *sc, struct iwn_rx_desc *desc, int rtsfailcnt,
3564 int ackfailcnt, uint8_t status)
3566 struct ieee80211_ratectl_tx_status *txs = &sc->sc_txs;
3567 struct iwn_tx_ring *ring = &sc->txq[desc->qid & 0xf];
3568 struct iwn_tx_data *data = &ring->data[desc->idx];
3570 struct ieee80211_node *ni;
3572 KASSERT(data->ni != NULL, ("no node"));
3574 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
3576 /* Unmap and free mbuf. */
3577 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_POSTWRITE);
3578 bus_dmamap_unload(ring->data_dmat, data->map);
3579 m = data->m, data->m = NULL;
3580 ni = data->ni, data->ni = NULL;
3583 * Update rate control statistics for the node.
3585 txs->flags = IEEE80211_RATECTL_STATUS_SHORT_RETRY |
3586 IEEE80211_RATECTL_STATUS_LONG_RETRY;
3587 txs->short_retries = rtsfailcnt;
3588 txs->long_retries = ackfailcnt;
3589 if (!(status & IWN_TX_FAIL))
3590 txs->status = IEEE80211_RATECTL_TX_SUCCESS;
3593 case IWN_TX_FAIL_SHORT_LIMIT:
3594 txs->status = IEEE80211_RATECTL_TX_FAIL_SHORT;
3596 case IWN_TX_FAIL_LONG_LIMIT:
3597 txs->status = IEEE80211_RATECTL_TX_FAIL_LONG;
3599 case IWN_TX_STATUS_FAIL_LIFE_EXPIRE:
3600 txs->status = IEEE80211_RATECTL_TX_FAIL_EXPIRED;
3603 txs->status = IEEE80211_RATECTL_TX_FAIL_UNSPECIFIED;
3607 ieee80211_ratectl_tx_complete(ni, txs);
3610 * Channels marked for "radar" require traffic to be received
3611 * to unlock before we can transmit. Until traffic is seen
3612 * any attempt to transmit is returned immediately with status
3613 * set to IWN_TX_FAIL_TX_LOCKED. Unfortunately this can easily
3614 * happen on first authenticate after scanning. To workaround
3615 * this we ignore a failure of this sort in AUTH state so the
3616 * 802.11 layer will fall back to using a timeout to wait for
3617 * the AUTH reply. This allows the firmware time to see
3618 * traffic so a subsequent retry of AUTH succeeds. It's
3619 * unclear why the firmware does not maintain state for
3620 * channels recently visited as this would allow immediate
3621 * use of the channel after a scan (where we see traffic).
3623 if (status == IWN_TX_FAIL_TX_LOCKED &&
3624 ni->ni_vap->iv_state == IEEE80211_S_AUTH)
3625 ieee80211_tx_complete(ni, m, 0);
3627 ieee80211_tx_complete(ni, m,
3628 (status & IWN_TX_FAIL) != 0);
3630 sc->sc_tx_timer = 0;
3631 if (--ring->queued < IWN_TX_RING_LOMARK)
3632 sc->qfullmsk &= ~(1 << ring->qid);
3634 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
3638 * Process a "command done" firmware notification. This is where we wakeup
3639 * processes waiting for a synchronous command completion.
3642 iwn_cmd_done(struct iwn_softc *sc, struct iwn_rx_desc *desc)
3644 struct iwn_tx_ring *ring;
3645 struct iwn_tx_data *data;
3648 if (sc->sc_flags & IWN_FLAG_PAN_SUPPORT)
3649 cmd_queue_num = IWN_PAN_CMD_QUEUE;
3651 cmd_queue_num = IWN_CMD_QUEUE_NUM;
3653 if ((desc->qid & IWN_RX_DESC_QID_MSK) != cmd_queue_num)
3654 return; /* Not a command ack. */
3656 ring = &sc->txq[cmd_queue_num];
3657 data = &ring->data[desc->idx];
3659 /* If the command was mapped in an mbuf, free it. */
3660 if (data->m != NULL) {
3661 bus_dmamap_sync(ring->data_dmat, data->map,
3662 BUS_DMASYNC_POSTWRITE);
3663 bus_dmamap_unload(ring->data_dmat, data->map);
3667 wakeup(&ring->desc[desc->idx]);
3671 iwn_ampdu_tx_done(struct iwn_softc *sc, int qid, int idx, int nframes,
3672 int rtsfailcnt, int ackfailcnt, void *stat)
3674 struct iwn_ops *ops = &sc->ops;
3675 struct iwn_tx_ring *ring = &sc->txq[qid];
3676 struct ieee80211_ratectl_tx_status *txs = &sc->sc_txs;
3677 struct iwn_tx_data *data;
3679 struct iwn_node *wn;
3680 struct ieee80211_node *ni;
3681 struct ieee80211_tx_ampdu *tap;
3683 uint32_t *status = stat;
3684 uint16_t *aggstatus = stat;
3687 int bit, i, lastidx, *res, seqno, shift, start;
3689 /* XXX TODO: status is le16 field! Grr */
3691 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
3692 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: nframes=%d, status=0x%08x\n",
3697 tap = sc->qid2tap[qid];
3699 wn = (void *)tap->txa_ni;
3703 * XXX TODO: ACK and RTS failures would be nice here!
3707 * A-MPDU single frame status - if we failed to transmit it
3708 * in A-MPDU, then it may be a permanent failure.
3710 * XXX TODO: check what the Linux iwlwifi driver does here;
3711 * there's some permanent and temporary failures that may be
3712 * handled differently.
3715 txs->flags = IEEE80211_RATECTL_STATUS_SHORT_RETRY |
3716 IEEE80211_RATECTL_STATUS_LONG_RETRY;
3717 txs->short_retries = rtsfailcnt;
3718 txs->long_retries = ackfailcnt;
3719 if ((*status & 0xff) != 1 && (*status & 0xff) != 2) {
3721 printf("ieee80211_send_bar()\n");
3724 * If we completely fail a transmit, make sure a
3725 * notification is pushed up to the rate control
3729 txs->status = IEEE80211_RATECTL_TX_FAIL_UNSPECIFIED;
3732 * If nframes=1, then we won't be getting a BA for
3733 * this frame. Ensure that we correctly update the
3734 * rate control code with how many retries were
3735 * needed to send it.
3737 txs->status = IEEE80211_RATECTL_TX_SUCCESS;
3739 ieee80211_ratectl_tx_complete(ni, txs);
3744 for (i = 0; i < nframes; i++) {
3745 if (le16toh(aggstatus[i * 2]) & 0xc)
3748 idx = le16toh(aggstatus[2*i + 1]) & 0xff;
3752 shift = 0x100 - idx + start;
3755 } else if (bit <= -64)
3756 bit = 0x100 - start + idx;
3758 shift = start - idx;
3762 bitmap = bitmap << shift;
3763 bitmap |= 1ULL << bit;
3765 tap = sc->qid2tap[qid];
3767 wn = (void *)tap->txa_ni;
3768 wn->agg[tid].bitmap = bitmap;
3769 wn->agg[tid].startidx = start;
3770 wn->agg[tid].nframes = nframes;
3774 if (!IEEE80211_AMPDU_RUNNING(tap)) {
3775 res = tap->txa_private;
3776 ssn = tap->txa_start & 0xfff;
3779 /* This is going nframes DWORDS into the descriptor? */
3780 seqno = le32toh(*(status + nframes)) & 0xfff;
3781 for (lastidx = (seqno & 0xff); ring->read != lastidx;) {
3782 data = &ring->data[ring->read];
3784 /* Unmap and free mbuf. */
3785 bus_dmamap_sync(ring->data_dmat, data->map,
3786 BUS_DMASYNC_POSTWRITE);
3787 bus_dmamap_unload(ring->data_dmat, data->map);
3788 m = data->m, data->m = NULL;
3789 ni = data->ni, data->ni = NULL;
3791 KASSERT(ni != NULL, ("no node"));
3792 KASSERT(m != NULL, ("no mbuf"));
3793 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: freeing m=%p\n", __func__, m);
3794 ieee80211_tx_complete(ni, m, 1);
3797 ring->read = (ring->read + 1) % IWN_TX_RING_COUNT;
3800 if (ring->queued == 0 && res != NULL) {
3802 ops->ampdu_tx_stop(sc, qid, tid, ssn);
3804 sc->qid2tap[qid] = NULL;
3805 free(res, M_DEVBUF);
3809 sc->sc_tx_timer = 0;
3810 if (ring->queued < IWN_TX_RING_LOMARK)
3811 sc->qfullmsk &= ~(1 << ring->qid);
3813 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
3817 * Process an INT_FH_RX or INT_SW_RX interrupt.
3820 iwn_notif_intr(struct iwn_softc *sc)
3822 struct iwn_ops *ops = &sc->ops;
3823 struct ieee80211com *ic = &sc->sc_ic;
3824 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
3827 bus_dmamap_sync(sc->rxq.stat_dma.tag, sc->rxq.stat_dma.map,
3828 BUS_DMASYNC_POSTREAD);
3830 hw = le16toh(sc->rxq.stat->closed_count) & 0xfff;
3831 while (sc->rxq.cur != hw) {
3832 struct iwn_rx_data *data = &sc->rxq.data[sc->rxq.cur];
3833 struct iwn_rx_desc *desc;
3835 bus_dmamap_sync(sc->rxq.data_dmat, data->map,
3836 BUS_DMASYNC_POSTREAD);
3837 desc = mtod(data->m, struct iwn_rx_desc *);
3839 DPRINTF(sc, IWN_DEBUG_RECV,
3840 "%s: cur=%d; qid %x idx %d flags %x type %d(%s) len %d\n",
3841 __func__, sc->rxq.cur, desc->qid & 0xf, desc->idx, desc->flags,
3842 desc->type, iwn_intr_str(desc->type),
3843 le16toh(desc->len));
3845 if (!(desc->qid & IWN_UNSOLICITED_RX_NOTIF)) /* Reply to a command. */
3846 iwn_cmd_done(sc, desc);
3848 switch (desc->type) {
3850 iwn_rx_phy(sc, desc, data);
3853 case IWN_RX_DONE: /* 4965AGN only. */
3854 case IWN_MPDU_RX_DONE:
3855 /* An 802.11 frame has been received. */
3856 iwn_rx_done(sc, desc, data);
3859 case IWN_RX_COMPRESSED_BA:
3860 /* A Compressed BlockAck has been received. */
3861 iwn_rx_compressed_ba(sc, desc, data);
3865 /* An 802.11 frame has been transmitted. */
3866 ops->tx_done(sc, desc, data);
3869 case IWN_RX_STATISTICS:
3870 case IWN_BEACON_STATISTICS:
3871 iwn_rx_statistics(sc, desc, data);
3874 case IWN_BEACON_MISSED:
3876 struct iwn_beacon_missed *miss =
3877 (struct iwn_beacon_missed *)(desc + 1);
3880 bus_dmamap_sync(sc->rxq.data_dmat, data->map,
3881 BUS_DMASYNC_POSTREAD);
3882 misses = le32toh(miss->consecutive);
3884 DPRINTF(sc, IWN_DEBUG_STATE,
3885 "%s: beacons missed %d/%d\n", __func__,
3886 misses, le32toh(miss->total));
3888 * If more than 5 consecutive beacons are missed,
3889 * reinitialize the sensitivity state machine.
3891 if (vap->iv_state == IEEE80211_S_RUN &&
3892 (ic->ic_flags & IEEE80211_F_SCAN) == 0) {
3894 (void)iwn_init_sensitivity(sc);
3895 if (misses >= vap->iv_bmissthreshold) {
3897 ieee80211_beacon_miss(ic);
3905 struct iwn_ucode_info *uc =
3906 (struct iwn_ucode_info *)(desc + 1);
3908 /* The microcontroller is ready. */
3909 bus_dmamap_sync(sc->rxq.data_dmat, data->map,
3910 BUS_DMASYNC_POSTREAD);
3911 DPRINTF(sc, IWN_DEBUG_RESET,
3912 "microcode alive notification version=%d.%d "
3913 "subtype=%x alive=%x\n", uc->major, uc->minor,
3914 uc->subtype, le32toh(uc->valid));
3916 if (le32toh(uc->valid) != 1) {
3917 device_printf(sc->sc_dev,
3918 "microcontroller initialization failed");
3921 if (uc->subtype == IWN_UCODE_INIT) {
3922 /* Save microcontroller report. */
3923 memcpy(&sc->ucode_info, uc, sizeof (*uc));
3925 /* Save the address of the error log in SRAM. */
3926 sc->errptr = le32toh(uc->errptr);
3929 case IWN_STATE_CHANGED:
3932 * State change allows hardware switch change to be
3933 * noted. However, we handle this in iwn_intr as we
3934 * get both the enable/disble intr.
3936 bus_dmamap_sync(sc->rxq.data_dmat, data->map,
3937 BUS_DMASYNC_POSTREAD);
3939 uint32_t *status = (uint32_t *)(desc + 1);
3940 DPRINTF(sc, IWN_DEBUG_INTR | IWN_DEBUG_STATE,
3941 "state changed to %x\n",
3946 case IWN_START_SCAN:
3948 bus_dmamap_sync(sc->rxq.data_dmat, data->map,
3949 BUS_DMASYNC_POSTREAD);
3951 struct iwn_start_scan *scan =
3952 (struct iwn_start_scan *)(desc + 1);
3953 DPRINTF(sc, IWN_DEBUG_ANY,
3954 "%s: scanning channel %d status %x\n",
3955 __func__, scan->chan, le32toh(scan->status));
3961 bus_dmamap_sync(sc->rxq.data_dmat, data->map,
3962 BUS_DMASYNC_POSTREAD);
3964 struct iwn_stop_scan *scan =
3965 (struct iwn_stop_scan *)(desc + 1);
3966 DPRINTF(sc, IWN_DEBUG_STATE | IWN_DEBUG_SCAN,
3967 "scan finished nchan=%d status=%d chan=%d\n",
3968 scan->nchan, scan->status, scan->chan);
3970 sc->sc_is_scanning = 0;
3971 callout_stop(&sc->scan_timeout);
3973 ieee80211_scan_next(vap);
3977 case IWN5000_CALIBRATION_RESULT:
3978 iwn5000_rx_calib_results(sc, desc, data);
3981 case IWN5000_CALIBRATION_DONE:
3982 sc->sc_flags |= IWN_FLAG_CALIB_DONE;
3987 sc->rxq.cur = (sc->rxq.cur + 1) % IWN_RX_RING_COUNT;
3990 /* Tell the firmware what we have processed. */
3991 hw = (hw == 0) ? IWN_RX_RING_COUNT - 1 : hw - 1;
3992 IWN_WRITE(sc, IWN_FH_RX_WPTR, hw & ~7);
3996 * Process an INT_WAKEUP interrupt raised when the microcontroller wakes up
3997 * from power-down sleep mode.
4000 iwn_wakeup_intr(struct iwn_softc *sc)
4004 DPRINTF(sc, IWN_DEBUG_RESET, "%s: ucode wakeup from power-down sleep\n",
4007 /* Wakeup RX and TX rings. */
4008 IWN_WRITE(sc, IWN_FH_RX_WPTR, sc->rxq.cur & ~7);
4009 for (qid = 0; qid < sc->ntxqs; qid++) {
4010 struct iwn_tx_ring *ring = &sc->txq[qid];
4011 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | ring->cur);
4016 iwn_rftoggle_intr(struct iwn_softc *sc)
4018 struct ieee80211com *ic = &sc->sc_ic;
4019 uint32_t tmp = IWN_READ(sc, IWN_GP_CNTRL);
4021 IWN_LOCK_ASSERT(sc);
4023 device_printf(sc->sc_dev, "RF switch: radio %s\n",
4024 (tmp & IWN_GP_CNTRL_RFKILL) ? "enabled" : "disabled");
4025 if (tmp & IWN_GP_CNTRL_RFKILL)
4026 ieee80211_runtask(ic, &sc->sc_radioon_task);
4028 ieee80211_runtask(ic, &sc->sc_radiooff_task);
4032 * Dump the error log of the firmware when a firmware panic occurs. Although
4033 * we can't debug the firmware because it is neither open source nor free, it
4034 * can help us to identify certain classes of problems.
4037 iwn_fatal_intr(struct iwn_softc *sc)
4039 struct iwn_fw_dump dump;
4042 IWN_LOCK_ASSERT(sc);
4044 /* Force a complete recalibration on next init. */
4045 sc->sc_flags &= ~IWN_FLAG_CALIB_DONE;
4047 /* Check that the error log address is valid. */
4048 if (sc->errptr < IWN_FW_DATA_BASE ||
4049 sc->errptr + sizeof (dump) >
4050 IWN_FW_DATA_BASE + sc->fw_data_maxsz) {
4051 printf("%s: bad firmware error log address 0x%08x\n", __func__,
4055 if (iwn_nic_lock(sc) != 0) {
4056 printf("%s: could not read firmware error log\n", __func__);
4059 /* Read firmware error log from SRAM. */
4060 iwn_mem_read_region_4(sc, sc->errptr, (uint32_t *)&dump,
4061 sizeof (dump) / sizeof (uint32_t));
4064 if (dump.valid == 0) {
4065 printf("%s: firmware error log is empty\n", __func__);
4068 printf("firmware error log:\n");
4069 printf(" error type = \"%s\" (0x%08X)\n",
4070 (dump.id < nitems(iwn_fw_errmsg)) ?
4071 iwn_fw_errmsg[dump.id] : "UNKNOWN",
4073 printf(" program counter = 0x%08X\n", dump.pc);
4074 printf(" source line = 0x%08X\n", dump.src_line);
4075 printf(" error data = 0x%08X%08X\n",
4076 dump.error_data[0], dump.error_data[1]);
4077 printf(" branch link = 0x%08X%08X\n",
4078 dump.branch_link[0], dump.branch_link[1]);
4079 printf(" interrupt link = 0x%08X%08X\n",
4080 dump.interrupt_link[0], dump.interrupt_link[1]);
4081 printf(" time = %u\n", dump.time[0]);
4083 /* Dump driver status (TX and RX rings) while we're here. */
4084 printf("driver status:\n");
4085 for (i = 0; i < sc->ntxqs; i++) {
4086 struct iwn_tx_ring *ring = &sc->txq[i];
4087 printf(" tx ring %2d: qid=%-2d cur=%-3d queued=%-3d\n",
4088 i, ring->qid, ring->cur, ring->queued);
4090 printf(" rx ring: cur=%d\n", sc->rxq.cur);
4096 struct iwn_softc *sc = arg;
4097 uint32_t r1, r2, tmp;
4101 /* Disable interrupts. */
4102 IWN_WRITE(sc, IWN_INT_MASK, 0);
4104 /* Read interrupts from ICT (fast) or from registers (slow). */
4105 if (sc->sc_flags & IWN_FLAG_USE_ICT) {
4106 bus_dmamap_sync(sc->ict_dma.tag, sc->ict_dma.map,
4107 BUS_DMASYNC_POSTREAD);
4109 while (sc->ict[sc->ict_cur] != 0) {
4110 tmp |= sc->ict[sc->ict_cur];
4111 sc->ict[sc->ict_cur] = 0; /* Acknowledge. */
4112 sc->ict_cur = (sc->ict_cur + 1) % IWN_ICT_COUNT;
4115 if (tmp == 0xffffffff) /* Shouldn't happen. */
4117 else if (tmp & 0xc0000) /* Workaround a HW bug. */
4119 r1 = (tmp & 0xff00) << 16 | (tmp & 0xff);
4120 r2 = 0; /* Unused. */
4122 r1 = IWN_READ(sc, IWN_INT);
4123 if (r1 == 0xffffffff || (r1 & 0xfffffff0) == 0xa5a5a5a0) {
4125 return; /* Hardware gone! */
4127 r2 = IWN_READ(sc, IWN_FH_INT);
4130 DPRINTF(sc, IWN_DEBUG_INTR, "interrupt reg1=0x%08x reg2=0x%08x\n"
4133 if (r1 == 0 && r2 == 0)
4134 goto done; /* Interrupt not for us. */
4136 /* Acknowledge interrupts. */
4137 IWN_WRITE(sc, IWN_INT, r1);
4138 if (!(sc->sc_flags & IWN_FLAG_USE_ICT))
4139 IWN_WRITE(sc, IWN_FH_INT, r2);
4141 if (r1 & IWN_INT_RF_TOGGLED) {
4142 iwn_rftoggle_intr(sc);
4145 if (r1 & IWN_INT_CT_REACHED) {
4146 device_printf(sc->sc_dev, "%s: critical temperature reached!\n",
4149 if (r1 & (IWN_INT_SW_ERR | IWN_INT_HW_ERR)) {
4150 device_printf(sc->sc_dev, "%s: fatal firmware error\n",
4153 iwn_debug_register(sc);
4155 /* Dump firmware error log and stop. */
4158 taskqueue_enqueue(sc->sc_tq, &sc->sc_panic_task);
4161 if ((r1 & (IWN_INT_FH_RX | IWN_INT_SW_RX | IWN_INT_RX_PERIODIC)) ||
4162 (r2 & IWN_FH_INT_RX)) {
4163 if (sc->sc_flags & IWN_FLAG_USE_ICT) {
4164 if (r1 & (IWN_INT_FH_RX | IWN_INT_SW_RX))
4165 IWN_WRITE(sc, IWN_FH_INT, IWN_FH_INT_RX);
4166 IWN_WRITE_1(sc, IWN_INT_PERIODIC,
4167 IWN_INT_PERIODIC_DIS);
4169 if (r1 & (IWN_INT_FH_RX | IWN_INT_SW_RX)) {
4170 IWN_WRITE_1(sc, IWN_INT_PERIODIC,
4171 IWN_INT_PERIODIC_ENA);
4177 if ((r1 & IWN_INT_FH_TX) || (r2 & IWN_FH_INT_TX)) {
4178 if (sc->sc_flags & IWN_FLAG_USE_ICT)
4179 IWN_WRITE(sc, IWN_FH_INT, IWN_FH_INT_TX);
4180 wakeup(sc); /* FH DMA transfer completed. */
4183 if (r1 & IWN_INT_ALIVE)
4184 wakeup(sc); /* Firmware is alive. */
4186 if (r1 & IWN_INT_WAKEUP)
4187 iwn_wakeup_intr(sc);
4190 /* Re-enable interrupts. */
4191 if (sc->sc_flags & IWN_FLAG_RUNNING)
4192 IWN_WRITE(sc, IWN_INT_MASK, sc->int_mask);
4198 * Update TX scheduler ring when transmitting an 802.11 frame (4965AGN and
4199 * 5000 adapters use a slightly different format).
4202 iwn4965_update_sched(struct iwn_softc *sc, int qid, int idx, uint8_t id,
4205 uint16_t *w = &sc->sched[qid * IWN4965_SCHED_COUNT + idx];
4207 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
4209 *w = htole16(len + 8);
4210 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
4211 BUS_DMASYNC_PREWRITE);
4212 if (idx < IWN_SCHED_WINSZ) {
4213 *(w + IWN_TX_RING_COUNT) = *w;
4214 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
4215 BUS_DMASYNC_PREWRITE);
4220 iwn5000_update_sched(struct iwn_softc *sc, int qid, int idx, uint8_t id,
4223 uint16_t *w = &sc->sched[qid * IWN5000_SCHED_COUNT + idx];
4225 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
4227 *w = htole16(id << 12 | (len + 8));
4228 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
4229 BUS_DMASYNC_PREWRITE);
4230 if (idx < IWN_SCHED_WINSZ) {
4231 *(w + IWN_TX_RING_COUNT) = *w;
4232 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
4233 BUS_DMASYNC_PREWRITE);
4239 iwn5000_reset_sched(struct iwn_softc *sc, int qid, int idx)
4241 uint16_t *w = &sc->sched[qid * IWN5000_SCHED_COUNT + idx];
4243 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
4245 *w = (*w & htole16(0xf000)) | htole16(1);
4246 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
4247 BUS_DMASYNC_PREWRITE);
4248 if (idx < IWN_SCHED_WINSZ) {
4249 *(w + IWN_TX_RING_COUNT) = *w;
4250 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
4251 BUS_DMASYNC_PREWRITE);
4257 * Check whether OFDM 11g protection will be enabled for the given rate.
4259 * The original driver code only enabled protection for OFDM rates.
4260 * It didn't check to see whether it was operating in 11a or 11bg mode.
4263 iwn_check_rate_needs_protection(struct iwn_softc *sc,
4264 struct ieee80211vap *vap, uint8_t rate)
4266 struct ieee80211com *ic = vap->iv_ic;
4269 * Not in 2GHz mode? Then there's no need to enable OFDM
4272 if (! IEEE80211_IS_CHAN_2GHZ(ic->ic_curchan)) {
4277 * 11bg protection not enabled? Then don't use it.
4279 if ((ic->ic_flags & IEEE80211_F_USEPROT) == 0)
4283 * If it's an 11n rate - no protection.
4284 * We'll do it via a specific 11n check.
4286 if (rate & IEEE80211_RATE_MCS) {
4291 * Do a rate table lookup. If the PHY is CCK,
4292 * don't do protection.
4294 if (ieee80211_rate2phytype(ic->ic_rt, rate) == IEEE80211_T_CCK)
4298 * Yup, enable protection.
4304 * return a value between 0 and IWN_MAX_TX_RETRIES-1 as an index into
4305 * the link quality table that reflects this particular entry.
4308 iwn_tx_rate_to_linkq_offset(struct iwn_softc *sc, struct ieee80211_node *ni,
4311 struct ieee80211_rateset *rs;
4318 * Figure out if we're using 11n or not here.
4320 if (IEEE80211_IS_CHAN_HT(ni->ni_chan) && ni->ni_htrates.rs_nrates > 0)
4326 * Use the correct rate table.
4329 rs = (struct ieee80211_rateset *) &ni->ni_htrates;
4330 nr = ni->ni_htrates.rs_nrates;
4337 * Find the relevant link quality entry in the table.
4339 for (i = 0; i < nr && i < IWN_MAX_TX_RETRIES - 1 ; i++) {
4341 * The link quality table index starts at 0 == highest
4342 * rate, so we walk the rate table backwards.
4344 cmp_rate = rs->rs_rates[(nr - 1) - i];
4345 if (rate & IEEE80211_RATE_MCS)
4346 cmp_rate |= IEEE80211_RATE_MCS;
4349 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: idx %d: nr=%d, rate=0x%02x, rateentry=0x%02x\n",
4357 if (cmp_rate == rate)
4361 /* Failed? Start at the end */
4362 return (IWN_MAX_TX_RETRIES - 1);
4366 iwn_tx_data(struct iwn_softc *sc, struct mbuf *m, struct ieee80211_node *ni)
4368 struct iwn_ops *ops = &sc->ops;
4369 const struct ieee80211_txparam *tp;
4370 struct ieee80211vap *vap = ni->ni_vap;
4371 struct ieee80211com *ic = ni->ni_ic;
4372 struct iwn_node *wn = (void *)ni;
4373 struct iwn_tx_ring *ring;
4374 struct iwn_tx_desc *desc;
4375 struct iwn_tx_data *data;
4376 struct iwn_tx_cmd *cmd;
4377 struct iwn_cmd_data *tx;
4378 struct ieee80211_frame *wh;
4379 struct ieee80211_key *k = NULL;
4384 bus_dma_segment_t *seg, segs[IWN_MAX_SCATTER];
4386 int ac, i, totlen, error, pad, nsegs = 0, rate;
4388 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
4390 IWN_LOCK_ASSERT(sc);
4392 wh = mtod(m, struct ieee80211_frame *);
4393 hdrlen = ieee80211_anyhdrsize(wh);
4394 type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK;
4396 /* Select EDCA Access Category and TX ring for this frame. */
4397 if (IEEE80211_QOS_HAS_SEQ(wh)) {
4398 qos = ((const struct ieee80211_qosframe *)wh)->i_qos[0];
4399 tid = qos & IEEE80211_QOS_TID;
4404 ac = M_WME_GETAC(m);
4407 * XXX TODO: Group addressed frames aren't aggregated and must
4408 * go to the normal non-aggregation queue, and have a NONQOS TID
4409 * assigned from net80211.
4412 if (m->m_flags & M_AMPDU_MPDU) {
4414 struct ieee80211_tx_ampdu *tap = &ni->ni_tx_ampdu[ac];
4416 if (!IEEE80211_AMPDU_RUNNING(tap)) {
4421 * Queue this frame to the hardware ring that we've
4422 * negotiated AMPDU TX on.
4424 * Note that the sequence number must match the TX slot
4427 ac = *(int *)tap->txa_private;
4428 seqno = ni->ni_txseqs[tid];
4429 *(uint16_t *)wh->i_seq =
4430 htole16(seqno << IEEE80211_SEQ_SEQ_SHIFT);
4431 ring = &sc->txq[ac];
4432 if ((seqno % 256) != ring->cur) {
4433 device_printf(sc->sc_dev,
4434 "%s: m=%p: seqno (%d) (%d) != ring index (%d) !\n",
4441 ni->ni_txseqs[tid]++;
4443 ring = &sc->txq[ac];
4444 desc = &ring->desc[ring->cur];
4445 data = &ring->data[ring->cur];
4447 /* Choose a TX rate index. */
4448 tp = &vap->iv_txparms[ieee80211_chan2mode(ni->ni_chan)];
4449 if (type == IEEE80211_FC0_TYPE_MGT)
4450 rate = tp->mgmtrate;
4451 else if (IEEE80211_IS_MULTICAST(wh->i_addr1))
4452 rate = tp->mcastrate;
4453 else if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE)
4454 rate = tp->ucastrate;
4455 else if (m->m_flags & M_EAPOL)
4456 rate = tp->mgmtrate;
4458 /* XXX pass pktlen */
4459 (void) ieee80211_ratectl_rate(ni, NULL, 0);
4460 rate = ni->ni_txrate;
4463 /* Encrypt the frame if need be. */
4464 if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) {
4465 /* Retrieve key for TX. */
4466 k = ieee80211_crypto_encap(ni, m);
4470 /* 802.11 header may have moved. */
4471 wh = mtod(m, struct ieee80211_frame *);
4473 totlen = m->m_pkthdr.len;
4475 if (ieee80211_radiotap_active_vap(vap)) {
4476 struct iwn_tx_radiotap_header *tap = &sc->sc_txtap;
4479 tap->wt_rate = rate;
4481 tap->wt_flags |= IEEE80211_RADIOTAP_F_WEP;
4483 ieee80211_radiotap_tx(vap, m);
4486 /* Prepare TX firmware command. */
4487 cmd = &ring->cmd[ring->cur];
4488 cmd->code = IWN_CMD_TX_DATA;
4490 cmd->qid = ring->qid;
4491 cmd->idx = ring->cur;
4493 tx = (struct iwn_cmd_data *)cmd->data;
4494 /* NB: No need to clear tx, all fields are reinitialized here. */
4495 tx->scratch = 0; /* clear "scratch" area */
4498 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
4499 /* Unicast frame, check if an ACK is expected. */
4500 if (!qos || (qos & IEEE80211_QOS_ACKPOLICY) !=
4501 IEEE80211_QOS_ACKPOLICY_NOACK)
4502 flags |= IWN_TX_NEED_ACK;
4505 (IEEE80211_FC0_TYPE_MASK | IEEE80211_FC0_SUBTYPE_MASK)) ==
4506 (IEEE80211_FC0_TYPE_CTL | IEEE80211_FC0_SUBTYPE_BAR))
4507 flags |= IWN_TX_IMM_BA; /* Cannot happen yet. */
4509 if (wh->i_fc[1] & IEEE80211_FC1_MORE_FRAG)
4510 flags |= IWN_TX_MORE_FRAG; /* Cannot happen yet. */
4512 /* Check if frame must be protected using RTS/CTS or CTS-to-self. */
4513 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
4514 /* NB: Group frames are sent using CCK in 802.11b/g. */
4515 if (totlen + IEEE80211_CRC_LEN > vap->iv_rtsthreshold) {
4516 flags |= IWN_TX_NEED_RTS;
4517 } else if (iwn_check_rate_needs_protection(sc, vap, rate)) {
4518 if (ic->ic_protmode == IEEE80211_PROT_CTSONLY)
4519 flags |= IWN_TX_NEED_CTS;
4520 else if (ic->ic_protmode == IEEE80211_PROT_RTSCTS)
4521 flags |= IWN_TX_NEED_RTS;
4522 } else if ((rate & IEEE80211_RATE_MCS) &&
4523 (ic->ic_htprotmode == IEEE80211_PROT_RTSCTS)) {
4524 flags |= IWN_TX_NEED_RTS;
4527 /* XXX HT protection? */
4529 if (flags & (IWN_TX_NEED_RTS | IWN_TX_NEED_CTS)) {
4530 if (sc->hw_type != IWN_HW_REV_TYPE_4965) {
4531 /* 5000 autoselects RTS/CTS or CTS-to-self. */
4532 flags &= ~(IWN_TX_NEED_RTS | IWN_TX_NEED_CTS);
4533 flags |= IWN_TX_NEED_PROTECTION;
4535 flags |= IWN_TX_FULL_TXOP;
4539 if (IEEE80211_IS_MULTICAST(wh->i_addr1) ||
4540 type != IEEE80211_FC0_TYPE_DATA)
4541 tx->id = sc->broadcast_id;
4545 if (type == IEEE80211_FC0_TYPE_MGT) {
4546 uint8_t subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
4548 /* Tell HW to set timestamp in probe responses. */
4549 if (subtype == IEEE80211_FC0_SUBTYPE_PROBE_RESP)
4550 flags |= IWN_TX_INSERT_TSTAMP;
4551 if (subtype == IEEE80211_FC0_SUBTYPE_ASSOC_REQ ||
4552 subtype == IEEE80211_FC0_SUBTYPE_REASSOC_REQ)
4553 tx->timeout = htole16(3);
4555 tx->timeout = htole16(2);
4557 tx->timeout = htole16(0);
4560 /* First segment length must be a multiple of 4. */
4561 flags |= IWN_TX_NEED_PADDING;
4562 pad = 4 - (hdrlen & 3);
4566 tx->len = htole16(totlen);
4568 tx->rts_ntries = 60;
4569 tx->data_ntries = 15;
4570 tx->lifetime = htole32(IWN_LIFETIME_INFINITE);
4571 tx->rate = iwn_rate_to_plcp(sc, ni, rate);
4572 if (tx->id == sc->broadcast_id) {
4573 /* Group or management frame. */
4576 tx->linkq = iwn_tx_rate_to_linkq_offset(sc, ni, rate);
4577 flags |= IWN_TX_LINKQ; /* enable MRR */
4580 /* Set physical address of "scratch area". */
4581 tx->loaddr = htole32(IWN_LOADDR(data->scratch_paddr));
4582 tx->hiaddr = IWN_HIADDR(data->scratch_paddr);
4584 /* Copy 802.11 header in TX command. */
4585 memcpy((uint8_t *)(tx + 1), wh, hdrlen);
4587 /* Trim 802.11 header. */
4590 tx->flags = htole32(flags);
4592 error = bus_dmamap_load_mbuf_sg(ring->data_dmat, data->map, m, segs,
4593 &nsegs, BUS_DMA_NOWAIT);
4595 if (error != EFBIG) {
4596 device_printf(sc->sc_dev,
4597 "%s: can't map mbuf (error %d)\n", __func__, error);
4600 /* Too many DMA segments, linearize mbuf. */
4601 m1 = m_collapse(m, M_NOWAIT, IWN_MAX_SCATTER - 1);
4603 device_printf(sc->sc_dev,
4604 "%s: could not defrag mbuf\n", __func__);
4609 error = bus_dmamap_load_mbuf_sg(ring->data_dmat, data->map, m,
4610 segs, &nsegs, BUS_DMA_NOWAIT);
4612 device_printf(sc->sc_dev,
4613 "%s: can't map mbuf (error %d)\n", __func__, error);
4621 DPRINTF(sc, IWN_DEBUG_XMIT,
4622 "%s: qid %d idx %d len %d nsegs %d flags 0x%08x rate 0x%04x plcp 0x%08x\n",
4632 /* Fill TX descriptor. */
4635 desc->nsegs += nsegs;
4636 /* First DMA segment is used by the TX command. */
4637 desc->segs[0].addr = htole32(IWN_LOADDR(data->cmd_paddr));
4638 desc->segs[0].len = htole16(IWN_HIADDR(data->cmd_paddr) |
4639 (4 + sizeof (*tx) + hdrlen + pad) << 4);
4640 /* Other DMA segments are for data payload. */
4642 for (i = 1; i <= nsegs; i++) {
4643 desc->segs[i].addr = htole32(IWN_LOADDR(seg->ds_addr));
4644 desc->segs[i].len = htole16(IWN_HIADDR(seg->ds_addr) |
4649 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_PREWRITE);
4650 bus_dmamap_sync(ring->cmd_dma.tag, ring->cmd_dma.map,
4651 BUS_DMASYNC_PREWRITE);
4652 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
4653 BUS_DMASYNC_PREWRITE);
4655 /* Update TX scheduler. */
4656 if (ring->qid >= sc->firstaggqueue)
4657 ops->update_sched(sc, ring->qid, ring->cur, tx->id, totlen);
4660 ring->cur = (ring->cur + 1) % IWN_TX_RING_COUNT;
4661 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, ring->qid << 8 | ring->cur);
4663 /* Mark TX ring as full if we reach a certain threshold. */
4664 if (++ring->queued > IWN_TX_RING_HIMARK)
4665 sc->qfullmsk |= 1 << ring->qid;
4667 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
4673 iwn_tx_data_raw(struct iwn_softc *sc, struct mbuf *m,
4674 struct ieee80211_node *ni, const struct ieee80211_bpf_params *params)
4676 struct iwn_ops *ops = &sc->ops;
4677 struct ieee80211vap *vap = ni->ni_vap;
4678 struct iwn_tx_cmd *cmd;
4679 struct iwn_cmd_data *tx;
4680 struct ieee80211_frame *wh;
4681 struct iwn_tx_ring *ring;
4682 struct iwn_tx_desc *desc;
4683 struct iwn_tx_data *data;
4685 bus_dma_segment_t *seg, segs[IWN_MAX_SCATTER];
4688 int ac, totlen, error, pad, nsegs = 0, i, rate;
4691 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
4693 IWN_LOCK_ASSERT(sc);
4695 wh = mtod(m, struct ieee80211_frame *);
4696 hdrlen = ieee80211_anyhdrsize(wh);
4697 type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK;
4699 ac = params->ibp_pri & 3;
4701 ring = &sc->txq[ac];
4702 desc = &ring->desc[ring->cur];
4703 data = &ring->data[ring->cur];
4705 /* Choose a TX rate. */
4706 rate = params->ibp_rate0;
4707 totlen = m->m_pkthdr.len;
4709 /* Prepare TX firmware command. */
4710 cmd = &ring->cmd[ring->cur];
4711 cmd->code = IWN_CMD_TX_DATA;
4713 cmd->qid = ring->qid;
4714 cmd->idx = ring->cur;
4716 tx = (struct iwn_cmd_data *)cmd->data;
4717 /* NB: No need to clear tx, all fields are reinitialized here. */
4718 tx->scratch = 0; /* clear "scratch" area */
4721 if ((params->ibp_flags & IEEE80211_BPF_NOACK) == 0)
4722 flags |= IWN_TX_NEED_ACK;
4723 if (params->ibp_flags & IEEE80211_BPF_RTS) {
4724 if (sc->hw_type != IWN_HW_REV_TYPE_4965) {
4725 /* 5000 autoselects RTS/CTS or CTS-to-self. */
4726 flags &= ~IWN_TX_NEED_RTS;
4727 flags |= IWN_TX_NEED_PROTECTION;
4729 flags |= IWN_TX_NEED_RTS | IWN_TX_FULL_TXOP;
4731 if (params->ibp_flags & IEEE80211_BPF_CTS) {
4732 if (sc->hw_type != IWN_HW_REV_TYPE_4965) {
4733 /* 5000 autoselects RTS/CTS or CTS-to-self. */
4734 flags &= ~IWN_TX_NEED_CTS;
4735 flags |= IWN_TX_NEED_PROTECTION;
4737 flags |= IWN_TX_NEED_CTS | IWN_TX_FULL_TXOP;
4739 if (type == IEEE80211_FC0_TYPE_MGT) {
4740 uint8_t subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
4742 /* Tell HW to set timestamp in probe responses. */
4743 if (subtype == IEEE80211_FC0_SUBTYPE_PROBE_RESP)
4744 flags |= IWN_TX_INSERT_TSTAMP;
4746 if (subtype == IEEE80211_FC0_SUBTYPE_ASSOC_REQ ||
4747 subtype == IEEE80211_FC0_SUBTYPE_REASSOC_REQ)
4748 tx->timeout = htole16(3);
4750 tx->timeout = htole16(2);
4752 tx->timeout = htole16(0);
4755 /* First segment length must be a multiple of 4. */
4756 flags |= IWN_TX_NEED_PADDING;
4757 pad = 4 - (hdrlen & 3);
4761 if (ieee80211_radiotap_active_vap(vap)) {
4762 struct iwn_tx_radiotap_header *tap = &sc->sc_txtap;
4765 tap->wt_rate = rate;
4767 ieee80211_radiotap_tx(vap, m);
4770 tx->len = htole16(totlen);
4772 tx->id = sc->broadcast_id;
4773 tx->rts_ntries = params->ibp_try1;
4774 tx->data_ntries = params->ibp_try0;
4775 tx->lifetime = htole32(IWN_LIFETIME_INFINITE);
4776 tx->rate = iwn_rate_to_plcp(sc, ni, rate);
4778 /* Group or management frame. */
4781 /* Set physical address of "scratch area". */
4782 tx->loaddr = htole32(IWN_LOADDR(data->scratch_paddr));
4783 tx->hiaddr = IWN_HIADDR(data->scratch_paddr);
4785 /* Copy 802.11 header in TX command. */
4786 memcpy((uint8_t *)(tx + 1), wh, hdrlen);
4788 /* Trim 802.11 header. */
4791 tx->flags = htole32(flags);
4793 error = bus_dmamap_load_mbuf_sg(ring->data_dmat, data->map, m, segs,
4794 &nsegs, BUS_DMA_NOWAIT);
4796 if (error != EFBIG) {
4797 device_printf(sc->sc_dev,
4798 "%s: can't map mbuf (error %d)\n", __func__, error);
4801 /* Too many DMA segments, linearize mbuf. */
4802 m1 = m_collapse(m, M_NOWAIT, IWN_MAX_SCATTER - 1);
4804 device_printf(sc->sc_dev,
4805 "%s: could not defrag mbuf\n", __func__);
4810 error = bus_dmamap_load_mbuf_sg(ring->data_dmat, data->map, m,
4811 segs, &nsegs, BUS_DMA_NOWAIT);
4813 device_printf(sc->sc_dev,
4814 "%s: can't map mbuf (error %d)\n", __func__, error);
4822 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: qid %d idx %d len %d nsegs %d\n",
4823 __func__, ring->qid, ring->cur, m->m_pkthdr.len, nsegs);
4825 /* Fill TX descriptor. */
4828 desc->nsegs += nsegs;
4829 /* First DMA segment is used by the TX command. */
4830 desc->segs[0].addr = htole32(IWN_LOADDR(data->cmd_paddr));
4831 desc->segs[0].len = htole16(IWN_HIADDR(data->cmd_paddr) |
4832 (4 + sizeof (*tx) + hdrlen + pad) << 4);
4833 /* Other DMA segments are for data payload. */
4835 for (i = 1; i <= nsegs; i++) {
4836 desc->segs[i].addr = htole32(IWN_LOADDR(seg->ds_addr));
4837 desc->segs[i].len = htole16(IWN_HIADDR(seg->ds_addr) |
4842 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_PREWRITE);
4843 bus_dmamap_sync(ring->cmd_dma.tag, ring->cmd_dma.map,
4844 BUS_DMASYNC_PREWRITE);
4845 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
4846 BUS_DMASYNC_PREWRITE);
4848 /* Update TX scheduler. */
4849 if (ring->qid >= sc->firstaggqueue)
4850 ops->update_sched(sc, ring->qid, ring->cur, tx->id, totlen);
4853 ring->cur = (ring->cur + 1) % IWN_TX_RING_COUNT;
4854 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, ring->qid << 8 | ring->cur);
4856 /* Mark TX ring as full if we reach a certain threshold. */
4857 if (++ring->queued > IWN_TX_RING_HIMARK)
4858 sc->qfullmsk |= 1 << ring->qid;
4860 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
4866 iwn_xmit_task(void *arg0, int pending)
4868 struct iwn_softc *sc = arg0;
4869 struct ieee80211_node *ni;
4872 struct ieee80211_bpf_params p;
4875 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: called\n", __func__);
4879 * Dequeue frames, attempt to transmit,
4880 * then disable beaconwait when we're done.
4882 while ((m = mbufq_dequeue(&sc->sc_xmit_queue)) != NULL) {
4884 ni = (struct ieee80211_node *)m->m_pkthdr.rcvif;
4886 /* Get xmit params if appropriate */
4887 if (ieee80211_get_xmit_params(m, &p) == 0)
4890 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: m=%p, have_p=%d\n",
4891 __func__, m, have_p);
4893 /* If we have xmit params, use them */
4895 error = iwn_tx_data_raw(sc, m, ni, &p);
4897 error = iwn_tx_data(sc, m, ni);
4900 if_inc_counter(ni->ni_vap->iv_ifp,
4901 IFCOUNTER_OERRORS, 1);
4902 ieee80211_free_node(ni);
4907 sc->sc_beacon_wait = 0;
4912 * raw frame xmit - free node/reference if failed.
4915 iwn_raw_xmit(struct ieee80211_node *ni, struct mbuf *m,
4916 const struct ieee80211_bpf_params *params)
4918 struct ieee80211com *ic = ni->ni_ic;
4919 struct iwn_softc *sc = ic->ic_softc;
4922 DPRINTF(sc, IWN_DEBUG_XMIT | IWN_DEBUG_TRACE, "->%s begin\n", __func__);
4925 if ((sc->sc_flags & IWN_FLAG_RUNNING) == 0) {
4931 /* queue frame if we have to */
4932 if (sc->sc_beacon_wait) {
4933 if (iwn_xmit_queue_enqueue(sc, m) != 0) {
4938 /* Queued, so just return OK */
4943 if (params == NULL) {
4945 * Legacy path; interpret frame contents to decide
4946 * precisely how to send the frame.
4948 error = iwn_tx_data(sc, m, ni);
4951 * Caller supplied explicit parameters to use in
4952 * sending the frame.
4954 error = iwn_tx_data_raw(sc, m, ni, params);
4957 sc->sc_tx_timer = 5;
4963 DPRINTF(sc, IWN_DEBUG_TRACE | IWN_DEBUG_XMIT, "->%s: end\n",__func__);
4969 * transmit - don't free mbuf if failed; don't free node ref if failed.
4972 iwn_transmit(struct ieee80211com *ic, struct mbuf *m)
4974 struct iwn_softc *sc = ic->ic_softc;
4975 struct ieee80211_node *ni;
4978 ni = (struct ieee80211_node *)m->m_pkthdr.rcvif;
4981 if ((sc->sc_flags & IWN_FLAG_RUNNING) == 0 || sc->sc_beacon_wait) {
4991 error = iwn_tx_data(sc, m, ni);
4993 sc->sc_tx_timer = 5;
4999 iwn_scan_timeout(void *arg)
5001 struct iwn_softc *sc = arg;
5002 struct ieee80211com *ic = &sc->sc_ic;
5004 ic_printf(ic, "scan timeout\n");
5005 ieee80211_restart_all(ic);
5009 iwn_watchdog(void *arg)
5011 struct iwn_softc *sc = arg;
5012 struct ieee80211com *ic = &sc->sc_ic;
5014 IWN_LOCK_ASSERT(sc);
5016 KASSERT(sc->sc_flags & IWN_FLAG_RUNNING, ("not running"));
5018 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5020 if (sc->sc_tx_timer > 0) {
5021 if (--sc->sc_tx_timer == 0) {
5022 ic_printf(ic, "device timeout\n");
5023 ieee80211_restart_all(ic);
5027 callout_reset(&sc->watchdog_to, hz, iwn_watchdog, sc);
5031 iwn_cdev_open(struct cdev *dev, int flags, int type, struct thread *td)
5038 iwn_cdev_close(struct cdev *dev, int flags, int type, struct thread *td)
5045 iwn_cdev_ioctl(struct cdev *dev, unsigned long cmd, caddr_t data, int fflag,
5049 struct iwn_softc *sc = dev->si_drv1;
5050 struct iwn_ioctl_data *d;
5052 rc = priv_check(td, PRIV_DRIVER);
5058 d = (struct iwn_ioctl_data *) data;
5060 /* XXX validate permissions/memory/etc? */
5061 rc = copyout(&sc->last_stat, d->dst_addr, sizeof(struct iwn_stats));
5066 memset(&sc->last_stat, 0, sizeof(struct iwn_stats));
5077 iwn_ioctl(struct ieee80211com *ic, u_long cmd, void *data)
5084 iwn_parent(struct ieee80211com *ic)
5086 struct iwn_softc *sc = ic->ic_softc;
5087 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
5088 int startall = 0, stop = 0;
5091 if (ic->ic_nrunning > 0) {
5092 if (!(sc->sc_flags & IWN_FLAG_RUNNING)) {
5093 iwn_init_locked(sc);
5094 if (IWN_READ(sc, IWN_GP_CNTRL) & IWN_GP_CNTRL_RFKILL)
5099 } else if (sc->sc_flags & IWN_FLAG_RUNNING)
5100 iwn_stop_locked(sc);
5103 ieee80211_start_all(ic);
5104 else if (vap != NULL && stop)
5105 ieee80211_stop(vap);
5109 * Send a command to the firmware.
5112 iwn_cmd(struct iwn_softc *sc, int code, const void *buf, int size, int async)
5114 struct iwn_tx_ring *ring;
5115 struct iwn_tx_desc *desc;
5116 struct iwn_tx_data *data;
5117 struct iwn_tx_cmd *cmd;
5123 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
5126 IWN_LOCK_ASSERT(sc);
5128 if (sc->sc_flags & IWN_FLAG_PAN_SUPPORT)
5129 cmd_queue_num = IWN_PAN_CMD_QUEUE;
5131 cmd_queue_num = IWN_CMD_QUEUE_NUM;
5133 ring = &sc->txq[cmd_queue_num];
5134 desc = &ring->desc[ring->cur];
5135 data = &ring->data[ring->cur];
5138 if (size > sizeof cmd->data) {
5139 /* Command is too large to fit in a descriptor. */
5140 if (totlen > MCLBYTES)
5142 m = m_getjcl(M_NOWAIT, MT_DATA, M_PKTHDR, MJUMPAGESIZE);
5145 cmd = mtod(m, struct iwn_tx_cmd *);
5146 error = bus_dmamap_load(ring->data_dmat, data->map, cmd,
5147 totlen, iwn_dma_map_addr, &paddr, BUS_DMA_NOWAIT);
5154 cmd = &ring->cmd[ring->cur];
5155 paddr = data->cmd_paddr;
5160 cmd->qid = ring->qid;
5161 cmd->idx = ring->cur;
5162 memcpy(cmd->data, buf, size);
5165 desc->segs[0].addr = htole32(IWN_LOADDR(paddr));
5166 desc->segs[0].len = htole16(IWN_HIADDR(paddr) | totlen << 4);
5168 DPRINTF(sc, IWN_DEBUG_CMD, "%s: %s (0x%x) flags %d qid %d idx %d\n",
5169 __func__, iwn_intr_str(cmd->code), cmd->code,
5170 cmd->flags, cmd->qid, cmd->idx);
5172 if (size > sizeof cmd->data) {
5173 bus_dmamap_sync(ring->data_dmat, data->map,
5174 BUS_DMASYNC_PREWRITE);
5176 bus_dmamap_sync(ring->cmd_dma.tag, ring->cmd_dma.map,
5177 BUS_DMASYNC_PREWRITE);
5179 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
5180 BUS_DMASYNC_PREWRITE);
5182 /* Kick command ring. */
5183 ring->cur = (ring->cur + 1) % IWN_TX_RING_COUNT;
5184 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, ring->qid << 8 | ring->cur);
5186 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
5188 return async ? 0 : msleep(desc, &sc->sc_mtx, PCATCH, "iwncmd", hz);
5192 iwn4965_add_node(struct iwn_softc *sc, struct iwn_node_info *node, int async)
5194 struct iwn4965_node_info hnode;
5197 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5200 * We use the node structure for 5000 Series internally (it is
5201 * a superset of the one for 4965AGN). We thus copy the common
5202 * fields before sending the command.
5204 src = (caddr_t)node;
5205 dst = (caddr_t)&hnode;
5206 memcpy(dst, src, 48);
5207 /* Skip TSC, RX MIC and TX MIC fields from ``src''. */
5208 memcpy(dst + 48, src + 72, 20);
5209 return iwn_cmd(sc, IWN_CMD_ADD_NODE, &hnode, sizeof hnode, async);
5213 iwn5000_add_node(struct iwn_softc *sc, struct iwn_node_info *node, int async)
5216 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5218 /* Direct mapping. */
5219 return iwn_cmd(sc, IWN_CMD_ADD_NODE, node, sizeof (*node), async);
5223 iwn_set_link_quality(struct iwn_softc *sc, struct ieee80211_node *ni)
5225 struct iwn_node *wn = (void *)ni;
5226 struct ieee80211_rateset *rs;
5227 struct iwn_cmd_link_quality linkq;
5228 int i, rate, txrate;
5231 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
5233 memset(&linkq, 0, sizeof linkq);
5235 linkq.antmsk_1stream = iwn_get_1stream_tx_antmask(sc);
5236 linkq.antmsk_2stream = iwn_get_2stream_tx_antmask(sc);
5238 linkq.ampdu_max = 32; /* XXX negotiated? */
5239 linkq.ampdu_threshold = 3;
5240 linkq.ampdu_limit = htole16(4000); /* 4ms */
5242 DPRINTF(sc, IWN_DEBUG_XMIT,
5243 "%s: 1stream antenna=0x%02x, 2stream antenna=0x%02x, ntxstreams=%d\n",
5245 linkq.antmsk_1stream,
5246 linkq.antmsk_2stream,
5250 * Are we using 11n rates? Ensure the channel is
5251 * 11n _and_ we have some 11n rates, or don't
5254 if (IEEE80211_IS_CHAN_HT(ni->ni_chan) && ni->ni_htrates.rs_nrates > 0) {
5255 rs = (struct ieee80211_rateset *) &ni->ni_htrates;
5262 /* Start at highest available bit-rate. */
5264 * XXX this is all very dirty!
5267 txrate = ni->ni_htrates.rs_nrates - 1;
5269 txrate = rs->rs_nrates - 1;
5270 for (i = 0; i < IWN_MAX_TX_RETRIES; i++) {
5274 * XXX TODO: ensure the last two slots are the two lowest
5275 * rate entries, just for now.
5277 if (i == 14 || i == 15)
5281 rate = IEEE80211_RATE_MCS | rs->rs_rates[txrate];
5283 rate = IEEE80211_RV(rs->rs_rates[txrate]);
5285 /* Do rate -> PLCP config mapping */
5286 plcp = iwn_rate_to_plcp(sc, ni, rate);
5287 linkq.retry[i] = plcp;
5288 DPRINTF(sc, IWN_DEBUG_XMIT,
5289 "%s: i=%d, txrate=%d, rate=0x%02x, plcp=0x%08x\n",
5297 * The mimo field is an index into the table which
5298 * indicates the first index where it and subsequent entries
5299 * will not be using MIMO.
5301 * Since we're filling linkq from 0..15 and we're filling
5302 * from the highest MCS rates to the lowest rates, if we
5303 * _are_ doing a dual-stream rate, set mimo to idx+1 (ie,
5304 * the next entry.) That way if the next entry is a non-MIMO
5305 * entry, we're already pointing at it.
5307 if ((le32toh(plcp) & IWN_RFLAG_MCS) &&
5308 IEEE80211_RV(le32toh(plcp)) > 7)
5311 /* Next retry at immediate lower bit-rate. */
5316 * If we reached the end of the list and indeed we hit
5317 * all MIMO rates (eg 5300 doing MCS23-15) then yes,
5318 * set mimo to 15. Setting it to 16 panics the firmware.
5320 if (linkq.mimo > 15)
5323 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: mimo = %d\n", __func__, linkq.mimo);
5325 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
5327 return iwn_cmd(sc, IWN_CMD_LINK_QUALITY, &linkq, sizeof linkq, 1);
5331 * Broadcast node is used to send group-addressed and management frames.
5334 iwn_add_broadcast_node(struct iwn_softc *sc, int async)
5336 struct iwn_ops *ops = &sc->ops;
5337 struct ieee80211com *ic = &sc->sc_ic;
5338 struct iwn_node_info node;
5339 struct iwn_cmd_link_quality linkq;
5343 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
5345 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX];
5347 memset(&node, 0, sizeof node);
5348 IEEE80211_ADDR_COPY(node.macaddr, ieee80211broadcastaddr);
5349 node.id = sc->broadcast_id;
5350 DPRINTF(sc, IWN_DEBUG_RESET, "%s: adding broadcast node\n", __func__);
5351 if ((error = ops->add_node(sc, &node, async)) != 0)
5354 /* Use the first valid TX antenna. */
5355 txant = IWN_LSB(sc->txchainmask);
5357 memset(&linkq, 0, sizeof linkq);
5358 linkq.id = sc->broadcast_id;
5359 linkq.antmsk_1stream = iwn_get_1stream_tx_antmask(sc);
5360 linkq.antmsk_2stream = iwn_get_2stream_tx_antmask(sc);
5361 linkq.ampdu_max = 64;
5362 linkq.ampdu_threshold = 3;
5363 linkq.ampdu_limit = htole16(4000); /* 4ms */
5365 /* Use lowest mandatory bit-rate. */
5366 /* XXX rate table lookup? */
5367 if (IEEE80211_IS_CHAN_5GHZ(ic->ic_curchan))
5368 linkq.retry[0] = htole32(0xd);
5370 linkq.retry[0] = htole32(10 | IWN_RFLAG_CCK);
5371 linkq.retry[0] |= htole32(IWN_RFLAG_ANT(txant));
5372 /* Use same bit-rate for all TX retries. */
5373 for (i = 1; i < IWN_MAX_TX_RETRIES; i++) {
5374 linkq.retry[i] = linkq.retry[0];
5377 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
5379 return iwn_cmd(sc, IWN_CMD_LINK_QUALITY, &linkq, sizeof linkq, async);
5383 iwn_updateedca(struct ieee80211com *ic)
5385 #define IWN_EXP2(x) ((1 << (x)) - 1) /* CWmin = 2^ECWmin - 1 */
5386 struct iwn_softc *sc = ic->ic_softc;
5387 struct iwn_edca_params cmd;
5390 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
5392 memset(&cmd, 0, sizeof cmd);
5393 cmd.flags = htole32(IWN_EDCA_UPDATE);
5396 for (aci = 0; aci < WME_NUM_AC; aci++) {
5397 const struct wmeParams *ac =
5398 &ic->ic_wme.wme_chanParams.cap_wmeParams[aci];
5399 cmd.ac[aci].aifsn = ac->wmep_aifsn;
5400 cmd.ac[aci].cwmin = htole16(IWN_EXP2(ac->wmep_logcwmin));
5401 cmd.ac[aci].cwmax = htole16(IWN_EXP2(ac->wmep_logcwmax));
5402 cmd.ac[aci].txoplimit =
5403 htole16(IEEE80211_TXOP_TO_US(ac->wmep_txopLimit));
5405 IEEE80211_UNLOCK(ic);
5408 (void)iwn_cmd(sc, IWN_CMD_EDCA_PARAMS, &cmd, sizeof cmd, 1);
5411 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
5418 iwn_update_mcast(struct ieee80211com *ic)
5424 iwn_set_led(struct iwn_softc *sc, uint8_t which, uint8_t off, uint8_t on)
5426 struct iwn_cmd_led led;
5428 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5431 /* XXX don't set LEDs during scan? */
5432 if (sc->sc_is_scanning)
5436 /* Clear microcode LED ownership. */
5437 IWN_CLRBITS(sc, IWN_LED, IWN_LED_BSM_CTRL);
5440 led.unit = htole32(10000); /* on/off in unit of 100ms */
5443 (void)iwn_cmd(sc, IWN_CMD_SET_LED, &led, sizeof led, 1);
5447 * Set the critical temperature at which the firmware will stop the radio
5451 iwn_set_critical_temp(struct iwn_softc *sc)
5453 struct iwn_critical_temp crit;
5456 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5458 IWN_WRITE(sc, IWN_UCODE_GP1_CLR, IWN_UCODE_GP1_CTEMP_STOP_RF);
5460 if (sc->hw_type == IWN_HW_REV_TYPE_5150)
5461 temp = (IWN_CTOK(110) - sc->temp_off) * -5;
5462 else if (sc->hw_type == IWN_HW_REV_TYPE_4965)
5463 temp = IWN_CTOK(110);
5466 memset(&crit, 0, sizeof crit);
5467 crit.tempR = htole32(temp);
5468 DPRINTF(sc, IWN_DEBUG_RESET, "setting critical temp to %d\n", temp);
5469 return iwn_cmd(sc, IWN_CMD_SET_CRITICAL_TEMP, &crit, sizeof crit, 0);
5473 iwn_set_timing(struct iwn_softc *sc, struct ieee80211_node *ni)
5475 struct iwn_cmd_timing cmd;
5478 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5480 memset(&cmd, 0, sizeof cmd);
5481 memcpy(&cmd.tstamp, ni->ni_tstamp.data, sizeof (uint64_t));
5482 cmd.bintval = htole16(ni->ni_intval);
5483 cmd.lintval = htole16(10);
5485 /* Compute remaining time until next beacon. */
5486 val = (uint64_t)ni->ni_intval * IEEE80211_DUR_TU;
5487 mod = le64toh(cmd.tstamp) % val;
5488 cmd.binitval = htole32((uint32_t)(val - mod));
5490 DPRINTF(sc, IWN_DEBUG_RESET, "timing bintval=%u tstamp=%ju, init=%u\n",
5491 ni->ni_intval, le64toh(cmd.tstamp), (uint32_t)(val - mod));
5493 return iwn_cmd(sc, IWN_CMD_TIMING, &cmd, sizeof cmd, 1);
5497 iwn4965_power_calibration(struct iwn_softc *sc, int temp)
5499 struct ieee80211com *ic = &sc->sc_ic;
5501 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5503 /* Adjust TX power if need be (delta >= 3 degC). */
5504 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: temperature %d->%d\n",
5505 __func__, sc->temp, temp);
5506 if (abs(temp - sc->temp) >= 3) {
5507 /* Record temperature of last calibration. */
5509 (void)iwn4965_set_txpower(sc, ic->ic_bsschan, 1);
5514 * Set TX power for current channel (each rate has its own power settings).
5515 * This function takes into account the regulatory information from EEPROM,
5516 * the current temperature and the current voltage.
5519 iwn4965_set_txpower(struct iwn_softc *sc, struct ieee80211_channel *ch,
5522 /* Fixed-point arithmetic division using a n-bit fractional part. */
5523 #define fdivround(a, b, n) \
5524 ((((1 << n) * (a)) / (b) + (1 << n) / 2) / (1 << n))
5525 /* Linear interpolation. */
5526 #define interpolate(x, x1, y1, x2, y2, n) \
5527 ((y1) + fdivround(((int)(x) - (x1)) * ((y2) - (y1)), (x2) - (x1), n))
5529 static const int tdiv[IWN_NATTEN_GROUPS] = { 9, 8, 8, 8, 6 };
5530 struct iwn_ucode_info *uc = &sc->ucode_info;
5531 struct iwn4965_cmd_txpower cmd;
5532 struct iwn4965_eeprom_chan_samples *chans;
5533 const uint8_t *rf_gain, *dsp_gain;
5534 int32_t vdiff, tdiff;
5535 int i, c, grp, maxpwr;
5538 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX];
5539 /* Retrieve current channel from last RXON. */
5540 chan = sc->rxon->chan;
5541 DPRINTF(sc, IWN_DEBUG_RESET, "setting TX power for channel %d\n",
5544 memset(&cmd, 0, sizeof cmd);
5545 cmd.band = IEEE80211_IS_CHAN_5GHZ(ch) ? 0 : 1;
5548 if (IEEE80211_IS_CHAN_5GHZ(ch)) {
5549 maxpwr = sc->maxpwr5GHz;
5550 rf_gain = iwn4965_rf_gain_5ghz;
5551 dsp_gain = iwn4965_dsp_gain_5ghz;
5553 maxpwr = sc->maxpwr2GHz;
5554 rf_gain = iwn4965_rf_gain_2ghz;
5555 dsp_gain = iwn4965_dsp_gain_2ghz;
5558 /* Compute voltage compensation. */
5559 vdiff = ((int32_t)le32toh(uc->volt) - sc->eeprom_voltage) / 7;
5564 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
5565 "%s: voltage compensation=%d (UCODE=%d, EEPROM=%d)\n",
5566 __func__, vdiff, le32toh(uc->volt), sc->eeprom_voltage);
5568 /* Get channel attenuation group. */
5569 if (chan <= 20) /* 1-20 */
5571 else if (chan <= 43) /* 34-43 */
5573 else if (chan <= 70) /* 44-70 */
5575 else if (chan <= 124) /* 71-124 */
5579 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
5580 "%s: chan %d, attenuation group=%d\n", __func__, chan, grp);
5582 /* Get channel sub-band. */
5583 for (i = 0; i < IWN_NBANDS; i++)
5584 if (sc->bands[i].lo != 0 &&
5585 sc->bands[i].lo <= chan && chan <= sc->bands[i].hi)
5587 if (i == IWN_NBANDS) /* Can't happen in real-life. */
5589 chans = sc->bands[i].chans;
5590 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
5591 "%s: chan %d sub-band=%d\n", __func__, chan, i);
5593 for (c = 0; c < 2; c++) {
5594 uint8_t power, gain, temp;
5595 int maxchpwr, pwr, ridx, idx;
5597 power = interpolate(chan,
5598 chans[0].num, chans[0].samples[c][1].power,
5599 chans[1].num, chans[1].samples[c][1].power, 1);
5600 gain = interpolate(chan,
5601 chans[0].num, chans[0].samples[c][1].gain,
5602 chans[1].num, chans[1].samples[c][1].gain, 1);
5603 temp = interpolate(chan,
5604 chans[0].num, chans[0].samples[c][1].temp,
5605 chans[1].num, chans[1].samples[c][1].temp, 1);
5606 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
5607 "%s: Tx chain %d: power=%d gain=%d temp=%d\n",
5608 __func__, c, power, gain, temp);
5610 /* Compute temperature compensation. */
5611 tdiff = ((sc->temp - temp) * 2) / tdiv[grp];
5612 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
5613 "%s: temperature compensation=%d (current=%d, EEPROM=%d)\n",
5614 __func__, tdiff, sc->temp, temp);
5616 for (ridx = 0; ridx <= IWN_RIDX_MAX; ridx++) {
5617 /* Convert dBm to half-dBm. */
5618 maxchpwr = sc->maxpwr[chan] * 2;
5620 maxchpwr -= 6; /* MIMO 2T: -3dB */
5624 /* Adjust TX power based on rate. */
5625 if ((ridx % 8) == 5)
5626 pwr -= 15; /* OFDM48: -7.5dB */
5627 else if ((ridx % 8) == 6)
5628 pwr -= 17; /* OFDM54: -8.5dB */
5629 else if ((ridx % 8) == 7)
5630 pwr -= 20; /* OFDM60: -10dB */
5632 pwr -= 10; /* Others: -5dB */
5634 /* Do not exceed channel max TX power. */
5638 idx = gain - (pwr - power) - tdiff - vdiff;
5639 if ((ridx / 8) & 1) /* MIMO */
5640 idx += (int32_t)le32toh(uc->atten[grp][c]);
5643 idx += 9; /* 5GHz */
5644 if (ridx == IWN_RIDX_MAX)
5647 /* Make sure idx stays in a valid range. */
5650 else if (idx > IWN4965_MAX_PWR_INDEX)
5651 idx = IWN4965_MAX_PWR_INDEX;
5653 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
5654 "%s: Tx chain %d, rate idx %d: power=%d\n",
5655 __func__, c, ridx, idx);
5656 cmd.power[ridx].rf_gain[c] = rf_gain[idx];
5657 cmd.power[ridx].dsp_gain[c] = dsp_gain[idx];
5661 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
5662 "%s: set tx power for chan %d\n", __func__, chan);
5663 return iwn_cmd(sc, IWN_CMD_TXPOWER, &cmd, sizeof cmd, async);
5670 iwn5000_set_txpower(struct iwn_softc *sc, struct ieee80211_channel *ch,
5673 struct iwn5000_cmd_txpower cmd;
5676 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5679 * TX power calibration is handled automatically by the firmware
5682 memset(&cmd, 0, sizeof cmd);
5683 cmd.global_limit = 2 * IWN5000_TXPOWER_MAX_DBM; /* 16 dBm */
5684 cmd.flags = IWN5000_TXPOWER_NO_CLOSED;
5685 cmd.srv_limit = IWN5000_TXPOWER_AUTO;
5686 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_XMIT,
5687 "%s: setting TX power; rev=%d\n",
5689 IWN_UCODE_API(sc->ucode_rev));
5690 if (IWN_UCODE_API(sc->ucode_rev) == 1)
5691 cmdid = IWN_CMD_TXPOWER_DBM_V1;
5693 cmdid = IWN_CMD_TXPOWER_DBM;
5694 return iwn_cmd(sc, cmdid, &cmd, sizeof cmd, async);
5698 * Retrieve the maximum RSSI (in dBm) among receivers.
5701 iwn4965_get_rssi(struct iwn_softc *sc, struct iwn_rx_stat *stat)
5703 struct iwn4965_rx_phystat *phy = (void *)stat->phybuf;
5707 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5709 mask = (le16toh(phy->antenna) >> 4) & IWN_ANT_ABC;
5710 agc = (le16toh(phy->agc) >> 7) & 0x7f;
5713 if (mask & IWN_ANT_A)
5714 rssi = MAX(rssi, phy->rssi[0]);
5715 if (mask & IWN_ANT_B)
5716 rssi = MAX(rssi, phy->rssi[2]);
5717 if (mask & IWN_ANT_C)
5718 rssi = MAX(rssi, phy->rssi[4]);
5720 DPRINTF(sc, IWN_DEBUG_RECV,
5721 "%s: agc %d mask 0x%x rssi %d %d %d result %d\n", __func__, agc,
5722 mask, phy->rssi[0], phy->rssi[2], phy->rssi[4],
5723 rssi - agc - IWN_RSSI_TO_DBM);
5724 return rssi - agc - IWN_RSSI_TO_DBM;
5728 iwn5000_get_rssi(struct iwn_softc *sc, struct iwn_rx_stat *stat)
5730 struct iwn5000_rx_phystat *phy = (void *)stat->phybuf;
5734 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5736 agc = (le32toh(phy->agc) >> 9) & 0x7f;
5738 rssi = MAX(le16toh(phy->rssi[0]) & 0xff,
5739 le16toh(phy->rssi[1]) & 0xff);
5740 rssi = MAX(le16toh(phy->rssi[2]) & 0xff, rssi);
5742 DPRINTF(sc, IWN_DEBUG_RECV,
5743 "%s: agc %d rssi %d %d %d result %d\n", __func__, agc,
5744 phy->rssi[0], phy->rssi[1], phy->rssi[2],
5745 rssi - agc - IWN_RSSI_TO_DBM);
5746 return rssi - agc - IWN_RSSI_TO_DBM;
5750 * Retrieve the average noise (in dBm) among receivers.
5753 iwn_get_noise(const struct iwn_rx_general_stats *stats)
5755 int i, total, nbant, noise;
5758 for (i = 0; i < 3; i++) {
5759 if ((noise = le32toh(stats->noise[i]) & 0xff) == 0)
5764 /* There should be at least one antenna but check anyway. */
5765 return (nbant == 0) ? -127 : (total / nbant) - 107;
5769 * Compute temperature (in degC) from last received statistics.
5772 iwn4965_get_temperature(struct iwn_softc *sc)
5774 struct iwn_ucode_info *uc = &sc->ucode_info;
5775 int32_t r1, r2, r3, r4, temp;
5777 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5779 r1 = le32toh(uc->temp[0].chan20MHz);
5780 r2 = le32toh(uc->temp[1].chan20MHz);
5781 r3 = le32toh(uc->temp[2].chan20MHz);
5782 r4 = le32toh(sc->rawtemp);
5784 if (r1 == r3) /* Prevents division by 0 (should not happen). */
5787 /* Sign-extend 23-bit R4 value to 32-bit. */
5788 r4 = ((r4 & 0xffffff) ^ 0x800000) - 0x800000;
5789 /* Compute temperature in Kelvin. */
5790 temp = (259 * (r4 - r2)) / (r3 - r1);
5791 temp = (temp * 97) / 100 + 8;
5793 DPRINTF(sc, IWN_DEBUG_ANY, "temperature %dK/%dC\n", temp,
5795 return IWN_KTOC(temp);
5799 iwn5000_get_temperature(struct iwn_softc *sc)
5803 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5806 * Temperature is not used by the driver for 5000 Series because
5807 * TX power calibration is handled by firmware.
5809 temp = le32toh(sc->rawtemp);
5810 if (sc->hw_type == IWN_HW_REV_TYPE_5150) {
5811 temp = (temp / -5) + sc->temp_off;
5812 temp = IWN_KTOC(temp);
5818 * Initialize sensitivity calibration state machine.
5821 iwn_init_sensitivity(struct iwn_softc *sc)
5823 struct iwn_ops *ops = &sc->ops;
5824 struct iwn_calib_state *calib = &sc->calib;
5828 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5830 /* Reset calibration state machine. */
5831 memset(calib, 0, sizeof (*calib));
5832 calib->state = IWN_CALIB_STATE_INIT;
5833 calib->cck_state = IWN_CCK_STATE_HIFA;
5834 /* Set initial correlation values. */
5835 calib->ofdm_x1 = sc->limits->min_ofdm_x1;
5836 calib->ofdm_mrc_x1 = sc->limits->min_ofdm_mrc_x1;
5837 calib->ofdm_x4 = sc->limits->min_ofdm_x4;
5838 calib->ofdm_mrc_x4 = sc->limits->min_ofdm_mrc_x4;
5839 calib->cck_x4 = 125;
5840 calib->cck_mrc_x4 = sc->limits->min_cck_mrc_x4;
5841 calib->energy_cck = sc->limits->energy_cck;
5843 /* Write initial sensitivity. */
5844 if ((error = iwn_send_sensitivity(sc)) != 0)
5847 /* Write initial gains. */
5848 if ((error = ops->init_gains(sc)) != 0)
5851 /* Request statistics at each beacon interval. */
5853 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: sending request for statistics\n",
5855 return iwn_cmd(sc, IWN_CMD_GET_STATISTICS, &flags, sizeof flags, 1);
5859 * Collect noise and RSSI statistics for the first 20 beacons received
5860 * after association and use them to determine connected antennas and
5861 * to set differential gains.
5864 iwn_collect_noise(struct iwn_softc *sc,
5865 const struct iwn_rx_general_stats *stats)
5867 struct iwn_ops *ops = &sc->ops;
5868 struct iwn_calib_state *calib = &sc->calib;
5869 struct ieee80211com *ic = &sc->sc_ic;
5873 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
5875 /* Accumulate RSSI and noise for all 3 antennas. */
5876 for (i = 0; i < 3; i++) {
5877 calib->rssi[i] += le32toh(stats->rssi[i]) & 0xff;
5878 calib->noise[i] += le32toh(stats->noise[i]) & 0xff;
5880 /* NB: We update differential gains only once after 20 beacons. */
5881 if (++calib->nbeacons < 20)
5884 /* Determine highest average RSSI. */
5885 val = MAX(calib->rssi[0], calib->rssi[1]);
5886 val = MAX(calib->rssi[2], val);
5888 /* Determine which antennas are connected. */
5889 sc->chainmask = sc->rxchainmask;
5890 for (i = 0; i < 3; i++)
5891 if (val - calib->rssi[i] > 15 * 20)
5892 sc->chainmask &= ~(1 << i);
5893 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_XMIT,
5894 "%s: RX chains mask: theoretical=0x%x, actual=0x%x\n",
5895 __func__, sc->rxchainmask, sc->chainmask);
5897 /* If none of the TX antennas are connected, keep at least one. */
5898 if ((sc->chainmask & sc->txchainmask) == 0)
5899 sc->chainmask |= IWN_LSB(sc->txchainmask);
5901 (void)ops->set_gains(sc);
5902 calib->state = IWN_CALIB_STATE_RUN;
5905 /* XXX Disable RX chains with no antennas connected. */
5906 sc->rxon->rxchain = htole16(IWN_RXCHAIN_SEL(sc->chainmask));
5907 if (sc->sc_is_scanning)
5908 device_printf(sc->sc_dev,
5909 "%s: is_scanning set, before RXON\n",
5911 (void)iwn_cmd(sc, IWN_CMD_RXON, sc->rxon, sc->rxonsz, 1);
5914 /* Enable power-saving mode if requested by user. */
5915 if (ic->ic_flags & IEEE80211_F_PMGTON)
5916 (void)iwn_set_pslevel(sc, 0, 3, 1);
5918 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
5923 iwn4965_init_gains(struct iwn_softc *sc)
5925 struct iwn_phy_calib_gain cmd;
5927 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5929 memset(&cmd, 0, sizeof cmd);
5930 cmd.code = IWN4965_PHY_CALIB_DIFF_GAIN;
5931 /* Differential gains initially set to 0 for all 3 antennas. */
5932 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
5933 "%s: setting initial differential gains\n", __func__);
5934 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 1);
5938 iwn5000_init_gains(struct iwn_softc *sc)
5940 struct iwn_phy_calib cmd;
5942 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5944 memset(&cmd, 0, sizeof cmd);
5945 cmd.code = sc->reset_noise_gain;
5948 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
5949 "%s: setting initial differential gains\n", __func__);
5950 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 1);
5954 iwn4965_set_gains(struct iwn_softc *sc)
5956 struct iwn_calib_state *calib = &sc->calib;
5957 struct iwn_phy_calib_gain cmd;
5958 int i, delta, noise;
5960 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5962 /* Get minimal noise among connected antennas. */
5963 noise = INT_MAX; /* NB: There's at least one antenna. */
5964 for (i = 0; i < 3; i++)
5965 if (sc->chainmask & (1 << i))
5966 noise = MIN(calib->noise[i], noise);
5968 memset(&cmd, 0, sizeof cmd);
5969 cmd.code = IWN4965_PHY_CALIB_DIFF_GAIN;
5970 /* Set differential gains for connected antennas. */
5971 for (i = 0; i < 3; i++) {
5972 if (sc->chainmask & (1 << i)) {
5973 /* Compute attenuation (in unit of 1.5dB). */
5974 delta = (noise - (int32_t)calib->noise[i]) / 30;
5975 /* NB: delta <= 0 */
5976 /* Limit to [-4.5dB,0]. */
5977 cmd.gain[i] = MIN(abs(delta), 3);
5979 cmd.gain[i] |= 1 << 2; /* sign bit */
5982 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
5983 "setting differential gains Ant A/B/C: %x/%x/%x (%x)\n",
5984 cmd.gain[0], cmd.gain[1], cmd.gain[2], sc->chainmask);
5985 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 1);
5989 iwn5000_set_gains(struct iwn_softc *sc)
5991 struct iwn_calib_state *calib = &sc->calib;
5992 struct iwn_phy_calib_gain cmd;
5993 int i, ant, div, delta;
5995 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5997 /* We collected 20 beacons and !=6050 need a 1.5 factor. */
5998 div = (sc->hw_type == IWN_HW_REV_TYPE_6050) ? 20 : 30;
6000 memset(&cmd, 0, sizeof cmd);
6001 cmd.code = sc->noise_gain;
6004 /* Get first available RX antenna as referential. */
6005 ant = IWN_LSB(sc->rxchainmask);
6006 /* Set differential gains for other antennas. */
6007 for (i = ant + 1; i < 3; i++) {
6008 if (sc->chainmask & (1 << i)) {
6009 /* The delta is relative to antenna "ant". */
6010 delta = ((int32_t)calib->noise[ant] -
6011 (int32_t)calib->noise[i]) / div;
6012 /* Limit to [-4.5dB,+4.5dB]. */
6013 cmd.gain[i - 1] = MIN(abs(delta), 3);
6015 cmd.gain[i - 1] |= 1 << 2; /* sign bit */
6018 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_XMIT,
6019 "setting differential gains Ant B/C: %x/%x (%x)\n",
6020 cmd.gain[0], cmd.gain[1], sc->chainmask);
6021 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 1);
6025 * Tune RF RX sensitivity based on the number of false alarms detected
6026 * during the last beacon period.
6029 iwn_tune_sensitivity(struct iwn_softc *sc, const struct iwn_rx_stats *stats)
6031 #define inc(val, inc, max) \
6032 if ((val) < (max)) { \
6033 if ((val) < (max) - (inc)) \
6039 #define dec(val, dec, min) \
6040 if ((val) > (min)) { \
6041 if ((val) > (min) + (dec)) \
6048 const struct iwn_sensitivity_limits *limits = sc->limits;
6049 struct iwn_calib_state *calib = &sc->calib;
6050 uint32_t val, rxena, fa;
6051 uint32_t energy[3], energy_min;
6052 uint8_t noise[3], noise_ref;
6053 int i, needs_update = 0;
6055 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
6057 /* Check that we've been enabled long enough. */
6058 if ((rxena = le32toh(stats->general.load)) == 0){
6059 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end not so long\n", __func__);
6063 /* Compute number of false alarms since last call for OFDM. */
6064 fa = le32toh(stats->ofdm.bad_plcp) - calib->bad_plcp_ofdm;
6065 fa += le32toh(stats->ofdm.fa) - calib->fa_ofdm;
6066 fa *= 200 * IEEE80211_DUR_TU; /* 200TU */
6068 if (fa > 50 * rxena) {
6069 /* High false alarm count, decrease sensitivity. */
6070 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
6071 "%s: OFDM high false alarm count: %u\n", __func__, fa);
6072 inc(calib->ofdm_x1, 1, limits->max_ofdm_x1);
6073 inc(calib->ofdm_mrc_x1, 1, limits->max_ofdm_mrc_x1);
6074 inc(calib->ofdm_x4, 1, limits->max_ofdm_x4);
6075 inc(calib->ofdm_mrc_x4, 1, limits->max_ofdm_mrc_x4);
6077 } else if (fa < 5 * rxena) {
6078 /* Low false alarm count, increase sensitivity. */
6079 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
6080 "%s: OFDM low false alarm count: %u\n", __func__, fa);
6081 dec(calib->ofdm_x1, 1, limits->min_ofdm_x1);
6082 dec(calib->ofdm_mrc_x1, 1, limits->min_ofdm_mrc_x1);
6083 dec(calib->ofdm_x4, 1, limits->min_ofdm_x4);
6084 dec(calib->ofdm_mrc_x4, 1, limits->min_ofdm_mrc_x4);
6087 /* Compute maximum noise among 3 receivers. */
6088 for (i = 0; i < 3; i++)
6089 noise[i] = (le32toh(stats->general.noise[i]) >> 8) & 0xff;
6090 val = MAX(noise[0], noise[1]);
6091 val = MAX(noise[2], val);
6092 /* Insert it into our samples table. */
6093 calib->noise_samples[calib->cur_noise_sample] = val;
6094 calib->cur_noise_sample = (calib->cur_noise_sample + 1) % 20;
6096 /* Compute maximum noise among last 20 samples. */
6097 noise_ref = calib->noise_samples[0];
6098 for (i = 1; i < 20; i++)
6099 noise_ref = MAX(noise_ref, calib->noise_samples[i]);
6101 /* Compute maximum energy among 3 receivers. */
6102 for (i = 0; i < 3; i++)
6103 energy[i] = le32toh(stats->general.energy[i]);
6104 val = MIN(energy[0], energy[1]);
6105 val = MIN(energy[2], val);
6106 /* Insert it into our samples table. */
6107 calib->energy_samples[calib->cur_energy_sample] = val;
6108 calib->cur_energy_sample = (calib->cur_energy_sample + 1) % 10;
6110 /* Compute minimum energy among last 10 samples. */
6111 energy_min = calib->energy_samples[0];
6112 for (i = 1; i < 10; i++)
6113 energy_min = MAX(energy_min, calib->energy_samples[i]);
6116 /* Compute number of false alarms since last call for CCK. */
6117 fa = le32toh(stats->cck.bad_plcp) - calib->bad_plcp_cck;
6118 fa += le32toh(stats->cck.fa) - calib->fa_cck;
6119 fa *= 200 * IEEE80211_DUR_TU; /* 200TU */
6121 if (fa > 50 * rxena) {
6122 /* High false alarm count, decrease sensitivity. */
6123 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
6124 "%s: CCK high false alarm count: %u\n", __func__, fa);
6125 calib->cck_state = IWN_CCK_STATE_HIFA;
6128 if (calib->cck_x4 > 160) {
6129 calib->noise_ref = noise_ref;
6130 if (calib->energy_cck > 2)
6131 dec(calib->energy_cck, 2, energy_min);
6133 if (calib->cck_x4 < 160) {
6134 calib->cck_x4 = 161;
6137 inc(calib->cck_x4, 3, limits->max_cck_x4);
6139 inc(calib->cck_mrc_x4, 3, limits->max_cck_mrc_x4);
6141 } else if (fa < 5 * rxena) {
6142 /* Low false alarm count, increase sensitivity. */
6143 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
6144 "%s: CCK low false alarm count: %u\n", __func__, fa);
6145 calib->cck_state = IWN_CCK_STATE_LOFA;
6148 if (calib->cck_state != IWN_CCK_STATE_INIT &&
6149 (((int32_t)calib->noise_ref - (int32_t)noise_ref) > 2 ||
6150 calib->low_fa > 100)) {
6151 inc(calib->energy_cck, 2, limits->min_energy_cck);
6152 dec(calib->cck_x4, 3, limits->min_cck_x4);
6153 dec(calib->cck_mrc_x4, 3, limits->min_cck_mrc_x4);
6156 /* Not worth to increase or decrease sensitivity. */
6157 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
6158 "%s: CCK normal false alarm count: %u\n", __func__, fa);
6160 calib->noise_ref = noise_ref;
6162 if (calib->cck_state == IWN_CCK_STATE_HIFA) {
6163 /* Previous interval had many false alarms. */
6164 dec(calib->energy_cck, 8, energy_min);
6166 calib->cck_state = IWN_CCK_STATE_INIT;
6170 (void)iwn_send_sensitivity(sc);
6172 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
6179 iwn_send_sensitivity(struct iwn_softc *sc)
6181 struct iwn_calib_state *calib = &sc->calib;
6182 struct iwn_enhanced_sensitivity_cmd cmd;
6185 memset(&cmd, 0, sizeof cmd);
6186 len = sizeof (struct iwn_sensitivity_cmd);
6187 cmd.which = IWN_SENSITIVITY_WORKTBL;
6188 /* OFDM modulation. */
6189 cmd.corr_ofdm_x1 = htole16(calib->ofdm_x1);
6190 cmd.corr_ofdm_mrc_x1 = htole16(calib->ofdm_mrc_x1);
6191 cmd.corr_ofdm_x4 = htole16(calib->ofdm_x4);
6192 cmd.corr_ofdm_mrc_x4 = htole16(calib->ofdm_mrc_x4);
6193 cmd.energy_ofdm = htole16(sc->limits->energy_ofdm);
6194 cmd.energy_ofdm_th = htole16(62);
6195 /* CCK modulation. */
6196 cmd.corr_cck_x4 = htole16(calib->cck_x4);
6197 cmd.corr_cck_mrc_x4 = htole16(calib->cck_mrc_x4);
6198 cmd.energy_cck = htole16(calib->energy_cck);
6199 /* Barker modulation: use default values. */
6200 cmd.corr_barker = htole16(190);
6201 cmd.corr_barker_mrc = htole16(sc->limits->barker_mrc);
6203 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
6204 "%s: set sensitivity %d/%d/%d/%d/%d/%d/%d\n", __func__,
6205 calib->ofdm_x1, calib->ofdm_mrc_x1, calib->ofdm_x4,
6206 calib->ofdm_mrc_x4, calib->cck_x4,
6207 calib->cck_mrc_x4, calib->energy_cck);
6209 if (!(sc->sc_flags & IWN_FLAG_ENH_SENS))
6211 /* Enhanced sensitivity settings. */
6212 len = sizeof (struct iwn_enhanced_sensitivity_cmd);
6213 cmd.ofdm_det_slope_mrc = htole16(668);
6214 cmd.ofdm_det_icept_mrc = htole16(4);
6215 cmd.ofdm_det_slope = htole16(486);
6216 cmd.ofdm_det_icept = htole16(37);
6217 cmd.cck_det_slope_mrc = htole16(853);
6218 cmd.cck_det_icept_mrc = htole16(4);
6219 cmd.cck_det_slope = htole16(476);
6220 cmd.cck_det_icept = htole16(99);
6222 return iwn_cmd(sc, IWN_CMD_SET_SENSITIVITY, &cmd, len, 1);
6226 * Look at the increase of PLCP errors over time; if it exceeds
6227 * a programmed threshold then trigger an RF retune.
6230 iwn_check_rx_recovery(struct iwn_softc *sc, struct iwn_stats *rs)
6232 int32_t delta_ofdm, delta_ht, delta_cck;
6233 struct iwn_calib_state *calib = &sc->calib;
6234 int delta_ticks, cur_ticks;
6239 * Calculate the difference between the current and
6240 * previous statistics.
6242 delta_cck = le32toh(rs->rx.cck.bad_plcp) - calib->bad_plcp_cck;
6243 delta_ofdm = le32toh(rs->rx.ofdm.bad_plcp) - calib->bad_plcp_ofdm;
6244 delta_ht = le32toh(rs->rx.ht.bad_plcp) - calib->bad_plcp_ht;
6247 * Calculate the delta in time between successive statistics
6248 * messages. Yes, it can roll over; so we make sure that
6249 * this doesn't happen.
6251 * XXX go figure out what to do about rollover
6252 * XXX go figure out what to do if ticks rolls over to -ve instead!
6253 * XXX go stab signed integer overflow undefined-ness in the face.
6256 delta_ticks = cur_ticks - sc->last_calib_ticks;
6259 * If any are negative, then the firmware likely reset; so just
6260 * bail. We'll pick this up next time.
6262 if (delta_cck < 0 || delta_ofdm < 0 || delta_ht < 0 || delta_ticks < 0)
6266 * delta_ticks is in ticks; we need to convert it up to milliseconds
6267 * so we can do some useful math with it.
6269 delta_msec = ticks_to_msecs(delta_ticks);
6272 * Calculate what our threshold is given the current delta_msec.
6274 thresh = sc->base_params->plcp_err_threshold * delta_msec;
6276 DPRINTF(sc, IWN_DEBUG_STATE,
6277 "%s: time delta: %d; cck=%d, ofdm=%d, ht=%d, total=%d, thresh=%d\n",
6283 (delta_msec + delta_cck + delta_ofdm + delta_ht),
6287 * If we need a retune, then schedule a single channel scan
6288 * to a channel that isn't the currently active one!
6290 * The math from linux iwlwifi:
6292 * if ((delta * 100 / msecs) > threshold)
6294 if (thresh > 0 && (delta_cck + delta_ofdm + delta_ht) * 100 > thresh) {
6295 DPRINTF(sc, IWN_DEBUG_ANY,
6296 "%s: PLCP error threshold raw (%d) comparison (%d) "
6297 "over limit (%d); retune!\n",
6299 (delta_cck + delta_ofdm + delta_ht),
6300 (delta_cck + delta_ofdm + delta_ht) * 100,
6306 * Set STA mode power saving level (between 0 and 5).
6307 * Level 0 is CAM (Continuously Aware Mode), 5 is for maximum power saving.
6310 iwn_set_pslevel(struct iwn_softc *sc, int dtim, int level, int async)
6312 struct iwn_pmgt_cmd cmd;
6313 const struct iwn_pmgt *pmgt;
6314 uint32_t max, skip_dtim;
6318 DPRINTF(sc, IWN_DEBUG_PWRSAVE,
6319 "%s: dtim=%d, level=%d, async=%d\n",
6325 /* Select which PS parameters to use. */
6327 pmgt = &iwn_pmgt[0][level];
6328 else if (dtim <= 10)
6329 pmgt = &iwn_pmgt[1][level];
6331 pmgt = &iwn_pmgt[2][level];
6333 memset(&cmd, 0, sizeof cmd);
6334 if (level != 0) /* not CAM */
6335 cmd.flags |= htole16(IWN_PS_ALLOW_SLEEP);
6337 cmd.flags |= htole16(IWN_PS_FAST_PD);
6338 /* Retrieve PCIe Active State Power Management (ASPM). */
6339 reg = pci_read_config(sc->sc_dev, sc->sc_cap_off + PCIER_LINK_CTL, 4);
6340 if (!(reg & PCIEM_LINK_CTL_ASPMC_L0S)) /* L0s Entry disabled. */
6341 cmd.flags |= htole16(IWN_PS_PCI_PMGT);
6342 cmd.rxtimeout = htole32(pmgt->rxtimeout * 1024);
6343 cmd.txtimeout = htole32(pmgt->txtimeout * 1024);
6349 skip_dtim = pmgt->skip_dtim;
6350 if (skip_dtim != 0) {
6351 cmd.flags |= htole16(IWN_PS_SLEEP_OVER_DTIM);
6352 max = pmgt->intval[4];
6353 if (max == (uint32_t)-1)
6354 max = dtim * (skip_dtim + 1);
6355 else if (max > dtim)
6356 max = rounddown(max, dtim);
6359 for (i = 0; i < 5; i++)
6360 cmd.intval[i] = htole32(MIN(max, pmgt->intval[i]));
6362 DPRINTF(sc, IWN_DEBUG_RESET, "setting power saving level to %d\n",
6364 return iwn_cmd(sc, IWN_CMD_SET_POWER_MODE, &cmd, sizeof cmd, async);
6368 iwn_send_btcoex(struct iwn_softc *sc)
6370 struct iwn_bluetooth cmd;
6372 memset(&cmd, 0, sizeof cmd);
6373 cmd.flags = IWN_BT_COEX_CHAN_ANN | IWN_BT_COEX_BT_PRIO;
6374 cmd.lead_time = IWN_BT_LEAD_TIME_DEF;
6375 cmd.max_kill = IWN_BT_MAX_KILL_DEF;
6376 DPRINTF(sc, IWN_DEBUG_RESET, "%s: configuring bluetooth coexistence\n",
6378 return iwn_cmd(sc, IWN_CMD_BT_COEX, &cmd, sizeof(cmd), 0);
6382 iwn_send_advanced_btcoex(struct iwn_softc *sc)
6384 static const uint32_t btcoex_3wire[12] = {
6385 0xaaaaaaaa, 0xaaaaaaaa, 0xaeaaaaaa, 0xaaaaaaaa,
6386 0xcc00ff28, 0x0000aaaa, 0xcc00aaaa, 0x0000aaaa,
6387 0xc0004000, 0x00004000, 0xf0005000, 0xf0005000,
6389 struct iwn6000_btcoex_config btconfig;
6390 struct iwn2000_btcoex_config btconfig2k;
6391 struct iwn_btcoex_priotable btprio;
6392 struct iwn_btcoex_prot btprot;
6396 memset(&btconfig, 0, sizeof btconfig);
6397 memset(&btconfig2k, 0, sizeof btconfig2k);
6399 flags = IWN_BT_FLAG_COEX6000_MODE_3W <<
6400 IWN_BT_FLAG_COEX6000_MODE_SHIFT; // Done as is in linux kernel 3.2
6402 if (sc->base_params->bt_sco_disable)
6403 flags &= ~IWN_BT_FLAG_SYNC_2_BT_DISABLE;
6405 flags |= IWN_BT_FLAG_SYNC_2_BT_DISABLE;
6407 flags |= IWN_BT_FLAG_COEX6000_CHAN_INHIBITION;
6409 /* Default flags result is 145 as old value */
6412 * Flags value has to be review. Values must change if we
6413 * which to disable it
6415 if (sc->base_params->bt_session_2) {
6416 btconfig2k.flags = flags;
6417 btconfig2k.max_kill = 5;
6418 btconfig2k.bt3_t7_timer = 1;
6419 btconfig2k.kill_ack = htole32(0xffff0000);
6420 btconfig2k.kill_cts = htole32(0xffff0000);
6421 btconfig2k.sample_time = 2;
6422 btconfig2k.bt3_t2_timer = 0xc;
6424 for (i = 0; i < 12; i++)
6425 btconfig2k.lookup_table[i] = htole32(btcoex_3wire[i]);
6426 btconfig2k.valid = htole16(0xff);
6427 btconfig2k.prio_boost = htole32(0xf0);
6428 DPRINTF(sc, IWN_DEBUG_RESET,
6429 "%s: configuring advanced bluetooth coexistence"
6430 " session 2, flags : 0x%x\n",
6433 error = iwn_cmd(sc, IWN_CMD_BT_COEX, &btconfig2k,
6434 sizeof(btconfig2k), 1);
6436 btconfig.flags = flags;
6437 btconfig.max_kill = 5;
6438 btconfig.bt3_t7_timer = 1;
6439 btconfig.kill_ack = htole32(0xffff0000);
6440 btconfig.kill_cts = htole32(0xffff0000);
6441 btconfig.sample_time = 2;
6442 btconfig.bt3_t2_timer = 0xc;
6444 for (i = 0; i < 12; i++)
6445 btconfig.lookup_table[i] = htole32(btcoex_3wire[i]);
6446 btconfig.valid = htole16(0xff);
6447 btconfig.prio_boost = 0xf0;
6448 DPRINTF(sc, IWN_DEBUG_RESET,
6449 "%s: configuring advanced bluetooth coexistence,"
6453 error = iwn_cmd(sc, IWN_CMD_BT_COEX, &btconfig,
6454 sizeof(btconfig), 1);
6460 memset(&btprio, 0, sizeof btprio);
6461 btprio.calib_init1 = 0x6;
6462 btprio.calib_init2 = 0x7;
6463 btprio.calib_periodic_low1 = 0x2;
6464 btprio.calib_periodic_low2 = 0x3;
6465 btprio.calib_periodic_high1 = 0x4;
6466 btprio.calib_periodic_high2 = 0x5;
6468 btprio.scan52 = 0x8;
6469 btprio.scan24 = 0xa;
6470 error = iwn_cmd(sc, IWN_CMD_BT_COEX_PRIOTABLE, &btprio, sizeof(btprio),
6475 /* Force BT state machine change. */
6476 memset(&btprot, 0, sizeof btprot);
6479 error = iwn_cmd(sc, IWN_CMD_BT_COEX_PROT, &btprot, sizeof(btprot), 1);
6483 return iwn_cmd(sc, IWN_CMD_BT_COEX_PROT, &btprot, sizeof(btprot), 1);
6487 iwn5000_runtime_calib(struct iwn_softc *sc)
6489 struct iwn5000_calib_config cmd;
6491 memset(&cmd, 0, sizeof cmd);
6492 cmd.ucode.once.enable = 0xffffffff;
6493 cmd.ucode.once.start = IWN5000_CALIB_DC;
6494 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
6495 "%s: configuring runtime calibration\n", __func__);
6496 return iwn_cmd(sc, IWN5000_CMD_CALIB_CONFIG, &cmd, sizeof(cmd), 0);
6500 iwn_get_rxon_ht_flags(struct iwn_softc *sc, struct ieee80211_channel *c)
6502 struct ieee80211com *ic = &sc->sc_ic;
6503 uint32_t htflags = 0;
6505 if (! IEEE80211_IS_CHAN_HT(c))
6508 htflags |= IWN_RXON_HT_PROTMODE(ic->ic_curhtprotmode);
6510 if (IEEE80211_IS_CHAN_HT40(c)) {
6511 switch (ic->ic_curhtprotmode) {
6512 case IEEE80211_HTINFO_OPMODE_HT20PR:
6513 htflags |= IWN_RXON_HT_MODEPURE40;
6516 htflags |= IWN_RXON_HT_MODEMIXED;
6520 if (IEEE80211_IS_CHAN_HT40D(c))
6521 htflags |= IWN_RXON_HT_HT40MINUS;
6527 iwn_config(struct iwn_softc *sc)
6529 struct iwn_ops *ops = &sc->ops;
6530 struct ieee80211com *ic = &sc->sc_ic;
6531 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
6532 const uint8_t *macaddr;
6537 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
6539 if ((sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSET)
6540 && (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSETv2)) {
6541 device_printf(sc->sc_dev,"%s: temp_offset and temp_offsetv2 are"
6542 " exclusive each together. Review NIC config file. Conf"
6543 " : 0x%08x Flags : 0x%08x \n", __func__,
6544 sc->base_params->calib_need,
6545 (IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSET |
6546 IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSETv2));
6550 /* Compute temperature calib if needed. Will be send by send calib */
6551 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSET) {
6552 error = iwn5000_temp_offset_calib(sc);
6554 device_printf(sc->sc_dev,
6555 "%s: could not set temperature offset\n", __func__);
6558 } else if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSETv2) {
6559 error = iwn5000_temp_offset_calibv2(sc);
6561 device_printf(sc->sc_dev,
6562 "%s: could not compute temperature offset v2\n",
6568 if (sc->hw_type == IWN_HW_REV_TYPE_6050) {
6569 /* Configure runtime DC calibration. */
6570 error = iwn5000_runtime_calib(sc);
6572 device_printf(sc->sc_dev,
6573 "%s: could not configure runtime calibration\n",
6579 /* Configure valid TX chains for >=5000 Series. */
6580 if (sc->hw_type != IWN_HW_REV_TYPE_4965 &&
6581 IWN_UCODE_API(sc->ucode_rev) > 1) {
6582 txmask = htole32(sc->txchainmask);
6583 DPRINTF(sc, IWN_DEBUG_RESET | IWN_DEBUG_XMIT,
6584 "%s: configuring valid TX chains 0x%x\n", __func__, txmask);
6585 error = iwn_cmd(sc, IWN5000_CMD_TX_ANT_CONFIG, &txmask,
6588 device_printf(sc->sc_dev,
6589 "%s: could not configure valid TX chains, "
6590 "error %d\n", __func__, error);
6595 /* Configure bluetooth coexistence. */
6598 /* Configure bluetooth coexistence if needed. */
6599 if (sc->base_params->bt_mode == IWN_BT_ADVANCED)
6600 error = iwn_send_advanced_btcoex(sc);
6601 if (sc->base_params->bt_mode == IWN_BT_SIMPLE)
6602 error = iwn_send_btcoex(sc);
6605 device_printf(sc->sc_dev,
6606 "%s: could not configure bluetooth coexistence, error %d\n",
6611 /* Set mode, channel, RX filter and enable RX. */
6612 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX];
6613 memset(sc->rxon, 0, sizeof (struct iwn_rxon));
6614 macaddr = vap ? vap->iv_myaddr : ic->ic_macaddr;
6615 IEEE80211_ADDR_COPY(sc->rxon->myaddr, macaddr);
6616 IEEE80211_ADDR_COPY(sc->rxon->wlap, macaddr);
6617 sc->rxon->chan = ieee80211_chan2ieee(ic, ic->ic_curchan);
6618 sc->rxon->flags = htole32(IWN_RXON_TSF | IWN_RXON_CTS_TO_SELF);
6619 if (IEEE80211_IS_CHAN_2GHZ(ic->ic_curchan))
6620 sc->rxon->flags |= htole32(IWN_RXON_AUTO | IWN_RXON_24GHZ);
6621 switch (ic->ic_opmode) {
6622 case IEEE80211_M_STA:
6623 sc->rxon->mode = IWN_MODE_STA;
6624 sc->rxon->filter = htole32(IWN_FILTER_MULTICAST);
6626 case IEEE80211_M_MONITOR:
6627 sc->rxon->mode = IWN_MODE_MONITOR;
6628 sc->rxon->filter = htole32(IWN_FILTER_MULTICAST |
6629 IWN_FILTER_CTL | IWN_FILTER_PROMISC);
6632 /* Should not get there. */
6635 sc->rxon->cck_mask = 0x0f; /* not yet negotiated */
6636 sc->rxon->ofdm_mask = 0xff; /* not yet negotiated */
6637 sc->rxon->ht_single_mask = 0xff;
6638 sc->rxon->ht_dual_mask = 0xff;
6639 sc->rxon->ht_triple_mask = 0xff;
6641 * In active association mode, ensure that
6642 * all the receive chains are enabled.
6644 * Since we're not yet doing SMPS, don't allow the
6645 * number of idle RX chains to be less than the active
6649 IWN_RXCHAIN_VALID(sc->rxchainmask) |
6650 IWN_RXCHAIN_MIMO_COUNT(sc->nrxchains) |
6651 IWN_RXCHAIN_IDLE_COUNT(sc->nrxchains);
6652 sc->rxon->rxchain = htole16(rxchain);
6653 DPRINTF(sc, IWN_DEBUG_RESET | IWN_DEBUG_XMIT,
6654 "%s: rxchainmask=0x%x, nrxchains=%d\n",
6659 sc->rxon->flags |= htole32(iwn_get_rxon_ht_flags(sc, ic->ic_curchan));
6661 DPRINTF(sc, IWN_DEBUG_RESET,
6662 "%s: setting configuration; flags=0x%08x\n",
6663 __func__, le32toh(sc->rxon->flags));
6664 if (sc->sc_is_scanning)
6665 device_printf(sc->sc_dev,
6666 "%s: is_scanning set, before RXON\n",
6668 error = iwn_cmd(sc, IWN_CMD_RXON, sc->rxon, sc->rxonsz, 0);
6670 device_printf(sc->sc_dev, "%s: RXON command failed\n",
6675 if ((error = iwn_add_broadcast_node(sc, 0)) != 0) {
6676 device_printf(sc->sc_dev, "%s: could not add broadcast node\n",
6681 /* Configuration has changed, set TX power accordingly. */
6682 if ((error = ops->set_txpower(sc, ic->ic_curchan, 0)) != 0) {
6683 device_printf(sc->sc_dev, "%s: could not set TX power\n",
6688 if ((error = iwn_set_critical_temp(sc)) != 0) {
6689 device_printf(sc->sc_dev,
6690 "%s: could not set critical temperature\n", __func__);
6694 /* Set power saving level to CAM during initialization. */
6695 if ((error = iwn_set_pslevel(sc, 0, 0, 0)) != 0) {
6696 device_printf(sc->sc_dev,
6697 "%s: could not set power saving level\n", __func__);
6701 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
6707 iwn_get_active_dwell_time(struct iwn_softc *sc,
6708 struct ieee80211_channel *c, uint8_t n_probes)
6710 /* No channel? Default to 2GHz settings */
6711 if (c == NULL || IEEE80211_IS_CHAN_2GHZ(c)) {
6712 return (IWN_ACTIVE_DWELL_TIME_2GHZ +
6713 IWN_ACTIVE_DWELL_FACTOR_2GHZ * (n_probes + 1));
6716 /* 5GHz dwell time */
6717 return (IWN_ACTIVE_DWELL_TIME_5GHZ +
6718 IWN_ACTIVE_DWELL_FACTOR_5GHZ * (n_probes + 1));
6722 * Limit the total dwell time to 85% of the beacon interval.
6724 * Returns the dwell time in milliseconds.
6727 iwn_limit_dwell(struct iwn_softc *sc, uint16_t dwell_time)
6729 struct ieee80211com *ic = &sc->sc_ic;
6730 struct ieee80211vap *vap = NULL;
6733 /* bintval is in TU (1.024mS) */
6734 if (! TAILQ_EMPTY(&ic->ic_vaps)) {
6735 vap = TAILQ_FIRST(&ic->ic_vaps);
6736 bintval = vap->iv_bss->ni_intval;
6740 * If it's non-zero, we should calculate the minimum of
6741 * it and the DWELL_BASE.
6743 * XXX Yes, the math should take into account that bintval
6744 * is 1.024mS, not 1mS..
6747 DPRINTF(sc, IWN_DEBUG_SCAN,
6751 return (MIN(IWN_PASSIVE_DWELL_BASE, ((bintval * 85) / 100)));
6754 /* No association context? Default */
6755 return (IWN_PASSIVE_DWELL_BASE);
6759 iwn_get_passive_dwell_time(struct iwn_softc *sc, struct ieee80211_channel *c)
6763 if (c == NULL || IEEE80211_IS_CHAN_2GHZ(c)) {
6764 passive = IWN_PASSIVE_DWELL_BASE + IWN_PASSIVE_DWELL_TIME_2GHZ;
6766 passive = IWN_PASSIVE_DWELL_BASE + IWN_PASSIVE_DWELL_TIME_5GHZ;
6769 /* Clamp to the beacon interval if we're associated */
6770 return (iwn_limit_dwell(sc, passive));
6774 iwn_scan(struct iwn_softc *sc, struct ieee80211vap *vap,
6775 struct ieee80211_scan_state *ss, struct ieee80211_channel *c)
6777 struct ieee80211com *ic = &sc->sc_ic;
6778 struct ieee80211_node *ni = vap->iv_bss;
6779 struct iwn_scan_hdr *hdr;
6780 struct iwn_cmd_data *tx;
6781 struct iwn_scan_essid *essid;
6782 struct iwn_scan_chan *chan;
6783 struct ieee80211_frame *wh;
6784 struct ieee80211_rateset *rs;
6790 uint16_t dwell_active, dwell_passive;
6791 uint32_t extra, scan_service_time;
6793 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
6796 * We are absolutely not allowed to send a scan command when another
6797 * scan command is pending.
6799 if (sc->sc_is_scanning) {
6800 device_printf(sc->sc_dev, "%s: called whilst scanning!\n",
6805 /* Assign the scan channel */
6808 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX];
6809 buf = malloc(IWN_SCAN_MAXSZ, M_DEVBUF, M_NOWAIT | M_ZERO);
6811 device_printf(sc->sc_dev,
6812 "%s: could not allocate buffer for scan command\n",
6816 hdr = (struct iwn_scan_hdr *)buf;
6818 * Move to the next channel if no frames are received within 10ms
6819 * after sending the probe request.
6821 hdr->quiet_time = htole16(10); /* timeout in milliseconds */
6822 hdr->quiet_threshold = htole16(1); /* min # of packets */
6824 * Max needs to be greater than active and passive and quiet!
6825 * It's also in microseconds!
6827 hdr->max_svc = htole32(250 * 1024);
6830 * Reset scan: interval=100
6831 * Normal scan: interval=becaon interval
6832 * suspend_time: 100 (TU)
6835 extra = (100 /* suspend_time */ / 100 /* beacon interval */) << 22;
6836 //scan_service_time = extra | ((100 /* susp */ % 100 /* int */) * 1024);
6837 scan_service_time = (4 << 22) | (100 * 1024); /* Hardcode for now! */
6838 hdr->pause_svc = htole32(scan_service_time);
6840 /* Select antennas for scanning. */
6842 IWN_RXCHAIN_VALID(sc->rxchainmask) |
6843 IWN_RXCHAIN_FORCE_MIMO_SEL(sc->rxchainmask) |
6844 IWN_RXCHAIN_DRIVER_FORCE;
6845 if (IEEE80211_IS_CHAN_A(c) &&
6846 sc->hw_type == IWN_HW_REV_TYPE_4965) {
6847 /* Ant A must be avoided in 5GHz because of an HW bug. */
6848 rxchain |= IWN_RXCHAIN_FORCE_SEL(IWN_ANT_B);
6849 } else /* Use all available RX antennas. */
6850 rxchain |= IWN_RXCHAIN_FORCE_SEL(sc->rxchainmask);
6851 hdr->rxchain = htole16(rxchain);
6852 hdr->filter = htole32(IWN_FILTER_MULTICAST | IWN_FILTER_BEACON);
6854 tx = (struct iwn_cmd_data *)(hdr + 1);
6855 tx->flags = htole32(IWN_TX_AUTO_SEQ);
6856 tx->id = sc->broadcast_id;
6857 tx->lifetime = htole32(IWN_LIFETIME_INFINITE);
6859 if (IEEE80211_IS_CHAN_5GHZ(c)) {
6860 /* Send probe requests at 6Mbps. */
6861 tx->rate = htole32(0xd);
6862 rs = &ic->ic_sup_rates[IEEE80211_MODE_11A];
6864 hdr->flags = htole32(IWN_RXON_24GHZ | IWN_RXON_AUTO);
6865 if (sc->hw_type == IWN_HW_REV_TYPE_4965 &&
6866 sc->rxon->associd && sc->rxon->chan > 14)
6867 tx->rate = htole32(0xd);
6869 /* Send probe requests at 1Mbps. */
6870 tx->rate = htole32(10 | IWN_RFLAG_CCK);
6872 rs = &ic->ic_sup_rates[IEEE80211_MODE_11G];
6874 /* Use the first valid TX antenna. */
6875 txant = IWN_LSB(sc->txchainmask);
6876 tx->rate |= htole32(IWN_RFLAG_ANT(txant));
6879 * Only do active scanning if we're announcing a probe request
6880 * for a given SSID (or more, if we ever add it to the driver.)
6885 * If we're scanning for a specific SSID, add it to the command.
6887 * XXX maybe look at adding support for scanning multiple SSIDs?
6889 essid = (struct iwn_scan_essid *)(tx + 1);
6891 if (ss->ss_ssid[0].len != 0) {
6892 essid[0].id = IEEE80211_ELEMID_SSID;
6893 essid[0].len = ss->ss_ssid[0].len;
6894 memcpy(essid[0].data, ss->ss_ssid[0].ssid, ss->ss_ssid[0].len);
6897 DPRINTF(sc, IWN_DEBUG_SCAN, "%s: ssid_len=%d, ssid=%*s\n",
6901 ss->ss_ssid[0].ssid);
6903 if (ss->ss_nssid > 0)
6908 * Build a probe request frame. Most of the following code is a
6909 * copy & paste of what is done in net80211.
6911 wh = (struct ieee80211_frame *)(essid + 20);
6912 wh->i_fc[0] = IEEE80211_FC0_VERSION_0 | IEEE80211_FC0_TYPE_MGT |
6913 IEEE80211_FC0_SUBTYPE_PROBE_REQ;
6914 wh->i_fc[1] = IEEE80211_FC1_DIR_NODS;
6915 IEEE80211_ADDR_COPY(wh->i_addr1, vap->iv_ifp->if_broadcastaddr);
6916 IEEE80211_ADDR_COPY(wh->i_addr2, IF_LLADDR(vap->iv_ifp));
6917 IEEE80211_ADDR_COPY(wh->i_addr3, vap->iv_ifp->if_broadcastaddr);
6918 *(uint16_t *)&wh->i_dur[0] = 0; /* filled by HW */
6919 *(uint16_t *)&wh->i_seq[0] = 0; /* filled by HW */
6921 frm = (uint8_t *)(wh + 1);
6922 frm = ieee80211_add_ssid(frm, NULL, 0);
6923 frm = ieee80211_add_rates(frm, rs);
6924 if (rs->rs_nrates > IEEE80211_RATE_SIZE)
6925 frm = ieee80211_add_xrates(frm, rs);
6926 if (ic->ic_htcaps & IEEE80211_HTC_HT)
6927 frm = ieee80211_add_htcap(frm, ni);
6929 /* Set length of probe request. */
6930 tx->len = htole16(frm - (uint8_t *)wh);
6933 * If active scanning is requested but a certain channel is
6934 * marked passive, we can do active scanning if we detect
6937 * There is an issue with some firmware versions that triggers
6938 * a sysassert on a "good CRC threshold" of zero (== disabled),
6939 * on a radar channel even though this means that we should NOT
6942 * The "good CRC threshold" is the number of frames that we
6943 * need to receive during our dwell time on a channel before
6944 * sending out probes -- setting this to a huge value will
6945 * mean we never reach it, but at the same time work around
6946 * the aforementioned issue. Thus use IWL_GOOD_CRC_TH_NEVER
6947 * here instead of IWL_GOOD_CRC_TH_DISABLED.
6949 * This was fixed in later versions along with some other
6950 * scan changes, and the threshold behaves as a flag in those
6955 * If we're doing active scanning, set the crc_threshold
6956 * to a suitable value. This is different to active veruss
6957 * passive scanning depending upon the channel flags; the
6958 * firmware will obey that particular check for us.
6960 if (sc->tlv_feature_flags & IWN_UCODE_TLV_FLAGS_NEWSCAN)
6961 hdr->crc_threshold = is_active ?
6962 IWN_GOOD_CRC_TH_DEFAULT : IWN_GOOD_CRC_TH_DISABLED;
6964 hdr->crc_threshold = is_active ?
6965 IWN_GOOD_CRC_TH_DEFAULT : IWN_GOOD_CRC_TH_NEVER;
6967 chan = (struct iwn_scan_chan *)frm;
6968 chan->chan = htole16(ieee80211_chan2ieee(ic, c));
6970 if (ss->ss_nssid > 0)
6971 chan->flags |= htole32(IWN_CHAN_NPBREQS(1));
6972 chan->dsp_gain = 0x6e;
6975 * Set the passive/active flag depending upon the channel mode.
6976 * XXX TODO: take the is_active flag into account as well?
6978 if (c->ic_flags & IEEE80211_CHAN_PASSIVE)
6979 chan->flags |= htole32(IWN_CHAN_PASSIVE);
6981 chan->flags |= htole32(IWN_CHAN_ACTIVE);
6984 * Calculate the active/passive dwell times.
6987 dwell_active = iwn_get_active_dwell_time(sc, c, ss->ss_nssid);
6988 dwell_passive = iwn_get_passive_dwell_time(sc, c);
6990 /* Make sure they're valid */
6991 if (dwell_passive <= dwell_active)
6992 dwell_passive = dwell_active + 1;
6994 chan->active = htole16(dwell_active);
6995 chan->passive = htole16(dwell_passive);
6997 if (IEEE80211_IS_CHAN_5GHZ(c))
6998 chan->rf_gain = 0x3b;
7000 chan->rf_gain = 0x28;
7002 DPRINTF(sc, IWN_DEBUG_STATE,
7003 "%s: chan %u flags 0x%x rf_gain 0x%x "
7004 "dsp_gain 0x%x active %d passive %d scan_svc_time %d crc 0x%x "
7005 "isactive=%d numssid=%d\n", __func__,
7006 chan->chan, chan->flags, chan->rf_gain, chan->dsp_gain,
7007 dwell_active, dwell_passive, scan_service_time,
7008 hdr->crc_threshold, is_active, ss->ss_nssid);
7012 buflen = (uint8_t *)chan - buf;
7013 hdr->len = htole16(buflen);
7015 if (sc->sc_is_scanning) {
7016 device_printf(sc->sc_dev,
7017 "%s: called with is_scanning set!\n",
7020 sc->sc_is_scanning = 1;
7022 DPRINTF(sc, IWN_DEBUG_STATE, "sending scan command nchan=%d\n",
7024 error = iwn_cmd(sc, IWN_CMD_SCAN, buf, buflen, 1);
7025 free(buf, M_DEVBUF);
7027 callout_reset(&sc->scan_timeout, 5*hz, iwn_scan_timeout, sc);
7029 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
7035 iwn_auth(struct iwn_softc *sc, struct ieee80211vap *vap)
7037 struct iwn_ops *ops = &sc->ops;
7038 struct ieee80211com *ic = &sc->sc_ic;
7039 struct ieee80211_node *ni = vap->iv_bss;
7042 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
7044 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX];
7045 /* Update adapter configuration. */
7046 IEEE80211_ADDR_COPY(sc->rxon->bssid, ni->ni_bssid);
7047 sc->rxon->chan = ieee80211_chan2ieee(ic, ni->ni_chan);
7048 sc->rxon->flags = htole32(IWN_RXON_TSF | IWN_RXON_CTS_TO_SELF);
7049 if (IEEE80211_IS_CHAN_2GHZ(ni->ni_chan))
7050 sc->rxon->flags |= htole32(IWN_RXON_AUTO | IWN_RXON_24GHZ);
7051 if (ic->ic_flags & IEEE80211_F_SHSLOT)
7052 sc->rxon->flags |= htole32(IWN_RXON_SHSLOT);
7053 if (ic->ic_flags & IEEE80211_F_SHPREAMBLE)
7054 sc->rxon->flags |= htole32(IWN_RXON_SHPREAMBLE);
7055 if (IEEE80211_IS_CHAN_A(ni->ni_chan)) {
7056 sc->rxon->cck_mask = 0;
7057 sc->rxon->ofdm_mask = 0x15;
7058 } else if (IEEE80211_IS_CHAN_B(ni->ni_chan)) {
7059 sc->rxon->cck_mask = 0x03;
7060 sc->rxon->ofdm_mask = 0;
7062 /* Assume 802.11b/g. */
7063 sc->rxon->cck_mask = 0x03;
7064 sc->rxon->ofdm_mask = 0x15;
7068 sc->rxon->flags |= htole32(iwn_get_rxon_ht_flags(sc, ic->ic_curchan));
7070 DPRINTF(sc, IWN_DEBUG_STATE, "rxon chan %d flags %x cck %x ofdm %x\n",
7071 sc->rxon->chan, sc->rxon->flags, sc->rxon->cck_mask,
7072 sc->rxon->ofdm_mask);
7073 if (sc->sc_is_scanning)
7074 device_printf(sc->sc_dev,
7075 "%s: is_scanning set, before RXON\n",
7077 error = iwn_cmd(sc, IWN_CMD_RXON, sc->rxon, sc->rxonsz, 1);
7079 device_printf(sc->sc_dev, "%s: RXON command failed, error %d\n",
7084 /* Configuration has changed, set TX power accordingly. */
7085 if ((error = ops->set_txpower(sc, ni->ni_chan, 1)) != 0) {
7086 device_printf(sc->sc_dev,
7087 "%s: could not set TX power, error %d\n", __func__, error);
7091 * Reconfiguring RXON clears the firmware nodes table so we must
7092 * add the broadcast node again.
7094 if ((error = iwn_add_broadcast_node(sc, 1)) != 0) {
7095 device_printf(sc->sc_dev,
7096 "%s: could not add broadcast node, error %d\n", __func__,
7101 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
7107 iwn_run(struct iwn_softc *sc, struct ieee80211vap *vap)
7109 struct iwn_ops *ops = &sc->ops;
7110 struct ieee80211com *ic = &sc->sc_ic;
7111 struct ieee80211_node *ni = vap->iv_bss;
7112 struct iwn_node_info node;
7115 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
7117 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX];
7118 if (ic->ic_opmode == IEEE80211_M_MONITOR) {
7119 /* Link LED blinks while monitoring. */
7120 iwn_set_led(sc, IWN_LED_LINK, 5, 5);
7123 if ((error = iwn_set_timing(sc, ni)) != 0) {
7124 device_printf(sc->sc_dev,
7125 "%s: could not set timing, error %d\n", __func__, error);
7129 /* Update adapter configuration. */
7130 IEEE80211_ADDR_COPY(sc->rxon->bssid, ni->ni_bssid);
7131 sc->rxon->associd = htole16(IEEE80211_AID(ni->ni_associd));
7132 sc->rxon->chan = ieee80211_chan2ieee(ic, ni->ni_chan);
7133 sc->rxon->flags = htole32(IWN_RXON_TSF | IWN_RXON_CTS_TO_SELF);
7134 if (IEEE80211_IS_CHAN_2GHZ(ni->ni_chan))
7135 sc->rxon->flags |= htole32(IWN_RXON_AUTO | IWN_RXON_24GHZ);
7136 if (ic->ic_flags & IEEE80211_F_SHSLOT)
7137 sc->rxon->flags |= htole32(IWN_RXON_SHSLOT);
7138 if (ic->ic_flags & IEEE80211_F_SHPREAMBLE)
7139 sc->rxon->flags |= htole32(IWN_RXON_SHPREAMBLE);
7140 if (IEEE80211_IS_CHAN_A(ni->ni_chan)) {
7141 sc->rxon->cck_mask = 0;
7142 sc->rxon->ofdm_mask = 0x15;
7143 } else if (IEEE80211_IS_CHAN_B(ni->ni_chan)) {
7144 sc->rxon->cck_mask = 0x03;
7145 sc->rxon->ofdm_mask = 0;
7147 /* Assume 802.11b/g. */
7148 sc->rxon->cck_mask = 0x0f;
7149 sc->rxon->ofdm_mask = 0x15;
7152 sc->rxon->flags |= htole32(iwn_get_rxon_ht_flags(sc, ni->ni_chan));
7153 sc->rxon->filter |= htole32(IWN_FILTER_BSS);
7154 DPRINTF(sc, IWN_DEBUG_STATE, "rxon chan %d flags %x, curhtprotmode=%d\n",
7155 sc->rxon->chan, le32toh(sc->rxon->flags), ic->ic_curhtprotmode);
7156 if (sc->sc_is_scanning)
7157 device_printf(sc->sc_dev,
7158 "%s: is_scanning set, before RXON\n",
7160 error = iwn_cmd(sc, IWN_CMD_RXON, sc->rxon, sc->rxonsz, 1);
7162 device_printf(sc->sc_dev,
7163 "%s: could not update configuration, error %d\n", __func__,
7168 /* Configuration has changed, set TX power accordingly. */
7169 if ((error = ops->set_txpower(sc, ni->ni_chan, 1)) != 0) {
7170 device_printf(sc->sc_dev,
7171 "%s: could not set TX power, error %d\n", __func__, error);
7175 /* Fake a join to initialize the TX rate. */
7176 ((struct iwn_node *)ni)->id = IWN_ID_BSS;
7177 iwn_newassoc(ni, 1);
7180 memset(&node, 0, sizeof node);
7181 IEEE80211_ADDR_COPY(node.macaddr, ni->ni_macaddr);
7182 node.id = IWN_ID_BSS;
7183 if (IEEE80211_IS_CHAN_HT(ni->ni_chan)) {
7184 switch (ni->ni_htcap & IEEE80211_HTCAP_SMPS) {
7185 case IEEE80211_HTCAP_SMPS_ENA:
7186 node.htflags |= htole32(IWN_SMPS_MIMO_DIS);
7188 case IEEE80211_HTCAP_SMPS_DYNAMIC:
7189 node.htflags |= htole32(IWN_SMPS_MIMO_PROT);
7192 node.htflags |= htole32(IWN_AMDPU_SIZE_FACTOR(3) |
7193 IWN_AMDPU_DENSITY(5)); /* 4us */
7194 if (IEEE80211_IS_CHAN_HT40(ni->ni_chan))
7195 node.htflags |= htole32(IWN_NODE_HT40);
7197 DPRINTF(sc, IWN_DEBUG_STATE, "%s: adding BSS node\n", __func__);
7198 error = ops->add_node(sc, &node, 1);
7200 device_printf(sc->sc_dev,
7201 "%s: could not add BSS node, error %d\n", __func__, error);
7204 DPRINTF(sc, IWN_DEBUG_STATE, "%s: setting link quality for node %d\n",
7206 if ((error = iwn_set_link_quality(sc, ni)) != 0) {
7207 device_printf(sc->sc_dev,
7208 "%s: could not setup link quality for node %d, error %d\n",
7209 __func__, node.id, error);
7213 if ((error = iwn_init_sensitivity(sc)) != 0) {
7214 device_printf(sc->sc_dev,
7215 "%s: could not set sensitivity, error %d\n", __func__,
7219 /* Start periodic calibration timer. */
7220 sc->calib.state = IWN_CALIB_STATE_ASSOC;
7222 callout_reset(&sc->calib_to, msecs_to_ticks(500), iwn_calib_timeout,
7225 /* Link LED always on while associated. */
7226 iwn_set_led(sc, IWN_LED_LINK, 0, 1);
7228 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
7234 * This function is called by upper layer when an ADDBA request is received
7235 * from another STA and before the ADDBA response is sent.
7238 iwn_ampdu_rx_start(struct ieee80211_node *ni, struct ieee80211_rx_ampdu *rap,
7239 int baparamset, int batimeout, int baseqctl)
7241 #define MS(_v, _f) (((_v) & _f) >> _f##_S)
7242 struct iwn_softc *sc = ni->ni_ic->ic_softc;
7243 struct iwn_ops *ops = &sc->ops;
7244 struct iwn_node *wn = (void *)ni;
7245 struct iwn_node_info node;
7250 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7252 tid = MS(le16toh(baparamset), IEEE80211_BAPS_TID);
7253 ssn = MS(le16toh(baseqctl), IEEE80211_BASEQ_START);
7255 memset(&node, 0, sizeof node);
7257 node.control = IWN_NODE_UPDATE;
7258 node.flags = IWN_FLAG_SET_ADDBA;
7259 node.addba_tid = tid;
7260 node.addba_ssn = htole16(ssn);
7261 DPRINTF(sc, IWN_DEBUG_RECV, "ADDBA RA=%d TID=%d SSN=%d\n",
7263 error = ops->add_node(sc, &node, 1);
7266 return sc->sc_ampdu_rx_start(ni, rap, baparamset, batimeout, baseqctl);
7271 * This function is called by upper layer on teardown of an HT-immediate
7272 * Block Ack agreement (eg. uppon receipt of a DELBA frame).
7275 iwn_ampdu_rx_stop(struct ieee80211_node *ni, struct ieee80211_rx_ampdu *rap)
7277 struct ieee80211com *ic = ni->ni_ic;
7278 struct iwn_softc *sc = ic->ic_softc;
7279 struct iwn_ops *ops = &sc->ops;
7280 struct iwn_node *wn = (void *)ni;
7281 struct iwn_node_info node;
7284 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7286 /* XXX: tid as an argument */
7287 for (tid = 0; tid < WME_NUM_TID; tid++) {
7288 if (&ni->ni_rx_ampdu[tid] == rap)
7292 memset(&node, 0, sizeof node);
7294 node.control = IWN_NODE_UPDATE;
7295 node.flags = IWN_FLAG_SET_DELBA;
7296 node.delba_tid = tid;
7297 DPRINTF(sc, IWN_DEBUG_RECV, "DELBA RA=%d TID=%d\n", wn->id, tid);
7298 (void)ops->add_node(sc, &node, 1);
7299 sc->sc_ampdu_rx_stop(ni, rap);
7303 iwn_addba_request(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap,
7304 int dialogtoken, int baparamset, int batimeout)
7306 struct iwn_softc *sc = ni->ni_ic->ic_softc;
7309 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7311 for (qid = sc->firstaggqueue; qid < sc->ntxqs; qid++) {
7312 if (sc->qid2tap[qid] == NULL)
7315 if (qid == sc->ntxqs) {
7316 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: not free aggregation queue\n",
7320 tap->txa_private = malloc(sizeof(int), M_DEVBUF, M_NOWAIT);
7321 if (tap->txa_private == NULL) {
7322 device_printf(sc->sc_dev,
7323 "%s: failed to alloc TX aggregation structure\n", __func__);
7326 sc->qid2tap[qid] = tap;
7327 *(int *)tap->txa_private = qid;
7328 return sc->sc_addba_request(ni, tap, dialogtoken, baparamset,
7333 iwn_addba_response(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap,
7334 int code, int baparamset, int batimeout)
7336 struct iwn_softc *sc = ni->ni_ic->ic_softc;
7337 int qid = *(int *)tap->txa_private;
7338 uint8_t tid = tap->txa_tid;
7341 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7343 if (code == IEEE80211_STATUS_SUCCESS) {
7344 ni->ni_txseqs[tid] = tap->txa_start & 0xfff;
7345 ret = iwn_ampdu_tx_start(ni->ni_ic, ni, tid);
7349 sc->qid2tap[qid] = NULL;
7350 free(tap->txa_private, M_DEVBUF);
7351 tap->txa_private = NULL;
7353 return sc->sc_addba_response(ni, tap, code, baparamset, batimeout);
7357 * This function is called by upper layer when an ADDBA response is received
7361 iwn_ampdu_tx_start(struct ieee80211com *ic, struct ieee80211_node *ni,
7364 struct ieee80211_tx_ampdu *tap = &ni->ni_tx_ampdu[tid];
7365 struct iwn_softc *sc = ni->ni_ic->ic_softc;
7366 struct iwn_ops *ops = &sc->ops;
7367 struct iwn_node *wn = (void *)ni;
7368 struct iwn_node_info node;
7371 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7373 /* Enable TX for the specified RA/TID. */
7374 wn->disable_tid &= ~(1 << tid);
7375 memset(&node, 0, sizeof node);
7377 node.control = IWN_NODE_UPDATE;
7378 node.flags = IWN_FLAG_SET_DISABLE_TID;
7379 node.disable_tid = htole16(wn->disable_tid);
7380 error = ops->add_node(sc, &node, 1);
7384 if ((error = iwn_nic_lock(sc)) != 0)
7386 qid = *(int *)tap->txa_private;
7387 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: ra=%d tid=%d ssn=%d qid=%d\n",
7388 __func__, wn->id, tid, tap->txa_start, qid);
7389 ops->ampdu_tx_start(sc, ni, qid, tid, tap->txa_start & 0xfff);
7392 iwn_set_link_quality(sc, ni);
7397 iwn_ampdu_tx_stop(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap)
7399 struct iwn_softc *sc = ni->ni_ic->ic_softc;
7400 struct iwn_ops *ops = &sc->ops;
7401 uint8_t tid = tap->txa_tid;
7404 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7406 sc->sc_addba_stop(ni, tap);
7408 if (tap->txa_private == NULL)
7411 qid = *(int *)tap->txa_private;
7412 if (sc->txq[qid].queued != 0)
7414 if (iwn_nic_lock(sc) != 0)
7416 ops->ampdu_tx_stop(sc, qid, tid, tap->txa_start & 0xfff);
7418 sc->qid2tap[qid] = NULL;
7419 free(tap->txa_private, M_DEVBUF);
7420 tap->txa_private = NULL;
7424 iwn4965_ampdu_tx_start(struct iwn_softc *sc, struct ieee80211_node *ni,
7425 int qid, uint8_t tid, uint16_t ssn)
7427 struct iwn_node *wn = (void *)ni;
7429 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7431 /* Stop TX scheduler while we're changing its configuration. */
7432 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid),
7433 IWN4965_TXQ_STATUS_CHGACT);
7435 /* Assign RA/TID translation to the queue. */
7436 iwn_mem_write_2(sc, sc->sched_base + IWN4965_SCHED_TRANS_TBL(qid),
7439 /* Enable chain-building mode for the queue. */
7440 iwn_prph_setbits(sc, IWN4965_SCHED_QCHAIN_SEL, 1 << qid);
7442 /* Set starting sequence number from the ADDBA request. */
7443 sc->txq[qid].cur = sc->txq[qid].read = (ssn & 0xff);
7444 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | (ssn & 0xff));
7445 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_RDPTR(qid), ssn);
7447 /* Set scheduler window size. */
7448 iwn_mem_write(sc, sc->sched_base + IWN4965_SCHED_QUEUE_OFFSET(qid),
7450 /* Set scheduler frame limit. */
7451 iwn_mem_write(sc, sc->sched_base + IWN4965_SCHED_QUEUE_OFFSET(qid) + 4,
7452 IWN_SCHED_LIMIT << 16);
7454 /* Enable interrupts for the queue. */
7455 iwn_prph_setbits(sc, IWN4965_SCHED_INTR_MASK, 1 << qid);
7457 /* Mark the queue as active. */
7458 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid),
7459 IWN4965_TXQ_STATUS_ACTIVE | IWN4965_TXQ_STATUS_AGGR_ENA |
7460 iwn_tid2fifo[tid] << 1);
7464 iwn4965_ampdu_tx_stop(struct iwn_softc *sc, int qid, uint8_t tid, uint16_t ssn)
7466 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7468 /* Stop TX scheduler while we're changing its configuration. */
7469 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid),
7470 IWN4965_TXQ_STATUS_CHGACT);
7472 /* Set starting sequence number from the ADDBA request. */
7473 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | (ssn & 0xff));
7474 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_RDPTR(qid), ssn);
7476 /* Disable interrupts for the queue. */
7477 iwn_prph_clrbits(sc, IWN4965_SCHED_INTR_MASK, 1 << qid);
7479 /* Mark the queue as inactive. */
7480 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid),
7481 IWN4965_TXQ_STATUS_INACTIVE | iwn_tid2fifo[tid] << 1);
7485 iwn5000_ampdu_tx_start(struct iwn_softc *sc, struct ieee80211_node *ni,
7486 int qid, uint8_t tid, uint16_t ssn)
7488 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7490 struct iwn_node *wn = (void *)ni;
7492 /* Stop TX scheduler while we're changing its configuration. */
7493 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
7494 IWN5000_TXQ_STATUS_CHGACT);
7496 /* Assign RA/TID translation to the queue. */
7497 iwn_mem_write_2(sc, sc->sched_base + IWN5000_SCHED_TRANS_TBL(qid),
7500 /* Enable chain-building mode for the queue. */
7501 iwn_prph_setbits(sc, IWN5000_SCHED_QCHAIN_SEL, 1 << qid);
7503 /* Enable aggregation for the queue. */
7504 iwn_prph_setbits(sc, IWN5000_SCHED_AGGR_SEL, 1 << qid);
7506 /* Set starting sequence number from the ADDBA request. */
7507 sc->txq[qid].cur = sc->txq[qid].read = (ssn & 0xff);
7508 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | (ssn & 0xff));
7509 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_RDPTR(qid), ssn);
7511 /* Set scheduler window size and frame limit. */
7512 iwn_mem_write(sc, sc->sched_base + IWN5000_SCHED_QUEUE_OFFSET(qid) + 4,
7513 IWN_SCHED_LIMIT << 16 | IWN_SCHED_WINSZ);
7515 /* Enable interrupts for the queue. */
7516 iwn_prph_setbits(sc, IWN5000_SCHED_INTR_MASK, 1 << qid);
7518 /* Mark the queue as active. */
7519 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
7520 IWN5000_TXQ_STATUS_ACTIVE | iwn_tid2fifo[tid]);
7524 iwn5000_ampdu_tx_stop(struct iwn_softc *sc, int qid, uint8_t tid, uint16_t ssn)
7526 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7528 /* Stop TX scheduler while we're changing its configuration. */
7529 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
7530 IWN5000_TXQ_STATUS_CHGACT);
7532 /* Disable aggregation for the queue. */
7533 iwn_prph_clrbits(sc, IWN5000_SCHED_AGGR_SEL, 1 << qid);
7535 /* Set starting sequence number from the ADDBA request. */
7536 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | (ssn & 0xff));
7537 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_RDPTR(qid), ssn);
7539 /* Disable interrupts for the queue. */
7540 iwn_prph_clrbits(sc, IWN5000_SCHED_INTR_MASK, 1 << qid);
7542 /* Mark the queue as inactive. */
7543 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
7544 IWN5000_TXQ_STATUS_INACTIVE | iwn_tid2fifo[tid]);
7548 * Query calibration tables from the initialization firmware. We do this
7549 * only once at first boot. Called from a process context.
7552 iwn5000_query_calibration(struct iwn_softc *sc)
7554 struct iwn5000_calib_config cmd;
7557 memset(&cmd, 0, sizeof cmd);
7558 cmd.ucode.once.enable = htole32(0xffffffff);
7559 cmd.ucode.once.start = htole32(0xffffffff);
7560 cmd.ucode.once.send = htole32(0xffffffff);
7561 cmd.ucode.flags = htole32(0xffffffff);
7562 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: sending calibration query\n",
7564 error = iwn_cmd(sc, IWN5000_CMD_CALIB_CONFIG, &cmd, sizeof cmd, 0);
7568 /* Wait at most two seconds for calibration to complete. */
7569 if (!(sc->sc_flags & IWN_FLAG_CALIB_DONE))
7570 error = msleep(sc, &sc->sc_mtx, PCATCH, "iwncal", 2 * hz);
7575 * Send calibration results to the runtime firmware. These results were
7576 * obtained on first boot from the initialization firmware.
7579 iwn5000_send_calibration(struct iwn_softc *sc)
7583 for (idx = 0; idx < IWN5000_PHY_CALIB_MAX_RESULT; idx++) {
7584 if (!(sc->base_params->calib_need & (1<<idx))) {
7585 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
7586 "No need of calib %d\n",
7588 continue; /* no need for this calib */
7590 if (sc->calibcmd[idx].buf == NULL) {
7591 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
7592 "Need calib idx : %d but no available data\n",
7597 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
7598 "send calibration result idx=%d len=%d\n", idx,
7599 sc->calibcmd[idx].len);
7600 error = iwn_cmd(sc, IWN_CMD_PHY_CALIB, sc->calibcmd[idx].buf,
7601 sc->calibcmd[idx].len, 0);
7603 device_printf(sc->sc_dev,
7604 "%s: could not send calibration result, error %d\n",
7613 iwn5000_send_wimax_coex(struct iwn_softc *sc)
7615 struct iwn5000_wimax_coex wimax;
7618 if (sc->hw_type == IWN_HW_REV_TYPE_6050) {
7619 /* Enable WiMAX coexistence for combo adapters. */
7621 IWN_WIMAX_COEX_ASSOC_WA_UNMASK |
7622 IWN_WIMAX_COEX_UNASSOC_WA_UNMASK |
7623 IWN_WIMAX_COEX_STA_TABLE_VALID |
7624 IWN_WIMAX_COEX_ENABLE;
7625 memcpy(wimax.events, iwn6050_wimax_events,
7626 sizeof iwn6050_wimax_events);
7630 /* Disable WiMAX coexistence. */
7632 memset(wimax.events, 0, sizeof wimax.events);
7634 DPRINTF(sc, IWN_DEBUG_RESET, "%s: Configuring WiMAX coexistence\n",
7636 return iwn_cmd(sc, IWN5000_CMD_WIMAX_COEX, &wimax, sizeof wimax, 0);
7640 iwn5000_crystal_calib(struct iwn_softc *sc)
7642 struct iwn5000_phy_calib_crystal cmd;
7644 memset(&cmd, 0, sizeof cmd);
7645 cmd.code = IWN5000_PHY_CALIB_CRYSTAL;
7648 cmd.cap_pin[0] = le32toh(sc->eeprom_crystal) & 0xff;
7649 cmd.cap_pin[1] = (le32toh(sc->eeprom_crystal) >> 16) & 0xff;
7650 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "sending crystal calibration %d, %d\n",
7651 cmd.cap_pin[0], cmd.cap_pin[1]);
7652 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 0);
7656 iwn5000_temp_offset_calib(struct iwn_softc *sc)
7658 struct iwn5000_phy_calib_temp_offset cmd;
7660 memset(&cmd, 0, sizeof cmd);
7661 cmd.code = IWN5000_PHY_CALIB_TEMP_OFFSET;
7664 if (sc->eeprom_temp != 0)
7665 cmd.offset = htole16(sc->eeprom_temp);
7667 cmd.offset = htole16(IWN_DEFAULT_TEMP_OFFSET);
7668 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "setting radio sensor offset to %d\n",
7669 le16toh(cmd.offset));
7670 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 0);
7674 iwn5000_temp_offset_calibv2(struct iwn_softc *sc)
7676 struct iwn5000_phy_calib_temp_offsetv2 cmd;
7678 memset(&cmd, 0, sizeof cmd);
7679 cmd.code = IWN5000_PHY_CALIB_TEMP_OFFSET;
7682 if (sc->eeprom_temp != 0) {
7683 cmd.offset_low = htole16(sc->eeprom_temp);
7684 cmd.offset_high = htole16(sc->eeprom_temp_high);
7686 cmd.offset_low = htole16(IWN_DEFAULT_TEMP_OFFSET);
7687 cmd.offset_high = htole16(IWN_DEFAULT_TEMP_OFFSET);
7689 cmd.burnt_voltage_ref = htole16(sc->eeprom_voltage);
7691 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
7692 "setting radio sensor low offset to %d, high offset to %d, voltage to %d\n",
7693 le16toh(cmd.offset_low),
7694 le16toh(cmd.offset_high),
7695 le16toh(cmd.burnt_voltage_ref));
7697 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 0);
7701 * This function is called after the runtime firmware notifies us of its
7702 * readiness (called in a process context).
7705 iwn4965_post_alive(struct iwn_softc *sc)
7709 if ((error = iwn_nic_lock(sc)) != 0)
7712 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7714 /* Clear TX scheduler state in SRAM. */
7715 sc->sched_base = iwn_prph_read(sc, IWN_SCHED_SRAM_ADDR);
7716 iwn_mem_set_region_4(sc, sc->sched_base + IWN4965_SCHED_CTX_OFF, 0,
7717 IWN4965_SCHED_CTX_LEN / sizeof (uint32_t));
7719 /* Set physical address of TX scheduler rings (1KB aligned). */
7720 iwn_prph_write(sc, IWN4965_SCHED_DRAM_ADDR, sc->sched_dma.paddr >> 10);
7722 IWN_SETBITS(sc, IWN_FH_TX_CHICKEN, IWN_FH_TX_CHICKEN_SCHED_RETRY);
7724 /* Disable chain mode for all our 16 queues. */
7725 iwn_prph_write(sc, IWN4965_SCHED_QCHAIN_SEL, 0);
7727 for (qid = 0; qid < IWN4965_NTXQUEUES; qid++) {
7728 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_RDPTR(qid), 0);
7729 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | 0);
7731 /* Set scheduler window size. */
7732 iwn_mem_write(sc, sc->sched_base +
7733 IWN4965_SCHED_QUEUE_OFFSET(qid), IWN_SCHED_WINSZ);
7734 /* Set scheduler frame limit. */
7735 iwn_mem_write(sc, sc->sched_base +
7736 IWN4965_SCHED_QUEUE_OFFSET(qid) + 4,
7737 IWN_SCHED_LIMIT << 16);
7740 /* Enable interrupts for all our 16 queues. */
7741 iwn_prph_write(sc, IWN4965_SCHED_INTR_MASK, 0xffff);
7742 /* Identify TX FIFO rings (0-7). */
7743 iwn_prph_write(sc, IWN4965_SCHED_TXFACT, 0xff);
7745 /* Mark TX rings (4 EDCA + cmd + 2 HCCA) as active. */
7746 for (qid = 0; qid < 7; qid++) {
7747 static uint8_t qid2fifo[] = { 3, 2, 1, 0, 4, 5, 6 };
7748 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid),
7749 IWN4965_TXQ_STATUS_ACTIVE | qid2fifo[qid] << 1);
7756 * This function is called after the initialization or runtime firmware
7757 * notifies us of its readiness (called in a process context).
7760 iwn5000_post_alive(struct iwn_softc *sc)
7764 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
7766 /* Switch to using ICT interrupt mode. */
7767 iwn5000_ict_reset(sc);
7769 if ((error = iwn_nic_lock(sc)) != 0){
7770 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end in error\n", __func__);
7774 /* Clear TX scheduler state in SRAM. */
7775 sc->sched_base = iwn_prph_read(sc, IWN_SCHED_SRAM_ADDR);
7776 iwn_mem_set_region_4(sc, sc->sched_base + IWN5000_SCHED_CTX_OFF, 0,
7777 IWN5000_SCHED_CTX_LEN / sizeof (uint32_t));
7779 /* Set physical address of TX scheduler rings (1KB aligned). */
7780 iwn_prph_write(sc, IWN5000_SCHED_DRAM_ADDR, sc->sched_dma.paddr >> 10);
7782 IWN_SETBITS(sc, IWN_FH_TX_CHICKEN, IWN_FH_TX_CHICKEN_SCHED_RETRY);
7784 /* Enable chain mode for all queues, except command queue. */
7785 if (sc->sc_flags & IWN_FLAG_PAN_SUPPORT)
7786 iwn_prph_write(sc, IWN5000_SCHED_QCHAIN_SEL, 0xfffdf);
7788 iwn_prph_write(sc, IWN5000_SCHED_QCHAIN_SEL, 0xfffef);
7789 iwn_prph_write(sc, IWN5000_SCHED_AGGR_SEL, 0);
7791 for (qid = 0; qid < IWN5000_NTXQUEUES; qid++) {
7792 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_RDPTR(qid), 0);
7793 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | 0);
7795 iwn_mem_write(sc, sc->sched_base +
7796 IWN5000_SCHED_QUEUE_OFFSET(qid), 0);
7797 /* Set scheduler window size and frame limit. */
7798 iwn_mem_write(sc, sc->sched_base +
7799 IWN5000_SCHED_QUEUE_OFFSET(qid) + 4,
7800 IWN_SCHED_LIMIT << 16 | IWN_SCHED_WINSZ);
7803 /* Enable interrupts for all our 20 queues. */
7804 iwn_prph_write(sc, IWN5000_SCHED_INTR_MASK, 0xfffff);
7805 /* Identify TX FIFO rings (0-7). */
7806 iwn_prph_write(sc, IWN5000_SCHED_TXFACT, 0xff);
7808 /* Mark TX rings (4 EDCA + cmd + 2 HCCA) as active. */
7809 if (sc->sc_flags & IWN_FLAG_PAN_SUPPORT) {
7810 /* Mark TX rings as active. */
7811 for (qid = 0; qid < 11; qid++) {
7812 static uint8_t qid2fifo[] = { 3, 2, 1, 0, 0, 4, 2, 5, 4, 7, 5 };
7813 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
7814 IWN5000_TXQ_STATUS_ACTIVE | qid2fifo[qid]);
7817 /* Mark TX rings (4 EDCA + cmd + 2 HCCA) as active. */
7818 for (qid = 0; qid < 7; qid++) {
7819 static uint8_t qid2fifo[] = { 3, 2, 1, 0, 7, 5, 6 };
7820 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
7821 IWN5000_TXQ_STATUS_ACTIVE | qid2fifo[qid]);
7826 /* Configure WiMAX coexistence for combo adapters. */
7827 error = iwn5000_send_wimax_coex(sc);
7829 device_printf(sc->sc_dev,
7830 "%s: could not configure WiMAX coexistence, error %d\n",
7834 if (sc->hw_type != IWN_HW_REV_TYPE_5150) {
7835 /* Perform crystal calibration. */
7836 error = iwn5000_crystal_calib(sc);
7838 device_printf(sc->sc_dev,
7839 "%s: crystal calibration failed, error %d\n",
7844 if (!(sc->sc_flags & IWN_FLAG_CALIB_DONE)) {
7845 /* Query calibration from the initialization firmware. */
7846 if ((error = iwn5000_query_calibration(sc)) != 0) {
7847 device_printf(sc->sc_dev,
7848 "%s: could not query calibration, error %d\n",
7853 * We have the calibration results now, reboot with the
7854 * runtime firmware (call ourselves recursively!)
7857 error = iwn_hw_init(sc);
7859 /* Send calibration results to runtime firmware. */
7860 error = iwn5000_send_calibration(sc);
7863 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
7869 * The firmware boot code is small and is intended to be copied directly into
7870 * the NIC internal memory (no DMA transfer).
7873 iwn4965_load_bootcode(struct iwn_softc *sc, const uint8_t *ucode, int size)
7877 size /= sizeof (uint32_t);
7879 if ((error = iwn_nic_lock(sc)) != 0)
7882 /* Copy microcode image into NIC memory. */
7883 iwn_prph_write_region_4(sc, IWN_BSM_SRAM_BASE,
7884 (const uint32_t *)ucode, size);
7886 iwn_prph_write(sc, IWN_BSM_WR_MEM_SRC, 0);
7887 iwn_prph_write(sc, IWN_BSM_WR_MEM_DST, IWN_FW_TEXT_BASE);
7888 iwn_prph_write(sc, IWN_BSM_WR_DWCOUNT, size);
7890 /* Start boot load now. */
7891 iwn_prph_write(sc, IWN_BSM_WR_CTRL, IWN_BSM_WR_CTRL_START);
7893 /* Wait for transfer to complete. */
7894 for (ntries = 0; ntries < 1000; ntries++) {
7895 if (!(iwn_prph_read(sc, IWN_BSM_WR_CTRL) &
7896 IWN_BSM_WR_CTRL_START))
7900 if (ntries == 1000) {
7901 device_printf(sc->sc_dev, "%s: could not load boot firmware\n",
7907 /* Enable boot after power up. */
7908 iwn_prph_write(sc, IWN_BSM_WR_CTRL, IWN_BSM_WR_CTRL_START_EN);
7915 iwn4965_load_firmware(struct iwn_softc *sc)
7917 struct iwn_fw_info *fw = &sc->fw;
7918 struct iwn_dma_info *dma = &sc->fw_dma;
7921 /* Copy initialization sections into pre-allocated DMA-safe memory. */
7922 memcpy(dma->vaddr, fw->init.data, fw->init.datasz);
7923 bus_dmamap_sync(dma->tag, dma->map, BUS_DMASYNC_PREWRITE);
7924 memcpy(dma->vaddr + IWN4965_FW_DATA_MAXSZ,
7925 fw->init.text, fw->init.textsz);
7926 bus_dmamap_sync(dma->tag, dma->map, BUS_DMASYNC_PREWRITE);
7928 /* Tell adapter where to find initialization sections. */
7929 if ((error = iwn_nic_lock(sc)) != 0)
7931 iwn_prph_write(sc, IWN_BSM_DRAM_DATA_ADDR, dma->paddr >> 4);
7932 iwn_prph_write(sc, IWN_BSM_DRAM_DATA_SIZE, fw->init.datasz);
7933 iwn_prph_write(sc, IWN_BSM_DRAM_TEXT_ADDR,
7934 (dma->paddr + IWN4965_FW_DATA_MAXSZ) >> 4);
7935 iwn_prph_write(sc, IWN_BSM_DRAM_TEXT_SIZE, fw->init.textsz);
7938 /* Load firmware boot code. */
7939 error = iwn4965_load_bootcode(sc, fw->boot.text, fw->boot.textsz);
7941 device_printf(sc->sc_dev, "%s: could not load boot firmware\n",
7945 /* Now press "execute". */
7946 IWN_WRITE(sc, IWN_RESET, 0);
7948 /* Wait at most one second for first alive notification. */
7949 if ((error = msleep(sc, &sc->sc_mtx, PCATCH, "iwninit", hz)) != 0) {
7950 device_printf(sc->sc_dev,
7951 "%s: timeout waiting for adapter to initialize, error %d\n",
7956 /* Retrieve current temperature for initial TX power calibration. */
7957 sc->rawtemp = sc->ucode_info.temp[3].chan20MHz;
7958 sc->temp = iwn4965_get_temperature(sc);
7960 /* Copy runtime sections into pre-allocated DMA-safe memory. */
7961 memcpy(dma->vaddr, fw->main.data, fw->main.datasz);
7962 bus_dmamap_sync(dma->tag, dma->map, BUS_DMASYNC_PREWRITE);
7963 memcpy(dma->vaddr + IWN4965_FW_DATA_MAXSZ,
7964 fw->main.text, fw->main.textsz);
7965 bus_dmamap_sync(dma->tag, dma->map, BUS_DMASYNC_PREWRITE);
7967 /* Tell adapter where to find runtime sections. */
7968 if ((error = iwn_nic_lock(sc)) != 0)
7970 iwn_prph_write(sc, IWN_BSM_DRAM_DATA_ADDR, dma->paddr >> 4);
7971 iwn_prph_write(sc, IWN_BSM_DRAM_DATA_SIZE, fw->main.datasz);
7972 iwn_prph_write(sc, IWN_BSM_DRAM_TEXT_ADDR,
7973 (dma->paddr + IWN4965_FW_DATA_MAXSZ) >> 4);
7974 iwn_prph_write(sc, IWN_BSM_DRAM_TEXT_SIZE,
7975 IWN_FW_UPDATED | fw->main.textsz);
7982 iwn5000_load_firmware_section(struct iwn_softc *sc, uint32_t dst,
7983 const uint8_t *section, int size)
7985 struct iwn_dma_info *dma = &sc->fw_dma;
7988 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7990 /* Copy firmware section into pre-allocated DMA-safe memory. */
7991 memcpy(dma->vaddr, section, size);
7992 bus_dmamap_sync(dma->tag, dma->map, BUS_DMASYNC_PREWRITE);
7994 if ((error = iwn_nic_lock(sc)) != 0)
7997 IWN_WRITE(sc, IWN_FH_TX_CONFIG(IWN_SRVC_DMACHNL),
7998 IWN_FH_TX_CONFIG_DMA_PAUSE);
8000 IWN_WRITE(sc, IWN_FH_SRAM_ADDR(IWN_SRVC_DMACHNL), dst);
8001 IWN_WRITE(sc, IWN_FH_TFBD_CTRL0(IWN_SRVC_DMACHNL),
8002 IWN_LOADDR(dma->paddr));
8003 IWN_WRITE(sc, IWN_FH_TFBD_CTRL1(IWN_SRVC_DMACHNL),
8004 IWN_HIADDR(dma->paddr) << 28 | size);
8005 IWN_WRITE(sc, IWN_FH_TXBUF_STATUS(IWN_SRVC_DMACHNL),
8006 IWN_FH_TXBUF_STATUS_TBNUM(1) |
8007 IWN_FH_TXBUF_STATUS_TBIDX(1) |
8008 IWN_FH_TXBUF_STATUS_TFBD_VALID);
8010 /* Kick Flow Handler to start DMA transfer. */
8011 IWN_WRITE(sc, IWN_FH_TX_CONFIG(IWN_SRVC_DMACHNL),
8012 IWN_FH_TX_CONFIG_DMA_ENA | IWN_FH_TX_CONFIG_CIRQ_HOST_ENDTFD);
8016 /* Wait at most five seconds for FH DMA transfer to complete. */
8017 return msleep(sc, &sc->sc_mtx, PCATCH, "iwninit", 5 * hz);
8021 iwn5000_load_firmware(struct iwn_softc *sc)
8023 struct iwn_fw_part *fw;
8026 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8028 /* Load the initialization firmware on first boot only. */
8029 fw = (sc->sc_flags & IWN_FLAG_CALIB_DONE) ?
8030 &sc->fw.main : &sc->fw.init;
8032 error = iwn5000_load_firmware_section(sc, IWN_FW_TEXT_BASE,
8033 fw->text, fw->textsz);
8035 device_printf(sc->sc_dev,
8036 "%s: could not load firmware %s section, error %d\n",
8037 __func__, ".text", error);
8040 error = iwn5000_load_firmware_section(sc, IWN_FW_DATA_BASE,
8041 fw->data, fw->datasz);
8043 device_printf(sc->sc_dev,
8044 "%s: could not load firmware %s section, error %d\n",
8045 __func__, ".data", error);
8049 /* Now press "execute". */
8050 IWN_WRITE(sc, IWN_RESET, 0);
8055 * Extract text and data sections from a legacy firmware image.
8058 iwn_read_firmware_leg(struct iwn_softc *sc, struct iwn_fw_info *fw)
8060 const uint32_t *ptr;
8064 ptr = (const uint32_t *)fw->data;
8065 rev = le32toh(*ptr++);
8067 sc->ucode_rev = rev;
8069 /* Check firmware API version. */
8070 if (IWN_FW_API(rev) <= 1) {
8071 device_printf(sc->sc_dev,
8072 "%s: bad firmware, need API version >=2\n", __func__);
8075 if (IWN_FW_API(rev) >= 3) {
8076 /* Skip build number (version 2 header). */
8080 if (fw->size < hdrlen) {
8081 device_printf(sc->sc_dev, "%s: firmware too short: %zu bytes\n",
8082 __func__, fw->size);
8085 fw->main.textsz = le32toh(*ptr++);
8086 fw->main.datasz = le32toh(*ptr++);
8087 fw->init.textsz = le32toh(*ptr++);
8088 fw->init.datasz = le32toh(*ptr++);
8089 fw->boot.textsz = le32toh(*ptr++);
8091 /* Check that all firmware sections fit. */
8092 if (fw->size < hdrlen + fw->main.textsz + fw->main.datasz +
8093 fw->init.textsz + fw->init.datasz + fw->boot.textsz) {
8094 device_printf(sc->sc_dev, "%s: firmware too short: %zu bytes\n",
8095 __func__, fw->size);
8099 /* Get pointers to firmware sections. */
8100 fw->main.text = (const uint8_t *)ptr;
8101 fw->main.data = fw->main.text + fw->main.textsz;
8102 fw->init.text = fw->main.data + fw->main.datasz;
8103 fw->init.data = fw->init.text + fw->init.textsz;
8104 fw->boot.text = fw->init.data + fw->init.datasz;
8109 * Extract text and data sections from a TLV firmware image.
8112 iwn_read_firmware_tlv(struct iwn_softc *sc, struct iwn_fw_info *fw,
8115 const struct iwn_fw_tlv_hdr *hdr;
8116 const struct iwn_fw_tlv *tlv;
8117 const uint8_t *ptr, *end;
8121 if (fw->size < sizeof (*hdr)) {
8122 device_printf(sc->sc_dev, "%s: firmware too short: %zu bytes\n",
8123 __func__, fw->size);
8126 hdr = (const struct iwn_fw_tlv_hdr *)fw->data;
8127 if (hdr->signature != htole32(IWN_FW_SIGNATURE)) {
8128 device_printf(sc->sc_dev, "%s: bad firmware signature 0x%08x\n",
8129 __func__, le32toh(hdr->signature));
8132 DPRINTF(sc, IWN_DEBUG_RESET, "FW: \"%.64s\", build 0x%x\n", hdr->descr,
8133 le32toh(hdr->build));
8134 sc->ucode_rev = le32toh(hdr->rev);
8137 * Select the closest supported alternative that is less than
8138 * or equal to the specified one.
8140 altmask = le64toh(hdr->altmask);
8141 while (alt > 0 && !(altmask & (1ULL << alt)))
8142 alt--; /* Downgrade. */
8143 DPRINTF(sc, IWN_DEBUG_RESET, "using alternative %d\n", alt);
8145 ptr = (const uint8_t *)(hdr + 1);
8146 end = (const uint8_t *)(fw->data + fw->size);
8148 /* Parse type-length-value fields. */
8149 while (ptr + sizeof (*tlv) <= end) {
8150 tlv = (const struct iwn_fw_tlv *)ptr;
8151 len = le32toh(tlv->len);
8153 ptr += sizeof (*tlv);
8154 if (ptr + len > end) {
8155 device_printf(sc->sc_dev,
8156 "%s: firmware too short: %zu bytes\n", __func__,
8160 /* Skip other alternatives. */
8161 if (tlv->alt != 0 && tlv->alt != htole16(alt))
8164 switch (le16toh(tlv->type)) {
8165 case IWN_FW_TLV_MAIN_TEXT:
8166 fw->main.text = ptr;
8167 fw->main.textsz = len;
8169 case IWN_FW_TLV_MAIN_DATA:
8170 fw->main.data = ptr;
8171 fw->main.datasz = len;
8173 case IWN_FW_TLV_INIT_TEXT:
8174 fw->init.text = ptr;
8175 fw->init.textsz = len;
8177 case IWN_FW_TLV_INIT_DATA:
8178 fw->init.data = ptr;
8179 fw->init.datasz = len;
8181 case IWN_FW_TLV_BOOT_TEXT:
8182 fw->boot.text = ptr;
8183 fw->boot.textsz = len;
8185 case IWN_FW_TLV_ENH_SENS:
8187 sc->sc_flags |= IWN_FLAG_ENH_SENS;
8189 case IWN_FW_TLV_PHY_CALIB:
8190 tmp = le32toh(*ptr);
8192 sc->reset_noise_gain = tmp;
8193 sc->noise_gain = tmp + 1;
8196 case IWN_FW_TLV_PAN:
8197 sc->sc_flags |= IWN_FLAG_PAN_SUPPORT;
8198 DPRINTF(sc, IWN_DEBUG_RESET,
8199 "PAN Support found: %d\n", 1);
8201 case IWN_FW_TLV_FLAGS:
8202 if (len < sizeof(uint32_t))
8204 if (len % sizeof(uint32_t))
8206 sc->tlv_feature_flags = le32toh(*ptr);
8207 DPRINTF(sc, IWN_DEBUG_RESET,
8208 "%s: feature: 0x%08x\n",
8210 sc->tlv_feature_flags);
8212 case IWN_FW_TLV_PBREQ_MAXLEN:
8213 case IWN_FW_TLV_RUNT_EVTLOG_PTR:
8214 case IWN_FW_TLV_RUNT_EVTLOG_SIZE:
8215 case IWN_FW_TLV_RUNT_ERRLOG_PTR:
8216 case IWN_FW_TLV_INIT_EVTLOG_PTR:
8217 case IWN_FW_TLV_INIT_EVTLOG_SIZE:
8218 case IWN_FW_TLV_INIT_ERRLOG_PTR:
8219 case IWN_FW_TLV_WOWLAN_INST:
8220 case IWN_FW_TLV_WOWLAN_DATA:
8221 DPRINTF(sc, IWN_DEBUG_RESET,
8222 "TLV type %d recognized but not handled\n",
8223 le16toh(tlv->type));
8226 DPRINTF(sc, IWN_DEBUG_RESET,
8227 "TLV type %d not handled\n", le16toh(tlv->type));
8230 next: /* TLV fields are 32-bit aligned. */
8231 ptr += (len + 3) & ~3;
8237 iwn_read_firmware(struct iwn_softc *sc)
8239 struct iwn_fw_info *fw = &sc->fw;
8242 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8246 memset(fw, 0, sizeof (*fw));
8248 /* Read firmware image from filesystem. */
8249 sc->fw_fp = firmware_get(sc->fwname);
8250 if (sc->fw_fp == NULL) {
8251 device_printf(sc->sc_dev, "%s: could not read firmware %s\n",
8252 __func__, sc->fwname);
8258 fw->size = sc->fw_fp->datasize;
8259 fw->data = (const uint8_t *)sc->fw_fp->data;
8260 if (fw->size < sizeof (uint32_t)) {
8261 device_printf(sc->sc_dev, "%s: firmware too short: %zu bytes\n",
8262 __func__, fw->size);
8267 /* Retrieve text and data sections. */
8268 if (*(const uint32_t *)fw->data != 0) /* Legacy image. */
8269 error = iwn_read_firmware_leg(sc, fw);
8271 error = iwn_read_firmware_tlv(sc, fw, 1);
8273 device_printf(sc->sc_dev,
8274 "%s: could not read firmware sections, error %d\n",
8279 device_printf(sc->sc_dev, "%s: ucode rev=0x%08x\n", __func__, sc->ucode_rev);
8281 /* Make sure text and data sections fit in hardware memory. */
8282 if (fw->main.textsz > sc->fw_text_maxsz ||
8283 fw->main.datasz > sc->fw_data_maxsz ||
8284 fw->init.textsz > sc->fw_text_maxsz ||
8285 fw->init.datasz > sc->fw_data_maxsz ||
8286 fw->boot.textsz > IWN_FW_BOOT_TEXT_MAXSZ ||
8287 (fw->boot.textsz & 3) != 0) {
8288 device_printf(sc->sc_dev, "%s: firmware sections too large\n",
8294 /* We can proceed with loading the firmware. */
8297 fail: iwn_unload_firmware(sc);
8302 iwn_unload_firmware(struct iwn_softc *sc)
8304 firmware_put(sc->fw_fp, FIRMWARE_UNLOAD);
8309 iwn_clock_wait(struct iwn_softc *sc)
8313 /* Set "initialization complete" bit. */
8314 IWN_SETBITS(sc, IWN_GP_CNTRL, IWN_GP_CNTRL_INIT_DONE);
8316 /* Wait for clock stabilization. */
8317 for (ntries = 0; ntries < 2500; ntries++) {
8318 if (IWN_READ(sc, IWN_GP_CNTRL) & IWN_GP_CNTRL_MAC_CLOCK_READY)
8322 device_printf(sc->sc_dev,
8323 "%s: timeout waiting for clock stabilization\n", __func__);
8328 iwn_apm_init(struct iwn_softc *sc)
8333 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8335 /* Disable L0s exit timer (NMI bug workaround). */
8336 IWN_SETBITS(sc, IWN_GIO_CHICKEN, IWN_GIO_CHICKEN_DIS_L0S_TIMER);
8337 /* Don't wait for ICH L0s (ICH bug workaround). */
8338 IWN_SETBITS(sc, IWN_GIO_CHICKEN, IWN_GIO_CHICKEN_L1A_NO_L0S_RX);
8340 /* Set FH wait threshold to max (HW bug under stress workaround). */
8341 IWN_SETBITS(sc, IWN_DBG_HPET_MEM, 0xffff0000);
8343 /* Enable HAP INTA to move adapter from L1a to L0s. */
8344 IWN_SETBITS(sc, IWN_HW_IF_CONFIG, IWN_HW_IF_CONFIG_HAP_WAKE_L1A);
8346 /* Retrieve PCIe Active State Power Management (ASPM). */
8347 reg = pci_read_config(sc->sc_dev, sc->sc_cap_off + PCIER_LINK_CTL, 4);
8348 /* Workaround for HW instability in PCIe L0->L0s->L1 transition. */
8349 if (reg & PCIEM_LINK_CTL_ASPMC_L1) /* L1 Entry enabled. */
8350 IWN_SETBITS(sc, IWN_GIO, IWN_GIO_L0S_ENA);
8352 IWN_CLRBITS(sc, IWN_GIO, IWN_GIO_L0S_ENA);
8354 if (sc->base_params->pll_cfg_val)
8355 IWN_SETBITS(sc, IWN_ANA_PLL, sc->base_params->pll_cfg_val);
8357 /* Wait for clock stabilization before accessing prph. */
8358 if ((error = iwn_clock_wait(sc)) != 0)
8361 if ((error = iwn_nic_lock(sc)) != 0)
8363 if (sc->hw_type == IWN_HW_REV_TYPE_4965) {
8364 /* Enable DMA and BSM (Bootstrap State Machine). */
8365 iwn_prph_write(sc, IWN_APMG_CLK_EN,
8366 IWN_APMG_CLK_CTRL_DMA_CLK_RQT |
8367 IWN_APMG_CLK_CTRL_BSM_CLK_RQT);
8370 iwn_prph_write(sc, IWN_APMG_CLK_EN,
8371 IWN_APMG_CLK_CTRL_DMA_CLK_RQT);
8374 /* Disable L1-Active. */
8375 iwn_prph_setbits(sc, IWN_APMG_PCI_STT, IWN_APMG_PCI_STT_L1A_DIS);
8382 iwn_apm_stop_master(struct iwn_softc *sc)
8386 /* Stop busmaster DMA activity. */
8387 IWN_SETBITS(sc, IWN_RESET, IWN_RESET_STOP_MASTER);
8388 for (ntries = 0; ntries < 100; ntries++) {
8389 if (IWN_READ(sc, IWN_RESET) & IWN_RESET_MASTER_DISABLED)
8393 device_printf(sc->sc_dev, "%s: timeout waiting for master\n", __func__);
8397 iwn_apm_stop(struct iwn_softc *sc)
8399 iwn_apm_stop_master(sc);
8401 /* Reset the entire device. */
8402 IWN_SETBITS(sc, IWN_RESET, IWN_RESET_SW);
8404 /* Clear "initialization complete" bit. */
8405 IWN_CLRBITS(sc, IWN_GP_CNTRL, IWN_GP_CNTRL_INIT_DONE);
8409 iwn4965_nic_config(struct iwn_softc *sc)
8411 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8413 if (IWN_RFCFG_TYPE(sc->rfcfg) == 1) {
8415 * I don't believe this to be correct but this is what the
8416 * vendor driver is doing. Probably the bits should not be
8417 * shifted in IWN_RFCFG_*.
8419 IWN_SETBITS(sc, IWN_HW_IF_CONFIG,
8420 IWN_RFCFG_TYPE(sc->rfcfg) |
8421 IWN_RFCFG_STEP(sc->rfcfg) |
8422 IWN_RFCFG_DASH(sc->rfcfg));
8424 IWN_SETBITS(sc, IWN_HW_IF_CONFIG,
8425 IWN_HW_IF_CONFIG_RADIO_SI | IWN_HW_IF_CONFIG_MAC_SI);
8430 iwn5000_nic_config(struct iwn_softc *sc)
8435 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8437 if (IWN_RFCFG_TYPE(sc->rfcfg) < 3) {
8438 IWN_SETBITS(sc, IWN_HW_IF_CONFIG,
8439 IWN_RFCFG_TYPE(sc->rfcfg) |
8440 IWN_RFCFG_STEP(sc->rfcfg) |
8441 IWN_RFCFG_DASH(sc->rfcfg));
8443 IWN_SETBITS(sc, IWN_HW_IF_CONFIG,
8444 IWN_HW_IF_CONFIG_RADIO_SI | IWN_HW_IF_CONFIG_MAC_SI);
8446 if ((error = iwn_nic_lock(sc)) != 0)
8448 iwn_prph_setbits(sc, IWN_APMG_PS, IWN_APMG_PS_EARLY_PWROFF_DIS);
8450 if (sc->hw_type == IWN_HW_REV_TYPE_1000) {
8452 * Select first Switching Voltage Regulator (1.32V) to
8453 * solve a stability issue related to noisy DC2DC line
8454 * in the silicon of 1000 Series.
8456 tmp = iwn_prph_read(sc, IWN_APMG_DIGITAL_SVR);
8457 tmp &= ~IWN_APMG_DIGITAL_SVR_VOLTAGE_MASK;
8458 tmp |= IWN_APMG_DIGITAL_SVR_VOLTAGE_1_32;
8459 iwn_prph_write(sc, IWN_APMG_DIGITAL_SVR, tmp);
8463 if (sc->sc_flags & IWN_FLAG_INTERNAL_PA) {
8464 /* Use internal power amplifier only. */
8465 IWN_WRITE(sc, IWN_GP_DRIVER, IWN_GP_DRIVER_RADIO_2X2_IPA);
8467 if (sc->base_params->additional_nic_config && sc->calib_ver >= 6) {
8468 /* Indicate that ROM calibration version is >=6. */
8469 IWN_SETBITS(sc, IWN_GP_DRIVER, IWN_GP_DRIVER_CALIB_VER6);
8471 if (sc->base_params->additional_gp_drv_bit)
8472 IWN_SETBITS(sc, IWN_GP_DRIVER,
8473 sc->base_params->additional_gp_drv_bit);
8478 * Take NIC ownership over Intel Active Management Technology (AMT).
8481 iwn_hw_prepare(struct iwn_softc *sc)
8485 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8487 /* Check if hardware is ready. */
8488 IWN_SETBITS(sc, IWN_HW_IF_CONFIG, IWN_HW_IF_CONFIG_NIC_READY);
8489 for (ntries = 0; ntries < 5; ntries++) {
8490 if (IWN_READ(sc, IWN_HW_IF_CONFIG) &
8491 IWN_HW_IF_CONFIG_NIC_READY)
8496 /* Hardware not ready, force into ready state. */
8497 IWN_SETBITS(sc, IWN_HW_IF_CONFIG, IWN_HW_IF_CONFIG_PREPARE);
8498 for (ntries = 0; ntries < 15000; ntries++) {
8499 if (!(IWN_READ(sc, IWN_HW_IF_CONFIG) &
8500 IWN_HW_IF_CONFIG_PREPARE_DONE))
8504 if (ntries == 15000)
8507 /* Hardware should be ready now. */
8508 IWN_SETBITS(sc, IWN_HW_IF_CONFIG, IWN_HW_IF_CONFIG_NIC_READY);
8509 for (ntries = 0; ntries < 5; ntries++) {
8510 if (IWN_READ(sc, IWN_HW_IF_CONFIG) &
8511 IWN_HW_IF_CONFIG_NIC_READY)
8519 iwn_hw_init(struct iwn_softc *sc)
8521 struct iwn_ops *ops = &sc->ops;
8522 int error, chnl, qid;
8524 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
8526 /* Clear pending interrupts. */
8527 IWN_WRITE(sc, IWN_INT, 0xffffffff);
8529 if ((error = iwn_apm_init(sc)) != 0) {
8530 device_printf(sc->sc_dev,
8531 "%s: could not power ON adapter, error %d\n", __func__,
8536 /* Select VMAIN power source. */
8537 if ((error = iwn_nic_lock(sc)) != 0)
8539 iwn_prph_clrbits(sc, IWN_APMG_PS, IWN_APMG_PS_PWR_SRC_MASK);
8542 /* Perform adapter-specific initialization. */
8543 if ((error = ops->nic_config(sc)) != 0)
8546 /* Initialize RX ring. */
8547 if ((error = iwn_nic_lock(sc)) != 0)
8549 IWN_WRITE(sc, IWN_FH_RX_CONFIG, 0);
8550 IWN_WRITE(sc, IWN_FH_RX_WPTR, 0);
8551 /* Set physical address of RX ring (256-byte aligned). */
8552 IWN_WRITE(sc, IWN_FH_RX_BASE, sc->rxq.desc_dma.paddr >> 8);
8553 /* Set physical address of RX status (16-byte aligned). */
8554 IWN_WRITE(sc, IWN_FH_STATUS_WPTR, sc->rxq.stat_dma.paddr >> 4);
8556 IWN_WRITE(sc, IWN_FH_RX_CONFIG,
8557 IWN_FH_RX_CONFIG_ENA |
8558 IWN_FH_RX_CONFIG_IGN_RXF_EMPTY | /* HW bug workaround */
8559 IWN_FH_RX_CONFIG_IRQ_DST_HOST |
8560 IWN_FH_RX_CONFIG_SINGLE_FRAME |
8561 IWN_FH_RX_CONFIG_RB_TIMEOUT(0) |
8562 IWN_FH_RX_CONFIG_NRBD(IWN_RX_RING_COUNT_LOG));
8564 IWN_WRITE(sc, IWN_FH_RX_WPTR, (IWN_RX_RING_COUNT - 1) & ~7);
8566 if ((error = iwn_nic_lock(sc)) != 0)
8569 /* Initialize TX scheduler. */
8570 iwn_prph_write(sc, sc->sched_txfact_addr, 0);
8572 /* Set physical address of "keep warm" page (16-byte aligned). */
8573 IWN_WRITE(sc, IWN_FH_KW_ADDR, sc->kw_dma.paddr >> 4);
8575 /* Initialize TX rings. */
8576 for (qid = 0; qid < sc->ntxqs; qid++) {
8577 struct iwn_tx_ring *txq = &sc->txq[qid];
8579 /* Set physical address of TX ring (256-byte aligned). */
8580 IWN_WRITE(sc, IWN_FH_CBBC_QUEUE(qid),
8581 txq->desc_dma.paddr >> 8);
8585 /* Enable DMA channels. */
8586 for (chnl = 0; chnl < sc->ndmachnls; chnl++) {
8587 IWN_WRITE(sc, IWN_FH_TX_CONFIG(chnl),
8588 IWN_FH_TX_CONFIG_DMA_ENA |
8589 IWN_FH_TX_CONFIG_DMA_CREDIT_ENA);
8592 /* Clear "radio off" and "commands blocked" bits. */
8593 IWN_WRITE(sc, IWN_UCODE_GP1_CLR, IWN_UCODE_GP1_RFKILL);
8594 IWN_WRITE(sc, IWN_UCODE_GP1_CLR, IWN_UCODE_GP1_CMD_BLOCKED);
8596 /* Clear pending interrupts. */
8597 IWN_WRITE(sc, IWN_INT, 0xffffffff);
8598 /* Enable interrupt coalescing. */
8599 IWN_WRITE(sc, IWN_INT_COALESCING, 512 / 8);
8600 /* Enable interrupts. */
8601 IWN_WRITE(sc, IWN_INT_MASK, sc->int_mask);
8603 /* _Really_ make sure "radio off" bit is cleared! */
8604 IWN_WRITE(sc, IWN_UCODE_GP1_CLR, IWN_UCODE_GP1_RFKILL);
8605 IWN_WRITE(sc, IWN_UCODE_GP1_CLR, IWN_UCODE_GP1_RFKILL);
8607 /* Enable shadow registers. */
8608 if (sc->base_params->shadow_reg_enable)
8609 IWN_SETBITS(sc, IWN_SHADOW_REG_CTRL, 0x800fffff);
8611 if ((error = ops->load_firmware(sc)) != 0) {
8612 device_printf(sc->sc_dev,
8613 "%s: could not load firmware, error %d\n", __func__,
8617 /* Wait at most one second for firmware alive notification. */
8618 if ((error = msleep(sc, &sc->sc_mtx, PCATCH, "iwninit", hz)) != 0) {
8619 device_printf(sc->sc_dev,
8620 "%s: timeout waiting for adapter to initialize, error %d\n",
8624 /* Do post-firmware initialization. */
8626 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
8628 return ops->post_alive(sc);
8632 iwn_hw_stop(struct iwn_softc *sc)
8634 int chnl, qid, ntries;
8636 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8638 IWN_WRITE(sc, IWN_RESET, IWN_RESET_NEVO);
8640 /* Disable interrupts. */
8641 IWN_WRITE(sc, IWN_INT_MASK, 0);
8642 IWN_WRITE(sc, IWN_INT, 0xffffffff);
8643 IWN_WRITE(sc, IWN_FH_INT, 0xffffffff);
8644 sc->sc_flags &= ~IWN_FLAG_USE_ICT;
8646 /* Make sure we no longer hold the NIC lock. */
8649 /* Stop TX scheduler. */
8650 iwn_prph_write(sc, sc->sched_txfact_addr, 0);
8652 /* Stop all DMA channels. */
8653 if (iwn_nic_lock(sc) == 0) {
8654 for (chnl = 0; chnl < sc->ndmachnls; chnl++) {
8655 IWN_WRITE(sc, IWN_FH_TX_CONFIG(chnl), 0);
8656 for (ntries = 0; ntries < 200; ntries++) {
8657 if (IWN_READ(sc, IWN_FH_TX_STATUS) &
8658 IWN_FH_TX_STATUS_IDLE(chnl))
8667 iwn_reset_rx_ring(sc, &sc->rxq);
8669 /* Reset all TX rings. */
8670 for (qid = 0; qid < sc->ntxqs; qid++)
8671 iwn_reset_tx_ring(sc, &sc->txq[qid]);
8673 if (iwn_nic_lock(sc) == 0) {
8674 iwn_prph_write(sc, IWN_APMG_CLK_DIS,
8675 IWN_APMG_CLK_CTRL_DMA_CLK_RQT);
8679 /* Power OFF adapter. */
8684 iwn_radio_on(void *arg0, int pending)
8686 struct iwn_softc *sc = arg0;
8687 struct ieee80211com *ic = &sc->sc_ic;
8688 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
8690 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8694 ieee80211_init(vap);
8699 iwn_radio_off(void *arg0, int pending)
8701 struct iwn_softc *sc = arg0;
8702 struct ieee80211com *ic = &sc->sc_ic;
8703 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
8705 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8709 ieee80211_stop(vap);
8711 /* Enable interrupts to get RF toggle notification. */
8713 IWN_WRITE(sc, IWN_INT, 0xffffffff);
8714 IWN_WRITE(sc, IWN_INT_MASK, sc->int_mask);
8719 iwn_panicked(void *arg0, int pending)
8721 struct iwn_softc *sc = arg0;
8722 struct ieee80211com *ic = &sc->sc_ic;
8723 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
8729 printf("%s: null vap\n", __func__);
8733 device_printf(sc->sc_dev, "%s: controller panicked, iv_state = %d; "
8734 "restarting\n", __func__, vap->iv_state);
8737 * This is not enough work. We need to also reinitialise
8738 * the correct transmit state for aggregation enabled queues,
8739 * which has a very specific requirement of
8740 * ring index = 802.11 seqno % 256. If we don't do this (which
8741 * we definitely don't!) then the firmware will just panic again.
8744 ieee80211_restart_all(ic);
8748 iwn_stop_locked(sc);
8749 iwn_init_locked(sc);
8750 if (vap->iv_state >= IEEE80211_S_AUTH &&
8751 (error = iwn_auth(sc, vap)) != 0) {
8752 device_printf(sc->sc_dev,
8753 "%s: could not move to auth state\n", __func__);
8755 if (vap->iv_state >= IEEE80211_S_RUN &&
8756 (error = iwn_run(sc, vap)) != 0) {
8757 device_printf(sc->sc_dev,
8758 "%s: could not move to run state\n", __func__);
8766 iwn_init_locked(struct iwn_softc *sc)
8770 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
8772 IWN_LOCK_ASSERT(sc);
8774 sc->sc_flags |= IWN_FLAG_RUNNING;
8776 if ((error = iwn_hw_prepare(sc)) != 0) {
8777 device_printf(sc->sc_dev, "%s: hardware not ready, error %d\n",
8782 /* Initialize interrupt mask to default value. */
8783 sc->int_mask = IWN_INT_MASK_DEF;
8784 sc->sc_flags &= ~IWN_FLAG_USE_ICT;
8786 /* Check that the radio is not disabled by hardware switch. */
8787 if (!(IWN_READ(sc, IWN_GP_CNTRL) & IWN_GP_CNTRL_RFKILL)) {
8788 device_printf(sc->sc_dev,
8789 "radio is disabled by hardware switch\n");
8790 /* Enable interrupts to get RF toggle notifications. */
8791 IWN_WRITE(sc, IWN_INT, 0xffffffff);
8792 IWN_WRITE(sc, IWN_INT_MASK, sc->int_mask);
8796 /* Read firmware images from the filesystem. */
8797 if ((error = iwn_read_firmware(sc)) != 0) {
8798 device_printf(sc->sc_dev,
8799 "%s: could not read firmware, error %d\n", __func__,
8804 /* Initialize hardware and upload firmware. */
8805 error = iwn_hw_init(sc);
8806 iwn_unload_firmware(sc);
8808 device_printf(sc->sc_dev,
8809 "%s: could not initialize hardware, error %d\n", __func__,
8814 /* Configure adapter now that it is ready. */
8815 if ((error = iwn_config(sc)) != 0) {
8816 device_printf(sc->sc_dev,
8817 "%s: could not configure device, error %d\n", __func__,
8822 callout_reset(&sc->watchdog_to, hz, iwn_watchdog, sc);
8824 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
8829 sc->sc_flags &= ~IWN_FLAG_RUNNING;
8830 iwn_stop_locked(sc);
8831 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end in error\n",__func__);
8835 iwn_init(struct iwn_softc *sc)
8839 iwn_init_locked(sc);
8842 if (sc->sc_flags & IWN_FLAG_RUNNING)
8843 ieee80211_start_all(&sc->sc_ic);
8847 iwn_stop_locked(struct iwn_softc *sc)
8850 IWN_LOCK_ASSERT(sc);
8852 sc->sc_is_scanning = 0;
8853 sc->sc_tx_timer = 0;
8854 callout_stop(&sc->watchdog_to);
8855 callout_stop(&sc->calib_to);
8856 sc->sc_flags &= ~IWN_FLAG_RUNNING;
8858 /* Power OFF hardware. */
8863 iwn_stop(struct iwn_softc *sc)
8866 iwn_stop_locked(sc);
8871 * Callback from net80211 to start a scan.
8874 iwn_scan_start(struct ieee80211com *ic)
8876 struct iwn_softc *sc = ic->ic_softc;
8879 /* make the link LED blink while we're scanning */
8880 iwn_set_led(sc, IWN_LED_LINK, 20, 2);
8885 * Callback from net80211 to terminate a scan.
8888 iwn_scan_end(struct ieee80211com *ic)
8890 struct iwn_softc *sc = ic->ic_softc;
8891 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
8894 if (vap->iv_state == IEEE80211_S_RUN) {
8895 /* Set link LED to ON status if we are associated */
8896 iwn_set_led(sc, IWN_LED_LINK, 0, 1);
8902 * Callback from net80211 to force a channel change.
8905 iwn_set_channel(struct ieee80211com *ic)
8907 const struct ieee80211_channel *c = ic->ic_curchan;
8908 struct iwn_softc *sc = ic->ic_softc;
8911 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8914 sc->sc_rxtap.wr_chan_freq = htole16(c->ic_freq);
8915 sc->sc_rxtap.wr_chan_flags = htole16(c->ic_flags);
8916 sc->sc_txtap.wt_chan_freq = htole16(c->ic_freq);
8917 sc->sc_txtap.wt_chan_flags = htole16(c->ic_flags);
8920 * Only need to set the channel in Monitor mode. AP scanning and auth
8921 * are already taken care of by their respective firmware commands.
8923 if (ic->ic_opmode == IEEE80211_M_MONITOR) {
8924 error = iwn_config(sc);
8926 device_printf(sc->sc_dev,
8927 "%s: error %d settting channel\n", __func__, error);
8933 * Callback from net80211 to start scanning of the current channel.
8936 iwn_scan_curchan(struct ieee80211_scan_state *ss, unsigned long maxdwell)
8938 struct ieee80211vap *vap = ss->ss_vap;
8939 struct ieee80211com *ic = vap->iv_ic;
8940 struct iwn_softc *sc = ic->ic_softc;
8944 error = iwn_scan(sc, vap, ss, ic->ic_curchan);
8947 ieee80211_cancel_scan(vap);
8951 * Callback from net80211 to handle the minimum dwell time being met.
8952 * The intent is to terminate the scan but we just let the firmware
8953 * notify us when it's finished as we have no safe way to abort it.
8956 iwn_scan_mindwell(struct ieee80211_scan_state *ss)
8958 /* NB: don't try to abort scan; wait for firmware to finish */
8961 #define IWN_DESC(x) case x: return #x
8964 * Translate CSR code to string
8966 static char *iwn_get_csr_string(int csr)
8969 IWN_DESC(IWN_HW_IF_CONFIG);
8970 IWN_DESC(IWN_INT_COALESCING);
8972 IWN_DESC(IWN_INT_MASK);
8973 IWN_DESC(IWN_FH_INT);
8974 IWN_DESC(IWN_GPIO_IN);
8975 IWN_DESC(IWN_RESET);
8976 IWN_DESC(IWN_GP_CNTRL);
8977 IWN_DESC(IWN_HW_REV);
8978 IWN_DESC(IWN_EEPROM);
8979 IWN_DESC(IWN_EEPROM_GP);
8980 IWN_DESC(IWN_OTP_GP);
8982 IWN_DESC(IWN_GP_UCODE);
8983 IWN_DESC(IWN_GP_DRIVER);
8984 IWN_DESC(IWN_UCODE_GP1);
8985 IWN_DESC(IWN_UCODE_GP2);
8987 IWN_DESC(IWN_DRAM_INT_TBL);
8988 IWN_DESC(IWN_GIO_CHICKEN);
8989 IWN_DESC(IWN_ANA_PLL);
8990 IWN_DESC(IWN_HW_REV_WA);
8991 IWN_DESC(IWN_DBG_HPET_MEM);
8993 return "UNKNOWN CSR";
8998 * This function print firmware register
9001 iwn_debug_register(struct iwn_softc *sc)
9004 static const uint32_t csr_tbl[] = {
9029 DPRINTF(sc, IWN_DEBUG_REGISTER,
9030 "CSR values: (2nd byte of IWN_INT_COALESCING is IWN_INT_PERIODIC)%s",
9032 for (i = 0; i < nitems(csr_tbl); i++){
9033 DPRINTF(sc, IWN_DEBUG_REGISTER," %10s: 0x%08x ",
9034 iwn_get_csr_string(csr_tbl[i]), IWN_READ(sc, csr_tbl[i]));
9036 DPRINTF(sc, IWN_DEBUG_REGISTER,"%s","\n");
9038 DPRINTF(sc, IWN_DEBUG_REGISTER,"%s","\n");