2 * Copyright (c) 2007-2009 Damien Bergamini <damien.bergamini@free.fr>
3 * Copyright (c) 2008 Benjamin Close <benjsc@FreeBSD.org>
4 * Copyright (c) 2008 Sam Leffler, Errno Consulting
5 * Copyright (c) 2011 Intel Corporation
6 * Copyright (c) 2013 Cedric GROSS <c.gross@kreiz-it.fr>
7 * Copyright (c) 2013 Adrian Chadd <adrian@FreeBSD.org>
9 * Permission to use, copy, modify, and distribute this software for any
10 * purpose with or without fee is hereby granted, provided that the above
11 * copyright notice and this permission notice appear in all copies.
13 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
14 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
15 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
16 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
17 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
18 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
19 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
23 * Driver for Intel WiFi Link 4965 and 1000/5000/6000 Series 802.11 network
27 #include <sys/cdefs.h>
28 __FBSDID("$FreeBSD$");
33 #include <sys/param.h>
34 #include <sys/sockio.h>
35 #include <sys/sysctl.h>
37 #include <sys/kernel.h>
38 #include <sys/socket.h>
39 #include <sys/systm.h>
40 #include <sys/malloc.h>
44 #include <sys/endian.h>
45 #include <sys/firmware.h>
46 #include <sys/limits.h>
47 #include <sys/module.h>
49 #include <sys/queue.h>
50 #include <sys/taskqueue.h>
52 #include <machine/bus.h>
53 #include <machine/resource.h>
54 #include <machine/clock.h>
56 #include <dev/pci/pcireg.h>
57 #include <dev/pci/pcivar.h>
60 #include <net/if_var.h>
61 #include <net/if_dl.h>
62 #include <net/if_media.h>
64 #include <netinet/in.h>
65 #include <netinet/if_ether.h>
67 #include <net80211/ieee80211_var.h>
68 #include <net80211/ieee80211_radiotap.h>
69 #include <net80211/ieee80211_regdomain.h>
70 #include <net80211/ieee80211_ratectl.h>
72 #include <dev/iwn/if_iwnreg.h>
73 #include <dev/iwn/if_iwnvar.h>
74 #include <dev/iwn/if_iwn_devid.h>
75 #include <dev/iwn/if_iwn_chip_cfg.h>
76 #include <dev/iwn/if_iwn_debug.h>
77 #include <dev/iwn/if_iwn_ioctl.h>
85 static const struct iwn_ident iwn_ident_table[] = {
86 { 0x8086, IWN_DID_6x05_1, "Intel Centrino Advanced-N 6205" },
87 { 0x8086, IWN_DID_1000_1, "Intel Centrino Wireless-N 1000" },
88 { 0x8086, IWN_DID_1000_2, "Intel Centrino Wireless-N 1000" },
89 { 0x8086, IWN_DID_6x05_2, "Intel Centrino Advanced-N 6205" },
90 { 0x8086, IWN_DID_6050_1, "Intel Centrino Advanced-N + WiMAX 6250" },
91 { 0x8086, IWN_DID_6050_2, "Intel Centrino Advanced-N + WiMAX 6250" },
92 { 0x8086, IWN_DID_x030_1, "Intel Centrino Wireless-N 1030" },
93 { 0x8086, IWN_DID_x030_2, "Intel Centrino Wireless-N 1030" },
94 { 0x8086, IWN_DID_x030_3, "Intel Centrino Advanced-N 6230" },
95 { 0x8086, IWN_DID_x030_4, "Intel Centrino Advanced-N 6230" },
96 { 0x8086, IWN_DID_6150_1, "Intel Centrino Wireless-N + WiMAX 6150" },
97 { 0x8086, IWN_DID_6150_2, "Intel Centrino Wireless-N + WiMAX 6150" },
98 { 0x8086, IWN_DID_2x00_1, "Intel(R) Centrino(R) Wireless-N 2200 BGN" },
99 { 0x8086, IWN_DID_2x00_2, "Intel(R) Centrino(R) Wireless-N 2200 BGN" },
100 /* XXX 2200D is IWN_SDID_2x00_4; there's no way to express this here! */
101 { 0x8086, IWN_DID_2x30_1, "Intel Centrino Wireless-N 2230" },
102 { 0x8086, IWN_DID_2x30_2, "Intel Centrino Wireless-N 2230" },
103 { 0x8086, IWN_DID_130_1, "Intel Centrino Wireless-N 130" },
104 { 0x8086, IWN_DID_130_2, "Intel Centrino Wireless-N 130" },
105 { 0x8086, IWN_DID_100_1, "Intel Centrino Wireless-N 100" },
106 { 0x8086, IWN_DID_100_2, "Intel Centrino Wireless-N 100" },
107 { 0x8086, IWN_DID_105_1, "Intel Centrino Wireless-N 105" },
108 { 0x8086, IWN_DID_105_2, "Intel Centrino Wireless-N 105" },
109 { 0x8086, IWN_DID_135_1, "Intel Centrino Wireless-N 135" },
110 { 0x8086, IWN_DID_135_2, "Intel Centrino Wireless-N 135" },
111 { 0x8086, IWN_DID_4965_1, "Intel Wireless WiFi Link 4965" },
112 { 0x8086, IWN_DID_6x00_1, "Intel Centrino Ultimate-N 6300" },
113 { 0x8086, IWN_DID_6x00_2, "Intel Centrino Advanced-N 6200" },
114 { 0x8086, IWN_DID_4965_2, "Intel Wireless WiFi Link 4965" },
115 { 0x8086, IWN_DID_4965_3, "Intel Wireless WiFi Link 4965" },
116 { 0x8086, IWN_DID_5x00_1, "Intel WiFi Link 5100" },
117 { 0x8086, IWN_DID_4965_4, "Intel Wireless WiFi Link 4965" },
118 { 0x8086, IWN_DID_5x00_3, "Intel Ultimate N WiFi Link 5300" },
119 { 0x8086, IWN_DID_5x00_4, "Intel Ultimate N WiFi Link 5300" },
120 { 0x8086, IWN_DID_5x00_2, "Intel WiFi Link 5100" },
121 { 0x8086, IWN_DID_6x00_3, "Intel Centrino Ultimate-N 6300" },
122 { 0x8086, IWN_DID_6x00_4, "Intel Centrino Advanced-N 6200" },
123 { 0x8086, IWN_DID_5x50_1, "Intel WiMAX/WiFi Link 5350" },
124 { 0x8086, IWN_DID_5x50_2, "Intel WiMAX/WiFi Link 5350" },
125 { 0x8086, IWN_DID_5x50_3, "Intel WiMAX/WiFi Link 5150" },
126 { 0x8086, IWN_DID_5x50_4, "Intel WiMAX/WiFi Link 5150" },
127 { 0x8086, IWN_DID_6035_1, "Intel Centrino Advanced 6235" },
128 { 0x8086, IWN_DID_6035_2, "Intel Centrino Advanced 6235" },
132 static int iwn_probe(device_t);
133 static int iwn_attach(device_t);
134 static void iwn4965_attach(struct iwn_softc *, uint16_t);
135 static void iwn5000_attach(struct iwn_softc *, uint16_t);
136 static int iwn_config_specific(struct iwn_softc *, uint16_t);
137 static void iwn_radiotap_attach(struct iwn_softc *);
138 static void iwn_sysctlattach(struct iwn_softc *);
139 static struct ieee80211vap *iwn_vap_create(struct ieee80211com *,
140 const char [IFNAMSIZ], int, enum ieee80211_opmode, int,
141 const uint8_t [IEEE80211_ADDR_LEN],
142 const uint8_t [IEEE80211_ADDR_LEN]);
143 static void iwn_vap_delete(struct ieee80211vap *);
144 static int iwn_detach(device_t);
145 static int iwn_shutdown(device_t);
146 static int iwn_suspend(device_t);
147 static int iwn_resume(device_t);
148 static int iwn_nic_lock(struct iwn_softc *);
149 static int iwn_eeprom_lock(struct iwn_softc *);
150 static int iwn_init_otprom(struct iwn_softc *);
151 static int iwn_read_prom_data(struct iwn_softc *, uint32_t, void *, int);
152 static void iwn_dma_map_addr(void *, bus_dma_segment_t *, int, int);
153 static int iwn_dma_contig_alloc(struct iwn_softc *, struct iwn_dma_info *,
154 void **, bus_size_t, bus_size_t);
155 static void iwn_dma_contig_free(struct iwn_dma_info *);
156 static int iwn_alloc_sched(struct iwn_softc *);
157 static void iwn_free_sched(struct iwn_softc *);
158 static int iwn_alloc_kw(struct iwn_softc *);
159 static void iwn_free_kw(struct iwn_softc *);
160 static int iwn_alloc_ict(struct iwn_softc *);
161 static void iwn_free_ict(struct iwn_softc *);
162 static int iwn_alloc_fwmem(struct iwn_softc *);
163 static void iwn_free_fwmem(struct iwn_softc *);
164 static int iwn_alloc_rx_ring(struct iwn_softc *, struct iwn_rx_ring *);
165 static void iwn_reset_rx_ring(struct iwn_softc *, struct iwn_rx_ring *);
166 static void iwn_free_rx_ring(struct iwn_softc *, struct iwn_rx_ring *);
167 static int iwn_alloc_tx_ring(struct iwn_softc *, struct iwn_tx_ring *,
169 static void iwn_reset_tx_ring(struct iwn_softc *, struct iwn_tx_ring *);
170 static void iwn_free_tx_ring(struct iwn_softc *, struct iwn_tx_ring *);
171 static void iwn_check_tx_ring(struct iwn_softc *, int);
172 static void iwn5000_ict_reset(struct iwn_softc *);
173 static int iwn_read_eeprom(struct iwn_softc *,
174 uint8_t macaddr[IEEE80211_ADDR_LEN]);
175 static void iwn4965_read_eeprom(struct iwn_softc *);
177 static void iwn4965_print_power_group(struct iwn_softc *, int);
179 static void iwn5000_read_eeprom(struct iwn_softc *);
180 static uint32_t iwn_eeprom_channel_flags(struct iwn_eeprom_chan *);
181 static void iwn_read_eeprom_band(struct iwn_softc *, int, int, int *,
182 struct ieee80211_channel[]);
183 static void iwn_read_eeprom_ht40(struct iwn_softc *, int, int, int *,
184 struct ieee80211_channel[]);
185 static void iwn_read_eeprom_channels(struct iwn_softc *, int, uint32_t);
186 static struct iwn_eeprom_chan *iwn_find_eeprom_channel(struct iwn_softc *,
187 struct ieee80211_channel *);
188 static void iwn_getradiocaps(struct ieee80211com *, int, int *,
189 struct ieee80211_channel[]);
190 static int iwn_setregdomain(struct ieee80211com *,
191 struct ieee80211_regdomain *, int,
192 struct ieee80211_channel[]);
193 static void iwn_read_eeprom_enhinfo(struct iwn_softc *);
194 static struct ieee80211_node *iwn_node_alloc(struct ieee80211vap *,
195 const uint8_t mac[IEEE80211_ADDR_LEN]);
196 static void iwn_newassoc(struct ieee80211_node *, int);
197 static int iwn_media_change(struct ifnet *);
198 static int iwn_newstate(struct ieee80211vap *, enum ieee80211_state, int);
199 static void iwn_calib_timeout(void *);
200 static void iwn_rx_phy(struct iwn_softc *, struct iwn_rx_desc *);
201 static void iwn_rx_done(struct iwn_softc *, struct iwn_rx_desc *,
202 struct iwn_rx_data *);
203 static void iwn_agg_tx_complete(struct iwn_softc *, struct iwn_tx_ring *,
205 static void iwn_rx_compressed_ba(struct iwn_softc *, struct iwn_rx_desc *);
206 static void iwn5000_rx_calib_results(struct iwn_softc *,
207 struct iwn_rx_desc *);
208 static void iwn_rx_statistics(struct iwn_softc *, struct iwn_rx_desc *);
209 static void iwn4965_tx_done(struct iwn_softc *, struct iwn_rx_desc *,
210 struct iwn_rx_data *);
211 static void iwn5000_tx_done(struct iwn_softc *, struct iwn_rx_desc *,
212 struct iwn_rx_data *);
213 static void iwn_adj_ampdu_ptr(struct iwn_softc *, struct iwn_tx_ring *);
214 static void iwn_tx_done(struct iwn_softc *, struct iwn_rx_desc *, int, int,
216 static int iwn_ampdu_check_bitmap(uint64_t, int, int);
217 static int iwn_ampdu_index_check(struct iwn_softc *, struct iwn_tx_ring *,
219 static void iwn_ampdu_tx_done(struct iwn_softc *, int, int, int, void *);
220 static void iwn_cmd_done(struct iwn_softc *, struct iwn_rx_desc *);
221 static void iwn_notif_intr(struct iwn_softc *);
222 static void iwn_wakeup_intr(struct iwn_softc *);
223 static void iwn_rftoggle_task(void *, int);
224 static void iwn_fatal_intr(struct iwn_softc *);
225 static void iwn_intr(void *);
226 static void iwn4965_update_sched(struct iwn_softc *, int, int, uint8_t,
228 static void iwn5000_update_sched(struct iwn_softc *, int, int, uint8_t,
231 static void iwn5000_reset_sched(struct iwn_softc *, int, int);
233 static int iwn_tx_data(struct iwn_softc *, struct mbuf *,
234 struct ieee80211_node *);
235 static int iwn_tx_data_raw(struct iwn_softc *, struct mbuf *,
236 struct ieee80211_node *,
237 const struct ieee80211_bpf_params *params);
238 static int iwn_tx_cmd(struct iwn_softc *, struct mbuf *,
239 struct ieee80211_node *, struct iwn_tx_ring *);
240 static void iwn_xmit_task(void *arg0, int pending);
241 static int iwn_raw_xmit(struct ieee80211_node *, struct mbuf *,
242 const struct ieee80211_bpf_params *);
243 static int iwn_transmit(struct ieee80211com *, struct mbuf *);
244 static void iwn_scan_timeout(void *);
245 static void iwn_watchdog(void *);
246 static int iwn_ioctl(struct ieee80211com *, u_long , void *);
247 static void iwn_parent(struct ieee80211com *);
248 static int iwn_cmd(struct iwn_softc *, int, const void *, int, int);
249 static int iwn4965_add_node(struct iwn_softc *, struct iwn_node_info *,
251 static int iwn5000_add_node(struct iwn_softc *, struct iwn_node_info *,
253 static int iwn_set_link_quality(struct iwn_softc *,
254 struct ieee80211_node *);
255 static int iwn_add_broadcast_node(struct iwn_softc *, int);
256 static int iwn_updateedca(struct ieee80211com *);
257 static void iwn_set_promisc(struct iwn_softc *);
258 static void iwn_update_promisc(struct ieee80211com *);
259 static void iwn_update_mcast(struct ieee80211com *);
260 static void iwn_set_led(struct iwn_softc *, uint8_t, uint8_t, uint8_t);
261 static int iwn_set_critical_temp(struct iwn_softc *);
262 static int iwn_set_timing(struct iwn_softc *, struct ieee80211_node *);
263 static void iwn4965_power_calibration(struct iwn_softc *, int);
264 static int iwn4965_set_txpower(struct iwn_softc *, int);
265 static int iwn5000_set_txpower(struct iwn_softc *, int);
266 static int iwn4965_get_rssi(struct iwn_softc *, struct iwn_rx_stat *);
267 static int iwn5000_get_rssi(struct iwn_softc *, struct iwn_rx_stat *);
268 static int iwn_get_noise(const struct iwn_rx_general_stats *);
269 static int iwn4965_get_temperature(struct iwn_softc *);
270 static int iwn5000_get_temperature(struct iwn_softc *);
271 static int iwn_init_sensitivity(struct iwn_softc *);
272 static void iwn_collect_noise(struct iwn_softc *,
273 const struct iwn_rx_general_stats *);
274 static int iwn4965_init_gains(struct iwn_softc *);
275 static int iwn5000_init_gains(struct iwn_softc *);
276 static int iwn4965_set_gains(struct iwn_softc *);
277 static int iwn5000_set_gains(struct iwn_softc *);
278 static void iwn_tune_sensitivity(struct iwn_softc *,
279 const struct iwn_rx_stats *);
280 static void iwn_save_stats_counters(struct iwn_softc *,
281 const struct iwn_stats *);
282 static int iwn_send_sensitivity(struct iwn_softc *);
283 static void iwn_check_rx_recovery(struct iwn_softc *, struct iwn_stats *);
284 static int iwn_set_pslevel(struct iwn_softc *, int, int, int);
285 static int iwn_send_btcoex(struct iwn_softc *);
286 static int iwn_send_advanced_btcoex(struct iwn_softc *);
287 static int iwn5000_runtime_calib(struct iwn_softc *);
288 static int iwn_check_bss_filter(struct iwn_softc *);
289 static int iwn4965_rxon_assoc(struct iwn_softc *, int);
290 static int iwn5000_rxon_assoc(struct iwn_softc *, int);
291 static int iwn_send_rxon(struct iwn_softc *, int, int);
292 static int iwn_config(struct iwn_softc *);
293 static int iwn_scan(struct iwn_softc *, struct ieee80211vap *,
294 struct ieee80211_scan_state *, struct ieee80211_channel *);
295 static int iwn_auth(struct iwn_softc *, struct ieee80211vap *vap);
296 static int iwn_run(struct iwn_softc *, struct ieee80211vap *vap);
297 static int iwn_ampdu_rx_start(struct ieee80211_node *,
298 struct ieee80211_rx_ampdu *, int, int, int);
299 static void iwn_ampdu_rx_stop(struct ieee80211_node *,
300 struct ieee80211_rx_ampdu *);
301 static int iwn_addba_request(struct ieee80211_node *,
302 struct ieee80211_tx_ampdu *, int, int, int);
303 static int iwn_addba_response(struct ieee80211_node *,
304 struct ieee80211_tx_ampdu *, int, int, int);
305 static int iwn_ampdu_tx_start(struct ieee80211com *,
306 struct ieee80211_node *, uint8_t);
307 static void iwn_ampdu_tx_stop(struct ieee80211_node *,
308 struct ieee80211_tx_ampdu *);
309 static void iwn4965_ampdu_tx_start(struct iwn_softc *,
310 struct ieee80211_node *, int, uint8_t, uint16_t);
311 static void iwn4965_ampdu_tx_stop(struct iwn_softc *, int,
313 static void iwn5000_ampdu_tx_start(struct iwn_softc *,
314 struct ieee80211_node *, int, uint8_t, uint16_t);
315 static void iwn5000_ampdu_tx_stop(struct iwn_softc *, int,
317 static int iwn5000_query_calibration(struct iwn_softc *);
318 static int iwn5000_send_calibration(struct iwn_softc *);
319 static int iwn5000_send_wimax_coex(struct iwn_softc *);
320 static int iwn5000_crystal_calib(struct iwn_softc *);
321 static int iwn5000_temp_offset_calib(struct iwn_softc *);
322 static int iwn5000_temp_offset_calibv2(struct iwn_softc *);
323 static int iwn4965_post_alive(struct iwn_softc *);
324 static int iwn5000_post_alive(struct iwn_softc *);
325 static int iwn4965_load_bootcode(struct iwn_softc *, const uint8_t *,
327 static int iwn4965_load_firmware(struct iwn_softc *);
328 static int iwn5000_load_firmware_section(struct iwn_softc *, uint32_t,
329 const uint8_t *, int);
330 static int iwn5000_load_firmware(struct iwn_softc *);
331 static int iwn_read_firmware_leg(struct iwn_softc *,
332 struct iwn_fw_info *);
333 static int iwn_read_firmware_tlv(struct iwn_softc *,
334 struct iwn_fw_info *, uint16_t);
335 static int iwn_read_firmware(struct iwn_softc *);
336 static void iwn_unload_firmware(struct iwn_softc *);
337 static int iwn_clock_wait(struct iwn_softc *);
338 static int iwn_apm_init(struct iwn_softc *);
339 static void iwn_apm_stop_master(struct iwn_softc *);
340 static void iwn_apm_stop(struct iwn_softc *);
341 static int iwn4965_nic_config(struct iwn_softc *);
342 static int iwn5000_nic_config(struct iwn_softc *);
343 static int iwn_hw_prepare(struct iwn_softc *);
344 static int iwn_hw_init(struct iwn_softc *);
345 static void iwn_hw_stop(struct iwn_softc *);
346 static void iwn_panicked(void *, int);
347 static int iwn_init_locked(struct iwn_softc *);
348 static int iwn_init(struct iwn_softc *);
349 static void iwn_stop_locked(struct iwn_softc *);
350 static void iwn_stop(struct iwn_softc *);
351 static void iwn_scan_start(struct ieee80211com *);
352 static void iwn_scan_end(struct ieee80211com *);
353 static void iwn_set_channel(struct ieee80211com *);
354 static void iwn_scan_curchan(struct ieee80211_scan_state *, unsigned long);
355 static void iwn_scan_mindwell(struct ieee80211_scan_state *);
357 static char *iwn_get_csr_string(int);
358 static void iwn_debug_register(struct iwn_softc *);
361 static device_method_t iwn_methods[] = {
362 /* Device interface */
363 DEVMETHOD(device_probe, iwn_probe),
364 DEVMETHOD(device_attach, iwn_attach),
365 DEVMETHOD(device_detach, iwn_detach),
366 DEVMETHOD(device_shutdown, iwn_shutdown),
367 DEVMETHOD(device_suspend, iwn_suspend),
368 DEVMETHOD(device_resume, iwn_resume),
373 static driver_t iwn_driver = {
376 sizeof(struct iwn_softc)
378 static devclass_t iwn_devclass;
380 DRIVER_MODULE(iwn, pci, iwn_driver, iwn_devclass, NULL, NULL);
381 MODULE_PNP_INFO("U16:vendor;U16:device;D:#", pci, iwn, iwn_ident_table,
382 nitems(iwn_ident_table) - 1);
383 MODULE_VERSION(iwn, 1);
385 MODULE_DEPEND(iwn, firmware, 1, 1, 1);
386 MODULE_DEPEND(iwn, pci, 1, 1, 1);
387 MODULE_DEPEND(iwn, wlan, 1, 1, 1);
389 static d_ioctl_t iwn_cdev_ioctl;
390 static d_open_t iwn_cdev_open;
391 static d_close_t iwn_cdev_close;
393 static struct cdevsw iwn_cdevsw = {
394 .d_version = D_VERSION,
396 .d_open = iwn_cdev_open,
397 .d_close = iwn_cdev_close,
398 .d_ioctl = iwn_cdev_ioctl,
403 iwn_probe(device_t dev)
405 const struct iwn_ident *ident;
407 for (ident = iwn_ident_table; ident->name != NULL; ident++) {
408 if (pci_get_vendor(dev) == ident->vendor &&
409 pci_get_device(dev) == ident->device) {
410 device_set_desc(dev, ident->name);
411 return (BUS_PROBE_DEFAULT);
418 iwn_is_3stream_device(struct iwn_softc *sc)
420 /* XXX for now only 5300, until the 5350 can be tested */
421 if (sc->hw_type == IWN_HW_REV_TYPE_5300)
427 iwn_attach(device_t dev)
429 struct iwn_softc *sc = device_get_softc(dev);
430 struct ieee80211com *ic;
436 error = resource_int_value(device_get_name(sc->sc_dev),
437 device_get_unit(sc->sc_dev), "debug", &(sc->sc_debug));
444 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: begin\n",__func__);
447 * Get the offset of the PCI Express Capability Structure in PCI
448 * Configuration Space.
450 error = pci_find_cap(dev, PCIY_EXPRESS, &sc->sc_cap_off);
452 device_printf(dev, "PCIe capability structure not found!\n");
456 /* Clear device-specific "PCI retry timeout" register (41h). */
457 pci_write_config(dev, 0x41, 0, 1);
459 /* Enable bus-mastering. */
460 pci_enable_busmaster(dev);
463 sc->mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
465 if (sc->mem == NULL) {
466 device_printf(dev, "can't map mem space\n");
470 sc->sc_st = rman_get_bustag(sc->mem);
471 sc->sc_sh = rman_get_bushandle(sc->mem);
475 if (pci_alloc_msi(dev, &i) == 0)
477 /* Install interrupt handler. */
478 sc->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, RF_ACTIVE |
479 (rid != 0 ? 0 : RF_SHAREABLE));
480 if (sc->irq == NULL) {
481 device_printf(dev, "can't map interrupt\n");
488 /* Read hardware revision and attach. */
489 sc->hw_type = (IWN_READ(sc, IWN_HW_REV) >> IWN_HW_REV_TYPE_SHIFT)
490 & IWN_HW_REV_TYPE_MASK;
491 sc->subdevice_id = pci_get_subdevice(dev);
494 * 4965 versus 5000 and later have different methods.
495 * Let's set those up first.
497 if (sc->hw_type == IWN_HW_REV_TYPE_4965)
498 iwn4965_attach(sc, pci_get_device(dev));
500 iwn5000_attach(sc, pci_get_device(dev));
503 * Next, let's setup the various parameters of each NIC.
505 error = iwn_config_specific(sc, pci_get_device(dev));
507 device_printf(dev, "could not attach device, error %d\n",
512 if ((error = iwn_hw_prepare(sc)) != 0) {
513 device_printf(dev, "hardware not ready, error %d\n", error);
517 /* Allocate DMA memory for firmware transfers. */
518 if ((error = iwn_alloc_fwmem(sc)) != 0) {
520 "could not allocate memory for firmware, error %d\n",
525 /* Allocate "Keep Warm" page. */
526 if ((error = iwn_alloc_kw(sc)) != 0) {
528 "could not allocate keep warm page, error %d\n", error);
532 /* Allocate ICT table for 5000 Series. */
533 if (sc->hw_type != IWN_HW_REV_TYPE_4965 &&
534 (error = iwn_alloc_ict(sc)) != 0) {
535 device_printf(dev, "could not allocate ICT table, error %d\n",
540 /* Allocate TX scheduler "rings". */
541 if ((error = iwn_alloc_sched(sc)) != 0) {
543 "could not allocate TX scheduler rings, error %d\n", error);
547 /* Allocate TX rings (16 on 4965AGN, 20 on >=5000). */
548 for (i = 0; i < sc->ntxqs; i++) {
549 if ((error = iwn_alloc_tx_ring(sc, &sc->txq[i], i)) != 0) {
551 "could not allocate TX ring %d, error %d\n", i,
557 /* Allocate RX ring. */
558 if ((error = iwn_alloc_rx_ring(sc, &sc->rxq)) != 0) {
559 device_printf(dev, "could not allocate RX ring, error %d\n",
564 /* Clear pending interrupts. */
565 IWN_WRITE(sc, IWN_INT, 0xffffffff);
569 ic->ic_name = device_get_nameunit(dev);
570 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */
571 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */
573 /* Set device capabilities. */
575 IEEE80211_C_STA /* station mode supported */
576 | IEEE80211_C_MONITOR /* monitor mode supported */
578 | IEEE80211_C_BGSCAN /* background scanning */
580 | IEEE80211_C_TXPMGT /* tx power management */
581 | IEEE80211_C_SHSLOT /* short slot time supported */
583 | IEEE80211_C_SHPREAMBLE /* short preamble supported */
585 | IEEE80211_C_IBSS /* ibss/adhoc mode */
587 | IEEE80211_C_WME /* WME */
588 | IEEE80211_C_PMGT /* Station-side power mgmt */
591 /* Read MAC address, channels, etc from EEPROM. */
592 if ((error = iwn_read_eeprom(sc, ic->ic_macaddr)) != 0) {
593 device_printf(dev, "could not read EEPROM, error %d\n",
598 /* Count the number of available chains. */
600 ((sc->txchainmask >> 2) & 1) +
601 ((sc->txchainmask >> 1) & 1) +
602 ((sc->txchainmask >> 0) & 1);
604 ((sc->rxchainmask >> 2) & 1) +
605 ((sc->rxchainmask >> 1) & 1) +
606 ((sc->rxchainmask >> 0) & 1);
608 device_printf(dev, "MIMO %dT%dR, %.4s, address %6D\n",
609 sc->ntxchains, sc->nrxchains, sc->eeprom_domain,
610 ic->ic_macaddr, ":");
613 if (sc->sc_flags & IWN_FLAG_HAS_11N) {
614 ic->ic_rxstream = sc->nrxchains;
615 ic->ic_txstream = sc->ntxchains;
618 * Some of the 3 antenna devices (ie, the 4965) only supports
619 * 2x2 operation. So correct the number of streams if
620 * it's not a 3-stream device.
622 if (! iwn_is_3stream_device(sc)) {
623 if (ic->ic_rxstream > 2)
625 if (ic->ic_txstream > 2)
630 IEEE80211_HTCAP_SMPS_OFF /* SMPS mode disabled */
631 | IEEE80211_HTCAP_SHORTGI20 /* short GI in 20MHz */
632 | IEEE80211_HTCAP_CHWIDTH40 /* 40MHz channel width*/
633 | IEEE80211_HTCAP_SHORTGI40 /* short GI in 40MHz */
635 | IEEE80211_HTCAP_GREENFIELD
636 #if IWN_RBUF_SIZE == 8192
637 | IEEE80211_HTCAP_MAXAMSDU_7935 /* max A-MSDU length */
639 | IEEE80211_HTCAP_MAXAMSDU_3839 /* max A-MSDU length */
642 /* s/w capabilities */
643 | IEEE80211_HTC_HT /* HT operation */
644 | IEEE80211_HTC_AMPDU /* tx A-MPDU */
646 | IEEE80211_HTC_AMSDU /* tx A-MSDU */
651 ieee80211_ifattach(ic);
652 ic->ic_vap_create = iwn_vap_create;
653 ic->ic_ioctl = iwn_ioctl;
654 ic->ic_parent = iwn_parent;
655 ic->ic_vap_delete = iwn_vap_delete;
656 ic->ic_transmit = iwn_transmit;
657 ic->ic_raw_xmit = iwn_raw_xmit;
658 ic->ic_node_alloc = iwn_node_alloc;
659 sc->sc_ampdu_rx_start = ic->ic_ampdu_rx_start;
660 ic->ic_ampdu_rx_start = iwn_ampdu_rx_start;
661 sc->sc_ampdu_rx_stop = ic->ic_ampdu_rx_stop;
662 ic->ic_ampdu_rx_stop = iwn_ampdu_rx_stop;
663 sc->sc_addba_request = ic->ic_addba_request;
664 ic->ic_addba_request = iwn_addba_request;
665 sc->sc_addba_response = ic->ic_addba_response;
666 ic->ic_addba_response = iwn_addba_response;
667 sc->sc_addba_stop = ic->ic_addba_stop;
668 ic->ic_addba_stop = iwn_ampdu_tx_stop;
669 ic->ic_newassoc = iwn_newassoc;
670 ic->ic_wme.wme_update = iwn_updateedca;
671 ic->ic_update_promisc = iwn_update_promisc;
672 ic->ic_update_mcast = iwn_update_mcast;
673 ic->ic_scan_start = iwn_scan_start;
674 ic->ic_scan_end = iwn_scan_end;
675 ic->ic_set_channel = iwn_set_channel;
676 ic->ic_scan_curchan = iwn_scan_curchan;
677 ic->ic_scan_mindwell = iwn_scan_mindwell;
678 ic->ic_getradiocaps = iwn_getradiocaps;
679 ic->ic_setregdomain = iwn_setregdomain;
681 iwn_radiotap_attach(sc);
683 callout_init_mtx(&sc->calib_to, &sc->sc_mtx, 0);
684 callout_init_mtx(&sc->scan_timeout, &sc->sc_mtx, 0);
685 callout_init_mtx(&sc->watchdog_to, &sc->sc_mtx, 0);
686 TASK_INIT(&sc->sc_rftoggle_task, 0, iwn_rftoggle_task, sc);
687 TASK_INIT(&sc->sc_panic_task, 0, iwn_panicked, sc);
688 TASK_INIT(&sc->sc_xmit_task, 0, iwn_xmit_task, sc);
690 mbufq_init(&sc->sc_xmit_queue, 1024);
692 sc->sc_tq = taskqueue_create("iwn_taskq", M_WAITOK,
693 taskqueue_thread_enqueue, &sc->sc_tq);
694 error = taskqueue_start_threads(&sc->sc_tq, 1, 0, "iwn_taskq");
696 device_printf(dev, "can't start threads, error %d\n", error);
700 iwn_sysctlattach(sc);
703 * Hook our interrupt after all initialization is complete.
705 error = bus_setup_intr(dev, sc->irq, INTR_TYPE_NET | INTR_MPSAFE,
706 NULL, iwn_intr, sc, &sc->sc_ih);
708 device_printf(dev, "can't establish interrupt, error %d\n",
714 device_printf(sc->sc_dev, "%s: rx_stats=%d, rx_stats_bt=%d\n",
716 sizeof(struct iwn_stats),
717 sizeof(struct iwn_stats_bt));
721 ieee80211_announce(ic);
722 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
724 /* Add debug ioctl right at the end */
725 sc->sc_cdev = make_dev(&iwn_cdevsw, device_get_unit(dev),
726 UID_ROOT, GID_WHEEL, 0600, "%s", device_get_nameunit(dev));
727 if (sc->sc_cdev == NULL) {
728 device_printf(dev, "failed to create debug character device\n");
730 sc->sc_cdev->si_drv1 = sc;
735 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end in error\n",__func__);
740 * Define specific configuration based on device id and subdevice id
741 * pid : PCI device id
744 iwn_config_specific(struct iwn_softc *sc, uint16_t pid)
753 sc->base_params = &iwn4965_base_params;
754 sc->limits = &iwn4965_sensitivity_limits;
755 sc->fwname = "iwn4965fw";
756 /* Override chains masks, ROM is known to be broken. */
757 sc->txchainmask = IWN_ANT_AB;
758 sc->rxchainmask = IWN_ANT_ABC;
759 /* Enable normal btcoex */
760 sc->sc_flags |= IWN_FLAG_BTCOEX;
765 switch(sc->subdevice_id) {
766 case IWN_SDID_1000_1:
767 case IWN_SDID_1000_2:
768 case IWN_SDID_1000_3:
769 case IWN_SDID_1000_4:
770 case IWN_SDID_1000_5:
771 case IWN_SDID_1000_6:
772 case IWN_SDID_1000_7:
773 case IWN_SDID_1000_8:
774 case IWN_SDID_1000_9:
775 case IWN_SDID_1000_10:
776 case IWN_SDID_1000_11:
777 case IWN_SDID_1000_12:
778 sc->limits = &iwn1000_sensitivity_limits;
779 sc->base_params = &iwn1000_base_params;
780 sc->fwname = "iwn1000fw";
783 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
784 "0x%04x rev %d not supported (subdevice)\n", pid,
785 sc->subdevice_id,sc->hw_type);
794 sc->fwname = "iwn6000fw";
795 sc->limits = &iwn6000_sensitivity_limits;
796 switch(sc->subdevice_id) {
797 case IWN_SDID_6x00_1:
798 case IWN_SDID_6x00_2:
799 case IWN_SDID_6x00_8:
801 sc->base_params = &iwn_6000_base_params;
803 case IWN_SDID_6x00_3:
804 case IWN_SDID_6x00_6:
805 case IWN_SDID_6x00_9:
807 case IWN_SDID_6x00_4:
808 case IWN_SDID_6x00_7:
809 case IWN_SDID_6x00_10:
811 case IWN_SDID_6x00_5:
813 sc->base_params = &iwn_6000i_base_params;
814 sc->sc_flags |= IWN_FLAG_INTERNAL_PA;
815 sc->txchainmask = IWN_ANT_BC;
816 sc->rxchainmask = IWN_ANT_BC;
819 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
820 "0x%04x rev %d not supported (subdevice)\n", pid,
821 sc->subdevice_id,sc->hw_type);
828 switch(sc->subdevice_id) {
829 case IWN_SDID_6x05_1:
830 case IWN_SDID_6x05_4:
831 case IWN_SDID_6x05_6:
833 case IWN_SDID_6x05_2:
834 case IWN_SDID_6x05_5:
835 case IWN_SDID_6x05_7:
837 case IWN_SDID_6x05_3:
839 case IWN_SDID_6x05_8:
840 case IWN_SDID_6x05_9:
841 //iwl6005_2agn_sff_cfg
842 case IWN_SDID_6x05_10:
844 case IWN_SDID_6x05_11:
845 //iwl6005_2agn_mow1_cfg
846 case IWN_SDID_6x05_12:
847 //iwl6005_2agn_mow2_cfg
848 sc->fwname = "iwn6000g2afw";
849 sc->limits = &iwn6000_sensitivity_limits;
850 sc->base_params = &iwn_6000g2_base_params;
853 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
854 "0x%04x rev %d not supported (subdevice)\n", pid,
855 sc->subdevice_id,sc->hw_type);
862 switch(sc->subdevice_id) {
863 case IWN_SDID_6035_1:
864 case IWN_SDID_6035_2:
865 case IWN_SDID_6035_3:
866 case IWN_SDID_6035_4:
867 case IWN_SDID_6035_5:
868 sc->fwname = "iwn6000g2bfw";
869 sc->limits = &iwn6235_sensitivity_limits;
870 sc->base_params = &iwn_6235_base_params;
873 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
874 "0x%04x rev %d not supported (subdevice)\n", pid,
875 sc->subdevice_id,sc->hw_type);
879 /* 6x50 WiFi/WiMax Series */
882 switch(sc->subdevice_id) {
883 case IWN_SDID_6050_1:
884 case IWN_SDID_6050_3:
885 case IWN_SDID_6050_5:
887 case IWN_SDID_6050_2:
888 case IWN_SDID_6050_4:
889 case IWN_SDID_6050_6:
891 sc->fwname = "iwn6050fw";
892 sc->txchainmask = IWN_ANT_AB;
893 sc->rxchainmask = IWN_ANT_AB;
894 sc->limits = &iwn6000_sensitivity_limits;
895 sc->base_params = &iwn_6050_base_params;
898 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
899 "0x%04x rev %d not supported (subdevice)\n", pid,
900 sc->subdevice_id,sc->hw_type);
904 /* 6150 WiFi/WiMax Series */
907 switch(sc->subdevice_id) {
908 case IWN_SDID_6150_1:
909 case IWN_SDID_6150_3:
910 case IWN_SDID_6150_5:
912 case IWN_SDID_6150_2:
913 case IWN_SDID_6150_4:
914 case IWN_SDID_6150_6:
916 sc->fwname = "iwn6050fw";
917 sc->limits = &iwn6000_sensitivity_limits;
918 sc->base_params = &iwn_6150_base_params;
921 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
922 "0x%04x rev %d not supported (subdevice)\n", pid,
923 sc->subdevice_id,sc->hw_type);
927 /* 6030 Series and 1030 Series */
932 switch(sc->subdevice_id) {
933 case IWN_SDID_x030_1:
934 case IWN_SDID_x030_3:
935 case IWN_SDID_x030_5:
937 case IWN_SDID_x030_2:
938 case IWN_SDID_x030_4:
939 case IWN_SDID_x030_6:
941 case IWN_SDID_x030_7:
942 case IWN_SDID_x030_10:
943 case IWN_SDID_x030_14:
945 case IWN_SDID_x030_8:
946 case IWN_SDID_x030_11:
947 case IWN_SDID_x030_15:
949 case IWN_SDID_x030_9:
950 case IWN_SDID_x030_12:
951 case IWN_SDID_x030_16:
953 case IWN_SDID_x030_13:
955 sc->fwname = "iwn6000g2bfw";
956 sc->limits = &iwn6000_sensitivity_limits;
957 sc->base_params = &iwn_6000g2b_base_params;
960 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
961 "0x%04x rev %d not supported (subdevice)\n", pid,
962 sc->subdevice_id,sc->hw_type);
966 /* 130 Series WiFi */
967 /* XXX: This series will need adjustment for rate.
968 * see rx_with_siso_diversity in linux kernel
972 switch(sc->subdevice_id) {
981 sc->fwname = "iwn6000g2bfw";
982 sc->limits = &iwn6000_sensitivity_limits;
983 sc->base_params = &iwn_6000g2b_base_params;
986 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
987 "0x%04x rev %d not supported (subdevice)\n", pid,
988 sc->subdevice_id,sc->hw_type);
992 /* 100 Series WiFi */
995 switch(sc->subdevice_id) {
1000 case IWN_SDID_100_5:
1001 case IWN_SDID_100_6:
1002 sc->limits = &iwn1000_sensitivity_limits;
1003 sc->base_params = &iwn1000_base_params;
1004 sc->fwname = "iwn100fw";
1007 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
1008 "0x%04x rev %d not supported (subdevice)\n", pid,
1009 sc->subdevice_id,sc->hw_type);
1015 /* XXX: This series will need adjustment for rate.
1016 * see rx_with_siso_diversity in linux kernel
1020 switch(sc->subdevice_id) {
1021 case IWN_SDID_105_1:
1022 case IWN_SDID_105_2:
1023 case IWN_SDID_105_3:
1025 case IWN_SDID_105_4:
1027 sc->limits = &iwn2030_sensitivity_limits;
1028 sc->base_params = &iwn2000_base_params;
1029 sc->fwname = "iwn105fw";
1032 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
1033 "0x%04x rev %d not supported (subdevice)\n", pid,
1034 sc->subdevice_id,sc->hw_type);
1040 /* XXX: This series will need adjustment for rate.
1041 * see rx_with_siso_diversity in linux kernel
1045 switch(sc->subdevice_id) {
1046 case IWN_SDID_135_1:
1047 case IWN_SDID_135_2:
1048 case IWN_SDID_135_3:
1049 sc->limits = &iwn2030_sensitivity_limits;
1050 sc->base_params = &iwn2030_base_params;
1051 sc->fwname = "iwn135fw";
1054 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
1055 "0x%04x rev %d not supported (subdevice)\n", pid,
1056 sc->subdevice_id,sc->hw_type);
1062 case IWN_DID_2x00_1:
1063 case IWN_DID_2x00_2:
1064 switch(sc->subdevice_id) {
1065 case IWN_SDID_2x00_1:
1066 case IWN_SDID_2x00_2:
1067 case IWN_SDID_2x00_3:
1069 case IWN_SDID_2x00_4:
1070 //iwl2000_2bgn_d_cfg
1071 sc->limits = &iwn2030_sensitivity_limits;
1072 sc->base_params = &iwn2000_base_params;
1073 sc->fwname = "iwn2000fw";
1076 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
1077 "0x%04x rev %d not supported (subdevice) \n",
1078 pid, sc->subdevice_id, sc->hw_type);
1083 case IWN_DID_2x30_1:
1084 case IWN_DID_2x30_2:
1085 switch(sc->subdevice_id) {
1086 case IWN_SDID_2x30_1:
1087 case IWN_SDID_2x30_3:
1088 case IWN_SDID_2x30_5:
1090 case IWN_SDID_2x30_2:
1091 case IWN_SDID_2x30_4:
1092 case IWN_SDID_2x30_6:
1094 sc->limits = &iwn2030_sensitivity_limits;
1095 sc->base_params = &iwn2030_base_params;
1096 sc->fwname = "iwn2030fw";
1099 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
1100 "0x%04x rev %d not supported (subdevice)\n", pid,
1101 sc->subdevice_id,sc->hw_type);
1106 case IWN_DID_5x00_1:
1107 case IWN_DID_5x00_2:
1108 case IWN_DID_5x00_3:
1109 case IWN_DID_5x00_4:
1110 sc->limits = &iwn5000_sensitivity_limits;
1111 sc->base_params = &iwn5000_base_params;
1112 sc->fwname = "iwn5000fw";
1113 switch(sc->subdevice_id) {
1114 case IWN_SDID_5x00_1:
1115 case IWN_SDID_5x00_2:
1116 case IWN_SDID_5x00_3:
1117 case IWN_SDID_5x00_4:
1118 case IWN_SDID_5x00_9:
1119 case IWN_SDID_5x00_10:
1120 case IWN_SDID_5x00_11:
1121 case IWN_SDID_5x00_12:
1122 case IWN_SDID_5x00_17:
1123 case IWN_SDID_5x00_18:
1124 case IWN_SDID_5x00_19:
1125 case IWN_SDID_5x00_20:
1127 sc->txchainmask = IWN_ANT_B;
1128 sc->rxchainmask = IWN_ANT_AB;
1130 case IWN_SDID_5x00_5:
1131 case IWN_SDID_5x00_6:
1132 case IWN_SDID_5x00_13:
1133 case IWN_SDID_5x00_14:
1134 case IWN_SDID_5x00_21:
1135 case IWN_SDID_5x00_22:
1137 sc->txchainmask = IWN_ANT_B;
1138 sc->rxchainmask = IWN_ANT_AB;
1140 case IWN_SDID_5x00_7:
1141 case IWN_SDID_5x00_8:
1142 case IWN_SDID_5x00_15:
1143 case IWN_SDID_5x00_16:
1144 case IWN_SDID_5x00_23:
1145 case IWN_SDID_5x00_24:
1147 sc->txchainmask = IWN_ANT_B;
1148 sc->rxchainmask = IWN_ANT_AB;
1150 case IWN_SDID_5x00_25:
1151 case IWN_SDID_5x00_26:
1152 case IWN_SDID_5x00_27:
1153 case IWN_SDID_5x00_28:
1154 case IWN_SDID_5x00_29:
1155 case IWN_SDID_5x00_30:
1156 case IWN_SDID_5x00_31:
1157 case IWN_SDID_5x00_32:
1158 case IWN_SDID_5x00_33:
1159 case IWN_SDID_5x00_34:
1160 case IWN_SDID_5x00_35:
1161 case IWN_SDID_5x00_36:
1163 sc->txchainmask = IWN_ANT_ABC;
1164 sc->rxchainmask = IWN_ANT_ABC;
1167 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
1168 "0x%04x rev %d not supported (subdevice)\n", pid,
1169 sc->subdevice_id,sc->hw_type);
1174 case IWN_DID_5x50_1:
1175 case IWN_DID_5x50_2:
1176 case IWN_DID_5x50_3:
1177 case IWN_DID_5x50_4:
1178 sc->limits = &iwn5000_sensitivity_limits;
1179 sc->base_params = &iwn5000_base_params;
1180 sc->fwname = "iwn5000fw";
1181 switch(sc->subdevice_id) {
1182 case IWN_SDID_5x50_1:
1183 case IWN_SDID_5x50_2:
1184 case IWN_SDID_5x50_3:
1186 sc->limits = &iwn5000_sensitivity_limits;
1187 sc->base_params = &iwn5000_base_params;
1188 sc->fwname = "iwn5000fw";
1190 case IWN_SDID_5x50_4:
1191 case IWN_SDID_5x50_5:
1192 case IWN_SDID_5x50_8:
1193 case IWN_SDID_5x50_9:
1194 case IWN_SDID_5x50_10:
1195 case IWN_SDID_5x50_11:
1197 case IWN_SDID_5x50_6:
1198 case IWN_SDID_5x50_7:
1199 case IWN_SDID_5x50_12:
1200 case IWN_SDID_5x50_13:
1202 sc->limits = &iwn5000_sensitivity_limits;
1203 sc->fwname = "iwn5150fw";
1204 sc->base_params = &iwn_5x50_base_params;
1207 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
1208 "0x%04x rev %d not supported (subdevice)\n", pid,
1209 sc->subdevice_id,sc->hw_type);
1214 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id : 0x%04x"
1215 "rev 0x%08x not supported (device)\n", pid, sc->subdevice_id,
1223 iwn4965_attach(struct iwn_softc *sc, uint16_t pid)
1225 struct iwn_ops *ops = &sc->ops;
1227 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
1229 ops->load_firmware = iwn4965_load_firmware;
1230 ops->read_eeprom = iwn4965_read_eeprom;
1231 ops->post_alive = iwn4965_post_alive;
1232 ops->nic_config = iwn4965_nic_config;
1233 ops->update_sched = iwn4965_update_sched;
1234 ops->get_temperature = iwn4965_get_temperature;
1235 ops->get_rssi = iwn4965_get_rssi;
1236 ops->set_txpower = iwn4965_set_txpower;
1237 ops->init_gains = iwn4965_init_gains;
1238 ops->set_gains = iwn4965_set_gains;
1239 ops->rxon_assoc = iwn4965_rxon_assoc;
1240 ops->add_node = iwn4965_add_node;
1241 ops->tx_done = iwn4965_tx_done;
1242 ops->ampdu_tx_start = iwn4965_ampdu_tx_start;
1243 ops->ampdu_tx_stop = iwn4965_ampdu_tx_stop;
1244 sc->ntxqs = IWN4965_NTXQUEUES;
1245 sc->firstaggqueue = IWN4965_FIRSTAGGQUEUE;
1246 sc->ndmachnls = IWN4965_NDMACHNLS;
1247 sc->broadcast_id = IWN4965_ID_BROADCAST;
1248 sc->rxonsz = IWN4965_RXONSZ;
1249 sc->schedsz = IWN4965_SCHEDSZ;
1250 sc->fw_text_maxsz = IWN4965_FW_TEXT_MAXSZ;
1251 sc->fw_data_maxsz = IWN4965_FW_DATA_MAXSZ;
1252 sc->fwsz = IWN4965_FWSZ;
1253 sc->sched_txfact_addr = IWN4965_SCHED_TXFACT;
1254 sc->limits = &iwn4965_sensitivity_limits;
1255 sc->fwname = "iwn4965fw";
1256 /* Override chains masks, ROM is known to be broken. */
1257 sc->txchainmask = IWN_ANT_AB;
1258 sc->rxchainmask = IWN_ANT_ABC;
1259 /* Enable normal btcoex */
1260 sc->sc_flags |= IWN_FLAG_BTCOEX;
1262 DPRINTF(sc, IWN_DEBUG_TRACE, "%s: end\n",__func__);
1266 iwn5000_attach(struct iwn_softc *sc, uint16_t pid)
1268 struct iwn_ops *ops = &sc->ops;
1270 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
1272 ops->load_firmware = iwn5000_load_firmware;
1273 ops->read_eeprom = iwn5000_read_eeprom;
1274 ops->post_alive = iwn5000_post_alive;
1275 ops->nic_config = iwn5000_nic_config;
1276 ops->update_sched = iwn5000_update_sched;
1277 ops->get_temperature = iwn5000_get_temperature;
1278 ops->get_rssi = iwn5000_get_rssi;
1279 ops->set_txpower = iwn5000_set_txpower;
1280 ops->init_gains = iwn5000_init_gains;
1281 ops->set_gains = iwn5000_set_gains;
1282 ops->rxon_assoc = iwn5000_rxon_assoc;
1283 ops->add_node = iwn5000_add_node;
1284 ops->tx_done = iwn5000_tx_done;
1285 ops->ampdu_tx_start = iwn5000_ampdu_tx_start;
1286 ops->ampdu_tx_stop = iwn5000_ampdu_tx_stop;
1287 sc->ntxqs = IWN5000_NTXQUEUES;
1288 sc->firstaggqueue = IWN5000_FIRSTAGGQUEUE;
1289 sc->ndmachnls = IWN5000_NDMACHNLS;
1290 sc->broadcast_id = IWN5000_ID_BROADCAST;
1291 sc->rxonsz = IWN5000_RXONSZ;
1292 sc->schedsz = IWN5000_SCHEDSZ;
1293 sc->fw_text_maxsz = IWN5000_FW_TEXT_MAXSZ;
1294 sc->fw_data_maxsz = IWN5000_FW_DATA_MAXSZ;
1295 sc->fwsz = IWN5000_FWSZ;
1296 sc->sched_txfact_addr = IWN5000_SCHED_TXFACT;
1297 sc->reset_noise_gain = IWN5000_PHY_CALIB_RESET_NOISE_GAIN;
1298 sc->noise_gain = IWN5000_PHY_CALIB_NOISE_GAIN;
1300 DPRINTF(sc, IWN_DEBUG_TRACE, "%s: end\n",__func__);
1304 * Attach the interface to 802.11 radiotap.
1307 iwn_radiotap_attach(struct iwn_softc *sc)
1310 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
1311 ieee80211_radiotap_attach(&sc->sc_ic,
1312 &sc->sc_txtap.wt_ihdr, sizeof(sc->sc_txtap),
1313 IWN_TX_RADIOTAP_PRESENT,
1314 &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap),
1315 IWN_RX_RADIOTAP_PRESENT);
1316 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
1320 iwn_sysctlattach(struct iwn_softc *sc)
1323 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->sc_dev);
1324 struct sysctl_oid *tree = device_get_sysctl_tree(sc->sc_dev);
1326 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
1327 "debug", CTLFLAG_RW, &sc->sc_debug, sc->sc_debug,
1328 "control debugging printfs");
1332 static struct ieee80211vap *
1333 iwn_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit,
1334 enum ieee80211_opmode opmode, int flags,
1335 const uint8_t bssid[IEEE80211_ADDR_LEN],
1336 const uint8_t mac[IEEE80211_ADDR_LEN])
1338 struct iwn_softc *sc = ic->ic_softc;
1339 struct iwn_vap *ivp;
1340 struct ieee80211vap *vap;
1342 if (!TAILQ_EMPTY(&ic->ic_vaps)) /* only one at a time */
1345 ivp = malloc(sizeof(struct iwn_vap), M_80211_VAP, M_WAITOK | M_ZERO);
1347 ieee80211_vap_setup(ic, vap, name, unit, opmode, flags, bssid);
1348 ivp->ctx = IWN_RXON_BSS_CTX;
1349 vap->iv_bmissthreshold = 10; /* override default */
1350 /* Override with driver methods. */
1351 ivp->iv_newstate = vap->iv_newstate;
1352 vap->iv_newstate = iwn_newstate;
1353 sc->ivap[IWN_RXON_BSS_CTX] = vap;
1355 ieee80211_ratectl_init(vap);
1356 /* Complete setup. */
1357 ieee80211_vap_attach(vap, iwn_media_change, ieee80211_media_status,
1359 ic->ic_opmode = opmode;
1364 iwn_vap_delete(struct ieee80211vap *vap)
1366 struct iwn_vap *ivp = IWN_VAP(vap);
1368 ieee80211_ratectl_deinit(vap);
1369 ieee80211_vap_detach(vap);
1370 free(ivp, M_80211_VAP);
1374 iwn_xmit_queue_drain(struct iwn_softc *sc)
1377 struct ieee80211_node *ni;
1379 IWN_LOCK_ASSERT(sc);
1380 while ((m = mbufq_dequeue(&sc->sc_xmit_queue)) != NULL) {
1381 ni = (struct ieee80211_node *)m->m_pkthdr.rcvif;
1382 ieee80211_free_node(ni);
1388 iwn_xmit_queue_enqueue(struct iwn_softc *sc, struct mbuf *m)
1391 IWN_LOCK_ASSERT(sc);
1392 return (mbufq_enqueue(&sc->sc_xmit_queue, m));
1396 iwn_detach(device_t dev)
1398 struct iwn_softc *sc = device_get_softc(dev);
1401 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
1403 if (sc->sc_ic.ic_softc != NULL) {
1404 /* Free the mbuf queue and node references */
1406 iwn_xmit_queue_drain(sc);
1411 taskqueue_drain_all(sc->sc_tq);
1412 taskqueue_free(sc->sc_tq);
1414 callout_drain(&sc->watchdog_to);
1415 callout_drain(&sc->scan_timeout);
1416 callout_drain(&sc->calib_to);
1417 ieee80211_ifdetach(&sc->sc_ic);
1420 /* Uninstall interrupt handler. */
1421 if (sc->irq != NULL) {
1422 bus_teardown_intr(dev, sc->irq, sc->sc_ih);
1423 bus_release_resource(dev, SYS_RES_IRQ, rman_get_rid(sc->irq),
1425 pci_release_msi(dev);
1428 /* Free DMA resources. */
1429 iwn_free_rx_ring(sc, &sc->rxq);
1430 for (qid = 0; qid < sc->ntxqs; qid++)
1431 iwn_free_tx_ring(sc, &sc->txq[qid]);
1434 if (sc->ict != NULL)
1438 if (sc->mem != NULL)
1439 bus_release_resource(dev, SYS_RES_MEMORY,
1440 rman_get_rid(sc->mem), sc->mem);
1443 destroy_dev(sc->sc_cdev);
1447 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n", __func__);
1448 IWN_LOCK_DESTROY(sc);
1453 iwn_shutdown(device_t dev)
1455 struct iwn_softc *sc = device_get_softc(dev);
1462 iwn_suspend(device_t dev)
1464 struct iwn_softc *sc = device_get_softc(dev);
1466 ieee80211_suspend_all(&sc->sc_ic);
1471 iwn_resume(device_t dev)
1473 struct iwn_softc *sc = device_get_softc(dev);
1475 /* Clear device-specific "PCI retry timeout" register (41h). */
1476 pci_write_config(dev, 0x41, 0, 1);
1478 ieee80211_resume_all(&sc->sc_ic);
1483 iwn_nic_lock(struct iwn_softc *sc)
1487 /* Request exclusive access to NIC. */
1488 IWN_SETBITS(sc, IWN_GP_CNTRL, IWN_GP_CNTRL_MAC_ACCESS_REQ);
1490 /* Spin until we actually get the lock. */
1491 for (ntries = 0; ntries < 1000; ntries++) {
1492 if ((IWN_READ(sc, IWN_GP_CNTRL) &
1493 (IWN_GP_CNTRL_MAC_ACCESS_ENA | IWN_GP_CNTRL_SLEEP)) ==
1494 IWN_GP_CNTRL_MAC_ACCESS_ENA)
1501 static __inline void
1502 iwn_nic_unlock(struct iwn_softc *sc)
1504 IWN_CLRBITS(sc, IWN_GP_CNTRL, IWN_GP_CNTRL_MAC_ACCESS_REQ);
1507 static __inline uint32_t
1508 iwn_prph_read(struct iwn_softc *sc, uint32_t addr)
1510 IWN_WRITE(sc, IWN_PRPH_RADDR, IWN_PRPH_DWORD | addr);
1511 IWN_BARRIER_READ_WRITE(sc);
1512 return IWN_READ(sc, IWN_PRPH_RDATA);
1515 static __inline void
1516 iwn_prph_write(struct iwn_softc *sc, uint32_t addr, uint32_t data)
1518 IWN_WRITE(sc, IWN_PRPH_WADDR, IWN_PRPH_DWORD | addr);
1519 IWN_BARRIER_WRITE(sc);
1520 IWN_WRITE(sc, IWN_PRPH_WDATA, data);
1523 static __inline void
1524 iwn_prph_setbits(struct iwn_softc *sc, uint32_t addr, uint32_t mask)
1526 iwn_prph_write(sc, addr, iwn_prph_read(sc, addr) | mask);
1529 static __inline void
1530 iwn_prph_clrbits(struct iwn_softc *sc, uint32_t addr, uint32_t mask)
1532 iwn_prph_write(sc, addr, iwn_prph_read(sc, addr) & ~mask);
1535 static __inline void
1536 iwn_prph_write_region_4(struct iwn_softc *sc, uint32_t addr,
1537 const uint32_t *data, int count)
1539 for (; count > 0; count--, data++, addr += 4)
1540 iwn_prph_write(sc, addr, *data);
1543 static __inline uint32_t
1544 iwn_mem_read(struct iwn_softc *sc, uint32_t addr)
1546 IWN_WRITE(sc, IWN_MEM_RADDR, addr);
1547 IWN_BARRIER_READ_WRITE(sc);
1548 return IWN_READ(sc, IWN_MEM_RDATA);
1551 static __inline void
1552 iwn_mem_write(struct iwn_softc *sc, uint32_t addr, uint32_t data)
1554 IWN_WRITE(sc, IWN_MEM_WADDR, addr);
1555 IWN_BARRIER_WRITE(sc);
1556 IWN_WRITE(sc, IWN_MEM_WDATA, data);
1559 static __inline void
1560 iwn_mem_write_2(struct iwn_softc *sc, uint32_t addr, uint16_t data)
1564 tmp = iwn_mem_read(sc, addr & ~3);
1566 tmp = (tmp & 0x0000ffff) | data << 16;
1568 tmp = (tmp & 0xffff0000) | data;
1569 iwn_mem_write(sc, addr & ~3, tmp);
1572 static __inline void
1573 iwn_mem_read_region_4(struct iwn_softc *sc, uint32_t addr, uint32_t *data,
1576 for (; count > 0; count--, addr += 4)
1577 *data++ = iwn_mem_read(sc, addr);
1580 static __inline void
1581 iwn_mem_set_region_4(struct iwn_softc *sc, uint32_t addr, uint32_t val,
1584 for (; count > 0; count--, addr += 4)
1585 iwn_mem_write(sc, addr, val);
1589 iwn_eeprom_lock(struct iwn_softc *sc)
1593 for (i = 0; i < 100; i++) {
1594 /* Request exclusive access to EEPROM. */
1595 IWN_SETBITS(sc, IWN_HW_IF_CONFIG,
1596 IWN_HW_IF_CONFIG_EEPROM_LOCKED);
1598 /* Spin until we actually get the lock. */
1599 for (ntries = 0; ntries < 100; ntries++) {
1600 if (IWN_READ(sc, IWN_HW_IF_CONFIG) &
1601 IWN_HW_IF_CONFIG_EEPROM_LOCKED)
1606 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end timeout\n", __func__);
1610 static __inline void
1611 iwn_eeprom_unlock(struct iwn_softc *sc)
1613 IWN_CLRBITS(sc, IWN_HW_IF_CONFIG, IWN_HW_IF_CONFIG_EEPROM_LOCKED);
1617 * Initialize access by host to One Time Programmable ROM.
1618 * NB: This kind of ROM can be found on 1000 or 6000 Series only.
1621 iwn_init_otprom(struct iwn_softc *sc)
1623 uint16_t prev, base, next;
1626 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
1628 /* Wait for clock stabilization before accessing prph. */
1629 if ((error = iwn_clock_wait(sc)) != 0)
1632 if ((error = iwn_nic_lock(sc)) != 0)
1634 iwn_prph_setbits(sc, IWN_APMG_PS, IWN_APMG_PS_RESET_REQ);
1636 iwn_prph_clrbits(sc, IWN_APMG_PS, IWN_APMG_PS_RESET_REQ);
1639 /* Set auto clock gate disable bit for HW with OTP shadow RAM. */
1640 if (sc->base_params->shadow_ram_support) {
1641 IWN_SETBITS(sc, IWN_DBG_LINK_PWR_MGMT,
1642 IWN_RESET_LINK_PWR_MGMT_DIS);
1644 IWN_CLRBITS(sc, IWN_EEPROM_GP, IWN_EEPROM_GP_IF_OWNER);
1645 /* Clear ECC status. */
1646 IWN_SETBITS(sc, IWN_OTP_GP,
1647 IWN_OTP_GP_ECC_CORR_STTS | IWN_OTP_GP_ECC_UNCORR_STTS);
1650 * Find the block before last block (contains the EEPROM image)
1651 * for HW without OTP shadow RAM.
1653 if (! sc->base_params->shadow_ram_support) {
1654 /* Switch to absolute addressing mode. */
1655 IWN_CLRBITS(sc, IWN_OTP_GP, IWN_OTP_GP_RELATIVE_ACCESS);
1657 for (count = 0; count < sc->base_params->max_ll_items;
1659 error = iwn_read_prom_data(sc, base, &next, 2);
1662 if (next == 0) /* End of linked-list. */
1665 base = le16toh(next);
1667 if (count == 0 || count == sc->base_params->max_ll_items)
1669 /* Skip "next" word. */
1670 sc->prom_base = prev + 1;
1673 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
1679 iwn_read_prom_data(struct iwn_softc *sc, uint32_t addr, void *data, int count)
1681 uint8_t *out = data;
1685 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
1687 addr += sc->prom_base;
1688 for (; count > 0; count -= 2, addr++) {
1689 IWN_WRITE(sc, IWN_EEPROM, addr << 2);
1690 for (ntries = 0; ntries < 10; ntries++) {
1691 val = IWN_READ(sc, IWN_EEPROM);
1692 if (val & IWN_EEPROM_READ_VALID)
1697 device_printf(sc->sc_dev,
1698 "timeout reading ROM at 0x%x\n", addr);
1701 if (sc->sc_flags & IWN_FLAG_HAS_OTPROM) {
1702 /* OTPROM, check for ECC errors. */
1703 tmp = IWN_READ(sc, IWN_OTP_GP);
1704 if (tmp & IWN_OTP_GP_ECC_UNCORR_STTS) {
1705 device_printf(sc->sc_dev,
1706 "OTPROM ECC error at 0x%x\n", addr);
1709 if (tmp & IWN_OTP_GP_ECC_CORR_STTS) {
1710 /* Correctable ECC error, clear bit. */
1711 IWN_SETBITS(sc, IWN_OTP_GP,
1712 IWN_OTP_GP_ECC_CORR_STTS);
1720 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
1726 iwn_dma_map_addr(void *arg, bus_dma_segment_t *segs, int nsegs, int error)
1730 KASSERT(nsegs == 1, ("too many DMA segments, %d should be 1", nsegs));
1731 *(bus_addr_t *)arg = segs[0].ds_addr;
1735 iwn_dma_contig_alloc(struct iwn_softc *sc, struct iwn_dma_info *dma,
1736 void **kvap, bus_size_t size, bus_size_t alignment)
1743 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), alignment,
1744 0, BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, size,
1745 1, size, 0, NULL, NULL, &dma->tag);
1749 error = bus_dmamem_alloc(dma->tag, (void **)&dma->vaddr,
1750 BUS_DMA_NOWAIT | BUS_DMA_ZERO | BUS_DMA_COHERENT, &dma->map);
1754 error = bus_dmamap_load(dma->tag, dma->map, dma->vaddr, size,
1755 iwn_dma_map_addr, &dma->paddr, BUS_DMA_NOWAIT);
1759 bus_dmamap_sync(dma->tag, dma->map, BUS_DMASYNC_PREWRITE);
1766 fail: iwn_dma_contig_free(dma);
1771 iwn_dma_contig_free(struct iwn_dma_info *dma)
1773 if (dma->vaddr != NULL) {
1774 bus_dmamap_sync(dma->tag, dma->map,
1775 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
1776 bus_dmamap_unload(dma->tag, dma->map);
1777 bus_dmamem_free(dma->tag, dma->vaddr, dma->map);
1780 if (dma->tag != NULL) {
1781 bus_dma_tag_destroy(dma->tag);
1787 iwn_alloc_sched(struct iwn_softc *sc)
1789 /* TX scheduler rings must be aligned on a 1KB boundary. */
1790 return iwn_dma_contig_alloc(sc, &sc->sched_dma, (void **)&sc->sched,
1795 iwn_free_sched(struct iwn_softc *sc)
1797 iwn_dma_contig_free(&sc->sched_dma);
1801 iwn_alloc_kw(struct iwn_softc *sc)
1803 /* "Keep Warm" page must be aligned on a 4KB boundary. */
1804 return iwn_dma_contig_alloc(sc, &sc->kw_dma, NULL, 4096, 4096);
1808 iwn_free_kw(struct iwn_softc *sc)
1810 iwn_dma_contig_free(&sc->kw_dma);
1814 iwn_alloc_ict(struct iwn_softc *sc)
1816 /* ICT table must be aligned on a 4KB boundary. */
1817 return iwn_dma_contig_alloc(sc, &sc->ict_dma, (void **)&sc->ict,
1818 IWN_ICT_SIZE, 4096);
1822 iwn_free_ict(struct iwn_softc *sc)
1824 iwn_dma_contig_free(&sc->ict_dma);
1828 iwn_alloc_fwmem(struct iwn_softc *sc)
1830 /* Must be aligned on a 16-byte boundary. */
1831 return iwn_dma_contig_alloc(sc, &sc->fw_dma, NULL, sc->fwsz, 16);
1835 iwn_free_fwmem(struct iwn_softc *sc)
1837 iwn_dma_contig_free(&sc->fw_dma);
1841 iwn_alloc_rx_ring(struct iwn_softc *sc, struct iwn_rx_ring *ring)
1848 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
1850 /* Allocate RX descriptors (256-byte aligned). */
1851 size = IWN_RX_RING_COUNT * sizeof (uint32_t);
1852 error = iwn_dma_contig_alloc(sc, &ring->desc_dma, (void **)&ring->desc,
1855 device_printf(sc->sc_dev,
1856 "%s: could not allocate RX ring DMA memory, error %d\n",
1861 /* Allocate RX status area (16-byte aligned). */
1862 error = iwn_dma_contig_alloc(sc, &ring->stat_dma, (void **)&ring->stat,
1863 sizeof (struct iwn_rx_status), 16);
1865 device_printf(sc->sc_dev,
1866 "%s: could not allocate RX status DMA memory, error %d\n",
1871 /* Create RX buffer DMA tag. */
1872 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 1, 0,
1873 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL,
1874 IWN_RBUF_SIZE, 1, IWN_RBUF_SIZE, 0, NULL, NULL, &ring->data_dmat);
1876 device_printf(sc->sc_dev,
1877 "%s: could not create RX buf DMA tag, error %d\n",
1883 * Allocate and map RX buffers.
1885 for (i = 0; i < IWN_RX_RING_COUNT; i++) {
1886 struct iwn_rx_data *data = &ring->data[i];
1889 error = bus_dmamap_create(ring->data_dmat, 0, &data->map);
1891 device_printf(sc->sc_dev,
1892 "%s: could not create RX buf DMA map, error %d\n",
1897 data->m = m_getjcl(M_NOWAIT, MT_DATA, M_PKTHDR,
1899 if (data->m == NULL) {
1900 device_printf(sc->sc_dev,
1901 "%s: could not allocate RX mbuf\n", __func__);
1906 error = bus_dmamap_load(ring->data_dmat, data->map,
1907 mtod(data->m, void *), IWN_RBUF_SIZE, iwn_dma_map_addr,
1908 &paddr, BUS_DMA_NOWAIT);
1909 if (error != 0 && error != EFBIG) {
1910 device_printf(sc->sc_dev,
1911 "%s: can't map mbuf, error %d\n", __func__,
1916 bus_dmamap_sync(ring->data_dmat, data->map,
1917 BUS_DMASYNC_PREREAD);
1919 /* Set physical address of RX buffer (256-byte aligned). */
1920 ring->desc[i] = htole32(paddr >> 8);
1923 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
1924 BUS_DMASYNC_PREWRITE);
1926 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
1930 fail: iwn_free_rx_ring(sc, ring);
1932 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end in error\n",__func__);
1938 iwn_reset_rx_ring(struct iwn_softc *sc, struct iwn_rx_ring *ring)
1942 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
1944 if (iwn_nic_lock(sc) == 0) {
1945 IWN_WRITE(sc, IWN_FH_RX_CONFIG, 0);
1946 for (ntries = 0; ntries < 1000; ntries++) {
1947 if (IWN_READ(sc, IWN_FH_RX_STATUS) &
1948 IWN_FH_RX_STATUS_IDLE)
1955 sc->last_rx_valid = 0;
1959 iwn_free_rx_ring(struct iwn_softc *sc, struct iwn_rx_ring *ring)
1963 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s \n", __func__);
1965 iwn_dma_contig_free(&ring->desc_dma);
1966 iwn_dma_contig_free(&ring->stat_dma);
1968 for (i = 0; i < IWN_RX_RING_COUNT; i++) {
1969 struct iwn_rx_data *data = &ring->data[i];
1971 if (data->m != NULL) {
1972 bus_dmamap_sync(ring->data_dmat, data->map,
1973 BUS_DMASYNC_POSTREAD);
1974 bus_dmamap_unload(ring->data_dmat, data->map);
1978 if (data->map != NULL)
1979 bus_dmamap_destroy(ring->data_dmat, data->map);
1981 if (ring->data_dmat != NULL) {
1982 bus_dma_tag_destroy(ring->data_dmat);
1983 ring->data_dmat = NULL;
1988 iwn_alloc_tx_ring(struct iwn_softc *sc, struct iwn_tx_ring *ring, int qid)
1998 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
2000 /* Allocate TX descriptors (256-byte aligned). */
2001 size = IWN_TX_RING_COUNT * sizeof (struct iwn_tx_desc);
2002 error = iwn_dma_contig_alloc(sc, &ring->desc_dma, (void **)&ring->desc,
2005 device_printf(sc->sc_dev,
2006 "%s: could not allocate TX ring DMA memory, error %d\n",
2011 size = IWN_TX_RING_COUNT * sizeof (struct iwn_tx_cmd);
2012 error = iwn_dma_contig_alloc(sc, &ring->cmd_dma, (void **)&ring->cmd,
2015 device_printf(sc->sc_dev,
2016 "%s: could not allocate TX cmd DMA memory, error %d\n",
2021 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 1, 0,
2022 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES,
2023 IWN_MAX_SCATTER - 1, MCLBYTES, 0, NULL, NULL, &ring->data_dmat);
2025 device_printf(sc->sc_dev,
2026 "%s: could not create TX buf DMA tag, error %d\n",
2031 paddr = ring->cmd_dma.paddr;
2032 for (i = 0; i < IWN_TX_RING_COUNT; i++) {
2033 struct iwn_tx_data *data = &ring->data[i];
2035 data->cmd_paddr = paddr;
2036 data->scratch_paddr = paddr + 12;
2037 paddr += sizeof (struct iwn_tx_cmd);
2039 error = bus_dmamap_create(ring->data_dmat, 0, &data->map);
2041 device_printf(sc->sc_dev,
2042 "%s: could not create TX buf DMA map, error %d\n",
2048 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
2052 fail: iwn_free_tx_ring(sc, ring);
2053 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end in error\n", __func__);
2058 iwn_reset_tx_ring(struct iwn_softc *sc, struct iwn_tx_ring *ring)
2062 DPRINTF(sc, IWN_DEBUG_TRACE, "->doing %s \n", __func__);
2064 for (i = 0; i < IWN_TX_RING_COUNT; i++) {
2065 struct iwn_tx_data *data = &ring->data[i];
2067 if (data->m != NULL) {
2068 bus_dmamap_sync(ring->data_dmat, data->map,
2069 BUS_DMASYNC_POSTWRITE);
2070 bus_dmamap_unload(ring->data_dmat, data->map);
2074 if (data->ni != NULL) {
2075 ieee80211_free_node(data->ni);
2079 data->long_retries = 0;
2081 /* Clear TX descriptors. */
2082 memset(ring->desc, 0, ring->desc_dma.size);
2083 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
2084 BUS_DMASYNC_PREWRITE);
2085 sc->qfullmsk &= ~(1 << ring->qid);
2091 iwn_free_tx_ring(struct iwn_softc *sc, struct iwn_tx_ring *ring)
2095 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s \n", __func__);
2097 iwn_dma_contig_free(&ring->desc_dma);
2098 iwn_dma_contig_free(&ring->cmd_dma);
2100 for (i = 0; i < IWN_TX_RING_COUNT; i++) {
2101 struct iwn_tx_data *data = &ring->data[i];
2103 if (data->m != NULL) {
2104 bus_dmamap_sync(ring->data_dmat, data->map,
2105 BUS_DMASYNC_POSTWRITE);
2106 bus_dmamap_unload(ring->data_dmat, data->map);
2109 if (data->map != NULL)
2110 bus_dmamap_destroy(ring->data_dmat, data->map);
2112 if (ring->data_dmat != NULL) {
2113 bus_dma_tag_destroy(ring->data_dmat);
2114 ring->data_dmat = NULL;
2119 iwn_check_tx_ring(struct iwn_softc *sc, int qid)
2121 struct iwn_tx_ring *ring = &sc->txq[qid];
2123 KASSERT(ring->queued >= 0, ("%s: ring->queued (%d) for queue %d < 0!",
2124 __func__, ring->queued, qid));
2126 if (qid >= sc->firstaggqueue) {
2127 struct iwn_ops *ops = &sc->ops;
2128 struct ieee80211_tx_ampdu *tap = sc->qid2tap[qid];
2130 if (ring->queued == 0 && !IEEE80211_AMPDU_RUNNING(tap)) {
2131 uint16_t ssn = tap->txa_start & 0xfff;
2132 uint8_t tid = tap->txa_tid;
2133 int *res = tap->txa_private;
2136 ops->ampdu_tx_stop(sc, qid, tid, ssn);
2139 sc->qid2tap[qid] = NULL;
2140 free(res, M_DEVBUF);
2144 if (ring->queued < IWN_TX_RING_LOMARK) {
2145 sc->qfullmsk &= ~(1 << qid);
2147 if (ring->queued == 0)
2148 sc->sc_tx_timer = 0;
2150 sc->sc_tx_timer = 5;
2155 iwn5000_ict_reset(struct iwn_softc *sc)
2157 /* Disable interrupts. */
2158 IWN_WRITE(sc, IWN_INT_MASK, 0);
2160 /* Reset ICT table. */
2161 memset(sc->ict, 0, IWN_ICT_SIZE);
2164 bus_dmamap_sync(sc->ict_dma.tag, sc->ict_dma.map,
2165 BUS_DMASYNC_PREWRITE);
2167 /* Set physical address of ICT table (4KB aligned). */
2168 DPRINTF(sc, IWN_DEBUG_RESET, "%s: enabling ICT\n", __func__);
2169 IWN_WRITE(sc, IWN_DRAM_INT_TBL, IWN_DRAM_INT_TBL_ENABLE |
2170 IWN_DRAM_INT_TBL_WRAP_CHECK | sc->ict_dma.paddr >> 12);
2172 /* Enable periodic RX interrupt. */
2173 sc->int_mask |= IWN_INT_RX_PERIODIC;
2174 /* Switch to ICT interrupt mode in driver. */
2175 sc->sc_flags |= IWN_FLAG_USE_ICT;
2177 /* Re-enable interrupts. */
2178 IWN_WRITE(sc, IWN_INT, 0xffffffff);
2179 IWN_WRITE(sc, IWN_INT_MASK, sc->int_mask);
2183 iwn_read_eeprom(struct iwn_softc *sc, uint8_t macaddr[IEEE80211_ADDR_LEN])
2185 struct iwn_ops *ops = &sc->ops;
2189 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
2191 /* Check whether adapter has an EEPROM or an OTPROM. */
2192 if (sc->hw_type >= IWN_HW_REV_TYPE_1000 &&
2193 (IWN_READ(sc, IWN_OTP_GP) & IWN_OTP_GP_DEV_SEL_OTP))
2194 sc->sc_flags |= IWN_FLAG_HAS_OTPROM;
2195 DPRINTF(sc, IWN_DEBUG_RESET, "%s found\n",
2196 (sc->sc_flags & IWN_FLAG_HAS_OTPROM) ? "OTPROM" : "EEPROM");
2198 /* Adapter has to be powered on for EEPROM access to work. */
2199 if ((error = iwn_apm_init(sc)) != 0) {
2200 device_printf(sc->sc_dev,
2201 "%s: could not power ON adapter, error %d\n", __func__,
2206 if ((IWN_READ(sc, IWN_EEPROM_GP) & 0x7) == 0) {
2207 device_printf(sc->sc_dev, "%s: bad ROM signature\n", __func__);
2210 if ((error = iwn_eeprom_lock(sc)) != 0) {
2211 device_printf(sc->sc_dev, "%s: could not lock ROM, error %d\n",
2215 if (sc->sc_flags & IWN_FLAG_HAS_OTPROM) {
2216 if ((error = iwn_init_otprom(sc)) != 0) {
2217 device_printf(sc->sc_dev,
2218 "%s: could not initialize OTPROM, error %d\n",
2224 iwn_read_prom_data(sc, IWN_EEPROM_SKU_CAP, &val, 2);
2225 DPRINTF(sc, IWN_DEBUG_RESET, "SKU capabilities=0x%04x\n", le16toh(val));
2226 /* Check if HT support is bonded out. */
2227 if (val & htole16(IWN_EEPROM_SKU_CAP_11N))
2228 sc->sc_flags |= IWN_FLAG_HAS_11N;
2230 iwn_read_prom_data(sc, IWN_EEPROM_RFCFG, &val, 2);
2231 sc->rfcfg = le16toh(val);
2232 DPRINTF(sc, IWN_DEBUG_RESET, "radio config=0x%04x\n", sc->rfcfg);
2233 /* Read Tx/Rx chains from ROM unless it's known to be broken. */
2234 if (sc->txchainmask == 0)
2235 sc->txchainmask = IWN_RFCFG_TXANTMSK(sc->rfcfg);
2236 if (sc->rxchainmask == 0)
2237 sc->rxchainmask = IWN_RFCFG_RXANTMSK(sc->rfcfg);
2239 /* Read MAC address. */
2240 iwn_read_prom_data(sc, IWN_EEPROM_MAC, macaddr, 6);
2242 /* Read adapter-specific information from EEPROM. */
2243 ops->read_eeprom(sc);
2245 iwn_apm_stop(sc); /* Power OFF adapter. */
2247 iwn_eeprom_unlock(sc);
2249 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
2255 iwn4965_read_eeprom(struct iwn_softc *sc)
2261 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
2263 /* Read regulatory domain (4 ASCII characters). */
2264 iwn_read_prom_data(sc, IWN4965_EEPROM_DOMAIN, sc->eeprom_domain, 4);
2266 /* Read the list of authorized channels (20MHz & 40MHz). */
2267 for (i = 0; i < IWN_NBANDS - 1; i++) {
2268 addr = iwn4965_regulatory_bands[i];
2269 iwn_read_eeprom_channels(sc, i, addr);
2272 /* Read maximum allowed TX power for 2GHz and 5GHz bands. */
2273 iwn_read_prom_data(sc, IWN4965_EEPROM_MAXPOW, &val, 2);
2274 sc->maxpwr2GHz = val & 0xff;
2275 sc->maxpwr5GHz = val >> 8;
2276 /* Check that EEPROM values are within valid range. */
2277 if (sc->maxpwr5GHz < 20 || sc->maxpwr5GHz > 50)
2278 sc->maxpwr5GHz = 38;
2279 if (sc->maxpwr2GHz < 20 || sc->maxpwr2GHz > 50)
2280 sc->maxpwr2GHz = 38;
2281 DPRINTF(sc, IWN_DEBUG_RESET, "maxpwr 2GHz=%d 5GHz=%d\n",
2282 sc->maxpwr2GHz, sc->maxpwr5GHz);
2284 /* Read samples for each TX power group. */
2285 iwn_read_prom_data(sc, IWN4965_EEPROM_BANDS, sc->bands,
2288 /* Read voltage at which samples were taken. */
2289 iwn_read_prom_data(sc, IWN4965_EEPROM_VOLTAGE, &val, 2);
2290 sc->eeprom_voltage = (int16_t)le16toh(val);
2291 DPRINTF(sc, IWN_DEBUG_RESET, "voltage=%d (in 0.3V)\n",
2292 sc->eeprom_voltage);
2295 /* Print samples. */
2296 if (sc->sc_debug & IWN_DEBUG_ANY) {
2297 for (i = 0; i < IWN_NBANDS - 1; i++)
2298 iwn4965_print_power_group(sc, i);
2302 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
2307 iwn4965_print_power_group(struct iwn_softc *sc, int i)
2309 struct iwn4965_eeprom_band *band = &sc->bands[i];
2310 struct iwn4965_eeprom_chan_samples *chans = band->chans;
2313 printf("===band %d===\n", i);
2314 printf("chan lo=%d, chan hi=%d\n", band->lo, band->hi);
2315 printf("chan1 num=%d\n", chans[0].num);
2316 for (c = 0; c < 2; c++) {
2317 for (j = 0; j < IWN_NSAMPLES; j++) {
2318 printf("chain %d, sample %d: temp=%d gain=%d "
2319 "power=%d pa_det=%d\n", c, j,
2320 chans[0].samples[c][j].temp,
2321 chans[0].samples[c][j].gain,
2322 chans[0].samples[c][j].power,
2323 chans[0].samples[c][j].pa_det);
2326 printf("chan2 num=%d\n", chans[1].num);
2327 for (c = 0; c < 2; c++) {
2328 for (j = 0; j < IWN_NSAMPLES; j++) {
2329 printf("chain %d, sample %d: temp=%d gain=%d "
2330 "power=%d pa_det=%d\n", c, j,
2331 chans[1].samples[c][j].temp,
2332 chans[1].samples[c][j].gain,
2333 chans[1].samples[c][j].power,
2334 chans[1].samples[c][j].pa_det);
2341 iwn5000_read_eeprom(struct iwn_softc *sc)
2343 struct iwn5000_eeprom_calib_hdr hdr;
2345 uint32_t base, addr;
2349 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
2351 /* Read regulatory domain (4 ASCII characters). */
2352 iwn_read_prom_data(sc, IWN5000_EEPROM_REG, &val, 2);
2353 base = le16toh(val);
2354 iwn_read_prom_data(sc, base + IWN5000_EEPROM_DOMAIN,
2355 sc->eeprom_domain, 4);
2357 /* Read the list of authorized channels (20MHz & 40MHz). */
2358 for (i = 0; i < IWN_NBANDS - 1; i++) {
2359 addr = base + sc->base_params->regulatory_bands[i];
2360 iwn_read_eeprom_channels(sc, i, addr);
2363 /* Read enhanced TX power information for 6000 Series. */
2364 if (sc->base_params->enhanced_TX_power)
2365 iwn_read_eeprom_enhinfo(sc);
2367 iwn_read_prom_data(sc, IWN5000_EEPROM_CAL, &val, 2);
2368 base = le16toh(val);
2369 iwn_read_prom_data(sc, base, &hdr, sizeof hdr);
2370 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
2371 "%s: calib version=%u pa type=%u voltage=%u\n", __func__,
2372 hdr.version, hdr.pa_type, le16toh(hdr.volt));
2373 sc->calib_ver = hdr.version;
2375 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSETv2) {
2376 sc->eeprom_voltage = le16toh(hdr.volt);
2377 iwn_read_prom_data(sc, base + IWN5000_EEPROM_TEMP, &val, 2);
2378 sc->eeprom_temp_high=le16toh(val);
2379 iwn_read_prom_data(sc, base + IWN5000_EEPROM_VOLT, &val, 2);
2380 sc->eeprom_temp = le16toh(val);
2383 if (sc->hw_type == IWN_HW_REV_TYPE_5150) {
2384 /* Compute temperature offset. */
2385 iwn_read_prom_data(sc, base + IWN5000_EEPROM_TEMP, &val, 2);
2386 sc->eeprom_temp = le16toh(val);
2387 iwn_read_prom_data(sc, base + IWN5000_EEPROM_VOLT, &val, 2);
2388 volt = le16toh(val);
2389 sc->temp_off = sc->eeprom_temp - (volt / -5);
2390 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "temp=%d volt=%d offset=%dK\n",
2391 sc->eeprom_temp, volt, sc->temp_off);
2393 /* Read crystal calibration. */
2394 iwn_read_prom_data(sc, base + IWN5000_EEPROM_CRYSTAL,
2395 &sc->eeprom_crystal, sizeof (uint32_t));
2396 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "crystal calibration 0x%08x\n",
2397 le32toh(sc->eeprom_crystal));
2400 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
2405 * Translate EEPROM flags to net80211.
2408 iwn_eeprom_channel_flags(struct iwn_eeprom_chan *channel)
2413 if ((channel->flags & IWN_EEPROM_CHAN_ACTIVE) == 0)
2414 nflags |= IEEE80211_CHAN_PASSIVE;
2415 if ((channel->flags & IWN_EEPROM_CHAN_IBSS) == 0)
2416 nflags |= IEEE80211_CHAN_NOADHOC;
2417 if (channel->flags & IWN_EEPROM_CHAN_RADAR) {
2418 nflags |= IEEE80211_CHAN_DFS;
2419 /* XXX apparently IBSS may still be marked */
2420 nflags |= IEEE80211_CHAN_NOADHOC;
2427 iwn_read_eeprom_band(struct iwn_softc *sc, int n, int maxchans, int *nchans,
2428 struct ieee80211_channel chans[])
2430 struct iwn_eeprom_chan *channels = sc->eeprom_channels[n];
2431 const struct iwn_chan_band *band = &iwn_bands[n];
2432 uint8_t bands[IEEE80211_MODE_BYTES];
2434 int i, error, nflags;
2436 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
2438 memset(bands, 0, sizeof(bands));
2440 setbit(bands, IEEE80211_MODE_11B);
2441 setbit(bands, IEEE80211_MODE_11G);
2442 if (sc->sc_flags & IWN_FLAG_HAS_11N)
2443 setbit(bands, IEEE80211_MODE_11NG);
2445 setbit(bands, IEEE80211_MODE_11A);
2446 if (sc->sc_flags & IWN_FLAG_HAS_11N)
2447 setbit(bands, IEEE80211_MODE_11NA);
2450 for (i = 0; i < band->nchan; i++) {
2451 if (!(channels[i].flags & IWN_EEPROM_CHAN_VALID)) {
2452 DPRINTF(sc, IWN_DEBUG_RESET,
2453 "skip chan %d flags 0x%x maxpwr %d\n",
2454 band->chan[i], channels[i].flags,
2455 channels[i].maxpwr);
2459 chan = band->chan[i];
2460 nflags = iwn_eeprom_channel_flags(&channels[i]);
2461 error = ieee80211_add_channel(chans, maxchans, nchans,
2462 chan, 0, channels[i].maxpwr, nflags, bands);
2466 /* Save maximum allowed TX power for this channel. */
2468 sc->maxpwr[chan] = channels[i].maxpwr;
2470 DPRINTF(sc, IWN_DEBUG_RESET,
2471 "add chan %d flags 0x%x maxpwr %d\n", chan,
2472 channels[i].flags, channels[i].maxpwr);
2475 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
2480 iwn_read_eeprom_ht40(struct iwn_softc *sc, int n, int maxchans, int *nchans,
2481 struct ieee80211_channel chans[])
2483 struct iwn_eeprom_chan *channels = sc->eeprom_channels[n];
2484 const struct iwn_chan_band *band = &iwn_bands[n];
2486 int i, error, nflags;
2488 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s start\n", __func__);
2490 if (!(sc->sc_flags & IWN_FLAG_HAS_11N)) {
2491 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end no 11n\n", __func__);
2495 for (i = 0; i < band->nchan; i++) {
2496 if (!(channels[i].flags & IWN_EEPROM_CHAN_VALID)) {
2497 DPRINTF(sc, IWN_DEBUG_RESET,
2498 "skip chan %d flags 0x%x maxpwr %d\n",
2499 band->chan[i], channels[i].flags,
2500 channels[i].maxpwr);
2504 chan = band->chan[i];
2505 nflags = iwn_eeprom_channel_flags(&channels[i]);
2506 nflags |= (n == 5 ? IEEE80211_CHAN_G : IEEE80211_CHAN_A);
2507 error = ieee80211_add_channel_ht40(chans, maxchans, nchans,
2508 chan, channels[i].maxpwr, nflags);
2511 device_printf(sc->sc_dev,
2512 "%s: no entry for channel %d\n", __func__, chan);
2515 DPRINTF(sc, IWN_DEBUG_RESET,
2516 "%s: skip chan %d, extension channel not found\n",
2520 device_printf(sc->sc_dev,
2521 "%s: channel table is full!\n", __func__);
2524 DPRINTF(sc, IWN_DEBUG_RESET,
2525 "add ht40 chan %d flags 0x%x maxpwr %d\n",
2526 chan, channels[i].flags, channels[i].maxpwr);
2533 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
2538 iwn_read_eeprom_channels(struct iwn_softc *sc, int n, uint32_t addr)
2540 struct ieee80211com *ic = &sc->sc_ic;
2542 iwn_read_prom_data(sc, addr, &sc->eeprom_channels[n],
2543 iwn_bands[n].nchan * sizeof (struct iwn_eeprom_chan));
2546 iwn_read_eeprom_band(sc, n, IEEE80211_CHAN_MAX, &ic->ic_nchans,
2549 iwn_read_eeprom_ht40(sc, n, IEEE80211_CHAN_MAX, &ic->ic_nchans,
2552 ieee80211_sort_channels(ic->ic_channels, ic->ic_nchans);
2555 static struct iwn_eeprom_chan *
2556 iwn_find_eeprom_channel(struct iwn_softc *sc, struct ieee80211_channel *c)
2558 int band, chan, i, j;
2560 if (IEEE80211_IS_CHAN_HT40(c)) {
2561 band = IEEE80211_IS_CHAN_5GHZ(c) ? 6 : 5;
2562 if (IEEE80211_IS_CHAN_HT40D(c))
2563 chan = c->ic_extieee;
2566 for (i = 0; i < iwn_bands[band].nchan; i++) {
2567 if (iwn_bands[band].chan[i] == chan)
2568 return &sc->eeprom_channels[band][i];
2571 for (j = 0; j < 5; j++) {
2572 for (i = 0; i < iwn_bands[j].nchan; i++) {
2573 if (iwn_bands[j].chan[i] == c->ic_ieee &&
2574 ((j == 0) ^ IEEE80211_IS_CHAN_A(c)) == 1)
2575 return &sc->eeprom_channels[j][i];
2583 iwn_getradiocaps(struct ieee80211com *ic,
2584 int maxchans, int *nchans, struct ieee80211_channel chans[])
2586 struct iwn_softc *sc = ic->ic_softc;
2589 /* Parse the list of authorized channels. */
2590 for (i = 0; i < 5 && *nchans < maxchans; i++)
2591 iwn_read_eeprom_band(sc, i, maxchans, nchans, chans);
2592 for (i = 5; i < IWN_NBANDS - 1 && *nchans < maxchans; i++)
2593 iwn_read_eeprom_ht40(sc, i, maxchans, nchans, chans);
2597 * Enforce flags read from EEPROM.
2600 iwn_setregdomain(struct ieee80211com *ic, struct ieee80211_regdomain *rd,
2601 int nchan, struct ieee80211_channel chans[])
2603 struct iwn_softc *sc = ic->ic_softc;
2606 for (i = 0; i < nchan; i++) {
2607 struct ieee80211_channel *c = &chans[i];
2608 struct iwn_eeprom_chan *channel;
2610 channel = iwn_find_eeprom_channel(sc, c);
2611 if (channel == NULL) {
2612 ic_printf(ic, "%s: invalid channel %u freq %u/0x%x\n",
2613 __func__, c->ic_ieee, c->ic_freq, c->ic_flags);
2616 c->ic_flags |= iwn_eeprom_channel_flags(channel);
2623 iwn_read_eeprom_enhinfo(struct iwn_softc *sc)
2625 struct iwn_eeprom_enhinfo enhinfo[35];
2626 struct ieee80211com *ic = &sc->sc_ic;
2627 struct ieee80211_channel *c;
2633 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
2635 iwn_read_prom_data(sc, IWN5000_EEPROM_REG, &val, 2);
2636 base = le16toh(val);
2637 iwn_read_prom_data(sc, base + IWN6000_EEPROM_ENHINFO,
2638 enhinfo, sizeof enhinfo);
2640 for (i = 0; i < nitems(enhinfo); i++) {
2641 flags = enhinfo[i].flags;
2642 if (!(flags & IWN_ENHINFO_VALID))
2643 continue; /* Skip invalid entries. */
2646 if (sc->txchainmask & IWN_ANT_A)
2647 maxpwr = MAX(maxpwr, enhinfo[i].chain[0]);
2648 if (sc->txchainmask & IWN_ANT_B)
2649 maxpwr = MAX(maxpwr, enhinfo[i].chain[1]);
2650 if (sc->txchainmask & IWN_ANT_C)
2651 maxpwr = MAX(maxpwr, enhinfo[i].chain[2]);
2652 if (sc->ntxchains == 2)
2653 maxpwr = MAX(maxpwr, enhinfo[i].mimo2);
2654 else if (sc->ntxchains == 3)
2655 maxpwr = MAX(maxpwr, enhinfo[i].mimo3);
2657 for (j = 0; j < ic->ic_nchans; j++) {
2658 c = &ic->ic_channels[j];
2659 if ((flags & IWN_ENHINFO_5GHZ)) {
2660 if (!IEEE80211_IS_CHAN_A(c))
2662 } else if ((flags & IWN_ENHINFO_OFDM)) {
2663 if (!IEEE80211_IS_CHAN_G(c))
2665 } else if (!IEEE80211_IS_CHAN_B(c))
2667 if ((flags & IWN_ENHINFO_HT40)) {
2668 if (!IEEE80211_IS_CHAN_HT40(c))
2671 if (IEEE80211_IS_CHAN_HT40(c))
2674 if (enhinfo[i].chan != 0 &&
2675 enhinfo[i].chan != c->ic_ieee)
2678 DPRINTF(sc, IWN_DEBUG_RESET,
2679 "channel %d(%x), maxpwr %d\n", c->ic_ieee,
2680 c->ic_flags, maxpwr / 2);
2681 c->ic_maxregpower = maxpwr / 2;
2682 c->ic_maxpower = maxpwr;
2686 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
2690 static struct ieee80211_node *
2691 iwn_node_alloc(struct ieee80211vap *vap, const uint8_t mac[IEEE80211_ADDR_LEN])
2693 struct iwn_node *wn;
2695 wn = malloc(sizeof (struct iwn_node), M_80211_NODE, M_NOWAIT | M_ZERO);
2699 wn->id = IWN_ID_UNDEFINED;
2707 switch (rate & 0xff) {
2708 case 12: return 0xd;
2709 case 18: return 0xf;
2710 case 24: return 0x5;
2711 case 36: return 0x7;
2712 case 48: return 0x9;
2713 case 72: return 0xb;
2714 case 96: return 0x1;
2715 case 108: return 0x3;
2719 case 22: return 110;
2724 static __inline uint8_t
2725 plcp2rate(const uint8_t rate_plcp)
2727 switch (rate_plcp) {
2728 case 0xd: return 12;
2729 case 0xf: return 18;
2730 case 0x5: return 24;
2731 case 0x7: return 36;
2732 case 0x9: return 48;
2733 case 0xb: return 72;
2734 case 0x1: return 96;
2735 case 0x3: return 108;
2739 case 110: return 22;
2745 iwn_get_1stream_tx_antmask(struct iwn_softc *sc)
2748 return IWN_LSB(sc->txchainmask);
2752 iwn_get_2stream_tx_antmask(struct iwn_softc *sc)
2757 * The '2 stream' setup is a bit .. odd.
2759 * For NICs that support only 1 antenna, default to IWN_ANT_AB or
2760 * the firmware panics (eg Intel 5100.)
2762 * For NICs that support two antennas, we use ANT_AB.
2764 * For NICs that support three antennas, we use the two that
2765 * wasn't the default one.
2767 * XXX TODO: if bluetooth (full concurrent) is enabled, restrict
2768 * this to only one antenna.
2771 /* Default - transmit on the other antennas */
2772 tx = (sc->txchainmask & ~IWN_LSB(sc->txchainmask));
2774 /* Now, if it's zero, set it to IWN_ANT_AB, so to not panic firmware */
2779 * If the NIC is a two-stream TX NIC, configure the TX mask to
2780 * the default chainmask
2782 else if (sc->ntxchains == 2)
2783 tx = sc->txchainmask;
2791 * Calculate the required PLCP value from the given rate,
2792 * to the given node.
2794 * This will take the node configuration (eg 11n, rate table
2795 * setup, etc) into consideration.
2798 iwn_rate_to_plcp(struct iwn_softc *sc, struct ieee80211_node *ni,
2801 struct ieee80211com *ic = ni->ni_ic;
2806 * If it's an MCS rate, let's set the plcp correctly
2807 * and set the relevant flags based on the node config.
2809 if (rate & IEEE80211_RATE_MCS) {
2811 * Set the initial PLCP value to be between 0->31 for
2812 * MCS 0 -> MCS 31, then set the "I'm an MCS rate!"
2815 plcp = IEEE80211_RV(rate) | IWN_RFLAG_MCS;
2818 * XXX the following should only occur if both
2819 * the local configuration _and_ the remote node
2820 * advertise these capabilities. Thus this code
2825 * Set the channel width and guard interval.
2827 if (IEEE80211_IS_CHAN_HT40(ni->ni_chan)) {
2828 plcp |= IWN_RFLAG_HT40;
2829 if (ni->ni_htcap & IEEE80211_HTCAP_SHORTGI40)
2830 plcp |= IWN_RFLAG_SGI;
2831 } else if (ni->ni_htcap & IEEE80211_HTCAP_SHORTGI20) {
2832 plcp |= IWN_RFLAG_SGI;
2836 * Ensure the selected rate matches the link quality
2837 * table entries being used.
2840 plcp |= IWN_RFLAG_ANT(sc->txchainmask);
2841 else if (rate > 0x87)
2842 plcp |= IWN_RFLAG_ANT(iwn_get_2stream_tx_antmask(sc));
2844 plcp |= IWN_RFLAG_ANT(iwn_get_1stream_tx_antmask(sc));
2847 * Set the initial PLCP - fine for both
2848 * OFDM and CCK rates.
2850 plcp = rate2plcp(rate);
2852 /* Set CCK flag if it's CCK */
2854 /* XXX It would be nice to have a method
2855 * to map the ridx -> phy table entry
2856 * so we could just query that, rather than
2857 * this hack to check against IWN_RIDX_OFDM6.
2859 ridx = ieee80211_legacy_rate_lookup(ic->ic_rt,
2860 rate & IEEE80211_RATE_VAL);
2861 if (ridx < IWN_RIDX_OFDM6 &&
2862 IEEE80211_IS_CHAN_2GHZ(ni->ni_chan))
2863 plcp |= IWN_RFLAG_CCK;
2865 /* Set antenna configuration */
2866 /* XXX TODO: is this the right antenna to use for legacy? */
2867 plcp |= IWN_RFLAG_ANT(iwn_get_1stream_tx_antmask(sc));
2870 DPRINTF(sc, IWN_DEBUG_TXRATE, "%s: rate=0x%02x, plcp=0x%08x\n",
2875 return (htole32(plcp));
2879 iwn_newassoc(struct ieee80211_node *ni, int isnew)
2881 /* Doesn't do anything at the moment */
2885 iwn_media_change(struct ifnet *ifp)
2889 error = ieee80211_media_change(ifp);
2890 /* NB: only the fixed rate can change and that doesn't need a reset */
2891 return (error == ENETRESET ? 0 : error);
2895 iwn_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg)
2897 struct iwn_vap *ivp = IWN_VAP(vap);
2898 struct ieee80211com *ic = vap->iv_ic;
2899 struct iwn_softc *sc = ic->ic_softc;
2902 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
2904 DPRINTF(sc, IWN_DEBUG_STATE, "%s: %s -> %s\n", __func__,
2905 ieee80211_state_name[vap->iv_state], ieee80211_state_name[nstate]);
2907 IEEE80211_UNLOCK(ic);
2909 callout_stop(&sc->calib_to);
2911 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX];
2914 case IEEE80211_S_ASSOC:
2915 if (vap->iv_state != IEEE80211_S_RUN)
2918 case IEEE80211_S_AUTH:
2919 if (vap->iv_state == IEEE80211_S_AUTH)
2923 * !AUTH -> AUTH transition requires state reset to handle
2924 * reassociations correctly.
2926 sc->rxon->associd = 0;
2927 sc->rxon->filter &= ~htole32(IWN_FILTER_BSS);
2928 sc->calib.state = IWN_CALIB_STATE_INIT;
2930 /* Wait until we hear a beacon before we transmit */
2931 if (IEEE80211_IS_CHAN_PASSIVE(ic->ic_curchan))
2932 sc->sc_beacon_wait = 1;
2934 if ((error = iwn_auth(sc, vap)) != 0) {
2935 device_printf(sc->sc_dev,
2936 "%s: could not move to auth state\n", __func__);
2940 case IEEE80211_S_RUN:
2942 * RUN -> RUN transition; Just restart the timers.
2944 if (vap->iv_state == IEEE80211_S_RUN) {
2949 /* Wait until we hear a beacon before we transmit */
2950 if (IEEE80211_IS_CHAN_PASSIVE(ic->ic_curchan))
2951 sc->sc_beacon_wait = 1;
2954 * !RUN -> RUN requires setting the association id
2955 * which is done with a firmware cmd. We also defer
2956 * starting the timers until that work is done.
2958 if ((error = iwn_run(sc, vap)) != 0) {
2959 device_printf(sc->sc_dev,
2960 "%s: could not move to run state\n", __func__);
2964 case IEEE80211_S_INIT:
2965 sc->calib.state = IWN_CALIB_STATE_INIT;
2967 * Purge the xmit queue so we don't have old frames
2968 * during a new association attempt.
2970 sc->sc_beacon_wait = 0;
2971 iwn_xmit_queue_drain(sc);
2980 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end in error\n", __func__);
2984 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
2986 return ivp->iv_newstate(vap, nstate, arg);
2990 iwn_calib_timeout(void *arg)
2992 struct iwn_softc *sc = arg;
2994 IWN_LOCK_ASSERT(sc);
2996 /* Force automatic TX power calibration every 60 secs. */
2997 if (++sc->calib_cnt >= 120) {
3000 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s\n",
3001 "sending request for statistics");
3002 (void)iwn_cmd(sc, IWN_CMD_GET_STATISTICS, &flags,
3006 callout_reset(&sc->calib_to, msecs_to_ticks(500), iwn_calib_timeout,
3011 * Process an RX_PHY firmware notification. This is usually immediately
3012 * followed by an MPDU_RX_DONE notification.
3015 iwn_rx_phy(struct iwn_softc *sc, struct iwn_rx_desc *desc)
3017 struct iwn_rx_stat *stat = (struct iwn_rx_stat *)(desc + 1);
3019 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: received PHY stats\n", __func__);
3021 /* Save RX statistics, they will be used on MPDU_RX_DONE. */
3022 memcpy(&sc->last_rx_stat, stat, sizeof (*stat));
3023 sc->last_rx_valid = 1;
3027 * Process an RX_DONE (4965AGN only) or MPDU_RX_DONE firmware notification.
3028 * Each MPDU_RX_DONE notification must be preceded by an RX_PHY one.
3031 iwn_rx_done(struct iwn_softc *sc, struct iwn_rx_desc *desc,
3032 struct iwn_rx_data *data)
3034 struct iwn_ops *ops = &sc->ops;
3035 struct ieee80211com *ic = &sc->sc_ic;
3036 struct iwn_rx_ring *ring = &sc->rxq;
3037 struct ieee80211_frame_min *wh;
3038 struct ieee80211_node *ni;
3039 struct mbuf *m, *m1;
3040 struct iwn_rx_stat *stat;
3044 int error, len, rssi, nf;
3046 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
3048 if (desc->type == IWN_MPDU_RX_DONE) {
3049 /* Check for prior RX_PHY notification. */
3050 if (!sc->last_rx_valid) {
3051 DPRINTF(sc, IWN_DEBUG_ANY,
3052 "%s: missing RX_PHY\n", __func__);
3055 stat = &sc->last_rx_stat;
3057 stat = (struct iwn_rx_stat *)(desc + 1);
3059 if (stat->cfg_phy_len > IWN_STAT_MAXLEN) {
3060 device_printf(sc->sc_dev,
3061 "%s: invalid RX statistic header, len %d\n", __func__,
3065 if (desc->type == IWN_MPDU_RX_DONE) {
3066 struct iwn_rx_mpdu *mpdu = (struct iwn_rx_mpdu *)(desc + 1);
3067 head = (caddr_t)(mpdu + 1);
3068 len = le16toh(mpdu->len);
3070 head = (caddr_t)(stat + 1) + stat->cfg_phy_len;
3071 len = le16toh(stat->len);
3074 flags = le32toh(*(uint32_t *)(head + len));
3076 /* Discard frames with a bad FCS early. */
3077 if ((flags & IWN_RX_NOERROR) != IWN_RX_NOERROR) {
3078 DPRINTF(sc, IWN_DEBUG_RECV, "%s: RX flags error %x\n",
3080 counter_u64_add(ic->ic_ierrors, 1);
3083 /* Discard frames that are too short. */
3084 if (len < sizeof (struct ieee80211_frame_ack)) {
3085 DPRINTF(sc, IWN_DEBUG_RECV, "%s: frame too short: %d\n",
3087 counter_u64_add(ic->ic_ierrors, 1);
3091 m1 = m_getjcl(M_NOWAIT, MT_DATA, M_PKTHDR, IWN_RBUF_SIZE);
3093 DPRINTF(sc, IWN_DEBUG_ANY, "%s: no mbuf to restock ring\n",
3095 counter_u64_add(ic->ic_ierrors, 1);
3098 bus_dmamap_unload(ring->data_dmat, data->map);
3100 error = bus_dmamap_load(ring->data_dmat, data->map, mtod(m1, void *),
3101 IWN_RBUF_SIZE, iwn_dma_map_addr, &paddr, BUS_DMA_NOWAIT);
3102 if (error != 0 && error != EFBIG) {
3103 device_printf(sc->sc_dev,
3104 "%s: bus_dmamap_load failed, error %d\n", __func__, error);
3107 /* Try to reload the old mbuf. */
3108 error = bus_dmamap_load(ring->data_dmat, data->map,
3109 mtod(data->m, void *), IWN_RBUF_SIZE, iwn_dma_map_addr,
3110 &paddr, BUS_DMA_NOWAIT);
3111 if (error != 0 && error != EFBIG) {
3112 panic("%s: could not load old RX mbuf", __func__);
3114 bus_dmamap_sync(ring->data_dmat, data->map,
3115 BUS_DMASYNC_PREREAD);
3116 /* Physical address may have changed. */
3117 ring->desc[ring->cur] = htole32(paddr >> 8);
3118 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
3119 BUS_DMASYNC_PREWRITE);
3120 counter_u64_add(ic->ic_ierrors, 1);
3124 bus_dmamap_sync(ring->data_dmat, data->map,
3125 BUS_DMASYNC_PREREAD);
3129 /* Update RX descriptor. */
3130 ring->desc[ring->cur] = htole32(paddr >> 8);
3131 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
3132 BUS_DMASYNC_PREWRITE);
3134 /* Finalize mbuf. */
3136 m->m_pkthdr.len = m->m_len = len;
3138 /* Grab a reference to the source node. */
3139 wh = mtod(m, struct ieee80211_frame_min *);
3140 if (len >= sizeof(struct ieee80211_frame_min))
3141 ni = ieee80211_find_rxnode(ic, wh);
3144 nf = (ni != NULL && ni->ni_vap->iv_state == IEEE80211_S_RUN &&
3145 (ic->ic_flags & IEEE80211_F_SCAN) == 0) ? sc->noise : -95;
3147 rssi = ops->get_rssi(sc, stat);
3149 if (ieee80211_radiotap_active(ic)) {
3150 struct iwn_rx_radiotap_header *tap = &sc->sc_rxtap;
3151 uint32_t rate = le32toh(stat->rate);
3154 if (stat->flags & htole16(IWN_STAT_FLAG_SHPREAMBLE))
3155 tap->wr_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
3156 tap->wr_dbm_antsignal = (int8_t)rssi;
3157 tap->wr_dbm_antnoise = (int8_t)nf;
3158 tap->wr_tsft = stat->tstamp;
3159 if (rate & IWN_RFLAG_MCS) {
3160 tap->wr_rate = rate & IWN_RFLAG_RATE_MCS;
3161 tap->wr_rate |= IEEE80211_RATE_MCS;
3163 tap->wr_rate = plcp2rate(rate & IWN_RFLAG_RATE);
3167 * If it's a beacon and we're waiting, then do the
3168 * wakeup. This should unblock raw_xmit/start.
3170 if (sc->sc_beacon_wait) {
3171 uint8_t type, subtype;
3172 /* NB: Re-assign wh */
3173 wh = mtod(m, struct ieee80211_frame_min *);
3174 type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK;
3175 subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
3177 * This assumes at this point we've received our own
3180 DPRINTF(sc, IWN_DEBUG_TRACE,
3181 "%s: beacon_wait, type=%d, subtype=%d\n",
3182 __func__, type, subtype);
3183 if (type == IEEE80211_FC0_TYPE_MGT &&
3184 subtype == IEEE80211_FC0_SUBTYPE_BEACON) {
3185 DPRINTF(sc, IWN_DEBUG_TRACE | IWN_DEBUG_XMIT,
3186 "%s: waking things up\n", __func__);
3187 /* queue taskqueue to transmit! */
3188 taskqueue_enqueue(sc->sc_tq, &sc->sc_xmit_task);
3194 /* Send the frame to the 802.11 layer. */
3196 if (ni->ni_flags & IEEE80211_NODE_HT)
3197 m->m_flags |= M_AMPDU;
3198 (void)ieee80211_input(ni, m, rssi - nf, nf);
3199 /* Node is no longer needed. */
3200 ieee80211_free_node(ni);
3202 (void)ieee80211_input_all(ic, m, rssi - nf, nf);
3206 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
3211 iwn_agg_tx_complete(struct iwn_softc *sc, struct iwn_tx_ring *ring, int tid,
3212 int idx, int success)
3214 struct ieee80211_ratectl_tx_status *txs = &sc->sc_txs;
3215 struct iwn_tx_data *data = &ring->data[idx];
3216 struct iwn_node *wn;
3218 struct ieee80211_node *ni;
3220 KASSERT(data->ni != NULL, ("idx %d: no node", idx));
3221 KASSERT(data->m != NULL, ("idx %d: no mbuf", idx));
3223 /* Unmap and free mbuf. */
3224 bus_dmamap_sync(ring->data_dmat, data->map,
3225 BUS_DMASYNC_POSTWRITE);
3226 bus_dmamap_unload(ring->data_dmat, data->map);
3227 m = data->m, data->m = NULL;
3228 ni = data->ni, data->ni = NULL;
3232 /* XXX causes significant performance degradation. */
3233 txs->flags = IEEE80211_RATECTL_STATUS_SHORT_RETRY |
3234 IEEE80211_RATECTL_STATUS_LONG_RETRY;
3235 txs->long_retries = data->long_retries - 1;
3237 txs->flags = IEEE80211_RATECTL_STATUS_SHORT_RETRY;
3239 txs->short_retries = wn->agg[tid].short_retries;
3241 txs->status = IEEE80211_RATECTL_TX_SUCCESS;
3243 txs->status = IEEE80211_RATECTL_TX_FAIL_UNSPECIFIED;
3245 wn->agg[tid].short_retries = 0;
3246 data->long_retries = 0;
3248 DPRINTF(sc, IWN_DEBUG_AMPDU, "%s: freeing m %p ni %p idx %d qid %d\n",
3249 __func__, m, ni, idx, ring->qid);
3250 ieee80211_ratectl_tx_complete(ni, txs);
3251 ieee80211_tx_complete(ni, m, !success);
3254 /* Process an incoming Compressed BlockAck. */
3256 iwn_rx_compressed_ba(struct iwn_softc *sc, struct iwn_rx_desc *desc)
3258 struct iwn_tx_ring *ring;
3259 struct iwn_tx_data *data;
3260 struct iwn_node *wn;
3261 struct iwn_compressed_ba *ba = (struct iwn_compressed_ba *)(desc + 1);
3262 struct ieee80211_tx_ampdu *tap;
3268 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
3270 qid = le16toh(ba->qid);
3271 tap = sc->qid2tap[qid];
3272 ring = &sc->txq[qid];
3274 wn = (void *)tap->txa_ni;
3276 DPRINTF(sc, IWN_DEBUG_AMPDU, "%s: qid %d tid %d seq %04X ssn %04X\n"
3277 "bitmap: ba %016jX wn %016jX, start %d\n",
3278 __func__, qid, tid, le16toh(ba->seq), le16toh(ba->ssn),
3279 (uintmax_t)le64toh(ba->bitmap), (uintmax_t)wn->agg[tid].bitmap,
3280 wn->agg[tid].startidx);
3282 if (wn->agg[tid].bitmap == 0)
3285 shift = wn->agg[tid].startidx - ((le16toh(ba->seq) >> 4) & 0xff);
3290 * Walk the bitmap and calculate how many successful attempts
3293 * Yes, the rate control code doesn't know these are A-MPDU
3294 * subframes; due to that long_retries stats are not used here.
3296 bitmap = le64toh(ba->bitmap);
3301 bitmap &= wn->agg[tid].bitmap;
3302 wn->agg[tid].bitmap = 0;
3304 for (i = wn->agg[tid].startidx;
3306 bitmap >>= 1, i = (i + 1) % IWN_TX_RING_COUNT) {
3307 if ((bitmap & 1) == 0)
3310 data = &ring->data[i];
3311 if (__predict_false(data->m == NULL)) {
3313 * There is no frame; skip this entry.
3315 * NB: it is "ok" to have both
3316 * 'tx done' + 'compressed BA' replies for frame
3317 * with STATE_SCD_QUERY status.
3319 DPRINTF(sc, IWN_DEBUG_AMPDU,
3320 "%s: ring %d: no entry %d\n", __func__, qid, i);
3325 iwn_agg_tx_complete(sc, ring, tid, i, 1);
3328 ring->queued -= tx_ok;
3329 iwn_check_tx_ring(sc, qid);
3331 DPRINTF(sc, IWN_DEBUG_TRACE | IWN_DEBUG_AMPDU,
3332 "->%s: end; %d ok\n",__func__, tx_ok);
3336 * Process a CALIBRATION_RESULT notification sent by the initialization
3337 * firmware on response to a CMD_CALIB_CONFIG command (5000 only).
3340 iwn5000_rx_calib_results(struct iwn_softc *sc, struct iwn_rx_desc *desc)
3342 struct iwn_phy_calib *calib = (struct iwn_phy_calib *)(desc + 1);
3345 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
3347 /* Runtime firmware should not send such a notification. */
3348 if (sc->sc_flags & IWN_FLAG_CALIB_DONE){
3349 DPRINTF(sc, IWN_DEBUG_TRACE,
3350 "->%s received after calib done\n", __func__);
3353 len = (le32toh(desc->len) & 0x3fff) - 4;
3355 switch (calib->code) {
3356 case IWN5000_PHY_CALIB_DC:
3357 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_DC)
3360 case IWN5000_PHY_CALIB_LO:
3361 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_LO)
3364 case IWN5000_PHY_CALIB_TX_IQ:
3365 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TX_IQ)
3368 case IWN5000_PHY_CALIB_TX_IQ_PERIODIC:
3369 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TX_IQ_PERIODIC)
3372 case IWN5000_PHY_CALIB_BASE_BAND:
3373 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_BASE_BAND)
3377 if (idx == -1) /* Ignore other results. */
3380 /* Save calibration result. */
3381 if (sc->calibcmd[idx].buf != NULL)
3382 free(sc->calibcmd[idx].buf, M_DEVBUF);
3383 sc->calibcmd[idx].buf = malloc(len, M_DEVBUF, M_NOWAIT);
3384 if (sc->calibcmd[idx].buf == NULL) {
3385 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
3386 "not enough memory for calibration result %d\n",
3390 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
3391 "saving calibration result idx=%d, code=%d len=%d\n", idx, calib->code, len);
3392 sc->calibcmd[idx].len = len;
3393 memcpy(sc->calibcmd[idx].buf, calib, len);
3397 iwn_stats_update(struct iwn_softc *sc, struct iwn_calib_state *calib,
3398 struct iwn_stats *stats, int len)
3400 struct iwn_stats_bt *stats_bt;
3401 struct iwn_stats *lstats;
3404 * First - check whether the length is the bluetooth or normal.
3406 * If it's normal - just copy it and bump out.
3407 * Otherwise we have to convert things.
3410 if (len == sizeof(struct iwn_stats) + 4) {
3411 memcpy(&sc->last_stat, stats, sizeof(struct iwn_stats));
3412 sc->last_stat_valid = 1;
3417 * If it's not the bluetooth size - log, then just copy.
3419 if (len != sizeof(struct iwn_stats_bt) + 4) {
3420 DPRINTF(sc, IWN_DEBUG_STATS,
3421 "%s: size of rx statistics (%d) not an expected size!\n",
3424 memcpy(&sc->last_stat, stats, sizeof(struct iwn_stats));
3425 sc->last_stat_valid = 1;
3432 stats_bt = (struct iwn_stats_bt *) stats;
3433 lstats = &sc->last_stat;
3436 lstats->flags = stats_bt->flags;
3438 memcpy(&lstats->rx.ofdm, &stats_bt->rx_bt.ofdm,
3439 sizeof(struct iwn_rx_phy_stats));
3440 memcpy(&lstats->rx.cck, &stats_bt->rx_bt.cck,
3441 sizeof(struct iwn_rx_phy_stats));
3442 memcpy(&lstats->rx.general, &stats_bt->rx_bt.general_bt.common,
3443 sizeof(struct iwn_rx_general_stats));
3444 memcpy(&lstats->rx.ht, &stats_bt->rx_bt.ht,
3445 sizeof(struct iwn_rx_ht_phy_stats));
3447 memcpy(&lstats->tx, &stats_bt->tx,
3448 sizeof(struct iwn_tx_stats));
3450 memcpy(&lstats->general, &stats_bt->general,
3451 sizeof(struct iwn_general_stats));
3453 /* XXX TODO: Squirrel away the extra bluetooth stats somewhere */
3454 sc->last_stat_valid = 1;
3458 * Process an RX_STATISTICS or BEACON_STATISTICS firmware notification.
3459 * The latter is sent by the firmware after each received beacon.
3462 iwn_rx_statistics(struct iwn_softc *sc, struct iwn_rx_desc *desc)
3464 struct iwn_ops *ops = &sc->ops;
3465 struct ieee80211com *ic = &sc->sc_ic;
3466 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
3467 struct iwn_calib_state *calib = &sc->calib;
3468 struct iwn_stats *stats = (struct iwn_stats *)(desc + 1);
3469 struct iwn_stats *lstats;
3472 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
3474 /* Ignore statistics received during a scan. */
3475 if (vap->iv_state != IEEE80211_S_RUN ||
3476 (ic->ic_flags & IEEE80211_F_SCAN)){
3477 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s received during calib\n",
3482 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_STATS,
3483 "%s: received statistics, cmd %d, len %d\n",
3484 __func__, desc->type, le16toh(desc->len));
3485 sc->calib_cnt = 0; /* Reset TX power calibration timeout. */
3488 * Collect/track general statistics for reporting.
3490 * This takes care of ensuring that the bluetooth sized message
3491 * will be correctly converted to the legacy sized message.
3493 iwn_stats_update(sc, calib, stats, le16toh(desc->len));
3496 * And now, let's take a reference of it to use!
3498 lstats = &sc->last_stat;
3500 /* Test if temperature has changed. */
3501 if (lstats->general.temp != sc->rawtemp) {
3502 /* Convert "raw" temperature to degC. */
3503 sc->rawtemp = stats->general.temp;
3504 temp = ops->get_temperature(sc);
3505 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: temperature %d\n",
3508 /* Update TX power if need be (4965AGN only). */
3509 if (sc->hw_type == IWN_HW_REV_TYPE_4965)
3510 iwn4965_power_calibration(sc, temp);
3513 if (desc->type != IWN_BEACON_STATISTICS)
3514 return; /* Reply to a statistics request. */
3516 sc->noise = iwn_get_noise(&lstats->rx.general);
3517 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: noise %d\n", __func__, sc->noise);
3519 /* Test that RSSI and noise are present in stats report. */
3520 if (le32toh(lstats->rx.general.flags) != 1) {
3521 DPRINTF(sc, IWN_DEBUG_ANY, "%s\n",
3522 "received statistics without RSSI");
3526 if (calib->state == IWN_CALIB_STATE_ASSOC)
3527 iwn_collect_noise(sc, &lstats->rx.general);
3528 else if (calib->state == IWN_CALIB_STATE_RUN) {
3529 iwn_tune_sensitivity(sc, &lstats->rx);
3531 * XXX TODO: Only run the RX recovery if we're associated!
3533 iwn_check_rx_recovery(sc, lstats);
3534 iwn_save_stats_counters(sc, lstats);
3537 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
3541 * Save the relevant statistic counters for the next calibration
3545 iwn_save_stats_counters(struct iwn_softc *sc, const struct iwn_stats *rs)
3547 struct iwn_calib_state *calib = &sc->calib;
3549 /* Save counters values for next call. */
3550 calib->bad_plcp_cck = le32toh(rs->rx.cck.bad_plcp);
3551 calib->fa_cck = le32toh(rs->rx.cck.fa);
3552 calib->bad_plcp_ht = le32toh(rs->rx.ht.bad_plcp);
3553 calib->bad_plcp_ofdm = le32toh(rs->rx.ofdm.bad_plcp);
3554 calib->fa_ofdm = le32toh(rs->rx.ofdm.fa);
3556 /* Last time we received these tick values */
3557 sc->last_calib_ticks = ticks;
3561 * Process a TX_DONE firmware notification. Unfortunately, the 4965AGN
3562 * and 5000 adapters have different incompatible TX status formats.
3565 iwn4965_tx_done(struct iwn_softc *sc, struct iwn_rx_desc *desc,
3566 struct iwn_rx_data *data)
3568 struct iwn4965_tx_stat *stat = (struct iwn4965_tx_stat *)(desc + 1);
3569 int qid = desc->qid & IWN_RX_DESC_QID_MSK;
3571 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: "
3572 "qid %d idx %d RTS retries %d ACK retries %d nkill %d rate %x duration %d status %x\n",
3573 __func__, desc->qid, desc->idx,
3577 stat->rate, le16toh(stat->duration),
3578 le32toh(stat->status));
3580 if (qid >= sc->firstaggqueue && stat->nframes != 1) {
3581 iwn_ampdu_tx_done(sc, qid, stat->nframes, stat->rtsfailcnt,
3584 iwn_tx_done(sc, desc, stat->rtsfailcnt, stat->ackfailcnt,
3585 le32toh(stat->status) & 0xff);
3590 iwn5000_tx_done(struct iwn_softc *sc, struct iwn_rx_desc *desc,
3591 struct iwn_rx_data *data)
3593 struct iwn5000_tx_stat *stat = (struct iwn5000_tx_stat *)(desc + 1);
3594 int qid = desc->qid & IWN_RX_DESC_QID_MSK;
3596 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: "
3597 "qid %d idx %d RTS retries %d ACK retries %d nkill %d rate %x duration %d status %x\n",
3598 __func__, desc->qid, desc->idx,
3602 stat->rate, le16toh(stat->duration),
3603 le32toh(stat->status));
3606 /* Reset TX scheduler slot. */
3607 iwn5000_reset_sched(sc, qid, desc->idx);
3610 if (qid >= sc->firstaggqueue && stat->nframes != 1) {
3611 iwn_ampdu_tx_done(sc, qid, stat->nframes, stat->rtsfailcnt,
3614 iwn_tx_done(sc, desc, stat->rtsfailcnt, stat->ackfailcnt,
3615 le16toh(stat->status) & 0xff);
3620 iwn_adj_ampdu_ptr(struct iwn_softc *sc, struct iwn_tx_ring *ring)
3624 for (i = ring->read; i != ring->cur; i = (i + 1) % IWN_TX_RING_COUNT) {
3625 struct iwn_tx_data *data = &ring->data[i];
3627 if (data->m != NULL)
3637 * Adapter-independent backend for TX_DONE firmware notifications.
3640 iwn_tx_done(struct iwn_softc *sc, struct iwn_rx_desc *desc, int rtsfailcnt,
3641 int ackfailcnt, uint8_t status)
3643 struct ieee80211_ratectl_tx_status *txs = &sc->sc_txs;
3644 struct iwn_tx_ring *ring = &sc->txq[desc->qid & IWN_RX_DESC_QID_MSK];
3645 struct iwn_tx_data *data = &ring->data[desc->idx];
3647 struct ieee80211_node *ni;
3649 if (__predict_false(data->m == NULL &&
3650 ring->qid >= sc->firstaggqueue)) {
3652 * There is no frame; skip this entry.
3654 DPRINTF(sc, IWN_DEBUG_AMPDU, "%s: ring %d: no entry %d\n",
3655 __func__, ring->qid, desc->idx);
3659 KASSERT(data->ni != NULL, ("no node"));
3660 KASSERT(data->m != NULL, ("no mbuf"));
3662 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
3664 /* Unmap and free mbuf. */
3665 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_POSTWRITE);
3666 bus_dmamap_unload(ring->data_dmat, data->map);
3667 m = data->m, data->m = NULL;
3668 ni = data->ni, data->ni = NULL;
3670 data->long_retries = 0;
3672 if (ring->qid >= sc->firstaggqueue)
3673 iwn_adj_ampdu_ptr(sc, ring);
3676 * XXX f/w may hang (device timeout) when desc->idx - ring->read == 64
3677 * (aggregation queues only).
3681 iwn_check_tx_ring(sc, ring->qid);
3684 * Update rate control statistics for the node.
3686 txs->flags = IEEE80211_RATECTL_STATUS_SHORT_RETRY |
3687 IEEE80211_RATECTL_STATUS_LONG_RETRY;
3688 txs->short_retries = rtsfailcnt;
3689 txs->long_retries = ackfailcnt;
3690 if (!(status & IWN_TX_FAIL))
3691 txs->status = IEEE80211_RATECTL_TX_SUCCESS;
3694 case IWN_TX_FAIL_SHORT_LIMIT:
3695 txs->status = IEEE80211_RATECTL_TX_FAIL_SHORT;
3697 case IWN_TX_FAIL_LONG_LIMIT:
3698 txs->status = IEEE80211_RATECTL_TX_FAIL_LONG;
3700 case IWN_TX_STATUS_FAIL_LIFE_EXPIRE:
3701 txs->status = IEEE80211_RATECTL_TX_FAIL_EXPIRED;
3704 txs->status = IEEE80211_RATECTL_TX_FAIL_UNSPECIFIED;
3708 ieee80211_ratectl_tx_complete(ni, txs);
3711 * Channels marked for "radar" require traffic to be received
3712 * to unlock before we can transmit. Until traffic is seen
3713 * any attempt to transmit is returned immediately with status
3714 * set to IWN_TX_FAIL_TX_LOCKED. Unfortunately this can easily
3715 * happen on first authenticate after scanning. To workaround
3716 * this we ignore a failure of this sort in AUTH state so the
3717 * 802.11 layer will fall back to using a timeout to wait for
3718 * the AUTH reply. This allows the firmware time to see
3719 * traffic so a subsequent retry of AUTH succeeds. It's
3720 * unclear why the firmware does not maintain state for
3721 * channels recently visited as this would allow immediate
3722 * use of the channel after a scan (where we see traffic).
3724 if (status == IWN_TX_FAIL_TX_LOCKED &&
3725 ni->ni_vap->iv_state == IEEE80211_S_AUTH)
3726 ieee80211_tx_complete(ni, m, 0);
3728 ieee80211_tx_complete(ni, m,
3729 (status & IWN_TX_FAIL) != 0);
3731 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
3735 * Process a "command done" firmware notification. This is where we wakeup
3736 * processes waiting for a synchronous command completion.
3739 iwn_cmd_done(struct iwn_softc *sc, struct iwn_rx_desc *desc)
3741 struct iwn_tx_ring *ring;
3742 struct iwn_tx_data *data;
3745 if (sc->sc_flags & IWN_FLAG_PAN_SUPPORT)
3746 cmd_queue_num = IWN_PAN_CMD_QUEUE;
3748 cmd_queue_num = IWN_CMD_QUEUE_NUM;
3750 if ((desc->qid & IWN_RX_DESC_QID_MSK) != cmd_queue_num)
3751 return; /* Not a command ack. */
3753 ring = &sc->txq[cmd_queue_num];
3754 data = &ring->data[desc->idx];
3756 /* If the command was mapped in an mbuf, free it. */
3757 if (data->m != NULL) {
3758 bus_dmamap_sync(ring->data_dmat, data->map,
3759 BUS_DMASYNC_POSTWRITE);
3760 bus_dmamap_unload(ring->data_dmat, data->map);
3764 wakeup(&ring->desc[desc->idx]);
3768 iwn_ampdu_check_bitmap(uint64_t bitmap, int start, int idx)
3775 shift = 0x100 - bit;
3777 } else if (bit <= -64)
3784 if (bit - shift >= 64)
3787 return ((bitmap & (1ULL << (bit - shift))) != 0);
3791 * Firmware bug workaround: in case if 'retries' counter
3792 * overflows 'seqno' field will be incremented:
3793 * status|sequence|status|sequence|status|sequence
3794 * 0000 0A48 0001 0A49 0000 0A6A
3795 * 1000 0A48 1000 0A49 1000 0A6A
3796 * 2000 0A48 2000 0A49 2000 0A6A
3798 * E000 0A48 E000 0A49 E000 0A6A
3799 * F000 0A48 F000 0A49 F000 0A6A
3800 * 0000 0A49 0000 0A49 0000 0A6B
3801 * 1000 0A49 1000 0A49 1000 0A6B
3803 * D000 0A49 D000 0A49 D000 0A6B
3804 * E000 0A49 E001 0A49 E000 0A6B
3805 * F000 0A49 F001 0A49 F000 0A6B
3806 * 0000 0A4A 0000 0A4B 0000 0A6A
3807 * 1000 0A4A 1000 0A4B 1000 0A6A
3810 * Odd 'seqno' numbers are incremened by 2 every 2 overflows.
3811 * For even 'seqno' % 4 != 0 overflow is cyclic (0 -> +1 -> 0).
3812 * Not checked with nretries >= 64.
3816 iwn_ampdu_index_check(struct iwn_softc *sc, struct iwn_tx_ring *ring,
3817 uint64_t bitmap, int start, int idx)
3819 struct ieee80211com *ic = &sc->sc_ic;
3820 struct iwn_tx_data *data;
3821 int diff, min_retries, max_retries, new_idx, loop_end;
3823 new_idx = idx - IWN_LONG_RETRY_LIMIT_LOG;
3825 new_idx += IWN_TX_RING_COUNT;
3828 * Corner case: check if retry count is not too big;
3829 * reset device otherwise.
3831 if (!iwn_ampdu_check_bitmap(bitmap, start, new_idx)) {
3832 data = &ring->data[new_idx];
3833 if (data->long_retries > IWN_LONG_RETRY_LIMIT) {
3834 device_printf(sc->sc_dev,
3835 "%s: retry count (%d) for idx %d/%d overflow, "
3836 "resetting...\n", __func__, data->long_retries,
3837 ring->qid, new_idx);
3838 ieee80211_restart_all(ic);
3843 /* Correct index if needed. */
3846 data = &ring->data[new_idx];
3847 diff = idx - new_idx;
3849 diff += IWN_TX_RING_COUNT;
3851 min_retries = IWN_LONG_RETRY_FW_OVERFLOW * diff;
3852 if ((new_idx % 2) == 0)
3853 max_retries = IWN_LONG_RETRY_FW_OVERFLOW * (diff + 1);
3855 max_retries = IWN_LONG_RETRY_FW_OVERFLOW * (diff + 2);
3857 if (!iwn_ampdu_check_bitmap(bitmap, start, new_idx) &&
3858 ((data->long_retries >= min_retries &&
3859 data->long_retries < max_retries) ||
3861 (new_idx & 0x03) == 0x02 &&
3862 data->long_retries >= IWN_LONG_RETRY_FW_OVERFLOW))) {
3863 DPRINTF(sc, IWN_DEBUG_AMPDU,
3864 "%s: correcting index %d -> %d in queue %d"
3865 " (retries %d)\n", __func__, idx, new_idx,
3866 ring->qid, data->long_retries);
3870 new_idx = (new_idx + 1) % IWN_TX_RING_COUNT;
3871 } while (new_idx != loop_end);
3877 iwn_ampdu_tx_done(struct iwn_softc *sc, int qid, int nframes, int rtsfailcnt,
3880 struct iwn_tx_ring *ring = &sc->txq[qid];
3881 struct ieee80211_tx_ampdu *tap = sc->qid2tap[qid];
3882 struct iwn_node *wn = (void *)tap->txa_ni;
3883 struct iwn_tx_data *data;
3884 uint64_t bitmap = 0;
3885 uint16_t *aggstatus = stat;
3886 uint8_t tid = tap->txa_tid;
3887 int bit, i, idx, shift, start, tx_err;
3889 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
3891 start = le16toh(*(aggstatus + nframes * 2)) & 0xff;
3893 for (i = 0; i < nframes; i++) {
3894 uint16_t status = le16toh(aggstatus[i * 2]);
3896 if (status & IWN_AGG_TX_STATE_IGNORE_MASK)
3899 idx = le16toh(aggstatus[i * 2 + 1]) & 0xff;
3900 data = &ring->data[idx];
3901 if (data->remapped) {
3902 idx = iwn_ampdu_index_check(sc, ring, bitmap, start, idx);
3904 /* skip error (device will be restarted anyway). */
3908 /* Index may have changed. */
3909 data = &ring->data[idx];
3913 * XXX Sometimes (rarely) some frames are excluded from events.
3914 * XXX Due to that long_retries counter may be wrong.
3916 data->long_retries &= ~0x0f;
3917 data->long_retries += IWN_AGG_TX_TRY_COUNT(status) + 1;
3919 if (data->long_retries >= IWN_LONG_RETRY_FW_OVERFLOW) {
3920 int diff, wrong_idx;
3922 diff = data->long_retries / IWN_LONG_RETRY_FW_OVERFLOW;
3923 wrong_idx = (idx + diff) % IWN_TX_RING_COUNT;
3926 * Mark the entry so the above code will check it
3929 ring->data[wrong_idx].remapped = 1;
3932 if (status & IWN_AGG_TX_STATE_UNDERRUN_MSK) {
3934 * NB: count retries but postpone - it was not
3943 shift = 0x100 - bit;
3945 } else if (bit <= -64)
3951 bitmap = bitmap << shift;
3952 bitmap |= 1ULL << bit;
3954 wn->agg[tid].startidx = start;
3955 wn->agg[tid].bitmap = bitmap;
3956 wn->agg[tid].short_retries = rtsfailcnt;
3958 DPRINTF(sc, IWN_DEBUG_AMPDU, "%s: nframes %d start %d bitmap %016jX\n",
3959 __func__, nframes, start, (uintmax_t)bitmap);
3964 i != wn->agg[tid].startidx;
3965 i = (i + 1) % IWN_TX_RING_COUNT) {
3966 data = &ring->data[i];
3968 if (data->m == NULL)
3972 iwn_agg_tx_complete(sc, ring, tid, i, 0);
3975 ring->read = wn->agg[tid].startidx;
3976 ring->queued -= tx_err;
3978 iwn_check_tx_ring(sc, qid);
3980 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
3984 * Process an INT_FH_RX or INT_SW_RX interrupt.
3987 iwn_notif_intr(struct iwn_softc *sc)
3989 struct iwn_ops *ops = &sc->ops;
3990 struct ieee80211com *ic = &sc->sc_ic;
3991 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
3995 bus_dmamap_sync(sc->rxq.stat_dma.tag, sc->rxq.stat_dma.map,
3996 BUS_DMASYNC_POSTREAD);
3998 hw = le16toh(sc->rxq.stat->closed_count) & 0xfff;
3999 while (sc->rxq.cur != hw) {
4000 struct iwn_rx_data *data = &sc->rxq.data[sc->rxq.cur];
4001 struct iwn_rx_desc *desc;
4003 bus_dmamap_sync(sc->rxq.data_dmat, data->map,
4004 BUS_DMASYNC_POSTREAD);
4005 desc = mtod(data->m, struct iwn_rx_desc *);
4007 DPRINTF(sc, IWN_DEBUG_RECV,
4008 "%s: cur=%d; qid %x idx %d flags %x type %d(%s) len %d\n",
4009 __func__, sc->rxq.cur, desc->qid & IWN_RX_DESC_QID_MSK,
4010 desc->idx, desc->flags, desc->type,
4011 iwn_intr_str(desc->type), le16toh(desc->len));
4013 if (!(desc->qid & IWN_UNSOLICITED_RX_NOTIF)) /* Reply to a command. */
4014 iwn_cmd_done(sc, desc);
4016 switch (desc->type) {
4018 iwn_rx_phy(sc, desc);
4021 case IWN_RX_DONE: /* 4965AGN only. */
4022 case IWN_MPDU_RX_DONE:
4023 /* An 802.11 frame has been received. */
4024 iwn_rx_done(sc, desc, data);
4026 is_stopped = (sc->sc_flags & IWN_FLAG_RUNNING) == 0;
4027 if (__predict_false(is_stopped))
4032 case IWN_RX_COMPRESSED_BA:
4033 /* A Compressed BlockAck has been received. */
4034 iwn_rx_compressed_ba(sc, desc);
4038 /* An 802.11 frame has been transmitted. */
4039 ops->tx_done(sc, desc, data);
4042 case IWN_RX_STATISTICS:
4043 case IWN_BEACON_STATISTICS:
4044 iwn_rx_statistics(sc, desc);
4047 case IWN_BEACON_MISSED:
4049 struct iwn_beacon_missed *miss =
4050 (struct iwn_beacon_missed *)(desc + 1);
4053 misses = le32toh(miss->consecutive);
4055 DPRINTF(sc, IWN_DEBUG_STATE,
4056 "%s: beacons missed %d/%d\n", __func__,
4057 misses, le32toh(miss->total));
4059 * If more than 5 consecutive beacons are missed,
4060 * reinitialize the sensitivity state machine.
4062 if (vap->iv_state == IEEE80211_S_RUN &&
4063 (ic->ic_flags & IEEE80211_F_SCAN) == 0) {
4065 (void)iwn_init_sensitivity(sc);
4066 if (misses >= vap->iv_bmissthreshold) {
4068 ieee80211_beacon_miss(ic);
4071 is_stopped = (sc->sc_flags &
4072 IWN_FLAG_RUNNING) == 0;
4073 if (__predict_false(is_stopped))
4081 struct iwn_ucode_info *uc =
4082 (struct iwn_ucode_info *)(desc + 1);
4084 /* The microcontroller is ready. */
4085 DPRINTF(sc, IWN_DEBUG_RESET,
4086 "microcode alive notification version=%d.%d "
4087 "subtype=%x alive=%x\n", uc->major, uc->minor,
4088 uc->subtype, le32toh(uc->valid));
4090 if (le32toh(uc->valid) != 1) {
4091 device_printf(sc->sc_dev,
4092 "microcontroller initialization failed");
4095 if (uc->subtype == IWN_UCODE_INIT) {
4096 /* Save microcontroller report. */
4097 memcpy(&sc->ucode_info, uc, sizeof (*uc));
4099 /* Save the address of the error log in SRAM. */
4100 sc->errptr = le32toh(uc->errptr);
4104 case IWN_STATE_CHANGED:
4107 * State change allows hardware switch change to be
4108 * noted. However, we handle this in iwn_intr as we
4109 * get both the enable/disble intr.
4111 uint32_t *status = (uint32_t *)(desc + 1);
4112 DPRINTF(sc, IWN_DEBUG_INTR | IWN_DEBUG_STATE,
4113 "state changed to %x\n",
4117 case IWN_START_SCAN:
4119 struct iwn_start_scan *scan =
4120 (struct iwn_start_scan *)(desc + 1);
4121 DPRINTF(sc, IWN_DEBUG_ANY,
4122 "%s: scanning channel %d status %x\n",
4123 __func__, scan->chan, le32toh(scan->status));
4130 struct iwn_stop_scan *scan =
4131 (struct iwn_stop_scan *)(desc + 1);
4132 DPRINTF(sc, IWN_DEBUG_STATE | IWN_DEBUG_SCAN,
4133 "scan finished nchan=%d status=%d chan=%d\n",
4134 scan->nchan, scan->status, scan->chan);
4136 sc->sc_is_scanning = 0;
4137 callout_stop(&sc->scan_timeout);
4139 ieee80211_scan_next(vap);
4142 is_stopped = (sc->sc_flags & IWN_FLAG_RUNNING) == 0;
4143 if (__predict_false(is_stopped))
4148 case IWN5000_CALIBRATION_RESULT:
4149 iwn5000_rx_calib_results(sc, desc);
4152 case IWN5000_CALIBRATION_DONE:
4153 sc->sc_flags |= IWN_FLAG_CALIB_DONE;
4158 sc->rxq.cur = (sc->rxq.cur + 1) % IWN_RX_RING_COUNT;
4161 /* Tell the firmware what we have processed. */
4162 hw = (hw == 0) ? IWN_RX_RING_COUNT - 1 : hw - 1;
4163 IWN_WRITE(sc, IWN_FH_RX_WPTR, hw & ~7);
4167 * Process an INT_WAKEUP interrupt raised when the microcontroller wakes up
4168 * from power-down sleep mode.
4171 iwn_wakeup_intr(struct iwn_softc *sc)
4175 DPRINTF(sc, IWN_DEBUG_RESET, "%s: ucode wakeup from power-down sleep\n",
4178 /* Wakeup RX and TX rings. */
4179 IWN_WRITE(sc, IWN_FH_RX_WPTR, sc->rxq.cur & ~7);
4180 for (qid = 0; qid < sc->ntxqs; qid++) {
4181 struct iwn_tx_ring *ring = &sc->txq[qid];
4182 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | ring->cur);
4187 iwn_rftoggle_task(void *arg, int npending)
4189 struct iwn_softc *sc = arg;
4190 struct ieee80211com *ic = &sc->sc_ic;
4194 tmp = IWN_READ(sc, IWN_GP_CNTRL);
4197 device_printf(sc->sc_dev, "RF switch: radio %s\n",
4198 (tmp & IWN_GP_CNTRL_RFKILL) ? "enabled" : "disabled");
4199 if (!(tmp & IWN_GP_CNTRL_RFKILL)) {
4200 ieee80211_suspend_all(ic);
4202 /* Enable interrupts to get RF toggle notification. */
4204 IWN_WRITE(sc, IWN_INT, 0xffffffff);
4205 IWN_WRITE(sc, IWN_INT_MASK, sc->int_mask);
4208 ieee80211_resume_all(ic);
4212 * Dump the error log of the firmware when a firmware panic occurs. Although
4213 * we can't debug the firmware because it is neither open source nor free, it
4214 * can help us to identify certain classes of problems.
4217 iwn_fatal_intr(struct iwn_softc *sc)
4219 struct iwn_fw_dump dump;
4222 IWN_LOCK_ASSERT(sc);
4224 /* Force a complete recalibration on next init. */
4225 sc->sc_flags &= ~IWN_FLAG_CALIB_DONE;
4227 /* Check that the error log address is valid. */
4228 if (sc->errptr < IWN_FW_DATA_BASE ||
4229 sc->errptr + sizeof (dump) >
4230 IWN_FW_DATA_BASE + sc->fw_data_maxsz) {
4231 printf("%s: bad firmware error log address 0x%08x\n", __func__,
4235 if (iwn_nic_lock(sc) != 0) {
4236 printf("%s: could not read firmware error log\n", __func__);
4239 /* Read firmware error log from SRAM. */
4240 iwn_mem_read_region_4(sc, sc->errptr, (uint32_t *)&dump,
4241 sizeof (dump) / sizeof (uint32_t));
4244 if (dump.valid == 0) {
4245 printf("%s: firmware error log is empty\n", __func__);
4248 printf("firmware error log:\n");
4249 printf(" error type = \"%s\" (0x%08X)\n",
4250 (dump.id < nitems(iwn_fw_errmsg)) ?
4251 iwn_fw_errmsg[dump.id] : "UNKNOWN",
4253 printf(" program counter = 0x%08X\n", dump.pc);
4254 printf(" source line = 0x%08X\n", dump.src_line);
4255 printf(" error data = 0x%08X%08X\n",
4256 dump.error_data[0], dump.error_data[1]);
4257 printf(" branch link = 0x%08X%08X\n",
4258 dump.branch_link[0], dump.branch_link[1]);
4259 printf(" interrupt link = 0x%08X%08X\n",
4260 dump.interrupt_link[0], dump.interrupt_link[1]);
4261 printf(" time = %u\n", dump.time[0]);
4263 /* Dump driver status (TX and RX rings) while we're here. */
4264 printf("driver status:\n");
4265 for (i = 0; i < sc->ntxqs; i++) {
4266 struct iwn_tx_ring *ring = &sc->txq[i];
4267 printf(" tx ring %2d: qid=%-2d cur=%-3d queued=%-3d\n",
4268 i, ring->qid, ring->cur, ring->queued);
4270 printf(" rx ring: cur=%d\n", sc->rxq.cur);
4276 struct iwn_softc *sc = arg;
4277 uint32_t r1, r2, tmp;
4281 /* Disable interrupts. */
4282 IWN_WRITE(sc, IWN_INT_MASK, 0);
4284 /* Read interrupts from ICT (fast) or from registers (slow). */
4285 if (sc->sc_flags & IWN_FLAG_USE_ICT) {
4286 bus_dmamap_sync(sc->ict_dma.tag, sc->ict_dma.map,
4287 BUS_DMASYNC_POSTREAD);
4289 while (sc->ict[sc->ict_cur] != 0) {
4290 tmp |= sc->ict[sc->ict_cur];
4291 sc->ict[sc->ict_cur] = 0; /* Acknowledge. */
4292 sc->ict_cur = (sc->ict_cur + 1) % IWN_ICT_COUNT;
4295 if (tmp == 0xffffffff) /* Shouldn't happen. */
4297 else if (tmp & 0xc0000) /* Workaround a HW bug. */
4299 r1 = (tmp & 0xff00) << 16 | (tmp & 0xff);
4300 r2 = 0; /* Unused. */
4302 r1 = IWN_READ(sc, IWN_INT);
4303 if (r1 == 0xffffffff || (r1 & 0xfffffff0) == 0xa5a5a5a0) {
4305 return; /* Hardware gone! */
4307 r2 = IWN_READ(sc, IWN_FH_INT);
4310 DPRINTF(sc, IWN_DEBUG_INTR, "interrupt reg1=0x%08x reg2=0x%08x\n"
4313 if (r1 == 0 && r2 == 0)
4314 goto done; /* Interrupt not for us. */
4316 /* Acknowledge interrupts. */
4317 IWN_WRITE(sc, IWN_INT, r1);
4318 if (!(sc->sc_flags & IWN_FLAG_USE_ICT))
4319 IWN_WRITE(sc, IWN_FH_INT, r2);
4321 if (r1 & IWN_INT_RF_TOGGLED) {
4322 taskqueue_enqueue(sc->sc_tq, &sc->sc_rftoggle_task);
4325 if (r1 & IWN_INT_CT_REACHED) {
4326 device_printf(sc->sc_dev, "%s: critical temperature reached!\n",
4329 if (r1 & (IWN_INT_SW_ERR | IWN_INT_HW_ERR)) {
4330 device_printf(sc->sc_dev, "%s: fatal firmware error\n",
4333 iwn_debug_register(sc);
4335 /* Dump firmware error log and stop. */
4338 taskqueue_enqueue(sc->sc_tq, &sc->sc_panic_task);
4341 if ((r1 & (IWN_INT_FH_RX | IWN_INT_SW_RX | IWN_INT_RX_PERIODIC)) ||
4342 (r2 & IWN_FH_INT_RX)) {
4343 if (sc->sc_flags & IWN_FLAG_USE_ICT) {
4344 if (r1 & (IWN_INT_FH_RX | IWN_INT_SW_RX))
4345 IWN_WRITE(sc, IWN_FH_INT, IWN_FH_INT_RX);
4346 IWN_WRITE_1(sc, IWN_INT_PERIODIC,
4347 IWN_INT_PERIODIC_DIS);
4349 if (r1 & (IWN_INT_FH_RX | IWN_INT_SW_RX)) {
4350 IWN_WRITE_1(sc, IWN_INT_PERIODIC,
4351 IWN_INT_PERIODIC_ENA);
4357 if ((r1 & IWN_INT_FH_TX) || (r2 & IWN_FH_INT_TX)) {
4358 if (sc->sc_flags & IWN_FLAG_USE_ICT)
4359 IWN_WRITE(sc, IWN_FH_INT, IWN_FH_INT_TX);
4360 wakeup(sc); /* FH DMA transfer completed. */
4363 if (r1 & IWN_INT_ALIVE)
4364 wakeup(sc); /* Firmware is alive. */
4366 if (r1 & IWN_INT_WAKEUP)
4367 iwn_wakeup_intr(sc);
4370 /* Re-enable interrupts. */
4371 if (sc->sc_flags & IWN_FLAG_RUNNING)
4372 IWN_WRITE(sc, IWN_INT_MASK, sc->int_mask);
4378 * Update TX scheduler ring when transmitting an 802.11 frame (4965AGN and
4379 * 5000 adapters use a slightly different format).
4382 iwn4965_update_sched(struct iwn_softc *sc, int qid, int idx, uint8_t id,
4385 uint16_t *w = &sc->sched[qid * IWN4965_SCHED_COUNT + idx];
4387 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
4389 *w = htole16(len + 8);
4390 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
4391 BUS_DMASYNC_PREWRITE);
4392 if (idx < IWN_SCHED_WINSZ) {
4393 *(w + IWN_TX_RING_COUNT) = *w;
4394 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
4395 BUS_DMASYNC_PREWRITE);
4400 iwn5000_update_sched(struct iwn_softc *sc, int qid, int idx, uint8_t id,
4403 uint16_t *w = &sc->sched[qid * IWN5000_SCHED_COUNT + idx];
4405 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
4407 *w = htole16(id << 12 | (len + 8));
4408 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
4409 BUS_DMASYNC_PREWRITE);
4410 if (idx < IWN_SCHED_WINSZ) {
4411 *(w + IWN_TX_RING_COUNT) = *w;
4412 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
4413 BUS_DMASYNC_PREWRITE);
4419 iwn5000_reset_sched(struct iwn_softc *sc, int qid, int idx)
4421 uint16_t *w = &sc->sched[qid * IWN5000_SCHED_COUNT + idx];
4423 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
4425 *w = (*w & htole16(0xf000)) | htole16(1);
4426 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
4427 BUS_DMASYNC_PREWRITE);
4428 if (idx < IWN_SCHED_WINSZ) {
4429 *(w + IWN_TX_RING_COUNT) = *w;
4430 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
4431 BUS_DMASYNC_PREWRITE);
4437 * Check whether OFDM 11g protection will be enabled for the given rate.
4439 * The original driver code only enabled protection for OFDM rates.
4440 * It didn't check to see whether it was operating in 11a or 11bg mode.
4443 iwn_check_rate_needs_protection(struct iwn_softc *sc,
4444 struct ieee80211vap *vap, uint8_t rate)
4446 struct ieee80211com *ic = vap->iv_ic;
4449 * Not in 2GHz mode? Then there's no need to enable OFDM
4452 if (! IEEE80211_IS_CHAN_2GHZ(ic->ic_curchan)) {
4457 * 11bg protection not enabled? Then don't use it.
4459 if ((ic->ic_flags & IEEE80211_F_USEPROT) == 0)
4463 * If it's an 11n rate - no protection.
4464 * We'll do it via a specific 11n check.
4466 if (rate & IEEE80211_RATE_MCS) {
4471 * Do a rate table lookup. If the PHY is CCK,
4472 * don't do protection.
4474 if (ieee80211_rate2phytype(ic->ic_rt, rate) == IEEE80211_T_CCK)
4478 * Yup, enable protection.
4484 * return a value between 0 and IWN_MAX_TX_RETRIES-1 as an index into
4485 * the link quality table that reflects this particular entry.
4488 iwn_tx_rate_to_linkq_offset(struct iwn_softc *sc, struct ieee80211_node *ni,
4491 struct ieee80211_rateset *rs;
4498 * Figure out if we're using 11n or not here.
4500 if (IEEE80211_IS_CHAN_HT(ni->ni_chan) && ni->ni_htrates.rs_nrates > 0)
4506 * Use the correct rate table.
4509 rs = (struct ieee80211_rateset *) &ni->ni_htrates;
4510 nr = ni->ni_htrates.rs_nrates;
4517 * Find the relevant link quality entry in the table.
4519 for (i = 0; i < nr && i < IWN_MAX_TX_RETRIES - 1 ; i++) {
4521 * The link quality table index starts at 0 == highest
4522 * rate, so we walk the rate table backwards.
4524 cmp_rate = rs->rs_rates[(nr - 1) - i];
4525 if (rate & IEEE80211_RATE_MCS)
4526 cmp_rate |= IEEE80211_RATE_MCS;
4529 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: idx %d: nr=%d, rate=0x%02x, rateentry=0x%02x\n",
4537 if (cmp_rate == rate)
4541 /* Failed? Start at the end */
4542 return (IWN_MAX_TX_RETRIES - 1);
4546 iwn_tx_data(struct iwn_softc *sc, struct mbuf *m, struct ieee80211_node *ni)
4548 const struct ieee80211_txparam *tp = ni->ni_txparms;
4549 struct ieee80211vap *vap = ni->ni_vap;
4550 struct ieee80211com *ic = ni->ni_ic;
4551 struct iwn_node *wn = (void *)ni;
4552 struct iwn_tx_ring *ring;
4553 struct iwn_tx_cmd *cmd;
4554 struct iwn_cmd_data *tx;
4555 struct ieee80211_frame *wh;
4556 struct ieee80211_key *k = NULL;
4560 int ac, totlen, rate;
4562 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
4564 IWN_LOCK_ASSERT(sc);
4566 wh = mtod(m, struct ieee80211_frame *);
4567 type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK;
4569 /* Select EDCA Access Category and TX ring for this frame. */
4570 if (IEEE80211_QOS_HAS_SEQ(wh)) {
4571 qos = ((const struct ieee80211_qosframe *)wh)->i_qos[0];
4572 tid = qos & IEEE80211_QOS_TID;
4578 /* Choose a TX rate index. */
4579 if (type == IEEE80211_FC0_TYPE_MGT ||
4580 type == IEEE80211_FC0_TYPE_CTL ||
4581 (m->m_flags & M_EAPOL) != 0)
4582 rate = tp->mgmtrate;
4583 else if (IEEE80211_IS_MULTICAST(wh->i_addr1))
4584 rate = tp->mcastrate;
4585 else if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE)
4586 rate = tp->ucastrate;
4588 /* XXX pass pktlen */
4589 (void) ieee80211_ratectl_rate(ni, NULL, 0);
4590 rate = ni->ni_txrate;
4594 * XXX TODO: Group addressed frames aren't aggregated and must
4595 * go to the normal non-aggregation queue, and have a NONQOS TID
4596 * assigned from net80211.
4599 ac = M_WME_GETAC(m);
4600 if (m->m_flags & M_AMPDU_MPDU) {
4601 struct ieee80211_tx_ampdu *tap = &ni->ni_tx_ampdu[ac];
4603 if (!IEEE80211_AMPDU_RUNNING(tap))
4606 ac = *(int *)tap->txa_private;
4609 /* Encrypt the frame if need be. */
4610 if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) {
4611 /* Retrieve key for TX. */
4612 k = ieee80211_crypto_encap(ni, m);
4616 /* 802.11 header may have moved. */
4617 wh = mtod(m, struct ieee80211_frame *);
4619 totlen = m->m_pkthdr.len;
4621 if (ieee80211_radiotap_active_vap(vap)) {
4622 struct iwn_tx_radiotap_header *tap = &sc->sc_txtap;
4625 tap->wt_rate = rate;
4627 tap->wt_flags |= IEEE80211_RADIOTAP_F_WEP;
4629 ieee80211_radiotap_tx(vap, m);
4633 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
4634 /* Unicast frame, check if an ACK is expected. */
4635 if (!qos || (qos & IEEE80211_QOS_ACKPOLICY) !=
4636 IEEE80211_QOS_ACKPOLICY_NOACK)
4637 flags |= IWN_TX_NEED_ACK;
4640 (IEEE80211_FC0_TYPE_MASK | IEEE80211_FC0_SUBTYPE_MASK)) ==
4641 (IEEE80211_FC0_TYPE_CTL | IEEE80211_FC0_SUBTYPE_BAR))
4642 flags |= IWN_TX_IMM_BA; /* Cannot happen yet. */
4644 if (wh->i_fc[1] & IEEE80211_FC1_MORE_FRAG)
4645 flags |= IWN_TX_MORE_FRAG; /* Cannot happen yet. */
4647 /* Check if frame must be protected using RTS/CTS or CTS-to-self. */
4648 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
4649 /* NB: Group frames are sent using CCK in 802.11b/g. */
4650 if (totlen + IEEE80211_CRC_LEN > vap->iv_rtsthreshold) {
4651 flags |= IWN_TX_NEED_RTS;
4652 } else if (iwn_check_rate_needs_protection(sc, vap, rate)) {
4653 if (ic->ic_protmode == IEEE80211_PROT_CTSONLY)
4654 flags |= IWN_TX_NEED_CTS;
4655 else if (ic->ic_protmode == IEEE80211_PROT_RTSCTS)
4656 flags |= IWN_TX_NEED_RTS;
4657 } else if ((rate & IEEE80211_RATE_MCS) &&
4658 (ic->ic_htprotmode == IEEE80211_PROT_RTSCTS)) {
4659 flags |= IWN_TX_NEED_RTS;
4662 /* XXX HT protection? */
4664 if (flags & (IWN_TX_NEED_RTS | IWN_TX_NEED_CTS)) {
4665 if (sc->hw_type != IWN_HW_REV_TYPE_4965) {
4666 /* 5000 autoselects RTS/CTS or CTS-to-self. */
4667 flags &= ~(IWN_TX_NEED_RTS | IWN_TX_NEED_CTS);
4668 flags |= IWN_TX_NEED_PROTECTION;
4670 flags |= IWN_TX_FULL_TXOP;
4674 ring = &sc->txq[ac];
4675 if (m->m_flags & M_AMPDU_MPDU) {
4676 uint16_t seqno = ni->ni_txseqs[tid];
4678 if (ring->queued > IWN_TX_RING_COUNT / 2 &&
4679 (ring->cur + 1) % IWN_TX_RING_COUNT == ring->read) {
4680 DPRINTF(sc, IWN_DEBUG_AMPDU, "%s: no more space "
4681 "(queued %d) left in %d queue!\n",
4682 __func__, ring->queued, ac);
4687 * Queue this frame to the hardware ring that we've
4688 * negotiated AMPDU TX on.
4690 * Note that the sequence number must match the TX slot
4693 if ((seqno % 256) != ring->cur) {
4694 device_printf(sc->sc_dev,
4695 "%s: m=%p: seqno (%d) (%d) != ring index (%d) !\n",
4702 /* XXX until D9195 will not be committed */
4703 ni->ni_txseqs[tid] &= ~0xff;
4704 ni->ni_txseqs[tid] += ring->cur;
4705 seqno = ni->ni_txseqs[tid];
4708 *(uint16_t *)wh->i_seq =
4709 htole16(seqno << IEEE80211_SEQ_SEQ_SHIFT);
4710 ni->ni_txseqs[tid]++;
4713 /* Prepare TX firmware command. */
4714 cmd = &ring->cmd[ring->cur];
4715 tx = (struct iwn_cmd_data *)cmd->data;
4717 /* NB: No need to clear tx, all fields are reinitialized here. */
4718 tx->scratch = 0; /* clear "scratch" area */
4720 if (IEEE80211_IS_MULTICAST(wh->i_addr1) ||
4721 type != IEEE80211_FC0_TYPE_DATA)
4722 tx->id = sc->broadcast_id;
4726 if (type == IEEE80211_FC0_TYPE_MGT) {
4727 uint8_t subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
4729 /* Tell HW to set timestamp in probe responses. */
4730 if (subtype == IEEE80211_FC0_SUBTYPE_PROBE_RESP)
4731 flags |= IWN_TX_INSERT_TSTAMP;
4732 if (subtype == IEEE80211_FC0_SUBTYPE_ASSOC_REQ ||
4733 subtype == IEEE80211_FC0_SUBTYPE_REASSOC_REQ)
4734 tx->timeout = htole16(3);
4736 tx->timeout = htole16(2);
4738 tx->timeout = htole16(0);
4740 if (tx->id == sc->broadcast_id) {
4741 /* Group or management frame. */
4744 tx->linkq = iwn_tx_rate_to_linkq_offset(sc, ni, rate);
4745 flags |= IWN_TX_LINKQ; /* enable MRR */
4749 tx->rts_ntries = 60;
4750 tx->data_ntries = 15;
4751 tx->lifetime = htole32(IWN_LIFETIME_INFINITE);
4752 tx->rate = iwn_rate_to_plcp(sc, ni, rate);
4754 tx->flags = htole32(flags);
4756 return (iwn_tx_cmd(sc, m, ni, ring));
4760 iwn_tx_data_raw(struct iwn_softc *sc, struct mbuf *m,
4761 struct ieee80211_node *ni, const struct ieee80211_bpf_params *params)
4763 struct ieee80211vap *vap = ni->ni_vap;
4764 struct iwn_tx_cmd *cmd;
4765 struct iwn_cmd_data *tx;
4766 struct ieee80211_frame *wh;
4767 struct iwn_tx_ring *ring;
4772 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
4774 IWN_LOCK_ASSERT(sc);
4776 wh = mtod(m, struct ieee80211_frame *);
4777 type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK;
4779 ac = params->ibp_pri & 3;
4781 /* Choose a TX rate. */
4782 rate = params->ibp_rate0;
4785 if ((params->ibp_flags & IEEE80211_BPF_NOACK) == 0)
4786 flags |= IWN_TX_NEED_ACK;
4787 if (params->ibp_flags & IEEE80211_BPF_RTS) {
4788 if (sc->hw_type != IWN_HW_REV_TYPE_4965) {
4789 /* 5000 autoselects RTS/CTS or CTS-to-self. */
4790 flags &= ~IWN_TX_NEED_RTS;
4791 flags |= IWN_TX_NEED_PROTECTION;
4793 flags |= IWN_TX_NEED_RTS | IWN_TX_FULL_TXOP;
4795 if (params->ibp_flags & IEEE80211_BPF_CTS) {
4796 if (sc->hw_type != IWN_HW_REV_TYPE_4965) {
4797 /* 5000 autoselects RTS/CTS or CTS-to-self. */
4798 flags &= ~IWN_TX_NEED_CTS;
4799 flags |= IWN_TX_NEED_PROTECTION;
4801 flags |= IWN_TX_NEED_CTS | IWN_TX_FULL_TXOP;
4804 if (ieee80211_radiotap_active_vap(vap)) {
4805 struct iwn_tx_radiotap_header *tap = &sc->sc_txtap;
4808 tap->wt_rate = rate;
4810 ieee80211_radiotap_tx(vap, m);
4813 ring = &sc->txq[ac];
4814 cmd = &ring->cmd[ring->cur];
4816 tx = (struct iwn_cmd_data *)cmd->data;
4817 /* NB: No need to clear tx, all fields are reinitialized here. */
4818 tx->scratch = 0; /* clear "scratch" area */
4820 if (type == IEEE80211_FC0_TYPE_MGT) {
4821 uint8_t subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
4823 /* Tell HW to set timestamp in probe responses. */
4824 if (subtype == IEEE80211_FC0_SUBTYPE_PROBE_RESP)
4825 flags |= IWN_TX_INSERT_TSTAMP;
4827 if (subtype == IEEE80211_FC0_SUBTYPE_ASSOC_REQ ||
4828 subtype == IEEE80211_FC0_SUBTYPE_REASSOC_REQ)
4829 tx->timeout = htole16(3);
4831 tx->timeout = htole16(2);
4833 tx->timeout = htole16(0);
4836 tx->id = sc->broadcast_id;
4837 tx->rts_ntries = params->ibp_try1;
4838 tx->data_ntries = params->ibp_try0;
4839 tx->lifetime = htole32(IWN_LIFETIME_INFINITE);
4840 tx->rate = iwn_rate_to_plcp(sc, ni, rate);
4842 tx->flags = htole32(flags);
4844 /* Group or management frame. */
4847 return (iwn_tx_cmd(sc, m, ni, ring));
4851 iwn_tx_cmd(struct iwn_softc *sc, struct mbuf *m, struct ieee80211_node *ni,
4852 struct iwn_tx_ring *ring)
4854 struct iwn_ops *ops = &sc->ops;
4855 struct iwn_tx_cmd *cmd;
4856 struct iwn_cmd_data *tx;
4857 struct ieee80211_frame *wh;
4858 struct iwn_tx_desc *desc;
4859 struct iwn_tx_data *data;
4860 bus_dma_segment_t *seg, segs[IWN_MAX_SCATTER];
4863 int totlen, error, pad, nsegs = 0, i;
4865 wh = mtod(m, struct ieee80211_frame *);
4866 hdrlen = ieee80211_anyhdrsize(wh);
4867 totlen = m->m_pkthdr.len;
4869 desc = &ring->desc[ring->cur];
4870 data = &ring->data[ring->cur];
4872 if (__predict_false(data->m != NULL || data->ni != NULL)) {
4873 device_printf(sc->sc_dev, "%s: ni (%p) or m (%p) for idx %d "
4874 "in queue %d is not NULL!\n", __func__, data->ni, data->m,
4875 ring->cur, ring->qid);
4879 /* Prepare TX firmware command. */
4880 cmd = &ring->cmd[ring->cur];
4881 cmd->code = IWN_CMD_TX_DATA;
4883 cmd->qid = ring->qid;
4884 cmd->idx = ring->cur;
4886 tx = (struct iwn_cmd_data *)cmd->data;
4887 tx->len = htole16(totlen);
4889 /* Set physical address of "scratch area". */
4890 tx->loaddr = htole32(IWN_LOADDR(data->scratch_paddr));
4891 tx->hiaddr = IWN_HIADDR(data->scratch_paddr);
4893 /* First segment length must be a multiple of 4. */
4894 tx->flags |= htole32(IWN_TX_NEED_PADDING);
4895 pad = 4 - (hdrlen & 3);
4899 /* Copy 802.11 header in TX command. */
4900 memcpy((uint8_t *)(tx + 1), wh, hdrlen);
4902 /* Trim 802.11 header. */
4905 error = bus_dmamap_load_mbuf_sg(ring->data_dmat, data->map, m, segs,
4906 &nsegs, BUS_DMA_NOWAIT);
4908 if (error != EFBIG) {
4909 device_printf(sc->sc_dev,
4910 "%s: can't map mbuf (error %d)\n", __func__, error);
4913 /* Too many DMA segments, linearize mbuf. */
4914 m1 = m_collapse(m, M_NOWAIT, IWN_MAX_SCATTER - 1);
4916 device_printf(sc->sc_dev,
4917 "%s: could not defrag mbuf\n", __func__);
4922 error = bus_dmamap_load_mbuf_sg(ring->data_dmat, data->map, m,
4923 segs, &nsegs, BUS_DMA_NOWAIT);
4927 * NB: Do not return error;
4928 * original mbuf does not exist anymore.
4930 device_printf(sc->sc_dev,
4931 "%s: can't map mbuf (error %d)\n",
4933 if_inc_counter(ni->ni_vap->iv_ifp,
4934 IFCOUNTER_OERRORS, 1);
4935 ieee80211_free_node(ni);
4944 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: qid %d idx %d len %d nsegs %d "
4946 __func__, ring->qid, ring->cur, totlen, nsegs, tx->rate);
4948 /* Fill TX descriptor. */
4951 desc->nsegs += nsegs;
4952 /* First DMA segment is used by the TX command. */
4953 desc->segs[0].addr = htole32(IWN_LOADDR(data->cmd_paddr));
4954 desc->segs[0].len = htole16(IWN_HIADDR(data->cmd_paddr) |
4955 (4 + sizeof (*tx) + hdrlen + pad) << 4);
4956 /* Other DMA segments are for data payload. */
4958 for (i = 1; i <= nsegs; i++) {
4959 desc->segs[i].addr = htole32(IWN_LOADDR(seg->ds_addr));
4960 desc->segs[i].len = htole16(IWN_HIADDR(seg->ds_addr) |
4965 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_PREWRITE);
4966 bus_dmamap_sync(ring->cmd_dma.tag, ring->cmd_dma.map,
4967 BUS_DMASYNC_PREWRITE);
4968 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
4969 BUS_DMASYNC_PREWRITE);
4971 /* Update TX scheduler. */
4972 if (ring->qid >= sc->firstaggqueue)
4973 ops->update_sched(sc, ring->qid, ring->cur, tx->id, totlen);
4976 ring->cur = (ring->cur + 1) % IWN_TX_RING_COUNT;
4977 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, ring->qid << 8 | ring->cur);
4979 /* Mark TX ring as full if we reach a certain threshold. */
4980 if (++ring->queued > IWN_TX_RING_HIMARK)
4981 sc->qfullmsk |= 1 << ring->qid;
4983 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
4989 iwn_xmit_task(void *arg0, int pending)
4991 struct iwn_softc *sc = arg0;
4992 struct ieee80211_node *ni;
4995 struct ieee80211_bpf_params p;
4998 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: called\n", __func__);
5002 * Dequeue frames, attempt to transmit,
5003 * then disable beaconwait when we're done.
5005 while ((m = mbufq_dequeue(&sc->sc_xmit_queue)) != NULL) {
5007 ni = (struct ieee80211_node *)m->m_pkthdr.rcvif;
5009 /* Get xmit params if appropriate */
5010 if (ieee80211_get_xmit_params(m, &p) == 0)
5013 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: m=%p, have_p=%d\n",
5014 __func__, m, have_p);
5016 /* If we have xmit params, use them */
5018 error = iwn_tx_data_raw(sc, m, ni, &p);
5020 error = iwn_tx_data(sc, m, ni);
5023 if_inc_counter(ni->ni_vap->iv_ifp,
5024 IFCOUNTER_OERRORS, 1);
5025 ieee80211_free_node(ni);
5030 sc->sc_beacon_wait = 0;
5035 * raw frame xmit - free node/reference if failed.
5038 iwn_raw_xmit(struct ieee80211_node *ni, struct mbuf *m,
5039 const struct ieee80211_bpf_params *params)
5041 struct ieee80211com *ic = ni->ni_ic;
5042 struct iwn_softc *sc = ic->ic_softc;
5045 DPRINTF(sc, IWN_DEBUG_XMIT | IWN_DEBUG_TRACE, "->%s begin\n", __func__);
5048 if ((sc->sc_flags & IWN_FLAG_RUNNING) == 0) {
5054 /* queue frame if we have to */
5055 if (sc->sc_beacon_wait) {
5056 if (iwn_xmit_queue_enqueue(sc, m) != 0) {
5061 /* Queued, so just return OK */
5066 if (params == NULL) {
5068 * Legacy path; interpret frame contents to decide
5069 * precisely how to send the frame.
5071 error = iwn_tx_data(sc, m, ni);
5074 * Caller supplied explicit parameters to use in
5075 * sending the frame.
5077 error = iwn_tx_data_raw(sc, m, ni, params);
5080 sc->sc_tx_timer = 5;
5086 DPRINTF(sc, IWN_DEBUG_TRACE | IWN_DEBUG_XMIT, "->%s: end\n",__func__);
5092 * transmit - don't free mbuf if failed; don't free node ref if failed.
5095 iwn_transmit(struct ieee80211com *ic, struct mbuf *m)
5097 struct iwn_softc *sc = ic->ic_softc;
5098 struct ieee80211_node *ni;
5101 ni = (struct ieee80211_node *)m->m_pkthdr.rcvif;
5104 if ((sc->sc_flags & IWN_FLAG_RUNNING) == 0 || sc->sc_beacon_wait) {
5114 error = iwn_tx_data(sc, m, ni);
5116 sc->sc_tx_timer = 5;
5122 iwn_scan_timeout(void *arg)
5124 struct iwn_softc *sc = arg;
5125 struct ieee80211com *ic = &sc->sc_ic;
5127 ic_printf(ic, "scan timeout\n");
5128 ieee80211_restart_all(ic);
5132 iwn_watchdog(void *arg)
5134 struct iwn_softc *sc = arg;
5135 struct ieee80211com *ic = &sc->sc_ic;
5137 IWN_LOCK_ASSERT(sc);
5139 KASSERT(sc->sc_flags & IWN_FLAG_RUNNING, ("not running"));
5141 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5143 if (sc->sc_tx_timer > 0) {
5144 if (--sc->sc_tx_timer == 0) {
5145 ic_printf(ic, "device timeout\n");
5146 ieee80211_restart_all(ic);
5150 callout_reset(&sc->watchdog_to, hz, iwn_watchdog, sc);
5154 iwn_cdev_open(struct cdev *dev, int flags, int type, struct thread *td)
5161 iwn_cdev_close(struct cdev *dev, int flags, int type, struct thread *td)
5168 iwn_cdev_ioctl(struct cdev *dev, unsigned long cmd, caddr_t data, int fflag,
5172 struct iwn_softc *sc = dev->si_drv1;
5173 struct iwn_ioctl_data *d;
5175 rc = priv_check(td, PRIV_DRIVER);
5181 d = (struct iwn_ioctl_data *) data;
5183 /* XXX validate permissions/memory/etc? */
5184 rc = copyout(&sc->last_stat, d->dst_addr, sizeof(struct iwn_stats));
5189 memset(&sc->last_stat, 0, sizeof(struct iwn_stats));
5200 iwn_ioctl(struct ieee80211com *ic, u_long cmd, void *data)
5207 iwn_parent(struct ieee80211com *ic)
5209 struct iwn_softc *sc = ic->ic_softc;
5210 struct ieee80211vap *vap;
5213 if (ic->ic_nrunning > 0) {
5214 error = iwn_init(sc);
5218 ieee80211_start_all(ic);
5221 /* radio is disabled via RFkill switch */
5222 taskqueue_enqueue(sc->sc_tq, &sc->sc_rftoggle_task);
5225 vap = TAILQ_FIRST(&ic->ic_vaps);
5227 ieee80211_stop(vap);
5235 * Send a command to the firmware.
5238 iwn_cmd(struct iwn_softc *sc, int code, const void *buf, int size, int async)
5240 struct iwn_tx_ring *ring;
5241 struct iwn_tx_desc *desc;
5242 struct iwn_tx_data *data;
5243 struct iwn_tx_cmd *cmd;
5249 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
5252 IWN_LOCK_ASSERT(sc);
5254 if (sc->sc_flags & IWN_FLAG_PAN_SUPPORT)
5255 cmd_queue_num = IWN_PAN_CMD_QUEUE;
5257 cmd_queue_num = IWN_CMD_QUEUE_NUM;
5259 ring = &sc->txq[cmd_queue_num];
5260 desc = &ring->desc[ring->cur];
5261 data = &ring->data[ring->cur];
5264 if (size > sizeof cmd->data) {
5265 /* Command is too large to fit in a descriptor. */
5266 if (totlen > MCLBYTES)
5268 m = m_getjcl(M_NOWAIT, MT_DATA, M_PKTHDR, MJUMPAGESIZE);
5271 cmd = mtod(m, struct iwn_tx_cmd *);
5272 error = bus_dmamap_load(ring->data_dmat, data->map, cmd,
5273 totlen, iwn_dma_map_addr, &paddr, BUS_DMA_NOWAIT);
5280 cmd = &ring->cmd[ring->cur];
5281 paddr = data->cmd_paddr;
5286 cmd->qid = ring->qid;
5287 cmd->idx = ring->cur;
5288 memcpy(cmd->data, buf, size);
5291 desc->segs[0].addr = htole32(IWN_LOADDR(paddr));
5292 desc->segs[0].len = htole16(IWN_HIADDR(paddr) | totlen << 4);
5294 DPRINTF(sc, IWN_DEBUG_CMD, "%s: %s (0x%x) flags %d qid %d idx %d\n",
5295 __func__, iwn_intr_str(cmd->code), cmd->code,
5296 cmd->flags, cmd->qid, cmd->idx);
5298 if (size > sizeof cmd->data) {
5299 bus_dmamap_sync(ring->data_dmat, data->map,
5300 BUS_DMASYNC_PREWRITE);
5302 bus_dmamap_sync(ring->cmd_dma.tag, ring->cmd_dma.map,
5303 BUS_DMASYNC_PREWRITE);
5305 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
5306 BUS_DMASYNC_PREWRITE);
5308 /* Kick command ring. */
5309 ring->cur = (ring->cur + 1) % IWN_TX_RING_COUNT;
5310 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, ring->qid << 8 | ring->cur);
5312 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
5314 return async ? 0 : msleep(desc, &sc->sc_mtx, PCATCH, "iwncmd", hz);
5318 iwn4965_add_node(struct iwn_softc *sc, struct iwn_node_info *node, int async)
5320 struct iwn4965_node_info hnode;
5323 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5326 * We use the node structure for 5000 Series internally (it is
5327 * a superset of the one for 4965AGN). We thus copy the common
5328 * fields before sending the command.
5330 src = (caddr_t)node;
5331 dst = (caddr_t)&hnode;
5332 memcpy(dst, src, 48);
5333 /* Skip TSC, RX MIC and TX MIC fields from ``src''. */
5334 memcpy(dst + 48, src + 72, 20);
5335 return iwn_cmd(sc, IWN_CMD_ADD_NODE, &hnode, sizeof hnode, async);
5339 iwn5000_add_node(struct iwn_softc *sc, struct iwn_node_info *node, int async)
5342 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5344 /* Direct mapping. */
5345 return iwn_cmd(sc, IWN_CMD_ADD_NODE, node, sizeof (*node), async);
5349 iwn_set_link_quality(struct iwn_softc *sc, struct ieee80211_node *ni)
5351 struct iwn_node *wn = (void *)ni;
5352 struct ieee80211_rateset *rs;
5353 struct iwn_cmd_link_quality linkq;
5354 int i, rate, txrate;
5357 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
5359 memset(&linkq, 0, sizeof linkq);
5361 linkq.antmsk_1stream = iwn_get_1stream_tx_antmask(sc);
5362 linkq.antmsk_2stream = iwn_get_2stream_tx_antmask(sc);
5364 linkq.ampdu_max = 32; /* XXX negotiated? */
5365 linkq.ampdu_threshold = 3;
5366 linkq.ampdu_limit = htole16(4000); /* 4ms */
5368 DPRINTF(sc, IWN_DEBUG_XMIT,
5369 "%s: 1stream antenna=0x%02x, 2stream antenna=0x%02x, ntxstreams=%d\n",
5371 linkq.antmsk_1stream,
5372 linkq.antmsk_2stream,
5376 * Are we using 11n rates? Ensure the channel is
5377 * 11n _and_ we have some 11n rates, or don't
5380 if (IEEE80211_IS_CHAN_HT(ni->ni_chan) && ni->ni_htrates.rs_nrates > 0) {
5381 rs = (struct ieee80211_rateset *) &ni->ni_htrates;
5388 /* Start at highest available bit-rate. */
5390 * XXX this is all very dirty!
5393 txrate = ni->ni_htrates.rs_nrates - 1;
5395 txrate = rs->rs_nrates - 1;
5396 for (i = 0; i < IWN_MAX_TX_RETRIES; i++) {
5400 * XXX TODO: ensure the last two slots are the two lowest
5401 * rate entries, just for now.
5403 if (i == 14 || i == 15)
5407 rate = IEEE80211_RATE_MCS | rs->rs_rates[txrate];
5409 rate = IEEE80211_RV(rs->rs_rates[txrate]);
5411 /* Do rate -> PLCP config mapping */
5412 plcp = iwn_rate_to_plcp(sc, ni, rate);
5413 linkq.retry[i] = plcp;
5414 DPRINTF(sc, IWN_DEBUG_XMIT,
5415 "%s: i=%d, txrate=%d, rate=0x%02x, plcp=0x%08x\n",
5423 * The mimo field is an index into the table which
5424 * indicates the first index where it and subsequent entries
5425 * will not be using MIMO.
5427 * Since we're filling linkq from 0..15 and we're filling
5428 * from the highest MCS rates to the lowest rates, if we
5429 * _are_ doing a dual-stream rate, set mimo to idx+1 (ie,
5430 * the next entry.) That way if the next entry is a non-MIMO
5431 * entry, we're already pointing at it.
5433 if ((le32toh(plcp) & IWN_RFLAG_MCS) &&
5434 IEEE80211_RV(le32toh(plcp)) > 7)
5437 /* Next retry at immediate lower bit-rate. */
5442 * If we reached the end of the list and indeed we hit
5443 * all MIMO rates (eg 5300 doing MCS23-15) then yes,
5444 * set mimo to 15. Setting it to 16 panics the firmware.
5446 if (linkq.mimo > 15)
5449 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: mimo = %d\n", __func__, linkq.mimo);
5451 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
5453 return iwn_cmd(sc, IWN_CMD_LINK_QUALITY, &linkq, sizeof linkq, 1);
5457 * Broadcast node is used to send group-addressed and management frames.
5460 iwn_add_broadcast_node(struct iwn_softc *sc, int async)
5462 struct iwn_ops *ops = &sc->ops;
5463 struct ieee80211com *ic = &sc->sc_ic;
5464 struct iwn_node_info node;
5465 struct iwn_cmd_link_quality linkq;
5469 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
5471 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX];
5473 memset(&node, 0, sizeof node);
5474 IEEE80211_ADDR_COPY(node.macaddr, ieee80211broadcastaddr);
5475 node.id = sc->broadcast_id;
5476 DPRINTF(sc, IWN_DEBUG_RESET, "%s: adding broadcast node\n", __func__);
5477 if ((error = ops->add_node(sc, &node, async)) != 0)
5480 /* Use the first valid TX antenna. */
5481 txant = IWN_LSB(sc->txchainmask);
5483 memset(&linkq, 0, sizeof linkq);
5484 linkq.id = sc->broadcast_id;
5485 linkq.antmsk_1stream = iwn_get_1stream_tx_antmask(sc);
5486 linkq.antmsk_2stream = iwn_get_2stream_tx_antmask(sc);
5487 linkq.ampdu_max = 64;
5488 linkq.ampdu_threshold = 3;
5489 linkq.ampdu_limit = htole16(4000); /* 4ms */
5491 /* Use lowest mandatory bit-rate. */
5492 /* XXX rate table lookup? */
5493 if (IEEE80211_IS_CHAN_5GHZ(ic->ic_curchan))
5494 linkq.retry[0] = htole32(0xd);
5496 linkq.retry[0] = htole32(10 | IWN_RFLAG_CCK);
5497 linkq.retry[0] |= htole32(IWN_RFLAG_ANT(txant));
5498 /* Use same bit-rate for all TX retries. */
5499 for (i = 1; i < IWN_MAX_TX_RETRIES; i++) {
5500 linkq.retry[i] = linkq.retry[0];
5503 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
5505 return iwn_cmd(sc, IWN_CMD_LINK_QUALITY, &linkq, sizeof linkq, async);
5509 iwn_updateedca(struct ieee80211com *ic)
5511 #define IWN_EXP2(x) ((1 << (x)) - 1) /* CWmin = 2^ECWmin - 1 */
5512 struct iwn_softc *sc = ic->ic_softc;
5513 struct iwn_edca_params cmd;
5514 struct chanAccParams chp;
5517 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
5519 ieee80211_wme_ic_getparams(ic, &chp);
5521 memset(&cmd, 0, sizeof cmd);
5522 cmd.flags = htole32(IWN_EDCA_UPDATE);
5525 for (aci = 0; aci < WME_NUM_AC; aci++) {
5526 const struct wmeParams *ac = &chp.cap_wmeParams[aci];
5527 cmd.ac[aci].aifsn = ac->wmep_aifsn;
5528 cmd.ac[aci].cwmin = htole16(IWN_EXP2(ac->wmep_logcwmin));
5529 cmd.ac[aci].cwmax = htole16(IWN_EXP2(ac->wmep_logcwmax));
5530 cmd.ac[aci].txoplimit =
5531 htole16(IEEE80211_TXOP_TO_US(ac->wmep_txopLimit));
5533 IEEE80211_UNLOCK(ic);
5536 (void)iwn_cmd(sc, IWN_CMD_EDCA_PARAMS, &cmd, sizeof cmd, 1);
5539 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
5546 iwn_set_promisc(struct iwn_softc *sc)
5548 struct ieee80211com *ic = &sc->sc_ic;
5549 uint32_t promisc_filter;
5551 promisc_filter = IWN_FILTER_CTL | IWN_FILTER_PROMISC;
5552 if (ic->ic_promisc > 0 || ic->ic_opmode == IEEE80211_M_MONITOR)
5553 sc->rxon->filter |= htole32(promisc_filter);
5555 sc->rxon->filter &= ~htole32(promisc_filter);
5559 iwn_update_promisc(struct ieee80211com *ic)
5561 struct iwn_softc *sc = ic->ic_softc;
5564 if (ic->ic_opmode == IEEE80211_M_MONITOR)
5565 return; /* nothing to do */
5568 if (!(sc->sc_flags & IWN_FLAG_RUNNING)) {
5573 iwn_set_promisc(sc);
5574 if ((error = iwn_send_rxon(sc, 1, 1)) != 0) {
5575 device_printf(sc->sc_dev,
5576 "%s: could not send RXON, error %d\n",
5583 iwn_update_mcast(struct ieee80211com *ic)
5589 iwn_set_led(struct iwn_softc *sc, uint8_t which, uint8_t off, uint8_t on)
5591 struct iwn_cmd_led led;
5593 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5596 /* XXX don't set LEDs during scan? */
5597 if (sc->sc_is_scanning)
5601 /* Clear microcode LED ownership. */
5602 IWN_CLRBITS(sc, IWN_LED, IWN_LED_BSM_CTRL);
5605 led.unit = htole32(10000); /* on/off in unit of 100ms */
5608 (void)iwn_cmd(sc, IWN_CMD_SET_LED, &led, sizeof led, 1);
5612 * Set the critical temperature at which the firmware will stop the radio
5616 iwn_set_critical_temp(struct iwn_softc *sc)
5618 struct iwn_critical_temp crit;
5621 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5623 IWN_WRITE(sc, IWN_UCODE_GP1_CLR, IWN_UCODE_GP1_CTEMP_STOP_RF);
5625 if (sc->hw_type == IWN_HW_REV_TYPE_5150)
5626 temp = (IWN_CTOK(110) - sc->temp_off) * -5;
5627 else if (sc->hw_type == IWN_HW_REV_TYPE_4965)
5628 temp = IWN_CTOK(110);
5631 memset(&crit, 0, sizeof crit);
5632 crit.tempR = htole32(temp);
5633 DPRINTF(sc, IWN_DEBUG_RESET, "setting critical temp to %d\n", temp);
5634 return iwn_cmd(sc, IWN_CMD_SET_CRITICAL_TEMP, &crit, sizeof crit, 0);
5638 iwn_set_timing(struct iwn_softc *sc, struct ieee80211_node *ni)
5640 struct iwn_cmd_timing cmd;
5643 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5645 memset(&cmd, 0, sizeof cmd);
5646 memcpy(&cmd.tstamp, ni->ni_tstamp.data, sizeof (uint64_t));
5647 cmd.bintval = htole16(ni->ni_intval);
5648 cmd.lintval = htole16(10);
5650 /* Compute remaining time until next beacon. */
5651 val = (uint64_t)ni->ni_intval * IEEE80211_DUR_TU;
5652 mod = le64toh(cmd.tstamp) % val;
5653 cmd.binitval = htole32((uint32_t)(val - mod));
5655 DPRINTF(sc, IWN_DEBUG_RESET, "timing bintval=%u tstamp=%ju, init=%u\n",
5656 ni->ni_intval, le64toh(cmd.tstamp), (uint32_t)(val - mod));
5658 return iwn_cmd(sc, IWN_CMD_TIMING, &cmd, sizeof cmd, 1);
5662 iwn4965_power_calibration(struct iwn_softc *sc, int temp)
5665 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5667 /* Adjust TX power if need be (delta >= 3 degC). */
5668 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: temperature %d->%d\n",
5669 __func__, sc->temp, temp);
5670 if (abs(temp - sc->temp) >= 3) {
5671 /* Record temperature of last calibration. */
5673 (void)iwn4965_set_txpower(sc, 1);
5678 * Set TX power for current channel (each rate has its own power settings).
5679 * This function takes into account the regulatory information from EEPROM,
5680 * the current temperature and the current voltage.
5683 iwn4965_set_txpower(struct iwn_softc *sc, int async)
5685 /* Fixed-point arithmetic division using a n-bit fractional part. */
5686 #define fdivround(a, b, n) \
5687 ((((1 << n) * (a)) / (b) + (1 << n) / 2) / (1 << n))
5688 /* Linear interpolation. */
5689 #define interpolate(x, x1, y1, x2, y2, n) \
5690 ((y1) + fdivround(((int)(x) - (x1)) * ((y2) - (y1)), (x2) - (x1), n))
5692 static const int tdiv[IWN_NATTEN_GROUPS] = { 9, 8, 8, 8, 6 };
5693 struct iwn_ucode_info *uc = &sc->ucode_info;
5694 struct iwn4965_cmd_txpower cmd;
5695 struct iwn4965_eeprom_chan_samples *chans;
5696 const uint8_t *rf_gain, *dsp_gain;
5697 int32_t vdiff, tdiff;
5698 int i, is_chan_5ghz, c, grp, maxpwr;
5701 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX];
5702 /* Retrieve current channel from last RXON. */
5703 chan = sc->rxon->chan;
5704 is_chan_5ghz = (sc->rxon->flags & htole32(IWN_RXON_24GHZ)) == 0;
5705 DPRINTF(sc, IWN_DEBUG_RESET, "setting TX power for channel %d\n",
5708 memset(&cmd, 0, sizeof cmd);
5709 cmd.band = is_chan_5ghz ? 0 : 1;
5713 maxpwr = sc->maxpwr5GHz;
5714 rf_gain = iwn4965_rf_gain_5ghz;
5715 dsp_gain = iwn4965_dsp_gain_5ghz;
5717 maxpwr = sc->maxpwr2GHz;
5718 rf_gain = iwn4965_rf_gain_2ghz;
5719 dsp_gain = iwn4965_dsp_gain_2ghz;
5722 /* Compute voltage compensation. */
5723 vdiff = ((int32_t)le32toh(uc->volt) - sc->eeprom_voltage) / 7;
5728 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
5729 "%s: voltage compensation=%d (UCODE=%d, EEPROM=%d)\n",
5730 __func__, vdiff, le32toh(uc->volt), sc->eeprom_voltage);
5732 /* Get channel attenuation group. */
5733 if (chan <= 20) /* 1-20 */
5735 else if (chan <= 43) /* 34-43 */
5737 else if (chan <= 70) /* 44-70 */
5739 else if (chan <= 124) /* 71-124 */
5743 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
5744 "%s: chan %d, attenuation group=%d\n", __func__, chan, grp);
5746 /* Get channel sub-band. */
5747 for (i = 0; i < IWN_NBANDS; i++)
5748 if (sc->bands[i].lo != 0 &&
5749 sc->bands[i].lo <= chan && chan <= sc->bands[i].hi)
5751 if (i == IWN_NBANDS) /* Can't happen in real-life. */
5753 chans = sc->bands[i].chans;
5754 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
5755 "%s: chan %d sub-band=%d\n", __func__, chan, i);
5757 for (c = 0; c < 2; c++) {
5758 uint8_t power, gain, temp;
5759 int maxchpwr, pwr, ridx, idx;
5761 power = interpolate(chan,
5762 chans[0].num, chans[0].samples[c][1].power,
5763 chans[1].num, chans[1].samples[c][1].power, 1);
5764 gain = interpolate(chan,
5765 chans[0].num, chans[0].samples[c][1].gain,
5766 chans[1].num, chans[1].samples[c][1].gain, 1);
5767 temp = interpolate(chan,
5768 chans[0].num, chans[0].samples[c][1].temp,
5769 chans[1].num, chans[1].samples[c][1].temp, 1);
5770 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
5771 "%s: Tx chain %d: power=%d gain=%d temp=%d\n",
5772 __func__, c, power, gain, temp);
5774 /* Compute temperature compensation. */
5775 tdiff = ((sc->temp - temp) * 2) / tdiv[grp];
5776 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
5777 "%s: temperature compensation=%d (current=%d, EEPROM=%d)\n",
5778 __func__, tdiff, sc->temp, temp);
5780 for (ridx = 0; ridx <= IWN_RIDX_MAX; ridx++) {
5781 /* Convert dBm to half-dBm. */
5782 maxchpwr = sc->maxpwr[chan] * 2;
5784 maxchpwr -= 6; /* MIMO 2T: -3dB */
5788 /* Adjust TX power based on rate. */
5789 if ((ridx % 8) == 5)
5790 pwr -= 15; /* OFDM48: -7.5dB */
5791 else if ((ridx % 8) == 6)
5792 pwr -= 17; /* OFDM54: -8.5dB */
5793 else if ((ridx % 8) == 7)
5794 pwr -= 20; /* OFDM60: -10dB */
5796 pwr -= 10; /* Others: -5dB */
5798 /* Do not exceed channel max TX power. */
5802 idx = gain - (pwr - power) - tdiff - vdiff;
5803 if ((ridx / 8) & 1) /* MIMO */
5804 idx += (int32_t)le32toh(uc->atten[grp][c]);
5807 idx += 9; /* 5GHz */
5808 if (ridx == IWN_RIDX_MAX)
5811 /* Make sure idx stays in a valid range. */
5814 else if (idx > IWN4965_MAX_PWR_INDEX)
5815 idx = IWN4965_MAX_PWR_INDEX;
5817 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
5818 "%s: Tx chain %d, rate idx %d: power=%d\n",
5819 __func__, c, ridx, idx);
5820 cmd.power[ridx].rf_gain[c] = rf_gain[idx];
5821 cmd.power[ridx].dsp_gain[c] = dsp_gain[idx];
5825 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
5826 "%s: set tx power for chan %d\n", __func__, chan);
5827 return iwn_cmd(sc, IWN_CMD_TXPOWER, &cmd, sizeof cmd, async);
5834 iwn5000_set_txpower(struct iwn_softc *sc, int async)
5836 struct iwn5000_cmd_txpower cmd;
5839 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5842 * TX power calibration is handled automatically by the firmware
5845 memset(&cmd, 0, sizeof cmd);
5846 cmd.global_limit = 2 * IWN5000_TXPOWER_MAX_DBM; /* 16 dBm */
5847 cmd.flags = IWN5000_TXPOWER_NO_CLOSED;
5848 cmd.srv_limit = IWN5000_TXPOWER_AUTO;
5849 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_XMIT,
5850 "%s: setting TX power; rev=%d\n",
5852 IWN_UCODE_API(sc->ucode_rev));
5853 if (IWN_UCODE_API(sc->ucode_rev) == 1)
5854 cmdid = IWN_CMD_TXPOWER_DBM_V1;
5856 cmdid = IWN_CMD_TXPOWER_DBM;
5857 return iwn_cmd(sc, cmdid, &cmd, sizeof cmd, async);
5861 * Retrieve the maximum RSSI (in dBm) among receivers.
5864 iwn4965_get_rssi(struct iwn_softc *sc, struct iwn_rx_stat *stat)
5866 struct iwn4965_rx_phystat *phy = (void *)stat->phybuf;
5870 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5872 mask = (le16toh(phy->antenna) >> 4) & IWN_ANT_ABC;
5873 agc = (le16toh(phy->agc) >> 7) & 0x7f;
5876 if (mask & IWN_ANT_A)
5877 rssi = MAX(rssi, phy->rssi[0]);
5878 if (mask & IWN_ANT_B)
5879 rssi = MAX(rssi, phy->rssi[2]);
5880 if (mask & IWN_ANT_C)
5881 rssi = MAX(rssi, phy->rssi[4]);
5883 DPRINTF(sc, IWN_DEBUG_RECV,
5884 "%s: agc %d mask 0x%x rssi %d %d %d result %d\n", __func__, agc,
5885 mask, phy->rssi[0], phy->rssi[2], phy->rssi[4],
5886 rssi - agc - IWN_RSSI_TO_DBM);
5887 return rssi - agc - IWN_RSSI_TO_DBM;
5891 iwn5000_get_rssi(struct iwn_softc *sc, struct iwn_rx_stat *stat)
5893 struct iwn5000_rx_phystat *phy = (void *)stat->phybuf;
5897 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5899 agc = (le32toh(phy->agc) >> 9) & 0x7f;
5901 rssi = MAX(le16toh(phy->rssi[0]) & 0xff,
5902 le16toh(phy->rssi[1]) & 0xff);
5903 rssi = MAX(le16toh(phy->rssi[2]) & 0xff, rssi);
5905 DPRINTF(sc, IWN_DEBUG_RECV,
5906 "%s: agc %d rssi %d %d %d result %d\n", __func__, agc,
5907 phy->rssi[0], phy->rssi[1], phy->rssi[2],
5908 rssi - agc - IWN_RSSI_TO_DBM);
5909 return rssi - agc - IWN_RSSI_TO_DBM;
5913 * Retrieve the average noise (in dBm) among receivers.
5916 iwn_get_noise(const struct iwn_rx_general_stats *stats)
5918 int i, total, nbant, noise;
5921 for (i = 0; i < 3; i++) {
5922 if ((noise = le32toh(stats->noise[i]) & 0xff) == 0)
5927 /* There should be at least one antenna but check anyway. */
5928 return (nbant == 0) ? -127 : (total / nbant) - 107;
5932 * Compute temperature (in degC) from last received statistics.
5935 iwn4965_get_temperature(struct iwn_softc *sc)
5937 struct iwn_ucode_info *uc = &sc->ucode_info;
5938 int32_t r1, r2, r3, r4, temp;
5940 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5942 r1 = le32toh(uc->temp[0].chan20MHz);
5943 r2 = le32toh(uc->temp[1].chan20MHz);
5944 r3 = le32toh(uc->temp[2].chan20MHz);
5945 r4 = le32toh(sc->rawtemp);
5947 if (r1 == r3) /* Prevents division by 0 (should not happen). */
5950 /* Sign-extend 23-bit R4 value to 32-bit. */
5951 r4 = ((r4 & 0xffffff) ^ 0x800000) - 0x800000;
5952 /* Compute temperature in Kelvin. */
5953 temp = (259 * (r4 - r2)) / (r3 - r1);
5954 temp = (temp * 97) / 100 + 8;
5956 DPRINTF(sc, IWN_DEBUG_ANY, "temperature %dK/%dC\n", temp,
5958 return IWN_KTOC(temp);
5962 iwn5000_get_temperature(struct iwn_softc *sc)
5966 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5969 * Temperature is not used by the driver for 5000 Series because
5970 * TX power calibration is handled by firmware.
5972 temp = le32toh(sc->rawtemp);
5973 if (sc->hw_type == IWN_HW_REV_TYPE_5150) {
5974 temp = (temp / -5) + sc->temp_off;
5975 temp = IWN_KTOC(temp);
5981 * Initialize sensitivity calibration state machine.
5984 iwn_init_sensitivity(struct iwn_softc *sc)
5986 struct iwn_ops *ops = &sc->ops;
5987 struct iwn_calib_state *calib = &sc->calib;
5991 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5993 /* Reset calibration state machine. */
5994 memset(calib, 0, sizeof (*calib));
5995 calib->state = IWN_CALIB_STATE_INIT;
5996 calib->cck_state = IWN_CCK_STATE_HIFA;
5997 /* Set initial correlation values. */
5998 calib->ofdm_x1 = sc->limits->min_ofdm_x1;
5999 calib->ofdm_mrc_x1 = sc->limits->min_ofdm_mrc_x1;
6000 calib->ofdm_x4 = sc->limits->min_ofdm_x4;
6001 calib->ofdm_mrc_x4 = sc->limits->min_ofdm_mrc_x4;
6002 calib->cck_x4 = 125;
6003 calib->cck_mrc_x4 = sc->limits->min_cck_mrc_x4;
6004 calib->energy_cck = sc->limits->energy_cck;
6006 /* Write initial sensitivity. */
6007 if ((error = iwn_send_sensitivity(sc)) != 0)
6010 /* Write initial gains. */
6011 if ((error = ops->init_gains(sc)) != 0)
6014 /* Request statistics at each beacon interval. */
6016 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: sending request for statistics\n",
6018 return iwn_cmd(sc, IWN_CMD_GET_STATISTICS, &flags, sizeof flags, 1);
6022 * Collect noise and RSSI statistics for the first 20 beacons received
6023 * after association and use them to determine connected antennas and
6024 * to set differential gains.
6027 iwn_collect_noise(struct iwn_softc *sc,
6028 const struct iwn_rx_general_stats *stats)
6030 struct iwn_ops *ops = &sc->ops;
6031 struct iwn_calib_state *calib = &sc->calib;
6032 struct ieee80211com *ic = &sc->sc_ic;
6036 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
6038 /* Accumulate RSSI and noise for all 3 antennas. */
6039 for (i = 0; i < 3; i++) {
6040 calib->rssi[i] += le32toh(stats->rssi[i]) & 0xff;
6041 calib->noise[i] += le32toh(stats->noise[i]) & 0xff;
6043 /* NB: We update differential gains only once after 20 beacons. */
6044 if (++calib->nbeacons < 20)
6047 /* Determine highest average RSSI. */
6048 val = MAX(calib->rssi[0], calib->rssi[1]);
6049 val = MAX(calib->rssi[2], val);
6051 /* Determine which antennas are connected. */
6052 sc->chainmask = sc->rxchainmask;
6053 for (i = 0; i < 3; i++)
6054 if (val - calib->rssi[i] > 15 * 20)
6055 sc->chainmask &= ~(1 << i);
6056 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_XMIT,
6057 "%s: RX chains mask: theoretical=0x%x, actual=0x%x\n",
6058 __func__, sc->rxchainmask, sc->chainmask);
6060 /* If none of the TX antennas are connected, keep at least one. */
6061 if ((sc->chainmask & sc->txchainmask) == 0)
6062 sc->chainmask |= IWN_LSB(sc->txchainmask);
6064 (void)ops->set_gains(sc);
6065 calib->state = IWN_CALIB_STATE_RUN;
6068 /* XXX Disable RX chains with no antennas connected. */
6069 sc->rxon->rxchain = htole16(IWN_RXCHAIN_SEL(sc->chainmask));
6070 if (sc->sc_is_scanning)
6071 device_printf(sc->sc_dev,
6072 "%s: is_scanning set, before RXON\n",
6074 (void)iwn_cmd(sc, IWN_CMD_RXON, sc->rxon, sc->rxonsz, 1);
6077 /* Enable power-saving mode if requested by user. */
6078 if (ic->ic_flags & IEEE80211_F_PMGTON)
6079 (void)iwn_set_pslevel(sc, 0, 3, 1);
6081 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
6086 iwn4965_init_gains(struct iwn_softc *sc)
6088 struct iwn_phy_calib_gain cmd;
6090 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
6092 memset(&cmd, 0, sizeof cmd);
6093 cmd.code = IWN4965_PHY_CALIB_DIFF_GAIN;
6094 /* Differential gains initially set to 0 for all 3 antennas. */
6095 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
6096 "%s: setting initial differential gains\n", __func__);
6097 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 1);
6101 iwn5000_init_gains(struct iwn_softc *sc)
6103 struct iwn_phy_calib cmd;
6105 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
6107 memset(&cmd, 0, sizeof cmd);
6108 cmd.code = sc->reset_noise_gain;
6111 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
6112 "%s: setting initial differential gains\n", __func__);
6113 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 1);
6117 iwn4965_set_gains(struct iwn_softc *sc)
6119 struct iwn_calib_state *calib = &sc->calib;
6120 struct iwn_phy_calib_gain cmd;
6121 int i, delta, noise;
6123 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
6125 /* Get minimal noise among connected antennas. */
6126 noise = INT_MAX; /* NB: There's at least one antenna. */
6127 for (i = 0; i < 3; i++)
6128 if (sc->chainmask & (1 << i))
6129 noise = MIN(calib->noise[i], noise);
6131 memset(&cmd, 0, sizeof cmd);
6132 cmd.code = IWN4965_PHY_CALIB_DIFF_GAIN;
6133 /* Set differential gains for connected antennas. */
6134 for (i = 0; i < 3; i++) {
6135 if (sc->chainmask & (1 << i)) {
6136 /* Compute attenuation (in unit of 1.5dB). */
6137 delta = (noise - (int32_t)calib->noise[i]) / 30;
6138 /* NB: delta <= 0 */
6139 /* Limit to [-4.5dB,0]. */
6140 cmd.gain[i] = MIN(abs(delta), 3);
6142 cmd.gain[i] |= 1 << 2; /* sign bit */
6145 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
6146 "setting differential gains Ant A/B/C: %x/%x/%x (%x)\n",
6147 cmd.gain[0], cmd.gain[1], cmd.gain[2], sc->chainmask);
6148 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 1);
6152 iwn5000_set_gains(struct iwn_softc *sc)
6154 struct iwn_calib_state *calib = &sc->calib;
6155 struct iwn_phy_calib_gain cmd;
6156 int i, ant, div, delta;
6158 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
6160 /* We collected 20 beacons and !=6050 need a 1.5 factor. */
6161 div = (sc->hw_type == IWN_HW_REV_TYPE_6050) ? 20 : 30;
6163 memset(&cmd, 0, sizeof cmd);
6164 cmd.code = sc->noise_gain;
6167 /* Get first available RX antenna as referential. */
6168 ant = IWN_LSB(sc->rxchainmask);
6169 /* Set differential gains for other antennas. */
6170 for (i = ant + 1; i < 3; i++) {
6171 if (sc->chainmask & (1 << i)) {
6172 /* The delta is relative to antenna "ant". */
6173 delta = ((int32_t)calib->noise[ant] -
6174 (int32_t)calib->noise[i]) / div;
6175 /* Limit to [-4.5dB,+4.5dB]. */
6176 cmd.gain[i - 1] = MIN(abs(delta), 3);
6178 cmd.gain[i - 1] |= 1 << 2; /* sign bit */
6181 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_XMIT,
6182 "setting differential gains Ant B/C: %x/%x (%x)\n",
6183 cmd.gain[0], cmd.gain[1], sc->chainmask);
6184 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 1);
6188 * Tune RF RX sensitivity based on the number of false alarms detected
6189 * during the last beacon period.
6192 iwn_tune_sensitivity(struct iwn_softc *sc, const struct iwn_rx_stats *stats)
6194 #define inc(val, inc, max) \
6195 if ((val) < (max)) { \
6196 if ((val) < (max) - (inc)) \
6202 #define dec(val, dec, min) \
6203 if ((val) > (min)) { \
6204 if ((val) > (min) + (dec)) \
6211 const struct iwn_sensitivity_limits *limits = sc->limits;
6212 struct iwn_calib_state *calib = &sc->calib;
6213 uint32_t val, rxena, fa;
6214 uint32_t energy[3], energy_min;
6215 uint8_t noise[3], noise_ref;
6216 int i, needs_update = 0;
6218 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
6220 /* Check that we've been enabled long enough. */
6221 if ((rxena = le32toh(stats->general.load)) == 0){
6222 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end not so long\n", __func__);
6226 /* Compute number of false alarms since last call for OFDM. */
6227 fa = le32toh(stats->ofdm.bad_plcp) - calib->bad_plcp_ofdm;
6228 fa += le32toh(stats->ofdm.fa) - calib->fa_ofdm;
6229 fa *= 200 * IEEE80211_DUR_TU; /* 200TU */
6231 if (fa > 50 * rxena) {
6232 /* High false alarm count, decrease sensitivity. */
6233 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
6234 "%s: OFDM high false alarm count: %u\n", __func__, fa);
6235 inc(calib->ofdm_x1, 1, limits->max_ofdm_x1);
6236 inc(calib->ofdm_mrc_x1, 1, limits->max_ofdm_mrc_x1);
6237 inc(calib->ofdm_x4, 1, limits->max_ofdm_x4);
6238 inc(calib->ofdm_mrc_x4, 1, limits->max_ofdm_mrc_x4);
6240 } else if (fa < 5 * rxena) {
6241 /* Low false alarm count, increase sensitivity. */
6242 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
6243 "%s: OFDM low false alarm count: %u\n", __func__, fa);
6244 dec(calib->ofdm_x1, 1, limits->min_ofdm_x1);
6245 dec(calib->ofdm_mrc_x1, 1, limits->min_ofdm_mrc_x1);
6246 dec(calib->ofdm_x4, 1, limits->min_ofdm_x4);
6247 dec(calib->ofdm_mrc_x4, 1, limits->min_ofdm_mrc_x4);
6250 /* Compute maximum noise among 3 receivers. */
6251 for (i = 0; i < 3; i++)
6252 noise[i] = (le32toh(stats->general.noise[i]) >> 8) & 0xff;
6253 val = MAX(noise[0], noise[1]);
6254 val = MAX(noise[2], val);
6255 /* Insert it into our samples table. */
6256 calib->noise_samples[calib->cur_noise_sample] = val;
6257 calib->cur_noise_sample = (calib->cur_noise_sample + 1) % 20;
6259 /* Compute maximum noise among last 20 samples. */
6260 noise_ref = calib->noise_samples[0];
6261 for (i = 1; i < 20; i++)
6262 noise_ref = MAX(noise_ref, calib->noise_samples[i]);
6264 /* Compute maximum energy among 3 receivers. */
6265 for (i = 0; i < 3; i++)
6266 energy[i] = le32toh(stats->general.energy[i]);
6267 val = MIN(energy[0], energy[1]);
6268 val = MIN(energy[2], val);
6269 /* Insert it into our samples table. */
6270 calib->energy_samples[calib->cur_energy_sample] = val;
6271 calib->cur_energy_sample = (calib->cur_energy_sample + 1) % 10;
6273 /* Compute minimum energy among last 10 samples. */
6274 energy_min = calib->energy_samples[0];
6275 for (i = 1; i < 10; i++)
6276 energy_min = MAX(energy_min, calib->energy_samples[i]);
6279 /* Compute number of false alarms since last call for CCK. */
6280 fa = le32toh(stats->cck.bad_plcp) - calib->bad_plcp_cck;
6281 fa += le32toh(stats->cck.fa) - calib->fa_cck;
6282 fa *= 200 * IEEE80211_DUR_TU; /* 200TU */
6284 if (fa > 50 * rxena) {
6285 /* High false alarm count, decrease sensitivity. */
6286 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
6287 "%s: CCK high false alarm count: %u\n", __func__, fa);
6288 calib->cck_state = IWN_CCK_STATE_HIFA;
6291 if (calib->cck_x4 > 160) {
6292 calib->noise_ref = noise_ref;
6293 if (calib->energy_cck > 2)
6294 dec(calib->energy_cck, 2, energy_min);
6296 if (calib->cck_x4 < 160) {
6297 calib->cck_x4 = 161;
6300 inc(calib->cck_x4, 3, limits->max_cck_x4);
6302 inc(calib->cck_mrc_x4, 3, limits->max_cck_mrc_x4);
6304 } else if (fa < 5 * rxena) {
6305 /* Low false alarm count, increase sensitivity. */
6306 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
6307 "%s: CCK low false alarm count: %u\n", __func__, fa);
6308 calib->cck_state = IWN_CCK_STATE_LOFA;
6311 if (calib->cck_state != IWN_CCK_STATE_INIT &&
6312 (((int32_t)calib->noise_ref - (int32_t)noise_ref) > 2 ||
6313 calib->low_fa > 100)) {
6314 inc(calib->energy_cck, 2, limits->min_energy_cck);
6315 dec(calib->cck_x4, 3, limits->min_cck_x4);
6316 dec(calib->cck_mrc_x4, 3, limits->min_cck_mrc_x4);
6319 /* Not worth to increase or decrease sensitivity. */
6320 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
6321 "%s: CCK normal false alarm count: %u\n", __func__, fa);
6323 calib->noise_ref = noise_ref;
6325 if (calib->cck_state == IWN_CCK_STATE_HIFA) {
6326 /* Previous interval had many false alarms. */
6327 dec(calib->energy_cck, 8, energy_min);
6329 calib->cck_state = IWN_CCK_STATE_INIT;
6333 (void)iwn_send_sensitivity(sc);
6335 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
6342 iwn_send_sensitivity(struct iwn_softc *sc)
6344 struct iwn_calib_state *calib = &sc->calib;
6345 struct iwn_enhanced_sensitivity_cmd cmd;
6348 memset(&cmd, 0, sizeof cmd);
6349 len = sizeof (struct iwn_sensitivity_cmd);
6350 cmd.which = IWN_SENSITIVITY_WORKTBL;
6351 /* OFDM modulation. */
6352 cmd.corr_ofdm_x1 = htole16(calib->ofdm_x1);
6353 cmd.corr_ofdm_mrc_x1 = htole16(calib->ofdm_mrc_x1);
6354 cmd.corr_ofdm_x4 = htole16(calib->ofdm_x4);
6355 cmd.corr_ofdm_mrc_x4 = htole16(calib->ofdm_mrc_x4);
6356 cmd.energy_ofdm = htole16(sc->limits->energy_ofdm);
6357 cmd.energy_ofdm_th = htole16(62);
6358 /* CCK modulation. */
6359 cmd.corr_cck_x4 = htole16(calib->cck_x4);
6360 cmd.corr_cck_mrc_x4 = htole16(calib->cck_mrc_x4);
6361 cmd.energy_cck = htole16(calib->energy_cck);
6362 /* Barker modulation: use default values. */
6363 cmd.corr_barker = htole16(190);
6364 cmd.corr_barker_mrc = htole16(sc->limits->barker_mrc);
6366 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
6367 "%s: set sensitivity %d/%d/%d/%d/%d/%d/%d\n", __func__,
6368 calib->ofdm_x1, calib->ofdm_mrc_x1, calib->ofdm_x4,
6369 calib->ofdm_mrc_x4, calib->cck_x4,
6370 calib->cck_mrc_x4, calib->energy_cck);
6372 if (!(sc->sc_flags & IWN_FLAG_ENH_SENS))
6374 /* Enhanced sensitivity settings. */
6375 len = sizeof (struct iwn_enhanced_sensitivity_cmd);
6376 cmd.ofdm_det_slope_mrc = htole16(668);
6377 cmd.ofdm_det_icept_mrc = htole16(4);
6378 cmd.ofdm_det_slope = htole16(486);
6379 cmd.ofdm_det_icept = htole16(37);
6380 cmd.cck_det_slope_mrc = htole16(853);
6381 cmd.cck_det_icept_mrc = htole16(4);
6382 cmd.cck_det_slope = htole16(476);
6383 cmd.cck_det_icept = htole16(99);
6385 return iwn_cmd(sc, IWN_CMD_SET_SENSITIVITY, &cmd, len, 1);
6389 * Look at the increase of PLCP errors over time; if it exceeds
6390 * a programmed threshold then trigger an RF retune.
6393 iwn_check_rx_recovery(struct iwn_softc *sc, struct iwn_stats *rs)
6395 int32_t delta_ofdm, delta_ht, delta_cck;
6396 struct iwn_calib_state *calib = &sc->calib;
6397 int delta_ticks, cur_ticks;
6402 * Calculate the difference between the current and
6403 * previous statistics.
6405 delta_cck = le32toh(rs->rx.cck.bad_plcp) - calib->bad_plcp_cck;
6406 delta_ofdm = le32toh(rs->rx.ofdm.bad_plcp) - calib->bad_plcp_ofdm;
6407 delta_ht = le32toh(rs->rx.ht.bad_plcp) - calib->bad_plcp_ht;
6410 * Calculate the delta in time between successive statistics
6411 * messages. Yes, it can roll over; so we make sure that
6412 * this doesn't happen.
6414 * XXX go figure out what to do about rollover
6415 * XXX go figure out what to do if ticks rolls over to -ve instead!
6416 * XXX go stab signed integer overflow undefined-ness in the face.
6419 delta_ticks = cur_ticks - sc->last_calib_ticks;
6422 * If any are negative, then the firmware likely reset; so just
6423 * bail. We'll pick this up next time.
6425 if (delta_cck < 0 || delta_ofdm < 0 || delta_ht < 0 || delta_ticks < 0)
6429 * delta_ticks is in ticks; we need to convert it up to milliseconds
6430 * so we can do some useful math with it.
6432 delta_msec = ticks_to_msecs(delta_ticks);
6435 * Calculate what our threshold is given the current delta_msec.
6437 thresh = sc->base_params->plcp_err_threshold * delta_msec;
6439 DPRINTF(sc, IWN_DEBUG_STATE,
6440 "%s: time delta: %d; cck=%d, ofdm=%d, ht=%d, total=%d, thresh=%d\n",
6446 (delta_msec + delta_cck + delta_ofdm + delta_ht),
6450 * If we need a retune, then schedule a single channel scan
6451 * to a channel that isn't the currently active one!
6453 * The math from linux iwlwifi:
6455 * if ((delta * 100 / msecs) > threshold)
6457 if (thresh > 0 && (delta_cck + delta_ofdm + delta_ht) * 100 > thresh) {
6458 DPRINTF(sc, IWN_DEBUG_ANY,
6459 "%s: PLCP error threshold raw (%d) comparison (%d) "
6460 "over limit (%d); retune!\n",
6462 (delta_cck + delta_ofdm + delta_ht),
6463 (delta_cck + delta_ofdm + delta_ht) * 100,
6469 * Set STA mode power saving level (between 0 and 5).
6470 * Level 0 is CAM (Continuously Aware Mode), 5 is for maximum power saving.
6473 iwn_set_pslevel(struct iwn_softc *sc, int dtim, int level, int async)
6475 struct iwn_pmgt_cmd cmd;
6476 const struct iwn_pmgt *pmgt;
6477 uint32_t max, skip_dtim;
6481 DPRINTF(sc, IWN_DEBUG_PWRSAVE,
6482 "%s: dtim=%d, level=%d, async=%d\n",
6488 /* Select which PS parameters to use. */
6490 pmgt = &iwn_pmgt[0][level];
6491 else if (dtim <= 10)
6492 pmgt = &iwn_pmgt[1][level];
6494 pmgt = &iwn_pmgt[2][level];
6496 memset(&cmd, 0, sizeof cmd);
6497 if (level != 0) /* not CAM */
6498 cmd.flags |= htole16(IWN_PS_ALLOW_SLEEP);
6500 cmd.flags |= htole16(IWN_PS_FAST_PD);
6501 /* Retrieve PCIe Active State Power Management (ASPM). */
6502 reg = pci_read_config(sc->sc_dev, sc->sc_cap_off + PCIER_LINK_CTL, 4);
6503 if (!(reg & PCIEM_LINK_CTL_ASPMC_L0S)) /* L0s Entry disabled. */
6504 cmd.flags |= htole16(IWN_PS_PCI_PMGT);
6505 cmd.rxtimeout = htole32(pmgt->rxtimeout * 1024);
6506 cmd.txtimeout = htole32(pmgt->txtimeout * 1024);
6512 skip_dtim = pmgt->skip_dtim;
6513 if (skip_dtim != 0) {
6514 cmd.flags |= htole16(IWN_PS_SLEEP_OVER_DTIM);
6515 max = pmgt->intval[4];
6516 if (max == (uint32_t)-1)
6517 max = dtim * (skip_dtim + 1);
6518 else if (max > dtim)
6519 max = rounddown(max, dtim);
6522 for (i = 0; i < 5; i++)
6523 cmd.intval[i] = htole32(MIN(max, pmgt->intval[i]));
6525 DPRINTF(sc, IWN_DEBUG_RESET, "setting power saving level to %d\n",
6527 return iwn_cmd(sc, IWN_CMD_SET_POWER_MODE, &cmd, sizeof cmd, async);
6531 iwn_send_btcoex(struct iwn_softc *sc)
6533 struct iwn_bluetooth cmd;
6535 memset(&cmd, 0, sizeof cmd);
6536 cmd.flags = IWN_BT_COEX_CHAN_ANN | IWN_BT_COEX_BT_PRIO;
6537 cmd.lead_time = IWN_BT_LEAD_TIME_DEF;
6538 cmd.max_kill = IWN_BT_MAX_KILL_DEF;
6539 DPRINTF(sc, IWN_DEBUG_RESET, "%s: configuring bluetooth coexistence\n",
6541 return iwn_cmd(sc, IWN_CMD_BT_COEX, &cmd, sizeof(cmd), 0);
6545 iwn_send_advanced_btcoex(struct iwn_softc *sc)
6547 static const uint32_t btcoex_3wire[12] = {
6548 0xaaaaaaaa, 0xaaaaaaaa, 0xaeaaaaaa, 0xaaaaaaaa,
6549 0xcc00ff28, 0x0000aaaa, 0xcc00aaaa, 0x0000aaaa,
6550 0xc0004000, 0x00004000, 0xf0005000, 0xf0005000,
6552 struct iwn6000_btcoex_config btconfig;
6553 struct iwn2000_btcoex_config btconfig2k;
6554 struct iwn_btcoex_priotable btprio;
6555 struct iwn_btcoex_prot btprot;
6559 memset(&btconfig, 0, sizeof btconfig);
6560 memset(&btconfig2k, 0, sizeof btconfig2k);
6562 flags = IWN_BT_FLAG_COEX6000_MODE_3W <<
6563 IWN_BT_FLAG_COEX6000_MODE_SHIFT; // Done as is in linux kernel 3.2
6565 if (sc->base_params->bt_sco_disable)
6566 flags &= ~IWN_BT_FLAG_SYNC_2_BT_DISABLE;
6568 flags |= IWN_BT_FLAG_SYNC_2_BT_DISABLE;
6570 flags |= IWN_BT_FLAG_COEX6000_CHAN_INHIBITION;
6572 /* Default flags result is 145 as old value */
6575 * Flags value has to be review. Values must change if we
6576 * which to disable it
6578 if (sc->base_params->bt_session_2) {
6579 btconfig2k.flags = flags;
6580 btconfig2k.max_kill = 5;
6581 btconfig2k.bt3_t7_timer = 1;
6582 btconfig2k.kill_ack = htole32(0xffff0000);
6583 btconfig2k.kill_cts = htole32(0xffff0000);
6584 btconfig2k.sample_time = 2;
6585 btconfig2k.bt3_t2_timer = 0xc;
6587 for (i = 0; i < 12; i++)
6588 btconfig2k.lookup_table[i] = htole32(btcoex_3wire[i]);
6589 btconfig2k.valid = htole16(0xff);
6590 btconfig2k.prio_boost = htole32(0xf0);
6591 DPRINTF(sc, IWN_DEBUG_RESET,
6592 "%s: configuring advanced bluetooth coexistence"
6593 " session 2, flags : 0x%x\n",
6596 error = iwn_cmd(sc, IWN_CMD_BT_COEX, &btconfig2k,
6597 sizeof(btconfig2k), 1);
6599 btconfig.flags = flags;
6600 btconfig.max_kill = 5;
6601 btconfig.bt3_t7_timer = 1;
6602 btconfig.kill_ack = htole32(0xffff0000);
6603 btconfig.kill_cts = htole32(0xffff0000);
6604 btconfig.sample_time = 2;
6605 btconfig.bt3_t2_timer = 0xc;
6607 for (i = 0; i < 12; i++)
6608 btconfig.lookup_table[i] = htole32(btcoex_3wire[i]);
6609 btconfig.valid = htole16(0xff);
6610 btconfig.prio_boost = 0xf0;
6611 DPRINTF(sc, IWN_DEBUG_RESET,
6612 "%s: configuring advanced bluetooth coexistence,"
6616 error = iwn_cmd(sc, IWN_CMD_BT_COEX, &btconfig,
6617 sizeof(btconfig), 1);
6623 memset(&btprio, 0, sizeof btprio);
6624 btprio.calib_init1 = 0x6;
6625 btprio.calib_init2 = 0x7;
6626 btprio.calib_periodic_low1 = 0x2;
6627 btprio.calib_periodic_low2 = 0x3;
6628 btprio.calib_periodic_high1 = 0x4;
6629 btprio.calib_periodic_high2 = 0x5;
6631 btprio.scan52 = 0x8;
6632 btprio.scan24 = 0xa;
6633 error = iwn_cmd(sc, IWN_CMD_BT_COEX_PRIOTABLE, &btprio, sizeof(btprio),
6638 /* Force BT state machine change. */
6639 memset(&btprot, 0, sizeof btprot);
6642 error = iwn_cmd(sc, IWN_CMD_BT_COEX_PROT, &btprot, sizeof(btprot), 1);
6646 return iwn_cmd(sc, IWN_CMD_BT_COEX_PROT, &btprot, sizeof(btprot), 1);
6650 iwn5000_runtime_calib(struct iwn_softc *sc)
6652 struct iwn5000_calib_config cmd;
6654 memset(&cmd, 0, sizeof cmd);
6655 cmd.ucode.once.enable = 0xffffffff;
6656 cmd.ucode.once.start = IWN5000_CALIB_DC;
6657 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
6658 "%s: configuring runtime calibration\n", __func__);
6659 return iwn_cmd(sc, IWN5000_CMD_CALIB_CONFIG, &cmd, sizeof(cmd), 0);
6663 iwn_get_rxon_ht_flags(struct iwn_softc *sc, struct ieee80211_channel *c)
6665 struct ieee80211com *ic = &sc->sc_ic;
6666 uint32_t htflags = 0;
6668 if (! IEEE80211_IS_CHAN_HT(c))
6671 htflags |= IWN_RXON_HT_PROTMODE(ic->ic_curhtprotmode);
6673 if (IEEE80211_IS_CHAN_HT40(c)) {
6674 switch (ic->ic_curhtprotmode) {
6675 case IEEE80211_HTINFO_OPMODE_HT20PR:
6676 htflags |= IWN_RXON_HT_MODEPURE40;
6679 htflags |= IWN_RXON_HT_MODEMIXED;
6683 if (IEEE80211_IS_CHAN_HT40D(c))
6684 htflags |= IWN_RXON_HT_HT40MINUS;
6690 iwn_check_bss_filter(struct iwn_softc *sc)
6692 return ((sc->rxon->filter & htole32(IWN_FILTER_BSS)) != 0);
6696 iwn4965_rxon_assoc(struct iwn_softc *sc, int async)
6698 struct iwn4965_rxon_assoc cmd;
6699 struct iwn_rxon *rxon = sc->rxon;
6701 cmd.flags = rxon->flags;
6702 cmd.filter = rxon->filter;
6703 cmd.ofdm_mask = rxon->ofdm_mask;
6704 cmd.cck_mask = rxon->cck_mask;
6705 cmd.ht_single_mask = rxon->ht_single_mask;
6706 cmd.ht_dual_mask = rxon->ht_dual_mask;
6707 cmd.rxchain = rxon->rxchain;
6710 return (iwn_cmd(sc, IWN_CMD_RXON_ASSOC, &cmd, sizeof(cmd), async));
6714 iwn5000_rxon_assoc(struct iwn_softc *sc, int async)
6716 struct iwn5000_rxon_assoc cmd;
6717 struct iwn_rxon *rxon = sc->rxon;
6719 cmd.flags = rxon->flags;
6720 cmd.filter = rxon->filter;
6721 cmd.ofdm_mask = rxon->ofdm_mask;
6722 cmd.cck_mask = rxon->cck_mask;
6724 cmd.ht_single_mask = rxon->ht_single_mask;
6725 cmd.ht_dual_mask = rxon->ht_dual_mask;
6726 cmd.ht_triple_mask = rxon->ht_triple_mask;
6728 cmd.rxchain = rxon->rxchain;
6729 cmd.acquisition = rxon->acquisition;
6732 return (iwn_cmd(sc, IWN_CMD_RXON_ASSOC, &cmd, sizeof(cmd), async));
6736 iwn_send_rxon(struct iwn_softc *sc, int assoc, int async)
6738 struct iwn_ops *ops = &sc->ops;
6741 IWN_LOCK_ASSERT(sc);
6743 if (assoc && iwn_check_bss_filter(sc) != 0) {
6744 error = ops->rxon_assoc(sc, async);
6746 device_printf(sc->sc_dev,
6747 "%s: RXON_ASSOC command failed, error %d\n",
6752 if (sc->sc_is_scanning)
6753 device_printf(sc->sc_dev,
6754 "%s: is_scanning set, before RXON\n",
6757 error = iwn_cmd(sc, IWN_CMD_RXON, sc->rxon, sc->rxonsz, async);
6759 device_printf(sc->sc_dev,
6760 "%s: RXON command failed, error %d\n",
6766 * Reconfiguring RXON clears the firmware nodes table so
6767 * we must add the broadcast node again.
6769 if (iwn_check_bss_filter(sc) == 0 &&
6770 (error = iwn_add_broadcast_node(sc, async)) != 0) {
6771 device_printf(sc->sc_dev,
6772 "%s: could not add broadcast node, error %d\n",
6778 /* Configuration has changed, set TX power accordingly. */
6779 if ((error = ops->set_txpower(sc, async)) != 0) {
6780 device_printf(sc->sc_dev,
6781 "%s: could not set TX power, error %d\n",
6790 iwn_config(struct iwn_softc *sc)
6792 struct ieee80211com *ic = &sc->sc_ic;
6793 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
6794 const uint8_t *macaddr;
6799 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
6801 if ((sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSET)
6802 && (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSETv2)) {
6803 device_printf(sc->sc_dev,"%s: temp_offset and temp_offsetv2 are"
6804 " exclusive each together. Review NIC config file. Conf"
6805 " : 0x%08x Flags : 0x%08x \n", __func__,
6806 sc->base_params->calib_need,
6807 (IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSET |
6808 IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSETv2));
6812 /* Compute temperature calib if needed. Will be send by send calib */
6813 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSET) {
6814 error = iwn5000_temp_offset_calib(sc);
6816 device_printf(sc->sc_dev,
6817 "%s: could not set temperature offset\n", __func__);
6820 } else if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSETv2) {
6821 error = iwn5000_temp_offset_calibv2(sc);
6823 device_printf(sc->sc_dev,
6824 "%s: could not compute temperature offset v2\n",
6830 if (sc->hw_type == IWN_HW_REV_TYPE_6050) {
6831 /* Configure runtime DC calibration. */
6832 error = iwn5000_runtime_calib(sc);
6834 device_printf(sc->sc_dev,
6835 "%s: could not configure runtime calibration\n",
6841 /* Configure valid TX chains for >=5000 Series. */
6842 if (sc->hw_type != IWN_HW_REV_TYPE_4965 &&
6843 IWN_UCODE_API(sc->ucode_rev) > 1) {
6844 txmask = htole32(sc->txchainmask);
6845 DPRINTF(sc, IWN_DEBUG_RESET | IWN_DEBUG_XMIT,
6846 "%s: configuring valid TX chains 0x%x\n", __func__, txmask);
6847 error = iwn_cmd(sc, IWN5000_CMD_TX_ANT_CONFIG, &txmask,
6850 device_printf(sc->sc_dev,
6851 "%s: could not configure valid TX chains, "
6852 "error %d\n", __func__, error);
6857 /* Configure bluetooth coexistence. */
6860 /* Configure bluetooth coexistence if needed. */
6861 if (sc->base_params->bt_mode == IWN_BT_ADVANCED)
6862 error = iwn_send_advanced_btcoex(sc);
6863 if (sc->base_params->bt_mode == IWN_BT_SIMPLE)
6864 error = iwn_send_btcoex(sc);
6867 device_printf(sc->sc_dev,
6868 "%s: could not configure bluetooth coexistence, error %d\n",
6873 /* Set mode, channel, RX filter and enable RX. */
6874 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX];
6875 memset(sc->rxon, 0, sizeof (struct iwn_rxon));
6876 macaddr = vap ? vap->iv_myaddr : ic->ic_macaddr;
6877 IEEE80211_ADDR_COPY(sc->rxon->myaddr, macaddr);
6878 IEEE80211_ADDR_COPY(sc->rxon->wlap, macaddr);
6879 sc->rxon->chan = ieee80211_chan2ieee(ic, ic->ic_curchan);
6880 sc->rxon->flags = htole32(IWN_RXON_TSF | IWN_RXON_CTS_TO_SELF);
6881 if (IEEE80211_IS_CHAN_2GHZ(ic->ic_curchan))
6882 sc->rxon->flags |= htole32(IWN_RXON_AUTO | IWN_RXON_24GHZ);
6884 sc->rxon->filter = htole32(IWN_FILTER_MULTICAST);
6885 switch (ic->ic_opmode) {
6886 case IEEE80211_M_STA:
6887 sc->rxon->mode = IWN_MODE_STA;
6889 case IEEE80211_M_MONITOR:
6890 sc->rxon->mode = IWN_MODE_MONITOR;
6893 /* Should not get there. */
6896 iwn_set_promisc(sc);
6897 sc->rxon->cck_mask = 0x0f; /* not yet negotiated */
6898 sc->rxon->ofdm_mask = 0xff; /* not yet negotiated */
6899 sc->rxon->ht_single_mask = 0xff;
6900 sc->rxon->ht_dual_mask = 0xff;
6901 sc->rxon->ht_triple_mask = 0xff;
6903 * In active association mode, ensure that
6904 * all the receive chains are enabled.
6906 * Since we're not yet doing SMPS, don't allow the
6907 * number of idle RX chains to be less than the active
6911 IWN_RXCHAIN_VALID(sc->rxchainmask) |
6912 IWN_RXCHAIN_MIMO_COUNT(sc->nrxchains) |
6913 IWN_RXCHAIN_IDLE_COUNT(sc->nrxchains);
6914 sc->rxon->rxchain = htole16(rxchain);
6915 DPRINTF(sc, IWN_DEBUG_RESET | IWN_DEBUG_XMIT,
6916 "%s: rxchainmask=0x%x, nrxchains=%d\n",
6921 sc->rxon->flags |= htole32(iwn_get_rxon_ht_flags(sc, ic->ic_curchan));
6923 DPRINTF(sc, IWN_DEBUG_RESET,
6924 "%s: setting configuration; flags=0x%08x\n",
6925 __func__, le32toh(sc->rxon->flags));
6926 if ((error = iwn_send_rxon(sc, 0, 0)) != 0) {
6927 device_printf(sc->sc_dev, "%s: could not send RXON\n",
6932 if ((error = iwn_set_critical_temp(sc)) != 0) {
6933 device_printf(sc->sc_dev,
6934 "%s: could not set critical temperature\n", __func__);
6938 /* Set power saving level to CAM during initialization. */
6939 if ((error = iwn_set_pslevel(sc, 0, 0, 0)) != 0) {
6940 device_printf(sc->sc_dev,
6941 "%s: could not set power saving level\n", __func__);
6945 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
6951 iwn_get_active_dwell_time(struct iwn_softc *sc,
6952 struct ieee80211_channel *c, uint8_t n_probes)
6954 /* No channel? Default to 2GHz settings */
6955 if (c == NULL || IEEE80211_IS_CHAN_2GHZ(c)) {
6956 return (IWN_ACTIVE_DWELL_TIME_2GHZ +
6957 IWN_ACTIVE_DWELL_FACTOR_2GHZ * (n_probes + 1));
6960 /* 5GHz dwell time */
6961 return (IWN_ACTIVE_DWELL_TIME_5GHZ +
6962 IWN_ACTIVE_DWELL_FACTOR_5GHZ * (n_probes + 1));
6966 * Limit the total dwell time to 85% of the beacon interval.
6968 * Returns the dwell time in milliseconds.
6971 iwn_limit_dwell(struct iwn_softc *sc, uint16_t dwell_time)
6973 struct ieee80211com *ic = &sc->sc_ic;
6974 struct ieee80211vap *vap = NULL;
6977 /* bintval is in TU (1.024mS) */
6978 if (! TAILQ_EMPTY(&ic->ic_vaps)) {
6979 vap = TAILQ_FIRST(&ic->ic_vaps);
6980 bintval = vap->iv_bss->ni_intval;
6984 * If it's non-zero, we should calculate the minimum of
6985 * it and the DWELL_BASE.
6987 * XXX Yes, the math should take into account that bintval
6988 * is 1.024mS, not 1mS..
6991 DPRINTF(sc, IWN_DEBUG_SCAN,
6995 return (MIN(IWN_PASSIVE_DWELL_BASE, ((bintval * 85) / 100)));
6998 /* No association context? Default */
6999 return (IWN_PASSIVE_DWELL_BASE);
7003 iwn_get_passive_dwell_time(struct iwn_softc *sc, struct ieee80211_channel *c)
7007 if (c == NULL || IEEE80211_IS_CHAN_2GHZ(c)) {
7008 passive = IWN_PASSIVE_DWELL_BASE + IWN_PASSIVE_DWELL_TIME_2GHZ;
7010 passive = IWN_PASSIVE_DWELL_BASE + IWN_PASSIVE_DWELL_TIME_5GHZ;
7013 /* Clamp to the beacon interval if we're associated */
7014 return (iwn_limit_dwell(sc, passive));
7018 iwn_scan(struct iwn_softc *sc, struct ieee80211vap *vap,
7019 struct ieee80211_scan_state *ss, struct ieee80211_channel *c)
7021 struct ieee80211com *ic = &sc->sc_ic;
7022 struct ieee80211_node *ni = vap->iv_bss;
7023 struct iwn_scan_hdr *hdr;
7024 struct iwn_cmd_data *tx;
7025 struct iwn_scan_essid *essid;
7026 struct iwn_scan_chan *chan;
7027 struct ieee80211_frame *wh;
7028 struct ieee80211_rateset *rs;
7034 uint16_t dwell_active, dwell_passive;
7035 uint32_t extra, scan_service_time;
7037 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
7040 * We are absolutely not allowed to send a scan command when another
7041 * scan command is pending.
7043 if (sc->sc_is_scanning) {
7044 device_printf(sc->sc_dev, "%s: called whilst scanning!\n",
7049 /* Assign the scan channel */
7052 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX];
7053 buf = malloc(IWN_SCAN_MAXSZ, M_DEVBUF, M_NOWAIT | M_ZERO);
7055 device_printf(sc->sc_dev,
7056 "%s: could not allocate buffer for scan command\n",
7060 hdr = (struct iwn_scan_hdr *)buf;
7062 * Move to the next channel if no frames are received within 10ms
7063 * after sending the probe request.
7065 hdr->quiet_time = htole16(10); /* timeout in milliseconds */
7066 hdr->quiet_threshold = htole16(1); /* min # of packets */
7068 * Max needs to be greater than active and passive and quiet!
7069 * It's also in microseconds!
7071 hdr->max_svc = htole32(250 * 1024);
7074 * Reset scan: interval=100
7075 * Normal scan: interval=becaon interval
7076 * suspend_time: 100 (TU)
7079 extra = (100 /* suspend_time */ / 100 /* beacon interval */) << 22;
7080 //scan_service_time = extra | ((100 /* susp */ % 100 /* int */) * 1024);
7081 scan_service_time = (4 << 22) | (100 * 1024); /* Hardcode for now! */
7082 hdr->pause_svc = htole32(scan_service_time);
7084 /* Select antennas for scanning. */
7086 IWN_RXCHAIN_VALID(sc->rxchainmask) |
7087 IWN_RXCHAIN_FORCE_MIMO_SEL(sc->rxchainmask) |
7088 IWN_RXCHAIN_DRIVER_FORCE;
7089 if (IEEE80211_IS_CHAN_A(c) &&
7090 sc->hw_type == IWN_HW_REV_TYPE_4965) {
7091 /* Ant A must be avoided in 5GHz because of an HW bug. */
7092 rxchain |= IWN_RXCHAIN_FORCE_SEL(IWN_ANT_B);
7093 } else /* Use all available RX antennas. */
7094 rxchain |= IWN_RXCHAIN_FORCE_SEL(sc->rxchainmask);
7095 hdr->rxchain = htole16(rxchain);
7096 hdr->filter = htole32(IWN_FILTER_MULTICAST | IWN_FILTER_BEACON);
7098 tx = (struct iwn_cmd_data *)(hdr + 1);
7099 tx->flags = htole32(IWN_TX_AUTO_SEQ);
7100 tx->id = sc->broadcast_id;
7101 tx->lifetime = htole32(IWN_LIFETIME_INFINITE);
7103 if (IEEE80211_IS_CHAN_5GHZ(c)) {
7104 /* Send probe requests at 6Mbps. */
7105 tx->rate = htole32(0xd);
7106 rs = &ic->ic_sup_rates[IEEE80211_MODE_11A];
7108 hdr->flags = htole32(IWN_RXON_24GHZ | IWN_RXON_AUTO);
7109 if (sc->hw_type == IWN_HW_REV_TYPE_4965 &&
7110 sc->rxon->associd && sc->rxon->chan > 14)
7111 tx->rate = htole32(0xd);
7113 /* Send probe requests at 1Mbps. */
7114 tx->rate = htole32(10 | IWN_RFLAG_CCK);
7116 rs = &ic->ic_sup_rates[IEEE80211_MODE_11G];
7118 /* Use the first valid TX antenna. */
7119 txant = IWN_LSB(sc->txchainmask);
7120 tx->rate |= htole32(IWN_RFLAG_ANT(txant));
7123 * Only do active scanning if we're announcing a probe request
7124 * for a given SSID (or more, if we ever add it to the driver.)
7129 * If we're scanning for a specific SSID, add it to the command.
7131 * XXX maybe look at adding support for scanning multiple SSIDs?
7133 essid = (struct iwn_scan_essid *)(tx + 1);
7135 if (ss->ss_ssid[0].len != 0) {
7136 essid[0].id = IEEE80211_ELEMID_SSID;
7137 essid[0].len = ss->ss_ssid[0].len;
7138 memcpy(essid[0].data, ss->ss_ssid[0].ssid, ss->ss_ssid[0].len);
7141 DPRINTF(sc, IWN_DEBUG_SCAN, "%s: ssid_len=%d, ssid=%*s\n",
7145 ss->ss_ssid[0].ssid);
7147 if (ss->ss_nssid > 0)
7152 * Build a probe request frame. Most of the following code is a
7153 * copy & paste of what is done in net80211.
7155 wh = (struct ieee80211_frame *)(essid + 20);
7156 wh->i_fc[0] = IEEE80211_FC0_VERSION_0 | IEEE80211_FC0_TYPE_MGT |
7157 IEEE80211_FC0_SUBTYPE_PROBE_REQ;
7158 wh->i_fc[1] = IEEE80211_FC1_DIR_NODS;
7159 IEEE80211_ADDR_COPY(wh->i_addr1, vap->iv_ifp->if_broadcastaddr);
7160 IEEE80211_ADDR_COPY(wh->i_addr2, IF_LLADDR(vap->iv_ifp));
7161 IEEE80211_ADDR_COPY(wh->i_addr3, vap->iv_ifp->if_broadcastaddr);
7162 *(uint16_t *)&wh->i_dur[0] = 0; /* filled by HW */
7163 *(uint16_t *)&wh->i_seq[0] = 0; /* filled by HW */
7165 frm = (uint8_t *)(wh + 1);
7166 frm = ieee80211_add_ssid(frm, NULL, 0);
7167 frm = ieee80211_add_rates(frm, rs);
7168 if (rs->rs_nrates > IEEE80211_RATE_SIZE)
7169 frm = ieee80211_add_xrates(frm, rs);
7170 if (ic->ic_htcaps & IEEE80211_HTC_HT)
7171 frm = ieee80211_add_htcap(frm, ni);
7173 /* Set length of probe request. */
7174 tx->len = htole16(frm - (uint8_t *)wh);
7177 * If active scanning is requested but a certain channel is
7178 * marked passive, we can do active scanning if we detect
7181 * There is an issue with some firmware versions that triggers
7182 * a sysassert on a "good CRC threshold" of zero (== disabled),
7183 * on a radar channel even though this means that we should NOT
7186 * The "good CRC threshold" is the number of frames that we
7187 * need to receive during our dwell time on a channel before
7188 * sending out probes -- setting this to a huge value will
7189 * mean we never reach it, but at the same time work around
7190 * the aforementioned issue. Thus use IWL_GOOD_CRC_TH_NEVER
7191 * here instead of IWL_GOOD_CRC_TH_DISABLED.
7193 * This was fixed in later versions along with some other
7194 * scan changes, and the threshold behaves as a flag in those
7199 * If we're doing active scanning, set the crc_threshold
7200 * to a suitable value. This is different to active veruss
7201 * passive scanning depending upon the channel flags; the
7202 * firmware will obey that particular check for us.
7204 if (sc->tlv_feature_flags & IWN_UCODE_TLV_FLAGS_NEWSCAN)
7205 hdr->crc_threshold = is_active ?
7206 IWN_GOOD_CRC_TH_DEFAULT : IWN_GOOD_CRC_TH_DISABLED;
7208 hdr->crc_threshold = is_active ?
7209 IWN_GOOD_CRC_TH_DEFAULT : IWN_GOOD_CRC_TH_NEVER;
7211 chan = (struct iwn_scan_chan *)frm;
7212 chan->chan = htole16(ieee80211_chan2ieee(ic, c));
7214 if (ss->ss_nssid > 0)
7215 chan->flags |= htole32(IWN_CHAN_NPBREQS(1));
7216 chan->dsp_gain = 0x6e;
7219 * Set the passive/active flag depending upon the channel mode.
7220 * XXX TODO: take the is_active flag into account as well?
7222 if (c->ic_flags & IEEE80211_CHAN_PASSIVE)
7223 chan->flags |= htole32(IWN_CHAN_PASSIVE);
7225 chan->flags |= htole32(IWN_CHAN_ACTIVE);
7228 * Calculate the active/passive dwell times.
7231 dwell_active = iwn_get_active_dwell_time(sc, c, ss->ss_nssid);
7232 dwell_passive = iwn_get_passive_dwell_time(sc, c);
7234 /* Make sure they're valid */
7235 if (dwell_passive <= dwell_active)
7236 dwell_passive = dwell_active + 1;
7238 chan->active = htole16(dwell_active);
7239 chan->passive = htole16(dwell_passive);
7241 if (IEEE80211_IS_CHAN_5GHZ(c))
7242 chan->rf_gain = 0x3b;
7244 chan->rf_gain = 0x28;
7246 DPRINTF(sc, IWN_DEBUG_STATE,
7247 "%s: chan %u flags 0x%x rf_gain 0x%x "
7248 "dsp_gain 0x%x active %d passive %d scan_svc_time %d crc 0x%x "
7249 "isactive=%d numssid=%d\n", __func__,
7250 chan->chan, chan->flags, chan->rf_gain, chan->dsp_gain,
7251 dwell_active, dwell_passive, scan_service_time,
7252 hdr->crc_threshold, is_active, ss->ss_nssid);
7256 buflen = (uint8_t *)chan - buf;
7257 hdr->len = htole16(buflen);
7259 if (sc->sc_is_scanning) {
7260 device_printf(sc->sc_dev,
7261 "%s: called with is_scanning set!\n",
7264 sc->sc_is_scanning = 1;
7266 DPRINTF(sc, IWN_DEBUG_STATE, "sending scan command nchan=%d\n",
7268 error = iwn_cmd(sc, IWN_CMD_SCAN, buf, buflen, 1);
7269 free(buf, M_DEVBUF);
7271 callout_reset(&sc->scan_timeout, 5*hz, iwn_scan_timeout, sc);
7273 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
7279 iwn_auth(struct iwn_softc *sc, struct ieee80211vap *vap)
7281 struct ieee80211com *ic = &sc->sc_ic;
7282 struct ieee80211_node *ni = vap->iv_bss;
7285 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
7287 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX];
7288 /* Update adapter configuration. */
7289 IEEE80211_ADDR_COPY(sc->rxon->bssid, ni->ni_bssid);
7290 sc->rxon->chan = ieee80211_chan2ieee(ic, ni->ni_chan);
7291 sc->rxon->flags = htole32(IWN_RXON_TSF | IWN_RXON_CTS_TO_SELF);
7292 if (IEEE80211_IS_CHAN_2GHZ(ni->ni_chan))
7293 sc->rxon->flags |= htole32(IWN_RXON_AUTO | IWN_RXON_24GHZ);
7294 if (ic->ic_flags & IEEE80211_F_SHSLOT)
7295 sc->rxon->flags |= htole32(IWN_RXON_SHSLOT);
7296 if (ic->ic_flags & IEEE80211_F_SHPREAMBLE)
7297 sc->rxon->flags |= htole32(IWN_RXON_SHPREAMBLE);
7298 if (IEEE80211_IS_CHAN_A(ni->ni_chan)) {
7299 sc->rxon->cck_mask = 0;
7300 sc->rxon->ofdm_mask = 0x15;
7301 } else if (IEEE80211_IS_CHAN_B(ni->ni_chan)) {
7302 sc->rxon->cck_mask = 0x03;
7303 sc->rxon->ofdm_mask = 0;
7305 /* Assume 802.11b/g. */
7306 sc->rxon->cck_mask = 0x03;
7307 sc->rxon->ofdm_mask = 0x15;
7311 sc->rxon->flags |= htole32(iwn_get_rxon_ht_flags(sc, ic->ic_curchan));
7313 DPRINTF(sc, IWN_DEBUG_STATE, "rxon chan %d flags %x cck %x ofdm %x\n",
7314 sc->rxon->chan, sc->rxon->flags, sc->rxon->cck_mask,
7315 sc->rxon->ofdm_mask);
7317 if ((error = iwn_send_rxon(sc, 0, 1)) != 0) {
7318 device_printf(sc->sc_dev, "%s: could not send RXON\n",
7323 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
7329 iwn_run(struct iwn_softc *sc, struct ieee80211vap *vap)
7331 struct iwn_ops *ops = &sc->ops;
7332 struct ieee80211com *ic = &sc->sc_ic;
7333 struct ieee80211_node *ni = vap->iv_bss;
7334 struct iwn_node_info node;
7337 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
7339 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX];
7340 if (ic->ic_opmode == IEEE80211_M_MONITOR) {
7341 /* Link LED blinks while monitoring. */
7342 iwn_set_led(sc, IWN_LED_LINK, 5, 5);
7345 if ((error = iwn_set_timing(sc, ni)) != 0) {
7346 device_printf(sc->sc_dev,
7347 "%s: could not set timing, error %d\n", __func__, error);
7351 /* Update adapter configuration. */
7352 IEEE80211_ADDR_COPY(sc->rxon->bssid, ni->ni_bssid);
7353 sc->rxon->associd = htole16(IEEE80211_AID(ni->ni_associd));
7354 sc->rxon->chan = ieee80211_chan2ieee(ic, ni->ni_chan);
7355 sc->rxon->flags = htole32(IWN_RXON_TSF | IWN_RXON_CTS_TO_SELF);
7356 if (IEEE80211_IS_CHAN_2GHZ(ni->ni_chan))
7357 sc->rxon->flags |= htole32(IWN_RXON_AUTO | IWN_RXON_24GHZ);
7358 if (ic->ic_flags & IEEE80211_F_SHSLOT)
7359 sc->rxon->flags |= htole32(IWN_RXON_SHSLOT);
7360 if (ic->ic_flags & IEEE80211_F_SHPREAMBLE)
7361 sc->rxon->flags |= htole32(IWN_RXON_SHPREAMBLE);
7362 if (IEEE80211_IS_CHAN_A(ni->ni_chan)) {
7363 sc->rxon->cck_mask = 0;
7364 sc->rxon->ofdm_mask = 0x15;
7365 } else if (IEEE80211_IS_CHAN_B(ni->ni_chan)) {
7366 sc->rxon->cck_mask = 0x03;
7367 sc->rxon->ofdm_mask = 0;
7369 /* Assume 802.11b/g. */
7370 sc->rxon->cck_mask = 0x0f;
7371 sc->rxon->ofdm_mask = 0x15;
7374 sc->rxon->flags |= htole32(iwn_get_rxon_ht_flags(sc, ni->ni_chan));
7375 sc->rxon->filter |= htole32(IWN_FILTER_BSS);
7376 DPRINTF(sc, IWN_DEBUG_STATE, "rxon chan %d flags %x, curhtprotmode=%d\n",
7377 sc->rxon->chan, le32toh(sc->rxon->flags), ic->ic_curhtprotmode);
7379 if ((error = iwn_send_rxon(sc, 0, 1)) != 0) {
7380 device_printf(sc->sc_dev, "%s: could not send RXON\n",
7385 /* Fake a join to initialize the TX rate. */
7386 ((struct iwn_node *)ni)->id = IWN_ID_BSS;
7387 iwn_newassoc(ni, 1);
7390 memset(&node, 0, sizeof node);
7391 IEEE80211_ADDR_COPY(node.macaddr, ni->ni_macaddr);
7392 node.id = IWN_ID_BSS;
7393 if (IEEE80211_IS_CHAN_HT(ni->ni_chan)) {
7394 switch (ni->ni_htcap & IEEE80211_HTCAP_SMPS) {
7395 case IEEE80211_HTCAP_SMPS_ENA:
7396 node.htflags |= htole32(IWN_SMPS_MIMO_DIS);
7398 case IEEE80211_HTCAP_SMPS_DYNAMIC:
7399 node.htflags |= htole32(IWN_SMPS_MIMO_PROT);
7402 node.htflags |= htole32(IWN_AMDPU_SIZE_FACTOR(3) |
7403 IWN_AMDPU_DENSITY(5)); /* 4us */
7404 if (IEEE80211_IS_CHAN_HT40(ni->ni_chan))
7405 node.htflags |= htole32(IWN_NODE_HT40);
7407 DPRINTF(sc, IWN_DEBUG_STATE, "%s: adding BSS node\n", __func__);
7408 error = ops->add_node(sc, &node, 1);
7410 device_printf(sc->sc_dev,
7411 "%s: could not add BSS node, error %d\n", __func__, error);
7414 DPRINTF(sc, IWN_DEBUG_STATE, "%s: setting link quality for node %d\n",
7416 if ((error = iwn_set_link_quality(sc, ni)) != 0) {
7417 device_printf(sc->sc_dev,
7418 "%s: could not setup link quality for node %d, error %d\n",
7419 __func__, node.id, error);
7423 if ((error = iwn_init_sensitivity(sc)) != 0) {
7424 device_printf(sc->sc_dev,
7425 "%s: could not set sensitivity, error %d\n", __func__,
7429 /* Start periodic calibration timer. */
7430 sc->calib.state = IWN_CALIB_STATE_ASSOC;
7432 callout_reset(&sc->calib_to, msecs_to_ticks(500), iwn_calib_timeout,
7435 /* Link LED always on while associated. */
7436 iwn_set_led(sc, IWN_LED_LINK, 0, 1);
7438 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
7444 * This function is called by upper layer when an ADDBA request is received
7445 * from another STA and before the ADDBA response is sent.
7448 iwn_ampdu_rx_start(struct ieee80211_node *ni, struct ieee80211_rx_ampdu *rap,
7449 int baparamset, int batimeout, int baseqctl)
7451 #define MS(_v, _f) (((_v) & _f) >> _f##_S)
7452 struct iwn_softc *sc = ni->ni_ic->ic_softc;
7453 struct iwn_ops *ops = &sc->ops;
7454 struct iwn_node *wn = (void *)ni;
7455 struct iwn_node_info node;
7460 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7462 tid = MS(le16toh(baparamset), IEEE80211_BAPS_TID);
7463 ssn = MS(le16toh(baseqctl), IEEE80211_BASEQ_START);
7465 if (wn->id == IWN_ID_UNDEFINED)
7468 memset(&node, 0, sizeof node);
7470 node.control = IWN_NODE_UPDATE;
7471 node.flags = IWN_FLAG_SET_ADDBA;
7472 node.addba_tid = tid;
7473 node.addba_ssn = htole16(ssn);
7474 DPRINTF(sc, IWN_DEBUG_RECV, "ADDBA RA=%d TID=%d SSN=%d\n",
7476 error = ops->add_node(sc, &node, 1);
7479 return sc->sc_ampdu_rx_start(ni, rap, baparamset, batimeout, baseqctl);
7484 * This function is called by upper layer on teardown of an HT-immediate
7485 * Block Ack agreement (eg. uppon receipt of a DELBA frame).
7488 iwn_ampdu_rx_stop(struct ieee80211_node *ni, struct ieee80211_rx_ampdu *rap)
7490 struct ieee80211com *ic = ni->ni_ic;
7491 struct iwn_softc *sc = ic->ic_softc;
7492 struct iwn_ops *ops = &sc->ops;
7493 struct iwn_node *wn = (void *)ni;
7494 struct iwn_node_info node;
7497 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7499 if (wn->id == IWN_ID_UNDEFINED)
7502 /* XXX: tid as an argument */
7503 for (tid = 0; tid < WME_NUM_TID; tid++) {
7504 if (&ni->ni_rx_ampdu[tid] == rap)
7508 memset(&node, 0, sizeof node);
7510 node.control = IWN_NODE_UPDATE;
7511 node.flags = IWN_FLAG_SET_DELBA;
7512 node.delba_tid = tid;
7513 DPRINTF(sc, IWN_DEBUG_RECV, "DELBA RA=%d TID=%d\n", wn->id, tid);
7514 (void)ops->add_node(sc, &node, 1);
7516 sc->sc_ampdu_rx_stop(ni, rap);
7520 iwn_addba_request(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap,
7521 int dialogtoken, int baparamset, int batimeout)
7523 struct iwn_softc *sc = ni->ni_ic->ic_softc;
7526 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7528 for (qid = sc->firstaggqueue; qid < sc->ntxqs; qid++) {
7529 if (sc->qid2tap[qid] == NULL)
7532 if (qid == sc->ntxqs) {
7533 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: not free aggregation queue\n",
7537 tap->txa_private = malloc(sizeof(int), M_DEVBUF, M_NOWAIT);
7538 if (tap->txa_private == NULL) {
7539 device_printf(sc->sc_dev,
7540 "%s: failed to alloc TX aggregation structure\n", __func__);
7543 sc->qid2tap[qid] = tap;
7544 *(int *)tap->txa_private = qid;
7545 return sc->sc_addba_request(ni, tap, dialogtoken, baparamset,
7550 iwn_addba_response(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap,
7551 int code, int baparamset, int batimeout)
7553 struct iwn_softc *sc = ni->ni_ic->ic_softc;
7554 int qid = *(int *)tap->txa_private;
7555 uint8_t tid = tap->txa_tid;
7558 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7560 if (code == IEEE80211_STATUS_SUCCESS) {
7561 ni->ni_txseqs[tid] = tap->txa_start & 0xfff;
7562 ret = iwn_ampdu_tx_start(ni->ni_ic, ni, tid);
7566 sc->qid2tap[qid] = NULL;
7567 free(tap->txa_private, M_DEVBUF);
7568 tap->txa_private = NULL;
7570 return sc->sc_addba_response(ni, tap, code, baparamset, batimeout);
7574 * This function is called by upper layer when an ADDBA response is received
7578 iwn_ampdu_tx_start(struct ieee80211com *ic, struct ieee80211_node *ni,
7581 struct ieee80211_tx_ampdu *tap = &ni->ni_tx_ampdu[tid];
7582 struct iwn_softc *sc = ni->ni_ic->ic_softc;
7583 struct iwn_ops *ops = &sc->ops;
7584 struct iwn_node *wn = (void *)ni;
7585 struct iwn_node_info node;
7588 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7590 if (wn->id == IWN_ID_UNDEFINED)
7593 /* Enable TX for the specified RA/TID. */
7594 wn->disable_tid &= ~(1 << tid);
7595 memset(&node, 0, sizeof node);
7597 node.control = IWN_NODE_UPDATE;
7598 node.flags = IWN_FLAG_SET_DISABLE_TID;
7599 node.disable_tid = htole16(wn->disable_tid);
7600 error = ops->add_node(sc, &node, 1);
7604 if ((error = iwn_nic_lock(sc)) != 0)
7606 qid = *(int *)tap->txa_private;
7607 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: ra=%d tid=%d ssn=%d qid=%d\n",
7608 __func__, wn->id, tid, tap->txa_start, qid);
7609 ops->ampdu_tx_start(sc, ni, qid, tid, tap->txa_start & 0xfff);
7612 iwn_set_link_quality(sc, ni);
7617 iwn_ampdu_tx_stop(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap)
7619 struct iwn_softc *sc = ni->ni_ic->ic_softc;
7620 struct iwn_ops *ops = &sc->ops;
7621 uint8_t tid = tap->txa_tid;
7624 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7626 sc->sc_addba_stop(ni, tap);
7628 if (tap->txa_private == NULL)
7631 qid = *(int *)tap->txa_private;
7632 if (sc->txq[qid].queued != 0)
7634 if (iwn_nic_lock(sc) != 0)
7636 ops->ampdu_tx_stop(sc, qid, tid, tap->txa_start & 0xfff);
7638 sc->qid2tap[qid] = NULL;
7639 free(tap->txa_private, M_DEVBUF);
7640 tap->txa_private = NULL;
7644 iwn4965_ampdu_tx_start(struct iwn_softc *sc, struct ieee80211_node *ni,
7645 int qid, uint8_t tid, uint16_t ssn)
7647 struct iwn_node *wn = (void *)ni;
7649 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7651 /* Stop TX scheduler while we're changing its configuration. */
7652 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid),
7653 IWN4965_TXQ_STATUS_CHGACT);
7655 /* Assign RA/TID translation to the queue. */
7656 iwn_mem_write_2(sc, sc->sched_base + IWN4965_SCHED_TRANS_TBL(qid),
7659 /* Enable chain-building mode for the queue. */
7660 iwn_prph_setbits(sc, IWN4965_SCHED_QCHAIN_SEL, 1 << qid);
7662 /* Set starting sequence number from the ADDBA request. */
7663 sc->txq[qid].cur = sc->txq[qid].read = (ssn & 0xff);
7664 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | (ssn & 0xff));
7665 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_RDPTR(qid), ssn);
7667 /* Set scheduler window size. */
7668 iwn_mem_write(sc, sc->sched_base + IWN4965_SCHED_QUEUE_OFFSET(qid),
7670 /* Set scheduler frame limit. */
7671 iwn_mem_write(sc, sc->sched_base + IWN4965_SCHED_QUEUE_OFFSET(qid) + 4,
7672 IWN_SCHED_LIMIT << 16);
7674 /* Enable interrupts for the queue. */
7675 iwn_prph_setbits(sc, IWN4965_SCHED_INTR_MASK, 1 << qid);
7677 /* Mark the queue as active. */
7678 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid),
7679 IWN4965_TXQ_STATUS_ACTIVE | IWN4965_TXQ_STATUS_AGGR_ENA |
7680 iwn_tid2fifo[tid] << 1);
7684 iwn4965_ampdu_tx_stop(struct iwn_softc *sc, int qid, uint8_t tid, uint16_t ssn)
7686 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7688 /* Stop TX scheduler while we're changing its configuration. */
7689 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid),
7690 IWN4965_TXQ_STATUS_CHGACT);
7692 /* Set starting sequence number from the ADDBA request. */
7693 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | (ssn & 0xff));
7694 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_RDPTR(qid), ssn);
7696 /* Disable interrupts for the queue. */
7697 iwn_prph_clrbits(sc, IWN4965_SCHED_INTR_MASK, 1 << qid);
7699 /* Mark the queue as inactive. */
7700 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid),
7701 IWN4965_TXQ_STATUS_INACTIVE | iwn_tid2fifo[tid] << 1);
7705 iwn5000_ampdu_tx_start(struct iwn_softc *sc, struct ieee80211_node *ni,
7706 int qid, uint8_t tid, uint16_t ssn)
7708 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7710 struct iwn_node *wn = (void *)ni;
7712 /* Stop TX scheduler while we're changing its configuration. */
7713 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
7714 IWN5000_TXQ_STATUS_CHGACT);
7716 /* Assign RA/TID translation to the queue. */
7717 iwn_mem_write_2(sc, sc->sched_base + IWN5000_SCHED_TRANS_TBL(qid),
7720 /* Enable chain-building mode for the queue. */
7721 iwn_prph_setbits(sc, IWN5000_SCHED_QCHAIN_SEL, 1 << qid);
7723 /* Enable aggregation for the queue. */
7724 iwn_prph_setbits(sc, IWN5000_SCHED_AGGR_SEL, 1 << qid);
7726 /* Set starting sequence number from the ADDBA request. */
7727 sc->txq[qid].cur = sc->txq[qid].read = (ssn & 0xff);
7728 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | (ssn & 0xff));
7729 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_RDPTR(qid), ssn);
7731 /* Set scheduler window size and frame limit. */
7732 iwn_mem_write(sc, sc->sched_base + IWN5000_SCHED_QUEUE_OFFSET(qid) + 4,
7733 IWN_SCHED_LIMIT << 16 | IWN_SCHED_WINSZ);
7735 /* Enable interrupts for the queue. */
7736 iwn_prph_setbits(sc, IWN5000_SCHED_INTR_MASK, 1 << qid);
7738 /* Mark the queue as active. */
7739 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
7740 IWN5000_TXQ_STATUS_ACTIVE | iwn_tid2fifo[tid]);
7744 iwn5000_ampdu_tx_stop(struct iwn_softc *sc, int qid, uint8_t tid, uint16_t ssn)
7746 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7748 /* Stop TX scheduler while we're changing its configuration. */
7749 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
7750 IWN5000_TXQ_STATUS_CHGACT);
7752 /* Disable aggregation for the queue. */
7753 iwn_prph_clrbits(sc, IWN5000_SCHED_AGGR_SEL, 1 << qid);
7755 /* Set starting sequence number from the ADDBA request. */
7756 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | (ssn & 0xff));
7757 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_RDPTR(qid), ssn);
7759 /* Disable interrupts for the queue. */
7760 iwn_prph_clrbits(sc, IWN5000_SCHED_INTR_MASK, 1 << qid);
7762 /* Mark the queue as inactive. */
7763 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
7764 IWN5000_TXQ_STATUS_INACTIVE | iwn_tid2fifo[tid]);
7768 * Query calibration tables from the initialization firmware. We do this
7769 * only once at first boot. Called from a process context.
7772 iwn5000_query_calibration(struct iwn_softc *sc)
7774 struct iwn5000_calib_config cmd;
7777 memset(&cmd, 0, sizeof cmd);
7778 cmd.ucode.once.enable = htole32(0xffffffff);
7779 cmd.ucode.once.start = htole32(0xffffffff);
7780 cmd.ucode.once.send = htole32(0xffffffff);
7781 cmd.ucode.flags = htole32(0xffffffff);
7782 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: sending calibration query\n",
7784 error = iwn_cmd(sc, IWN5000_CMD_CALIB_CONFIG, &cmd, sizeof cmd, 0);
7788 /* Wait at most two seconds for calibration to complete. */
7789 if (!(sc->sc_flags & IWN_FLAG_CALIB_DONE))
7790 error = msleep(sc, &sc->sc_mtx, PCATCH, "iwncal", 2 * hz);
7795 * Send calibration results to the runtime firmware. These results were
7796 * obtained on first boot from the initialization firmware.
7799 iwn5000_send_calibration(struct iwn_softc *sc)
7803 for (idx = 0; idx < IWN5000_PHY_CALIB_MAX_RESULT; idx++) {
7804 if (!(sc->base_params->calib_need & (1<<idx))) {
7805 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
7806 "No need of calib %d\n",
7808 continue; /* no need for this calib */
7810 if (sc->calibcmd[idx].buf == NULL) {
7811 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
7812 "Need calib idx : %d but no available data\n",
7817 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
7818 "send calibration result idx=%d len=%d\n", idx,
7819 sc->calibcmd[idx].len);
7820 error = iwn_cmd(sc, IWN_CMD_PHY_CALIB, sc->calibcmd[idx].buf,
7821 sc->calibcmd[idx].len, 0);
7823 device_printf(sc->sc_dev,
7824 "%s: could not send calibration result, error %d\n",
7833 iwn5000_send_wimax_coex(struct iwn_softc *sc)
7835 struct iwn5000_wimax_coex wimax;
7838 if (sc->hw_type == IWN_HW_REV_TYPE_6050) {
7839 /* Enable WiMAX coexistence for combo adapters. */
7841 IWN_WIMAX_COEX_ASSOC_WA_UNMASK |
7842 IWN_WIMAX_COEX_UNASSOC_WA_UNMASK |
7843 IWN_WIMAX_COEX_STA_TABLE_VALID |
7844 IWN_WIMAX_COEX_ENABLE;
7845 memcpy(wimax.events, iwn6050_wimax_events,
7846 sizeof iwn6050_wimax_events);
7850 /* Disable WiMAX coexistence. */
7852 memset(wimax.events, 0, sizeof wimax.events);
7854 DPRINTF(sc, IWN_DEBUG_RESET, "%s: Configuring WiMAX coexistence\n",
7856 return iwn_cmd(sc, IWN5000_CMD_WIMAX_COEX, &wimax, sizeof wimax, 0);
7860 iwn5000_crystal_calib(struct iwn_softc *sc)
7862 struct iwn5000_phy_calib_crystal cmd;
7864 memset(&cmd, 0, sizeof cmd);
7865 cmd.code = IWN5000_PHY_CALIB_CRYSTAL;
7868 cmd.cap_pin[0] = le32toh(sc->eeprom_crystal) & 0xff;
7869 cmd.cap_pin[1] = (le32toh(sc->eeprom_crystal) >> 16) & 0xff;
7870 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "sending crystal calibration %d, %d\n",
7871 cmd.cap_pin[0], cmd.cap_pin[1]);
7872 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 0);
7876 iwn5000_temp_offset_calib(struct iwn_softc *sc)
7878 struct iwn5000_phy_calib_temp_offset cmd;
7880 memset(&cmd, 0, sizeof cmd);
7881 cmd.code = IWN5000_PHY_CALIB_TEMP_OFFSET;
7884 if (sc->eeprom_temp != 0)
7885 cmd.offset = htole16(sc->eeprom_temp);
7887 cmd.offset = htole16(IWN_DEFAULT_TEMP_OFFSET);
7888 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "setting radio sensor offset to %d\n",
7889 le16toh(cmd.offset));
7890 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 0);
7894 iwn5000_temp_offset_calibv2(struct iwn_softc *sc)
7896 struct iwn5000_phy_calib_temp_offsetv2 cmd;
7898 memset(&cmd, 0, sizeof cmd);
7899 cmd.code = IWN5000_PHY_CALIB_TEMP_OFFSET;
7902 if (sc->eeprom_temp != 0) {
7903 cmd.offset_low = htole16(sc->eeprom_temp);
7904 cmd.offset_high = htole16(sc->eeprom_temp_high);
7906 cmd.offset_low = htole16(IWN_DEFAULT_TEMP_OFFSET);
7907 cmd.offset_high = htole16(IWN_DEFAULT_TEMP_OFFSET);
7909 cmd.burnt_voltage_ref = htole16(sc->eeprom_voltage);
7911 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
7912 "setting radio sensor low offset to %d, high offset to %d, voltage to %d\n",
7913 le16toh(cmd.offset_low),
7914 le16toh(cmd.offset_high),
7915 le16toh(cmd.burnt_voltage_ref));
7917 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 0);
7921 * This function is called after the runtime firmware notifies us of its
7922 * readiness (called in a process context).
7925 iwn4965_post_alive(struct iwn_softc *sc)
7929 if ((error = iwn_nic_lock(sc)) != 0)
7932 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7934 /* Clear TX scheduler state in SRAM. */
7935 sc->sched_base = iwn_prph_read(sc, IWN_SCHED_SRAM_ADDR);
7936 iwn_mem_set_region_4(sc, sc->sched_base + IWN4965_SCHED_CTX_OFF, 0,
7937 IWN4965_SCHED_CTX_LEN / sizeof (uint32_t));
7939 /* Set physical address of TX scheduler rings (1KB aligned). */
7940 iwn_prph_write(sc, IWN4965_SCHED_DRAM_ADDR, sc->sched_dma.paddr >> 10);
7942 IWN_SETBITS(sc, IWN_FH_TX_CHICKEN, IWN_FH_TX_CHICKEN_SCHED_RETRY);
7944 /* Disable chain mode for all our 16 queues. */
7945 iwn_prph_write(sc, IWN4965_SCHED_QCHAIN_SEL, 0);
7947 for (qid = 0; qid < IWN4965_NTXQUEUES; qid++) {
7948 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_RDPTR(qid), 0);
7949 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | 0);
7951 /* Set scheduler window size. */
7952 iwn_mem_write(sc, sc->sched_base +
7953 IWN4965_SCHED_QUEUE_OFFSET(qid), IWN_SCHED_WINSZ);
7954 /* Set scheduler frame limit. */
7955 iwn_mem_write(sc, sc->sched_base +
7956 IWN4965_SCHED_QUEUE_OFFSET(qid) + 4,
7957 IWN_SCHED_LIMIT << 16);
7960 /* Enable interrupts for all our 16 queues. */
7961 iwn_prph_write(sc, IWN4965_SCHED_INTR_MASK, 0xffff);
7962 /* Identify TX FIFO rings (0-7). */
7963 iwn_prph_write(sc, IWN4965_SCHED_TXFACT, 0xff);
7965 /* Mark TX rings (4 EDCA + cmd + 2 HCCA) as active. */
7966 for (qid = 0; qid < 7; qid++) {
7967 static uint8_t qid2fifo[] = { 3, 2, 1, 0, 4, 5, 6 };
7968 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid),
7969 IWN4965_TXQ_STATUS_ACTIVE | qid2fifo[qid] << 1);
7976 * This function is called after the initialization or runtime firmware
7977 * notifies us of its readiness (called in a process context).
7980 iwn5000_post_alive(struct iwn_softc *sc)
7984 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
7986 /* Switch to using ICT interrupt mode. */
7987 iwn5000_ict_reset(sc);
7989 if ((error = iwn_nic_lock(sc)) != 0){
7990 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end in error\n", __func__);
7994 /* Clear TX scheduler state in SRAM. */
7995 sc->sched_base = iwn_prph_read(sc, IWN_SCHED_SRAM_ADDR);
7996 iwn_mem_set_region_4(sc, sc->sched_base + IWN5000_SCHED_CTX_OFF, 0,
7997 IWN5000_SCHED_CTX_LEN / sizeof (uint32_t));
7999 /* Set physical address of TX scheduler rings (1KB aligned). */
8000 iwn_prph_write(sc, IWN5000_SCHED_DRAM_ADDR, sc->sched_dma.paddr >> 10);
8002 IWN_SETBITS(sc, IWN_FH_TX_CHICKEN, IWN_FH_TX_CHICKEN_SCHED_RETRY);
8004 /* Enable chain mode for all queues, except command queue. */
8005 if (sc->sc_flags & IWN_FLAG_PAN_SUPPORT)
8006 iwn_prph_write(sc, IWN5000_SCHED_QCHAIN_SEL, 0xfffdf);
8008 iwn_prph_write(sc, IWN5000_SCHED_QCHAIN_SEL, 0xfffef);
8009 iwn_prph_write(sc, IWN5000_SCHED_AGGR_SEL, 0);
8011 for (qid = 0; qid < IWN5000_NTXQUEUES; qid++) {
8012 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_RDPTR(qid), 0);
8013 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | 0);
8015 iwn_mem_write(sc, sc->sched_base +
8016 IWN5000_SCHED_QUEUE_OFFSET(qid), 0);
8017 /* Set scheduler window size and frame limit. */
8018 iwn_mem_write(sc, sc->sched_base +
8019 IWN5000_SCHED_QUEUE_OFFSET(qid) + 4,
8020 IWN_SCHED_LIMIT << 16 | IWN_SCHED_WINSZ);
8023 /* Enable interrupts for all our 20 queues. */
8024 iwn_prph_write(sc, IWN5000_SCHED_INTR_MASK, 0xfffff);
8025 /* Identify TX FIFO rings (0-7). */
8026 iwn_prph_write(sc, IWN5000_SCHED_TXFACT, 0xff);
8028 /* Mark TX rings (4 EDCA + cmd + 2 HCCA) as active. */
8029 if (sc->sc_flags & IWN_FLAG_PAN_SUPPORT) {
8030 /* Mark TX rings as active. */
8031 for (qid = 0; qid < 11; qid++) {
8032 static uint8_t qid2fifo[] = { 3, 2, 1, 0, 0, 4, 2, 5, 4, 7, 5 };
8033 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
8034 IWN5000_TXQ_STATUS_ACTIVE | qid2fifo[qid]);
8037 /* Mark TX rings (4 EDCA + cmd + 2 HCCA) as active. */
8038 for (qid = 0; qid < 7; qid++) {
8039 static uint8_t qid2fifo[] = { 3, 2, 1, 0, 7, 5, 6 };
8040 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
8041 IWN5000_TXQ_STATUS_ACTIVE | qid2fifo[qid]);
8046 /* Configure WiMAX coexistence for combo adapters. */
8047 error = iwn5000_send_wimax_coex(sc);
8049 device_printf(sc->sc_dev,
8050 "%s: could not configure WiMAX coexistence, error %d\n",
8054 if (sc->hw_type != IWN_HW_REV_TYPE_5150) {
8055 /* Perform crystal calibration. */
8056 error = iwn5000_crystal_calib(sc);
8058 device_printf(sc->sc_dev,
8059 "%s: crystal calibration failed, error %d\n",
8064 if (!(sc->sc_flags & IWN_FLAG_CALIB_DONE)) {
8065 /* Query calibration from the initialization firmware. */
8066 if ((error = iwn5000_query_calibration(sc)) != 0) {
8067 device_printf(sc->sc_dev,
8068 "%s: could not query calibration, error %d\n",
8073 * We have the calibration results now, reboot with the
8074 * runtime firmware (call ourselves recursively!)
8077 error = iwn_hw_init(sc);
8079 /* Send calibration results to runtime firmware. */
8080 error = iwn5000_send_calibration(sc);
8083 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
8089 * The firmware boot code is small and is intended to be copied directly into
8090 * the NIC internal memory (no DMA transfer).
8093 iwn4965_load_bootcode(struct iwn_softc *sc, const uint8_t *ucode, int size)
8097 size /= sizeof (uint32_t);
8099 if ((error = iwn_nic_lock(sc)) != 0)
8102 /* Copy microcode image into NIC memory. */
8103 iwn_prph_write_region_4(sc, IWN_BSM_SRAM_BASE,
8104 (const uint32_t *)ucode, size);
8106 iwn_prph_write(sc, IWN_BSM_WR_MEM_SRC, 0);
8107 iwn_prph_write(sc, IWN_BSM_WR_MEM_DST, IWN_FW_TEXT_BASE);
8108 iwn_prph_write(sc, IWN_BSM_WR_DWCOUNT, size);
8110 /* Start boot load now. */
8111 iwn_prph_write(sc, IWN_BSM_WR_CTRL, IWN_BSM_WR_CTRL_START);
8113 /* Wait for transfer to complete. */
8114 for (ntries = 0; ntries < 1000; ntries++) {
8115 if (!(iwn_prph_read(sc, IWN_BSM_WR_CTRL) &
8116 IWN_BSM_WR_CTRL_START))
8120 if (ntries == 1000) {
8121 device_printf(sc->sc_dev, "%s: could not load boot firmware\n",
8127 /* Enable boot after power up. */
8128 iwn_prph_write(sc, IWN_BSM_WR_CTRL, IWN_BSM_WR_CTRL_START_EN);
8135 iwn4965_load_firmware(struct iwn_softc *sc)
8137 struct iwn_fw_info *fw = &sc->fw;
8138 struct iwn_dma_info *dma = &sc->fw_dma;
8141 /* Copy initialization sections into pre-allocated DMA-safe memory. */
8142 memcpy(dma->vaddr, fw->init.data, fw->init.datasz);
8143 bus_dmamap_sync(dma->tag, dma->map, BUS_DMASYNC_PREWRITE);
8144 memcpy(dma->vaddr + IWN4965_FW_DATA_MAXSZ,
8145 fw->init.text, fw->init.textsz);
8146 bus_dmamap_sync(dma->tag, dma->map, BUS_DMASYNC_PREWRITE);
8148 /* Tell adapter where to find initialization sections. */
8149 if ((error = iwn_nic_lock(sc)) != 0)
8151 iwn_prph_write(sc, IWN_BSM_DRAM_DATA_ADDR, dma->paddr >> 4);
8152 iwn_prph_write(sc, IWN_BSM_DRAM_DATA_SIZE, fw->init.datasz);
8153 iwn_prph_write(sc, IWN_BSM_DRAM_TEXT_ADDR,
8154 (dma->paddr + IWN4965_FW_DATA_MAXSZ) >> 4);
8155 iwn_prph_write(sc, IWN_BSM_DRAM_TEXT_SIZE, fw->init.textsz);
8158 /* Load firmware boot code. */
8159 error = iwn4965_load_bootcode(sc, fw->boot.text, fw->boot.textsz);
8161 device_printf(sc->sc_dev, "%s: could not load boot firmware\n",
8165 /* Now press "execute". */
8166 IWN_WRITE(sc, IWN_RESET, 0);
8168 /* Wait at most one second for first alive notification. */
8169 if ((error = msleep(sc, &sc->sc_mtx, PCATCH, "iwninit", hz)) != 0) {
8170 device_printf(sc->sc_dev,
8171 "%s: timeout waiting for adapter to initialize, error %d\n",
8176 /* Retrieve current temperature for initial TX power calibration. */
8177 sc->rawtemp = sc->ucode_info.temp[3].chan20MHz;
8178 sc->temp = iwn4965_get_temperature(sc);
8180 /* Copy runtime sections into pre-allocated DMA-safe memory. */
8181 memcpy(dma->vaddr, fw->main.data, fw->main.datasz);
8182 bus_dmamap_sync(dma->tag, dma->map, BUS_DMASYNC_PREWRITE);
8183 memcpy(dma->vaddr + IWN4965_FW_DATA_MAXSZ,
8184 fw->main.text, fw->main.textsz);
8185 bus_dmamap_sync(dma->tag, dma->map, BUS_DMASYNC_PREWRITE);
8187 /* Tell adapter where to find runtime sections. */
8188 if ((error = iwn_nic_lock(sc)) != 0)
8190 iwn_prph_write(sc, IWN_BSM_DRAM_DATA_ADDR, dma->paddr >> 4);
8191 iwn_prph_write(sc, IWN_BSM_DRAM_DATA_SIZE, fw->main.datasz);
8192 iwn_prph_write(sc, IWN_BSM_DRAM_TEXT_ADDR,
8193 (dma->paddr + IWN4965_FW_DATA_MAXSZ) >> 4);
8194 iwn_prph_write(sc, IWN_BSM_DRAM_TEXT_SIZE,
8195 IWN_FW_UPDATED | fw->main.textsz);
8202 iwn5000_load_firmware_section(struct iwn_softc *sc, uint32_t dst,
8203 const uint8_t *section, int size)
8205 struct iwn_dma_info *dma = &sc->fw_dma;
8208 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8210 /* Copy firmware section into pre-allocated DMA-safe memory. */
8211 memcpy(dma->vaddr, section, size);
8212 bus_dmamap_sync(dma->tag, dma->map, BUS_DMASYNC_PREWRITE);
8214 if ((error = iwn_nic_lock(sc)) != 0)
8217 IWN_WRITE(sc, IWN_FH_TX_CONFIG(IWN_SRVC_DMACHNL),
8218 IWN_FH_TX_CONFIG_DMA_PAUSE);
8220 IWN_WRITE(sc, IWN_FH_SRAM_ADDR(IWN_SRVC_DMACHNL), dst);
8221 IWN_WRITE(sc, IWN_FH_TFBD_CTRL0(IWN_SRVC_DMACHNL),
8222 IWN_LOADDR(dma->paddr));
8223 IWN_WRITE(sc, IWN_FH_TFBD_CTRL1(IWN_SRVC_DMACHNL),
8224 IWN_HIADDR(dma->paddr) << 28 | size);
8225 IWN_WRITE(sc, IWN_FH_TXBUF_STATUS(IWN_SRVC_DMACHNL),
8226 IWN_FH_TXBUF_STATUS_TBNUM(1) |
8227 IWN_FH_TXBUF_STATUS_TBIDX(1) |
8228 IWN_FH_TXBUF_STATUS_TFBD_VALID);
8230 /* Kick Flow Handler to start DMA transfer. */
8231 IWN_WRITE(sc, IWN_FH_TX_CONFIG(IWN_SRVC_DMACHNL),
8232 IWN_FH_TX_CONFIG_DMA_ENA | IWN_FH_TX_CONFIG_CIRQ_HOST_ENDTFD);
8236 /* Wait at most five seconds for FH DMA transfer to complete. */
8237 return msleep(sc, &sc->sc_mtx, PCATCH, "iwninit", 5 * hz);
8241 iwn5000_load_firmware(struct iwn_softc *sc)
8243 struct iwn_fw_part *fw;
8246 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8248 /* Load the initialization firmware on first boot only. */
8249 fw = (sc->sc_flags & IWN_FLAG_CALIB_DONE) ?
8250 &sc->fw.main : &sc->fw.init;
8252 error = iwn5000_load_firmware_section(sc, IWN_FW_TEXT_BASE,
8253 fw->text, fw->textsz);
8255 device_printf(sc->sc_dev,
8256 "%s: could not load firmware %s section, error %d\n",
8257 __func__, ".text", error);
8260 error = iwn5000_load_firmware_section(sc, IWN_FW_DATA_BASE,
8261 fw->data, fw->datasz);
8263 device_printf(sc->sc_dev,
8264 "%s: could not load firmware %s section, error %d\n",
8265 __func__, ".data", error);
8269 /* Now press "execute". */
8270 IWN_WRITE(sc, IWN_RESET, 0);
8275 * Extract text and data sections from a legacy firmware image.
8278 iwn_read_firmware_leg(struct iwn_softc *sc, struct iwn_fw_info *fw)
8280 const uint32_t *ptr;
8284 ptr = (const uint32_t *)fw->data;
8285 rev = le32toh(*ptr++);
8287 sc->ucode_rev = rev;
8289 /* Check firmware API version. */
8290 if (IWN_FW_API(rev) <= 1) {
8291 device_printf(sc->sc_dev,
8292 "%s: bad firmware, need API version >=2\n", __func__);
8295 if (IWN_FW_API(rev) >= 3) {
8296 /* Skip build number (version 2 header). */
8300 if (fw->size < hdrlen) {
8301 device_printf(sc->sc_dev, "%s: firmware too short: %zu bytes\n",
8302 __func__, fw->size);
8305 fw->main.textsz = le32toh(*ptr++);
8306 fw->main.datasz = le32toh(*ptr++);
8307 fw->init.textsz = le32toh(*ptr++);
8308 fw->init.datasz = le32toh(*ptr++);
8309 fw->boot.textsz = le32toh(*ptr++);
8311 /* Check that all firmware sections fit. */
8312 if (fw->size < hdrlen + fw->main.textsz + fw->main.datasz +
8313 fw->init.textsz + fw->init.datasz + fw->boot.textsz) {
8314 device_printf(sc->sc_dev, "%s: firmware too short: %zu bytes\n",
8315 __func__, fw->size);
8319 /* Get pointers to firmware sections. */
8320 fw->main.text = (const uint8_t *)ptr;
8321 fw->main.data = fw->main.text + fw->main.textsz;
8322 fw->init.text = fw->main.data + fw->main.datasz;
8323 fw->init.data = fw->init.text + fw->init.textsz;
8324 fw->boot.text = fw->init.data + fw->init.datasz;
8329 * Extract text and data sections from a TLV firmware image.
8332 iwn_read_firmware_tlv(struct iwn_softc *sc, struct iwn_fw_info *fw,
8335 const struct iwn_fw_tlv_hdr *hdr;
8336 const struct iwn_fw_tlv *tlv;
8337 const uint8_t *ptr, *end;
8341 if (fw->size < sizeof (*hdr)) {
8342 device_printf(sc->sc_dev, "%s: firmware too short: %zu bytes\n",
8343 __func__, fw->size);
8346 hdr = (const struct iwn_fw_tlv_hdr *)fw->data;
8347 if (hdr->signature != htole32(IWN_FW_SIGNATURE)) {
8348 device_printf(sc->sc_dev, "%s: bad firmware signature 0x%08x\n",
8349 __func__, le32toh(hdr->signature));
8352 DPRINTF(sc, IWN_DEBUG_RESET, "FW: \"%.64s\", build 0x%x\n", hdr->descr,
8353 le32toh(hdr->build));
8354 sc->ucode_rev = le32toh(hdr->rev);
8357 * Select the closest supported alternative that is less than
8358 * or equal to the specified one.
8360 altmask = le64toh(hdr->altmask);
8361 while (alt > 0 && !(altmask & (1ULL << alt)))
8362 alt--; /* Downgrade. */
8363 DPRINTF(sc, IWN_DEBUG_RESET, "using alternative %d\n", alt);
8365 ptr = (const uint8_t *)(hdr + 1);
8366 end = (const uint8_t *)(fw->data + fw->size);
8368 /* Parse type-length-value fields. */
8369 while (ptr + sizeof (*tlv) <= end) {
8370 tlv = (const struct iwn_fw_tlv *)ptr;
8371 len = le32toh(tlv->len);
8373 ptr += sizeof (*tlv);
8374 if (ptr + len > end) {
8375 device_printf(sc->sc_dev,
8376 "%s: firmware too short: %zu bytes\n", __func__,
8380 /* Skip other alternatives. */
8381 if (tlv->alt != 0 && tlv->alt != htole16(alt))
8384 switch (le16toh(tlv->type)) {
8385 case IWN_FW_TLV_MAIN_TEXT:
8386 fw->main.text = ptr;
8387 fw->main.textsz = len;
8389 case IWN_FW_TLV_MAIN_DATA:
8390 fw->main.data = ptr;
8391 fw->main.datasz = len;
8393 case IWN_FW_TLV_INIT_TEXT:
8394 fw->init.text = ptr;
8395 fw->init.textsz = len;
8397 case IWN_FW_TLV_INIT_DATA:
8398 fw->init.data = ptr;
8399 fw->init.datasz = len;
8401 case IWN_FW_TLV_BOOT_TEXT:
8402 fw->boot.text = ptr;
8403 fw->boot.textsz = len;
8405 case IWN_FW_TLV_ENH_SENS:
8407 sc->sc_flags |= IWN_FLAG_ENH_SENS;
8409 case IWN_FW_TLV_PHY_CALIB:
8410 tmp = le32toh(*ptr);
8412 sc->reset_noise_gain = tmp;
8413 sc->noise_gain = tmp + 1;
8416 case IWN_FW_TLV_PAN:
8417 sc->sc_flags |= IWN_FLAG_PAN_SUPPORT;
8418 DPRINTF(sc, IWN_DEBUG_RESET,
8419 "PAN Support found: %d\n", 1);
8421 case IWN_FW_TLV_FLAGS:
8422 if (len < sizeof(uint32_t))
8424 if (len % sizeof(uint32_t))
8426 sc->tlv_feature_flags = le32toh(*ptr);
8427 DPRINTF(sc, IWN_DEBUG_RESET,
8428 "%s: feature: 0x%08x\n",
8430 sc->tlv_feature_flags);
8432 case IWN_FW_TLV_PBREQ_MAXLEN:
8433 case IWN_FW_TLV_RUNT_EVTLOG_PTR:
8434 case IWN_FW_TLV_RUNT_EVTLOG_SIZE:
8435 case IWN_FW_TLV_RUNT_ERRLOG_PTR:
8436 case IWN_FW_TLV_INIT_EVTLOG_PTR:
8437 case IWN_FW_TLV_INIT_EVTLOG_SIZE:
8438 case IWN_FW_TLV_INIT_ERRLOG_PTR:
8439 case IWN_FW_TLV_WOWLAN_INST:
8440 case IWN_FW_TLV_WOWLAN_DATA:
8441 DPRINTF(sc, IWN_DEBUG_RESET,
8442 "TLV type %d recognized but not handled\n",
8443 le16toh(tlv->type));
8446 DPRINTF(sc, IWN_DEBUG_RESET,
8447 "TLV type %d not handled\n", le16toh(tlv->type));
8450 next: /* TLV fields are 32-bit aligned. */
8451 ptr += (len + 3) & ~3;
8457 iwn_read_firmware(struct iwn_softc *sc)
8459 struct iwn_fw_info *fw = &sc->fw;
8462 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8466 memset(fw, 0, sizeof (*fw));
8468 /* Read firmware image from filesystem. */
8469 sc->fw_fp = firmware_get(sc->fwname);
8470 if (sc->fw_fp == NULL) {
8471 device_printf(sc->sc_dev, "%s: could not read firmware %s\n",
8472 __func__, sc->fwname);
8478 fw->size = sc->fw_fp->datasize;
8479 fw->data = (const uint8_t *)sc->fw_fp->data;
8480 if (fw->size < sizeof (uint32_t)) {
8481 device_printf(sc->sc_dev, "%s: firmware too short: %zu bytes\n",
8482 __func__, fw->size);
8487 /* Retrieve text and data sections. */
8488 if (*(const uint32_t *)fw->data != 0) /* Legacy image. */
8489 error = iwn_read_firmware_leg(sc, fw);
8491 error = iwn_read_firmware_tlv(sc, fw, 1);
8493 device_printf(sc->sc_dev,
8494 "%s: could not read firmware sections, error %d\n",
8499 device_printf(sc->sc_dev, "%s: ucode rev=0x%08x\n", __func__, sc->ucode_rev);
8501 /* Make sure text and data sections fit in hardware memory. */
8502 if (fw->main.textsz > sc->fw_text_maxsz ||
8503 fw->main.datasz > sc->fw_data_maxsz ||
8504 fw->init.textsz > sc->fw_text_maxsz ||
8505 fw->init.datasz > sc->fw_data_maxsz ||
8506 fw->boot.textsz > IWN_FW_BOOT_TEXT_MAXSZ ||
8507 (fw->boot.textsz & 3) != 0) {
8508 device_printf(sc->sc_dev, "%s: firmware sections too large\n",
8514 /* We can proceed with loading the firmware. */
8517 fail: iwn_unload_firmware(sc);
8522 iwn_unload_firmware(struct iwn_softc *sc)
8524 firmware_put(sc->fw_fp, FIRMWARE_UNLOAD);
8529 iwn_clock_wait(struct iwn_softc *sc)
8533 /* Set "initialization complete" bit. */
8534 IWN_SETBITS(sc, IWN_GP_CNTRL, IWN_GP_CNTRL_INIT_DONE);
8536 /* Wait for clock stabilization. */
8537 for (ntries = 0; ntries < 2500; ntries++) {
8538 if (IWN_READ(sc, IWN_GP_CNTRL) & IWN_GP_CNTRL_MAC_CLOCK_READY)
8542 device_printf(sc->sc_dev,
8543 "%s: timeout waiting for clock stabilization\n", __func__);
8548 iwn_apm_init(struct iwn_softc *sc)
8553 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8555 /* Disable L0s exit timer (NMI bug workaround). */
8556 IWN_SETBITS(sc, IWN_GIO_CHICKEN, IWN_GIO_CHICKEN_DIS_L0S_TIMER);
8557 /* Don't wait for ICH L0s (ICH bug workaround). */
8558 IWN_SETBITS(sc, IWN_GIO_CHICKEN, IWN_GIO_CHICKEN_L1A_NO_L0S_RX);
8560 /* Set FH wait threshold to max (HW bug under stress workaround). */
8561 IWN_SETBITS(sc, IWN_DBG_HPET_MEM, 0xffff0000);
8563 /* Enable HAP INTA to move adapter from L1a to L0s. */
8564 IWN_SETBITS(sc, IWN_HW_IF_CONFIG, IWN_HW_IF_CONFIG_HAP_WAKE_L1A);
8566 /* Retrieve PCIe Active State Power Management (ASPM). */
8567 reg = pci_read_config(sc->sc_dev, sc->sc_cap_off + PCIER_LINK_CTL, 4);
8568 /* Workaround for HW instability in PCIe L0->L0s->L1 transition. */
8569 if (reg & PCIEM_LINK_CTL_ASPMC_L1) /* L1 Entry enabled. */
8570 IWN_SETBITS(sc, IWN_GIO, IWN_GIO_L0S_ENA);
8572 IWN_CLRBITS(sc, IWN_GIO, IWN_GIO_L0S_ENA);
8574 if (sc->base_params->pll_cfg_val)
8575 IWN_SETBITS(sc, IWN_ANA_PLL, sc->base_params->pll_cfg_val);
8577 /* Wait for clock stabilization before accessing prph. */
8578 if ((error = iwn_clock_wait(sc)) != 0)
8581 if ((error = iwn_nic_lock(sc)) != 0)
8583 if (sc->hw_type == IWN_HW_REV_TYPE_4965) {
8584 /* Enable DMA and BSM (Bootstrap State Machine). */
8585 iwn_prph_write(sc, IWN_APMG_CLK_EN,
8586 IWN_APMG_CLK_CTRL_DMA_CLK_RQT |
8587 IWN_APMG_CLK_CTRL_BSM_CLK_RQT);
8590 iwn_prph_write(sc, IWN_APMG_CLK_EN,
8591 IWN_APMG_CLK_CTRL_DMA_CLK_RQT);
8594 /* Disable L1-Active. */
8595 iwn_prph_setbits(sc, IWN_APMG_PCI_STT, IWN_APMG_PCI_STT_L1A_DIS);
8602 iwn_apm_stop_master(struct iwn_softc *sc)
8606 /* Stop busmaster DMA activity. */
8607 IWN_SETBITS(sc, IWN_RESET, IWN_RESET_STOP_MASTER);
8608 for (ntries = 0; ntries < 100; ntries++) {
8609 if (IWN_READ(sc, IWN_RESET) & IWN_RESET_MASTER_DISABLED)
8613 device_printf(sc->sc_dev, "%s: timeout waiting for master\n", __func__);
8617 iwn_apm_stop(struct iwn_softc *sc)
8619 iwn_apm_stop_master(sc);
8621 /* Reset the entire device. */
8622 IWN_SETBITS(sc, IWN_RESET, IWN_RESET_SW);
8624 /* Clear "initialization complete" bit. */
8625 IWN_CLRBITS(sc, IWN_GP_CNTRL, IWN_GP_CNTRL_INIT_DONE);
8629 iwn4965_nic_config(struct iwn_softc *sc)
8631 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8633 if (IWN_RFCFG_TYPE(sc->rfcfg) == 1) {
8635 * I don't believe this to be correct but this is what the
8636 * vendor driver is doing. Probably the bits should not be
8637 * shifted in IWN_RFCFG_*.
8639 IWN_SETBITS(sc, IWN_HW_IF_CONFIG,
8640 IWN_RFCFG_TYPE(sc->rfcfg) |
8641 IWN_RFCFG_STEP(sc->rfcfg) |
8642 IWN_RFCFG_DASH(sc->rfcfg));
8644 IWN_SETBITS(sc, IWN_HW_IF_CONFIG,
8645 IWN_HW_IF_CONFIG_RADIO_SI | IWN_HW_IF_CONFIG_MAC_SI);
8650 iwn5000_nic_config(struct iwn_softc *sc)
8655 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8657 if (IWN_RFCFG_TYPE(sc->rfcfg) < 3) {
8658 IWN_SETBITS(sc, IWN_HW_IF_CONFIG,
8659 IWN_RFCFG_TYPE(sc->rfcfg) |
8660 IWN_RFCFG_STEP(sc->rfcfg) |
8661 IWN_RFCFG_DASH(sc->rfcfg));
8663 IWN_SETBITS(sc, IWN_HW_IF_CONFIG,
8664 IWN_HW_IF_CONFIG_RADIO_SI | IWN_HW_IF_CONFIG_MAC_SI);
8666 if ((error = iwn_nic_lock(sc)) != 0)
8668 iwn_prph_setbits(sc, IWN_APMG_PS, IWN_APMG_PS_EARLY_PWROFF_DIS);
8670 if (sc->hw_type == IWN_HW_REV_TYPE_1000) {
8672 * Select first Switching Voltage Regulator (1.32V) to
8673 * solve a stability issue related to noisy DC2DC line
8674 * in the silicon of 1000 Series.
8676 tmp = iwn_prph_read(sc, IWN_APMG_DIGITAL_SVR);
8677 tmp &= ~IWN_APMG_DIGITAL_SVR_VOLTAGE_MASK;
8678 tmp |= IWN_APMG_DIGITAL_SVR_VOLTAGE_1_32;
8679 iwn_prph_write(sc, IWN_APMG_DIGITAL_SVR, tmp);
8683 if (sc->sc_flags & IWN_FLAG_INTERNAL_PA) {
8684 /* Use internal power amplifier only. */
8685 IWN_WRITE(sc, IWN_GP_DRIVER, IWN_GP_DRIVER_RADIO_2X2_IPA);
8687 if (sc->base_params->additional_nic_config && sc->calib_ver >= 6) {
8688 /* Indicate that ROM calibration version is >=6. */
8689 IWN_SETBITS(sc, IWN_GP_DRIVER, IWN_GP_DRIVER_CALIB_VER6);
8691 if (sc->base_params->additional_gp_drv_bit)
8692 IWN_SETBITS(sc, IWN_GP_DRIVER,
8693 sc->base_params->additional_gp_drv_bit);
8698 * Take NIC ownership over Intel Active Management Technology (AMT).
8701 iwn_hw_prepare(struct iwn_softc *sc)
8705 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8707 /* Check if hardware is ready. */
8708 IWN_SETBITS(sc, IWN_HW_IF_CONFIG, IWN_HW_IF_CONFIG_NIC_READY);
8709 for (ntries = 0; ntries < 5; ntries++) {
8710 if (IWN_READ(sc, IWN_HW_IF_CONFIG) &
8711 IWN_HW_IF_CONFIG_NIC_READY)
8716 /* Hardware not ready, force into ready state. */
8717 IWN_SETBITS(sc, IWN_HW_IF_CONFIG, IWN_HW_IF_CONFIG_PREPARE);
8718 for (ntries = 0; ntries < 15000; ntries++) {
8719 if (!(IWN_READ(sc, IWN_HW_IF_CONFIG) &
8720 IWN_HW_IF_CONFIG_PREPARE_DONE))
8724 if (ntries == 15000)
8727 /* Hardware should be ready now. */
8728 IWN_SETBITS(sc, IWN_HW_IF_CONFIG, IWN_HW_IF_CONFIG_NIC_READY);
8729 for (ntries = 0; ntries < 5; ntries++) {
8730 if (IWN_READ(sc, IWN_HW_IF_CONFIG) &
8731 IWN_HW_IF_CONFIG_NIC_READY)
8739 iwn_hw_init(struct iwn_softc *sc)
8741 struct iwn_ops *ops = &sc->ops;
8742 int error, chnl, qid;
8744 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
8746 /* Clear pending interrupts. */
8747 IWN_WRITE(sc, IWN_INT, 0xffffffff);
8749 if ((error = iwn_apm_init(sc)) != 0) {
8750 device_printf(sc->sc_dev,
8751 "%s: could not power ON adapter, error %d\n", __func__,
8756 /* Select VMAIN power source. */
8757 if ((error = iwn_nic_lock(sc)) != 0)
8759 iwn_prph_clrbits(sc, IWN_APMG_PS, IWN_APMG_PS_PWR_SRC_MASK);
8762 /* Perform adapter-specific initialization. */
8763 if ((error = ops->nic_config(sc)) != 0)
8766 /* Initialize RX ring. */
8767 if ((error = iwn_nic_lock(sc)) != 0)
8769 IWN_WRITE(sc, IWN_FH_RX_CONFIG, 0);
8770 IWN_WRITE(sc, IWN_FH_RX_WPTR, 0);
8771 /* Set physical address of RX ring (256-byte aligned). */
8772 IWN_WRITE(sc, IWN_FH_RX_BASE, sc->rxq.desc_dma.paddr >> 8);
8773 /* Set physical address of RX status (16-byte aligned). */
8774 IWN_WRITE(sc, IWN_FH_STATUS_WPTR, sc->rxq.stat_dma.paddr >> 4);
8776 IWN_WRITE(sc, IWN_FH_RX_CONFIG,
8777 IWN_FH_RX_CONFIG_ENA |
8778 IWN_FH_RX_CONFIG_IGN_RXF_EMPTY | /* HW bug workaround */
8779 IWN_FH_RX_CONFIG_IRQ_DST_HOST |
8780 IWN_FH_RX_CONFIG_SINGLE_FRAME |
8781 IWN_FH_RX_CONFIG_RB_TIMEOUT(0) |
8782 IWN_FH_RX_CONFIG_NRBD(IWN_RX_RING_COUNT_LOG));
8784 IWN_WRITE(sc, IWN_FH_RX_WPTR, (IWN_RX_RING_COUNT - 1) & ~7);
8786 if ((error = iwn_nic_lock(sc)) != 0)
8789 /* Initialize TX scheduler. */
8790 iwn_prph_write(sc, sc->sched_txfact_addr, 0);
8792 /* Set physical address of "keep warm" page (16-byte aligned). */
8793 IWN_WRITE(sc, IWN_FH_KW_ADDR, sc->kw_dma.paddr >> 4);
8795 /* Initialize TX rings. */
8796 for (qid = 0; qid < sc->ntxqs; qid++) {
8797 struct iwn_tx_ring *txq = &sc->txq[qid];
8799 /* Set physical address of TX ring (256-byte aligned). */
8800 IWN_WRITE(sc, IWN_FH_CBBC_QUEUE(qid),
8801 txq->desc_dma.paddr >> 8);
8805 /* Enable DMA channels. */
8806 for (chnl = 0; chnl < sc->ndmachnls; chnl++) {
8807 IWN_WRITE(sc, IWN_FH_TX_CONFIG(chnl),
8808 IWN_FH_TX_CONFIG_DMA_ENA |
8809 IWN_FH_TX_CONFIG_DMA_CREDIT_ENA);
8812 /* Clear "radio off" and "commands blocked" bits. */
8813 IWN_WRITE(sc, IWN_UCODE_GP1_CLR, IWN_UCODE_GP1_RFKILL);
8814 IWN_WRITE(sc, IWN_UCODE_GP1_CLR, IWN_UCODE_GP1_CMD_BLOCKED);
8816 /* Clear pending interrupts. */
8817 IWN_WRITE(sc, IWN_INT, 0xffffffff);
8818 /* Enable interrupt coalescing. */
8819 IWN_WRITE(sc, IWN_INT_COALESCING, 512 / 8);
8820 /* Enable interrupts. */
8821 IWN_WRITE(sc, IWN_INT_MASK, sc->int_mask);
8823 /* _Really_ make sure "radio off" bit is cleared! */
8824 IWN_WRITE(sc, IWN_UCODE_GP1_CLR, IWN_UCODE_GP1_RFKILL);
8825 IWN_WRITE(sc, IWN_UCODE_GP1_CLR, IWN_UCODE_GP1_RFKILL);
8827 /* Enable shadow registers. */
8828 if (sc->base_params->shadow_reg_enable)
8829 IWN_SETBITS(sc, IWN_SHADOW_REG_CTRL, 0x800fffff);
8831 if ((error = ops->load_firmware(sc)) != 0) {
8832 device_printf(sc->sc_dev,
8833 "%s: could not load firmware, error %d\n", __func__,
8837 /* Wait at most one second for firmware alive notification. */
8838 if ((error = msleep(sc, &sc->sc_mtx, PCATCH, "iwninit", hz)) != 0) {
8839 device_printf(sc->sc_dev,
8840 "%s: timeout waiting for adapter to initialize, error %d\n",
8844 /* Do post-firmware initialization. */
8846 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
8848 return ops->post_alive(sc);
8852 iwn_hw_stop(struct iwn_softc *sc)
8854 int chnl, qid, ntries;
8856 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8858 IWN_WRITE(sc, IWN_RESET, IWN_RESET_NEVO);
8860 /* Disable interrupts. */
8861 IWN_WRITE(sc, IWN_INT_MASK, 0);
8862 IWN_WRITE(sc, IWN_INT, 0xffffffff);
8863 IWN_WRITE(sc, IWN_FH_INT, 0xffffffff);
8864 sc->sc_flags &= ~IWN_FLAG_USE_ICT;
8866 /* Make sure we no longer hold the NIC lock. */
8869 /* Stop TX scheduler. */
8870 iwn_prph_write(sc, sc->sched_txfact_addr, 0);
8872 /* Stop all DMA channels. */
8873 if (iwn_nic_lock(sc) == 0) {
8874 for (chnl = 0; chnl < sc->ndmachnls; chnl++) {
8875 IWN_WRITE(sc, IWN_FH_TX_CONFIG(chnl), 0);
8876 for (ntries = 0; ntries < 200; ntries++) {
8877 if (IWN_READ(sc, IWN_FH_TX_STATUS) &
8878 IWN_FH_TX_STATUS_IDLE(chnl))
8887 iwn_reset_rx_ring(sc, &sc->rxq);
8889 /* Reset all TX rings. */
8890 for (qid = 0; qid < sc->ntxqs; qid++)
8891 iwn_reset_tx_ring(sc, &sc->txq[qid]);
8893 if (iwn_nic_lock(sc) == 0) {
8894 iwn_prph_write(sc, IWN_APMG_CLK_DIS,
8895 IWN_APMG_CLK_CTRL_DMA_CLK_RQT);
8899 /* Power OFF adapter. */
8904 iwn_panicked(void *arg0, int pending)
8906 struct iwn_softc *sc = arg0;
8907 struct ieee80211com *ic = &sc->sc_ic;
8908 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
8914 printf("%s: null vap\n", __func__);
8918 device_printf(sc->sc_dev, "%s: controller panicked, iv_state = %d; "
8919 "restarting\n", __func__, vap->iv_state);
8922 * This is not enough work. We need to also reinitialise
8923 * the correct transmit state for aggregation enabled queues,
8924 * which has a very specific requirement of
8925 * ring index = 802.11 seqno % 256. If we don't do this (which
8926 * we definitely don't!) then the firmware will just panic again.
8929 ieee80211_restart_all(ic);
8933 iwn_stop_locked(sc);
8934 if ((error = iwn_init_locked(sc)) != 0) {
8935 device_printf(sc->sc_dev,
8936 "%s: could not init hardware\n", __func__);
8939 if (vap->iv_state >= IEEE80211_S_AUTH &&
8940 (error = iwn_auth(sc, vap)) != 0) {
8941 device_printf(sc->sc_dev,
8942 "%s: could not move to auth state\n", __func__);
8944 if (vap->iv_state >= IEEE80211_S_RUN &&
8945 (error = iwn_run(sc, vap)) != 0) {
8946 device_printf(sc->sc_dev,
8947 "%s: could not move to run state\n", __func__);
8956 iwn_init_locked(struct iwn_softc *sc)
8960 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
8962 IWN_LOCK_ASSERT(sc);
8964 if (sc->sc_flags & IWN_FLAG_RUNNING)
8967 sc->sc_flags |= IWN_FLAG_RUNNING;
8969 if ((error = iwn_hw_prepare(sc)) != 0) {
8970 device_printf(sc->sc_dev, "%s: hardware not ready, error %d\n",
8975 /* Initialize interrupt mask to default value. */
8976 sc->int_mask = IWN_INT_MASK_DEF;
8977 sc->sc_flags &= ~IWN_FLAG_USE_ICT;
8979 /* Check that the radio is not disabled by hardware switch. */
8980 if (!(IWN_READ(sc, IWN_GP_CNTRL) & IWN_GP_CNTRL_RFKILL)) {
8981 iwn_stop_locked(sc);
8982 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
8987 /* Read firmware images from the filesystem. */
8988 if ((error = iwn_read_firmware(sc)) != 0) {
8989 device_printf(sc->sc_dev,
8990 "%s: could not read firmware, error %d\n", __func__,
8995 /* Initialize hardware and upload firmware. */
8996 error = iwn_hw_init(sc);
8997 iwn_unload_firmware(sc);
8999 device_printf(sc->sc_dev,
9000 "%s: could not initialize hardware, error %d\n", __func__,
9005 /* Configure adapter now that it is ready. */
9006 if ((error = iwn_config(sc)) != 0) {
9007 device_printf(sc->sc_dev,
9008 "%s: could not configure device, error %d\n", __func__,
9013 callout_reset(&sc->watchdog_to, hz, iwn_watchdog, sc);
9016 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
9021 iwn_stop_locked(sc);
9023 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end in error\n",__func__);
9029 iwn_init(struct iwn_softc *sc)
9034 error = iwn_init_locked(sc);
9041 iwn_stop_locked(struct iwn_softc *sc)
9044 IWN_LOCK_ASSERT(sc);
9046 if (!(sc->sc_flags & IWN_FLAG_RUNNING))
9049 sc->sc_is_scanning = 0;
9050 sc->sc_tx_timer = 0;
9051 callout_stop(&sc->watchdog_to);
9052 callout_stop(&sc->scan_timeout);
9053 callout_stop(&sc->calib_to);
9054 sc->sc_flags &= ~IWN_FLAG_RUNNING;
9056 /* Power OFF hardware. */
9061 iwn_stop(struct iwn_softc *sc)
9064 iwn_stop_locked(sc);
9069 * Callback from net80211 to start a scan.
9072 iwn_scan_start(struct ieee80211com *ic)
9074 struct iwn_softc *sc = ic->ic_softc;
9077 /* make the link LED blink while we're scanning */
9078 iwn_set_led(sc, IWN_LED_LINK, 20, 2);
9083 * Callback from net80211 to terminate a scan.
9086 iwn_scan_end(struct ieee80211com *ic)
9088 struct iwn_softc *sc = ic->ic_softc;
9089 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
9092 if (vap->iv_state == IEEE80211_S_RUN) {
9093 /* Set link LED to ON status if we are associated */
9094 iwn_set_led(sc, IWN_LED_LINK, 0, 1);
9100 * Callback from net80211 to force a channel change.
9103 iwn_set_channel(struct ieee80211com *ic)
9105 const struct ieee80211_channel *c = ic->ic_curchan;
9106 struct iwn_softc *sc = ic->ic_softc;
9109 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
9112 sc->sc_rxtap.wr_chan_freq = htole16(c->ic_freq);
9113 sc->sc_rxtap.wr_chan_flags = htole16(c->ic_flags);
9114 sc->sc_txtap.wt_chan_freq = htole16(c->ic_freq);
9115 sc->sc_txtap.wt_chan_flags = htole16(c->ic_flags);
9118 * Only need to set the channel in Monitor mode. AP scanning and auth
9119 * are already taken care of by their respective firmware commands.
9121 if (ic->ic_opmode == IEEE80211_M_MONITOR) {
9122 error = iwn_config(sc);
9124 device_printf(sc->sc_dev,
9125 "%s: error %d settting channel\n", __func__, error);
9131 * Callback from net80211 to start scanning of the current channel.
9134 iwn_scan_curchan(struct ieee80211_scan_state *ss, unsigned long maxdwell)
9136 struct ieee80211vap *vap = ss->ss_vap;
9137 struct ieee80211com *ic = vap->iv_ic;
9138 struct iwn_softc *sc = ic->ic_softc;
9142 error = iwn_scan(sc, vap, ss, ic->ic_curchan);
9145 ieee80211_cancel_scan(vap);
9149 * Callback from net80211 to handle the minimum dwell time being met.
9150 * The intent is to terminate the scan but we just let the firmware
9151 * notify us when it's finished as we have no safe way to abort it.
9154 iwn_scan_mindwell(struct ieee80211_scan_state *ss)
9156 /* NB: don't try to abort scan; wait for firmware to finish */
9159 #define IWN_DESC(x) case x: return #x
9162 * Translate CSR code to string
9164 static char *iwn_get_csr_string(int csr)
9167 IWN_DESC(IWN_HW_IF_CONFIG);
9168 IWN_DESC(IWN_INT_COALESCING);
9170 IWN_DESC(IWN_INT_MASK);
9171 IWN_DESC(IWN_FH_INT);
9172 IWN_DESC(IWN_GPIO_IN);
9173 IWN_DESC(IWN_RESET);
9174 IWN_DESC(IWN_GP_CNTRL);
9175 IWN_DESC(IWN_HW_REV);
9176 IWN_DESC(IWN_EEPROM);
9177 IWN_DESC(IWN_EEPROM_GP);
9178 IWN_DESC(IWN_OTP_GP);
9180 IWN_DESC(IWN_GP_UCODE);
9181 IWN_DESC(IWN_GP_DRIVER);
9182 IWN_DESC(IWN_UCODE_GP1);
9183 IWN_DESC(IWN_UCODE_GP2);
9185 IWN_DESC(IWN_DRAM_INT_TBL);
9186 IWN_DESC(IWN_GIO_CHICKEN);
9187 IWN_DESC(IWN_ANA_PLL);
9188 IWN_DESC(IWN_HW_REV_WA);
9189 IWN_DESC(IWN_DBG_HPET_MEM);
9191 return "UNKNOWN CSR";
9196 * This function print firmware register
9199 iwn_debug_register(struct iwn_softc *sc)
9202 static const uint32_t csr_tbl[] = {
9227 DPRINTF(sc, IWN_DEBUG_REGISTER,
9228 "CSR values: (2nd byte of IWN_INT_COALESCING is IWN_INT_PERIODIC)%s",
9230 for (i = 0; i < nitems(csr_tbl); i++){
9231 DPRINTF(sc, IWN_DEBUG_REGISTER," %10s: 0x%08x ",
9232 iwn_get_csr_string(csr_tbl[i]), IWN_READ(sc, csr_tbl[i]));
9234 DPRINTF(sc, IWN_DEBUG_REGISTER,"%s","\n");
9236 DPRINTF(sc, IWN_DEBUG_REGISTER,"%s","\n");