2 * Copyright (c) 2007-2009 Damien Bergamini <damien.bergamini@free.fr>
3 * Copyright (c) 2008 Benjamin Close <benjsc@FreeBSD.org>
4 * Copyright (c) 2008 Sam Leffler, Errno Consulting
5 * Copyright (c) 2011 Intel Corporation
6 * Copyright (c) 2013 Cedric GROSS <c.gross@kreiz-it.fr>
7 * Copyright (c) 2013 Adrian Chadd <adrian@FreeBSD.org>
9 * Permission to use, copy, modify, and distribute this software for any
10 * purpose with or without fee is hereby granted, provided that the above
11 * copyright notice and this permission notice appear in all copies.
13 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
14 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
15 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
16 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
17 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
18 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
19 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
23 * Driver for Intel WiFi Link 4965 and 1000/5000/6000 Series 802.11 network
27 #include <sys/cdefs.h>
28 __FBSDID("$FreeBSD$");
33 #include <sys/param.h>
34 #include <sys/sockio.h>
35 #include <sys/sysctl.h>
37 #include <sys/kernel.h>
38 #include <sys/socket.h>
39 #include <sys/systm.h>
40 #include <sys/malloc.h>
43 #include <sys/endian.h>
44 #include <sys/firmware.h>
45 #include <sys/limits.h>
46 #include <sys/module.h>
47 #include <sys/queue.h>
48 #include <sys/taskqueue.h>
50 #include <machine/bus.h>
51 #include <machine/resource.h>
52 #include <machine/clock.h>
54 #include <dev/pci/pcireg.h>
55 #include <dev/pci/pcivar.h>
59 #include <net/if_var.h>
60 #include <net/if_arp.h>
61 #include <net/ethernet.h>
62 #include <net/if_dl.h>
63 #include <net/if_media.h>
64 #include <net/if_types.h>
66 #include <netinet/in.h>
67 #include <netinet/in_systm.h>
68 #include <netinet/in_var.h>
69 #include <netinet/if_ether.h>
70 #include <netinet/ip.h>
72 #include <net80211/ieee80211_var.h>
73 #include <net80211/ieee80211_radiotap.h>
74 #include <net80211/ieee80211_regdomain.h>
75 #include <net80211/ieee80211_ratectl.h>
77 #include <dev/iwn/if_iwnreg.h>
78 #include <dev/iwn/if_iwnvar.h>
79 #include <dev/iwn/if_iwn_devid.h>
80 #include <dev/iwn/if_iwn_chip_cfg.h>
81 #include <dev/iwn/if_iwn_debug.h>
82 #include <dev/iwn/if_iwn_ioctl.h>
90 static const struct iwn_ident iwn_ident_table[] = {
91 { 0x8086, IWN_DID_6x05_1, "Intel Centrino Advanced-N 6205" },
92 { 0x8086, IWN_DID_1000_1, "Intel Centrino Wireless-N 1000" },
93 { 0x8086, IWN_DID_1000_2, "Intel Centrino Wireless-N 1000" },
94 { 0x8086, IWN_DID_6x05_2, "Intel Centrino Advanced-N 6205" },
95 { 0x8086, IWN_DID_6050_1, "Intel Centrino Advanced-N + WiMAX 6250" },
96 { 0x8086, IWN_DID_6050_2, "Intel Centrino Advanced-N + WiMAX 6250" },
97 { 0x8086, IWN_DID_x030_1, "Intel Centrino Wireless-N 1030" },
98 { 0x8086, IWN_DID_x030_2, "Intel Centrino Wireless-N 1030" },
99 { 0x8086, IWN_DID_x030_3, "Intel Centrino Advanced-N 6230" },
100 { 0x8086, IWN_DID_x030_4, "Intel Centrino Advanced-N 6230" },
101 { 0x8086, IWN_DID_6150_1, "Intel Centrino Wireless-N + WiMAX 6150" },
102 { 0x8086, IWN_DID_6150_2, "Intel Centrino Wireless-N + WiMAX 6150" },
103 { 0x8086, IWN_DID_2x00_1, "Intel(R) Centrino(R) Wireless-N 2200 BGN" },
104 { 0x8086, IWN_DID_2x00_2, "Intel(R) Centrino(R) Wireless-N 2200 BGN" },
105 /* XXX 2200D is IWN_SDID_2x00_4; there's no way to express this here! */
106 { 0x8086, IWN_DID_2x30_1, "Intel Centrino Wireless-N 2230" },
107 { 0x8086, IWN_DID_2x30_2, "Intel Centrino Wireless-N 2230" },
108 { 0x8086, IWN_DID_130_1, "Intel Centrino Wireless-N 130" },
109 { 0x8086, IWN_DID_130_2, "Intel Centrino Wireless-N 130" },
110 { 0x8086, IWN_DID_100_1, "Intel Centrino Wireless-N 100" },
111 { 0x8086, IWN_DID_100_2, "Intel Centrino Wireless-N 100" },
112 { 0x8086, IWN_DID_105_1, "Intel Centrino Wireless-N 105" },
113 { 0x8086, IWN_DID_105_2, "Intel Centrino Wireless-N 105" },
114 { 0x8086, IWN_DID_135_1, "Intel Centrino Wireless-N 135" },
115 { 0x8086, IWN_DID_135_2, "Intel Centrino Wireless-N 135" },
116 { 0x8086, IWN_DID_4965_1, "Intel Wireless WiFi Link 4965" },
117 { 0x8086, IWN_DID_6x00_1, "Intel Centrino Ultimate-N 6300" },
118 { 0x8086, IWN_DID_6x00_2, "Intel Centrino Advanced-N 6200" },
119 { 0x8086, IWN_DID_4965_2, "Intel Wireless WiFi Link 4965" },
120 { 0x8086, IWN_DID_4965_3, "Intel Wireless WiFi Link 4965" },
121 { 0x8086, IWN_DID_5x00_1, "Intel WiFi Link 5100" },
122 { 0x8086, IWN_DID_4965_4, "Intel Wireless WiFi Link 4965" },
123 { 0x8086, IWN_DID_5x00_3, "Intel Ultimate N WiFi Link 5300" },
124 { 0x8086, IWN_DID_5x00_4, "Intel Ultimate N WiFi Link 5300" },
125 { 0x8086, IWN_DID_5x00_2, "Intel WiFi Link 5100" },
126 { 0x8086, IWN_DID_6x00_3, "Intel Centrino Ultimate-N 6300" },
127 { 0x8086, IWN_DID_6x00_4, "Intel Centrino Advanced-N 6200" },
128 { 0x8086, IWN_DID_5x50_1, "Intel WiMAX/WiFi Link 5350" },
129 { 0x8086, IWN_DID_5x50_2, "Intel WiMAX/WiFi Link 5350" },
130 { 0x8086, IWN_DID_5x50_3, "Intel WiMAX/WiFi Link 5150" },
131 { 0x8086, IWN_DID_5x50_4, "Intel WiMAX/WiFi Link 5150" },
132 { 0x8086, IWN_DID_6035_1, "Intel Centrino Advanced 6235" },
133 { 0x8086, IWN_DID_6035_2, "Intel Centrino Advanced 6235" },
137 static int iwn_probe(device_t);
138 static int iwn_attach(device_t);
139 static int iwn4965_attach(struct iwn_softc *, uint16_t);
140 static int iwn5000_attach(struct iwn_softc *, uint16_t);
141 static int iwn_config_specific(struct iwn_softc *, uint16_t);
142 static void iwn_radiotap_attach(struct iwn_softc *);
143 static void iwn_sysctlattach(struct iwn_softc *);
144 static struct ieee80211vap *iwn_vap_create(struct ieee80211com *,
145 const char [IFNAMSIZ], int, enum ieee80211_opmode, int,
146 const uint8_t [IEEE80211_ADDR_LEN],
147 const uint8_t [IEEE80211_ADDR_LEN]);
148 static void iwn_vap_delete(struct ieee80211vap *);
149 static int iwn_detach(device_t);
150 static int iwn_shutdown(device_t);
151 static int iwn_suspend(device_t);
152 static int iwn_resume(device_t);
153 static int iwn_nic_lock(struct iwn_softc *);
154 static int iwn_eeprom_lock(struct iwn_softc *);
155 static int iwn_init_otprom(struct iwn_softc *);
156 static int iwn_read_prom_data(struct iwn_softc *, uint32_t, void *, int);
157 static void iwn_dma_map_addr(void *, bus_dma_segment_t *, int, int);
158 static int iwn_dma_contig_alloc(struct iwn_softc *, struct iwn_dma_info *,
159 void **, bus_size_t, bus_size_t);
160 static void iwn_dma_contig_free(struct iwn_dma_info *);
161 static int iwn_alloc_sched(struct iwn_softc *);
162 static void iwn_free_sched(struct iwn_softc *);
163 static int iwn_alloc_kw(struct iwn_softc *);
164 static void iwn_free_kw(struct iwn_softc *);
165 static int iwn_alloc_ict(struct iwn_softc *);
166 static void iwn_free_ict(struct iwn_softc *);
167 static int iwn_alloc_fwmem(struct iwn_softc *);
168 static void iwn_free_fwmem(struct iwn_softc *);
169 static int iwn_alloc_rx_ring(struct iwn_softc *, struct iwn_rx_ring *);
170 static void iwn_reset_rx_ring(struct iwn_softc *, struct iwn_rx_ring *);
171 static void iwn_free_rx_ring(struct iwn_softc *, struct iwn_rx_ring *);
172 static int iwn_alloc_tx_ring(struct iwn_softc *, struct iwn_tx_ring *,
174 static void iwn_reset_tx_ring(struct iwn_softc *, struct iwn_tx_ring *);
175 static void iwn_free_tx_ring(struct iwn_softc *, struct iwn_tx_ring *);
176 static void iwn5000_ict_reset(struct iwn_softc *);
177 static int iwn_read_eeprom(struct iwn_softc *,
178 uint8_t macaddr[IEEE80211_ADDR_LEN]);
179 static void iwn4965_read_eeprom(struct iwn_softc *);
181 static void iwn4965_print_power_group(struct iwn_softc *, int);
183 static void iwn5000_read_eeprom(struct iwn_softc *);
184 static uint32_t iwn_eeprom_channel_flags(struct iwn_eeprom_chan *);
185 static void iwn_read_eeprom_band(struct iwn_softc *, int);
186 static void iwn_read_eeprom_ht40(struct iwn_softc *, int);
187 static void iwn_read_eeprom_channels(struct iwn_softc *, int, uint32_t);
188 static struct iwn_eeprom_chan *iwn_find_eeprom_channel(struct iwn_softc *,
189 struct ieee80211_channel *);
190 static int iwn_setregdomain(struct ieee80211com *,
191 struct ieee80211_regdomain *, int,
192 struct ieee80211_channel[]);
193 static void iwn_read_eeprom_enhinfo(struct iwn_softc *);
194 static struct ieee80211_node *iwn_node_alloc(struct ieee80211vap *,
195 const uint8_t mac[IEEE80211_ADDR_LEN]);
196 static void iwn_newassoc(struct ieee80211_node *, int);
197 static int iwn_media_change(struct ifnet *);
198 static int iwn_newstate(struct ieee80211vap *, enum ieee80211_state, int);
199 static void iwn_calib_timeout(void *);
200 static void iwn_rx_phy(struct iwn_softc *, struct iwn_rx_desc *,
201 struct iwn_rx_data *);
202 static void iwn_rx_done(struct iwn_softc *, struct iwn_rx_desc *,
203 struct iwn_rx_data *);
204 static void iwn_rx_compressed_ba(struct iwn_softc *, struct iwn_rx_desc *,
205 struct iwn_rx_data *);
206 static void iwn5000_rx_calib_results(struct iwn_softc *,
207 struct iwn_rx_desc *, struct iwn_rx_data *);
208 static void iwn_rx_statistics(struct iwn_softc *, struct iwn_rx_desc *,
209 struct iwn_rx_data *);
210 static void iwn4965_tx_done(struct iwn_softc *, struct iwn_rx_desc *,
211 struct iwn_rx_data *);
212 static void iwn5000_tx_done(struct iwn_softc *, struct iwn_rx_desc *,
213 struct iwn_rx_data *);
214 static void iwn_tx_done(struct iwn_softc *, struct iwn_rx_desc *, int,
216 static void iwn_ampdu_tx_done(struct iwn_softc *, int, int, int, int, void *);
217 static void iwn_cmd_done(struct iwn_softc *, struct iwn_rx_desc *);
218 static void iwn_notif_intr(struct iwn_softc *);
219 static void iwn_wakeup_intr(struct iwn_softc *);
220 static void iwn_rftoggle_intr(struct iwn_softc *);
221 static void iwn_fatal_intr(struct iwn_softc *);
222 static void iwn_intr(void *);
223 static void iwn4965_update_sched(struct iwn_softc *, int, int, uint8_t,
225 static void iwn5000_update_sched(struct iwn_softc *, int, int, uint8_t,
228 static void iwn5000_reset_sched(struct iwn_softc *, int, int);
230 static int iwn_tx_data(struct iwn_softc *, struct mbuf *,
231 struct ieee80211_node *);
232 static int iwn_tx_data_raw(struct iwn_softc *, struct mbuf *,
233 struct ieee80211_node *,
234 const struct ieee80211_bpf_params *params);
235 static int iwn_raw_xmit(struct ieee80211_node *, struct mbuf *,
236 const struct ieee80211_bpf_params *);
237 static void iwn_start(struct ifnet *);
238 static void iwn_start_locked(struct ifnet *);
239 static void iwn_watchdog(void *);
240 static int iwn_ioctl(struct ifnet *, u_long, caddr_t);
241 static int iwn_cmd(struct iwn_softc *, int, const void *, int, int);
242 static int iwn4965_add_node(struct iwn_softc *, struct iwn_node_info *,
244 static int iwn5000_add_node(struct iwn_softc *, struct iwn_node_info *,
246 static int iwn_set_link_quality(struct iwn_softc *,
247 struct ieee80211_node *);
248 static int iwn_add_broadcast_node(struct iwn_softc *, int);
249 static int iwn_updateedca(struct ieee80211com *);
250 static void iwn_update_mcast(struct ifnet *);
251 static void iwn_set_led(struct iwn_softc *, uint8_t, uint8_t, uint8_t);
252 static int iwn_set_critical_temp(struct iwn_softc *);
253 static int iwn_set_timing(struct iwn_softc *, struct ieee80211_node *);
254 static void iwn4965_power_calibration(struct iwn_softc *, int);
255 static int iwn4965_set_txpower(struct iwn_softc *,
256 struct ieee80211_channel *, int);
257 static int iwn5000_set_txpower(struct iwn_softc *,
258 struct ieee80211_channel *, int);
259 static int iwn4965_get_rssi(struct iwn_softc *, struct iwn_rx_stat *);
260 static int iwn5000_get_rssi(struct iwn_softc *, struct iwn_rx_stat *);
261 static int iwn_get_noise(const struct iwn_rx_general_stats *);
262 static int iwn4965_get_temperature(struct iwn_softc *);
263 static int iwn5000_get_temperature(struct iwn_softc *);
264 static int iwn_init_sensitivity(struct iwn_softc *);
265 static void iwn_collect_noise(struct iwn_softc *,
266 const struct iwn_rx_general_stats *);
267 static int iwn4965_init_gains(struct iwn_softc *);
268 static int iwn5000_init_gains(struct iwn_softc *);
269 static int iwn4965_set_gains(struct iwn_softc *);
270 static int iwn5000_set_gains(struct iwn_softc *);
271 static void iwn_tune_sensitivity(struct iwn_softc *,
272 const struct iwn_rx_stats *);
273 static void iwn_save_stats_counters(struct iwn_softc *,
274 const struct iwn_stats *);
275 static int iwn_send_sensitivity(struct iwn_softc *);
276 static void iwn_check_rx_recovery(struct iwn_softc *, struct iwn_stats *);
277 static int iwn_set_pslevel(struct iwn_softc *, int, int, int);
278 static int iwn_send_btcoex(struct iwn_softc *);
279 static int iwn_send_advanced_btcoex(struct iwn_softc *);
280 static int iwn5000_runtime_calib(struct iwn_softc *);
281 static int iwn_config(struct iwn_softc *);
282 static uint8_t *ieee80211_add_ssid(uint8_t *, const uint8_t *, u_int);
283 static int iwn_scan(struct iwn_softc *, struct ieee80211vap *,
284 struct ieee80211_scan_state *, struct ieee80211_channel *);
285 static int iwn_auth(struct iwn_softc *, struct ieee80211vap *vap);
286 static int iwn_run(struct iwn_softc *, struct ieee80211vap *vap);
287 static int iwn_ampdu_rx_start(struct ieee80211_node *,
288 struct ieee80211_rx_ampdu *, int, int, int);
289 static void iwn_ampdu_rx_stop(struct ieee80211_node *,
290 struct ieee80211_rx_ampdu *);
291 static int iwn_addba_request(struct ieee80211_node *,
292 struct ieee80211_tx_ampdu *, int, int, int);
293 static int iwn_addba_response(struct ieee80211_node *,
294 struct ieee80211_tx_ampdu *, int, int, int);
295 static int iwn_ampdu_tx_start(struct ieee80211com *,
296 struct ieee80211_node *, uint8_t);
297 static void iwn_ampdu_tx_stop(struct ieee80211_node *,
298 struct ieee80211_tx_ampdu *);
299 static void iwn4965_ampdu_tx_start(struct iwn_softc *,
300 struct ieee80211_node *, int, uint8_t, uint16_t);
301 static void iwn4965_ampdu_tx_stop(struct iwn_softc *, int,
303 static void iwn5000_ampdu_tx_start(struct iwn_softc *,
304 struct ieee80211_node *, int, uint8_t, uint16_t);
305 static void iwn5000_ampdu_tx_stop(struct iwn_softc *, int,
307 static int iwn5000_query_calibration(struct iwn_softc *);
308 static int iwn5000_send_calibration(struct iwn_softc *);
309 static int iwn5000_send_wimax_coex(struct iwn_softc *);
310 static int iwn5000_crystal_calib(struct iwn_softc *);
311 static int iwn5000_temp_offset_calib(struct iwn_softc *);
312 static int iwn5000_temp_offset_calibv2(struct iwn_softc *);
313 static int iwn4965_post_alive(struct iwn_softc *);
314 static int iwn5000_post_alive(struct iwn_softc *);
315 static int iwn4965_load_bootcode(struct iwn_softc *, const uint8_t *,
317 static int iwn4965_load_firmware(struct iwn_softc *);
318 static int iwn5000_load_firmware_section(struct iwn_softc *, uint32_t,
319 const uint8_t *, int);
320 static int iwn5000_load_firmware(struct iwn_softc *);
321 static int iwn_read_firmware_leg(struct iwn_softc *,
322 struct iwn_fw_info *);
323 static int iwn_read_firmware_tlv(struct iwn_softc *,
324 struct iwn_fw_info *, uint16_t);
325 static int iwn_read_firmware(struct iwn_softc *);
326 static int iwn_clock_wait(struct iwn_softc *);
327 static int iwn_apm_init(struct iwn_softc *);
328 static void iwn_apm_stop_master(struct iwn_softc *);
329 static void iwn_apm_stop(struct iwn_softc *);
330 static int iwn4965_nic_config(struct iwn_softc *);
331 static int iwn5000_nic_config(struct iwn_softc *);
332 static int iwn_hw_prepare(struct iwn_softc *);
333 static int iwn_hw_init(struct iwn_softc *);
334 static void iwn_hw_stop(struct iwn_softc *);
335 static void iwn_radio_on(void *, int);
336 static void iwn_radio_off(void *, int);
337 static void iwn_panicked(void *, int);
338 static void iwn_init_locked(struct iwn_softc *);
339 static void iwn_init(void *);
340 static void iwn_stop_locked(struct iwn_softc *);
341 static void iwn_stop(struct iwn_softc *);
342 static void iwn_scan_start(struct ieee80211com *);
343 static void iwn_scan_end(struct ieee80211com *);
344 static void iwn_set_channel(struct ieee80211com *);
345 static void iwn_scan_curchan(struct ieee80211_scan_state *, unsigned long);
346 static void iwn_scan_mindwell(struct ieee80211_scan_state *);
347 static void iwn_hw_reset(void *, int);
349 static char *iwn_get_csr_string(int);
350 static void iwn_debug_register(struct iwn_softc *);
353 static device_method_t iwn_methods[] = {
354 /* Device interface */
355 DEVMETHOD(device_probe, iwn_probe),
356 DEVMETHOD(device_attach, iwn_attach),
357 DEVMETHOD(device_detach, iwn_detach),
358 DEVMETHOD(device_shutdown, iwn_shutdown),
359 DEVMETHOD(device_suspend, iwn_suspend),
360 DEVMETHOD(device_resume, iwn_resume),
365 static driver_t iwn_driver = {
368 sizeof(struct iwn_softc)
370 static devclass_t iwn_devclass;
372 DRIVER_MODULE(iwn, pci, iwn_driver, iwn_devclass, NULL, NULL);
374 MODULE_VERSION(iwn, 1);
376 MODULE_DEPEND(iwn, firmware, 1, 1, 1);
377 MODULE_DEPEND(iwn, pci, 1, 1, 1);
378 MODULE_DEPEND(iwn, wlan, 1, 1, 1);
381 iwn_probe(device_t dev)
383 const struct iwn_ident *ident;
385 for (ident = iwn_ident_table; ident->name != NULL; ident++) {
386 if (pci_get_vendor(dev) == ident->vendor &&
387 pci_get_device(dev) == ident->device) {
388 device_set_desc(dev, ident->name);
389 return (BUS_PROBE_DEFAULT);
396 iwn_is_3stream_device(struct iwn_softc *sc)
398 /* XXX for now only 5300, until the 5350 can be tested */
399 if (sc->hw_type == IWN_HW_REV_TYPE_5300)
405 iwn_attach(device_t dev)
407 struct iwn_softc *sc = (struct iwn_softc *)device_get_softc(dev);
408 struct ieee80211com *ic;
411 uint8_t macaddr[IEEE80211_ADDR_LEN];
416 error = resource_int_value(device_get_name(sc->sc_dev),
417 device_get_unit(sc->sc_dev), "debug", &(sc->sc_debug));
424 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: begin\n",__func__);
427 * Get the offset of the PCI Express Capability Structure in PCI
428 * Configuration Space.
430 error = pci_find_cap(dev, PCIY_EXPRESS, &sc->sc_cap_off);
432 device_printf(dev, "PCIe capability structure not found!\n");
436 /* Clear device-specific "PCI retry timeout" register (41h). */
437 pci_write_config(dev, 0x41, 0, 1);
439 /* Enable bus-mastering. */
440 pci_enable_busmaster(dev);
443 sc->mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
445 if (sc->mem == NULL) {
446 device_printf(dev, "can't map mem space\n");
450 sc->sc_st = rman_get_bustag(sc->mem);
451 sc->sc_sh = rman_get_bushandle(sc->mem);
455 if (pci_alloc_msi(dev, &i) == 0)
457 /* Install interrupt handler. */
458 sc->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, RF_ACTIVE |
459 (rid != 0 ? 0 : RF_SHAREABLE));
460 if (sc->irq == NULL) {
461 device_printf(dev, "can't map interrupt\n");
468 /* Read hardware revision and attach. */
469 sc->hw_type = (IWN_READ(sc, IWN_HW_REV) >> IWN_HW_REV_TYPE_SHIFT)
470 & IWN_HW_REV_TYPE_MASK;
471 sc->subdevice_id = pci_get_subdevice(dev);
474 * 4965 versus 5000 and later have different methods.
475 * Let's set those up first.
477 if (sc->hw_type == IWN_HW_REV_TYPE_4965)
478 error = iwn4965_attach(sc, pci_get_device(dev));
480 error = iwn5000_attach(sc, pci_get_device(dev));
482 device_printf(dev, "could not attach device, error %d\n",
488 * Next, let's setup the various parameters of each NIC.
490 error = iwn_config_specific(sc, pci_get_device(dev));
492 device_printf(dev, "could not attach device, error %d\n",
497 if ((error = iwn_hw_prepare(sc)) != 0) {
498 device_printf(dev, "hardware not ready, error %d\n", error);
502 /* Allocate DMA memory for firmware transfers. */
503 if ((error = iwn_alloc_fwmem(sc)) != 0) {
505 "could not allocate memory for firmware, error %d\n",
510 /* Allocate "Keep Warm" page. */
511 if ((error = iwn_alloc_kw(sc)) != 0) {
513 "could not allocate keep warm page, error %d\n", error);
517 /* Allocate ICT table for 5000 Series. */
518 if (sc->hw_type != IWN_HW_REV_TYPE_4965 &&
519 (error = iwn_alloc_ict(sc)) != 0) {
520 device_printf(dev, "could not allocate ICT table, error %d\n",
525 /* Allocate TX scheduler "rings". */
526 if ((error = iwn_alloc_sched(sc)) != 0) {
528 "could not allocate TX scheduler rings, error %d\n", error);
532 /* Allocate TX rings (16 on 4965AGN, 20 on >=5000). */
533 for (i = 0; i < sc->ntxqs; i++) {
534 if ((error = iwn_alloc_tx_ring(sc, &sc->txq[i], i)) != 0) {
536 "could not allocate TX ring %d, error %d\n", i,
542 /* Allocate RX ring. */
543 if ((error = iwn_alloc_rx_ring(sc, &sc->rxq)) != 0) {
544 device_printf(dev, "could not allocate RX ring, error %d\n",
549 /* Clear pending interrupts. */
550 IWN_WRITE(sc, IWN_INT, 0xffffffff);
552 ifp = sc->sc_ifp = if_alloc(IFT_IEEE80211);
554 device_printf(dev, "can not allocate ifnet structure\n");
560 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */
561 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */
563 /* Set device capabilities. */
565 IEEE80211_C_STA /* station mode supported */
566 | IEEE80211_C_MONITOR /* monitor mode supported */
567 | IEEE80211_C_BGSCAN /* background scanning */
568 | IEEE80211_C_TXPMGT /* tx power management */
569 | IEEE80211_C_SHSLOT /* short slot time supported */
571 | IEEE80211_C_SHPREAMBLE /* short preamble supported */
573 | IEEE80211_C_IBSS /* ibss/adhoc mode */
575 | IEEE80211_C_WME /* WME */
576 | IEEE80211_C_PMGT /* Station-side power mgmt */
579 /* Read MAC address, channels, etc from EEPROM. */
580 if ((error = iwn_read_eeprom(sc, macaddr)) != 0) {
581 device_printf(dev, "could not read EEPROM, error %d\n",
586 /* Count the number of available chains. */
588 ((sc->txchainmask >> 2) & 1) +
589 ((sc->txchainmask >> 1) & 1) +
590 ((sc->txchainmask >> 0) & 1);
592 ((sc->rxchainmask >> 2) & 1) +
593 ((sc->rxchainmask >> 1) & 1) +
594 ((sc->rxchainmask >> 0) & 1);
596 device_printf(dev, "MIMO %dT%dR, %.4s, address %6D\n",
597 sc->ntxchains, sc->nrxchains, sc->eeprom_domain,
601 if (sc->sc_flags & IWN_FLAG_HAS_11N) {
602 ic->ic_rxstream = sc->nrxchains;
603 ic->ic_txstream = sc->ntxchains;
606 * Some of the 3 antenna devices (ie, the 4965) only supports
607 * 2x2 operation. So correct the number of streams if
608 * it's not a 3-stream device.
610 if (! iwn_is_3stream_device(sc)) {
611 if (ic->ic_rxstream > 2)
613 if (ic->ic_txstream > 2)
618 IEEE80211_HTCAP_SMPS_OFF /* SMPS mode disabled */
619 | IEEE80211_HTCAP_SHORTGI20 /* short GI in 20MHz */
620 | IEEE80211_HTCAP_CHWIDTH40 /* 40MHz channel width*/
621 | IEEE80211_HTCAP_SHORTGI40 /* short GI in 40MHz */
623 | IEEE80211_HTCAP_GREENFIELD
624 #if IWN_RBUF_SIZE == 8192
625 | IEEE80211_HTCAP_MAXAMSDU_7935 /* max A-MSDU length */
627 | IEEE80211_HTCAP_MAXAMSDU_3839 /* max A-MSDU length */
630 /* s/w capabilities */
631 | IEEE80211_HTC_HT /* HT operation */
632 | IEEE80211_HTC_AMPDU /* tx A-MPDU */
634 | IEEE80211_HTC_AMSDU /* tx A-MSDU */
639 if_initname(ifp, device_get_name(dev), device_get_unit(dev));
641 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
642 ifp->if_init = iwn_init;
643 ifp->if_ioctl = iwn_ioctl;
644 ifp->if_start = iwn_start;
645 IFQ_SET_MAXLEN(&ifp->if_snd, ifqmaxlen);
646 ifp->if_snd.ifq_drv_maxlen = ifqmaxlen;
647 IFQ_SET_READY(&ifp->if_snd);
649 ieee80211_ifattach(ic, macaddr);
650 ic->ic_vap_create = iwn_vap_create;
651 ic->ic_vap_delete = iwn_vap_delete;
652 ic->ic_raw_xmit = iwn_raw_xmit;
653 ic->ic_node_alloc = iwn_node_alloc;
654 sc->sc_ampdu_rx_start = ic->ic_ampdu_rx_start;
655 ic->ic_ampdu_rx_start = iwn_ampdu_rx_start;
656 sc->sc_ampdu_rx_stop = ic->ic_ampdu_rx_stop;
657 ic->ic_ampdu_rx_stop = iwn_ampdu_rx_stop;
658 sc->sc_addba_request = ic->ic_addba_request;
659 ic->ic_addba_request = iwn_addba_request;
660 sc->sc_addba_response = ic->ic_addba_response;
661 ic->ic_addba_response = iwn_addba_response;
662 sc->sc_addba_stop = ic->ic_addba_stop;
663 ic->ic_addba_stop = iwn_ampdu_tx_stop;
664 ic->ic_newassoc = iwn_newassoc;
665 ic->ic_wme.wme_update = iwn_updateedca;
666 ic->ic_update_mcast = iwn_update_mcast;
667 ic->ic_scan_start = iwn_scan_start;
668 ic->ic_scan_end = iwn_scan_end;
669 ic->ic_set_channel = iwn_set_channel;
670 ic->ic_scan_curchan = iwn_scan_curchan;
671 ic->ic_scan_mindwell = iwn_scan_mindwell;
672 ic->ic_setregdomain = iwn_setregdomain;
674 iwn_radiotap_attach(sc);
676 callout_init_mtx(&sc->calib_to, &sc->sc_mtx, 0);
677 callout_init_mtx(&sc->watchdog_to, &sc->sc_mtx, 0);
678 TASK_INIT(&sc->sc_reinit_task, 0, iwn_hw_reset, sc);
679 TASK_INIT(&sc->sc_radioon_task, 0, iwn_radio_on, sc);
680 TASK_INIT(&sc->sc_radiooff_task, 0, iwn_radio_off, sc);
681 TASK_INIT(&sc->sc_panic_task, 0, iwn_panicked, sc);
683 sc->sc_tq = taskqueue_create("iwn_taskq", M_WAITOK,
684 taskqueue_thread_enqueue, &sc->sc_tq);
685 error = taskqueue_start_threads(&sc->sc_tq, 1, 0, "iwn_taskq");
687 device_printf(dev, "can't start threads, error %d\n", error);
691 iwn_sysctlattach(sc);
694 * Hook our interrupt after all initialization is complete.
696 error = bus_setup_intr(dev, sc->irq, INTR_TYPE_NET | INTR_MPSAFE,
697 NULL, iwn_intr, sc, &sc->sc_ih);
699 device_printf(dev, "can't establish interrupt, error %d\n",
705 device_printf(sc->sc_dev, "%s: rx_stats=%d, rx_stats_bt=%d\n",
707 sizeof(struct iwn_stats),
708 sizeof(struct iwn_stats_bt));
712 ieee80211_announce(ic);
713 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
717 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end in error\n",__func__);
722 * Define specific configuration based on device id and subdevice id
723 * pid : PCI device id
726 iwn_config_specific(struct iwn_softc *sc, uint16_t pid)
735 sc->base_params = &iwn4965_base_params;
736 sc->limits = &iwn4965_sensitivity_limits;
737 sc->fwname = "iwn4965fw";
738 /* Override chains masks, ROM is known to be broken. */
739 sc->txchainmask = IWN_ANT_AB;
740 sc->rxchainmask = IWN_ANT_ABC;
741 /* Enable normal btcoex */
742 sc->sc_flags |= IWN_FLAG_BTCOEX;
747 switch(sc->subdevice_id) {
748 case IWN_SDID_1000_1:
749 case IWN_SDID_1000_2:
750 case IWN_SDID_1000_3:
751 case IWN_SDID_1000_4:
752 case IWN_SDID_1000_5:
753 case IWN_SDID_1000_6:
754 case IWN_SDID_1000_7:
755 case IWN_SDID_1000_8:
756 case IWN_SDID_1000_9:
757 case IWN_SDID_1000_10:
758 case IWN_SDID_1000_11:
759 case IWN_SDID_1000_12:
760 sc->limits = &iwn1000_sensitivity_limits;
761 sc->base_params = &iwn1000_base_params;
762 sc->fwname = "iwn1000fw";
765 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
766 "0x%04x rev %d not supported (subdevice)\n", pid,
767 sc->subdevice_id,sc->hw_type);
776 sc->fwname = "iwn6000fw";
777 sc->limits = &iwn6000_sensitivity_limits;
778 switch(sc->subdevice_id) {
779 case IWN_SDID_6x00_1:
780 case IWN_SDID_6x00_2:
781 case IWN_SDID_6x00_8:
783 sc->base_params = &iwn_6000_base_params;
785 case IWN_SDID_6x00_3:
786 case IWN_SDID_6x00_6:
787 case IWN_SDID_6x00_9:
789 case IWN_SDID_6x00_4:
790 case IWN_SDID_6x00_7:
791 case IWN_SDID_6x00_10:
793 case IWN_SDID_6x00_5:
795 sc->base_params = &iwn_6000i_base_params;
796 sc->sc_flags |= IWN_FLAG_INTERNAL_PA;
797 sc->txchainmask = IWN_ANT_BC;
798 sc->rxchainmask = IWN_ANT_BC;
801 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
802 "0x%04x rev %d not supported (subdevice)\n", pid,
803 sc->subdevice_id,sc->hw_type);
810 switch(sc->subdevice_id) {
811 case IWN_SDID_6x05_1:
812 case IWN_SDID_6x05_4:
813 case IWN_SDID_6x05_6:
815 case IWN_SDID_6x05_2:
816 case IWN_SDID_6x05_5:
817 case IWN_SDID_6x05_7:
819 case IWN_SDID_6x05_3:
821 case IWN_SDID_6x05_8:
822 case IWN_SDID_6x05_9:
823 //iwl6005_2agn_sff_cfg
824 case IWN_SDID_6x05_10:
826 case IWN_SDID_6x05_11:
827 //iwl6005_2agn_mow1_cfg
828 case IWN_SDID_6x05_12:
829 //iwl6005_2agn_mow2_cfg
830 sc->fwname = "iwn6000g2afw";
831 sc->limits = &iwn6000_sensitivity_limits;
832 sc->base_params = &iwn_6000g2_base_params;
835 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
836 "0x%04x rev %d not supported (subdevice)\n", pid,
837 sc->subdevice_id,sc->hw_type);
844 switch(sc->subdevice_id) {
845 case IWN_SDID_6035_1:
846 case IWN_SDID_6035_2:
847 case IWN_SDID_6035_3:
848 case IWN_SDID_6035_4:
849 sc->fwname = "iwn6000g2bfw";
850 sc->limits = &iwn6235_sensitivity_limits;
851 sc->base_params = &iwn_6235_base_params;
854 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
855 "0x%04x rev %d not supported (subdevice)\n", pid,
856 sc->subdevice_id,sc->hw_type);
860 /* 6x50 WiFi/WiMax Series */
863 switch(sc->subdevice_id) {
864 case IWN_SDID_6050_1:
865 case IWN_SDID_6050_3:
866 case IWN_SDID_6050_5:
868 case IWN_SDID_6050_2:
869 case IWN_SDID_6050_4:
870 case IWN_SDID_6050_6:
872 sc->fwname = "iwn6050fw";
873 sc->txchainmask = IWN_ANT_AB;
874 sc->rxchainmask = IWN_ANT_AB;
875 sc->limits = &iwn6000_sensitivity_limits;
876 sc->base_params = &iwn_6050_base_params;
879 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
880 "0x%04x rev %d not supported (subdevice)\n", pid,
881 sc->subdevice_id,sc->hw_type);
885 /* 6150 WiFi/WiMax Series */
888 switch(sc->subdevice_id) {
889 case IWN_SDID_6150_1:
890 case IWN_SDID_6150_3:
891 case IWN_SDID_6150_5:
893 case IWN_SDID_6150_2:
894 case IWN_SDID_6150_4:
895 case IWN_SDID_6150_6:
897 sc->fwname = "iwn6050fw";
898 sc->limits = &iwn6000_sensitivity_limits;
899 sc->base_params = &iwn_6150_base_params;
902 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
903 "0x%04x rev %d not supported (subdevice)\n", pid,
904 sc->subdevice_id,sc->hw_type);
908 /* 6030 Series and 1030 Series */
913 switch(sc->subdevice_id) {
914 case IWN_SDID_x030_1:
915 case IWN_SDID_x030_3:
916 case IWN_SDID_x030_5:
918 case IWN_SDID_x030_2:
919 case IWN_SDID_x030_4:
920 case IWN_SDID_x030_6:
922 case IWN_SDID_x030_7:
923 case IWN_SDID_x030_10:
924 case IWN_SDID_x030_14:
926 case IWN_SDID_x030_8:
927 case IWN_SDID_x030_11:
928 case IWN_SDID_x030_15:
930 case IWN_SDID_x030_9:
931 case IWN_SDID_x030_12:
932 case IWN_SDID_x030_16:
934 case IWN_SDID_x030_13:
936 sc->fwname = "iwn6000g2bfw";
937 sc->limits = &iwn6000_sensitivity_limits;
938 sc->base_params = &iwn_6000g2b_base_params;
941 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
942 "0x%04x rev %d not supported (subdevice)\n", pid,
943 sc->subdevice_id,sc->hw_type);
947 /* 130 Series WiFi */
948 /* XXX: This series will need adjustment for rate.
949 * see rx_with_siso_diversity in linux kernel
953 switch(sc->subdevice_id) {
962 sc->fwname = "iwn6000g2bfw";
963 sc->limits = &iwn6000_sensitivity_limits;
964 sc->base_params = &iwn_6000g2b_base_params;
967 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
968 "0x%04x rev %d not supported (subdevice)\n", pid,
969 sc->subdevice_id,sc->hw_type);
973 /* 100 Series WiFi */
976 switch(sc->subdevice_id) {
983 sc->limits = &iwn1000_sensitivity_limits;
984 sc->base_params = &iwn1000_base_params;
985 sc->fwname = "iwn100fw";
988 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
989 "0x%04x rev %d not supported (subdevice)\n", pid,
990 sc->subdevice_id,sc->hw_type);
996 /* XXX: This series will need adjustment for rate.
997 * see rx_with_siso_diversity in linux kernel
1001 switch(sc->subdevice_id) {
1002 case IWN_SDID_105_1:
1003 case IWN_SDID_105_2:
1004 case IWN_SDID_105_3:
1006 case IWN_SDID_105_4:
1008 sc->limits = &iwn2030_sensitivity_limits;
1009 sc->base_params = &iwn2000_base_params;
1010 sc->fwname = "iwn105fw";
1013 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
1014 "0x%04x rev %d not supported (subdevice)\n", pid,
1015 sc->subdevice_id,sc->hw_type);
1021 /* XXX: This series will need adjustment for rate.
1022 * see rx_with_siso_diversity in linux kernel
1026 switch(sc->subdevice_id) {
1027 case IWN_SDID_135_1:
1028 case IWN_SDID_135_2:
1029 case IWN_SDID_135_3:
1030 sc->limits = &iwn2030_sensitivity_limits;
1031 sc->base_params = &iwn2030_base_params;
1032 sc->fwname = "iwn135fw";
1035 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
1036 "0x%04x rev %d not supported (subdevice)\n", pid,
1037 sc->subdevice_id,sc->hw_type);
1043 case IWN_DID_2x00_1:
1044 case IWN_DID_2x00_2:
1045 switch(sc->subdevice_id) {
1046 case IWN_SDID_2x00_1:
1047 case IWN_SDID_2x00_2:
1048 case IWN_SDID_2x00_3:
1050 case IWN_SDID_2x00_4:
1051 //iwl2000_2bgn_d_cfg
1052 sc->limits = &iwn2030_sensitivity_limits;
1053 sc->base_params = &iwn2000_base_params;
1054 sc->fwname = "iwn2000fw";
1057 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
1058 "0x%04x rev %d not supported (subdevice) \n",
1059 pid, sc->subdevice_id, sc->hw_type);
1064 case IWN_DID_2x30_1:
1065 case IWN_DID_2x30_2:
1066 switch(sc->subdevice_id) {
1067 case IWN_SDID_2x30_1:
1068 case IWN_SDID_2x30_3:
1069 case IWN_SDID_2x30_5:
1071 case IWN_SDID_2x30_2:
1072 case IWN_SDID_2x30_4:
1073 case IWN_SDID_2x30_6:
1075 sc->limits = &iwn2030_sensitivity_limits;
1076 sc->base_params = &iwn2030_base_params;
1077 sc->fwname = "iwn2030fw";
1080 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
1081 "0x%04x rev %d not supported (subdevice)\n", pid,
1082 sc->subdevice_id,sc->hw_type);
1087 case IWN_DID_5x00_1:
1088 case IWN_DID_5x00_2:
1089 case IWN_DID_5x00_3:
1090 case IWN_DID_5x00_4:
1091 sc->limits = &iwn5000_sensitivity_limits;
1092 sc->base_params = &iwn5000_base_params;
1093 sc->fwname = "iwn5000fw";
1094 switch(sc->subdevice_id) {
1095 case IWN_SDID_5x00_1:
1096 case IWN_SDID_5x00_2:
1097 case IWN_SDID_5x00_3:
1098 case IWN_SDID_5x00_4:
1099 case IWN_SDID_5x00_9:
1100 case IWN_SDID_5x00_10:
1101 case IWN_SDID_5x00_11:
1102 case IWN_SDID_5x00_12:
1103 case IWN_SDID_5x00_17:
1104 case IWN_SDID_5x00_18:
1105 case IWN_SDID_5x00_19:
1106 case IWN_SDID_5x00_20:
1108 sc->txchainmask = IWN_ANT_B;
1109 sc->rxchainmask = IWN_ANT_AB;
1111 case IWN_SDID_5x00_5:
1112 case IWN_SDID_5x00_6:
1113 case IWN_SDID_5x00_13:
1114 case IWN_SDID_5x00_14:
1115 case IWN_SDID_5x00_21:
1116 case IWN_SDID_5x00_22:
1118 sc->txchainmask = IWN_ANT_B;
1119 sc->rxchainmask = IWN_ANT_AB;
1121 case IWN_SDID_5x00_7:
1122 case IWN_SDID_5x00_8:
1123 case IWN_SDID_5x00_15:
1124 case IWN_SDID_5x00_16:
1125 case IWN_SDID_5x00_23:
1126 case IWN_SDID_5x00_24:
1128 sc->txchainmask = IWN_ANT_B;
1129 sc->rxchainmask = IWN_ANT_AB;
1131 case IWN_SDID_5x00_25:
1132 case IWN_SDID_5x00_26:
1133 case IWN_SDID_5x00_27:
1134 case IWN_SDID_5x00_28:
1135 case IWN_SDID_5x00_29:
1136 case IWN_SDID_5x00_30:
1137 case IWN_SDID_5x00_31:
1138 case IWN_SDID_5x00_32:
1139 case IWN_SDID_5x00_33:
1140 case IWN_SDID_5x00_34:
1141 case IWN_SDID_5x00_35:
1142 case IWN_SDID_5x00_36:
1144 sc->txchainmask = IWN_ANT_ABC;
1145 sc->rxchainmask = IWN_ANT_ABC;
1148 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
1149 "0x%04x rev %d not supported (subdevice)\n", pid,
1150 sc->subdevice_id,sc->hw_type);
1155 case IWN_DID_5x50_1:
1156 case IWN_DID_5x50_2:
1157 case IWN_DID_5x50_3:
1158 case IWN_DID_5x50_4:
1159 sc->limits = &iwn5000_sensitivity_limits;
1160 sc->base_params = &iwn5000_base_params;
1161 sc->fwname = "iwn5000fw";
1162 switch(sc->subdevice_id) {
1163 case IWN_SDID_5x50_1:
1164 case IWN_SDID_5x50_2:
1165 case IWN_SDID_5x50_3:
1167 sc->limits = &iwn5000_sensitivity_limits;
1168 sc->base_params = &iwn5000_base_params;
1169 sc->fwname = "iwn5000fw";
1171 case IWN_SDID_5x50_4:
1172 case IWN_SDID_5x50_5:
1173 case IWN_SDID_5x50_8:
1174 case IWN_SDID_5x50_9:
1175 case IWN_SDID_5x50_10:
1176 case IWN_SDID_5x50_11:
1178 case IWN_SDID_5x50_6:
1179 case IWN_SDID_5x50_7:
1180 case IWN_SDID_5x50_12:
1181 case IWN_SDID_5x50_13:
1183 sc->limits = &iwn5000_sensitivity_limits;
1184 sc->fwname = "iwn5150fw";
1185 sc->base_params = &iwn_5x50_base_params;
1188 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
1189 "0x%04x rev %d not supported (subdevice)\n", pid,
1190 sc->subdevice_id,sc->hw_type);
1195 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id : 0x%04x"
1196 "rev 0x%08x not supported (device)\n", pid, sc->subdevice_id,
1204 iwn4965_attach(struct iwn_softc *sc, uint16_t pid)
1206 struct iwn_ops *ops = &sc->ops;
1208 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
1209 ops->load_firmware = iwn4965_load_firmware;
1210 ops->read_eeprom = iwn4965_read_eeprom;
1211 ops->post_alive = iwn4965_post_alive;
1212 ops->nic_config = iwn4965_nic_config;
1213 ops->update_sched = iwn4965_update_sched;
1214 ops->get_temperature = iwn4965_get_temperature;
1215 ops->get_rssi = iwn4965_get_rssi;
1216 ops->set_txpower = iwn4965_set_txpower;
1217 ops->init_gains = iwn4965_init_gains;
1218 ops->set_gains = iwn4965_set_gains;
1219 ops->add_node = iwn4965_add_node;
1220 ops->tx_done = iwn4965_tx_done;
1221 ops->ampdu_tx_start = iwn4965_ampdu_tx_start;
1222 ops->ampdu_tx_stop = iwn4965_ampdu_tx_stop;
1223 sc->ntxqs = IWN4965_NTXQUEUES;
1224 sc->firstaggqueue = IWN4965_FIRSTAGGQUEUE;
1225 sc->ndmachnls = IWN4965_NDMACHNLS;
1226 sc->broadcast_id = IWN4965_ID_BROADCAST;
1227 sc->rxonsz = IWN4965_RXONSZ;
1228 sc->schedsz = IWN4965_SCHEDSZ;
1229 sc->fw_text_maxsz = IWN4965_FW_TEXT_MAXSZ;
1230 sc->fw_data_maxsz = IWN4965_FW_DATA_MAXSZ;
1231 sc->fwsz = IWN4965_FWSZ;
1232 sc->sched_txfact_addr = IWN4965_SCHED_TXFACT;
1233 sc->limits = &iwn4965_sensitivity_limits;
1234 sc->fwname = "iwn4965fw";
1235 /* Override chains masks, ROM is known to be broken. */
1236 sc->txchainmask = IWN_ANT_AB;
1237 sc->rxchainmask = IWN_ANT_ABC;
1238 /* Enable normal btcoex */
1239 sc->sc_flags |= IWN_FLAG_BTCOEX;
1241 DPRINTF(sc, IWN_DEBUG_TRACE, "%s: end\n",__func__);
1247 iwn5000_attach(struct iwn_softc *sc, uint16_t pid)
1249 struct iwn_ops *ops = &sc->ops;
1251 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
1253 ops->load_firmware = iwn5000_load_firmware;
1254 ops->read_eeprom = iwn5000_read_eeprom;
1255 ops->post_alive = iwn5000_post_alive;
1256 ops->nic_config = iwn5000_nic_config;
1257 ops->update_sched = iwn5000_update_sched;
1258 ops->get_temperature = iwn5000_get_temperature;
1259 ops->get_rssi = iwn5000_get_rssi;
1260 ops->set_txpower = iwn5000_set_txpower;
1261 ops->init_gains = iwn5000_init_gains;
1262 ops->set_gains = iwn5000_set_gains;
1263 ops->add_node = iwn5000_add_node;
1264 ops->tx_done = iwn5000_tx_done;
1265 ops->ampdu_tx_start = iwn5000_ampdu_tx_start;
1266 ops->ampdu_tx_stop = iwn5000_ampdu_tx_stop;
1267 sc->ntxqs = IWN5000_NTXQUEUES;
1268 sc->firstaggqueue = IWN5000_FIRSTAGGQUEUE;
1269 sc->ndmachnls = IWN5000_NDMACHNLS;
1270 sc->broadcast_id = IWN5000_ID_BROADCAST;
1271 sc->rxonsz = IWN5000_RXONSZ;
1272 sc->schedsz = IWN5000_SCHEDSZ;
1273 sc->fw_text_maxsz = IWN5000_FW_TEXT_MAXSZ;
1274 sc->fw_data_maxsz = IWN5000_FW_DATA_MAXSZ;
1275 sc->fwsz = IWN5000_FWSZ;
1276 sc->sched_txfact_addr = IWN5000_SCHED_TXFACT;
1277 sc->reset_noise_gain = IWN5000_PHY_CALIB_RESET_NOISE_GAIN;
1278 sc->noise_gain = IWN5000_PHY_CALIB_NOISE_GAIN;
1284 * Attach the interface to 802.11 radiotap.
1287 iwn_radiotap_attach(struct iwn_softc *sc)
1289 struct ifnet *ifp = sc->sc_ifp;
1290 struct ieee80211com *ic = ifp->if_l2com;
1291 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
1292 ieee80211_radiotap_attach(ic,
1293 &sc->sc_txtap.wt_ihdr, sizeof(sc->sc_txtap),
1294 IWN_TX_RADIOTAP_PRESENT,
1295 &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap),
1296 IWN_RX_RADIOTAP_PRESENT);
1297 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
1301 iwn_sysctlattach(struct iwn_softc *sc)
1304 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->sc_dev);
1305 struct sysctl_oid *tree = device_get_sysctl_tree(sc->sc_dev);
1307 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
1308 "debug", CTLFLAG_RW, &sc->sc_debug, sc->sc_debug,
1309 "control debugging printfs");
1313 static struct ieee80211vap *
1314 iwn_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit,
1315 enum ieee80211_opmode opmode, int flags,
1316 const uint8_t bssid[IEEE80211_ADDR_LEN],
1317 const uint8_t mac[IEEE80211_ADDR_LEN])
1319 struct iwn_vap *ivp;
1320 struct ieee80211vap *vap;
1321 uint8_t mac1[IEEE80211_ADDR_LEN];
1322 struct iwn_softc *sc = ic->ic_ifp->if_softc;
1324 if (!TAILQ_EMPTY(&ic->ic_vaps)) /* only one at a time */
1327 IEEE80211_ADDR_COPY(mac1, mac);
1329 ivp = (struct iwn_vap *) malloc(sizeof(struct iwn_vap),
1330 M_80211_VAP, M_NOWAIT | M_ZERO);
1334 ieee80211_vap_setup(ic, vap, name, unit, opmode, flags, bssid, mac1);
1335 ivp->ctx = IWN_RXON_BSS_CTX;
1336 IEEE80211_ADDR_COPY(ivp->macaddr, mac1);
1337 vap->iv_bmissthreshold = 10; /* override default */
1338 /* Override with driver methods. */
1339 ivp->iv_newstate = vap->iv_newstate;
1340 vap->iv_newstate = iwn_newstate;
1341 sc->ivap[IWN_RXON_BSS_CTX] = vap;
1343 ieee80211_ratectl_init(vap);
1344 /* Complete setup. */
1345 ieee80211_vap_attach(vap, iwn_media_change, ieee80211_media_status);
1346 ic->ic_opmode = opmode;
1351 iwn_vap_delete(struct ieee80211vap *vap)
1353 struct iwn_vap *ivp = IWN_VAP(vap);
1355 ieee80211_ratectl_deinit(vap);
1356 ieee80211_vap_detach(vap);
1357 free(ivp, M_80211_VAP);
1361 iwn_detach(device_t dev)
1363 struct iwn_softc *sc = device_get_softc(dev);
1364 struct ifnet *ifp = sc->sc_ifp;
1365 struct ieee80211com *ic;
1368 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
1373 ieee80211_draintask(ic, &sc->sc_reinit_task);
1374 ieee80211_draintask(ic, &sc->sc_radioon_task);
1375 ieee80211_draintask(ic, &sc->sc_radiooff_task);
1379 taskqueue_drain_all(sc->sc_tq);
1380 taskqueue_free(sc->sc_tq);
1382 callout_drain(&sc->watchdog_to);
1383 callout_drain(&sc->calib_to);
1384 ieee80211_ifdetach(ic);
1387 /* Uninstall interrupt handler. */
1388 if (sc->irq != NULL) {
1389 bus_teardown_intr(dev, sc->irq, sc->sc_ih);
1390 bus_release_resource(dev, SYS_RES_IRQ, rman_get_rid(sc->irq),
1392 pci_release_msi(dev);
1395 /* Free DMA resources. */
1396 iwn_free_rx_ring(sc, &sc->rxq);
1397 for (qid = 0; qid < sc->ntxqs; qid++)
1398 iwn_free_tx_ring(sc, &sc->txq[qid]);
1401 if (sc->ict != NULL)
1405 if (sc->mem != NULL)
1406 bus_release_resource(dev, SYS_RES_MEMORY,
1407 rman_get_rid(sc->mem), sc->mem);
1412 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n", __func__);
1413 IWN_LOCK_DESTROY(sc);
1418 iwn_shutdown(device_t dev)
1420 struct iwn_softc *sc = device_get_softc(dev);
1427 iwn_suspend(device_t dev)
1429 struct iwn_softc *sc = device_get_softc(dev);
1430 struct ieee80211com *ic = sc->sc_ifp->if_l2com;
1432 ieee80211_suspend_all(ic);
1437 iwn_resume(device_t dev)
1439 struct iwn_softc *sc = device_get_softc(dev);
1440 struct ieee80211com *ic = sc->sc_ifp->if_l2com;
1442 /* Clear device-specific "PCI retry timeout" register (41h). */
1443 pci_write_config(dev, 0x41, 0, 1);
1445 ieee80211_resume_all(ic);
1450 iwn_nic_lock(struct iwn_softc *sc)
1454 /* Request exclusive access to NIC. */
1455 IWN_SETBITS(sc, IWN_GP_CNTRL, IWN_GP_CNTRL_MAC_ACCESS_REQ);
1457 /* Spin until we actually get the lock. */
1458 for (ntries = 0; ntries < 1000; ntries++) {
1459 if ((IWN_READ(sc, IWN_GP_CNTRL) &
1460 (IWN_GP_CNTRL_MAC_ACCESS_ENA | IWN_GP_CNTRL_SLEEP)) ==
1461 IWN_GP_CNTRL_MAC_ACCESS_ENA)
1468 static __inline void
1469 iwn_nic_unlock(struct iwn_softc *sc)
1471 IWN_CLRBITS(sc, IWN_GP_CNTRL, IWN_GP_CNTRL_MAC_ACCESS_REQ);
1474 static __inline uint32_t
1475 iwn_prph_read(struct iwn_softc *sc, uint32_t addr)
1477 IWN_WRITE(sc, IWN_PRPH_RADDR, IWN_PRPH_DWORD | addr);
1478 IWN_BARRIER_READ_WRITE(sc);
1479 return IWN_READ(sc, IWN_PRPH_RDATA);
1482 static __inline void
1483 iwn_prph_write(struct iwn_softc *sc, uint32_t addr, uint32_t data)
1485 IWN_WRITE(sc, IWN_PRPH_WADDR, IWN_PRPH_DWORD | addr);
1486 IWN_BARRIER_WRITE(sc);
1487 IWN_WRITE(sc, IWN_PRPH_WDATA, data);
1490 static __inline void
1491 iwn_prph_setbits(struct iwn_softc *sc, uint32_t addr, uint32_t mask)
1493 iwn_prph_write(sc, addr, iwn_prph_read(sc, addr) | mask);
1496 static __inline void
1497 iwn_prph_clrbits(struct iwn_softc *sc, uint32_t addr, uint32_t mask)
1499 iwn_prph_write(sc, addr, iwn_prph_read(sc, addr) & ~mask);
1502 static __inline void
1503 iwn_prph_write_region_4(struct iwn_softc *sc, uint32_t addr,
1504 const uint32_t *data, int count)
1506 for (; count > 0; count--, data++, addr += 4)
1507 iwn_prph_write(sc, addr, *data);
1510 static __inline uint32_t
1511 iwn_mem_read(struct iwn_softc *sc, uint32_t addr)
1513 IWN_WRITE(sc, IWN_MEM_RADDR, addr);
1514 IWN_BARRIER_READ_WRITE(sc);
1515 return IWN_READ(sc, IWN_MEM_RDATA);
1518 static __inline void
1519 iwn_mem_write(struct iwn_softc *sc, uint32_t addr, uint32_t data)
1521 IWN_WRITE(sc, IWN_MEM_WADDR, addr);
1522 IWN_BARRIER_WRITE(sc);
1523 IWN_WRITE(sc, IWN_MEM_WDATA, data);
1526 static __inline void
1527 iwn_mem_write_2(struct iwn_softc *sc, uint32_t addr, uint16_t data)
1531 tmp = iwn_mem_read(sc, addr & ~3);
1533 tmp = (tmp & 0x0000ffff) | data << 16;
1535 tmp = (tmp & 0xffff0000) | data;
1536 iwn_mem_write(sc, addr & ~3, tmp);
1539 static __inline void
1540 iwn_mem_read_region_4(struct iwn_softc *sc, uint32_t addr, uint32_t *data,
1543 for (; count > 0; count--, addr += 4)
1544 *data++ = iwn_mem_read(sc, addr);
1547 static __inline void
1548 iwn_mem_set_region_4(struct iwn_softc *sc, uint32_t addr, uint32_t val,
1551 for (; count > 0; count--, addr += 4)
1552 iwn_mem_write(sc, addr, val);
1556 iwn_eeprom_lock(struct iwn_softc *sc)
1560 for (i = 0; i < 100; i++) {
1561 /* Request exclusive access to EEPROM. */
1562 IWN_SETBITS(sc, IWN_HW_IF_CONFIG,
1563 IWN_HW_IF_CONFIG_EEPROM_LOCKED);
1565 /* Spin until we actually get the lock. */
1566 for (ntries = 0; ntries < 100; ntries++) {
1567 if (IWN_READ(sc, IWN_HW_IF_CONFIG) &
1568 IWN_HW_IF_CONFIG_EEPROM_LOCKED)
1573 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end timeout\n", __func__);
1577 static __inline void
1578 iwn_eeprom_unlock(struct iwn_softc *sc)
1580 IWN_CLRBITS(sc, IWN_HW_IF_CONFIG, IWN_HW_IF_CONFIG_EEPROM_LOCKED);
1584 * Initialize access by host to One Time Programmable ROM.
1585 * NB: This kind of ROM can be found on 1000 or 6000 Series only.
1588 iwn_init_otprom(struct iwn_softc *sc)
1590 uint16_t prev, base, next;
1593 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
1595 /* Wait for clock stabilization before accessing prph. */
1596 if ((error = iwn_clock_wait(sc)) != 0)
1599 if ((error = iwn_nic_lock(sc)) != 0)
1601 iwn_prph_setbits(sc, IWN_APMG_PS, IWN_APMG_PS_RESET_REQ);
1603 iwn_prph_clrbits(sc, IWN_APMG_PS, IWN_APMG_PS_RESET_REQ);
1606 /* Set auto clock gate disable bit for HW with OTP shadow RAM. */
1607 if (sc->base_params->shadow_ram_support) {
1608 IWN_SETBITS(sc, IWN_DBG_LINK_PWR_MGMT,
1609 IWN_RESET_LINK_PWR_MGMT_DIS);
1611 IWN_CLRBITS(sc, IWN_EEPROM_GP, IWN_EEPROM_GP_IF_OWNER);
1612 /* Clear ECC status. */
1613 IWN_SETBITS(sc, IWN_OTP_GP,
1614 IWN_OTP_GP_ECC_CORR_STTS | IWN_OTP_GP_ECC_UNCORR_STTS);
1617 * Find the block before last block (contains the EEPROM image)
1618 * for HW without OTP shadow RAM.
1620 if (! sc->base_params->shadow_ram_support) {
1621 /* Switch to absolute addressing mode. */
1622 IWN_CLRBITS(sc, IWN_OTP_GP, IWN_OTP_GP_RELATIVE_ACCESS);
1624 for (count = 0; count < sc->base_params->max_ll_items;
1626 error = iwn_read_prom_data(sc, base, &next, 2);
1629 if (next == 0) /* End of linked-list. */
1632 base = le16toh(next);
1634 if (count == 0 || count == sc->base_params->max_ll_items)
1636 /* Skip "next" word. */
1637 sc->prom_base = prev + 1;
1640 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
1646 iwn_read_prom_data(struct iwn_softc *sc, uint32_t addr, void *data, int count)
1648 uint8_t *out = data;
1652 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
1654 addr += sc->prom_base;
1655 for (; count > 0; count -= 2, addr++) {
1656 IWN_WRITE(sc, IWN_EEPROM, addr << 2);
1657 for (ntries = 0; ntries < 10; ntries++) {
1658 val = IWN_READ(sc, IWN_EEPROM);
1659 if (val & IWN_EEPROM_READ_VALID)
1664 device_printf(sc->sc_dev,
1665 "timeout reading ROM at 0x%x\n", addr);
1668 if (sc->sc_flags & IWN_FLAG_HAS_OTPROM) {
1669 /* OTPROM, check for ECC errors. */
1670 tmp = IWN_READ(sc, IWN_OTP_GP);
1671 if (tmp & IWN_OTP_GP_ECC_UNCORR_STTS) {
1672 device_printf(sc->sc_dev,
1673 "OTPROM ECC error at 0x%x\n", addr);
1676 if (tmp & IWN_OTP_GP_ECC_CORR_STTS) {
1677 /* Correctable ECC error, clear bit. */
1678 IWN_SETBITS(sc, IWN_OTP_GP,
1679 IWN_OTP_GP_ECC_CORR_STTS);
1687 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
1693 iwn_dma_map_addr(void *arg, bus_dma_segment_t *segs, int nsegs, int error)
1697 KASSERT(nsegs == 1, ("too many DMA segments, %d should be 1", nsegs));
1698 *(bus_addr_t *)arg = segs[0].ds_addr;
1702 iwn_dma_contig_alloc(struct iwn_softc *sc, struct iwn_dma_info *dma,
1703 void **kvap, bus_size_t size, bus_size_t alignment)
1710 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), alignment,
1711 0, BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, size,
1712 1, size, BUS_DMA_NOWAIT, NULL, NULL, &dma->tag);
1716 error = bus_dmamem_alloc(dma->tag, (void **)&dma->vaddr,
1717 BUS_DMA_NOWAIT | BUS_DMA_ZERO | BUS_DMA_COHERENT, &dma->map);
1721 error = bus_dmamap_load(dma->tag, dma->map, dma->vaddr, size,
1722 iwn_dma_map_addr, &dma->paddr, BUS_DMA_NOWAIT);
1726 bus_dmamap_sync(dma->tag, dma->map, BUS_DMASYNC_PREWRITE);
1733 fail: iwn_dma_contig_free(dma);
1738 iwn_dma_contig_free(struct iwn_dma_info *dma)
1740 if (dma->vaddr != NULL) {
1741 bus_dmamap_sync(dma->tag, dma->map,
1742 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
1743 bus_dmamap_unload(dma->tag, dma->map);
1744 bus_dmamem_free(dma->tag, dma->vaddr, dma->map);
1747 if (dma->tag != NULL) {
1748 bus_dma_tag_destroy(dma->tag);
1754 iwn_alloc_sched(struct iwn_softc *sc)
1756 /* TX scheduler rings must be aligned on a 1KB boundary. */
1757 return iwn_dma_contig_alloc(sc, &sc->sched_dma, (void **)&sc->sched,
1762 iwn_free_sched(struct iwn_softc *sc)
1764 iwn_dma_contig_free(&sc->sched_dma);
1768 iwn_alloc_kw(struct iwn_softc *sc)
1770 /* "Keep Warm" page must be aligned on a 4KB boundary. */
1771 return iwn_dma_contig_alloc(sc, &sc->kw_dma, NULL, 4096, 4096);
1775 iwn_free_kw(struct iwn_softc *sc)
1777 iwn_dma_contig_free(&sc->kw_dma);
1781 iwn_alloc_ict(struct iwn_softc *sc)
1783 /* ICT table must be aligned on a 4KB boundary. */
1784 return iwn_dma_contig_alloc(sc, &sc->ict_dma, (void **)&sc->ict,
1785 IWN_ICT_SIZE, 4096);
1789 iwn_free_ict(struct iwn_softc *sc)
1791 iwn_dma_contig_free(&sc->ict_dma);
1795 iwn_alloc_fwmem(struct iwn_softc *sc)
1797 /* Must be aligned on a 16-byte boundary. */
1798 return iwn_dma_contig_alloc(sc, &sc->fw_dma, NULL, sc->fwsz, 16);
1802 iwn_free_fwmem(struct iwn_softc *sc)
1804 iwn_dma_contig_free(&sc->fw_dma);
1808 iwn_alloc_rx_ring(struct iwn_softc *sc, struct iwn_rx_ring *ring)
1815 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
1817 /* Allocate RX descriptors (256-byte aligned). */
1818 size = IWN_RX_RING_COUNT * sizeof (uint32_t);
1819 error = iwn_dma_contig_alloc(sc, &ring->desc_dma, (void **)&ring->desc,
1822 device_printf(sc->sc_dev,
1823 "%s: could not allocate RX ring DMA memory, error %d\n",
1828 /* Allocate RX status area (16-byte aligned). */
1829 error = iwn_dma_contig_alloc(sc, &ring->stat_dma, (void **)&ring->stat,
1830 sizeof (struct iwn_rx_status), 16);
1832 device_printf(sc->sc_dev,
1833 "%s: could not allocate RX status DMA memory, error %d\n",
1838 /* Create RX buffer DMA tag. */
1839 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 1, 0,
1840 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL,
1841 IWN_RBUF_SIZE, 1, IWN_RBUF_SIZE, BUS_DMA_NOWAIT, NULL, NULL,
1844 device_printf(sc->sc_dev,
1845 "%s: could not create RX buf DMA tag, error %d\n",
1851 * Allocate and map RX buffers.
1853 for (i = 0; i < IWN_RX_RING_COUNT; i++) {
1854 struct iwn_rx_data *data = &ring->data[i];
1857 error = bus_dmamap_create(ring->data_dmat, 0, &data->map);
1859 device_printf(sc->sc_dev,
1860 "%s: could not create RX buf DMA map, error %d\n",
1865 data->m = m_getjcl(M_NOWAIT, MT_DATA, M_PKTHDR,
1867 if (data->m == NULL) {
1868 device_printf(sc->sc_dev,
1869 "%s: could not allocate RX mbuf\n", __func__);
1874 error = bus_dmamap_load(ring->data_dmat, data->map,
1875 mtod(data->m, void *), IWN_RBUF_SIZE, iwn_dma_map_addr,
1876 &paddr, BUS_DMA_NOWAIT);
1877 if (error != 0 && error != EFBIG) {
1878 device_printf(sc->sc_dev,
1879 "%s: can't not map mbuf, error %d\n", __func__,
1884 /* Set physical address of RX buffer (256-byte aligned). */
1885 ring->desc[i] = htole32(paddr >> 8);
1888 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
1889 BUS_DMASYNC_PREWRITE);
1891 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
1895 fail: iwn_free_rx_ring(sc, ring);
1897 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end in error\n",__func__);
1903 iwn_reset_rx_ring(struct iwn_softc *sc, struct iwn_rx_ring *ring)
1907 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
1909 if (iwn_nic_lock(sc) == 0) {
1910 IWN_WRITE(sc, IWN_FH_RX_CONFIG, 0);
1911 for (ntries = 0; ntries < 1000; ntries++) {
1912 if (IWN_READ(sc, IWN_FH_RX_STATUS) &
1913 IWN_FH_RX_STATUS_IDLE)
1920 sc->last_rx_valid = 0;
1924 iwn_free_rx_ring(struct iwn_softc *sc, struct iwn_rx_ring *ring)
1928 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s \n", __func__);
1930 iwn_dma_contig_free(&ring->desc_dma);
1931 iwn_dma_contig_free(&ring->stat_dma);
1933 for (i = 0; i < IWN_RX_RING_COUNT; i++) {
1934 struct iwn_rx_data *data = &ring->data[i];
1936 if (data->m != NULL) {
1937 bus_dmamap_sync(ring->data_dmat, data->map,
1938 BUS_DMASYNC_POSTREAD);
1939 bus_dmamap_unload(ring->data_dmat, data->map);
1943 if (data->map != NULL)
1944 bus_dmamap_destroy(ring->data_dmat, data->map);
1946 if (ring->data_dmat != NULL) {
1947 bus_dma_tag_destroy(ring->data_dmat);
1948 ring->data_dmat = NULL;
1953 iwn_alloc_tx_ring(struct iwn_softc *sc, struct iwn_tx_ring *ring, int qid)
1963 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
1965 /* Allocate TX descriptors (256-byte aligned). */
1966 size = IWN_TX_RING_COUNT * sizeof (struct iwn_tx_desc);
1967 error = iwn_dma_contig_alloc(sc, &ring->desc_dma, (void **)&ring->desc,
1970 device_printf(sc->sc_dev,
1971 "%s: could not allocate TX ring DMA memory, error %d\n",
1976 size = IWN_TX_RING_COUNT * sizeof (struct iwn_tx_cmd);
1977 error = iwn_dma_contig_alloc(sc, &ring->cmd_dma, (void **)&ring->cmd,
1980 device_printf(sc->sc_dev,
1981 "%s: could not allocate TX cmd DMA memory, error %d\n",
1986 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 1, 0,
1987 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES,
1988 IWN_MAX_SCATTER - 1, MCLBYTES, BUS_DMA_NOWAIT, NULL, NULL,
1991 device_printf(sc->sc_dev,
1992 "%s: could not create TX buf DMA tag, error %d\n",
1997 paddr = ring->cmd_dma.paddr;
1998 for (i = 0; i < IWN_TX_RING_COUNT; i++) {
1999 struct iwn_tx_data *data = &ring->data[i];
2001 data->cmd_paddr = paddr;
2002 data->scratch_paddr = paddr + 12;
2003 paddr += sizeof (struct iwn_tx_cmd);
2005 error = bus_dmamap_create(ring->data_dmat, 0, &data->map);
2007 device_printf(sc->sc_dev,
2008 "%s: could not create TX buf DMA map, error %d\n",
2014 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
2018 fail: iwn_free_tx_ring(sc, ring);
2019 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end in error\n", __func__);
2024 iwn_reset_tx_ring(struct iwn_softc *sc, struct iwn_tx_ring *ring)
2028 DPRINTF(sc, IWN_DEBUG_TRACE, "->doing %s \n", __func__);
2030 for (i = 0; i < IWN_TX_RING_COUNT; i++) {
2031 struct iwn_tx_data *data = &ring->data[i];
2033 if (data->m != NULL) {
2034 bus_dmamap_sync(ring->data_dmat, data->map,
2035 BUS_DMASYNC_POSTWRITE);
2036 bus_dmamap_unload(ring->data_dmat, data->map);
2041 /* Clear TX descriptors. */
2042 memset(ring->desc, 0, ring->desc_dma.size);
2043 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
2044 BUS_DMASYNC_PREWRITE);
2045 sc->qfullmsk &= ~(1 << ring->qid);
2051 iwn_free_tx_ring(struct iwn_softc *sc, struct iwn_tx_ring *ring)
2055 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s \n", __func__);
2057 iwn_dma_contig_free(&ring->desc_dma);
2058 iwn_dma_contig_free(&ring->cmd_dma);
2060 for (i = 0; i < IWN_TX_RING_COUNT; i++) {
2061 struct iwn_tx_data *data = &ring->data[i];
2063 if (data->m != NULL) {
2064 bus_dmamap_sync(ring->data_dmat, data->map,
2065 BUS_DMASYNC_POSTWRITE);
2066 bus_dmamap_unload(ring->data_dmat, data->map);
2069 if (data->map != NULL)
2070 bus_dmamap_destroy(ring->data_dmat, data->map);
2072 if (ring->data_dmat != NULL) {
2073 bus_dma_tag_destroy(ring->data_dmat);
2074 ring->data_dmat = NULL;
2079 iwn5000_ict_reset(struct iwn_softc *sc)
2081 /* Disable interrupts. */
2082 IWN_WRITE(sc, IWN_INT_MASK, 0);
2084 /* Reset ICT table. */
2085 memset(sc->ict, 0, IWN_ICT_SIZE);
2088 /* Set physical address of ICT table (4KB aligned). */
2089 DPRINTF(sc, IWN_DEBUG_RESET, "%s: enabling ICT\n", __func__);
2090 IWN_WRITE(sc, IWN_DRAM_INT_TBL, IWN_DRAM_INT_TBL_ENABLE |
2091 IWN_DRAM_INT_TBL_WRAP_CHECK | sc->ict_dma.paddr >> 12);
2093 /* Enable periodic RX interrupt. */
2094 sc->int_mask |= IWN_INT_RX_PERIODIC;
2095 /* Switch to ICT interrupt mode in driver. */
2096 sc->sc_flags |= IWN_FLAG_USE_ICT;
2098 /* Re-enable interrupts. */
2099 IWN_WRITE(sc, IWN_INT, 0xffffffff);
2100 IWN_WRITE(sc, IWN_INT_MASK, sc->int_mask);
2104 iwn_read_eeprom(struct iwn_softc *sc, uint8_t macaddr[IEEE80211_ADDR_LEN])
2106 struct iwn_ops *ops = &sc->ops;
2110 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
2112 /* Check whether adapter has an EEPROM or an OTPROM. */
2113 if (sc->hw_type >= IWN_HW_REV_TYPE_1000 &&
2114 (IWN_READ(sc, IWN_OTP_GP) & IWN_OTP_GP_DEV_SEL_OTP))
2115 sc->sc_flags |= IWN_FLAG_HAS_OTPROM;
2116 DPRINTF(sc, IWN_DEBUG_RESET, "%s found\n",
2117 (sc->sc_flags & IWN_FLAG_HAS_OTPROM) ? "OTPROM" : "EEPROM");
2119 /* Adapter has to be powered on for EEPROM access to work. */
2120 if ((error = iwn_apm_init(sc)) != 0) {
2121 device_printf(sc->sc_dev,
2122 "%s: could not power ON adapter, error %d\n", __func__,
2127 if ((IWN_READ(sc, IWN_EEPROM_GP) & 0x7) == 0) {
2128 device_printf(sc->sc_dev, "%s: bad ROM signature\n", __func__);
2131 if ((error = iwn_eeprom_lock(sc)) != 0) {
2132 device_printf(sc->sc_dev, "%s: could not lock ROM, error %d\n",
2136 if (sc->sc_flags & IWN_FLAG_HAS_OTPROM) {
2137 if ((error = iwn_init_otprom(sc)) != 0) {
2138 device_printf(sc->sc_dev,
2139 "%s: could not initialize OTPROM, error %d\n",
2145 iwn_read_prom_data(sc, IWN_EEPROM_SKU_CAP, &val, 2);
2146 DPRINTF(sc, IWN_DEBUG_RESET, "SKU capabilities=0x%04x\n", le16toh(val));
2147 /* Check if HT support is bonded out. */
2148 if (val & htole16(IWN_EEPROM_SKU_CAP_11N))
2149 sc->sc_flags |= IWN_FLAG_HAS_11N;
2151 iwn_read_prom_data(sc, IWN_EEPROM_RFCFG, &val, 2);
2152 sc->rfcfg = le16toh(val);
2153 DPRINTF(sc, IWN_DEBUG_RESET, "radio config=0x%04x\n", sc->rfcfg);
2154 /* Read Tx/Rx chains from ROM unless it's known to be broken. */
2155 if (sc->txchainmask == 0)
2156 sc->txchainmask = IWN_RFCFG_TXANTMSK(sc->rfcfg);
2157 if (sc->rxchainmask == 0)
2158 sc->rxchainmask = IWN_RFCFG_RXANTMSK(sc->rfcfg);
2160 /* Read MAC address. */
2161 iwn_read_prom_data(sc, IWN_EEPROM_MAC, macaddr, 6);
2163 /* Read adapter-specific information from EEPROM. */
2164 ops->read_eeprom(sc);
2166 iwn_apm_stop(sc); /* Power OFF adapter. */
2168 iwn_eeprom_unlock(sc);
2170 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
2176 iwn4965_read_eeprom(struct iwn_softc *sc)
2182 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
2184 /* Read regulatory domain (4 ASCII characters). */
2185 iwn_read_prom_data(sc, IWN4965_EEPROM_DOMAIN, sc->eeprom_domain, 4);
2187 /* Read the list of authorized channels (20MHz ones only). */
2188 for (i = 0; i < IWN_NBANDS - 1; i++) {
2189 addr = iwn4965_regulatory_bands[i];
2190 iwn_read_eeprom_channels(sc, i, addr);
2193 /* Read maximum allowed TX power for 2GHz and 5GHz bands. */
2194 iwn_read_prom_data(sc, IWN4965_EEPROM_MAXPOW, &val, 2);
2195 sc->maxpwr2GHz = val & 0xff;
2196 sc->maxpwr5GHz = val >> 8;
2197 /* Check that EEPROM values are within valid range. */
2198 if (sc->maxpwr5GHz < 20 || sc->maxpwr5GHz > 50)
2199 sc->maxpwr5GHz = 38;
2200 if (sc->maxpwr2GHz < 20 || sc->maxpwr2GHz > 50)
2201 sc->maxpwr2GHz = 38;
2202 DPRINTF(sc, IWN_DEBUG_RESET, "maxpwr 2GHz=%d 5GHz=%d\n",
2203 sc->maxpwr2GHz, sc->maxpwr5GHz);
2205 /* Read samples for each TX power group. */
2206 iwn_read_prom_data(sc, IWN4965_EEPROM_BANDS, sc->bands,
2209 /* Read voltage at which samples were taken. */
2210 iwn_read_prom_data(sc, IWN4965_EEPROM_VOLTAGE, &val, 2);
2211 sc->eeprom_voltage = (int16_t)le16toh(val);
2212 DPRINTF(sc, IWN_DEBUG_RESET, "voltage=%d (in 0.3V)\n",
2213 sc->eeprom_voltage);
2216 /* Print samples. */
2217 if (sc->sc_debug & IWN_DEBUG_ANY) {
2218 for (i = 0; i < IWN_NBANDS - 1; i++)
2219 iwn4965_print_power_group(sc, i);
2223 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
2228 iwn4965_print_power_group(struct iwn_softc *sc, int i)
2230 struct iwn4965_eeprom_band *band = &sc->bands[i];
2231 struct iwn4965_eeprom_chan_samples *chans = band->chans;
2234 printf("===band %d===\n", i);
2235 printf("chan lo=%d, chan hi=%d\n", band->lo, band->hi);
2236 printf("chan1 num=%d\n", chans[0].num);
2237 for (c = 0; c < 2; c++) {
2238 for (j = 0; j < IWN_NSAMPLES; j++) {
2239 printf("chain %d, sample %d: temp=%d gain=%d "
2240 "power=%d pa_det=%d\n", c, j,
2241 chans[0].samples[c][j].temp,
2242 chans[0].samples[c][j].gain,
2243 chans[0].samples[c][j].power,
2244 chans[0].samples[c][j].pa_det);
2247 printf("chan2 num=%d\n", chans[1].num);
2248 for (c = 0; c < 2; c++) {
2249 for (j = 0; j < IWN_NSAMPLES; j++) {
2250 printf("chain %d, sample %d: temp=%d gain=%d "
2251 "power=%d pa_det=%d\n", c, j,
2252 chans[1].samples[c][j].temp,
2253 chans[1].samples[c][j].gain,
2254 chans[1].samples[c][j].power,
2255 chans[1].samples[c][j].pa_det);
2262 iwn5000_read_eeprom(struct iwn_softc *sc)
2264 struct iwn5000_eeprom_calib_hdr hdr;
2266 uint32_t base, addr;
2270 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
2272 /* Read regulatory domain (4 ASCII characters). */
2273 iwn_read_prom_data(sc, IWN5000_EEPROM_REG, &val, 2);
2274 base = le16toh(val);
2275 iwn_read_prom_data(sc, base + IWN5000_EEPROM_DOMAIN,
2276 sc->eeprom_domain, 4);
2278 /* Read the list of authorized channels (20MHz ones only). */
2279 for (i = 0; i < IWN_NBANDS - 1; i++) {
2280 addr = base + sc->base_params->regulatory_bands[i];
2281 iwn_read_eeprom_channels(sc, i, addr);
2284 /* Read enhanced TX power information for 6000 Series. */
2285 if (sc->base_params->enhanced_TX_power)
2286 iwn_read_eeprom_enhinfo(sc);
2288 iwn_read_prom_data(sc, IWN5000_EEPROM_CAL, &val, 2);
2289 base = le16toh(val);
2290 iwn_read_prom_data(sc, base, &hdr, sizeof hdr);
2291 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
2292 "%s: calib version=%u pa type=%u voltage=%u\n", __func__,
2293 hdr.version, hdr.pa_type, le16toh(hdr.volt));
2294 sc->calib_ver = hdr.version;
2296 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSETv2) {
2297 sc->eeprom_voltage = le16toh(hdr.volt);
2298 iwn_read_prom_data(sc, base + IWN5000_EEPROM_TEMP, &val, 2);
2299 sc->eeprom_temp_high=le16toh(val);
2300 iwn_read_prom_data(sc, base + IWN5000_EEPROM_VOLT, &val, 2);
2301 sc->eeprom_temp = le16toh(val);
2304 if (sc->hw_type == IWN_HW_REV_TYPE_5150) {
2305 /* Compute temperature offset. */
2306 iwn_read_prom_data(sc, base + IWN5000_EEPROM_TEMP, &val, 2);
2307 sc->eeprom_temp = le16toh(val);
2308 iwn_read_prom_data(sc, base + IWN5000_EEPROM_VOLT, &val, 2);
2309 volt = le16toh(val);
2310 sc->temp_off = sc->eeprom_temp - (volt / -5);
2311 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "temp=%d volt=%d offset=%dK\n",
2312 sc->eeprom_temp, volt, sc->temp_off);
2314 /* Read crystal calibration. */
2315 iwn_read_prom_data(sc, base + IWN5000_EEPROM_CRYSTAL,
2316 &sc->eeprom_crystal, sizeof (uint32_t));
2317 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "crystal calibration 0x%08x\n",
2318 le32toh(sc->eeprom_crystal));
2321 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
2326 * Translate EEPROM flags to net80211.
2329 iwn_eeprom_channel_flags(struct iwn_eeprom_chan *channel)
2334 if ((channel->flags & IWN_EEPROM_CHAN_ACTIVE) == 0)
2335 nflags |= IEEE80211_CHAN_PASSIVE;
2336 if ((channel->flags & IWN_EEPROM_CHAN_IBSS) == 0)
2337 nflags |= IEEE80211_CHAN_NOADHOC;
2338 if (channel->flags & IWN_EEPROM_CHAN_RADAR) {
2339 nflags |= IEEE80211_CHAN_DFS;
2340 /* XXX apparently IBSS may still be marked */
2341 nflags |= IEEE80211_CHAN_NOADHOC;
2348 iwn_read_eeprom_band(struct iwn_softc *sc, int n)
2350 struct ifnet *ifp = sc->sc_ifp;
2351 struct ieee80211com *ic = ifp->if_l2com;
2352 struct iwn_eeprom_chan *channels = sc->eeprom_channels[n];
2353 const struct iwn_chan_band *band = &iwn_bands[n];
2354 struct ieee80211_channel *c;
2358 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
2360 for (i = 0; i < band->nchan; i++) {
2361 if (!(channels[i].flags & IWN_EEPROM_CHAN_VALID)) {
2362 DPRINTF(sc, IWN_DEBUG_RESET,
2363 "skip chan %d flags 0x%x maxpwr %d\n",
2364 band->chan[i], channels[i].flags,
2365 channels[i].maxpwr);
2368 chan = band->chan[i];
2369 nflags = iwn_eeprom_channel_flags(&channels[i]);
2371 c = &ic->ic_channels[ic->ic_nchans++];
2373 c->ic_maxregpower = channels[i].maxpwr;
2374 c->ic_maxpower = 2*c->ic_maxregpower;
2376 if (n == 0) { /* 2GHz band */
2377 c->ic_freq = ieee80211_ieee2mhz(chan, IEEE80211_CHAN_G);
2378 /* G =>'s B is supported */
2379 c->ic_flags = IEEE80211_CHAN_B | nflags;
2380 c = &ic->ic_channels[ic->ic_nchans++];
2382 c->ic_flags = IEEE80211_CHAN_G | nflags;
2383 } else { /* 5GHz band */
2384 c->ic_freq = ieee80211_ieee2mhz(chan, IEEE80211_CHAN_A);
2385 c->ic_flags = IEEE80211_CHAN_A | nflags;
2388 /* Save maximum allowed TX power for this channel. */
2389 sc->maxpwr[chan] = channels[i].maxpwr;
2391 DPRINTF(sc, IWN_DEBUG_RESET,
2392 "add chan %d flags 0x%x maxpwr %d\n", chan,
2393 channels[i].flags, channels[i].maxpwr);
2395 if (sc->sc_flags & IWN_FLAG_HAS_11N) {
2396 /* add HT20, HT40 added separately */
2397 c = &ic->ic_channels[ic->ic_nchans++];
2399 c->ic_flags |= IEEE80211_CHAN_HT20;
2403 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
2408 iwn_read_eeprom_ht40(struct iwn_softc *sc, int n)
2410 struct ifnet *ifp = sc->sc_ifp;
2411 struct ieee80211com *ic = ifp->if_l2com;
2412 struct iwn_eeprom_chan *channels = sc->eeprom_channels[n];
2413 const struct iwn_chan_band *band = &iwn_bands[n];
2414 struct ieee80211_channel *c, *cent, *extc;
2418 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s start\n", __func__);
2420 if (!(sc->sc_flags & IWN_FLAG_HAS_11N)) {
2421 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end no 11n\n", __func__);
2425 for (i = 0; i < band->nchan; i++) {
2426 if (!(channels[i].flags & IWN_EEPROM_CHAN_VALID)) {
2427 DPRINTF(sc, IWN_DEBUG_RESET,
2428 "skip chan %d flags 0x%x maxpwr %d\n",
2429 band->chan[i], channels[i].flags,
2430 channels[i].maxpwr);
2433 chan = band->chan[i];
2434 nflags = iwn_eeprom_channel_flags(&channels[i]);
2437 * Each entry defines an HT40 channel pair; find the
2438 * center channel, then the extension channel above.
2440 cent = ieee80211_find_channel_byieee(ic, chan,
2441 (n == 5 ? IEEE80211_CHAN_G : IEEE80211_CHAN_A));
2442 if (cent == NULL) { /* XXX shouldn't happen */
2443 device_printf(sc->sc_dev,
2444 "%s: no entry for channel %d\n", __func__, chan);
2447 extc = ieee80211_find_channel(ic, cent->ic_freq+20,
2448 (n == 5 ? IEEE80211_CHAN_G : IEEE80211_CHAN_A));
2450 DPRINTF(sc, IWN_DEBUG_RESET,
2451 "%s: skip chan %d, extension channel not found\n",
2456 DPRINTF(sc, IWN_DEBUG_RESET,
2457 "add ht40 chan %d flags 0x%x maxpwr %d\n",
2458 chan, channels[i].flags, channels[i].maxpwr);
2460 c = &ic->ic_channels[ic->ic_nchans++];
2462 c->ic_extieee = extc->ic_ieee;
2463 c->ic_flags &= ~IEEE80211_CHAN_HT;
2464 c->ic_flags |= IEEE80211_CHAN_HT40U | nflags;
2465 c = &ic->ic_channels[ic->ic_nchans++];
2467 c->ic_extieee = cent->ic_ieee;
2468 c->ic_flags &= ~IEEE80211_CHAN_HT;
2469 c->ic_flags |= IEEE80211_CHAN_HT40D | nflags;
2472 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
2477 iwn_read_eeprom_channels(struct iwn_softc *sc, int n, uint32_t addr)
2479 struct ifnet *ifp = sc->sc_ifp;
2480 struct ieee80211com *ic = ifp->if_l2com;
2482 iwn_read_prom_data(sc, addr, &sc->eeprom_channels[n],
2483 iwn_bands[n].nchan * sizeof (struct iwn_eeprom_chan));
2486 iwn_read_eeprom_band(sc, n);
2488 iwn_read_eeprom_ht40(sc, n);
2489 ieee80211_sort_channels(ic->ic_channels, ic->ic_nchans);
2492 static struct iwn_eeprom_chan *
2493 iwn_find_eeprom_channel(struct iwn_softc *sc, struct ieee80211_channel *c)
2495 int band, chan, i, j;
2497 if (IEEE80211_IS_CHAN_HT40(c)) {
2498 band = IEEE80211_IS_CHAN_5GHZ(c) ? 6 : 5;
2499 if (IEEE80211_IS_CHAN_HT40D(c))
2500 chan = c->ic_extieee;
2503 for (i = 0; i < iwn_bands[band].nchan; i++) {
2504 if (iwn_bands[band].chan[i] == chan)
2505 return &sc->eeprom_channels[band][i];
2508 for (j = 0; j < 5; j++) {
2509 for (i = 0; i < iwn_bands[j].nchan; i++) {
2510 if (iwn_bands[j].chan[i] == c->ic_ieee)
2511 return &sc->eeprom_channels[j][i];
2519 * Enforce flags read from EEPROM.
2522 iwn_setregdomain(struct ieee80211com *ic, struct ieee80211_regdomain *rd,
2523 int nchan, struct ieee80211_channel chans[])
2525 struct iwn_softc *sc = ic->ic_ifp->if_softc;
2528 for (i = 0; i < nchan; i++) {
2529 struct ieee80211_channel *c = &chans[i];
2530 struct iwn_eeprom_chan *channel;
2532 channel = iwn_find_eeprom_channel(sc, c);
2533 if (channel == NULL) {
2534 if_printf(ic->ic_ifp,
2535 "%s: invalid channel %u freq %u/0x%x\n",
2536 __func__, c->ic_ieee, c->ic_freq, c->ic_flags);
2539 c->ic_flags |= iwn_eeprom_channel_flags(channel);
2546 iwn_read_eeprom_enhinfo(struct iwn_softc *sc)
2548 struct iwn_eeprom_enhinfo enhinfo[35];
2549 struct ifnet *ifp = sc->sc_ifp;
2550 struct ieee80211com *ic = ifp->if_l2com;
2551 struct ieee80211_channel *c;
2557 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
2559 iwn_read_prom_data(sc, IWN5000_EEPROM_REG, &val, 2);
2560 base = le16toh(val);
2561 iwn_read_prom_data(sc, base + IWN6000_EEPROM_ENHINFO,
2562 enhinfo, sizeof enhinfo);
2564 for (i = 0; i < nitems(enhinfo); i++) {
2565 flags = enhinfo[i].flags;
2566 if (!(flags & IWN_ENHINFO_VALID))
2567 continue; /* Skip invalid entries. */
2570 if (sc->txchainmask & IWN_ANT_A)
2571 maxpwr = MAX(maxpwr, enhinfo[i].chain[0]);
2572 if (sc->txchainmask & IWN_ANT_B)
2573 maxpwr = MAX(maxpwr, enhinfo[i].chain[1]);
2574 if (sc->txchainmask & IWN_ANT_C)
2575 maxpwr = MAX(maxpwr, enhinfo[i].chain[2]);
2576 if (sc->ntxchains == 2)
2577 maxpwr = MAX(maxpwr, enhinfo[i].mimo2);
2578 else if (sc->ntxchains == 3)
2579 maxpwr = MAX(maxpwr, enhinfo[i].mimo3);
2581 for (j = 0; j < ic->ic_nchans; j++) {
2582 c = &ic->ic_channels[j];
2583 if ((flags & IWN_ENHINFO_5GHZ)) {
2584 if (!IEEE80211_IS_CHAN_A(c))
2586 } else if ((flags & IWN_ENHINFO_OFDM)) {
2587 if (!IEEE80211_IS_CHAN_G(c))
2589 } else if (!IEEE80211_IS_CHAN_B(c))
2591 if ((flags & IWN_ENHINFO_HT40)) {
2592 if (!IEEE80211_IS_CHAN_HT40(c))
2595 if (IEEE80211_IS_CHAN_HT40(c))
2598 if (enhinfo[i].chan != 0 &&
2599 enhinfo[i].chan != c->ic_ieee)
2602 DPRINTF(sc, IWN_DEBUG_RESET,
2603 "channel %d(%x), maxpwr %d\n", c->ic_ieee,
2604 c->ic_flags, maxpwr / 2);
2605 c->ic_maxregpower = maxpwr / 2;
2606 c->ic_maxpower = maxpwr;
2610 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
2614 static struct ieee80211_node *
2615 iwn_node_alloc(struct ieee80211vap *vap, const uint8_t mac[IEEE80211_ADDR_LEN])
2617 return malloc(sizeof (struct iwn_node), M_80211_NODE,M_NOWAIT | M_ZERO);
2623 switch (rate & 0xff) {
2624 case 12: return 0xd;
2625 case 18: return 0xf;
2626 case 24: return 0x5;
2627 case 36: return 0x7;
2628 case 48: return 0x9;
2629 case 72: return 0xb;
2630 case 96: return 0x1;
2631 case 108: return 0x3;
2635 case 22: return 110;
2641 iwn_get_1stream_tx_antmask(struct iwn_softc *sc)
2644 return IWN_LSB(sc->txchainmask);
2648 iwn_get_2stream_tx_antmask(struct iwn_softc *sc)
2653 * The '2 stream' setup is a bit .. odd.
2655 * For NICs that support only 1 antenna, default to IWN_ANT_AB or
2656 * the firmware panics (eg Intel 5100.)
2658 * For NICs that support two antennas, we use ANT_AB.
2660 * For NICs that support three antennas, we use the two that
2661 * wasn't the default one.
2663 * XXX TODO: if bluetooth (full concurrent) is enabled, restrict
2664 * this to only one antenna.
2667 /* Default - transmit on the other antennas */
2668 tx = (sc->txchainmask & ~IWN_LSB(sc->txchainmask));
2670 /* Now, if it's zero, set it to IWN_ANT_AB, so to not panic firmware */
2675 * If the NIC is a two-stream TX NIC, configure the TX mask to
2676 * the default chainmask
2678 else if (sc->ntxchains == 2)
2679 tx = sc->txchainmask;
2687 * Calculate the required PLCP value from the given rate,
2688 * to the given node.
2690 * This will take the node configuration (eg 11n, rate table
2691 * setup, etc) into consideration.
2694 iwn_rate_to_plcp(struct iwn_softc *sc, struct ieee80211_node *ni,
2697 #define RV(v) ((v) & IEEE80211_RATE_VAL)
2698 struct ieee80211com *ic = ni->ni_ic;
2703 * If it's an MCS rate, let's set the plcp correctly
2704 * and set the relevant flags based on the node config.
2706 if (rate & IEEE80211_RATE_MCS) {
2708 * Set the initial PLCP value to be between 0->31 for
2709 * MCS 0 -> MCS 31, then set the "I'm an MCS rate!"
2712 plcp = RV(rate) | IWN_RFLAG_MCS;
2715 * XXX the following should only occur if both
2716 * the local configuration _and_ the remote node
2717 * advertise these capabilities. Thus this code
2722 * Set the channel width and guard interval.
2724 if (IEEE80211_IS_CHAN_HT40(ni->ni_chan)) {
2725 plcp |= IWN_RFLAG_HT40;
2726 if (ni->ni_htcap & IEEE80211_HTCAP_SHORTGI40)
2727 plcp |= IWN_RFLAG_SGI;
2728 } else if (ni->ni_htcap & IEEE80211_HTCAP_SHORTGI20) {
2729 plcp |= IWN_RFLAG_SGI;
2733 * Ensure the selected rate matches the link quality
2734 * table entries being used.
2737 plcp |= IWN_RFLAG_ANT(sc->txchainmask);
2738 else if (rate > 0x87)
2739 plcp |= IWN_RFLAG_ANT(iwn_get_2stream_tx_antmask(sc));
2741 plcp |= IWN_RFLAG_ANT(iwn_get_1stream_tx_antmask(sc));
2744 * Set the initial PLCP - fine for both
2745 * OFDM and CCK rates.
2747 plcp = rate2plcp(rate);
2749 /* Set CCK flag if it's CCK */
2751 /* XXX It would be nice to have a method
2752 * to map the ridx -> phy table entry
2753 * so we could just query that, rather than
2754 * this hack to check against IWN_RIDX_OFDM6.
2756 ridx = ieee80211_legacy_rate_lookup(ic->ic_rt,
2757 rate & IEEE80211_RATE_VAL);
2758 if (ridx < IWN_RIDX_OFDM6 &&
2759 IEEE80211_IS_CHAN_2GHZ(ni->ni_chan))
2760 plcp |= IWN_RFLAG_CCK;
2762 /* Set antenna configuration */
2763 /* XXX TODO: is this the right antenna to use for legacy? */
2764 plcp |= IWN_RFLAG_ANT(iwn_get_1stream_tx_antmask(sc));
2767 DPRINTF(sc, IWN_DEBUG_TXRATE, "%s: rate=0x%02x, plcp=0x%08x\n",
2772 return (htole32(plcp));
2777 iwn_newassoc(struct ieee80211_node *ni, int isnew)
2779 /* Doesn't do anything at the moment */
2783 iwn_media_change(struct ifnet *ifp)
2787 error = ieee80211_media_change(ifp);
2788 /* NB: only the fixed rate can change and that doesn't need a reset */
2789 return (error == ENETRESET ? 0 : error);
2793 iwn_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg)
2795 struct iwn_vap *ivp = IWN_VAP(vap);
2796 struct ieee80211com *ic = vap->iv_ic;
2797 struct iwn_softc *sc = ic->ic_ifp->if_softc;
2800 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
2802 DPRINTF(sc, IWN_DEBUG_STATE, "%s: %s -> %s\n", __func__,
2803 ieee80211_state_name[vap->iv_state], ieee80211_state_name[nstate]);
2805 IEEE80211_UNLOCK(ic);
2807 callout_stop(&sc->calib_to);
2809 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX];
2812 case IEEE80211_S_ASSOC:
2813 if (vap->iv_state != IEEE80211_S_RUN)
2816 case IEEE80211_S_AUTH:
2817 if (vap->iv_state == IEEE80211_S_AUTH)
2821 * !AUTH -> AUTH transition requires state reset to handle
2822 * reassociations correctly.
2824 sc->rxon->associd = 0;
2825 sc->rxon->filter &= ~htole32(IWN_FILTER_BSS);
2826 sc->calib.state = IWN_CALIB_STATE_INIT;
2828 if ((error = iwn_auth(sc, vap)) != 0) {
2829 device_printf(sc->sc_dev,
2830 "%s: could not move to auth state\n", __func__);
2834 case IEEE80211_S_RUN:
2836 * RUN -> RUN transition; Just restart the timers.
2838 if (vap->iv_state == IEEE80211_S_RUN) {
2844 * !RUN -> RUN requires setting the association id
2845 * which is done with a firmware cmd. We also defer
2846 * starting the timers until that work is done.
2848 if ((error = iwn_run(sc, vap)) != 0) {
2849 device_printf(sc->sc_dev,
2850 "%s: could not move to run state\n", __func__);
2854 case IEEE80211_S_INIT:
2855 sc->calib.state = IWN_CALIB_STATE_INIT;
2864 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end in error\n", __func__);
2868 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
2870 return ivp->iv_newstate(vap, nstate, arg);
2874 iwn_calib_timeout(void *arg)
2876 struct iwn_softc *sc = arg;
2878 IWN_LOCK_ASSERT(sc);
2880 /* Force automatic TX power calibration every 60 secs. */
2881 if (++sc->calib_cnt >= 120) {
2884 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s\n",
2885 "sending request for statistics");
2886 (void)iwn_cmd(sc, IWN_CMD_GET_STATISTICS, &flags,
2890 callout_reset(&sc->calib_to, msecs_to_ticks(500), iwn_calib_timeout,
2895 * Process an RX_PHY firmware notification. This is usually immediately
2896 * followed by an MPDU_RX_DONE notification.
2899 iwn_rx_phy(struct iwn_softc *sc, struct iwn_rx_desc *desc,
2900 struct iwn_rx_data *data)
2902 struct iwn_rx_stat *stat = (struct iwn_rx_stat *)(desc + 1);
2904 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: received PHY stats\n", __func__);
2905 bus_dmamap_sync(sc->rxq.data_dmat, data->map, BUS_DMASYNC_POSTREAD);
2907 /* Save RX statistics, they will be used on MPDU_RX_DONE. */
2908 memcpy(&sc->last_rx_stat, stat, sizeof (*stat));
2909 sc->last_rx_valid = 1;
2913 * Process an RX_DONE (4965AGN only) or MPDU_RX_DONE firmware notification.
2914 * Each MPDU_RX_DONE notification must be preceded by an RX_PHY one.
2917 iwn_rx_done(struct iwn_softc *sc, struct iwn_rx_desc *desc,
2918 struct iwn_rx_data *data)
2920 struct iwn_ops *ops = &sc->ops;
2921 struct ifnet *ifp = sc->sc_ifp;
2922 struct ieee80211com *ic = ifp->if_l2com;
2923 struct iwn_rx_ring *ring = &sc->rxq;
2924 struct ieee80211_frame *wh;
2925 struct ieee80211_node *ni;
2926 struct mbuf *m, *m1;
2927 struct iwn_rx_stat *stat;
2931 int error, len, rssi, nf;
2933 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
2935 if (desc->type == IWN_MPDU_RX_DONE) {
2936 /* Check for prior RX_PHY notification. */
2937 if (!sc->last_rx_valid) {
2938 DPRINTF(sc, IWN_DEBUG_ANY,
2939 "%s: missing RX_PHY\n", __func__);
2942 stat = &sc->last_rx_stat;
2944 stat = (struct iwn_rx_stat *)(desc + 1);
2946 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_POSTREAD);
2948 if (stat->cfg_phy_len > IWN_STAT_MAXLEN) {
2949 device_printf(sc->sc_dev,
2950 "%s: invalid RX statistic header, len %d\n", __func__,
2954 if (desc->type == IWN_MPDU_RX_DONE) {
2955 struct iwn_rx_mpdu *mpdu = (struct iwn_rx_mpdu *)(desc + 1);
2956 head = (caddr_t)(mpdu + 1);
2957 len = le16toh(mpdu->len);
2959 head = (caddr_t)(stat + 1) + stat->cfg_phy_len;
2960 len = le16toh(stat->len);
2963 flags = le32toh(*(uint32_t *)(head + len));
2965 /* Discard frames with a bad FCS early. */
2966 if ((flags & IWN_RX_NOERROR) != IWN_RX_NOERROR) {
2967 DPRINTF(sc, IWN_DEBUG_RECV, "%s: RX flags error %x\n",
2969 if_inc_counter(ifp, IFCOUNTER_IERRORS, 1);
2972 /* Discard frames that are too short. */
2973 if (len < sizeof (*wh)) {
2974 DPRINTF(sc, IWN_DEBUG_RECV, "%s: frame too short: %d\n",
2976 if_inc_counter(ifp, IFCOUNTER_IERRORS, 1);
2980 m1 = m_getjcl(M_NOWAIT, MT_DATA, M_PKTHDR, IWN_RBUF_SIZE);
2982 DPRINTF(sc, IWN_DEBUG_ANY, "%s: no mbuf to restock ring\n",
2984 if_inc_counter(ifp, IFCOUNTER_IERRORS, 1);
2987 bus_dmamap_unload(ring->data_dmat, data->map);
2989 error = bus_dmamap_load(ring->data_dmat, data->map, mtod(m1, void *),
2990 IWN_RBUF_SIZE, iwn_dma_map_addr, &paddr, BUS_DMA_NOWAIT);
2991 if (error != 0 && error != EFBIG) {
2992 device_printf(sc->sc_dev,
2993 "%s: bus_dmamap_load failed, error %d\n", __func__, error);
2996 /* Try to reload the old mbuf. */
2997 error = bus_dmamap_load(ring->data_dmat, data->map,
2998 mtod(data->m, void *), IWN_RBUF_SIZE, iwn_dma_map_addr,
2999 &paddr, BUS_DMA_NOWAIT);
3000 if (error != 0 && error != EFBIG) {
3001 panic("%s: could not load old RX mbuf", __func__);
3003 /* Physical address may have changed. */
3004 ring->desc[ring->cur] = htole32(paddr >> 8);
3005 bus_dmamap_sync(ring->data_dmat, ring->desc_dma.map,
3006 BUS_DMASYNC_PREWRITE);
3007 if_inc_counter(ifp, IFCOUNTER_IERRORS, 1);
3013 /* Update RX descriptor. */
3014 ring->desc[ring->cur] = htole32(paddr >> 8);
3015 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
3016 BUS_DMASYNC_PREWRITE);
3018 /* Finalize mbuf. */
3019 m->m_pkthdr.rcvif = ifp;
3021 m->m_pkthdr.len = m->m_len = len;
3023 /* Grab a reference to the source node. */
3024 wh = mtod(m, struct ieee80211_frame *);
3025 ni = ieee80211_find_rxnode(ic, (struct ieee80211_frame_min *)wh);
3026 nf = (ni != NULL && ni->ni_vap->iv_state == IEEE80211_S_RUN &&
3027 (ic->ic_flags & IEEE80211_F_SCAN) == 0) ? sc->noise : -95;
3029 rssi = ops->get_rssi(sc, stat);
3031 if (ieee80211_radiotap_active(ic)) {
3032 struct iwn_rx_radiotap_header *tap = &sc->sc_rxtap;
3035 if (stat->flags & htole16(IWN_STAT_FLAG_SHPREAMBLE))
3036 tap->wr_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
3037 tap->wr_dbm_antsignal = (int8_t)rssi;
3038 tap->wr_dbm_antnoise = (int8_t)nf;
3039 tap->wr_tsft = stat->tstamp;
3040 switch (stat->rate) {
3042 case 10: tap->wr_rate = 2; break;
3043 case 20: tap->wr_rate = 4; break;
3044 case 55: tap->wr_rate = 11; break;
3045 case 110: tap->wr_rate = 22; break;
3047 case 0xd: tap->wr_rate = 12; break;
3048 case 0xf: tap->wr_rate = 18; break;
3049 case 0x5: tap->wr_rate = 24; break;
3050 case 0x7: tap->wr_rate = 36; break;
3051 case 0x9: tap->wr_rate = 48; break;
3052 case 0xb: tap->wr_rate = 72; break;
3053 case 0x1: tap->wr_rate = 96; break;
3054 case 0x3: tap->wr_rate = 108; break;
3055 /* Unknown rate: should not happen. */
3056 default: tap->wr_rate = 0;
3062 /* Send the frame to the 802.11 layer. */
3064 if (ni->ni_flags & IEEE80211_NODE_HT)
3065 m->m_flags |= M_AMPDU;
3066 (void)ieee80211_input(ni, m, rssi - nf, nf);
3067 /* Node is no longer needed. */
3068 ieee80211_free_node(ni);
3070 (void)ieee80211_input_all(ic, m, rssi - nf, nf);
3074 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
3078 /* Process an incoming Compressed BlockAck. */
3080 iwn_rx_compressed_ba(struct iwn_softc *sc, struct iwn_rx_desc *desc,
3081 struct iwn_rx_data *data)
3083 struct iwn_ops *ops = &sc->ops;
3084 struct ifnet *ifp = sc->sc_ifp;
3085 struct iwn_node *wn;
3086 struct ieee80211_node *ni;
3087 struct iwn_compressed_ba *ba = (struct iwn_compressed_ba *)(desc + 1);
3088 struct iwn_tx_ring *txq;
3089 struct iwn_tx_data *txdata;
3090 struct ieee80211_tx_ampdu *tap;
3095 int ackfailcnt = 0, i, lastidx, qid, *res, shift;
3096 int tx_ok = 0, tx_err = 0;
3098 DPRINTF(sc, IWN_DEBUG_TRACE | IWN_DEBUG_XMIT, "->%s begin\n", __func__);
3100 bus_dmamap_sync(sc->rxq.data_dmat, data->map, BUS_DMASYNC_POSTREAD);
3102 qid = le16toh(ba->qid);
3103 txq = &sc->txq[ba->qid];
3104 tap = sc->qid2tap[ba->qid];
3106 wn = (void *)tap->txa_ni;
3110 if (!IEEE80211_AMPDU_RUNNING(tap)) {
3111 res = tap->txa_private;
3112 ssn = tap->txa_start & 0xfff;
3115 for (lastidx = le16toh(ba->ssn) & 0xff; txq->read != lastidx;) {
3116 txdata = &txq->data[txq->read];
3118 /* Unmap and free mbuf. */
3119 bus_dmamap_sync(txq->data_dmat, txdata->map,
3120 BUS_DMASYNC_POSTWRITE);
3121 bus_dmamap_unload(txq->data_dmat, txdata->map);
3122 m = txdata->m, txdata->m = NULL;
3123 ni = txdata->ni, txdata->ni = NULL;
3125 KASSERT(ni != NULL, ("no node"));
3126 KASSERT(m != NULL, ("no mbuf"));
3128 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: freeing m=%p\n", __func__, m);
3129 ieee80211_tx_complete(ni, m, 1);
3132 txq->read = (txq->read + 1) % IWN_TX_RING_COUNT;
3135 if (txq->queued == 0 && res != NULL) {
3137 ops->ampdu_tx_stop(sc, qid, tid, ssn);
3139 sc->qid2tap[qid] = NULL;
3140 free(res, M_DEVBUF);
3144 if (wn->agg[tid].bitmap == 0)
3147 shift = wn->agg[tid].startidx - ((le16toh(ba->seq) >> 4) & 0xff);
3151 if (wn->agg[tid].nframes > (64 - shift))
3155 * Walk the bitmap and calculate how many successful and failed
3156 * attempts are made.
3158 * Yes, the rate control code doesn't know these are A-MPDU
3159 * subframes and that it's okay to fail some of these.
3162 bitmap = (le64toh(ba->bitmap) >> shift) & wn->agg[tid].bitmap;
3163 for (i = 0; bitmap; i++) {
3164 if ((bitmap & 1) == 0) {
3165 if_inc_counter(ifp, IFCOUNTER_OERRORS, 1);
3167 ieee80211_ratectl_tx_complete(ni->ni_vap, ni,
3168 IEEE80211_RATECTL_TX_FAILURE, &ackfailcnt, NULL);
3170 if_inc_counter(ifp, IFCOUNTER_OPACKETS, 1);
3172 ieee80211_ratectl_tx_complete(ni->ni_vap, ni,
3173 IEEE80211_RATECTL_TX_SUCCESS, &ackfailcnt, NULL);
3178 DPRINTF(sc, IWN_DEBUG_TRACE | IWN_DEBUG_XMIT,
3179 "->%s: end; %d ok; %d err\n",__func__, tx_ok, tx_err);
3184 * Process a CALIBRATION_RESULT notification sent by the initialization
3185 * firmware on response to a CMD_CALIB_CONFIG command (5000 only).
3188 iwn5000_rx_calib_results(struct iwn_softc *sc, struct iwn_rx_desc *desc,
3189 struct iwn_rx_data *data)
3191 struct iwn_phy_calib *calib = (struct iwn_phy_calib *)(desc + 1);
3194 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
3196 /* Runtime firmware should not send such a notification. */
3197 if (sc->sc_flags & IWN_FLAG_CALIB_DONE){
3198 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s received after clib done\n",
3202 len = (le32toh(desc->len) & 0x3fff) - 4;
3203 bus_dmamap_sync(sc->rxq.data_dmat, data->map, BUS_DMASYNC_POSTREAD);
3205 switch (calib->code) {
3206 case IWN5000_PHY_CALIB_DC:
3207 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_DC)
3210 case IWN5000_PHY_CALIB_LO:
3211 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_LO)
3214 case IWN5000_PHY_CALIB_TX_IQ:
3215 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TX_IQ)
3218 case IWN5000_PHY_CALIB_TX_IQ_PERIODIC:
3219 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TX_IQ_PERIODIC)
3222 case IWN5000_PHY_CALIB_BASE_BAND:
3223 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_BASE_BAND)
3227 if (idx == -1) /* Ignore other results. */
3230 /* Save calibration result. */
3231 if (sc->calibcmd[idx].buf != NULL)
3232 free(sc->calibcmd[idx].buf, M_DEVBUF);
3233 sc->calibcmd[idx].buf = malloc(len, M_DEVBUF, M_NOWAIT);
3234 if (sc->calibcmd[idx].buf == NULL) {
3235 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
3236 "not enough memory for calibration result %d\n",
3240 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
3241 "saving calibration result idx=%d, code=%d len=%d\n", idx, calib->code, len);
3242 sc->calibcmd[idx].len = len;
3243 memcpy(sc->calibcmd[idx].buf, calib, len);
3247 iwn_stats_update(struct iwn_softc *sc, struct iwn_calib_state *calib,
3248 struct iwn_stats *stats, int len)
3250 struct iwn_stats_bt *stats_bt;
3251 struct iwn_stats *lstats;
3254 * First - check whether the length is the bluetooth or normal.
3256 * If it's normal - just copy it and bump out.
3257 * Otherwise we have to convert things.
3260 if (len == sizeof(struct iwn_stats) + 4) {
3261 memcpy(&sc->last_stat, stats, sizeof(struct iwn_stats));
3262 sc->last_stat_valid = 1;
3267 * If it's not the bluetooth size - log, then just copy.
3269 if (len != sizeof(struct iwn_stats_bt) + 4) {
3270 DPRINTF(sc, IWN_DEBUG_STATS,
3271 "%s: size of rx statistics (%d) not an expected size!\n",
3274 memcpy(&sc->last_stat, stats, sizeof(struct iwn_stats));
3275 sc->last_stat_valid = 1;
3282 stats_bt = (struct iwn_stats_bt *) stats;
3283 lstats = &sc->last_stat;
3286 lstats->flags = stats_bt->flags;
3288 memcpy(&lstats->rx.ofdm, &stats_bt->rx_bt.ofdm,
3289 sizeof(struct iwn_rx_phy_stats));
3290 memcpy(&lstats->rx.cck, &stats_bt->rx_bt.cck,
3291 sizeof(struct iwn_rx_phy_stats));
3292 memcpy(&lstats->rx.general, &stats_bt->rx_bt.general_bt.common,
3293 sizeof(struct iwn_rx_general_stats));
3294 memcpy(&lstats->rx.ht, &stats_bt->rx_bt.ht,
3295 sizeof(struct iwn_rx_ht_phy_stats));
3297 memcpy(&lstats->tx, &stats_bt->tx,
3298 sizeof(struct iwn_tx_stats));
3300 memcpy(&lstats->general, &stats_bt->general,
3301 sizeof(struct iwn_general_stats));
3303 /* XXX TODO: Squirrel away the extra bluetooth stats somewhere */
3304 sc->last_stat_valid = 1;
3308 * Process an RX_STATISTICS or BEACON_STATISTICS firmware notification.
3309 * The latter is sent by the firmware after each received beacon.
3312 iwn_rx_statistics(struct iwn_softc *sc, struct iwn_rx_desc *desc,
3313 struct iwn_rx_data *data)
3315 struct iwn_ops *ops = &sc->ops;
3316 struct ifnet *ifp = sc->sc_ifp;
3317 struct ieee80211com *ic = ifp->if_l2com;
3318 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
3319 struct iwn_calib_state *calib = &sc->calib;
3320 struct iwn_stats *stats = (struct iwn_stats *)(desc + 1);
3321 struct iwn_stats *lstats;
3324 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
3326 /* Ignore statistics received during a scan. */
3327 if (vap->iv_state != IEEE80211_S_RUN ||
3328 (ic->ic_flags & IEEE80211_F_SCAN)){
3329 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s received during calib\n",
3334 bus_dmamap_sync(sc->rxq.data_dmat, data->map, BUS_DMASYNC_POSTREAD);
3336 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_STATS,
3337 "%s: received statistics, cmd %d, len %d\n",
3338 __func__, desc->type, le16toh(desc->len));
3339 sc->calib_cnt = 0; /* Reset TX power calibration timeout. */
3342 * Collect/track general statistics for reporting.
3344 * This takes care of ensuring that the bluetooth sized message
3345 * will be correctly converted to the legacy sized message.
3347 iwn_stats_update(sc, calib, stats, le16toh(desc->len));
3350 * And now, let's take a reference of it to use!
3352 lstats = &sc->last_stat;
3354 /* Test if temperature has changed. */
3355 if (lstats->general.temp != sc->rawtemp) {
3356 /* Convert "raw" temperature to degC. */
3357 sc->rawtemp = stats->general.temp;
3358 temp = ops->get_temperature(sc);
3359 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: temperature %d\n",
3362 /* Update TX power if need be (4965AGN only). */
3363 if (sc->hw_type == IWN_HW_REV_TYPE_4965)
3364 iwn4965_power_calibration(sc, temp);
3367 if (desc->type != IWN_BEACON_STATISTICS)
3368 return; /* Reply to a statistics request. */
3370 sc->noise = iwn_get_noise(&lstats->rx.general);
3371 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: noise %d\n", __func__, sc->noise);
3373 /* Test that RSSI and noise are present in stats report. */
3374 if (le32toh(lstats->rx.general.flags) != 1) {
3375 DPRINTF(sc, IWN_DEBUG_ANY, "%s\n",
3376 "received statistics without RSSI");
3380 if (calib->state == IWN_CALIB_STATE_ASSOC)
3381 iwn_collect_noise(sc, &lstats->rx.general);
3382 else if (calib->state == IWN_CALIB_STATE_RUN) {
3383 iwn_tune_sensitivity(sc, &lstats->rx);
3385 * XXX TODO: Only run the RX recovery if we're associated!
3387 iwn_check_rx_recovery(sc, lstats);
3388 iwn_save_stats_counters(sc, lstats);
3391 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
3395 * Save the relevant statistic counters for the next calibration
3399 iwn_save_stats_counters(struct iwn_softc *sc, const struct iwn_stats *rs)
3401 struct iwn_calib_state *calib = &sc->calib;
3403 /* Save counters values for next call. */
3404 calib->bad_plcp_cck = le32toh(rs->rx.cck.bad_plcp);
3405 calib->fa_cck = le32toh(rs->rx.cck.fa);
3406 calib->bad_plcp_ht = le32toh(rs->rx.ht.bad_plcp);
3407 calib->bad_plcp_ofdm = le32toh(rs->rx.ofdm.bad_plcp);
3408 calib->fa_ofdm = le32toh(rs->rx.ofdm.fa);
3410 /* Last time we received these tick values */
3411 sc->last_calib_ticks = ticks;
3415 * Process a TX_DONE firmware notification. Unfortunately, the 4965AGN
3416 * and 5000 adapters have different incompatible TX status formats.
3419 iwn4965_tx_done(struct iwn_softc *sc, struct iwn_rx_desc *desc,
3420 struct iwn_rx_data *data)
3422 struct iwn4965_tx_stat *stat = (struct iwn4965_tx_stat *)(desc + 1);
3423 struct iwn_tx_ring *ring;
3426 qid = desc->qid & 0xf;
3427 ring = &sc->txq[qid];
3429 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: "
3430 "qid %d idx %d RTS retries %d ACK retries %d nkill %d rate %x duration %d status %x\n",
3431 __func__, desc->qid, desc->idx,
3435 stat->rate, le16toh(stat->duration),
3436 le32toh(stat->status));
3438 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_POSTREAD);
3439 if (qid >= sc->firstaggqueue) {
3440 iwn_ampdu_tx_done(sc, qid, desc->idx, stat->nframes,
3441 stat->ackfailcnt, &stat->status);
3443 iwn_tx_done(sc, desc, stat->ackfailcnt,
3444 le32toh(stat->status) & 0xff);
3449 iwn5000_tx_done(struct iwn_softc *sc, struct iwn_rx_desc *desc,
3450 struct iwn_rx_data *data)
3452 struct iwn5000_tx_stat *stat = (struct iwn5000_tx_stat *)(desc + 1);
3453 struct iwn_tx_ring *ring;
3456 qid = desc->qid & 0xf;
3457 ring = &sc->txq[qid];
3459 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: "
3460 "qid %d idx %d RTS retries %d ACK retries %d nkill %d rate %x duration %d status %x\n",
3461 __func__, desc->qid, desc->idx,
3465 stat->rate, le16toh(stat->duration),
3466 le32toh(stat->status));
3469 /* Reset TX scheduler slot. */
3470 iwn5000_reset_sched(sc, desc->qid & 0xf, desc->idx);
3473 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_POSTREAD);
3474 if (qid >= sc->firstaggqueue) {
3475 iwn_ampdu_tx_done(sc, qid, desc->idx, stat->nframes,
3476 stat->ackfailcnt, &stat->status);
3478 iwn_tx_done(sc, desc, stat->ackfailcnt,
3479 le16toh(stat->status) & 0xff);
3484 * Adapter-independent backend for TX_DONE firmware notifications.
3487 iwn_tx_done(struct iwn_softc *sc, struct iwn_rx_desc *desc, int ackfailcnt,
3490 struct ifnet *ifp = sc->sc_ifp;
3491 struct iwn_tx_ring *ring = &sc->txq[desc->qid & 0xf];
3492 struct iwn_tx_data *data = &ring->data[desc->idx];
3494 struct ieee80211_node *ni;
3495 struct ieee80211vap *vap;
3497 KASSERT(data->ni != NULL, ("no node"));
3499 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
3501 /* Unmap and free mbuf. */
3502 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_POSTWRITE);
3503 bus_dmamap_unload(ring->data_dmat, data->map);
3504 m = data->m, data->m = NULL;
3505 ni = data->ni, data->ni = NULL;
3509 * Update rate control statistics for the node.
3511 if (status & IWN_TX_FAIL) {
3512 if_inc_counter(ifp, IFCOUNTER_OERRORS, 1);
3513 ieee80211_ratectl_tx_complete(vap, ni,
3514 IEEE80211_RATECTL_TX_FAILURE, &ackfailcnt, NULL);
3516 if_inc_counter(ifp, IFCOUNTER_OPACKETS, 1);
3517 ieee80211_ratectl_tx_complete(vap, ni,
3518 IEEE80211_RATECTL_TX_SUCCESS, &ackfailcnt, NULL);
3522 * Channels marked for "radar" require traffic to be received
3523 * to unlock before we can transmit. Until traffic is seen
3524 * any attempt to transmit is returned immediately with status
3525 * set to IWN_TX_FAIL_TX_LOCKED. Unfortunately this can easily
3526 * happen on first authenticate after scanning. To workaround
3527 * this we ignore a failure of this sort in AUTH state so the
3528 * 802.11 layer will fall back to using a timeout to wait for
3529 * the AUTH reply. This allows the firmware time to see
3530 * traffic so a subsequent retry of AUTH succeeds. It's
3531 * unclear why the firmware does not maintain state for
3532 * channels recently visited as this would allow immediate
3533 * use of the channel after a scan (where we see traffic).
3535 if (status == IWN_TX_FAIL_TX_LOCKED &&
3536 ni->ni_vap->iv_state == IEEE80211_S_AUTH)
3537 ieee80211_tx_complete(ni, m, 0);
3539 ieee80211_tx_complete(ni, m,
3540 (status & IWN_TX_FAIL) != 0);
3542 sc->sc_tx_timer = 0;
3543 if (--ring->queued < IWN_TX_RING_LOMARK) {
3544 sc->qfullmsk &= ~(1 << ring->qid);
3545 if (sc->qfullmsk == 0 &&
3546 (ifp->if_drv_flags & IFF_DRV_OACTIVE)) {
3547 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
3548 iwn_start_locked(ifp);
3552 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
3557 * Process a "command done" firmware notification. This is where we wakeup
3558 * processes waiting for a synchronous command completion.
3561 iwn_cmd_done(struct iwn_softc *sc, struct iwn_rx_desc *desc)
3563 struct iwn_tx_ring *ring;
3564 struct iwn_tx_data *data;
3567 if (sc->sc_flags & IWN_FLAG_PAN_SUPPORT)
3568 cmd_queue_num = IWN_PAN_CMD_QUEUE;
3570 cmd_queue_num = IWN_CMD_QUEUE_NUM;
3572 if ((desc->qid & IWN_RX_DESC_QID_MSK) != cmd_queue_num)
3573 return; /* Not a command ack. */
3575 ring = &sc->txq[cmd_queue_num];
3576 data = &ring->data[desc->idx];
3578 /* If the command was mapped in an mbuf, free it. */
3579 if (data->m != NULL) {
3580 bus_dmamap_sync(ring->data_dmat, data->map,
3581 BUS_DMASYNC_POSTWRITE);
3582 bus_dmamap_unload(ring->data_dmat, data->map);
3586 wakeup(&ring->desc[desc->idx]);
3590 iwn_ampdu_tx_done(struct iwn_softc *sc, int qid, int idx, int nframes,
3591 int ackfailcnt, void *stat)
3593 struct iwn_ops *ops = &sc->ops;
3594 struct ifnet *ifp = sc->sc_ifp;
3595 struct iwn_tx_ring *ring = &sc->txq[qid];
3596 struct iwn_tx_data *data;
3598 struct iwn_node *wn;
3599 struct ieee80211_node *ni;
3600 struct ieee80211_tx_ampdu *tap;
3602 uint32_t *status = stat;
3603 uint16_t *aggstatus = stat;
3606 int bit, i, lastidx, *res, seqno, shift, start;
3608 /* XXX TODO: status is le16 field! Grr */
3610 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
3611 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: nframes=%d, status=0x%08x\n",
3616 tap = sc->qid2tap[qid];
3618 wn = (void *)tap->txa_ni;
3622 * XXX TODO: ACK and RTS failures would be nice here!
3626 * A-MPDU single frame status - if we failed to transmit it
3627 * in A-MPDU, then it may be a permanent failure.
3629 * XXX TODO: check what the Linux iwlwifi driver does here;
3630 * there's some permanent and temporary failures that may be
3631 * handled differently.
3634 if ((*status & 0xff) != 1 && (*status & 0xff) != 2) {
3636 printf("ieee80211_send_bar()\n");
3639 * If we completely fail a transmit, make sure a
3640 * notification is pushed up to the rate control
3643 ieee80211_ratectl_tx_complete(ni->ni_vap,
3645 IEEE80211_RATECTL_TX_FAILURE,
3650 * If nframes=1, then we won't be getting a BA for
3651 * this frame. Ensure that we correctly update the
3652 * rate control code with how many retries were
3653 * needed to send it.
3655 ieee80211_ratectl_tx_complete(ni->ni_vap,
3657 IEEE80211_RATECTL_TX_SUCCESS,
3665 for (i = 0; i < nframes; i++) {
3666 if (le16toh(aggstatus[i * 2]) & 0xc)
3669 idx = le16toh(aggstatus[2*i + 1]) & 0xff;
3673 shift = 0x100 - idx + start;
3676 } else if (bit <= -64)
3677 bit = 0x100 - start + idx;
3679 shift = start - idx;
3683 bitmap = bitmap << shift;
3684 bitmap |= 1ULL << bit;
3686 tap = sc->qid2tap[qid];
3688 wn = (void *)tap->txa_ni;
3689 wn->agg[tid].bitmap = bitmap;
3690 wn->agg[tid].startidx = start;
3691 wn->agg[tid].nframes = nframes;
3695 if (!IEEE80211_AMPDU_RUNNING(tap)) {
3696 res = tap->txa_private;
3697 ssn = tap->txa_start & 0xfff;
3700 /* This is going nframes DWORDS into the descriptor? */
3701 seqno = le32toh(*(status + nframes)) & 0xfff;
3702 for (lastidx = (seqno & 0xff); ring->read != lastidx;) {
3703 data = &ring->data[ring->read];
3705 /* Unmap and free mbuf. */
3706 bus_dmamap_sync(ring->data_dmat, data->map,
3707 BUS_DMASYNC_POSTWRITE);
3708 bus_dmamap_unload(ring->data_dmat, data->map);
3709 m = data->m, data->m = NULL;
3710 ni = data->ni, data->ni = NULL;
3712 KASSERT(ni != NULL, ("no node"));
3713 KASSERT(m != NULL, ("no mbuf"));
3714 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: freeing m=%p\n", __func__, m);
3715 ieee80211_tx_complete(ni, m, 1);
3718 ring->read = (ring->read + 1) % IWN_TX_RING_COUNT;
3721 if (ring->queued == 0 && res != NULL) {
3723 ops->ampdu_tx_stop(sc, qid, tid, ssn);
3725 sc->qid2tap[qid] = NULL;
3726 free(res, M_DEVBUF);
3730 sc->sc_tx_timer = 0;
3731 if (ring->queued < IWN_TX_RING_LOMARK) {
3732 sc->qfullmsk &= ~(1 << ring->qid);
3733 if (sc->qfullmsk == 0 &&
3734 (ifp->if_drv_flags & IFF_DRV_OACTIVE)) {
3735 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
3736 iwn_start_locked(ifp);
3740 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
3745 * Process an INT_FH_RX or INT_SW_RX interrupt.
3748 iwn_notif_intr(struct iwn_softc *sc)
3750 struct iwn_ops *ops = &sc->ops;
3751 struct ifnet *ifp = sc->sc_ifp;
3752 struct ieee80211com *ic = ifp->if_l2com;
3753 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
3756 bus_dmamap_sync(sc->rxq.stat_dma.tag, sc->rxq.stat_dma.map,
3757 BUS_DMASYNC_POSTREAD);
3759 hw = le16toh(sc->rxq.stat->closed_count) & 0xfff;
3760 while (sc->rxq.cur != hw) {
3761 struct iwn_rx_data *data = &sc->rxq.data[sc->rxq.cur];
3762 struct iwn_rx_desc *desc;
3764 bus_dmamap_sync(sc->rxq.data_dmat, data->map,
3765 BUS_DMASYNC_POSTREAD);
3766 desc = mtod(data->m, struct iwn_rx_desc *);
3768 DPRINTF(sc, IWN_DEBUG_RECV,
3769 "%s: cur=%d; qid %x idx %d flags %x type %d(%s) len %d\n",
3770 __func__, sc->rxq.cur, desc->qid & 0xf, desc->idx, desc->flags,
3771 desc->type, iwn_intr_str(desc->type),
3772 le16toh(desc->len));
3774 if (!(desc->qid & IWN_UNSOLICITED_RX_NOTIF)) /* Reply to a command. */
3775 iwn_cmd_done(sc, desc);
3777 switch (desc->type) {
3779 iwn_rx_phy(sc, desc, data);
3782 case IWN_RX_DONE: /* 4965AGN only. */
3783 case IWN_MPDU_RX_DONE:
3784 /* An 802.11 frame has been received. */
3785 iwn_rx_done(sc, desc, data);
3788 case IWN_RX_COMPRESSED_BA:
3789 /* A Compressed BlockAck has been received. */
3790 iwn_rx_compressed_ba(sc, desc, data);
3794 /* An 802.11 frame has been transmitted. */
3795 ops->tx_done(sc, desc, data);
3798 case IWN_RX_STATISTICS:
3799 case IWN_BEACON_STATISTICS:
3800 iwn_rx_statistics(sc, desc, data);
3803 case IWN_BEACON_MISSED:
3805 struct iwn_beacon_missed *miss =
3806 (struct iwn_beacon_missed *)(desc + 1);
3809 bus_dmamap_sync(sc->rxq.data_dmat, data->map,
3810 BUS_DMASYNC_POSTREAD);
3811 misses = le32toh(miss->consecutive);
3813 DPRINTF(sc, IWN_DEBUG_STATE,
3814 "%s: beacons missed %d/%d\n", __func__,
3815 misses, le32toh(miss->total));
3817 * If more than 5 consecutive beacons are missed,
3818 * reinitialize the sensitivity state machine.
3820 if (vap->iv_state == IEEE80211_S_RUN &&
3821 (ic->ic_flags & IEEE80211_F_SCAN) == 0) {
3823 (void)iwn_init_sensitivity(sc);
3824 if (misses >= vap->iv_bmissthreshold) {
3826 ieee80211_beacon_miss(ic);
3834 struct iwn_ucode_info *uc =
3835 (struct iwn_ucode_info *)(desc + 1);
3837 /* The microcontroller is ready. */
3838 bus_dmamap_sync(sc->rxq.data_dmat, data->map,
3839 BUS_DMASYNC_POSTREAD);
3840 DPRINTF(sc, IWN_DEBUG_RESET,
3841 "microcode alive notification version=%d.%d "
3842 "subtype=%x alive=%x\n", uc->major, uc->minor,
3843 uc->subtype, le32toh(uc->valid));
3845 if (le32toh(uc->valid) != 1) {
3846 device_printf(sc->sc_dev,
3847 "microcontroller initialization failed");
3850 if (uc->subtype == IWN_UCODE_INIT) {
3851 /* Save microcontroller report. */
3852 memcpy(&sc->ucode_info, uc, sizeof (*uc));
3854 /* Save the address of the error log in SRAM. */
3855 sc->errptr = le32toh(uc->errptr);
3858 case IWN_STATE_CHANGED:
3861 * State change allows hardware switch change to be
3862 * noted. However, we handle this in iwn_intr as we
3863 * get both the enable/disble intr.
3865 bus_dmamap_sync(sc->rxq.data_dmat, data->map,
3866 BUS_DMASYNC_POSTREAD);
3868 uint32_t *status = (uint32_t *)(desc + 1);
3869 DPRINTF(sc, IWN_DEBUG_INTR | IWN_DEBUG_STATE,
3870 "state changed to %x\n",
3875 case IWN_START_SCAN:
3877 bus_dmamap_sync(sc->rxq.data_dmat, data->map,
3878 BUS_DMASYNC_POSTREAD);
3880 struct iwn_start_scan *scan =
3881 (struct iwn_start_scan *)(desc + 1);
3882 DPRINTF(sc, IWN_DEBUG_ANY,
3883 "%s: scanning channel %d status %x\n",
3884 __func__, scan->chan, le32toh(scan->status));
3890 bus_dmamap_sync(sc->rxq.data_dmat, data->map,
3891 BUS_DMASYNC_POSTREAD);
3893 struct iwn_stop_scan *scan =
3894 (struct iwn_stop_scan *)(desc + 1);
3895 DPRINTF(sc, IWN_DEBUG_STATE | IWN_DEBUG_SCAN,
3896 "scan finished nchan=%d status=%d chan=%d\n",
3897 scan->nchan, scan->status, scan->chan);
3899 sc->sc_is_scanning = 0;
3901 ieee80211_scan_next(vap);
3905 case IWN5000_CALIBRATION_RESULT:
3906 iwn5000_rx_calib_results(sc, desc, data);
3909 case IWN5000_CALIBRATION_DONE:
3910 sc->sc_flags |= IWN_FLAG_CALIB_DONE;
3915 sc->rxq.cur = (sc->rxq.cur + 1) % IWN_RX_RING_COUNT;
3918 /* Tell the firmware what we have processed. */
3919 hw = (hw == 0) ? IWN_RX_RING_COUNT - 1 : hw - 1;
3920 IWN_WRITE(sc, IWN_FH_RX_WPTR, hw & ~7);
3924 * Process an INT_WAKEUP interrupt raised when the microcontroller wakes up
3925 * from power-down sleep mode.
3928 iwn_wakeup_intr(struct iwn_softc *sc)
3932 DPRINTF(sc, IWN_DEBUG_RESET, "%s: ucode wakeup from power-down sleep\n",
3935 /* Wakeup RX and TX rings. */
3936 IWN_WRITE(sc, IWN_FH_RX_WPTR, sc->rxq.cur & ~7);
3937 for (qid = 0; qid < sc->ntxqs; qid++) {
3938 struct iwn_tx_ring *ring = &sc->txq[qid];
3939 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | ring->cur);
3944 iwn_rftoggle_intr(struct iwn_softc *sc)
3946 struct ifnet *ifp = sc->sc_ifp;
3947 struct ieee80211com *ic = ifp->if_l2com;
3948 uint32_t tmp = IWN_READ(sc, IWN_GP_CNTRL);
3950 IWN_LOCK_ASSERT(sc);
3952 device_printf(sc->sc_dev, "RF switch: radio %s\n",
3953 (tmp & IWN_GP_CNTRL_RFKILL) ? "enabled" : "disabled");
3954 if (tmp & IWN_GP_CNTRL_RFKILL)
3955 ieee80211_runtask(ic, &sc->sc_radioon_task);
3957 ieee80211_runtask(ic, &sc->sc_radiooff_task);
3961 * Dump the error log of the firmware when a firmware panic occurs. Although
3962 * we can't debug the firmware because it is neither open source nor free, it
3963 * can help us to identify certain classes of problems.
3966 iwn_fatal_intr(struct iwn_softc *sc)
3968 struct iwn_fw_dump dump;
3971 IWN_LOCK_ASSERT(sc);
3973 /* Force a complete recalibration on next init. */
3974 sc->sc_flags &= ~IWN_FLAG_CALIB_DONE;
3976 /* Check that the error log address is valid. */
3977 if (sc->errptr < IWN_FW_DATA_BASE ||
3978 sc->errptr + sizeof (dump) >
3979 IWN_FW_DATA_BASE + sc->fw_data_maxsz) {
3980 printf("%s: bad firmware error log address 0x%08x\n", __func__,
3984 if (iwn_nic_lock(sc) != 0) {
3985 printf("%s: could not read firmware error log\n", __func__);
3988 /* Read firmware error log from SRAM. */
3989 iwn_mem_read_region_4(sc, sc->errptr, (uint32_t *)&dump,
3990 sizeof (dump) / sizeof (uint32_t));
3993 if (dump.valid == 0) {
3994 printf("%s: firmware error log is empty\n", __func__);
3997 printf("firmware error log:\n");
3998 printf(" error type = \"%s\" (0x%08X)\n",
3999 (dump.id < nitems(iwn_fw_errmsg)) ?
4000 iwn_fw_errmsg[dump.id] : "UNKNOWN",
4002 printf(" program counter = 0x%08X\n", dump.pc);
4003 printf(" source line = 0x%08X\n", dump.src_line);
4004 printf(" error data = 0x%08X%08X\n",
4005 dump.error_data[0], dump.error_data[1]);
4006 printf(" branch link = 0x%08X%08X\n",
4007 dump.branch_link[0], dump.branch_link[1]);
4008 printf(" interrupt link = 0x%08X%08X\n",
4009 dump.interrupt_link[0], dump.interrupt_link[1]);
4010 printf(" time = %u\n", dump.time[0]);
4012 /* Dump driver status (TX and RX rings) while we're here. */
4013 printf("driver status:\n");
4014 for (i = 0; i < sc->ntxqs; i++) {
4015 struct iwn_tx_ring *ring = &sc->txq[i];
4016 printf(" tx ring %2d: qid=%-2d cur=%-3d queued=%-3d\n",
4017 i, ring->qid, ring->cur, ring->queued);
4019 printf(" rx ring: cur=%d\n", sc->rxq.cur);
4025 struct iwn_softc *sc = arg;
4026 struct ifnet *ifp = sc->sc_ifp;
4027 uint32_t r1, r2, tmp;
4031 /* Disable interrupts. */
4032 IWN_WRITE(sc, IWN_INT_MASK, 0);
4034 /* Read interrupts from ICT (fast) or from registers (slow). */
4035 if (sc->sc_flags & IWN_FLAG_USE_ICT) {
4037 while (sc->ict[sc->ict_cur] != 0) {
4038 tmp |= sc->ict[sc->ict_cur];
4039 sc->ict[sc->ict_cur] = 0; /* Acknowledge. */
4040 sc->ict_cur = (sc->ict_cur + 1) % IWN_ICT_COUNT;
4043 if (tmp == 0xffffffff) /* Shouldn't happen. */
4045 else if (tmp & 0xc0000) /* Workaround a HW bug. */
4047 r1 = (tmp & 0xff00) << 16 | (tmp & 0xff);
4048 r2 = 0; /* Unused. */
4050 r1 = IWN_READ(sc, IWN_INT);
4051 if (r1 == 0xffffffff || (r1 & 0xfffffff0) == 0xa5a5a5a0)
4052 return; /* Hardware gone! */
4053 r2 = IWN_READ(sc, IWN_FH_INT);
4056 DPRINTF(sc, IWN_DEBUG_INTR, "interrupt reg1=0x%08x reg2=0x%08x\n"
4059 if (r1 == 0 && r2 == 0)
4060 goto done; /* Interrupt not for us. */
4062 /* Acknowledge interrupts. */
4063 IWN_WRITE(sc, IWN_INT, r1);
4064 if (!(sc->sc_flags & IWN_FLAG_USE_ICT))
4065 IWN_WRITE(sc, IWN_FH_INT, r2);
4067 if (r1 & IWN_INT_RF_TOGGLED) {
4068 iwn_rftoggle_intr(sc);
4071 if (r1 & IWN_INT_CT_REACHED) {
4072 device_printf(sc->sc_dev, "%s: critical temperature reached!\n",
4075 if (r1 & (IWN_INT_SW_ERR | IWN_INT_HW_ERR)) {
4076 device_printf(sc->sc_dev, "%s: fatal firmware error\n",
4079 iwn_debug_register(sc);
4081 /* Dump firmware error log and stop. */
4084 taskqueue_enqueue(sc->sc_tq, &sc->sc_panic_task);
4087 if ((r1 & (IWN_INT_FH_RX | IWN_INT_SW_RX | IWN_INT_RX_PERIODIC)) ||
4088 (r2 & IWN_FH_INT_RX)) {
4089 if (sc->sc_flags & IWN_FLAG_USE_ICT) {
4090 if (r1 & (IWN_INT_FH_RX | IWN_INT_SW_RX))
4091 IWN_WRITE(sc, IWN_FH_INT, IWN_FH_INT_RX);
4092 IWN_WRITE_1(sc, IWN_INT_PERIODIC,
4093 IWN_INT_PERIODIC_DIS);
4095 if (r1 & (IWN_INT_FH_RX | IWN_INT_SW_RX)) {
4096 IWN_WRITE_1(sc, IWN_INT_PERIODIC,
4097 IWN_INT_PERIODIC_ENA);
4103 if ((r1 & IWN_INT_FH_TX) || (r2 & IWN_FH_INT_TX)) {
4104 if (sc->sc_flags & IWN_FLAG_USE_ICT)
4105 IWN_WRITE(sc, IWN_FH_INT, IWN_FH_INT_TX);
4106 wakeup(sc); /* FH DMA transfer completed. */
4109 if (r1 & IWN_INT_ALIVE)
4110 wakeup(sc); /* Firmware is alive. */
4112 if (r1 & IWN_INT_WAKEUP)
4113 iwn_wakeup_intr(sc);
4116 /* Re-enable interrupts. */
4117 if (ifp->if_flags & IFF_UP)
4118 IWN_WRITE(sc, IWN_INT_MASK, sc->int_mask);
4124 * Update TX scheduler ring when transmitting an 802.11 frame (4965AGN and
4125 * 5000 adapters use a slightly different format).
4128 iwn4965_update_sched(struct iwn_softc *sc, int qid, int idx, uint8_t id,
4131 uint16_t *w = &sc->sched[qid * IWN4965_SCHED_COUNT + idx];
4133 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
4135 *w = htole16(len + 8);
4136 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
4137 BUS_DMASYNC_PREWRITE);
4138 if (idx < IWN_SCHED_WINSZ) {
4139 *(w + IWN_TX_RING_COUNT) = *w;
4140 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
4141 BUS_DMASYNC_PREWRITE);
4146 iwn5000_update_sched(struct iwn_softc *sc, int qid, int idx, uint8_t id,
4149 uint16_t *w = &sc->sched[qid * IWN5000_SCHED_COUNT + idx];
4151 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
4153 *w = htole16(id << 12 | (len + 8));
4154 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
4155 BUS_DMASYNC_PREWRITE);
4156 if (idx < IWN_SCHED_WINSZ) {
4157 *(w + IWN_TX_RING_COUNT) = *w;
4158 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
4159 BUS_DMASYNC_PREWRITE);
4165 iwn5000_reset_sched(struct iwn_softc *sc, int qid, int idx)
4167 uint16_t *w = &sc->sched[qid * IWN5000_SCHED_COUNT + idx];
4169 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
4171 *w = (*w & htole16(0xf000)) | htole16(1);
4172 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
4173 BUS_DMASYNC_PREWRITE);
4174 if (idx < IWN_SCHED_WINSZ) {
4175 *(w + IWN_TX_RING_COUNT) = *w;
4176 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
4177 BUS_DMASYNC_PREWRITE);
4183 * Check whether OFDM 11g protection will be enabled for the given rate.
4185 * The original driver code only enabled protection for OFDM rates.
4186 * It didn't check to see whether it was operating in 11a or 11bg mode.
4189 iwn_check_rate_needs_protection(struct iwn_softc *sc,
4190 struct ieee80211vap *vap, uint8_t rate)
4192 struct ieee80211com *ic = vap->iv_ic;
4195 * Not in 2GHz mode? Then there's no need to enable OFDM
4198 if (! IEEE80211_IS_CHAN_2GHZ(ic->ic_curchan)) {
4203 * 11bg protection not enabled? Then don't use it.
4205 if ((ic->ic_flags & IEEE80211_F_USEPROT) == 0)
4209 * If it's an 11n rate - no protection.
4210 * We'll do it via a specific 11n check.
4212 if (rate & IEEE80211_RATE_MCS) {
4217 * Do a rate table lookup. If the PHY is CCK,
4218 * don't do protection.
4220 if (ieee80211_rate2phytype(ic->ic_rt, rate) == IEEE80211_T_CCK)
4224 * Yup, enable protection.
4230 * return a value between 0 and IWN_MAX_TX_RETRIES-1 as an index into
4231 * the link quality table that reflects this particular entry.
4234 iwn_tx_rate_to_linkq_offset(struct iwn_softc *sc, struct ieee80211_node *ni,
4237 struct ieee80211_rateset *rs;
4244 * Figure out if we're using 11n or not here.
4246 if (IEEE80211_IS_CHAN_HT(ni->ni_chan) && ni->ni_htrates.rs_nrates > 0)
4252 * Use the correct rate table.
4255 rs = (struct ieee80211_rateset *) &ni->ni_htrates;
4256 nr = ni->ni_htrates.rs_nrates;
4263 * Find the relevant link quality entry in the table.
4265 for (i = 0; i < nr && i < IWN_MAX_TX_RETRIES - 1 ; i++) {
4267 * The link quality table index starts at 0 == highest
4268 * rate, so we walk the rate table backwards.
4270 cmp_rate = rs->rs_rates[(nr - 1) - i];
4271 if (rate & IEEE80211_RATE_MCS)
4272 cmp_rate |= IEEE80211_RATE_MCS;
4275 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: idx %d: nr=%d, rate=0x%02x, rateentry=0x%02x\n",
4283 if (cmp_rate == rate)
4287 /* Failed? Start at the end */
4288 return (IWN_MAX_TX_RETRIES - 1);
4292 iwn_tx_data(struct iwn_softc *sc, struct mbuf *m, struct ieee80211_node *ni)
4294 struct iwn_ops *ops = &sc->ops;
4295 const struct ieee80211_txparam *tp;
4296 struct ieee80211vap *vap = ni->ni_vap;
4297 struct ieee80211com *ic = ni->ni_ic;
4298 struct iwn_node *wn = (void *)ni;
4299 struct iwn_tx_ring *ring;
4300 struct iwn_tx_desc *desc;
4301 struct iwn_tx_data *data;
4302 struct iwn_tx_cmd *cmd;
4303 struct iwn_cmd_data *tx;
4304 struct ieee80211_frame *wh;
4305 struct ieee80211_key *k = NULL;
4310 bus_dma_segment_t *seg, segs[IWN_MAX_SCATTER];
4312 int ac, i, totlen, error, pad, nsegs = 0, rate;
4314 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
4316 IWN_LOCK_ASSERT(sc);
4318 wh = mtod(m, struct ieee80211_frame *);
4319 hdrlen = ieee80211_anyhdrsize(wh);
4320 type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK;
4322 /* Select EDCA Access Category and TX ring for this frame. */
4323 if (IEEE80211_QOS_HAS_SEQ(wh)) {
4324 qos = ((const struct ieee80211_qosframe *)wh)->i_qos[0];
4325 tid = qos & IEEE80211_QOS_TID;
4330 ac = M_WME_GETAC(m);
4331 if (m->m_flags & M_AMPDU_MPDU) {
4333 struct ieee80211_tx_ampdu *tap = &ni->ni_tx_ampdu[ac];
4335 if (!IEEE80211_AMPDU_RUNNING(tap)) {
4341 * Queue this frame to the hardware ring that we've
4342 * negotiated AMPDU TX on.
4344 * Note that the sequence number must match the TX slot
4347 ac = *(int *)tap->txa_private;
4348 seqno = ni->ni_txseqs[tid];
4349 *(uint16_t *)wh->i_seq =
4350 htole16(seqno << IEEE80211_SEQ_SEQ_SHIFT);
4351 ring = &sc->txq[ac];
4352 if ((seqno % 256) != ring->cur) {
4353 device_printf(sc->sc_dev,
4354 "%s: m=%p: seqno (%d) (%d) != ring index (%d) !\n",
4361 ni->ni_txseqs[tid]++;
4363 ring = &sc->txq[ac];
4364 desc = &ring->desc[ring->cur];
4365 data = &ring->data[ring->cur];
4367 /* Choose a TX rate index. */
4368 tp = &vap->iv_txparms[ieee80211_chan2mode(ni->ni_chan)];
4369 if (type == IEEE80211_FC0_TYPE_MGT)
4370 rate = tp->mgmtrate;
4371 else if (IEEE80211_IS_MULTICAST(wh->i_addr1))
4372 rate = tp->mcastrate;
4373 else if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE)
4374 rate = tp->ucastrate;
4375 else if (m->m_flags & M_EAPOL)
4376 rate = tp->mgmtrate;
4378 /* XXX pass pktlen */
4379 (void) ieee80211_ratectl_rate(ni, NULL, 0);
4380 rate = ni->ni_txrate;
4383 /* Encrypt the frame if need be. */
4384 if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) {
4385 /* Retrieve key for TX. */
4386 k = ieee80211_crypto_encap(ni, m);
4391 /* 802.11 header may have moved. */
4392 wh = mtod(m, struct ieee80211_frame *);
4394 totlen = m->m_pkthdr.len;
4396 if (ieee80211_radiotap_active_vap(vap)) {
4397 struct iwn_tx_radiotap_header *tap = &sc->sc_txtap;
4400 tap->wt_rate = rate;
4402 tap->wt_flags |= IEEE80211_RADIOTAP_F_WEP;
4404 ieee80211_radiotap_tx(vap, m);
4407 /* Prepare TX firmware command. */
4408 cmd = &ring->cmd[ring->cur];
4409 cmd->code = IWN_CMD_TX_DATA;
4411 cmd->qid = ring->qid;
4412 cmd->idx = ring->cur;
4414 tx = (struct iwn_cmd_data *)cmd->data;
4415 /* NB: No need to clear tx, all fields are reinitialized here. */
4416 tx->scratch = 0; /* clear "scratch" area */
4419 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
4420 /* Unicast frame, check if an ACK is expected. */
4421 if (!qos || (qos & IEEE80211_QOS_ACKPOLICY) !=
4422 IEEE80211_QOS_ACKPOLICY_NOACK)
4423 flags |= IWN_TX_NEED_ACK;
4426 (IEEE80211_FC0_TYPE_MASK | IEEE80211_FC0_SUBTYPE_MASK)) ==
4427 (IEEE80211_FC0_TYPE_CTL | IEEE80211_FC0_SUBTYPE_BAR))
4428 flags |= IWN_TX_IMM_BA; /* Cannot happen yet. */
4430 if (wh->i_fc[1] & IEEE80211_FC1_MORE_FRAG)
4431 flags |= IWN_TX_MORE_FRAG; /* Cannot happen yet. */
4433 /* Check if frame must be protected using RTS/CTS or CTS-to-self. */
4434 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
4435 /* NB: Group frames are sent using CCK in 802.11b/g. */
4436 if (totlen + IEEE80211_CRC_LEN > vap->iv_rtsthreshold) {
4437 flags |= IWN_TX_NEED_RTS;
4438 } else if (iwn_check_rate_needs_protection(sc, vap, rate)) {
4439 if (ic->ic_protmode == IEEE80211_PROT_CTSONLY)
4440 flags |= IWN_TX_NEED_CTS;
4441 else if (ic->ic_protmode == IEEE80211_PROT_RTSCTS)
4442 flags |= IWN_TX_NEED_RTS;
4443 } else if ((rate & IEEE80211_RATE_MCS) &&
4444 (ic->ic_htprotmode == IEEE80211_PROT_RTSCTS)) {
4445 flags |= IWN_TX_NEED_RTS;
4448 /* XXX HT protection? */
4450 if (flags & (IWN_TX_NEED_RTS | IWN_TX_NEED_CTS)) {
4451 if (sc->hw_type != IWN_HW_REV_TYPE_4965) {
4452 /* 5000 autoselects RTS/CTS or CTS-to-self. */
4453 flags &= ~(IWN_TX_NEED_RTS | IWN_TX_NEED_CTS);
4454 flags |= IWN_TX_NEED_PROTECTION;
4456 flags |= IWN_TX_FULL_TXOP;
4460 if (IEEE80211_IS_MULTICAST(wh->i_addr1) ||
4461 type != IEEE80211_FC0_TYPE_DATA)
4462 tx->id = sc->broadcast_id;
4466 if (type == IEEE80211_FC0_TYPE_MGT) {
4467 uint8_t subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
4469 /* Tell HW to set timestamp in probe responses. */
4470 if (subtype == IEEE80211_FC0_SUBTYPE_PROBE_RESP)
4471 flags |= IWN_TX_INSERT_TSTAMP;
4472 if (subtype == IEEE80211_FC0_SUBTYPE_ASSOC_REQ ||
4473 subtype == IEEE80211_FC0_SUBTYPE_REASSOC_REQ)
4474 tx->timeout = htole16(3);
4476 tx->timeout = htole16(2);
4478 tx->timeout = htole16(0);
4481 /* First segment length must be a multiple of 4. */
4482 flags |= IWN_TX_NEED_PADDING;
4483 pad = 4 - (hdrlen & 3);
4487 tx->len = htole16(totlen);
4489 tx->rts_ntries = 60;
4490 tx->data_ntries = 15;
4491 tx->lifetime = htole32(IWN_LIFETIME_INFINITE);
4492 tx->rate = iwn_rate_to_plcp(sc, ni, rate);
4493 if (tx->id == sc->broadcast_id) {
4494 /* Group or management frame. */
4497 tx->linkq = iwn_tx_rate_to_linkq_offset(sc, ni, rate);
4498 flags |= IWN_TX_LINKQ; /* enable MRR */
4501 /* Set physical address of "scratch area". */
4502 tx->loaddr = htole32(IWN_LOADDR(data->scratch_paddr));
4503 tx->hiaddr = IWN_HIADDR(data->scratch_paddr);
4505 /* Copy 802.11 header in TX command. */
4506 memcpy((uint8_t *)(tx + 1), wh, hdrlen);
4508 /* Trim 802.11 header. */
4511 tx->flags = htole32(flags);
4513 error = bus_dmamap_load_mbuf_sg(ring->data_dmat, data->map, m, segs,
4514 &nsegs, BUS_DMA_NOWAIT);
4516 if (error != EFBIG) {
4517 device_printf(sc->sc_dev,
4518 "%s: can't map mbuf (error %d)\n", __func__, error);
4522 /* Too many DMA segments, linearize mbuf. */
4523 m1 = m_collapse(m, M_NOWAIT, IWN_MAX_SCATTER);
4525 device_printf(sc->sc_dev,
4526 "%s: could not defrag mbuf\n", __func__);
4532 error = bus_dmamap_load_mbuf_sg(ring->data_dmat, data->map, m,
4533 segs, &nsegs, BUS_DMA_NOWAIT);
4535 device_printf(sc->sc_dev,
4536 "%s: can't map mbuf (error %d)\n", __func__, error);
4545 DPRINTF(sc, IWN_DEBUG_XMIT,
4546 "%s: qid %d idx %d len %d nsegs %d flags 0x%08x rate 0x%04x plcp 0x%08x\n",
4556 /* Fill TX descriptor. */
4559 desc->nsegs += nsegs;
4560 /* First DMA segment is used by the TX command. */
4561 desc->segs[0].addr = htole32(IWN_LOADDR(data->cmd_paddr));
4562 desc->segs[0].len = htole16(IWN_HIADDR(data->cmd_paddr) |
4563 (4 + sizeof (*tx) + hdrlen + pad) << 4);
4564 /* Other DMA segments are for data payload. */
4566 for (i = 1; i <= nsegs; i++) {
4567 desc->segs[i].addr = htole32(IWN_LOADDR(seg->ds_addr));
4568 desc->segs[i].len = htole16(IWN_HIADDR(seg->ds_addr) |
4573 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_PREWRITE);
4574 bus_dmamap_sync(ring->data_dmat, ring->cmd_dma.map,
4575 BUS_DMASYNC_PREWRITE);
4576 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
4577 BUS_DMASYNC_PREWRITE);
4579 /* Update TX scheduler. */
4580 if (ring->qid >= sc->firstaggqueue)
4581 ops->update_sched(sc, ring->qid, ring->cur, tx->id, totlen);
4584 ring->cur = (ring->cur + 1) % IWN_TX_RING_COUNT;
4585 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, ring->qid << 8 | ring->cur);
4587 /* Mark TX ring as full if we reach a certain threshold. */
4588 if (++ring->queued > IWN_TX_RING_HIMARK)
4589 sc->qfullmsk |= 1 << ring->qid;
4591 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
4597 iwn_tx_data_raw(struct iwn_softc *sc, struct mbuf *m,
4598 struct ieee80211_node *ni, const struct ieee80211_bpf_params *params)
4600 struct iwn_ops *ops = &sc->ops;
4601 // struct ifnet *ifp = sc->sc_ifp;
4602 struct ieee80211vap *vap = ni->ni_vap;
4603 // struct ieee80211com *ic = ifp->if_l2com;
4604 struct iwn_tx_cmd *cmd;
4605 struct iwn_cmd_data *tx;
4606 struct ieee80211_frame *wh;
4607 struct iwn_tx_ring *ring;
4608 struct iwn_tx_desc *desc;
4609 struct iwn_tx_data *data;
4611 bus_dma_segment_t *seg, segs[IWN_MAX_SCATTER];
4614 int ac, totlen, error, pad, nsegs = 0, i, rate;
4617 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
4619 IWN_LOCK_ASSERT(sc);
4621 wh = mtod(m, struct ieee80211_frame *);
4622 hdrlen = ieee80211_anyhdrsize(wh);
4623 type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK;
4625 ac = params->ibp_pri & 3;
4627 ring = &sc->txq[ac];
4628 desc = &ring->desc[ring->cur];
4629 data = &ring->data[ring->cur];
4631 /* Choose a TX rate. */
4632 rate = params->ibp_rate0;
4633 totlen = m->m_pkthdr.len;
4635 /* Prepare TX firmware command. */
4636 cmd = &ring->cmd[ring->cur];
4637 cmd->code = IWN_CMD_TX_DATA;
4639 cmd->qid = ring->qid;
4640 cmd->idx = ring->cur;
4642 tx = (struct iwn_cmd_data *)cmd->data;
4643 /* NB: No need to clear tx, all fields are reinitialized here. */
4644 tx->scratch = 0; /* clear "scratch" area */
4647 if ((params->ibp_flags & IEEE80211_BPF_NOACK) == 0)
4648 flags |= IWN_TX_NEED_ACK;
4649 if (params->ibp_flags & IEEE80211_BPF_RTS) {
4650 if (sc->hw_type != IWN_HW_REV_TYPE_4965) {
4651 /* 5000 autoselects RTS/CTS or CTS-to-self. */
4652 flags &= ~IWN_TX_NEED_RTS;
4653 flags |= IWN_TX_NEED_PROTECTION;
4655 flags |= IWN_TX_NEED_RTS | IWN_TX_FULL_TXOP;
4657 if (params->ibp_flags & IEEE80211_BPF_CTS) {
4658 if (sc->hw_type != IWN_HW_REV_TYPE_4965) {
4659 /* 5000 autoselects RTS/CTS or CTS-to-self. */
4660 flags &= ~IWN_TX_NEED_CTS;
4661 flags |= IWN_TX_NEED_PROTECTION;
4663 flags |= IWN_TX_NEED_CTS | IWN_TX_FULL_TXOP;
4665 if (type == IEEE80211_FC0_TYPE_MGT) {
4666 uint8_t subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
4668 /* Tell HW to set timestamp in probe responses. */
4669 if (subtype == IEEE80211_FC0_SUBTYPE_PROBE_RESP)
4670 flags |= IWN_TX_INSERT_TSTAMP;
4672 if (subtype == IEEE80211_FC0_SUBTYPE_ASSOC_REQ ||
4673 subtype == IEEE80211_FC0_SUBTYPE_REASSOC_REQ)
4674 tx->timeout = htole16(3);
4676 tx->timeout = htole16(2);
4678 tx->timeout = htole16(0);
4681 /* First segment length must be a multiple of 4. */
4682 flags |= IWN_TX_NEED_PADDING;
4683 pad = 4 - (hdrlen & 3);
4687 if (ieee80211_radiotap_active_vap(vap)) {
4688 struct iwn_tx_radiotap_header *tap = &sc->sc_txtap;
4691 tap->wt_rate = rate;
4693 ieee80211_radiotap_tx(vap, m);
4696 tx->len = htole16(totlen);
4698 tx->id = sc->broadcast_id;
4699 tx->rts_ntries = params->ibp_try1;
4700 tx->data_ntries = params->ibp_try0;
4701 tx->lifetime = htole32(IWN_LIFETIME_INFINITE);
4702 tx->rate = iwn_rate_to_plcp(sc, ni, rate);
4704 /* Group or management frame. */
4707 /* Set physical address of "scratch area". */
4708 tx->loaddr = htole32(IWN_LOADDR(data->scratch_paddr));
4709 tx->hiaddr = IWN_HIADDR(data->scratch_paddr);
4711 /* Copy 802.11 header in TX command. */
4712 memcpy((uint8_t *)(tx + 1), wh, hdrlen);
4714 /* Trim 802.11 header. */
4717 tx->flags = htole32(flags);
4719 error = bus_dmamap_load_mbuf_sg(ring->data_dmat, data->map, m, segs,
4720 &nsegs, BUS_DMA_NOWAIT);
4722 if (error != EFBIG) {
4723 device_printf(sc->sc_dev,
4724 "%s: can't map mbuf (error %d)\n", __func__, error);
4728 /* Too many DMA segments, linearize mbuf. */
4729 m1 = m_collapse(m, M_NOWAIT, IWN_MAX_SCATTER);
4731 device_printf(sc->sc_dev,
4732 "%s: could not defrag mbuf\n", __func__);
4738 error = bus_dmamap_load_mbuf_sg(ring->data_dmat, data->map, m,
4739 segs, &nsegs, BUS_DMA_NOWAIT);
4741 device_printf(sc->sc_dev,
4742 "%s: can't map mbuf (error %d)\n", __func__, error);
4751 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: qid %d idx %d len %d nsegs %d\n",
4752 __func__, ring->qid, ring->cur, m->m_pkthdr.len, nsegs);
4754 /* Fill TX descriptor. */
4757 desc->nsegs += nsegs;
4758 /* First DMA segment is used by the TX command. */
4759 desc->segs[0].addr = htole32(IWN_LOADDR(data->cmd_paddr));
4760 desc->segs[0].len = htole16(IWN_HIADDR(data->cmd_paddr) |
4761 (4 + sizeof (*tx) + hdrlen + pad) << 4);
4762 /* Other DMA segments are for data payload. */
4764 for (i = 1; i <= nsegs; i++) {
4765 desc->segs[i].addr = htole32(IWN_LOADDR(seg->ds_addr));
4766 desc->segs[i].len = htole16(IWN_HIADDR(seg->ds_addr) |
4771 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_PREWRITE);
4772 bus_dmamap_sync(ring->data_dmat, ring->cmd_dma.map,
4773 BUS_DMASYNC_PREWRITE);
4774 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
4775 BUS_DMASYNC_PREWRITE);
4777 /* Update TX scheduler. */
4778 if (ring->qid >= sc->firstaggqueue)
4779 ops->update_sched(sc, ring->qid, ring->cur, tx->id, totlen);
4782 ring->cur = (ring->cur + 1) % IWN_TX_RING_COUNT;
4783 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, ring->qid << 8 | ring->cur);
4785 /* Mark TX ring as full if we reach a certain threshold. */
4786 if (++ring->queued > IWN_TX_RING_HIMARK)
4787 sc->qfullmsk |= 1 << ring->qid;
4789 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
4795 iwn_raw_xmit(struct ieee80211_node *ni, struct mbuf *m,
4796 const struct ieee80211_bpf_params *params)
4798 struct ieee80211com *ic = ni->ni_ic;
4799 struct ifnet *ifp = ic->ic_ifp;
4800 struct iwn_softc *sc = ifp->if_softc;
4803 DPRINTF(sc, IWN_DEBUG_XMIT | IWN_DEBUG_TRACE, "->%s begin\n", __func__);
4805 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) {
4806 ieee80211_free_node(ni);
4812 if (params == NULL) {
4814 * Legacy path; interpret frame contents to decide
4815 * precisely how to send the frame.
4817 error = iwn_tx_data(sc, m, ni);
4820 * Caller supplied explicit parameters to use in
4821 * sending the frame.
4823 error = iwn_tx_data_raw(sc, m, ni, params);
4826 /* NB: m is reclaimed on tx failure */
4827 ieee80211_free_node(ni);
4828 if_inc_counter(ifp, IFCOUNTER_OERRORS, 1);
4830 sc->sc_tx_timer = 5;
4834 DPRINTF(sc, IWN_DEBUG_TRACE | IWN_DEBUG_XMIT, "->%s: end\n",__func__);
4840 iwn_start(struct ifnet *ifp)
4842 struct iwn_softc *sc = ifp->if_softc;
4845 iwn_start_locked(ifp);
4850 iwn_start_locked(struct ifnet *ifp)
4852 struct iwn_softc *sc = ifp->if_softc;
4853 struct ieee80211_node *ni;
4856 IWN_LOCK_ASSERT(sc);
4858 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: called\n", __func__);
4860 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0 ||
4861 (ifp->if_drv_flags & IFF_DRV_OACTIVE))
4865 if (sc->qfullmsk != 0) {
4866 ifp->if_drv_flags |= IFF_DRV_OACTIVE;
4869 IFQ_DRV_DEQUEUE(&ifp->if_snd, m);
4872 ni = (struct ieee80211_node *)m->m_pkthdr.rcvif;
4873 if (iwn_tx_data(sc, m, ni) != 0) {
4874 ieee80211_free_node(ni);
4875 if_inc_counter(ifp, IFCOUNTER_OERRORS, 1);
4878 sc->sc_tx_timer = 5;
4881 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: done\n", __func__);
4885 iwn_watchdog(void *arg)
4887 struct iwn_softc *sc = arg;
4888 struct ifnet *ifp = sc->sc_ifp;
4889 struct ieee80211com *ic = ifp->if_l2com;
4891 IWN_LOCK_ASSERT(sc);
4893 KASSERT(ifp->if_drv_flags & IFF_DRV_RUNNING, ("not running"));
4895 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
4897 if (sc->sc_tx_timer > 0) {
4898 if (--sc->sc_tx_timer == 0) {
4899 if_printf(ifp, "device timeout\n");
4900 ieee80211_runtask(ic, &sc->sc_reinit_task);
4904 callout_reset(&sc->watchdog_to, hz, iwn_watchdog, sc);
4908 iwn_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
4910 struct iwn_softc *sc = ifp->if_softc;
4911 struct ieee80211com *ic = ifp->if_l2com;
4912 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
4913 struct ifreq *ifr = (struct ifreq *) data;
4914 int error = 0, startall = 0, stop = 0;
4918 error = ether_ioctl(ifp, cmd, data);
4922 if (ifp->if_flags & IFF_UP) {
4923 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) {
4924 iwn_init_locked(sc);
4925 if (IWN_READ(sc, IWN_GP_CNTRL) & IWN_GP_CNTRL_RFKILL)
4931 if (ifp->if_drv_flags & IFF_DRV_RUNNING)
4932 iwn_stop_locked(sc);
4936 ieee80211_start_all(ic);
4937 else if (vap != NULL && stop)
4938 ieee80211_stop(vap);
4941 error = ifmedia_ioctl(ifp, ifr, &ic->ic_media, cmd);
4945 /* XXX validate permissions/memory/etc? */
4946 error = copyout(&sc->last_stat, ifr->ifr_data,
4947 sizeof(struct iwn_stats));
4952 memset(&sc->last_stat, 0, sizeof(struct iwn_stats));
4964 * Send a command to the firmware.
4967 iwn_cmd(struct iwn_softc *sc, int code, const void *buf, int size, int async)
4969 struct iwn_tx_ring *ring;
4970 struct iwn_tx_desc *desc;
4971 struct iwn_tx_data *data;
4972 struct iwn_tx_cmd *cmd;
4978 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
4981 IWN_LOCK_ASSERT(sc);
4983 if (sc->sc_flags & IWN_FLAG_PAN_SUPPORT)
4984 cmd_queue_num = IWN_PAN_CMD_QUEUE;
4986 cmd_queue_num = IWN_CMD_QUEUE_NUM;
4988 ring = &sc->txq[cmd_queue_num];
4989 desc = &ring->desc[ring->cur];
4990 data = &ring->data[ring->cur];
4993 if (size > sizeof cmd->data) {
4994 /* Command is too large to fit in a descriptor. */
4995 if (totlen > MCLBYTES)
4997 m = m_getjcl(M_NOWAIT, MT_DATA, M_PKTHDR, MJUMPAGESIZE);
5000 cmd = mtod(m, struct iwn_tx_cmd *);
5001 error = bus_dmamap_load(ring->data_dmat, data->map, cmd,
5002 totlen, iwn_dma_map_addr, &paddr, BUS_DMA_NOWAIT);
5009 cmd = &ring->cmd[ring->cur];
5010 paddr = data->cmd_paddr;
5015 cmd->qid = ring->qid;
5016 cmd->idx = ring->cur;
5017 memcpy(cmd->data, buf, size);
5020 desc->segs[0].addr = htole32(IWN_LOADDR(paddr));
5021 desc->segs[0].len = htole16(IWN_HIADDR(paddr) | totlen << 4);
5023 DPRINTF(sc, IWN_DEBUG_CMD, "%s: %s (0x%x) flags %d qid %d idx %d\n",
5024 __func__, iwn_intr_str(cmd->code), cmd->code,
5025 cmd->flags, cmd->qid, cmd->idx);
5027 if (size > sizeof cmd->data) {
5028 bus_dmamap_sync(ring->data_dmat, data->map,
5029 BUS_DMASYNC_PREWRITE);
5031 bus_dmamap_sync(ring->data_dmat, ring->cmd_dma.map,
5032 BUS_DMASYNC_PREWRITE);
5034 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
5035 BUS_DMASYNC_PREWRITE);
5037 /* Kick command ring. */
5038 ring->cur = (ring->cur + 1) % IWN_TX_RING_COUNT;
5039 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, ring->qid << 8 | ring->cur);
5041 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
5043 return async ? 0 : msleep(desc, &sc->sc_mtx, PCATCH, "iwncmd", hz);
5047 iwn4965_add_node(struct iwn_softc *sc, struct iwn_node_info *node, int async)
5049 struct iwn4965_node_info hnode;
5052 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5055 * We use the node structure for 5000 Series internally (it is
5056 * a superset of the one for 4965AGN). We thus copy the common
5057 * fields before sending the command.
5059 src = (caddr_t)node;
5060 dst = (caddr_t)&hnode;
5061 memcpy(dst, src, 48);
5062 /* Skip TSC, RX MIC and TX MIC fields from ``src''. */
5063 memcpy(dst + 48, src + 72, 20);
5064 return iwn_cmd(sc, IWN_CMD_ADD_NODE, &hnode, sizeof hnode, async);
5068 iwn5000_add_node(struct iwn_softc *sc, struct iwn_node_info *node, int async)
5071 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5073 /* Direct mapping. */
5074 return iwn_cmd(sc, IWN_CMD_ADD_NODE, node, sizeof (*node), async);
5078 iwn_set_link_quality(struct iwn_softc *sc, struct ieee80211_node *ni)
5080 #define RV(v) ((v) & IEEE80211_RATE_VAL)
5081 struct iwn_node *wn = (void *)ni;
5082 struct ieee80211_rateset *rs;
5083 struct iwn_cmd_link_quality linkq;
5084 int i, rate, txrate;
5087 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
5089 memset(&linkq, 0, sizeof linkq);
5091 linkq.antmsk_1stream = iwn_get_1stream_tx_antmask(sc);
5092 linkq.antmsk_2stream = iwn_get_2stream_tx_antmask(sc);
5094 linkq.ampdu_max = 32; /* XXX negotiated? */
5095 linkq.ampdu_threshold = 3;
5096 linkq.ampdu_limit = htole16(4000); /* 4ms */
5098 DPRINTF(sc, IWN_DEBUG_XMIT,
5099 "%s: 1stream antenna=0x%02x, 2stream antenna=0x%02x, ntxstreams=%d\n",
5101 linkq.antmsk_1stream,
5102 linkq.antmsk_2stream,
5106 * Are we using 11n rates? Ensure the channel is
5107 * 11n _and_ we have some 11n rates, or don't
5110 if (IEEE80211_IS_CHAN_HT(ni->ni_chan) && ni->ni_htrates.rs_nrates > 0) {
5111 rs = (struct ieee80211_rateset *) &ni->ni_htrates;
5118 /* Start at highest available bit-rate. */
5120 * XXX this is all very dirty!
5123 txrate = ni->ni_htrates.rs_nrates - 1;
5125 txrate = rs->rs_nrates - 1;
5126 for (i = 0; i < IWN_MAX_TX_RETRIES; i++) {
5130 * XXX TODO: ensure the last two slots are the two lowest
5131 * rate entries, just for now.
5133 if (i == 14 || i == 15)
5137 rate = IEEE80211_RATE_MCS | rs->rs_rates[txrate];
5139 rate = RV(rs->rs_rates[txrate]);
5141 /* Do rate -> PLCP config mapping */
5142 plcp = iwn_rate_to_plcp(sc, ni, rate);
5143 linkq.retry[i] = plcp;
5144 DPRINTF(sc, IWN_DEBUG_XMIT,
5145 "%s: i=%d, txrate=%d, rate=0x%02x, plcp=0x%08x\n",
5153 * The mimo field is an index into the table which
5154 * indicates the first index where it and subsequent entries
5155 * will not be using MIMO.
5157 * Since we're filling linkq from 0..15 and we're filling
5158 * from the higest MCS rates to the lowest rates, if we
5159 * _are_ doing a dual-stream rate, set mimo to idx+1 (ie,
5160 * the next entry.) That way if the next entry is a non-MIMO
5161 * entry, we're already pointing at it.
5163 if ((le32toh(plcp) & IWN_RFLAG_MCS) &&
5164 RV(le32toh(plcp)) > 7)
5167 /* Next retry at immediate lower bit-rate. */
5172 * If we reached the end of the list and indeed we hit
5173 * all MIMO rates (eg 5300 doing MCS23-15) then yes,
5174 * set mimo to 15. Setting it to 16 panics the firmware.
5176 if (linkq.mimo > 15)
5179 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: mimo = %d\n", __func__, linkq.mimo);
5181 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
5183 return iwn_cmd(sc, IWN_CMD_LINK_QUALITY, &linkq, sizeof linkq, 1);
5188 * Broadcast node is used to send group-addressed and management frames.
5191 iwn_add_broadcast_node(struct iwn_softc *sc, int async)
5193 struct iwn_ops *ops = &sc->ops;
5194 struct ifnet *ifp = sc->sc_ifp;
5195 struct ieee80211com *ic = ifp->if_l2com;
5196 struct iwn_node_info node;
5197 struct iwn_cmd_link_quality linkq;
5201 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
5203 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX];
5205 memset(&node, 0, sizeof node);
5206 IEEE80211_ADDR_COPY(node.macaddr, ifp->if_broadcastaddr);
5207 node.id = sc->broadcast_id;
5208 DPRINTF(sc, IWN_DEBUG_RESET, "%s: adding broadcast node\n", __func__);
5209 if ((error = ops->add_node(sc, &node, async)) != 0)
5212 /* Use the first valid TX antenna. */
5213 txant = IWN_LSB(sc->txchainmask);
5215 memset(&linkq, 0, sizeof linkq);
5216 linkq.id = sc->broadcast_id;
5217 linkq.antmsk_1stream = iwn_get_1stream_tx_antmask(sc);
5218 linkq.antmsk_2stream = iwn_get_2stream_tx_antmask(sc);
5219 linkq.ampdu_max = 64;
5220 linkq.ampdu_threshold = 3;
5221 linkq.ampdu_limit = htole16(4000); /* 4ms */
5223 /* Use lowest mandatory bit-rate. */
5224 /* XXX rate table lookup? */
5225 if (IEEE80211_IS_CHAN_5GHZ(ic->ic_curchan))
5226 linkq.retry[0] = htole32(0xd);
5228 linkq.retry[0] = htole32(10 | IWN_RFLAG_CCK);
5229 linkq.retry[0] |= htole32(IWN_RFLAG_ANT(txant));
5230 /* Use same bit-rate for all TX retries. */
5231 for (i = 1; i < IWN_MAX_TX_RETRIES; i++) {
5232 linkq.retry[i] = linkq.retry[0];
5235 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
5237 return iwn_cmd(sc, IWN_CMD_LINK_QUALITY, &linkq, sizeof linkq, async);
5241 iwn_updateedca(struct ieee80211com *ic)
5243 #define IWN_EXP2(x) ((1 << (x)) - 1) /* CWmin = 2^ECWmin - 1 */
5244 struct iwn_softc *sc = ic->ic_ifp->if_softc;
5245 struct iwn_edca_params cmd;
5248 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
5250 memset(&cmd, 0, sizeof cmd);
5251 cmd.flags = htole32(IWN_EDCA_UPDATE);
5252 for (aci = 0; aci < WME_NUM_AC; aci++) {
5253 const struct wmeParams *ac =
5254 &ic->ic_wme.wme_chanParams.cap_wmeParams[aci];
5255 cmd.ac[aci].aifsn = ac->wmep_aifsn;
5256 cmd.ac[aci].cwmin = htole16(IWN_EXP2(ac->wmep_logcwmin));
5257 cmd.ac[aci].cwmax = htole16(IWN_EXP2(ac->wmep_logcwmax));
5258 cmd.ac[aci].txoplimit =
5259 htole16(IEEE80211_TXOP_TO_US(ac->wmep_txopLimit));
5261 IEEE80211_UNLOCK(ic);
5263 (void)iwn_cmd(sc, IWN_CMD_EDCA_PARAMS, &cmd, sizeof cmd, 1);
5267 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
5274 iwn_update_mcast(struct ifnet *ifp)
5280 iwn_set_led(struct iwn_softc *sc, uint8_t which, uint8_t off, uint8_t on)
5282 struct iwn_cmd_led led;
5284 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5287 /* XXX don't set LEDs during scan? */
5288 if (sc->sc_is_scanning)
5292 /* Clear microcode LED ownership. */
5293 IWN_CLRBITS(sc, IWN_LED, IWN_LED_BSM_CTRL);
5296 led.unit = htole32(10000); /* on/off in unit of 100ms */
5299 (void)iwn_cmd(sc, IWN_CMD_SET_LED, &led, sizeof led, 1);
5303 * Set the critical temperature at which the firmware will stop the radio
5307 iwn_set_critical_temp(struct iwn_softc *sc)
5309 struct iwn_critical_temp crit;
5312 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5314 IWN_WRITE(sc, IWN_UCODE_GP1_CLR, IWN_UCODE_GP1_CTEMP_STOP_RF);
5316 if (sc->hw_type == IWN_HW_REV_TYPE_5150)
5317 temp = (IWN_CTOK(110) - sc->temp_off) * -5;
5318 else if (sc->hw_type == IWN_HW_REV_TYPE_4965)
5319 temp = IWN_CTOK(110);
5322 memset(&crit, 0, sizeof crit);
5323 crit.tempR = htole32(temp);
5324 DPRINTF(sc, IWN_DEBUG_RESET, "setting critical temp to %d\n", temp);
5325 return iwn_cmd(sc, IWN_CMD_SET_CRITICAL_TEMP, &crit, sizeof crit, 0);
5329 iwn_set_timing(struct iwn_softc *sc, struct ieee80211_node *ni)
5331 struct iwn_cmd_timing cmd;
5334 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5336 memset(&cmd, 0, sizeof cmd);
5337 memcpy(&cmd.tstamp, ni->ni_tstamp.data, sizeof (uint64_t));
5338 cmd.bintval = htole16(ni->ni_intval);
5339 cmd.lintval = htole16(10);
5341 /* Compute remaining time until next beacon. */
5342 val = (uint64_t)ni->ni_intval * IEEE80211_DUR_TU;
5343 mod = le64toh(cmd.tstamp) % val;
5344 cmd.binitval = htole32((uint32_t)(val - mod));
5346 DPRINTF(sc, IWN_DEBUG_RESET, "timing bintval=%u tstamp=%ju, init=%u\n",
5347 ni->ni_intval, le64toh(cmd.tstamp), (uint32_t)(val - mod));
5349 return iwn_cmd(sc, IWN_CMD_TIMING, &cmd, sizeof cmd, 1);
5353 iwn4965_power_calibration(struct iwn_softc *sc, int temp)
5355 struct ifnet *ifp = sc->sc_ifp;
5356 struct ieee80211com *ic = ifp->if_l2com;
5358 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5360 /* Adjust TX power if need be (delta >= 3 degC). */
5361 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: temperature %d->%d\n",
5362 __func__, sc->temp, temp);
5363 if (abs(temp - sc->temp) >= 3) {
5364 /* Record temperature of last calibration. */
5366 (void)iwn4965_set_txpower(sc, ic->ic_bsschan, 1);
5371 * Set TX power for current channel (each rate has its own power settings).
5372 * This function takes into account the regulatory information from EEPROM,
5373 * the current temperature and the current voltage.
5376 iwn4965_set_txpower(struct iwn_softc *sc, struct ieee80211_channel *ch,
5379 /* Fixed-point arithmetic division using a n-bit fractional part. */
5380 #define fdivround(a, b, n) \
5381 ((((1 << n) * (a)) / (b) + (1 << n) / 2) / (1 << n))
5382 /* Linear interpolation. */
5383 #define interpolate(x, x1, y1, x2, y2, n) \
5384 ((y1) + fdivround(((int)(x) - (x1)) * ((y2) - (y1)), (x2) - (x1), n))
5386 static const int tdiv[IWN_NATTEN_GROUPS] = { 9, 8, 8, 8, 6 };
5387 struct iwn_ucode_info *uc = &sc->ucode_info;
5388 struct iwn4965_cmd_txpower cmd;
5389 struct iwn4965_eeprom_chan_samples *chans;
5390 const uint8_t *rf_gain, *dsp_gain;
5391 int32_t vdiff, tdiff;
5392 int i, c, grp, maxpwr;
5395 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX];
5396 /* Retrieve current channel from last RXON. */
5397 chan = sc->rxon->chan;
5398 DPRINTF(sc, IWN_DEBUG_RESET, "setting TX power for channel %d\n",
5401 memset(&cmd, 0, sizeof cmd);
5402 cmd.band = IEEE80211_IS_CHAN_5GHZ(ch) ? 0 : 1;
5405 if (IEEE80211_IS_CHAN_5GHZ(ch)) {
5406 maxpwr = sc->maxpwr5GHz;
5407 rf_gain = iwn4965_rf_gain_5ghz;
5408 dsp_gain = iwn4965_dsp_gain_5ghz;
5410 maxpwr = sc->maxpwr2GHz;
5411 rf_gain = iwn4965_rf_gain_2ghz;
5412 dsp_gain = iwn4965_dsp_gain_2ghz;
5415 /* Compute voltage compensation. */
5416 vdiff = ((int32_t)le32toh(uc->volt) - sc->eeprom_voltage) / 7;
5421 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
5422 "%s: voltage compensation=%d (UCODE=%d, EEPROM=%d)\n",
5423 __func__, vdiff, le32toh(uc->volt), sc->eeprom_voltage);
5425 /* Get channel attenuation group. */
5426 if (chan <= 20) /* 1-20 */
5428 else if (chan <= 43) /* 34-43 */
5430 else if (chan <= 70) /* 44-70 */
5432 else if (chan <= 124) /* 71-124 */
5436 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
5437 "%s: chan %d, attenuation group=%d\n", __func__, chan, grp);
5439 /* Get channel sub-band. */
5440 for (i = 0; i < IWN_NBANDS; i++)
5441 if (sc->bands[i].lo != 0 &&
5442 sc->bands[i].lo <= chan && chan <= sc->bands[i].hi)
5444 if (i == IWN_NBANDS) /* Can't happen in real-life. */
5446 chans = sc->bands[i].chans;
5447 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
5448 "%s: chan %d sub-band=%d\n", __func__, chan, i);
5450 for (c = 0; c < 2; c++) {
5451 uint8_t power, gain, temp;
5452 int maxchpwr, pwr, ridx, idx;
5454 power = interpolate(chan,
5455 chans[0].num, chans[0].samples[c][1].power,
5456 chans[1].num, chans[1].samples[c][1].power, 1);
5457 gain = interpolate(chan,
5458 chans[0].num, chans[0].samples[c][1].gain,
5459 chans[1].num, chans[1].samples[c][1].gain, 1);
5460 temp = interpolate(chan,
5461 chans[0].num, chans[0].samples[c][1].temp,
5462 chans[1].num, chans[1].samples[c][1].temp, 1);
5463 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
5464 "%s: Tx chain %d: power=%d gain=%d temp=%d\n",
5465 __func__, c, power, gain, temp);
5467 /* Compute temperature compensation. */
5468 tdiff = ((sc->temp - temp) * 2) / tdiv[grp];
5469 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
5470 "%s: temperature compensation=%d (current=%d, EEPROM=%d)\n",
5471 __func__, tdiff, sc->temp, temp);
5473 for (ridx = 0; ridx <= IWN_RIDX_MAX; ridx++) {
5474 /* Convert dBm to half-dBm. */
5475 maxchpwr = sc->maxpwr[chan] * 2;
5477 maxchpwr -= 6; /* MIMO 2T: -3dB */
5481 /* Adjust TX power based on rate. */
5482 if ((ridx % 8) == 5)
5483 pwr -= 15; /* OFDM48: -7.5dB */
5484 else if ((ridx % 8) == 6)
5485 pwr -= 17; /* OFDM54: -8.5dB */
5486 else if ((ridx % 8) == 7)
5487 pwr -= 20; /* OFDM60: -10dB */
5489 pwr -= 10; /* Others: -5dB */
5491 /* Do not exceed channel max TX power. */
5495 idx = gain - (pwr - power) - tdiff - vdiff;
5496 if ((ridx / 8) & 1) /* MIMO */
5497 idx += (int32_t)le32toh(uc->atten[grp][c]);
5500 idx += 9; /* 5GHz */
5501 if (ridx == IWN_RIDX_MAX)
5504 /* Make sure idx stays in a valid range. */
5507 else if (idx > IWN4965_MAX_PWR_INDEX)
5508 idx = IWN4965_MAX_PWR_INDEX;
5510 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
5511 "%s: Tx chain %d, rate idx %d: power=%d\n",
5512 __func__, c, ridx, idx);
5513 cmd.power[ridx].rf_gain[c] = rf_gain[idx];
5514 cmd.power[ridx].dsp_gain[c] = dsp_gain[idx];
5518 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
5519 "%s: set tx power for chan %d\n", __func__, chan);
5520 return iwn_cmd(sc, IWN_CMD_TXPOWER, &cmd, sizeof cmd, async);
5527 iwn5000_set_txpower(struct iwn_softc *sc, struct ieee80211_channel *ch,
5530 struct iwn5000_cmd_txpower cmd;
5533 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5536 * TX power calibration is handled automatically by the firmware
5539 memset(&cmd, 0, sizeof cmd);
5540 cmd.global_limit = 2 * IWN5000_TXPOWER_MAX_DBM; /* 16 dBm */
5541 cmd.flags = IWN5000_TXPOWER_NO_CLOSED;
5542 cmd.srv_limit = IWN5000_TXPOWER_AUTO;
5543 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_XMIT,
5544 "%s: setting TX power; rev=%d\n",
5546 IWN_UCODE_API(sc->ucode_rev));
5547 if (IWN_UCODE_API(sc->ucode_rev) == 1)
5548 cmdid = IWN_CMD_TXPOWER_DBM_V1;
5550 cmdid = IWN_CMD_TXPOWER_DBM;
5551 return iwn_cmd(sc, cmdid, &cmd, sizeof cmd, async);
5555 * Retrieve the maximum RSSI (in dBm) among receivers.
5558 iwn4965_get_rssi(struct iwn_softc *sc, struct iwn_rx_stat *stat)
5560 struct iwn4965_rx_phystat *phy = (void *)stat->phybuf;
5564 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5566 mask = (le16toh(phy->antenna) >> 4) & IWN_ANT_ABC;
5567 agc = (le16toh(phy->agc) >> 7) & 0x7f;
5570 if (mask & IWN_ANT_A)
5571 rssi = MAX(rssi, phy->rssi[0]);
5572 if (mask & IWN_ANT_B)
5573 rssi = MAX(rssi, phy->rssi[2]);
5574 if (mask & IWN_ANT_C)
5575 rssi = MAX(rssi, phy->rssi[4]);
5577 DPRINTF(sc, IWN_DEBUG_RECV,
5578 "%s: agc %d mask 0x%x rssi %d %d %d result %d\n", __func__, agc,
5579 mask, phy->rssi[0], phy->rssi[2], phy->rssi[4],
5580 rssi - agc - IWN_RSSI_TO_DBM);
5581 return rssi - agc - IWN_RSSI_TO_DBM;
5585 iwn5000_get_rssi(struct iwn_softc *sc, struct iwn_rx_stat *stat)
5587 struct iwn5000_rx_phystat *phy = (void *)stat->phybuf;
5591 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5593 agc = (le32toh(phy->agc) >> 9) & 0x7f;
5595 rssi = MAX(le16toh(phy->rssi[0]) & 0xff,
5596 le16toh(phy->rssi[1]) & 0xff);
5597 rssi = MAX(le16toh(phy->rssi[2]) & 0xff, rssi);
5599 DPRINTF(sc, IWN_DEBUG_RECV,
5600 "%s: agc %d rssi %d %d %d result %d\n", __func__, agc,
5601 phy->rssi[0], phy->rssi[1], phy->rssi[2],
5602 rssi - agc - IWN_RSSI_TO_DBM);
5603 return rssi - agc - IWN_RSSI_TO_DBM;
5607 * Retrieve the average noise (in dBm) among receivers.
5610 iwn_get_noise(const struct iwn_rx_general_stats *stats)
5612 int i, total, nbant, noise;
5615 for (i = 0; i < 3; i++) {
5616 if ((noise = le32toh(stats->noise[i]) & 0xff) == 0)
5621 /* There should be at least one antenna but check anyway. */
5622 return (nbant == 0) ? -127 : (total / nbant) - 107;
5626 * Compute temperature (in degC) from last received statistics.
5629 iwn4965_get_temperature(struct iwn_softc *sc)
5631 struct iwn_ucode_info *uc = &sc->ucode_info;
5632 int32_t r1, r2, r3, r4, temp;
5634 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5636 r1 = le32toh(uc->temp[0].chan20MHz);
5637 r2 = le32toh(uc->temp[1].chan20MHz);
5638 r3 = le32toh(uc->temp[2].chan20MHz);
5639 r4 = le32toh(sc->rawtemp);
5641 if (r1 == r3) /* Prevents division by 0 (should not happen). */
5644 /* Sign-extend 23-bit R4 value to 32-bit. */
5645 r4 = ((r4 & 0xffffff) ^ 0x800000) - 0x800000;
5646 /* Compute temperature in Kelvin. */
5647 temp = (259 * (r4 - r2)) / (r3 - r1);
5648 temp = (temp * 97) / 100 + 8;
5650 DPRINTF(sc, IWN_DEBUG_ANY, "temperature %dK/%dC\n", temp,
5652 return IWN_KTOC(temp);
5656 iwn5000_get_temperature(struct iwn_softc *sc)
5660 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5663 * Temperature is not used by the driver for 5000 Series because
5664 * TX power calibration is handled by firmware.
5666 temp = le32toh(sc->rawtemp);
5667 if (sc->hw_type == IWN_HW_REV_TYPE_5150) {
5668 temp = (temp / -5) + sc->temp_off;
5669 temp = IWN_KTOC(temp);
5675 * Initialize sensitivity calibration state machine.
5678 iwn_init_sensitivity(struct iwn_softc *sc)
5680 struct iwn_ops *ops = &sc->ops;
5681 struct iwn_calib_state *calib = &sc->calib;
5685 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5687 /* Reset calibration state machine. */
5688 memset(calib, 0, sizeof (*calib));
5689 calib->state = IWN_CALIB_STATE_INIT;
5690 calib->cck_state = IWN_CCK_STATE_HIFA;
5691 /* Set initial correlation values. */
5692 calib->ofdm_x1 = sc->limits->min_ofdm_x1;
5693 calib->ofdm_mrc_x1 = sc->limits->min_ofdm_mrc_x1;
5694 calib->ofdm_x4 = sc->limits->min_ofdm_x4;
5695 calib->ofdm_mrc_x4 = sc->limits->min_ofdm_mrc_x4;
5696 calib->cck_x4 = 125;
5697 calib->cck_mrc_x4 = sc->limits->min_cck_mrc_x4;
5698 calib->energy_cck = sc->limits->energy_cck;
5700 /* Write initial sensitivity. */
5701 if ((error = iwn_send_sensitivity(sc)) != 0)
5704 /* Write initial gains. */
5705 if ((error = ops->init_gains(sc)) != 0)
5708 /* Request statistics at each beacon interval. */
5710 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: sending request for statistics\n",
5712 return iwn_cmd(sc, IWN_CMD_GET_STATISTICS, &flags, sizeof flags, 1);
5716 * Collect noise and RSSI statistics for the first 20 beacons received
5717 * after association and use them to determine connected antennas and
5718 * to set differential gains.
5721 iwn_collect_noise(struct iwn_softc *sc,
5722 const struct iwn_rx_general_stats *stats)
5724 struct iwn_ops *ops = &sc->ops;
5725 struct iwn_calib_state *calib = &sc->calib;
5726 struct ifnet *ifp = sc->sc_ifp;
5727 struct ieee80211com *ic = ifp->if_l2com;
5731 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
5733 /* Accumulate RSSI and noise for all 3 antennas. */
5734 for (i = 0; i < 3; i++) {
5735 calib->rssi[i] += le32toh(stats->rssi[i]) & 0xff;
5736 calib->noise[i] += le32toh(stats->noise[i]) & 0xff;
5738 /* NB: We update differential gains only once after 20 beacons. */
5739 if (++calib->nbeacons < 20)
5742 /* Determine highest average RSSI. */
5743 val = MAX(calib->rssi[0], calib->rssi[1]);
5744 val = MAX(calib->rssi[2], val);
5746 /* Determine which antennas are connected. */
5747 sc->chainmask = sc->rxchainmask;
5748 for (i = 0; i < 3; i++)
5749 if (val - calib->rssi[i] > 15 * 20)
5750 sc->chainmask &= ~(1 << i);
5751 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_XMIT,
5752 "%s: RX chains mask: theoretical=0x%x, actual=0x%x\n",
5753 __func__, sc->rxchainmask, sc->chainmask);
5755 /* If none of the TX antennas are connected, keep at least one. */
5756 if ((sc->chainmask & sc->txchainmask) == 0)
5757 sc->chainmask |= IWN_LSB(sc->txchainmask);
5759 (void)ops->set_gains(sc);
5760 calib->state = IWN_CALIB_STATE_RUN;
5763 /* XXX Disable RX chains with no antennas connected. */
5764 sc->rxon->rxchain = htole16(IWN_RXCHAIN_SEL(sc->chainmask));
5765 if (sc->sc_is_scanning)
5766 device_printf(sc->sc_dev,
5767 "%s: is_scanning set, before RXON\n",
5769 (void)iwn_cmd(sc, IWN_CMD_RXON, sc->rxon, sc->rxonsz, 1);
5772 /* Enable power-saving mode if requested by user. */
5773 if (ic->ic_flags & IEEE80211_F_PMGTON)
5774 (void)iwn_set_pslevel(sc, 0, 3, 1);
5776 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
5781 iwn4965_init_gains(struct iwn_softc *sc)
5783 struct iwn_phy_calib_gain cmd;
5785 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5787 memset(&cmd, 0, sizeof cmd);
5788 cmd.code = IWN4965_PHY_CALIB_DIFF_GAIN;
5789 /* Differential gains initially set to 0 for all 3 antennas. */
5790 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
5791 "%s: setting initial differential gains\n", __func__);
5792 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 1);
5796 iwn5000_init_gains(struct iwn_softc *sc)
5798 struct iwn_phy_calib cmd;
5800 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5802 memset(&cmd, 0, sizeof cmd);
5803 cmd.code = sc->reset_noise_gain;
5806 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
5807 "%s: setting initial differential gains\n", __func__);
5808 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 1);
5812 iwn4965_set_gains(struct iwn_softc *sc)
5814 struct iwn_calib_state *calib = &sc->calib;
5815 struct iwn_phy_calib_gain cmd;
5816 int i, delta, noise;
5818 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5820 /* Get minimal noise among connected antennas. */
5821 noise = INT_MAX; /* NB: There's at least one antenna. */
5822 for (i = 0; i < 3; i++)
5823 if (sc->chainmask & (1 << i))
5824 noise = MIN(calib->noise[i], noise);
5826 memset(&cmd, 0, sizeof cmd);
5827 cmd.code = IWN4965_PHY_CALIB_DIFF_GAIN;
5828 /* Set differential gains for connected antennas. */
5829 for (i = 0; i < 3; i++) {
5830 if (sc->chainmask & (1 << i)) {
5831 /* Compute attenuation (in unit of 1.5dB). */
5832 delta = (noise - (int32_t)calib->noise[i]) / 30;
5833 /* NB: delta <= 0 */
5834 /* Limit to [-4.5dB,0]. */
5835 cmd.gain[i] = MIN(abs(delta), 3);
5837 cmd.gain[i] |= 1 << 2; /* sign bit */
5840 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
5841 "setting differential gains Ant A/B/C: %x/%x/%x (%x)\n",
5842 cmd.gain[0], cmd.gain[1], cmd.gain[2], sc->chainmask);
5843 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 1);
5847 iwn5000_set_gains(struct iwn_softc *sc)
5849 struct iwn_calib_state *calib = &sc->calib;
5850 struct iwn_phy_calib_gain cmd;
5851 int i, ant, div, delta;
5853 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5855 /* We collected 20 beacons and !=6050 need a 1.5 factor. */
5856 div = (sc->hw_type == IWN_HW_REV_TYPE_6050) ? 20 : 30;
5858 memset(&cmd, 0, sizeof cmd);
5859 cmd.code = sc->noise_gain;
5862 /* Get first available RX antenna as referential. */
5863 ant = IWN_LSB(sc->rxchainmask);
5864 /* Set differential gains for other antennas. */
5865 for (i = ant + 1; i < 3; i++) {
5866 if (sc->chainmask & (1 << i)) {
5867 /* The delta is relative to antenna "ant". */
5868 delta = ((int32_t)calib->noise[ant] -
5869 (int32_t)calib->noise[i]) / div;
5870 /* Limit to [-4.5dB,+4.5dB]. */
5871 cmd.gain[i - 1] = MIN(abs(delta), 3);
5873 cmd.gain[i - 1] |= 1 << 2; /* sign bit */
5876 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_XMIT,
5877 "setting differential gains Ant B/C: %x/%x (%x)\n",
5878 cmd.gain[0], cmd.gain[1], sc->chainmask);
5879 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 1);
5883 * Tune RF RX sensitivity based on the number of false alarms detected
5884 * during the last beacon period.
5887 iwn_tune_sensitivity(struct iwn_softc *sc, const struct iwn_rx_stats *stats)
5889 #define inc(val, inc, max) \
5890 if ((val) < (max)) { \
5891 if ((val) < (max) - (inc)) \
5897 #define dec(val, dec, min) \
5898 if ((val) > (min)) { \
5899 if ((val) > (min) + (dec)) \
5906 const struct iwn_sensitivity_limits *limits = sc->limits;
5907 struct iwn_calib_state *calib = &sc->calib;
5908 uint32_t val, rxena, fa;
5909 uint32_t energy[3], energy_min;
5910 uint8_t noise[3], noise_ref;
5911 int i, needs_update = 0;
5913 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
5915 /* Check that we've been enabled long enough. */
5916 if ((rxena = le32toh(stats->general.load)) == 0){
5917 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end not so long\n", __func__);
5921 /* Compute number of false alarms since last call for OFDM. */
5922 fa = le32toh(stats->ofdm.bad_plcp) - calib->bad_plcp_ofdm;
5923 fa += le32toh(stats->ofdm.fa) - calib->fa_ofdm;
5924 fa *= 200 * IEEE80211_DUR_TU; /* 200TU */
5926 if (fa > 50 * rxena) {
5927 /* High false alarm count, decrease sensitivity. */
5928 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
5929 "%s: OFDM high false alarm count: %u\n", __func__, fa);
5930 inc(calib->ofdm_x1, 1, limits->max_ofdm_x1);
5931 inc(calib->ofdm_mrc_x1, 1, limits->max_ofdm_mrc_x1);
5932 inc(calib->ofdm_x4, 1, limits->max_ofdm_x4);
5933 inc(calib->ofdm_mrc_x4, 1, limits->max_ofdm_mrc_x4);
5935 } else if (fa < 5 * rxena) {
5936 /* Low false alarm count, increase sensitivity. */
5937 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
5938 "%s: OFDM low false alarm count: %u\n", __func__, fa);
5939 dec(calib->ofdm_x1, 1, limits->min_ofdm_x1);
5940 dec(calib->ofdm_mrc_x1, 1, limits->min_ofdm_mrc_x1);
5941 dec(calib->ofdm_x4, 1, limits->min_ofdm_x4);
5942 dec(calib->ofdm_mrc_x4, 1, limits->min_ofdm_mrc_x4);
5945 /* Compute maximum noise among 3 receivers. */
5946 for (i = 0; i < 3; i++)
5947 noise[i] = (le32toh(stats->general.noise[i]) >> 8) & 0xff;
5948 val = MAX(noise[0], noise[1]);
5949 val = MAX(noise[2], val);
5950 /* Insert it into our samples table. */
5951 calib->noise_samples[calib->cur_noise_sample] = val;
5952 calib->cur_noise_sample = (calib->cur_noise_sample + 1) % 20;
5954 /* Compute maximum noise among last 20 samples. */
5955 noise_ref = calib->noise_samples[0];
5956 for (i = 1; i < 20; i++)
5957 noise_ref = MAX(noise_ref, calib->noise_samples[i]);
5959 /* Compute maximum energy among 3 receivers. */
5960 for (i = 0; i < 3; i++)
5961 energy[i] = le32toh(stats->general.energy[i]);
5962 val = MIN(energy[0], energy[1]);
5963 val = MIN(energy[2], val);
5964 /* Insert it into our samples table. */
5965 calib->energy_samples[calib->cur_energy_sample] = val;
5966 calib->cur_energy_sample = (calib->cur_energy_sample + 1) % 10;
5968 /* Compute minimum energy among last 10 samples. */
5969 energy_min = calib->energy_samples[0];
5970 for (i = 1; i < 10; i++)
5971 energy_min = MAX(energy_min, calib->energy_samples[i]);
5974 /* Compute number of false alarms since last call for CCK. */
5975 fa = le32toh(stats->cck.bad_plcp) - calib->bad_plcp_cck;
5976 fa += le32toh(stats->cck.fa) - calib->fa_cck;
5977 fa *= 200 * IEEE80211_DUR_TU; /* 200TU */
5979 if (fa > 50 * rxena) {
5980 /* High false alarm count, decrease sensitivity. */
5981 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
5982 "%s: CCK high false alarm count: %u\n", __func__, fa);
5983 calib->cck_state = IWN_CCK_STATE_HIFA;
5986 if (calib->cck_x4 > 160) {
5987 calib->noise_ref = noise_ref;
5988 if (calib->energy_cck > 2)
5989 dec(calib->energy_cck, 2, energy_min);
5991 if (calib->cck_x4 < 160) {
5992 calib->cck_x4 = 161;
5995 inc(calib->cck_x4, 3, limits->max_cck_x4);
5997 inc(calib->cck_mrc_x4, 3, limits->max_cck_mrc_x4);
5999 } else if (fa < 5 * rxena) {
6000 /* Low false alarm count, increase sensitivity. */
6001 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
6002 "%s: CCK low false alarm count: %u\n", __func__, fa);
6003 calib->cck_state = IWN_CCK_STATE_LOFA;
6006 if (calib->cck_state != IWN_CCK_STATE_INIT &&
6007 (((int32_t)calib->noise_ref - (int32_t)noise_ref) > 2 ||
6008 calib->low_fa > 100)) {
6009 inc(calib->energy_cck, 2, limits->min_energy_cck);
6010 dec(calib->cck_x4, 3, limits->min_cck_x4);
6011 dec(calib->cck_mrc_x4, 3, limits->min_cck_mrc_x4);
6014 /* Not worth to increase or decrease sensitivity. */
6015 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
6016 "%s: CCK normal false alarm count: %u\n", __func__, fa);
6018 calib->noise_ref = noise_ref;
6020 if (calib->cck_state == IWN_CCK_STATE_HIFA) {
6021 /* Previous interval had many false alarms. */
6022 dec(calib->energy_cck, 8, energy_min);
6024 calib->cck_state = IWN_CCK_STATE_INIT;
6028 (void)iwn_send_sensitivity(sc);
6030 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
6037 iwn_send_sensitivity(struct iwn_softc *sc)
6039 struct iwn_calib_state *calib = &sc->calib;
6040 struct iwn_enhanced_sensitivity_cmd cmd;
6043 memset(&cmd, 0, sizeof cmd);
6044 len = sizeof (struct iwn_sensitivity_cmd);
6045 cmd.which = IWN_SENSITIVITY_WORKTBL;
6046 /* OFDM modulation. */
6047 cmd.corr_ofdm_x1 = htole16(calib->ofdm_x1);
6048 cmd.corr_ofdm_mrc_x1 = htole16(calib->ofdm_mrc_x1);
6049 cmd.corr_ofdm_x4 = htole16(calib->ofdm_x4);
6050 cmd.corr_ofdm_mrc_x4 = htole16(calib->ofdm_mrc_x4);
6051 cmd.energy_ofdm = htole16(sc->limits->energy_ofdm);
6052 cmd.energy_ofdm_th = htole16(62);
6053 /* CCK modulation. */
6054 cmd.corr_cck_x4 = htole16(calib->cck_x4);
6055 cmd.corr_cck_mrc_x4 = htole16(calib->cck_mrc_x4);
6056 cmd.energy_cck = htole16(calib->energy_cck);
6057 /* Barker modulation: use default values. */
6058 cmd.corr_barker = htole16(190);
6059 cmd.corr_barker_mrc = htole16(sc->limits->barker_mrc);
6061 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
6062 "%s: set sensitivity %d/%d/%d/%d/%d/%d/%d\n", __func__,
6063 calib->ofdm_x1, calib->ofdm_mrc_x1, calib->ofdm_x4,
6064 calib->ofdm_mrc_x4, calib->cck_x4,
6065 calib->cck_mrc_x4, calib->energy_cck);
6067 if (!(sc->sc_flags & IWN_FLAG_ENH_SENS))
6069 /* Enhanced sensitivity settings. */
6070 len = sizeof (struct iwn_enhanced_sensitivity_cmd);
6071 cmd.ofdm_det_slope_mrc = htole16(668);
6072 cmd.ofdm_det_icept_mrc = htole16(4);
6073 cmd.ofdm_det_slope = htole16(486);
6074 cmd.ofdm_det_icept = htole16(37);
6075 cmd.cck_det_slope_mrc = htole16(853);
6076 cmd.cck_det_icept_mrc = htole16(4);
6077 cmd.cck_det_slope = htole16(476);
6078 cmd.cck_det_icept = htole16(99);
6080 return iwn_cmd(sc, IWN_CMD_SET_SENSITIVITY, &cmd, len, 1);
6084 * Look at the increase of PLCP errors over time; if it exceeds
6085 * a programmed threshold then trigger an RF retune.
6088 iwn_check_rx_recovery(struct iwn_softc *sc, struct iwn_stats *rs)
6090 int32_t delta_ofdm, delta_ht, delta_cck;
6091 struct iwn_calib_state *calib = &sc->calib;
6092 int delta_ticks, cur_ticks;
6097 * Calculate the difference between the current and
6098 * previous statistics.
6100 delta_cck = le32toh(rs->rx.cck.bad_plcp) - calib->bad_plcp_cck;
6101 delta_ofdm = le32toh(rs->rx.ofdm.bad_plcp) - calib->bad_plcp_ofdm;
6102 delta_ht = le32toh(rs->rx.ht.bad_plcp) - calib->bad_plcp_ht;
6105 * Calculate the delta in time between successive statistics
6106 * messages. Yes, it can roll over; so we make sure that
6107 * this doesn't happen.
6109 * XXX go figure out what to do about rollover
6110 * XXX go figure out what to do if ticks rolls over to -ve instead!
6111 * XXX go stab signed integer overflow undefined-ness in the face.
6114 delta_ticks = cur_ticks - sc->last_calib_ticks;
6117 * If any are negative, then the firmware likely reset; so just
6118 * bail. We'll pick this up next time.
6120 if (delta_cck < 0 || delta_ofdm < 0 || delta_ht < 0 || delta_ticks < 0)
6124 * delta_ticks is in ticks; we need to convert it up to milliseconds
6125 * so we can do some useful math with it.
6127 delta_msec = ticks_to_msecs(delta_ticks);
6130 * Calculate what our threshold is given the current delta_msec.
6132 thresh = sc->base_params->plcp_err_threshold * delta_msec;
6134 DPRINTF(sc, IWN_DEBUG_STATE,
6135 "%s: time delta: %d; cck=%d, ofdm=%d, ht=%d, total=%d, thresh=%d\n",
6141 (delta_msec + delta_cck + delta_ofdm + delta_ht),
6145 * If we need a retune, then schedule a single channel scan
6146 * to a channel that isn't the currently active one!
6148 * The math from linux iwlwifi:
6150 * if ((delta * 100 / msecs) > threshold)
6152 if (thresh > 0 && (delta_cck + delta_ofdm + delta_ht) * 100 > thresh) {
6153 DPRINTF(sc, IWN_DEBUG_ANY,
6154 "%s: PLCP error threshold raw (%d) comparison (%d) "
6155 "over limit (%d); retune!\n",
6157 (delta_cck + delta_ofdm + delta_ht),
6158 (delta_cck + delta_ofdm + delta_ht) * 100,
6164 * Set STA mode power saving level (between 0 and 5).
6165 * Level 0 is CAM (Continuously Aware Mode), 5 is for maximum power saving.
6168 iwn_set_pslevel(struct iwn_softc *sc, int dtim, int level, int async)
6170 struct iwn_pmgt_cmd cmd;
6171 const struct iwn_pmgt *pmgt;
6172 uint32_t max, skip_dtim;
6176 DPRINTF(sc, IWN_DEBUG_PWRSAVE,
6177 "%s: dtim=%d, level=%d, async=%d\n",
6183 /* Select which PS parameters to use. */
6185 pmgt = &iwn_pmgt[0][level];
6186 else if (dtim <= 10)
6187 pmgt = &iwn_pmgt[1][level];
6189 pmgt = &iwn_pmgt[2][level];
6191 memset(&cmd, 0, sizeof cmd);
6192 if (level != 0) /* not CAM */
6193 cmd.flags |= htole16(IWN_PS_ALLOW_SLEEP);
6195 cmd.flags |= htole16(IWN_PS_FAST_PD);
6196 /* Retrieve PCIe Active State Power Management (ASPM). */
6197 reg = pci_read_config(sc->sc_dev, sc->sc_cap_off + 0x10, 1);
6198 if (!(reg & 0x1)) /* L0s Entry disabled. */
6199 cmd.flags |= htole16(IWN_PS_PCI_PMGT);
6200 cmd.rxtimeout = htole32(pmgt->rxtimeout * 1024);
6201 cmd.txtimeout = htole32(pmgt->txtimeout * 1024);
6207 skip_dtim = pmgt->skip_dtim;
6208 if (skip_dtim != 0) {
6209 cmd.flags |= htole16(IWN_PS_SLEEP_OVER_DTIM);
6210 max = pmgt->intval[4];
6211 if (max == (uint32_t)-1)
6212 max = dtim * (skip_dtim + 1);
6213 else if (max > dtim)
6214 max = (max / dtim) * dtim;
6217 for (i = 0; i < 5; i++)
6218 cmd.intval[i] = htole32(MIN(max, pmgt->intval[i]));
6220 DPRINTF(sc, IWN_DEBUG_RESET, "setting power saving level to %d\n",
6222 return iwn_cmd(sc, IWN_CMD_SET_POWER_MODE, &cmd, sizeof cmd, async);
6226 iwn_send_btcoex(struct iwn_softc *sc)
6228 struct iwn_bluetooth cmd;
6230 memset(&cmd, 0, sizeof cmd);
6231 cmd.flags = IWN_BT_COEX_CHAN_ANN | IWN_BT_COEX_BT_PRIO;
6232 cmd.lead_time = IWN_BT_LEAD_TIME_DEF;
6233 cmd.max_kill = IWN_BT_MAX_KILL_DEF;
6234 DPRINTF(sc, IWN_DEBUG_RESET, "%s: configuring bluetooth coexistence\n",
6236 return iwn_cmd(sc, IWN_CMD_BT_COEX, &cmd, sizeof(cmd), 0);
6240 iwn_send_advanced_btcoex(struct iwn_softc *sc)
6242 static const uint32_t btcoex_3wire[12] = {
6243 0xaaaaaaaa, 0xaaaaaaaa, 0xaeaaaaaa, 0xaaaaaaaa,
6244 0xcc00ff28, 0x0000aaaa, 0xcc00aaaa, 0x0000aaaa,
6245 0xc0004000, 0x00004000, 0xf0005000, 0xf0005000,
6247 struct iwn6000_btcoex_config btconfig;
6248 struct iwn2000_btcoex_config btconfig2k;
6249 struct iwn_btcoex_priotable btprio;
6250 struct iwn_btcoex_prot btprot;
6254 memset(&btconfig, 0, sizeof btconfig);
6255 memset(&btconfig2k, 0, sizeof btconfig2k);
6257 flags = IWN_BT_FLAG_COEX6000_MODE_3W <<
6258 IWN_BT_FLAG_COEX6000_MODE_SHIFT; // Done as is in linux kernel 3.2
6260 if (sc->base_params->bt_sco_disable)
6261 flags &= ~IWN_BT_FLAG_SYNC_2_BT_DISABLE;
6263 flags |= IWN_BT_FLAG_SYNC_2_BT_DISABLE;
6265 flags |= IWN_BT_FLAG_COEX6000_CHAN_INHIBITION;
6267 /* Default flags result is 145 as old value */
6270 * Flags value has to be review. Values must change if we
6271 * which to disable it
6273 if (sc->base_params->bt_session_2) {
6274 btconfig2k.flags = flags;
6275 btconfig2k.max_kill = 5;
6276 btconfig2k.bt3_t7_timer = 1;
6277 btconfig2k.kill_ack = htole32(0xffff0000);
6278 btconfig2k.kill_cts = htole32(0xffff0000);
6279 btconfig2k.sample_time = 2;
6280 btconfig2k.bt3_t2_timer = 0xc;
6282 for (i = 0; i < 12; i++)
6283 btconfig2k.lookup_table[i] = htole32(btcoex_3wire[i]);
6284 btconfig2k.valid = htole16(0xff);
6285 btconfig2k.prio_boost = htole32(0xf0);
6286 DPRINTF(sc, IWN_DEBUG_RESET,
6287 "%s: configuring advanced bluetooth coexistence"
6288 " session 2, flags : 0x%x\n",
6291 error = iwn_cmd(sc, IWN_CMD_BT_COEX, &btconfig2k,
6292 sizeof(btconfig2k), 1);
6294 btconfig.flags = flags;
6295 btconfig.max_kill = 5;
6296 btconfig.bt3_t7_timer = 1;
6297 btconfig.kill_ack = htole32(0xffff0000);
6298 btconfig.kill_cts = htole32(0xffff0000);
6299 btconfig.sample_time = 2;
6300 btconfig.bt3_t2_timer = 0xc;
6302 for (i = 0; i < 12; i++)
6303 btconfig.lookup_table[i] = htole32(btcoex_3wire[i]);
6304 btconfig.valid = htole16(0xff);
6305 btconfig.prio_boost = 0xf0;
6306 DPRINTF(sc, IWN_DEBUG_RESET,
6307 "%s: configuring advanced bluetooth coexistence,"
6311 error = iwn_cmd(sc, IWN_CMD_BT_COEX, &btconfig,
6312 sizeof(btconfig), 1);
6318 memset(&btprio, 0, sizeof btprio);
6319 btprio.calib_init1 = 0x6;
6320 btprio.calib_init2 = 0x7;
6321 btprio.calib_periodic_low1 = 0x2;
6322 btprio.calib_periodic_low2 = 0x3;
6323 btprio.calib_periodic_high1 = 0x4;
6324 btprio.calib_periodic_high2 = 0x5;
6326 btprio.scan52 = 0x8;
6327 btprio.scan24 = 0xa;
6328 error = iwn_cmd(sc, IWN_CMD_BT_COEX_PRIOTABLE, &btprio, sizeof(btprio),
6333 /* Force BT state machine change. */
6334 memset(&btprot, 0, sizeof btprot);
6337 error = iwn_cmd(sc, IWN_CMD_BT_COEX_PROT, &btprot, sizeof(btprot), 1);
6341 return iwn_cmd(sc, IWN_CMD_BT_COEX_PROT, &btprot, sizeof(btprot), 1);
6345 iwn5000_runtime_calib(struct iwn_softc *sc)
6347 struct iwn5000_calib_config cmd;
6349 memset(&cmd, 0, sizeof cmd);
6350 cmd.ucode.once.enable = 0xffffffff;
6351 cmd.ucode.once.start = IWN5000_CALIB_DC;
6352 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
6353 "%s: configuring runtime calibration\n", __func__);
6354 return iwn_cmd(sc, IWN5000_CMD_CALIB_CONFIG, &cmd, sizeof(cmd), 0);
6358 iwn_config(struct iwn_softc *sc)
6360 struct iwn_ops *ops = &sc->ops;
6361 struct ifnet *ifp = sc->sc_ifp;
6362 struct ieee80211com *ic = ifp->if_l2com;
6367 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
6369 if ((sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSET)
6370 && (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSETv2)) {
6371 device_printf(sc->sc_dev,"%s: temp_offset and temp_offsetv2 are"
6372 " exclusive each together. Review NIC config file. Conf"
6373 " : 0x%08x Flags : 0x%08x \n", __func__,
6374 sc->base_params->calib_need,
6375 (IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSET |
6376 IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSETv2));
6380 /* Compute temperature calib if needed. Will be send by send calib */
6381 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSET) {
6382 error = iwn5000_temp_offset_calib(sc);
6384 device_printf(sc->sc_dev,
6385 "%s: could not set temperature offset\n", __func__);
6388 } else if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSETv2) {
6389 error = iwn5000_temp_offset_calibv2(sc);
6391 device_printf(sc->sc_dev,
6392 "%s: could not compute temperature offset v2\n",
6398 if (sc->hw_type == IWN_HW_REV_TYPE_6050) {
6399 /* Configure runtime DC calibration. */
6400 error = iwn5000_runtime_calib(sc);
6402 device_printf(sc->sc_dev,
6403 "%s: could not configure runtime calibration\n",
6409 /* Configure valid TX chains for >=5000 Series. */
6410 if (sc->hw_type != IWN_HW_REV_TYPE_4965 &&
6411 IWN_UCODE_API(sc->ucode_rev) > 1) {
6412 txmask = htole32(sc->txchainmask);
6413 DPRINTF(sc, IWN_DEBUG_RESET | IWN_DEBUG_XMIT,
6414 "%s: configuring valid TX chains 0x%x\n", __func__, txmask);
6415 error = iwn_cmd(sc, IWN5000_CMD_TX_ANT_CONFIG, &txmask,
6418 device_printf(sc->sc_dev,
6419 "%s: could not configure valid TX chains, "
6420 "error %d\n", __func__, error);
6425 /* Configure bluetooth coexistence. */
6428 /* Configure bluetooth coexistence if needed. */
6429 if (sc->base_params->bt_mode == IWN_BT_ADVANCED)
6430 error = iwn_send_advanced_btcoex(sc);
6431 if (sc->base_params->bt_mode == IWN_BT_SIMPLE)
6432 error = iwn_send_btcoex(sc);
6435 device_printf(sc->sc_dev,
6436 "%s: could not configure bluetooth coexistence, error %d\n",
6441 /* Set mode, channel, RX filter and enable RX. */
6442 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX];
6443 memset(sc->rxon, 0, sizeof (struct iwn_rxon));
6444 IEEE80211_ADDR_COPY(sc->rxon->myaddr, IF_LLADDR(ifp));
6445 IEEE80211_ADDR_COPY(sc->rxon->wlap, IF_LLADDR(ifp));
6446 sc->rxon->chan = ieee80211_chan2ieee(ic, ic->ic_curchan);
6447 sc->rxon->flags = htole32(IWN_RXON_TSF | IWN_RXON_CTS_TO_SELF);
6448 if (IEEE80211_IS_CHAN_2GHZ(ic->ic_curchan))
6449 sc->rxon->flags |= htole32(IWN_RXON_AUTO | IWN_RXON_24GHZ);
6450 switch (ic->ic_opmode) {
6451 case IEEE80211_M_STA:
6452 sc->rxon->mode = IWN_MODE_STA;
6453 sc->rxon->filter = htole32(IWN_FILTER_MULTICAST);
6455 case IEEE80211_M_MONITOR:
6456 sc->rxon->mode = IWN_MODE_MONITOR;
6457 sc->rxon->filter = htole32(IWN_FILTER_MULTICAST |
6458 IWN_FILTER_CTL | IWN_FILTER_PROMISC);
6461 /* Should not get there. */
6464 sc->rxon->cck_mask = 0x0f; /* not yet negotiated */
6465 sc->rxon->ofdm_mask = 0xff; /* not yet negotiated */
6466 sc->rxon->ht_single_mask = 0xff;
6467 sc->rxon->ht_dual_mask = 0xff;
6468 sc->rxon->ht_triple_mask = 0xff;
6470 * In active association mode, ensure that
6471 * all the receive chains are enabled.
6473 * Since we're not yet doing SMPS, don't allow the
6474 * number of idle RX chains to be less than the active
6478 IWN_RXCHAIN_VALID(sc->rxchainmask) |
6479 IWN_RXCHAIN_MIMO_COUNT(sc->nrxchains) |
6480 IWN_RXCHAIN_IDLE_COUNT(sc->nrxchains);
6481 sc->rxon->rxchain = htole16(rxchain);
6482 DPRINTF(sc, IWN_DEBUG_RESET | IWN_DEBUG_XMIT,
6483 "%s: rxchainmask=0x%x, nrxchains=%d\n",
6487 DPRINTF(sc, IWN_DEBUG_RESET, "%s: setting configuration\n", __func__);
6488 if (sc->sc_is_scanning)
6489 device_printf(sc->sc_dev,
6490 "%s: is_scanning set, before RXON\n",
6492 error = iwn_cmd(sc, IWN_CMD_RXON, sc->rxon, sc->rxonsz, 0);
6494 device_printf(sc->sc_dev, "%s: RXON command failed\n",
6499 if ((error = iwn_add_broadcast_node(sc, 0)) != 0) {
6500 device_printf(sc->sc_dev, "%s: could not add broadcast node\n",
6505 /* Configuration has changed, set TX power accordingly. */
6506 if ((error = ops->set_txpower(sc, ic->ic_curchan, 0)) != 0) {
6507 device_printf(sc->sc_dev, "%s: could not set TX power\n",
6512 if ((error = iwn_set_critical_temp(sc)) != 0) {
6513 device_printf(sc->sc_dev,
6514 "%s: could not set critical temperature\n", __func__);
6518 /* Set power saving level to CAM during initialization. */
6519 if ((error = iwn_set_pslevel(sc, 0, 0, 0)) != 0) {
6520 device_printf(sc->sc_dev,
6521 "%s: could not set power saving level\n", __func__);
6525 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
6531 * Add an ssid element to a frame.
6534 ieee80211_add_ssid(uint8_t *frm, const uint8_t *ssid, u_int len)
6536 *frm++ = IEEE80211_ELEMID_SSID;
6538 memcpy(frm, ssid, len);
6543 iwn_get_active_dwell_time(struct iwn_softc *sc,
6544 struct ieee80211_channel *c, uint8_t n_probes)
6546 /* No channel? Default to 2GHz settings */
6547 if (c == NULL || IEEE80211_IS_CHAN_2GHZ(c)) {
6548 return (IWN_ACTIVE_DWELL_TIME_2GHZ +
6549 IWN_ACTIVE_DWELL_FACTOR_2GHZ * (n_probes + 1));
6552 /* 5GHz dwell time */
6553 return (IWN_ACTIVE_DWELL_TIME_5GHZ +
6554 IWN_ACTIVE_DWELL_FACTOR_5GHZ * (n_probes + 1));
6558 * Limit the total dwell time to 85% of the beacon interval.
6560 * Returns the dwell time in milliseconds.
6563 iwn_limit_dwell(struct iwn_softc *sc, uint16_t dwell_time)
6565 struct ieee80211com *ic = sc->sc_ifp->if_l2com;
6566 struct ieee80211vap *vap = NULL;
6569 /* bintval is in TU (1.024mS) */
6570 if (! TAILQ_EMPTY(&ic->ic_vaps)) {
6571 vap = TAILQ_FIRST(&ic->ic_vaps);
6572 bintval = vap->iv_bss->ni_intval;
6576 * If it's non-zero, we should calculate the minimum of
6577 * it and the DWELL_BASE.
6579 * XXX Yes, the math should take into account that bintval
6580 * is 1.024mS, not 1mS..
6583 DPRINTF(sc, IWN_DEBUG_SCAN,
6587 return (MIN(IWN_PASSIVE_DWELL_BASE, ((bintval * 85) / 100)));
6590 /* No association context? Default */
6591 return (IWN_PASSIVE_DWELL_BASE);
6595 iwn_get_passive_dwell_time(struct iwn_softc *sc, struct ieee80211_channel *c)
6599 if (c == NULL || IEEE80211_IS_CHAN_2GHZ(c)) {
6600 passive = IWN_PASSIVE_DWELL_BASE + IWN_PASSIVE_DWELL_TIME_2GHZ;
6602 passive = IWN_PASSIVE_DWELL_BASE + IWN_PASSIVE_DWELL_TIME_5GHZ;
6605 /* Clamp to the beacon interval if we're associated */
6606 return (iwn_limit_dwell(sc, passive));
6610 iwn_scan(struct iwn_softc *sc, struct ieee80211vap *vap,
6611 struct ieee80211_scan_state *ss, struct ieee80211_channel *c)
6613 struct ifnet *ifp = sc->sc_ifp;
6614 struct ieee80211com *ic = ifp->if_l2com;
6615 struct ieee80211_node *ni = vap->iv_bss;
6616 struct iwn_scan_hdr *hdr;
6617 struct iwn_cmd_data *tx;
6618 struct iwn_scan_essid *essid;
6619 struct iwn_scan_chan *chan;
6620 struct ieee80211_frame *wh;
6621 struct ieee80211_rateset *rs;
6627 uint16_t dwell_active, dwell_passive;
6628 uint32_t extra, scan_service_time;
6630 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
6633 * We are absolutely not allowed to send a scan command when another
6634 * scan command is pending.
6636 if (sc->sc_is_scanning) {
6637 device_printf(sc->sc_dev, "%s: called whilst scanning!\n",
6642 /* Assign the scan channel */
6645 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX];
6646 buf = malloc(IWN_SCAN_MAXSZ, M_DEVBUF, M_NOWAIT | M_ZERO);
6648 device_printf(sc->sc_dev,
6649 "%s: could not allocate buffer for scan command\n",
6653 hdr = (struct iwn_scan_hdr *)buf;
6655 * Move to the next channel if no frames are received within 10ms
6656 * after sending the probe request.
6658 hdr->quiet_time = htole16(10); /* timeout in milliseconds */
6659 hdr->quiet_threshold = htole16(1); /* min # of packets */
6661 * Max needs to be greater than active and passive and quiet!
6662 * It's also in microseconds!
6664 hdr->max_svc = htole32(250 * 1024);
6667 * Reset scan: interval=100
6668 * Normal scan: interval=becaon interval
6669 * suspend_time: 100 (TU)
6672 extra = (100 /* suspend_time */ / 100 /* beacon interval */) << 22;
6673 //scan_service_time = extra | ((100 /* susp */ % 100 /* int */) * 1024);
6674 scan_service_time = (4 << 22) | (100 * 1024); /* Hardcode for now! */
6675 hdr->pause_svc = htole32(scan_service_time);
6677 /* Select antennas for scanning. */
6679 IWN_RXCHAIN_VALID(sc->rxchainmask) |
6680 IWN_RXCHAIN_FORCE_MIMO_SEL(sc->rxchainmask) |
6681 IWN_RXCHAIN_DRIVER_FORCE;
6682 if (IEEE80211_IS_CHAN_A(c) &&
6683 sc->hw_type == IWN_HW_REV_TYPE_4965) {
6684 /* Ant A must be avoided in 5GHz because of an HW bug. */
6685 rxchain |= IWN_RXCHAIN_FORCE_SEL(IWN_ANT_B);
6686 } else /* Use all available RX antennas. */
6687 rxchain |= IWN_RXCHAIN_FORCE_SEL(sc->rxchainmask);
6688 hdr->rxchain = htole16(rxchain);
6689 hdr->filter = htole32(IWN_FILTER_MULTICAST | IWN_FILTER_BEACON);
6691 tx = (struct iwn_cmd_data *)(hdr + 1);
6692 tx->flags = htole32(IWN_TX_AUTO_SEQ);
6693 tx->id = sc->broadcast_id;
6694 tx->lifetime = htole32(IWN_LIFETIME_INFINITE);
6696 if (IEEE80211_IS_CHAN_5GHZ(c)) {
6697 /* Send probe requests at 6Mbps. */
6698 tx->rate = htole32(0xd);
6699 rs = &ic->ic_sup_rates[IEEE80211_MODE_11A];
6701 hdr->flags = htole32(IWN_RXON_24GHZ | IWN_RXON_AUTO);
6702 if (sc->hw_type == IWN_HW_REV_TYPE_4965 &&
6703 sc->rxon->associd && sc->rxon->chan > 14)
6704 tx->rate = htole32(0xd);
6706 /* Send probe requests at 1Mbps. */
6707 tx->rate = htole32(10 | IWN_RFLAG_CCK);
6709 rs = &ic->ic_sup_rates[IEEE80211_MODE_11G];
6711 /* Use the first valid TX antenna. */
6712 txant = IWN_LSB(sc->txchainmask);
6713 tx->rate |= htole32(IWN_RFLAG_ANT(txant));
6716 * Only do active scanning if we're announcing a probe request
6717 * for a given SSID (or more, if we ever add it to the driver.)
6722 * If we're scanning for a specific SSID, add it to the command.
6724 * XXX maybe look at adding support for scanning multiple SSIDs?
6726 essid = (struct iwn_scan_essid *)(tx + 1);
6728 if (ss->ss_ssid[0].len != 0) {
6729 essid[0].id = IEEE80211_ELEMID_SSID;
6730 essid[0].len = ss->ss_ssid[0].len;
6731 memcpy(essid[0].data, ss->ss_ssid[0].ssid, ss->ss_ssid[0].len);
6734 DPRINTF(sc, IWN_DEBUG_SCAN, "%s: ssid_len=%d, ssid=%*s\n",
6738 ss->ss_ssid[0].ssid);
6740 if (ss->ss_nssid > 0)
6745 * Build a probe request frame. Most of the following code is a
6746 * copy & paste of what is done in net80211.
6748 wh = (struct ieee80211_frame *)(essid + 20);
6749 wh->i_fc[0] = IEEE80211_FC0_VERSION_0 | IEEE80211_FC0_TYPE_MGT |
6750 IEEE80211_FC0_SUBTYPE_PROBE_REQ;
6751 wh->i_fc[1] = IEEE80211_FC1_DIR_NODS;
6752 IEEE80211_ADDR_COPY(wh->i_addr1, ifp->if_broadcastaddr);
6753 IEEE80211_ADDR_COPY(wh->i_addr2, IF_LLADDR(ifp));
6754 IEEE80211_ADDR_COPY(wh->i_addr3, ifp->if_broadcastaddr);
6755 *(uint16_t *)&wh->i_dur[0] = 0; /* filled by HW */
6756 *(uint16_t *)&wh->i_seq[0] = 0; /* filled by HW */
6758 frm = (uint8_t *)(wh + 1);
6759 frm = ieee80211_add_ssid(frm, NULL, 0);
6760 frm = ieee80211_add_rates(frm, rs);
6761 if (rs->rs_nrates > IEEE80211_RATE_SIZE)
6762 frm = ieee80211_add_xrates(frm, rs);
6763 if (ic->ic_htcaps & IEEE80211_HTC_HT)
6764 frm = ieee80211_add_htcap(frm, ni);
6766 /* Set length of probe request. */
6767 tx->len = htole16(frm - (uint8_t *)wh);
6770 * If active scanning is requested but a certain channel is
6771 * marked passive, we can do active scanning if we detect
6774 * There is an issue with some firmware versions that triggers
6775 * a sysassert on a "good CRC threshold" of zero (== disabled),
6776 * on a radar channel even though this means that we should NOT
6779 * The "good CRC threshold" is the number of frames that we
6780 * need to receive during our dwell time on a channel before
6781 * sending out probes -- setting this to a huge value will
6782 * mean we never reach it, but at the same time work around
6783 * the aforementioned issue. Thus use IWL_GOOD_CRC_TH_NEVER
6784 * here instead of IWL_GOOD_CRC_TH_DISABLED.
6786 * This was fixed in later versions along with some other
6787 * scan changes, and the threshold behaves as a flag in those
6792 * If we're doing active scanning, set the crc_threshold
6793 * to a suitable value. This is different to active veruss
6794 * passive scanning depending upon the channel flags; the
6795 * firmware will obey that particular check for us.
6797 if (sc->tlv_feature_flags & IWN_UCODE_TLV_FLAGS_NEWSCAN)
6798 hdr->crc_threshold = is_active ?
6799 IWN_GOOD_CRC_TH_DEFAULT : IWN_GOOD_CRC_TH_DISABLED;
6801 hdr->crc_threshold = is_active ?
6802 IWN_GOOD_CRC_TH_DEFAULT : IWN_GOOD_CRC_TH_NEVER;
6804 chan = (struct iwn_scan_chan *)frm;
6805 chan->chan = htole16(ieee80211_chan2ieee(ic, c));
6807 if (ss->ss_nssid > 0)
6808 chan->flags |= htole32(IWN_CHAN_NPBREQS(1));
6809 chan->dsp_gain = 0x6e;
6812 * Set the passive/active flag depending upon the channel mode.
6813 * XXX TODO: take the is_active flag into account as well?
6815 if (c->ic_flags & IEEE80211_CHAN_PASSIVE)
6816 chan->flags |= htole32(IWN_CHAN_PASSIVE);
6818 chan->flags |= htole32(IWN_CHAN_ACTIVE);
6821 * Calculate the active/passive dwell times.
6824 dwell_active = iwn_get_active_dwell_time(sc, c, ss->ss_nssid);
6825 dwell_passive = iwn_get_passive_dwell_time(sc, c);
6827 /* Make sure they're valid */
6828 if (dwell_passive <= dwell_active)
6829 dwell_passive = dwell_active + 1;
6831 chan->active = htole16(dwell_active);
6832 chan->passive = htole16(dwell_passive);
6834 if (IEEE80211_IS_CHAN_5GHZ(c) &&
6835 !(c->ic_flags & IEEE80211_CHAN_PASSIVE)) {
6836 chan->rf_gain = 0x3b;
6837 } else if (IEEE80211_IS_CHAN_5GHZ(c)) {
6838 chan->rf_gain = 0x3b;
6839 } else if (!(c->ic_flags & IEEE80211_CHAN_PASSIVE)) {
6840 chan->rf_gain = 0x28;
6842 chan->rf_gain = 0x28;
6845 DPRINTF(sc, IWN_DEBUG_STATE,
6846 "%s: chan %u flags 0x%x rf_gain 0x%x "
6847 "dsp_gain 0x%x active %d passive %d scan_svc_time %d crc 0x%x "
6848 "isactive=%d numssid=%d\n", __func__,
6849 chan->chan, chan->flags, chan->rf_gain, chan->dsp_gain,
6850 dwell_active, dwell_passive, scan_service_time,
6851 hdr->crc_threshold, is_active, ss->ss_nssid);
6855 buflen = (uint8_t *)chan - buf;
6856 hdr->len = htole16(buflen);
6858 if (sc->sc_is_scanning) {
6859 device_printf(sc->sc_dev,
6860 "%s: called with is_scanning set!\n",
6863 sc->sc_is_scanning = 1;
6865 DPRINTF(sc, IWN_DEBUG_STATE, "sending scan command nchan=%d\n",
6867 error = iwn_cmd(sc, IWN_CMD_SCAN, buf, buflen, 1);
6868 free(buf, M_DEVBUF);
6870 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
6876 iwn_auth(struct iwn_softc *sc, struct ieee80211vap *vap)
6878 struct iwn_ops *ops = &sc->ops;
6879 struct ifnet *ifp = sc->sc_ifp;
6880 struct ieee80211com *ic = ifp->if_l2com;
6881 struct ieee80211_node *ni = vap->iv_bss;
6884 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
6886 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX];
6887 /* Update adapter configuration. */
6888 IEEE80211_ADDR_COPY(sc->rxon->bssid, ni->ni_bssid);
6889 sc->rxon->chan = ieee80211_chan2ieee(ic, ni->ni_chan);
6890 sc->rxon->flags = htole32(IWN_RXON_TSF | IWN_RXON_CTS_TO_SELF);
6891 if (IEEE80211_IS_CHAN_2GHZ(ni->ni_chan))
6892 sc->rxon->flags |= htole32(IWN_RXON_AUTO | IWN_RXON_24GHZ);
6893 if (ic->ic_flags & IEEE80211_F_SHSLOT)
6894 sc->rxon->flags |= htole32(IWN_RXON_SHSLOT);
6895 if (ic->ic_flags & IEEE80211_F_SHPREAMBLE)
6896 sc->rxon->flags |= htole32(IWN_RXON_SHPREAMBLE);
6897 if (IEEE80211_IS_CHAN_A(ni->ni_chan)) {
6898 sc->rxon->cck_mask = 0;
6899 sc->rxon->ofdm_mask = 0x15;
6900 } else if (IEEE80211_IS_CHAN_B(ni->ni_chan)) {
6901 sc->rxon->cck_mask = 0x03;
6902 sc->rxon->ofdm_mask = 0;
6904 /* Assume 802.11b/g. */
6905 sc->rxon->cck_mask = 0x03;
6906 sc->rxon->ofdm_mask = 0x15;
6908 DPRINTF(sc, IWN_DEBUG_STATE, "rxon chan %d flags %x cck %x ofdm %x\n",
6909 sc->rxon->chan, sc->rxon->flags, sc->rxon->cck_mask,
6910 sc->rxon->ofdm_mask);
6911 if (sc->sc_is_scanning)
6912 device_printf(sc->sc_dev,
6913 "%s: is_scanning set, before RXON\n",
6915 error = iwn_cmd(sc, IWN_CMD_RXON, sc->rxon, sc->rxonsz, 1);
6917 device_printf(sc->sc_dev, "%s: RXON command failed, error %d\n",
6922 /* Configuration has changed, set TX power accordingly. */
6923 if ((error = ops->set_txpower(sc, ni->ni_chan, 1)) != 0) {
6924 device_printf(sc->sc_dev,
6925 "%s: could not set TX power, error %d\n", __func__, error);
6929 * Reconfiguring RXON clears the firmware nodes table so we must
6930 * add the broadcast node again.
6932 if ((error = iwn_add_broadcast_node(sc, 1)) != 0) {
6933 device_printf(sc->sc_dev,
6934 "%s: could not add broadcast node, error %d\n", __func__,
6939 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
6945 iwn_run(struct iwn_softc *sc, struct ieee80211vap *vap)
6947 struct iwn_ops *ops = &sc->ops;
6948 struct ifnet *ifp = sc->sc_ifp;
6949 struct ieee80211com *ic = ifp->if_l2com;
6950 struct ieee80211_node *ni = vap->iv_bss;
6951 struct iwn_node_info node;
6952 uint32_t htflags = 0;
6955 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
6957 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX];
6958 if (ic->ic_opmode == IEEE80211_M_MONITOR) {
6959 /* Link LED blinks while monitoring. */
6960 iwn_set_led(sc, IWN_LED_LINK, 5, 5);
6963 if ((error = iwn_set_timing(sc, ni)) != 0) {
6964 device_printf(sc->sc_dev,
6965 "%s: could not set timing, error %d\n", __func__, error);
6969 /* Update adapter configuration. */
6970 IEEE80211_ADDR_COPY(sc->rxon->bssid, ni->ni_bssid);
6971 sc->rxon->associd = htole16(IEEE80211_AID(ni->ni_associd));
6972 sc->rxon->chan = ieee80211_chan2ieee(ic, ni->ni_chan);
6973 sc->rxon->flags = htole32(IWN_RXON_TSF | IWN_RXON_CTS_TO_SELF);
6974 if (IEEE80211_IS_CHAN_2GHZ(ni->ni_chan))
6975 sc->rxon->flags |= htole32(IWN_RXON_AUTO | IWN_RXON_24GHZ);
6976 if (ic->ic_flags & IEEE80211_F_SHSLOT)
6977 sc->rxon->flags |= htole32(IWN_RXON_SHSLOT);
6978 if (ic->ic_flags & IEEE80211_F_SHPREAMBLE)
6979 sc->rxon->flags |= htole32(IWN_RXON_SHPREAMBLE);
6980 if (IEEE80211_IS_CHAN_A(ni->ni_chan)) {
6981 sc->rxon->cck_mask = 0;
6982 sc->rxon->ofdm_mask = 0x15;
6983 } else if (IEEE80211_IS_CHAN_B(ni->ni_chan)) {
6984 sc->rxon->cck_mask = 0x03;
6985 sc->rxon->ofdm_mask = 0;
6987 /* Assume 802.11b/g. */
6988 sc->rxon->cck_mask = 0x0f;
6989 sc->rxon->ofdm_mask = 0x15;
6991 if (IEEE80211_IS_CHAN_HT(ni->ni_chan)) {
6992 htflags |= IWN_RXON_HT_PROTMODE(ic->ic_curhtprotmode);
6993 if (IEEE80211_IS_CHAN_HT40(ni->ni_chan)) {
6994 switch (ic->ic_curhtprotmode) {
6995 case IEEE80211_HTINFO_OPMODE_HT20PR:
6996 htflags |= IWN_RXON_HT_MODEPURE40;
6999 htflags |= IWN_RXON_HT_MODEMIXED;
7003 if (IEEE80211_IS_CHAN_HT40D(ni->ni_chan))
7004 htflags |= IWN_RXON_HT_HT40MINUS;
7006 sc->rxon->flags |= htole32(htflags);
7007 sc->rxon->filter |= htole32(IWN_FILTER_BSS);
7008 DPRINTF(sc, IWN_DEBUG_STATE, "rxon chan %d flags %x\n",
7009 sc->rxon->chan, sc->rxon->flags);
7010 if (sc->sc_is_scanning)
7011 device_printf(sc->sc_dev,
7012 "%s: is_scanning set, before RXON\n",
7014 error = iwn_cmd(sc, IWN_CMD_RXON, sc->rxon, sc->rxonsz, 1);
7016 device_printf(sc->sc_dev,
7017 "%s: could not update configuration, error %d\n", __func__,
7022 /* Configuration has changed, set TX power accordingly. */
7023 if ((error = ops->set_txpower(sc, ni->ni_chan, 1)) != 0) {
7024 device_printf(sc->sc_dev,
7025 "%s: could not set TX power, error %d\n", __func__, error);
7029 /* Fake a join to initialize the TX rate. */
7030 ((struct iwn_node *)ni)->id = IWN_ID_BSS;
7031 iwn_newassoc(ni, 1);
7034 memset(&node, 0, sizeof node);
7035 IEEE80211_ADDR_COPY(node.macaddr, ni->ni_macaddr);
7036 node.id = IWN_ID_BSS;
7037 if (IEEE80211_IS_CHAN_HT(ni->ni_chan)) {
7038 switch (ni->ni_htcap & IEEE80211_HTCAP_SMPS) {
7039 case IEEE80211_HTCAP_SMPS_ENA:
7040 node.htflags |= htole32(IWN_SMPS_MIMO_DIS);
7042 case IEEE80211_HTCAP_SMPS_DYNAMIC:
7043 node.htflags |= htole32(IWN_SMPS_MIMO_PROT);
7046 node.htflags |= htole32(IWN_AMDPU_SIZE_FACTOR(3) |
7047 IWN_AMDPU_DENSITY(5)); /* 4us */
7048 if (IEEE80211_IS_CHAN_HT40(ni->ni_chan))
7049 node.htflags |= htole32(IWN_NODE_HT40);
7051 DPRINTF(sc, IWN_DEBUG_STATE, "%s: adding BSS node\n", __func__);
7052 error = ops->add_node(sc, &node, 1);
7054 device_printf(sc->sc_dev,
7055 "%s: could not add BSS node, error %d\n", __func__, error);
7058 DPRINTF(sc, IWN_DEBUG_STATE, "%s: setting link quality for node %d\n",
7060 if ((error = iwn_set_link_quality(sc, ni)) != 0) {
7061 device_printf(sc->sc_dev,
7062 "%s: could not setup link quality for node %d, error %d\n",
7063 __func__, node.id, error);
7067 if ((error = iwn_init_sensitivity(sc)) != 0) {
7068 device_printf(sc->sc_dev,
7069 "%s: could not set sensitivity, error %d\n", __func__,
7073 /* Start periodic calibration timer. */
7074 sc->calib.state = IWN_CALIB_STATE_ASSOC;
7076 callout_reset(&sc->calib_to, msecs_to_ticks(500), iwn_calib_timeout,
7079 /* Link LED always on while associated. */
7080 iwn_set_led(sc, IWN_LED_LINK, 0, 1);
7082 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
7088 * This function is called by upper layer when an ADDBA request is received
7089 * from another STA and before the ADDBA response is sent.
7092 iwn_ampdu_rx_start(struct ieee80211_node *ni, struct ieee80211_rx_ampdu *rap,
7093 int baparamset, int batimeout, int baseqctl)
7095 #define MS(_v, _f) (((_v) & _f) >> _f##_S)
7096 struct iwn_softc *sc = ni->ni_ic->ic_ifp->if_softc;
7097 struct iwn_ops *ops = &sc->ops;
7098 struct iwn_node *wn = (void *)ni;
7099 struct iwn_node_info node;
7104 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7106 tid = MS(le16toh(baparamset), IEEE80211_BAPS_TID);
7107 ssn = MS(le16toh(baseqctl), IEEE80211_BASEQ_START);
7109 memset(&node, 0, sizeof node);
7111 node.control = IWN_NODE_UPDATE;
7112 node.flags = IWN_FLAG_SET_ADDBA;
7113 node.addba_tid = tid;
7114 node.addba_ssn = htole16(ssn);
7115 DPRINTF(sc, IWN_DEBUG_RECV, "ADDBA RA=%d TID=%d SSN=%d\n",
7117 error = ops->add_node(sc, &node, 1);
7120 return sc->sc_ampdu_rx_start(ni, rap, baparamset, batimeout, baseqctl);
7125 * This function is called by upper layer on teardown of an HT-immediate
7126 * Block Ack agreement (eg. uppon receipt of a DELBA frame).
7129 iwn_ampdu_rx_stop(struct ieee80211_node *ni, struct ieee80211_rx_ampdu *rap)
7131 struct ieee80211com *ic = ni->ni_ic;
7132 struct iwn_softc *sc = ic->ic_ifp->if_softc;
7133 struct iwn_ops *ops = &sc->ops;
7134 struct iwn_node *wn = (void *)ni;
7135 struct iwn_node_info node;
7138 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7140 /* XXX: tid as an argument */
7141 for (tid = 0; tid < WME_NUM_TID; tid++) {
7142 if (&ni->ni_rx_ampdu[tid] == rap)
7146 memset(&node, 0, sizeof node);
7148 node.control = IWN_NODE_UPDATE;
7149 node.flags = IWN_FLAG_SET_DELBA;
7150 node.delba_tid = tid;
7151 DPRINTF(sc, IWN_DEBUG_RECV, "DELBA RA=%d TID=%d\n", wn->id, tid);
7152 (void)ops->add_node(sc, &node, 1);
7153 sc->sc_ampdu_rx_stop(ni, rap);
7157 iwn_addba_request(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap,
7158 int dialogtoken, int baparamset, int batimeout)
7160 struct iwn_softc *sc = ni->ni_ic->ic_ifp->if_softc;
7163 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7165 for (qid = sc->firstaggqueue; qid < sc->ntxqs; qid++) {
7166 if (sc->qid2tap[qid] == NULL)
7169 if (qid == sc->ntxqs) {
7170 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: not free aggregation queue\n",
7174 tap->txa_private = malloc(sizeof(int), M_DEVBUF, M_NOWAIT);
7175 if (tap->txa_private == NULL) {
7176 device_printf(sc->sc_dev,
7177 "%s: failed to alloc TX aggregation structure\n", __func__);
7180 sc->qid2tap[qid] = tap;
7181 *(int *)tap->txa_private = qid;
7182 return sc->sc_addba_request(ni, tap, dialogtoken, baparamset,
7187 iwn_addba_response(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap,
7188 int code, int baparamset, int batimeout)
7190 struct iwn_softc *sc = ni->ni_ic->ic_ifp->if_softc;
7191 int qid = *(int *)tap->txa_private;
7192 uint8_t tid = tap->txa_tid;
7195 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7197 if (code == IEEE80211_STATUS_SUCCESS) {
7198 ni->ni_txseqs[tid] = tap->txa_start & 0xfff;
7199 ret = iwn_ampdu_tx_start(ni->ni_ic, ni, tid);
7203 sc->qid2tap[qid] = NULL;
7204 free(tap->txa_private, M_DEVBUF);
7205 tap->txa_private = NULL;
7207 return sc->sc_addba_response(ni, tap, code, baparamset, batimeout);
7211 * This function is called by upper layer when an ADDBA response is received
7215 iwn_ampdu_tx_start(struct ieee80211com *ic, struct ieee80211_node *ni,
7218 struct ieee80211_tx_ampdu *tap = &ni->ni_tx_ampdu[tid];
7219 struct iwn_softc *sc = ni->ni_ic->ic_ifp->if_softc;
7220 struct iwn_ops *ops = &sc->ops;
7221 struct iwn_node *wn = (void *)ni;
7222 struct iwn_node_info node;
7225 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7227 /* Enable TX for the specified RA/TID. */
7228 wn->disable_tid &= ~(1 << tid);
7229 memset(&node, 0, sizeof node);
7231 node.control = IWN_NODE_UPDATE;
7232 node.flags = IWN_FLAG_SET_DISABLE_TID;
7233 node.disable_tid = htole16(wn->disable_tid);
7234 error = ops->add_node(sc, &node, 1);
7238 if ((error = iwn_nic_lock(sc)) != 0)
7240 qid = *(int *)tap->txa_private;
7241 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: ra=%d tid=%d ssn=%d qid=%d\n",
7242 __func__, wn->id, tid, tap->txa_start, qid);
7243 ops->ampdu_tx_start(sc, ni, qid, tid, tap->txa_start & 0xfff);
7246 iwn_set_link_quality(sc, ni);
7251 iwn_ampdu_tx_stop(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap)
7253 struct iwn_softc *sc = ni->ni_ic->ic_ifp->if_softc;
7254 struct iwn_ops *ops = &sc->ops;
7255 uint8_t tid = tap->txa_tid;
7258 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7260 sc->sc_addba_stop(ni, tap);
7262 if (tap->txa_private == NULL)
7265 qid = *(int *)tap->txa_private;
7266 if (sc->txq[qid].queued != 0)
7268 if (iwn_nic_lock(sc) != 0)
7270 ops->ampdu_tx_stop(sc, qid, tid, tap->txa_start & 0xfff);
7272 sc->qid2tap[qid] = NULL;
7273 free(tap->txa_private, M_DEVBUF);
7274 tap->txa_private = NULL;
7278 iwn4965_ampdu_tx_start(struct iwn_softc *sc, struct ieee80211_node *ni,
7279 int qid, uint8_t tid, uint16_t ssn)
7281 struct iwn_node *wn = (void *)ni;
7283 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7285 /* Stop TX scheduler while we're changing its configuration. */
7286 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid),
7287 IWN4965_TXQ_STATUS_CHGACT);
7289 /* Assign RA/TID translation to the queue. */
7290 iwn_mem_write_2(sc, sc->sched_base + IWN4965_SCHED_TRANS_TBL(qid),
7293 /* Enable chain-building mode for the queue. */
7294 iwn_prph_setbits(sc, IWN4965_SCHED_QCHAIN_SEL, 1 << qid);
7296 /* Set starting sequence number from the ADDBA request. */
7297 sc->txq[qid].cur = sc->txq[qid].read = (ssn & 0xff);
7298 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | (ssn & 0xff));
7299 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_RDPTR(qid), ssn);
7301 /* Set scheduler window size. */
7302 iwn_mem_write(sc, sc->sched_base + IWN4965_SCHED_QUEUE_OFFSET(qid),
7304 /* Set scheduler frame limit. */
7305 iwn_mem_write(sc, sc->sched_base + IWN4965_SCHED_QUEUE_OFFSET(qid) + 4,
7306 IWN_SCHED_LIMIT << 16);
7308 /* Enable interrupts for the queue. */
7309 iwn_prph_setbits(sc, IWN4965_SCHED_INTR_MASK, 1 << qid);
7311 /* Mark the queue as active. */
7312 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid),
7313 IWN4965_TXQ_STATUS_ACTIVE | IWN4965_TXQ_STATUS_AGGR_ENA |
7314 iwn_tid2fifo[tid] << 1);
7318 iwn4965_ampdu_tx_stop(struct iwn_softc *sc, int qid, uint8_t tid, uint16_t ssn)
7320 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7322 /* Stop TX scheduler while we're changing its configuration. */
7323 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid),
7324 IWN4965_TXQ_STATUS_CHGACT);
7326 /* Set starting sequence number from the ADDBA request. */
7327 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | (ssn & 0xff));
7328 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_RDPTR(qid), ssn);
7330 /* Disable interrupts for the queue. */
7331 iwn_prph_clrbits(sc, IWN4965_SCHED_INTR_MASK, 1 << qid);
7333 /* Mark the queue as inactive. */
7334 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid),
7335 IWN4965_TXQ_STATUS_INACTIVE | iwn_tid2fifo[tid] << 1);
7339 iwn5000_ampdu_tx_start(struct iwn_softc *sc, struct ieee80211_node *ni,
7340 int qid, uint8_t tid, uint16_t ssn)
7342 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7344 struct iwn_node *wn = (void *)ni;
7346 /* Stop TX scheduler while we're changing its configuration. */
7347 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
7348 IWN5000_TXQ_STATUS_CHGACT);
7350 /* Assign RA/TID translation to the queue. */
7351 iwn_mem_write_2(sc, sc->sched_base + IWN5000_SCHED_TRANS_TBL(qid),
7354 /* Enable chain-building mode for the queue. */
7355 iwn_prph_setbits(sc, IWN5000_SCHED_QCHAIN_SEL, 1 << qid);
7357 /* Enable aggregation for the queue. */
7358 iwn_prph_setbits(sc, IWN5000_SCHED_AGGR_SEL, 1 << qid);
7360 /* Set starting sequence number from the ADDBA request. */
7361 sc->txq[qid].cur = sc->txq[qid].read = (ssn & 0xff);
7362 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | (ssn & 0xff));
7363 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_RDPTR(qid), ssn);
7365 /* Set scheduler window size and frame limit. */
7366 iwn_mem_write(sc, sc->sched_base + IWN5000_SCHED_QUEUE_OFFSET(qid) + 4,
7367 IWN_SCHED_LIMIT << 16 | IWN_SCHED_WINSZ);
7369 /* Enable interrupts for the queue. */
7370 iwn_prph_setbits(sc, IWN5000_SCHED_INTR_MASK, 1 << qid);
7372 /* Mark the queue as active. */
7373 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
7374 IWN5000_TXQ_STATUS_ACTIVE | iwn_tid2fifo[tid]);
7378 iwn5000_ampdu_tx_stop(struct iwn_softc *sc, int qid, uint8_t tid, uint16_t ssn)
7380 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7382 /* Stop TX scheduler while we're changing its configuration. */
7383 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
7384 IWN5000_TXQ_STATUS_CHGACT);
7386 /* Disable aggregation for the queue. */
7387 iwn_prph_clrbits(sc, IWN5000_SCHED_AGGR_SEL, 1 << qid);
7389 /* Set starting sequence number from the ADDBA request. */
7390 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | (ssn & 0xff));
7391 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_RDPTR(qid), ssn);
7393 /* Disable interrupts for the queue. */
7394 iwn_prph_clrbits(sc, IWN5000_SCHED_INTR_MASK, 1 << qid);
7396 /* Mark the queue as inactive. */
7397 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
7398 IWN5000_TXQ_STATUS_INACTIVE | iwn_tid2fifo[tid]);
7402 * Query calibration tables from the initialization firmware. We do this
7403 * only once at first boot. Called from a process context.
7406 iwn5000_query_calibration(struct iwn_softc *sc)
7408 struct iwn5000_calib_config cmd;
7411 memset(&cmd, 0, sizeof cmd);
7412 cmd.ucode.once.enable = htole32(0xffffffff);
7413 cmd.ucode.once.start = htole32(0xffffffff);
7414 cmd.ucode.once.send = htole32(0xffffffff);
7415 cmd.ucode.flags = htole32(0xffffffff);
7416 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: sending calibration query\n",
7418 error = iwn_cmd(sc, IWN5000_CMD_CALIB_CONFIG, &cmd, sizeof cmd, 0);
7422 /* Wait at most two seconds for calibration to complete. */
7423 if (!(sc->sc_flags & IWN_FLAG_CALIB_DONE))
7424 error = msleep(sc, &sc->sc_mtx, PCATCH, "iwncal", 2 * hz);
7429 * Send calibration results to the runtime firmware. These results were
7430 * obtained on first boot from the initialization firmware.
7433 iwn5000_send_calibration(struct iwn_softc *sc)
7437 for (idx = 0; idx < IWN5000_PHY_CALIB_MAX_RESULT; idx++) {
7438 if (!(sc->base_params->calib_need & (1<<idx))) {
7439 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
7440 "No need of calib %d\n",
7442 continue; /* no need for this calib */
7444 if (sc->calibcmd[idx].buf == NULL) {
7445 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
7446 "Need calib idx : %d but no available data\n",
7451 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
7452 "send calibration result idx=%d len=%d\n", idx,
7453 sc->calibcmd[idx].len);
7454 error = iwn_cmd(sc, IWN_CMD_PHY_CALIB, sc->calibcmd[idx].buf,
7455 sc->calibcmd[idx].len, 0);
7457 device_printf(sc->sc_dev,
7458 "%s: could not send calibration result, error %d\n",
7467 iwn5000_send_wimax_coex(struct iwn_softc *sc)
7469 struct iwn5000_wimax_coex wimax;
7472 if (sc->hw_type == IWN_HW_REV_TYPE_6050) {
7473 /* Enable WiMAX coexistence for combo adapters. */
7475 IWN_WIMAX_COEX_ASSOC_WA_UNMASK |
7476 IWN_WIMAX_COEX_UNASSOC_WA_UNMASK |
7477 IWN_WIMAX_COEX_STA_TABLE_VALID |
7478 IWN_WIMAX_COEX_ENABLE;
7479 memcpy(wimax.events, iwn6050_wimax_events,
7480 sizeof iwn6050_wimax_events);
7484 /* Disable WiMAX coexistence. */
7486 memset(wimax.events, 0, sizeof wimax.events);
7488 DPRINTF(sc, IWN_DEBUG_RESET, "%s: Configuring WiMAX coexistence\n",
7490 return iwn_cmd(sc, IWN5000_CMD_WIMAX_COEX, &wimax, sizeof wimax, 0);
7494 iwn5000_crystal_calib(struct iwn_softc *sc)
7496 struct iwn5000_phy_calib_crystal cmd;
7498 memset(&cmd, 0, sizeof cmd);
7499 cmd.code = IWN5000_PHY_CALIB_CRYSTAL;
7502 cmd.cap_pin[0] = le32toh(sc->eeprom_crystal) & 0xff;
7503 cmd.cap_pin[1] = (le32toh(sc->eeprom_crystal) >> 16) & 0xff;
7504 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "sending crystal calibration %d, %d\n",
7505 cmd.cap_pin[0], cmd.cap_pin[1]);
7506 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 0);
7510 iwn5000_temp_offset_calib(struct iwn_softc *sc)
7512 struct iwn5000_phy_calib_temp_offset cmd;
7514 memset(&cmd, 0, sizeof cmd);
7515 cmd.code = IWN5000_PHY_CALIB_TEMP_OFFSET;
7518 if (sc->eeprom_temp != 0)
7519 cmd.offset = htole16(sc->eeprom_temp);
7521 cmd.offset = htole16(IWN_DEFAULT_TEMP_OFFSET);
7522 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "setting radio sensor offset to %d\n",
7523 le16toh(cmd.offset));
7524 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 0);
7528 iwn5000_temp_offset_calibv2(struct iwn_softc *sc)
7530 struct iwn5000_phy_calib_temp_offsetv2 cmd;
7532 memset(&cmd, 0, sizeof cmd);
7533 cmd.code = IWN5000_PHY_CALIB_TEMP_OFFSET;
7536 if (sc->eeprom_temp != 0) {
7537 cmd.offset_low = htole16(sc->eeprom_temp);
7538 cmd.offset_high = htole16(sc->eeprom_temp_high);
7540 cmd.offset_low = htole16(IWN_DEFAULT_TEMP_OFFSET);
7541 cmd.offset_high = htole16(IWN_DEFAULT_TEMP_OFFSET);
7543 cmd.burnt_voltage_ref = htole16(sc->eeprom_voltage);
7545 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
7546 "setting radio sensor low offset to %d, high offset to %d, voltage to %d\n",
7547 le16toh(cmd.offset_low),
7548 le16toh(cmd.offset_high),
7549 le16toh(cmd.burnt_voltage_ref));
7551 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 0);
7555 * This function is called after the runtime firmware notifies us of its
7556 * readiness (called in a process context).
7559 iwn4965_post_alive(struct iwn_softc *sc)
7563 if ((error = iwn_nic_lock(sc)) != 0)
7566 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7568 /* Clear TX scheduler state in SRAM. */
7569 sc->sched_base = iwn_prph_read(sc, IWN_SCHED_SRAM_ADDR);
7570 iwn_mem_set_region_4(sc, sc->sched_base + IWN4965_SCHED_CTX_OFF, 0,
7571 IWN4965_SCHED_CTX_LEN / sizeof (uint32_t));
7573 /* Set physical address of TX scheduler rings (1KB aligned). */
7574 iwn_prph_write(sc, IWN4965_SCHED_DRAM_ADDR, sc->sched_dma.paddr >> 10);
7576 IWN_SETBITS(sc, IWN_FH_TX_CHICKEN, IWN_FH_TX_CHICKEN_SCHED_RETRY);
7578 /* Disable chain mode for all our 16 queues. */
7579 iwn_prph_write(sc, IWN4965_SCHED_QCHAIN_SEL, 0);
7581 for (qid = 0; qid < IWN4965_NTXQUEUES; qid++) {
7582 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_RDPTR(qid), 0);
7583 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | 0);
7585 /* Set scheduler window size. */
7586 iwn_mem_write(sc, sc->sched_base +
7587 IWN4965_SCHED_QUEUE_OFFSET(qid), IWN_SCHED_WINSZ);
7588 /* Set scheduler frame limit. */
7589 iwn_mem_write(sc, sc->sched_base +
7590 IWN4965_SCHED_QUEUE_OFFSET(qid) + 4,
7591 IWN_SCHED_LIMIT << 16);
7594 /* Enable interrupts for all our 16 queues. */
7595 iwn_prph_write(sc, IWN4965_SCHED_INTR_MASK, 0xffff);
7596 /* Identify TX FIFO rings (0-7). */
7597 iwn_prph_write(sc, IWN4965_SCHED_TXFACT, 0xff);
7599 /* Mark TX rings (4 EDCA + cmd + 2 HCCA) as active. */
7600 for (qid = 0; qid < 7; qid++) {
7601 static uint8_t qid2fifo[] = { 3, 2, 1, 0, 4, 5, 6 };
7602 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid),
7603 IWN4965_TXQ_STATUS_ACTIVE | qid2fifo[qid] << 1);
7610 * This function is called after the initialization or runtime firmware
7611 * notifies us of its readiness (called in a process context).
7614 iwn5000_post_alive(struct iwn_softc *sc)
7618 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
7620 /* Switch to using ICT interrupt mode. */
7621 iwn5000_ict_reset(sc);
7623 if ((error = iwn_nic_lock(sc)) != 0){
7624 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end in error\n", __func__);
7628 /* Clear TX scheduler state in SRAM. */
7629 sc->sched_base = iwn_prph_read(sc, IWN_SCHED_SRAM_ADDR);
7630 iwn_mem_set_region_4(sc, sc->sched_base + IWN5000_SCHED_CTX_OFF, 0,
7631 IWN5000_SCHED_CTX_LEN / sizeof (uint32_t));
7633 /* Set physical address of TX scheduler rings (1KB aligned). */
7634 iwn_prph_write(sc, IWN5000_SCHED_DRAM_ADDR, sc->sched_dma.paddr >> 10);
7636 IWN_SETBITS(sc, IWN_FH_TX_CHICKEN, IWN_FH_TX_CHICKEN_SCHED_RETRY);
7638 /* Enable chain mode for all queues, except command queue. */
7639 if (sc->sc_flags & IWN_FLAG_PAN_SUPPORT)
7640 iwn_prph_write(sc, IWN5000_SCHED_QCHAIN_SEL, 0xfffdf);
7642 iwn_prph_write(sc, IWN5000_SCHED_QCHAIN_SEL, 0xfffef);
7643 iwn_prph_write(sc, IWN5000_SCHED_AGGR_SEL, 0);
7645 for (qid = 0; qid < IWN5000_NTXQUEUES; qid++) {
7646 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_RDPTR(qid), 0);
7647 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | 0);
7649 iwn_mem_write(sc, sc->sched_base +
7650 IWN5000_SCHED_QUEUE_OFFSET(qid), 0);
7651 /* Set scheduler window size and frame limit. */
7652 iwn_mem_write(sc, sc->sched_base +
7653 IWN5000_SCHED_QUEUE_OFFSET(qid) + 4,
7654 IWN_SCHED_LIMIT << 16 | IWN_SCHED_WINSZ);
7657 /* Enable interrupts for all our 20 queues. */
7658 iwn_prph_write(sc, IWN5000_SCHED_INTR_MASK, 0xfffff);
7659 /* Identify TX FIFO rings (0-7). */
7660 iwn_prph_write(sc, IWN5000_SCHED_TXFACT, 0xff);
7662 /* Mark TX rings (4 EDCA + cmd + 2 HCCA) as active. */
7663 if (sc->sc_flags & IWN_FLAG_PAN_SUPPORT) {
7664 /* Mark TX rings as active. */
7665 for (qid = 0; qid < 11; qid++) {
7666 static uint8_t qid2fifo[] = { 3, 2, 1, 0, 0, 4, 2, 5, 4, 7, 5 };
7667 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
7668 IWN5000_TXQ_STATUS_ACTIVE | qid2fifo[qid]);
7671 /* Mark TX rings (4 EDCA + cmd + 2 HCCA) as active. */
7672 for (qid = 0; qid < 7; qid++) {
7673 static uint8_t qid2fifo[] = { 3, 2, 1, 0, 7, 5, 6 };
7674 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
7675 IWN5000_TXQ_STATUS_ACTIVE | qid2fifo[qid]);
7680 /* Configure WiMAX coexistence for combo adapters. */
7681 error = iwn5000_send_wimax_coex(sc);
7683 device_printf(sc->sc_dev,
7684 "%s: could not configure WiMAX coexistence, error %d\n",
7688 if (sc->hw_type != IWN_HW_REV_TYPE_5150) {
7689 /* Perform crystal calibration. */
7690 error = iwn5000_crystal_calib(sc);
7692 device_printf(sc->sc_dev,
7693 "%s: crystal calibration failed, error %d\n",
7698 if (!(sc->sc_flags & IWN_FLAG_CALIB_DONE)) {
7699 /* Query calibration from the initialization firmware. */
7700 if ((error = iwn5000_query_calibration(sc)) != 0) {
7701 device_printf(sc->sc_dev,
7702 "%s: could not query calibration, error %d\n",
7707 * We have the calibration results now, reboot with the
7708 * runtime firmware (call ourselves recursively!)
7711 error = iwn_hw_init(sc);
7713 /* Send calibration results to runtime firmware. */
7714 error = iwn5000_send_calibration(sc);
7717 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
7723 * The firmware boot code is small and is intended to be copied directly into
7724 * the NIC internal memory (no DMA transfer).
7727 iwn4965_load_bootcode(struct iwn_softc *sc, const uint8_t *ucode, int size)
7731 size /= sizeof (uint32_t);
7733 if ((error = iwn_nic_lock(sc)) != 0)
7736 /* Copy microcode image into NIC memory. */
7737 iwn_prph_write_region_4(sc, IWN_BSM_SRAM_BASE,
7738 (const uint32_t *)ucode, size);
7740 iwn_prph_write(sc, IWN_BSM_WR_MEM_SRC, 0);
7741 iwn_prph_write(sc, IWN_BSM_WR_MEM_DST, IWN_FW_TEXT_BASE);
7742 iwn_prph_write(sc, IWN_BSM_WR_DWCOUNT, size);
7744 /* Start boot load now. */
7745 iwn_prph_write(sc, IWN_BSM_WR_CTRL, IWN_BSM_WR_CTRL_START);
7747 /* Wait for transfer to complete. */
7748 for (ntries = 0; ntries < 1000; ntries++) {
7749 if (!(iwn_prph_read(sc, IWN_BSM_WR_CTRL) &
7750 IWN_BSM_WR_CTRL_START))
7754 if (ntries == 1000) {
7755 device_printf(sc->sc_dev, "%s: could not load boot firmware\n",
7761 /* Enable boot after power up. */
7762 iwn_prph_write(sc, IWN_BSM_WR_CTRL, IWN_BSM_WR_CTRL_START_EN);
7769 iwn4965_load_firmware(struct iwn_softc *sc)
7771 struct iwn_fw_info *fw = &sc->fw;
7772 struct iwn_dma_info *dma = &sc->fw_dma;
7775 /* Copy initialization sections into pre-allocated DMA-safe memory. */
7776 memcpy(dma->vaddr, fw->init.data, fw->init.datasz);
7777 bus_dmamap_sync(dma->tag, dma->map, BUS_DMASYNC_PREWRITE);
7778 memcpy(dma->vaddr + IWN4965_FW_DATA_MAXSZ,
7779 fw->init.text, fw->init.textsz);
7780 bus_dmamap_sync(dma->tag, dma->map, BUS_DMASYNC_PREWRITE);
7782 /* Tell adapter where to find initialization sections. */
7783 if ((error = iwn_nic_lock(sc)) != 0)
7785 iwn_prph_write(sc, IWN_BSM_DRAM_DATA_ADDR, dma->paddr >> 4);
7786 iwn_prph_write(sc, IWN_BSM_DRAM_DATA_SIZE, fw->init.datasz);
7787 iwn_prph_write(sc, IWN_BSM_DRAM_TEXT_ADDR,
7788 (dma->paddr + IWN4965_FW_DATA_MAXSZ) >> 4);
7789 iwn_prph_write(sc, IWN_BSM_DRAM_TEXT_SIZE, fw->init.textsz);
7792 /* Load firmware boot code. */
7793 error = iwn4965_load_bootcode(sc, fw->boot.text, fw->boot.textsz);
7795 device_printf(sc->sc_dev, "%s: could not load boot firmware\n",
7799 /* Now press "execute". */
7800 IWN_WRITE(sc, IWN_RESET, 0);
7802 /* Wait at most one second for first alive notification. */
7803 if ((error = msleep(sc, &sc->sc_mtx, PCATCH, "iwninit", hz)) != 0) {
7804 device_printf(sc->sc_dev,
7805 "%s: timeout waiting for adapter to initialize, error %d\n",
7810 /* Retrieve current temperature for initial TX power calibration. */
7811 sc->rawtemp = sc->ucode_info.temp[3].chan20MHz;
7812 sc->temp = iwn4965_get_temperature(sc);
7814 /* Copy runtime sections into pre-allocated DMA-safe memory. */
7815 memcpy(dma->vaddr, fw->main.data, fw->main.datasz);
7816 bus_dmamap_sync(dma->tag, dma->map, BUS_DMASYNC_PREWRITE);
7817 memcpy(dma->vaddr + IWN4965_FW_DATA_MAXSZ,
7818 fw->main.text, fw->main.textsz);
7819 bus_dmamap_sync(dma->tag, dma->map, BUS_DMASYNC_PREWRITE);
7821 /* Tell adapter where to find runtime sections. */
7822 if ((error = iwn_nic_lock(sc)) != 0)
7824 iwn_prph_write(sc, IWN_BSM_DRAM_DATA_ADDR, dma->paddr >> 4);
7825 iwn_prph_write(sc, IWN_BSM_DRAM_DATA_SIZE, fw->main.datasz);
7826 iwn_prph_write(sc, IWN_BSM_DRAM_TEXT_ADDR,
7827 (dma->paddr + IWN4965_FW_DATA_MAXSZ) >> 4);
7828 iwn_prph_write(sc, IWN_BSM_DRAM_TEXT_SIZE,
7829 IWN_FW_UPDATED | fw->main.textsz);
7836 iwn5000_load_firmware_section(struct iwn_softc *sc, uint32_t dst,
7837 const uint8_t *section, int size)
7839 struct iwn_dma_info *dma = &sc->fw_dma;
7842 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7844 /* Copy firmware section into pre-allocated DMA-safe memory. */
7845 memcpy(dma->vaddr, section, size);
7846 bus_dmamap_sync(dma->tag, dma->map, BUS_DMASYNC_PREWRITE);
7848 if ((error = iwn_nic_lock(sc)) != 0)
7851 IWN_WRITE(sc, IWN_FH_TX_CONFIG(IWN_SRVC_DMACHNL),
7852 IWN_FH_TX_CONFIG_DMA_PAUSE);
7854 IWN_WRITE(sc, IWN_FH_SRAM_ADDR(IWN_SRVC_DMACHNL), dst);
7855 IWN_WRITE(sc, IWN_FH_TFBD_CTRL0(IWN_SRVC_DMACHNL),
7856 IWN_LOADDR(dma->paddr));
7857 IWN_WRITE(sc, IWN_FH_TFBD_CTRL1(IWN_SRVC_DMACHNL),
7858 IWN_HIADDR(dma->paddr) << 28 | size);
7859 IWN_WRITE(sc, IWN_FH_TXBUF_STATUS(IWN_SRVC_DMACHNL),
7860 IWN_FH_TXBUF_STATUS_TBNUM(1) |
7861 IWN_FH_TXBUF_STATUS_TBIDX(1) |
7862 IWN_FH_TXBUF_STATUS_TFBD_VALID);
7864 /* Kick Flow Handler to start DMA transfer. */
7865 IWN_WRITE(sc, IWN_FH_TX_CONFIG(IWN_SRVC_DMACHNL),
7866 IWN_FH_TX_CONFIG_DMA_ENA | IWN_FH_TX_CONFIG_CIRQ_HOST_ENDTFD);
7870 /* Wait at most five seconds for FH DMA transfer to complete. */
7871 return msleep(sc, &sc->sc_mtx, PCATCH, "iwninit", 5 * hz);
7875 iwn5000_load_firmware(struct iwn_softc *sc)
7877 struct iwn_fw_part *fw;
7880 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7882 /* Load the initialization firmware on first boot only. */
7883 fw = (sc->sc_flags & IWN_FLAG_CALIB_DONE) ?
7884 &sc->fw.main : &sc->fw.init;
7886 error = iwn5000_load_firmware_section(sc, IWN_FW_TEXT_BASE,
7887 fw->text, fw->textsz);
7889 device_printf(sc->sc_dev,
7890 "%s: could not load firmware %s section, error %d\n",
7891 __func__, ".text", error);
7894 error = iwn5000_load_firmware_section(sc, IWN_FW_DATA_BASE,
7895 fw->data, fw->datasz);
7897 device_printf(sc->sc_dev,
7898 "%s: could not load firmware %s section, error %d\n",
7899 __func__, ".data", error);
7903 /* Now press "execute". */
7904 IWN_WRITE(sc, IWN_RESET, 0);
7909 * Extract text and data sections from a legacy firmware image.
7912 iwn_read_firmware_leg(struct iwn_softc *sc, struct iwn_fw_info *fw)
7914 const uint32_t *ptr;
7918 ptr = (const uint32_t *)fw->data;
7919 rev = le32toh(*ptr++);
7921 sc->ucode_rev = rev;
7923 /* Check firmware API version. */
7924 if (IWN_FW_API(rev) <= 1) {
7925 device_printf(sc->sc_dev,
7926 "%s: bad firmware, need API version >=2\n", __func__);
7929 if (IWN_FW_API(rev) >= 3) {
7930 /* Skip build number (version 2 header). */
7934 if (fw->size < hdrlen) {
7935 device_printf(sc->sc_dev, "%s: firmware too short: %zu bytes\n",
7936 __func__, fw->size);
7939 fw->main.textsz = le32toh(*ptr++);
7940 fw->main.datasz = le32toh(*ptr++);
7941 fw->init.textsz = le32toh(*ptr++);
7942 fw->init.datasz = le32toh(*ptr++);
7943 fw->boot.textsz = le32toh(*ptr++);
7945 /* Check that all firmware sections fit. */
7946 if (fw->size < hdrlen + fw->main.textsz + fw->main.datasz +
7947 fw->init.textsz + fw->init.datasz + fw->boot.textsz) {
7948 device_printf(sc->sc_dev, "%s: firmware too short: %zu bytes\n",
7949 __func__, fw->size);
7953 /* Get pointers to firmware sections. */
7954 fw->main.text = (const uint8_t *)ptr;
7955 fw->main.data = fw->main.text + fw->main.textsz;
7956 fw->init.text = fw->main.data + fw->main.datasz;
7957 fw->init.data = fw->init.text + fw->init.textsz;
7958 fw->boot.text = fw->init.data + fw->init.datasz;
7963 * Extract text and data sections from a TLV firmware image.
7966 iwn_read_firmware_tlv(struct iwn_softc *sc, struct iwn_fw_info *fw,
7969 const struct iwn_fw_tlv_hdr *hdr;
7970 const struct iwn_fw_tlv *tlv;
7971 const uint8_t *ptr, *end;
7975 if (fw->size < sizeof (*hdr)) {
7976 device_printf(sc->sc_dev, "%s: firmware too short: %zu bytes\n",
7977 __func__, fw->size);
7980 hdr = (const struct iwn_fw_tlv_hdr *)fw->data;
7981 if (hdr->signature != htole32(IWN_FW_SIGNATURE)) {
7982 device_printf(sc->sc_dev, "%s: bad firmware signature 0x%08x\n",
7983 __func__, le32toh(hdr->signature));
7986 DPRINTF(sc, IWN_DEBUG_RESET, "FW: \"%.64s\", build 0x%x\n", hdr->descr,
7987 le32toh(hdr->build));
7988 sc->ucode_rev = le32toh(hdr->rev);
7991 * Select the closest supported alternative that is less than
7992 * or equal to the specified one.
7994 altmask = le64toh(hdr->altmask);
7995 while (alt > 0 && !(altmask & (1ULL << alt)))
7996 alt--; /* Downgrade. */
7997 DPRINTF(sc, IWN_DEBUG_RESET, "using alternative %d\n", alt);
7999 ptr = (const uint8_t *)(hdr + 1);
8000 end = (const uint8_t *)(fw->data + fw->size);
8002 /* Parse type-length-value fields. */
8003 while (ptr + sizeof (*tlv) <= end) {
8004 tlv = (const struct iwn_fw_tlv *)ptr;
8005 len = le32toh(tlv->len);
8007 ptr += sizeof (*tlv);
8008 if (ptr + len > end) {
8009 device_printf(sc->sc_dev,
8010 "%s: firmware too short: %zu bytes\n", __func__,
8014 /* Skip other alternatives. */
8015 if (tlv->alt != 0 && tlv->alt != htole16(alt))
8018 switch (le16toh(tlv->type)) {
8019 case IWN_FW_TLV_MAIN_TEXT:
8020 fw->main.text = ptr;
8021 fw->main.textsz = len;
8023 case IWN_FW_TLV_MAIN_DATA:
8024 fw->main.data = ptr;
8025 fw->main.datasz = len;
8027 case IWN_FW_TLV_INIT_TEXT:
8028 fw->init.text = ptr;
8029 fw->init.textsz = len;
8031 case IWN_FW_TLV_INIT_DATA:
8032 fw->init.data = ptr;
8033 fw->init.datasz = len;
8035 case IWN_FW_TLV_BOOT_TEXT:
8036 fw->boot.text = ptr;
8037 fw->boot.textsz = len;
8039 case IWN_FW_TLV_ENH_SENS:
8041 sc->sc_flags |= IWN_FLAG_ENH_SENS;
8043 case IWN_FW_TLV_PHY_CALIB:
8044 tmp = le32toh(*ptr);
8046 sc->reset_noise_gain = tmp;
8047 sc->noise_gain = tmp + 1;
8050 case IWN_FW_TLV_PAN:
8051 sc->sc_flags |= IWN_FLAG_PAN_SUPPORT;
8052 DPRINTF(sc, IWN_DEBUG_RESET,
8053 "PAN Support found: %d\n", 1);
8055 case IWN_FW_TLV_FLAGS:
8056 if (len < sizeof(uint32_t))
8058 if (len % sizeof(uint32_t))
8060 sc->tlv_feature_flags = le32toh(*ptr);
8061 DPRINTF(sc, IWN_DEBUG_RESET,
8062 "%s: feature: 0x%08x\n",
8064 sc->tlv_feature_flags);
8066 case IWN_FW_TLV_PBREQ_MAXLEN:
8067 case IWN_FW_TLV_RUNT_EVTLOG_PTR:
8068 case IWN_FW_TLV_RUNT_EVTLOG_SIZE:
8069 case IWN_FW_TLV_RUNT_ERRLOG_PTR:
8070 case IWN_FW_TLV_INIT_EVTLOG_PTR:
8071 case IWN_FW_TLV_INIT_EVTLOG_SIZE:
8072 case IWN_FW_TLV_INIT_ERRLOG_PTR:
8073 case IWN_FW_TLV_WOWLAN_INST:
8074 case IWN_FW_TLV_WOWLAN_DATA:
8075 DPRINTF(sc, IWN_DEBUG_RESET,
8076 "TLV type %d reconized but not handled\n",
8077 le16toh(tlv->type));
8080 DPRINTF(sc, IWN_DEBUG_RESET,
8081 "TLV type %d not handled\n", le16toh(tlv->type));
8084 next: /* TLV fields are 32-bit aligned. */
8085 ptr += (len + 3) & ~3;
8091 iwn_read_firmware(struct iwn_softc *sc)
8093 struct iwn_fw_info *fw = &sc->fw;
8096 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8100 memset(fw, 0, sizeof (*fw));
8102 /* Read firmware image from filesystem. */
8103 sc->fw_fp = firmware_get(sc->fwname);
8104 if (sc->fw_fp == NULL) {
8105 device_printf(sc->sc_dev, "%s: could not read firmware %s\n",
8106 __func__, sc->fwname);
8112 fw->size = sc->fw_fp->datasize;
8113 fw->data = (const uint8_t *)sc->fw_fp->data;
8114 if (fw->size < sizeof (uint32_t)) {
8115 device_printf(sc->sc_dev, "%s: firmware too short: %zu bytes\n",
8116 __func__, fw->size);
8117 firmware_put(sc->fw_fp, FIRMWARE_UNLOAD);
8122 /* Retrieve text and data sections. */
8123 if (*(const uint32_t *)fw->data != 0) /* Legacy image. */
8124 error = iwn_read_firmware_leg(sc, fw);
8126 error = iwn_read_firmware_tlv(sc, fw, 1);
8128 device_printf(sc->sc_dev,
8129 "%s: could not read firmware sections, error %d\n",
8131 firmware_put(sc->fw_fp, FIRMWARE_UNLOAD);
8136 device_printf(sc->sc_dev, "%s: ucode rev=0x%08x\n", __func__, sc->ucode_rev);
8138 /* Make sure text and data sections fit in hardware memory. */
8139 if (fw->main.textsz > sc->fw_text_maxsz ||
8140 fw->main.datasz > sc->fw_data_maxsz ||
8141 fw->init.textsz > sc->fw_text_maxsz ||
8142 fw->init.datasz > sc->fw_data_maxsz ||
8143 fw->boot.textsz > IWN_FW_BOOT_TEXT_MAXSZ ||
8144 (fw->boot.textsz & 3) != 0) {
8145 device_printf(sc->sc_dev, "%s: firmware sections too large\n",
8147 firmware_put(sc->fw_fp, FIRMWARE_UNLOAD);
8152 /* We can proceed with loading the firmware. */
8157 iwn_clock_wait(struct iwn_softc *sc)
8161 /* Set "initialization complete" bit. */
8162 IWN_SETBITS(sc, IWN_GP_CNTRL, IWN_GP_CNTRL_INIT_DONE);
8164 /* Wait for clock stabilization. */
8165 for (ntries = 0; ntries < 2500; ntries++) {
8166 if (IWN_READ(sc, IWN_GP_CNTRL) & IWN_GP_CNTRL_MAC_CLOCK_READY)
8170 device_printf(sc->sc_dev,
8171 "%s: timeout waiting for clock stabilization\n", __func__);
8176 iwn_apm_init(struct iwn_softc *sc)
8181 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8183 /* Disable L0s exit timer (NMI bug workaround). */
8184 IWN_SETBITS(sc, IWN_GIO_CHICKEN, IWN_GIO_CHICKEN_DIS_L0S_TIMER);
8185 /* Don't wait for ICH L0s (ICH bug workaround). */
8186 IWN_SETBITS(sc, IWN_GIO_CHICKEN, IWN_GIO_CHICKEN_L1A_NO_L0S_RX);
8188 /* Set FH wait threshold to max (HW bug under stress workaround). */
8189 IWN_SETBITS(sc, IWN_DBG_HPET_MEM, 0xffff0000);
8191 /* Enable HAP INTA to move adapter from L1a to L0s. */
8192 IWN_SETBITS(sc, IWN_HW_IF_CONFIG, IWN_HW_IF_CONFIG_HAP_WAKE_L1A);
8194 /* Retrieve PCIe Active State Power Management (ASPM). */
8195 reg = pci_read_config(sc->sc_dev, sc->sc_cap_off + 0x10, 1);
8196 /* Workaround for HW instability in PCIe L0->L0s->L1 transition. */
8197 if (reg & 0x02) /* L1 Entry enabled. */
8198 IWN_SETBITS(sc, IWN_GIO, IWN_GIO_L0S_ENA);
8200 IWN_CLRBITS(sc, IWN_GIO, IWN_GIO_L0S_ENA);
8202 if (sc->base_params->pll_cfg_val)
8203 IWN_SETBITS(sc, IWN_ANA_PLL, sc->base_params->pll_cfg_val);
8205 /* Wait for clock stabilization before accessing prph. */
8206 if ((error = iwn_clock_wait(sc)) != 0)
8209 if ((error = iwn_nic_lock(sc)) != 0)
8211 if (sc->hw_type == IWN_HW_REV_TYPE_4965) {
8212 /* Enable DMA and BSM (Bootstrap State Machine). */
8213 iwn_prph_write(sc, IWN_APMG_CLK_EN,
8214 IWN_APMG_CLK_CTRL_DMA_CLK_RQT |
8215 IWN_APMG_CLK_CTRL_BSM_CLK_RQT);
8218 iwn_prph_write(sc, IWN_APMG_CLK_EN,
8219 IWN_APMG_CLK_CTRL_DMA_CLK_RQT);
8222 /* Disable L1-Active. */
8223 iwn_prph_setbits(sc, IWN_APMG_PCI_STT, IWN_APMG_PCI_STT_L1A_DIS);
8230 iwn_apm_stop_master(struct iwn_softc *sc)
8234 /* Stop busmaster DMA activity. */
8235 IWN_SETBITS(sc, IWN_RESET, IWN_RESET_STOP_MASTER);
8236 for (ntries = 0; ntries < 100; ntries++) {
8237 if (IWN_READ(sc, IWN_RESET) & IWN_RESET_MASTER_DISABLED)
8241 device_printf(sc->sc_dev, "%s: timeout waiting for master\n", __func__);
8245 iwn_apm_stop(struct iwn_softc *sc)
8247 iwn_apm_stop_master(sc);
8249 /* Reset the entire device. */
8250 IWN_SETBITS(sc, IWN_RESET, IWN_RESET_SW);
8252 /* Clear "initialization complete" bit. */
8253 IWN_CLRBITS(sc, IWN_GP_CNTRL, IWN_GP_CNTRL_INIT_DONE);
8257 iwn4965_nic_config(struct iwn_softc *sc)
8259 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8261 if (IWN_RFCFG_TYPE(sc->rfcfg) == 1) {
8263 * I don't believe this to be correct but this is what the
8264 * vendor driver is doing. Probably the bits should not be
8265 * shifted in IWN_RFCFG_*.
8267 IWN_SETBITS(sc, IWN_HW_IF_CONFIG,
8268 IWN_RFCFG_TYPE(sc->rfcfg) |
8269 IWN_RFCFG_STEP(sc->rfcfg) |
8270 IWN_RFCFG_DASH(sc->rfcfg));
8272 IWN_SETBITS(sc, IWN_HW_IF_CONFIG,
8273 IWN_HW_IF_CONFIG_RADIO_SI | IWN_HW_IF_CONFIG_MAC_SI);
8278 iwn5000_nic_config(struct iwn_softc *sc)
8283 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8285 if (IWN_RFCFG_TYPE(sc->rfcfg) < 3) {
8286 IWN_SETBITS(sc, IWN_HW_IF_CONFIG,
8287 IWN_RFCFG_TYPE(sc->rfcfg) |
8288 IWN_RFCFG_STEP(sc->rfcfg) |
8289 IWN_RFCFG_DASH(sc->rfcfg));
8291 IWN_SETBITS(sc, IWN_HW_IF_CONFIG,
8292 IWN_HW_IF_CONFIG_RADIO_SI | IWN_HW_IF_CONFIG_MAC_SI);
8294 if ((error = iwn_nic_lock(sc)) != 0)
8296 iwn_prph_setbits(sc, IWN_APMG_PS, IWN_APMG_PS_EARLY_PWROFF_DIS);
8298 if (sc->hw_type == IWN_HW_REV_TYPE_1000) {
8300 * Select first Switching Voltage Regulator (1.32V) to
8301 * solve a stability issue related to noisy DC2DC line
8302 * in the silicon of 1000 Series.
8304 tmp = iwn_prph_read(sc, IWN_APMG_DIGITAL_SVR);
8305 tmp &= ~IWN_APMG_DIGITAL_SVR_VOLTAGE_MASK;
8306 tmp |= IWN_APMG_DIGITAL_SVR_VOLTAGE_1_32;
8307 iwn_prph_write(sc, IWN_APMG_DIGITAL_SVR, tmp);
8311 if (sc->sc_flags & IWN_FLAG_INTERNAL_PA) {
8312 /* Use internal power amplifier only. */
8313 IWN_WRITE(sc, IWN_GP_DRIVER, IWN_GP_DRIVER_RADIO_2X2_IPA);
8315 if (sc->base_params->additional_nic_config && sc->calib_ver >= 6) {
8316 /* Indicate that ROM calibration version is >=6. */
8317 IWN_SETBITS(sc, IWN_GP_DRIVER, IWN_GP_DRIVER_CALIB_VER6);
8319 if (sc->base_params->additional_gp_drv_bit)
8320 IWN_SETBITS(sc, IWN_GP_DRIVER,
8321 sc->base_params->additional_gp_drv_bit);
8326 * Take NIC ownership over Intel Active Management Technology (AMT).
8329 iwn_hw_prepare(struct iwn_softc *sc)
8333 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8335 /* Check if hardware is ready. */
8336 IWN_SETBITS(sc, IWN_HW_IF_CONFIG, IWN_HW_IF_CONFIG_NIC_READY);
8337 for (ntries = 0; ntries < 5; ntries++) {
8338 if (IWN_READ(sc, IWN_HW_IF_CONFIG) &
8339 IWN_HW_IF_CONFIG_NIC_READY)
8344 /* Hardware not ready, force into ready state. */
8345 IWN_SETBITS(sc, IWN_HW_IF_CONFIG, IWN_HW_IF_CONFIG_PREPARE);
8346 for (ntries = 0; ntries < 15000; ntries++) {
8347 if (!(IWN_READ(sc, IWN_HW_IF_CONFIG) &
8348 IWN_HW_IF_CONFIG_PREPARE_DONE))
8352 if (ntries == 15000)
8355 /* Hardware should be ready now. */
8356 IWN_SETBITS(sc, IWN_HW_IF_CONFIG, IWN_HW_IF_CONFIG_NIC_READY);
8357 for (ntries = 0; ntries < 5; ntries++) {
8358 if (IWN_READ(sc, IWN_HW_IF_CONFIG) &
8359 IWN_HW_IF_CONFIG_NIC_READY)
8367 iwn_hw_init(struct iwn_softc *sc)
8369 struct iwn_ops *ops = &sc->ops;
8370 int error, chnl, qid;
8372 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
8374 /* Clear pending interrupts. */
8375 IWN_WRITE(sc, IWN_INT, 0xffffffff);
8377 if ((error = iwn_apm_init(sc)) != 0) {
8378 device_printf(sc->sc_dev,
8379 "%s: could not power ON adapter, error %d\n", __func__,
8384 /* Select VMAIN power source. */
8385 if ((error = iwn_nic_lock(sc)) != 0)
8387 iwn_prph_clrbits(sc, IWN_APMG_PS, IWN_APMG_PS_PWR_SRC_MASK);
8390 /* Perform adapter-specific initialization. */
8391 if ((error = ops->nic_config(sc)) != 0)
8394 /* Initialize RX ring. */
8395 if ((error = iwn_nic_lock(sc)) != 0)
8397 IWN_WRITE(sc, IWN_FH_RX_CONFIG, 0);
8398 IWN_WRITE(sc, IWN_FH_RX_WPTR, 0);
8399 /* Set physical address of RX ring (256-byte aligned). */
8400 IWN_WRITE(sc, IWN_FH_RX_BASE, sc->rxq.desc_dma.paddr >> 8);
8401 /* Set physical address of RX status (16-byte aligned). */
8402 IWN_WRITE(sc, IWN_FH_STATUS_WPTR, sc->rxq.stat_dma.paddr >> 4);
8404 IWN_WRITE(sc, IWN_FH_RX_CONFIG,
8405 IWN_FH_RX_CONFIG_ENA |
8406 IWN_FH_RX_CONFIG_IGN_RXF_EMPTY | /* HW bug workaround */
8407 IWN_FH_RX_CONFIG_IRQ_DST_HOST |
8408 IWN_FH_RX_CONFIG_SINGLE_FRAME |
8409 IWN_FH_RX_CONFIG_RB_TIMEOUT(0) |
8410 IWN_FH_RX_CONFIG_NRBD(IWN_RX_RING_COUNT_LOG));
8412 IWN_WRITE(sc, IWN_FH_RX_WPTR, (IWN_RX_RING_COUNT - 1) & ~7);
8414 if ((error = iwn_nic_lock(sc)) != 0)
8417 /* Initialize TX scheduler. */
8418 iwn_prph_write(sc, sc->sched_txfact_addr, 0);
8420 /* Set physical address of "keep warm" page (16-byte aligned). */
8421 IWN_WRITE(sc, IWN_FH_KW_ADDR, sc->kw_dma.paddr >> 4);
8423 /* Initialize TX rings. */
8424 for (qid = 0; qid < sc->ntxqs; qid++) {
8425 struct iwn_tx_ring *txq = &sc->txq[qid];
8427 /* Set physical address of TX ring (256-byte aligned). */
8428 IWN_WRITE(sc, IWN_FH_CBBC_QUEUE(qid),
8429 txq->desc_dma.paddr >> 8);
8433 /* Enable DMA channels. */
8434 for (chnl = 0; chnl < sc->ndmachnls; chnl++) {
8435 IWN_WRITE(sc, IWN_FH_TX_CONFIG(chnl),
8436 IWN_FH_TX_CONFIG_DMA_ENA |
8437 IWN_FH_TX_CONFIG_DMA_CREDIT_ENA);
8440 /* Clear "radio off" and "commands blocked" bits. */
8441 IWN_WRITE(sc, IWN_UCODE_GP1_CLR, IWN_UCODE_GP1_RFKILL);
8442 IWN_WRITE(sc, IWN_UCODE_GP1_CLR, IWN_UCODE_GP1_CMD_BLOCKED);
8444 /* Clear pending interrupts. */
8445 IWN_WRITE(sc, IWN_INT, 0xffffffff);
8446 /* Enable interrupt coalescing. */
8447 IWN_WRITE(sc, IWN_INT_COALESCING, 512 / 8);
8448 /* Enable interrupts. */
8449 IWN_WRITE(sc, IWN_INT_MASK, sc->int_mask);
8451 /* _Really_ make sure "radio off" bit is cleared! */
8452 IWN_WRITE(sc, IWN_UCODE_GP1_CLR, IWN_UCODE_GP1_RFKILL);
8453 IWN_WRITE(sc, IWN_UCODE_GP1_CLR, IWN_UCODE_GP1_RFKILL);
8455 /* Enable shadow registers. */
8456 if (sc->base_params->shadow_reg_enable)
8457 IWN_SETBITS(sc, IWN_SHADOW_REG_CTRL, 0x800fffff);
8459 if ((error = ops->load_firmware(sc)) != 0) {
8460 device_printf(sc->sc_dev,
8461 "%s: could not load firmware, error %d\n", __func__,
8465 /* Wait at most one second for firmware alive notification. */
8466 if ((error = msleep(sc, &sc->sc_mtx, PCATCH, "iwninit", hz)) != 0) {
8467 device_printf(sc->sc_dev,
8468 "%s: timeout waiting for adapter to initialize, error %d\n",
8472 /* Do post-firmware initialization. */
8474 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
8476 return ops->post_alive(sc);
8480 iwn_hw_stop(struct iwn_softc *sc)
8482 int chnl, qid, ntries;
8484 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8486 IWN_WRITE(sc, IWN_RESET, IWN_RESET_NEVO);
8488 /* Disable interrupts. */
8489 IWN_WRITE(sc, IWN_INT_MASK, 0);
8490 IWN_WRITE(sc, IWN_INT, 0xffffffff);
8491 IWN_WRITE(sc, IWN_FH_INT, 0xffffffff);
8492 sc->sc_flags &= ~IWN_FLAG_USE_ICT;
8494 /* Make sure we no longer hold the NIC lock. */
8497 /* Stop TX scheduler. */
8498 iwn_prph_write(sc, sc->sched_txfact_addr, 0);
8500 /* Stop all DMA channels. */
8501 if (iwn_nic_lock(sc) == 0) {
8502 for (chnl = 0; chnl < sc->ndmachnls; chnl++) {
8503 IWN_WRITE(sc, IWN_FH_TX_CONFIG(chnl), 0);
8504 for (ntries = 0; ntries < 200; ntries++) {
8505 if (IWN_READ(sc, IWN_FH_TX_STATUS) &
8506 IWN_FH_TX_STATUS_IDLE(chnl))
8515 iwn_reset_rx_ring(sc, &sc->rxq);
8517 /* Reset all TX rings. */
8518 for (qid = 0; qid < sc->ntxqs; qid++)
8519 iwn_reset_tx_ring(sc, &sc->txq[qid]);
8521 if (iwn_nic_lock(sc) == 0) {
8522 iwn_prph_write(sc, IWN_APMG_CLK_DIS,
8523 IWN_APMG_CLK_CTRL_DMA_CLK_RQT);
8527 /* Power OFF adapter. */
8532 iwn_radio_on(void *arg0, int pending)
8534 struct iwn_softc *sc = arg0;
8535 struct ifnet *ifp = sc->sc_ifp;
8536 struct ieee80211com *ic = ifp->if_l2com;
8537 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
8539 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8543 ieee80211_init(vap);
8548 iwn_radio_off(void *arg0, int pending)
8550 struct iwn_softc *sc = arg0;
8551 struct ifnet *ifp = sc->sc_ifp;
8552 struct ieee80211com *ic = ifp->if_l2com;
8553 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
8555 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8559 ieee80211_stop(vap);
8561 /* Enable interrupts to get RF toggle notification. */
8563 IWN_WRITE(sc, IWN_INT, 0xffffffff);
8564 IWN_WRITE(sc, IWN_INT_MASK, sc->int_mask);
8569 iwn_panicked(void *arg0, int pending)
8571 struct iwn_softc *sc = arg0;
8572 struct ifnet *ifp = sc->sc_ifp;
8573 struct ieee80211com *ic = ifp->if_l2com;
8574 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
8578 printf("%s: null vap\n", __func__);
8582 device_printf(sc->sc_dev, "%s: controller panicked, iv_state = %d; "
8583 "resetting...\n", __func__, vap->iv_state);
8587 iwn_stop_locked(sc);
8588 iwn_init_locked(sc);
8589 if (vap->iv_state >= IEEE80211_S_AUTH &&
8590 (error = iwn_auth(sc, vap)) != 0) {
8591 device_printf(sc->sc_dev,
8592 "%s: could not move to auth state\n", __func__);
8594 if (vap->iv_state >= IEEE80211_S_RUN &&
8595 (error = iwn_run(sc, vap)) != 0) {
8596 device_printf(sc->sc_dev,
8597 "%s: could not move to run state\n", __func__);
8600 /* Only run start once the NIC is in a useful state, like associated */
8601 iwn_start_locked(sc->sc_ifp);
8607 iwn_init_locked(struct iwn_softc *sc)
8609 struct ifnet *ifp = sc->sc_ifp;
8612 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
8614 IWN_LOCK_ASSERT(sc);
8616 if ((error = iwn_hw_prepare(sc)) != 0) {
8617 device_printf(sc->sc_dev, "%s: hardware not ready, error %d\n",
8622 /* Initialize interrupt mask to default value. */
8623 sc->int_mask = IWN_INT_MASK_DEF;
8624 sc->sc_flags &= ~IWN_FLAG_USE_ICT;
8626 /* Check that the radio is not disabled by hardware switch. */
8627 if (!(IWN_READ(sc, IWN_GP_CNTRL) & IWN_GP_CNTRL_RFKILL)) {
8628 device_printf(sc->sc_dev,
8629 "radio is disabled by hardware switch\n");
8630 /* Enable interrupts to get RF toggle notifications. */
8631 IWN_WRITE(sc, IWN_INT, 0xffffffff);
8632 IWN_WRITE(sc, IWN_INT_MASK, sc->int_mask);
8636 /* Read firmware images from the filesystem. */
8637 if ((error = iwn_read_firmware(sc)) != 0) {
8638 device_printf(sc->sc_dev,
8639 "%s: could not read firmware, error %d\n", __func__,
8644 /* Initialize hardware and upload firmware. */
8645 error = iwn_hw_init(sc);
8646 firmware_put(sc->fw_fp, FIRMWARE_UNLOAD);
8649 device_printf(sc->sc_dev,
8650 "%s: could not initialize hardware, error %d\n", __func__,
8655 /* Configure adapter now that it is ready. */
8656 if ((error = iwn_config(sc)) != 0) {
8657 device_printf(sc->sc_dev,
8658 "%s: could not configure device, error %d\n", __func__,
8663 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
8664 ifp->if_drv_flags |= IFF_DRV_RUNNING;
8666 callout_reset(&sc->watchdog_to, hz, iwn_watchdog, sc);
8668 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
8672 fail: iwn_stop_locked(sc);
8673 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end in error\n",__func__);
8679 struct iwn_softc *sc = arg;
8680 struct ifnet *ifp = sc->sc_ifp;
8681 struct ieee80211com *ic = ifp->if_l2com;
8684 iwn_init_locked(sc);
8687 if (ifp->if_drv_flags & IFF_DRV_RUNNING)
8688 ieee80211_start_all(ic);
8692 iwn_stop_locked(struct iwn_softc *sc)
8694 struct ifnet *ifp = sc->sc_ifp;
8696 IWN_LOCK_ASSERT(sc);
8698 sc->sc_is_scanning = 0;
8699 sc->sc_tx_timer = 0;
8700 callout_stop(&sc->watchdog_to);
8701 callout_stop(&sc->calib_to);
8702 ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE);
8704 /* Power OFF hardware. */
8709 iwn_stop(struct iwn_softc *sc)
8712 iwn_stop_locked(sc);
8717 * Callback from net80211 to start a scan.
8720 iwn_scan_start(struct ieee80211com *ic)
8722 struct ifnet *ifp = ic->ic_ifp;
8723 struct iwn_softc *sc = ifp->if_softc;
8726 /* make the link LED blink while we're scanning */
8727 iwn_set_led(sc, IWN_LED_LINK, 20, 2);
8732 * Callback from net80211 to terminate a scan.
8735 iwn_scan_end(struct ieee80211com *ic)
8737 struct ifnet *ifp = ic->ic_ifp;
8738 struct iwn_softc *sc = ifp->if_softc;
8739 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
8742 if (vap->iv_state == IEEE80211_S_RUN) {
8743 /* Set link LED to ON status if we are associated */
8744 iwn_set_led(sc, IWN_LED_LINK, 0, 1);
8750 * Callback from net80211 to force a channel change.
8753 iwn_set_channel(struct ieee80211com *ic)
8755 const struct ieee80211_channel *c = ic->ic_curchan;
8756 struct ifnet *ifp = ic->ic_ifp;
8757 struct iwn_softc *sc = ifp->if_softc;
8760 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8763 sc->sc_rxtap.wr_chan_freq = htole16(c->ic_freq);
8764 sc->sc_rxtap.wr_chan_flags = htole16(c->ic_flags);
8765 sc->sc_txtap.wt_chan_freq = htole16(c->ic_freq);
8766 sc->sc_txtap.wt_chan_flags = htole16(c->ic_flags);
8769 * Only need to set the channel in Monitor mode. AP scanning and auth
8770 * are already taken care of by their respective firmware commands.
8772 if (ic->ic_opmode == IEEE80211_M_MONITOR) {
8773 error = iwn_config(sc);
8775 device_printf(sc->sc_dev,
8776 "%s: error %d settting channel\n", __func__, error);
8782 * Callback from net80211 to start scanning of the current channel.
8785 iwn_scan_curchan(struct ieee80211_scan_state *ss, unsigned long maxdwell)
8787 struct ieee80211vap *vap = ss->ss_vap;
8788 struct iwn_softc *sc = vap->iv_ic->ic_ifp->if_softc;
8789 struct ieee80211com *ic = vap->iv_ic;
8793 error = iwn_scan(sc, vap, ss, ic->ic_curchan);
8796 ieee80211_cancel_scan(vap);
8800 * Callback from net80211 to handle the minimum dwell time being met.
8801 * The intent is to terminate the scan but we just let the firmware
8802 * notify us when it's finished as we have no safe way to abort it.
8805 iwn_scan_mindwell(struct ieee80211_scan_state *ss)
8807 /* NB: don't try to abort scan; wait for firmware to finish */
8811 iwn_hw_reset(void *arg0, int pending)
8813 struct iwn_softc *sc = arg0;
8814 struct ifnet *ifp = sc->sc_ifp;
8815 struct ieee80211com *ic = ifp->if_l2com;
8817 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8821 ieee80211_notify_radio(ic, 1);
8824 #define IWN_DESC(x) case x: return #x
8825 #define COUNTOF(array) (sizeof(array) / sizeof(array[0]))
8828 * Translate CSR code to string
8830 static char *iwn_get_csr_string(int csr)
8833 IWN_DESC(IWN_HW_IF_CONFIG);
8834 IWN_DESC(IWN_INT_COALESCING);
8836 IWN_DESC(IWN_INT_MASK);
8837 IWN_DESC(IWN_FH_INT);
8838 IWN_DESC(IWN_GPIO_IN);
8839 IWN_DESC(IWN_RESET);
8840 IWN_DESC(IWN_GP_CNTRL);
8841 IWN_DESC(IWN_HW_REV);
8842 IWN_DESC(IWN_EEPROM);
8843 IWN_DESC(IWN_EEPROM_GP);
8844 IWN_DESC(IWN_OTP_GP);
8846 IWN_DESC(IWN_GP_UCODE);
8847 IWN_DESC(IWN_GP_DRIVER);
8848 IWN_DESC(IWN_UCODE_GP1);
8849 IWN_DESC(IWN_UCODE_GP2);
8851 IWN_DESC(IWN_DRAM_INT_TBL);
8852 IWN_DESC(IWN_GIO_CHICKEN);
8853 IWN_DESC(IWN_ANA_PLL);
8854 IWN_DESC(IWN_HW_REV_WA);
8855 IWN_DESC(IWN_DBG_HPET_MEM);
8857 return "UNKNOWN CSR";
8862 * This function print firmware register
8865 iwn_debug_register(struct iwn_softc *sc)
8868 static const uint32_t csr_tbl[] = {
8893 DPRINTF(sc, IWN_DEBUG_REGISTER,
8894 "CSR values: (2nd byte of IWN_INT_COALESCING is IWN_INT_PERIODIC)%s",
8896 for (i = 0; i < COUNTOF(csr_tbl); i++){
8897 DPRINTF(sc, IWN_DEBUG_REGISTER," %10s: 0x%08x ",
8898 iwn_get_csr_string(csr_tbl[i]), IWN_READ(sc, csr_tbl[i]));
8900 DPRINTF(sc, IWN_DEBUG_REGISTER,"%s","\n");
8902 DPRINTF(sc, IWN_DEBUG_REGISTER,"%s","\n");