1 /******************************************************************************
2 SPDX-License-Identifier: BSD-3-Clause
4 Copyright (c) 2001-2017, Intel Corporation
7 Redistribution and use in source and binary forms, with or without
8 modification, are permitted provided that the following conditions are met:
10 1. Redistributions of source code must retain the above copyright notice,
11 this list of conditions and the following disclaimer.
13 2. Redistributions in binary form must reproduce the above copyright
14 notice, this list of conditions and the following disclaimer in the
15 documentation and/or other materials provided with the distribution.
17 3. Neither the name of the Intel Corporation nor the names of its
18 contributors may be used to endorse or promote products derived from
19 this software without specific prior written permission.
21 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
25 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 POSSIBILITY OF SUCH DAMAGE.
33 ******************************************************************************/
41 #include <sys/param.h>
42 #include <sys/systm.h>
43 #include <sys/buf_ring.h>
45 #include <sys/protosw.h>
46 #include <sys/socket.h>
47 #include <sys/malloc.h>
48 #include <sys/kernel.h>
49 #include <sys/module.h>
50 #include <sys/sockio.h>
51 #include <sys/eventhandler.h>
54 #include <net/if_var.h>
55 #include <net/if_arp.h>
57 #include <net/ethernet.h>
58 #include <net/if_dl.h>
59 #include <net/if_media.h>
61 #include <net/if_types.h>
62 #include <net/if_vlan_var.h>
63 #include <net/iflib.h>
65 #include <netinet/in_systm.h>
66 #include <netinet/in.h>
67 #include <netinet/if_ether.h>
70 #include <machine/bus.h>
72 #include <machine/resource.h>
75 #include <machine/clock.h>
76 #include <dev/pci/pcivar.h>
77 #include <dev/pci/pcireg.h>
79 #include <sys/sysctl.h>
80 #include <sys/endian.h>
81 #include <sys/gtaskqueue.h>
84 #include <machine/smp.h>
87 #include "ixgbe_api.h"
88 #include "ixgbe_common.h"
89 #include "ixgbe_phy.h"
91 #include "ixgbe_features.h"
96 * TxDescriptors Valid Range: 64-4096 Default Value: 256 This value is the
97 * number of transmit descriptors allocated by the driver. Increasing this
98 * value allows the driver to queue more transmits. Each descriptor is 16
99 * bytes. Performance tests have show the 2K value to be optimal for top
102 #define DEFAULT_TXD 2048
103 #define PERFORM_TXD 2048
108 * RxDescriptors Valid Range: 64-4096 Default Value: 256 This value is the
109 * number of receive descriptors allocated for each RX queue. Increasing this
110 * value allows the driver to buffer more incoming packets. Each descriptor
111 * is 16 bytes. A receive buffer is also allocated for each descriptor.
113 * Note: with 8 rings and a dual port card, it is possible to bump up
114 * against the system mbuf pool limit, you can tune nmbclusters
115 * to adjust for this.
117 #define DEFAULT_RXD 2048
118 #define PERFORM_RXD 2048
122 /* Alignment for rings */
123 #define DBA_ALIGN 128
126 * This is the max watchdog interval, ie. the time that can
127 * pass between any two TX clean operations, such only happening
128 * when the TX hardware is functioning.
130 #define IXGBE_WATCHDOG (10 * hz)
133 * This parameters control when the driver calls the routine to reclaim
134 * transmit descriptors.
136 #define IXGBE_TX_CLEANUP_THRESHOLD(_a) ((_a)->num_tx_desc / 8)
137 #define IXGBE_TX_OP_THRESHOLD(_a) ((_a)->num_tx_desc / 32)
139 /* These defines are used in MTU calculations */
140 #define IXGBE_MAX_FRAME_SIZE 9728
141 #define IXGBE_MTU_HDR (ETHER_HDR_LEN + ETHER_CRC_LEN)
142 #define IXGBE_MTU_HDR_VLAN (ETHER_HDR_LEN + ETHER_CRC_LEN + \
143 ETHER_VLAN_ENCAP_LEN)
144 #define IXGBE_MAX_MTU (IXGBE_MAX_FRAME_SIZE - IXGBE_MTU_HDR)
145 #define IXGBE_MAX_MTU_VLAN (IXGBE_MAX_FRAME_SIZE - IXGBE_MTU_HDR_VLAN)
147 /* Flow control constants */
148 #define IXGBE_FC_PAUSE 0xFFFF
149 #define IXGBE_FC_HI 0x20000
150 #define IXGBE_FC_LO 0x10000
153 * Used for optimizing small rx mbufs. Effort is made to keep the copy
154 * small and aligned for the CPU L1 cache.
156 * MHLEN is typically 168 bytes, giving us 8-byte alignment. Getting
157 * 32 byte alignment needed for the fast bcopy results in 8 bytes being
158 * wasted. Getting 64 byte alignment, which _should_ be ideal for
159 * modern Intel CPUs, results in 40 bytes wasted and a significant drop
160 * in observed efficiency of the optimization, 97.9% -> 81.8%.
162 #if __FreeBSD_version < 1002000
163 #define MPKTHSIZE (sizeof(struct m_hdr) + sizeof(struct pkthdr))
165 #define IXGBE_RX_COPY_HDR_PADDED ((((MPKTHSIZE - 1) / 32) + 1) * 32)
166 #define IXGBE_RX_COPY_LEN (MSIZE - IXGBE_RX_COPY_HDR_PADDED)
167 #define IXGBE_RX_COPY_ALIGN (IXGBE_RX_COPY_HDR_PADDED - MPKTHSIZE)
169 /* Keep older OS drivers building... */
170 #if !defined(SYSCTL_ADD_UQUAD)
171 #define SYSCTL_ADD_UQUAD SYSCTL_ADD_QUAD
174 /* Defines for printing debug information */
176 #define DEBUG_IOCTL 0
179 #define INIT_DEBUGOUT(S) if (DEBUG_INIT) printf(S "\n")
180 #define INIT_DEBUGOUT1(S, A) if (DEBUG_INIT) printf(S "\n", A)
181 #define INIT_DEBUGOUT2(S, A, B) if (DEBUG_INIT) printf(S "\n", A, B)
182 #define IOCTL_DEBUGOUT(S) if (DEBUG_IOCTL) printf(S "\n")
183 #define IOCTL_DEBUGOUT1(S, A) if (DEBUG_IOCTL) printf(S "\n", A)
184 #define IOCTL_DEBUGOUT2(S, A, B) if (DEBUG_IOCTL) printf(S "\n", A, B)
185 #define HW_DEBUGOUT(S) if (DEBUG_HW) printf(S "\n")
186 #define HW_DEBUGOUT1(S, A) if (DEBUG_HW) printf(S "\n", A)
187 #define HW_DEBUGOUT2(S, A, B) if (DEBUG_HW) printf(S "\n", A, B)
189 #define MAX_NUM_MULTICAST_ADDRESSES 128
190 #define IXGBE_82598_SCATTER 100
191 #define IXGBE_82599_SCATTER 32
192 #define IXGBE_TSO_SIZE 262140
193 #define IXGBE_RX_HDR 128
194 #define IXGBE_VFTA_SIZE 128
195 #define IXGBE_BR_SIZE 4096
196 #define IXGBE_QUEUE_MIN_FREE 32
197 #define IXGBE_MAX_TX_BUSY 10
198 #define IXGBE_QUEUE_HUNG 0x80000000
200 #define IXGBE_EITR_DEFAULT 128
202 /* Supported offload bits in mbuf flag */
203 #if __FreeBSD_version >= 1000000
204 #define CSUM_OFFLOAD (CSUM_IP_TSO|CSUM_IP6_TSO|CSUM_IP| \
205 CSUM_IP_UDP|CSUM_IP_TCP|CSUM_IP_SCTP| \
206 CSUM_IP6_UDP|CSUM_IP6_TCP|CSUM_IP6_SCTP)
207 #elif __FreeBSD_version >= 800000
208 #define CSUM_OFFLOAD (CSUM_IP|CSUM_TCP|CSUM_UDP|CSUM_SCTP)
210 #define CSUM_OFFLOAD (CSUM_IP|CSUM_TCP|CSUM_UDP)
213 #define IXGBE_CAPS (IFCAP_HWCSUM | IFCAP_HWCSUM_IPV6 | IFCAP_TSO | \
214 IFCAP_LRO | IFCAP_VLAN_HWTAGGING | IFCAP_VLAN_HWTSO | \
215 IFCAP_VLAN_HWCSUM | IFCAP_JUMBO_MTU | IFCAP_VLAN_MTU | \
216 IFCAP_VLAN_HWFILTER | IFCAP_WOL)
218 /* Backward compatibility items for very old versions */
220 #define pci_find_cap pci_find_extcap
223 #ifndef DEVMETHOD_END
224 #define DEVMETHOD_END { NULL, NULL }
228 * Interrupt Moderation parameters
230 #define IXGBE_LOW_LATENCY 128
231 #define IXGBE_AVE_LATENCY 400
232 #define IXGBE_BULK_LATENCY 1200
234 /* Using 1FF (the max value), the interval is ~1.05ms */
235 #define IXGBE_LINK_ITR_QUANTA 0x1FF
236 #define IXGBE_LINK_ITR ((IXGBE_LINK_ITR_QUANTA << 3) & \
237 IXGBE_EITR_ITR_INT_MASK)
240 /************************************************************************
243 * Contains the list of Subvendor/Subdevice IDs on
244 * which the driver should load.
245 ************************************************************************/
246 typedef struct _ixgbe_vendor_info_t {
247 unsigned int vendor_id;
248 unsigned int device_id;
249 unsigned int subvendor_id;
250 unsigned int subdevice_id;
252 } ixgbe_vendor_info_t;
254 struct ixgbe_bp_data {
263 struct ixgbe_dma_alloc {
264 bus_addr_t dma_paddr;
266 bus_dma_tag_t dma_tag;
267 bus_dmamap_t dma_map;
268 bus_dma_segment_t dma_seg;
273 struct ixgbe_mc_addr {
274 u8 addr[IXGBE_ETH_LENGTH_OF_ADDRESS];
279 * The transmit ring, one per queue
282 struct adapter *adapter;
283 union ixgbe_adv_tx_desc *tx_base;
289 qidx_t tx_cidx_processed;
296 u32 bytes; /* used for AIM */
305 * The Receive ring, one per rx queue
308 struct ix_rx_queue *que;
309 struct adapter *adapter;
312 union ixgbe_adv_rx_desc *rx_base;
318 u32 bytes; /* Used for AIM calc */
334 * Driver queue struct: this is the interrupt container
335 * for the associated tx and rx ring.
338 struct adapter *adapter;
339 u32 msix; /* This queue's MSIX vector */
341 struct resource *res;
345 struct if_irq que_irq;
350 struct adapter *adapter;
351 u32 msix; /* This queue's MSIX vector */
355 #define IXGBE_MAX_VF_MC 30 /* Max number of multicast entries */
360 u_int maximum_frame_size;
362 uint8_t ether_addr[ETHER_ADDR_LEN];
363 uint16_t mc_hash[IXGBE_MAX_VF_MC];
364 uint16_t num_mc_hashes;
365 uint16_t default_vlan;
370 /* Our adapter structure */
373 struct ixgbe_osdep osdep;
375 if_softc_ctx_t shared;
376 #define num_tx_queues shared->isc_ntxqsets
377 #define num_rx_queues shared->isc_nrxqsets
378 #define max_frame_size shared->isc_max_frame_size
379 #define intr_type shared->isc_intr
384 struct resource *pci_mem;
387 * Interrupt resources: this set is
388 * either used for legacy, or for Link
393 struct resource *res;
395 struct ifmedia *media;
402 * Shadow VFTA table, this is needed because
403 * the real vlan filter table gets cleared during
404 * a soft reset and the driver needs to be able
407 u32 shadow_vfta[IXGBE_VFTA_SIZE];
409 /* Info about the interface */
410 int advertise; /* link speeds */
419 /* Power management-related */
423 /* Mbuf cluster size */
426 /* Support for pluggable optics */
436 * This is the irq holder, it has
437 * and RX/TX pair or rings associated
440 struct ix_tx_queue *tx_queues;
441 struct ix_rx_queue *rx_queues;
443 /* Multicast array memory */
444 struct ixgbe_mc_addr *mta;
450 struct ixgbe_vf *vfs;
453 struct ixgbe_bp_data bypass;
455 /* Misc stats maintained by the driver */
456 unsigned long dropped_pkts;
457 unsigned long mbuf_header_failed;
458 unsigned long mbuf_packet_failed;
459 unsigned long watchdog_events;
460 unsigned long link_irq;
462 struct ixgbe_hw_stats pf;
463 struct ixgbevf_hw_stats vf;
465 #if __FreeBSD_version >= 1100036
466 /* counter(9) stats */
478 /* Feature capable/enabled flags. See ixgbe_features.h */
483 /* Precision Time Sync (IEEE 1588) defines */
484 #define ETHERTYPE_IEEE1588 0x88F7
485 #define PICOSECS_PER_TICK 20833
486 #define TSYNC_UDP_PORT 319 /* UDP port for the protocol */
487 #define IXGBE_ADVTXD_TSTAMP 0x00080000
489 /* For backward compatibility */
490 #if !defined(PCIER_LINK_STA)
491 #define PCIER_LINK_STA PCIR_EXPRESS_LINK_STA
495 #if __FreeBSD_version >= 1100036
496 #define IXGBE_SET_IPACKETS(sc, count) (sc)->ipackets = (count)
497 #define IXGBE_SET_IERRORS(sc, count) (sc)->ierrors = (count)
498 #define IXGBE_SET_OPACKETS(sc, count) (sc)->opackets = (count)
499 #define IXGBE_SET_OERRORS(sc, count) (sc)->oerrors = (count)
500 #define IXGBE_SET_COLLISIONS(sc, count)
501 #define IXGBE_SET_IBYTES(sc, count) (sc)->ibytes = (count)
502 #define IXGBE_SET_OBYTES(sc, count) (sc)->obytes = (count)
503 #define IXGBE_SET_IMCASTS(sc, count) (sc)->imcasts = (count)
504 #define IXGBE_SET_OMCASTS(sc, count) (sc)->omcasts = (count)
505 #define IXGBE_SET_IQDROPS(sc, count) (sc)->iqdrops = (count)
507 #define IXGBE_SET_IPACKETS(sc, count) (sc)->ifp->if_ipackets = (count)
508 #define IXGBE_SET_IERRORS(sc, count) (sc)->ifp->if_ierrors = (count)
509 #define IXGBE_SET_OPACKETS(sc, count) (sc)->ifp->if_opackets = (count)
510 #define IXGBE_SET_OERRORS(sc, count) (sc)->ifp->if_oerrors = (count)
511 #define IXGBE_SET_COLLISIONS(sc, count) (sc)->ifp->if_collisions = (count)
512 #define IXGBE_SET_IBYTES(sc, count) (sc)->ifp->if_ibytes = (count)
513 #define IXGBE_SET_OBYTES(sc, count) (sc)->ifp->if_obytes = (count)
514 #define IXGBE_SET_IMCASTS(sc, count) (sc)->ifp->if_imcasts = (count)
515 #define IXGBE_SET_OMCASTS(sc, count) (sc)->ifp->if_omcasts = (count)
516 #define IXGBE_SET_IQDROPS(sc, count) (sc)->ifp->if_iqdrops = (count)
519 /* External PHY register addresses */
520 #define IXGBE_PHY_CURRENT_TEMP 0xC820
521 #define IXGBE_PHY_OVERTEMP_STATUS 0xC830
523 /* Sysctl help messages; displayed with sysctl -d */
524 #define IXGBE_SYSCTL_DESC_ADV_SPEED \
525 "\nControl advertised link speed using these flags:\n" \
526 "\t0x1 - advertise 100M\n" \
527 "\t0x2 - advertise 1G\n" \
528 "\t0x4 - advertise 10G\n" \
529 "\t0x8 - advertise 10M\n\n" \
530 "\t100M and 10M are only supported on certain adapters.\n"
532 #define IXGBE_SYSCTL_DESC_SET_FC \
533 "\nSet flow control mode using these values:\n" \
537 "\t3 - tx and rx pause"
539 /* Workaround to make 8.0 buildable */
540 #if __FreeBSD_version >= 800000 && __FreeBSD_version < 800504
542 drbr_needs_enqueue(struct ifnet *ifp, struct buf_ring *br)
545 if (ALTQ_IS_ENABLED(&ifp->if_snd))
548 return (!buf_ring_empty(br));
553 * This checks for a zero mac addr, something that will be likely
554 * unless the Admin on the Host has created one.
557 ixv_check_ether_addr(u8 *addr)
561 if ((addr[0] == 0 && addr[1]== 0 && addr[2] == 0 &&
562 addr[3] == 0 && addr[4]== 0 && addr[5] == 0))
568 /* Shared Prototypes */
570 int ixgbe_allocate_queues(struct adapter *);
571 int ixgbe_setup_transmit_structures(struct adapter *);
572 void ixgbe_free_transmit_structures(struct adapter *);
573 int ixgbe_setup_receive_structures(struct adapter *);
574 void ixgbe_free_receive_structures(struct adapter *);
575 int ixgbe_get_regs(SYSCTL_HANDLER_ARGS);
577 #include "ixgbe_bypass.h"
578 #include "ixgbe_fdir.h"
579 #include "ixgbe_rss.h"
581 #endif /* _IXGBE_H_ */