1 /******************************************************************************
3 Copyright (c) 2001-2015, Intel Corporation
6 Redistribution and use in source and binary forms, with or without
7 modification, are permitted provided that the following conditions are met:
9 1. Redistributions of source code must retain the above copyright notice,
10 this list of conditions and the following disclaimer.
12 2. Redistributions in binary form must reproduce the above copyright
13 notice, this list of conditions and the following disclaimer in the
14 documentation and/or other materials provided with the distribution.
16 3. Neither the name of the Intel Corporation nor the names of its
17 contributors may be used to endorse or promote products derived from
18 this software without specific prior written permission.
20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 POSSIBILITY OF SUCH DAMAGE.
32 ******************************************************************************/
40 #include <sys/param.h>
41 #include <sys/systm.h>
42 #ifndef IXGBE_LEGACY_TX
43 #include <sys/buf_ring.h>
46 #include <sys/protosw.h>
47 #include <sys/socket.h>
48 #include <sys/malloc.h>
49 #include <sys/kernel.h>
50 #include <sys/module.h>
51 #include <sys/sockio.h>
52 #include <sys/eventhandler.h>
55 #include <net/if_var.h>
56 #include <net/if_arp.h>
58 #include <net/ethernet.h>
59 #include <net/if_dl.h>
60 #include <net/if_media.h>
63 #include <net/if_types.h>
64 #include <net/if_vlan_var.h>
66 #include <netinet/in_systm.h>
67 #include <netinet/in.h>
68 #include <netinet/if_ether.h>
69 #include <netinet/ip.h>
70 #include <netinet/ip6.h>
71 #include <netinet/tcp.h>
72 #include <netinet/tcp_lro.h>
73 #include <netinet/udp.h>
75 #include <machine/in_cksum.h>
78 #include <machine/bus.h>
80 #include <machine/resource.h>
83 #include <machine/clock.h>
84 #include <dev/pci/pcivar.h>
85 #include <dev/pci/pcireg.h>
87 #include <sys/sysctl.h>
88 #include <sys/endian.h>
89 #include <sys/taskqueue.h>
92 #include <machine/smp.h>
97 #include <sys/iov_schema.h>
98 #include <dev/pci/pci_iov.h>
101 #include "ixgbe_api.h"
102 #include "ixgbe_common.h"
103 #include "ixgbe_phy.h"
104 #include "ixgbe_vf.h"
107 #include "ixgbe_common.h"
108 #include "ixgbe_mbx.h"
114 * TxDescriptors Valid Range: 64-4096 Default Value: 256 This value is the
115 * number of transmit descriptors allocated by the driver. Increasing this
116 * value allows the driver to queue more transmits. Each descriptor is 16
117 * bytes. Performance tests have show the 2K value to be optimal for top
120 #define DEFAULT_TXD 1024
121 #define PERFORM_TXD 2048
126 * RxDescriptors Valid Range: 64-4096 Default Value: 256 This value is the
127 * number of receive descriptors allocated for each RX queue. Increasing this
128 * value allows the driver to buffer more incoming packets. Each descriptor
129 * is 16 bytes. A receive buffer is also allocated for each descriptor.
131 * Note: with 8 rings and a dual port card, it is possible to bump up
132 * against the system mbuf pool limit, you can tune nmbclusters
133 * to adjust for this.
135 #define DEFAULT_RXD 1024
136 #define PERFORM_RXD 2048
140 /* Alignment for rings */
141 #define DBA_ALIGN 128
144 * This is the max watchdog interval, ie. the time that can
145 * pass between any two TX clean operations, such only happening
146 * when the TX hardware is functioning.
148 #define IXGBE_WATCHDOG (10 * hz)
151 * This parameters control when the driver calls the routine to reclaim
152 * transmit descriptors.
154 #define IXGBE_TX_CLEANUP_THRESHOLD (adapter->num_tx_desc / 8)
155 #define IXGBE_TX_OP_THRESHOLD (adapter->num_tx_desc / 32)
157 /* These defines are used in MTU calculations */
158 #define IXGBE_MAX_FRAME_SIZE 9728
159 #define IXGBE_MTU_HDR (ETHER_HDR_LEN + ETHER_CRC_LEN)
160 #define IXGBE_MTU_HDR_VLAN (ETHER_HDR_LEN + ETHER_CRC_LEN + \
161 ETHER_VLAN_ENCAP_LEN)
162 #define IXGBE_MAX_MTU (IXGBE_MAX_FRAME_SIZE - IXGBE_MTU_HDR)
163 #define IXGBE_MAX_MTU_VLAN (IXGBE_MAX_FRAME_SIZE - IXGBE_MTU_HDR_VLAN)
165 /* Flow control constants */
166 #define IXGBE_FC_PAUSE 0xFFFF
167 #define IXGBE_FC_HI 0x20000
168 #define IXGBE_FC_LO 0x10000
171 * Used for optimizing small rx mbufs. Effort is made to keep the copy
172 * small and aligned for the CPU L1 cache.
174 * MHLEN is typically 168 bytes, giving us 8-byte alignment. Getting
175 * 32 byte alignment needed for the fast bcopy results in 8 bytes being
176 * wasted. Getting 64 byte alignment, which _should_ be ideal for
177 * modern Intel CPUs, results in 40 bytes wasted and a significant drop
178 * in observed efficiency of the optimization, 97.9% -> 81.8%.
180 #if __FreeBSD_version < 1002000
181 #define MPKTHSIZE (sizeof(struct m_hdr) + sizeof(struct pkthdr))
183 #define IXGBE_RX_COPY_HDR_PADDED ((((MPKTHSIZE - 1) / 32) + 1) * 32)
184 #define IXGBE_RX_COPY_LEN (MSIZE - IXGBE_RX_COPY_HDR_PADDED)
185 #define IXGBE_RX_COPY_ALIGN (IXGBE_RX_COPY_HDR_PADDED - MPKTHSIZE)
187 /* Keep older OS drivers building... */
188 #if !defined(SYSCTL_ADD_UQUAD)
189 #define SYSCTL_ADD_UQUAD SYSCTL_ADD_QUAD
192 /* Defines for printing debug information */
194 #define DEBUG_IOCTL 0
197 #define INIT_DEBUGOUT(S) if (DEBUG_INIT) printf(S "\n")
198 #define INIT_DEBUGOUT1(S, A) if (DEBUG_INIT) printf(S "\n", A)
199 #define INIT_DEBUGOUT2(S, A, B) if (DEBUG_INIT) printf(S "\n", A, B)
200 #define IOCTL_DEBUGOUT(S) if (DEBUG_IOCTL) printf(S "\n")
201 #define IOCTL_DEBUGOUT1(S, A) if (DEBUG_IOCTL) printf(S "\n", A)
202 #define IOCTL_DEBUGOUT2(S, A, B) if (DEBUG_IOCTL) printf(S "\n", A, B)
203 #define HW_DEBUGOUT(S) if (DEBUG_HW) printf(S "\n")
204 #define HW_DEBUGOUT1(S, A) if (DEBUG_HW) printf(S "\n", A)
205 #define HW_DEBUGOUT2(S, A, B) if (DEBUG_HW) printf(S "\n", A, B)
207 #define MAX_NUM_MULTICAST_ADDRESSES 128
208 #define IXGBE_82598_SCATTER 100
209 #define IXGBE_82599_SCATTER 32
210 #define MSIX_82598_BAR 3
211 #define MSIX_82599_BAR 4
212 #define IXGBE_TSO_SIZE 262140
213 #define IXGBE_RX_HDR 128
214 #define IXGBE_VFTA_SIZE 128
215 #define IXGBE_BR_SIZE 4096
216 #define IXGBE_QUEUE_MIN_FREE 32
217 #define IXGBE_MAX_TX_BUSY 10
218 #define IXGBE_QUEUE_HUNG 0x80000000
220 #define IXV_EITR_DEFAULT 128
222 /* Supported offload bits in mbuf flag */
223 #if __FreeBSD_version >= 1000000
224 #define CSUM_OFFLOAD (CSUM_IP_TSO|CSUM_IP6_TSO|CSUM_IP| \
225 CSUM_IP_UDP|CSUM_IP_TCP|CSUM_IP_SCTP| \
226 CSUM_IP6_UDP|CSUM_IP6_TCP|CSUM_IP6_SCTP)
227 #elif __FreeBSD_version >= 800000
228 #define CSUM_OFFLOAD (CSUM_IP|CSUM_TCP|CSUM_UDP|CSUM_SCTP)
230 #define CSUM_OFFLOAD (CSUM_IP|CSUM_TCP|CSUM_UDP)
233 /* Backward compatibility items for very old versions */
235 #define pci_find_cap pci_find_extcap
238 #ifndef DEVMETHOD_END
239 #define DEVMETHOD_END { NULL, NULL }
243 * Interrupt Moderation parameters
245 #define IXGBE_LOW_LATENCY 128
246 #define IXGBE_AVE_LATENCY 400
247 #define IXGBE_BULK_LATENCY 1200
249 /* Using 1FF (the max value), the interval is ~1.05ms */
250 #define IXGBE_LINK_ITR_QUANTA 0x1FF
251 #define IXGBE_LINK_ITR ((IXGBE_LINK_ITR_QUANTA << 3) & \
252 IXGBE_EITR_ITR_INT_MASK)
254 /* MAC type macros */
255 #define IXGBE_IS_X550VF(_adapter) \
256 ((_adapter->hw.mac.type == ixgbe_mac_X550_vf) || \
257 (_adapter->hw.mac.type == ixgbe_mac_X550EM_x_vf))
259 #define IXGBE_IS_VF(_adapter) \
260 (IXGBE_IS_X550VF(_adapter) || \
261 (_adapter->hw.mac.type == ixgbe_mac_X540_vf) || \
262 (_adapter->hw.mac.type == ixgbe_mac_82599_vf))
265 #define IXGBE_VF_INDEX(vmdq) ((vmdq) / 32)
266 #define IXGBE_VF_BIT(vmdq) (1 << ((vmdq) % 32))
268 #define IXGBE_VT_MSG_MASK 0xFFFF
270 #define IXGBE_VT_MSGINFO(msg) \
271 (((msg) & IXGBE_VT_MSGINFO_MASK) >> IXGBE_VT_MSGINFO_SHIFT)
273 #define IXGBE_VF_GET_QUEUES_RESP_LEN 5
275 #define IXGBE_API_VER_1_0 0
276 #define IXGBE_API_VER_2_0 1 /* Solaris API. Not supported. */
277 #define IXGBE_API_VER_1_1 2
278 #define IXGBE_API_VER_UNKNOWN UINT16_MAX
280 enum ixgbe_iov_mode {
289 *****************************************************************************
292 * This array contains the list of Subvendor/Subdevice IDs on which the driver
295 *****************************************************************************
297 typedef struct _ixgbe_vendor_info_t {
298 unsigned int vendor_id;
299 unsigned int device_id;
300 unsigned int subvendor_id;
301 unsigned int subdevice_id;
303 } ixgbe_vendor_info_t;
306 struct ixgbe_tx_buf {
307 union ixgbe_adv_tx_desc *eop;
312 struct ixgbe_rx_buf {
317 #define IXGBE_RX_COPY 0x01
322 * Bus dma allocation structure used by ixgbe_dma_malloc and ixgbe_dma_free.
324 struct ixgbe_dma_alloc {
325 bus_addr_t dma_paddr;
327 bus_dma_tag_t dma_tag;
328 bus_dmamap_t dma_map;
329 bus_dma_segment_t dma_seg;
334 struct ixgbe_mc_addr {
335 u8 addr[IXGBE_ETH_LENGTH_OF_ADDRESS];
340 ** Driver queue struct: this is the interrupt container
341 ** for the associated tx and rx ring.
344 struct adapter *adapter;
345 u32 msix; /* This queue's MSIX vector */
346 u32 eims; /* This queue's EIMS bit */
349 struct resource *res;
354 struct task que_task;
355 struct taskqueue *tq;
360 * The transmit ring, one per queue
363 struct adapter *adapter;
368 union ixgbe_adv_tx_desc *tx_base;
369 struct ixgbe_tx_buf *tx_buffers;
370 struct ixgbe_dma_alloc txdma;
371 volatile u16 tx_avail;
378 #ifndef IXGBE_LEGACY_TX
380 struct task txq_task;
386 u32 bytes; /* used for AIM */
389 unsigned long tso_tx;
390 unsigned long no_tx_map_avail;
391 unsigned long no_tx_dma_setup;
398 * The Receive ring, one per rx queue
401 struct adapter *adapter;
405 union ixgbe_adv_rx_desc *rx_base;
406 struct ixgbe_dma_alloc rxdma;
416 struct ixgbe_rx_buf *rx_buffers;
419 u32 bytes; /* Used for AIM calc */
435 #define IXGBE_VF_CTS (1 << 0) /* VF is clear to send. */
436 #define IXGBE_VF_CAP_MAC (1 << 1) /* VF is permitted to change MAC. */
437 #define IXGBE_VF_CAP_VLAN (1 << 2) /* VF is permitted to join vlans. */
438 #define IXGBE_VF_ACTIVE (1 << 3) /* VF is active. */
440 #define IXGBE_MAX_VF_MC 30 /* Max number of multicast entries */
445 u_int max_frame_size;
447 uint8_t ether_addr[ETHER_ADDR_LEN];
448 uint16_t mc_hash[IXGBE_MAX_VF_MC];
449 uint16_t num_mc_hashes;
450 uint16_t default_vlan;
456 /* Our adapter structure */
459 struct ixgbe_osdep osdep;
464 struct resource *pci_mem;
465 struct resource *msix_mem;
468 * Interrupt resources: this set is
469 * either used for legacy, or for Link
473 struct resource *res;
475 struct ifmedia media;
476 struct callout timer;
482 eventhandler_tag vlan_attach;
483 eventhandler_tag vlan_detach;
489 ** Shadow VFTA table, this is needed because
490 ** the real vlan filter table gets cleared during
491 ** a soft reset and the driver needs to be able
494 u32 shadow_vfta[IXGBE_VFTA_SIZE];
496 /* Info about the interface */
498 u32 fc; /* local flow ctrl setting */
499 int advertise; /* link speeds */
500 bool enable_aim; /* adaptive interrupt moderation */
511 /* Power management-related */
515 /* Mbuf cluster size */
518 /* Support for pluggable optics */
520 struct task link_task; /* Link tasklet */
521 struct task mod_task; /* SFP tasklet */
522 struct task msf_task; /* Multispeed Fiber */
524 struct task mbx_task; /* VF -> PF mailbox interrupt */
528 struct task fdir_task;
530 struct task phy_task; /* PHY intr tasklet */
531 struct taskqueue *tq;
535 ** This is the irq holder, it has
536 ** and RX/TX pair or rings associated
539 struct ix_queue *queues;
543 * Allocated at run time, an array of rings.
545 struct tx_ring *tx_rings;
547 u32 tx_process_limit;
551 * Allocated at run time, an array of rings.
553 struct rx_ring *rx_rings;
556 u32 rx_process_limit;
558 /* Multicast array memory */
559 struct ixgbe_mc_addr *mta;
563 struct ixgbe_vf *vfs;
566 void (*init_locked)(struct adapter *);
567 void (*stop_locked)(void *);
570 /* Misc stats maintained by the driver */
571 unsigned long dropped_pkts;
572 unsigned long mbuf_defrag_failed;
573 unsigned long mbuf_header_failed;
574 unsigned long mbuf_packet_failed;
575 unsigned long watchdog_events;
576 unsigned long link_irq;
578 struct ixgbe_hw_stats pf;
579 struct ixgbevf_hw_stats vf;
581 #if __FreeBSD_version >= 1100036
582 /* counter(9) stats */
597 /* Precision Time Sync (IEEE 1588) defines */
598 #define ETHERTYPE_IEEE1588 0x88F7
599 #define PICOSECS_PER_TICK 20833
600 #define TSYNC_UDP_PORT 319 /* UDP port for the protocol */
601 #define IXGBE_ADVTXD_TSTAMP 0x00080000
604 #define IXGBE_CORE_LOCK_INIT(_sc, _name) \
605 mtx_init(&(_sc)->core_mtx, _name, "IXGBE Core Lock", MTX_DEF)
606 #define IXGBE_CORE_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->core_mtx)
607 #define IXGBE_TX_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->tx_mtx)
608 #define IXGBE_RX_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->rx_mtx)
609 #define IXGBE_CORE_LOCK(_sc) mtx_lock(&(_sc)->core_mtx)
610 #define IXGBE_TX_LOCK(_sc) mtx_lock(&(_sc)->tx_mtx)
611 #define IXGBE_TX_TRYLOCK(_sc) mtx_trylock(&(_sc)->tx_mtx)
612 #define IXGBE_RX_LOCK(_sc) mtx_lock(&(_sc)->rx_mtx)
613 #define IXGBE_CORE_UNLOCK(_sc) mtx_unlock(&(_sc)->core_mtx)
614 #define IXGBE_TX_UNLOCK(_sc) mtx_unlock(&(_sc)->tx_mtx)
615 #define IXGBE_RX_UNLOCK(_sc) mtx_unlock(&(_sc)->rx_mtx)
616 #define IXGBE_CORE_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->core_mtx, MA_OWNED)
617 #define IXGBE_TX_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->tx_mtx, MA_OWNED)
619 /* For backward compatibility */
620 #if !defined(PCIER_LINK_STA)
621 #define PCIER_LINK_STA PCIR_EXPRESS_LINK_STA
625 #if __FreeBSD_version >= 1100036
626 #define IXGBE_SET_IPACKETS(sc, count) (sc)->ipackets = (count)
627 #define IXGBE_SET_IERRORS(sc, count) (sc)->ierrors = (count)
628 #define IXGBE_SET_OPACKETS(sc, count) (sc)->opackets = (count)
629 #define IXGBE_SET_OERRORS(sc, count) (sc)->oerrors = (count)
630 #define IXGBE_SET_COLLISIONS(sc, count)
631 #define IXGBE_SET_IBYTES(sc, count) (sc)->ibytes = (count)
632 #define IXGBE_SET_OBYTES(sc, count) (sc)->obytes = (count)
633 #define IXGBE_SET_IMCASTS(sc, count) (sc)->imcasts = (count)
634 #define IXGBE_SET_OMCASTS(sc, count) (sc)->omcasts = (count)
635 #define IXGBE_SET_IQDROPS(sc, count) (sc)->iqdrops = (count)
637 #define IXGBE_SET_IPACKETS(sc, count) (sc)->ifp->if_ipackets = (count)
638 #define IXGBE_SET_IERRORS(sc, count) (sc)->ifp->if_ierrors = (count)
639 #define IXGBE_SET_OPACKETS(sc, count) (sc)->ifp->if_opackets = (count)
640 #define IXGBE_SET_OERRORS(sc, count) (sc)->ifp->if_oerrors = (count)
641 #define IXGBE_SET_COLLISIONS(sc, count) (sc)->ifp->if_collisions = (count)
642 #define IXGBE_SET_IBYTES(sc, count) (sc)->ifp->if_ibytes = (count)
643 #define IXGBE_SET_OBYTES(sc, count) (sc)->ifp->if_obytes = (count)
644 #define IXGBE_SET_IMCASTS(sc, count) (sc)->ifp->if_imcasts = (count)
645 #define IXGBE_SET_OMCASTS(sc, count) (sc)->ifp->if_omcasts = (count)
646 #define IXGBE_SET_IQDROPS(sc, count) (sc)->ifp->if_iqdrops = (count)
649 /* External PHY register addresses */
650 #define IXGBE_PHY_CURRENT_TEMP 0xC820
651 #define IXGBE_PHY_OVERTEMP_STATUS 0xC830
653 /* Sysctl help messages; displayed with sysctl -d */
654 #define IXGBE_SYSCTL_DESC_ADV_SPEED \
655 "\nControl advertised link speed using these flags:\n" \
656 "\t0x1 - advertise 100M\n" \
657 "\t0x2 - advertise 1G\n" \
658 "\t0x4 - advertise 10G\n\n" \
659 "\t100M is only supported on certain 10GBaseT adapters.\n"
661 #define IXGBE_SYSCTL_DESC_SET_FC \
662 "\nSet flow control mode using these values:\n" \
666 "\t3 - tx and rx pause"
669 ixgbe_is_sfp(struct ixgbe_hw *hw)
671 switch (hw->phy.type) {
672 case ixgbe_phy_sfp_avago:
673 case ixgbe_phy_sfp_ftl:
674 case ixgbe_phy_sfp_intel:
675 case ixgbe_phy_sfp_unknown:
676 case ixgbe_phy_sfp_passive_tyco:
677 case ixgbe_phy_sfp_passive_unknown:
678 case ixgbe_phy_qsfp_passive_unknown:
679 case ixgbe_phy_qsfp_active_unknown:
680 case ixgbe_phy_qsfp_intel:
681 case ixgbe_phy_qsfp_unknown:
688 /* Workaround to make 8.0 buildable */
689 #if __FreeBSD_version >= 800000 && __FreeBSD_version < 800504
691 drbr_needs_enqueue(struct ifnet *ifp, struct buf_ring *br)
694 if (ALTQ_IS_ENABLED(&ifp->if_snd))
697 return (!buf_ring_empty(br));
702 ** Find the number of unrefreshed RX descriptors
705 ixgbe_rx_unrefreshed(struct rx_ring *rxr)
707 if (rxr->next_to_check > rxr->next_to_refresh)
708 return (rxr->next_to_check - rxr->next_to_refresh - 1);
710 return ((rxr->num_desc + rxr->next_to_check) -
711 rxr->next_to_refresh - 1);
715 ** This checks for a zero mac addr, something that will be likely
716 ** unless the Admin on the Host has created one.
719 ixv_check_ether_addr(u8 *addr)
723 if ((addr[0] == 0 && addr[1]== 0 && addr[2] == 0 &&
724 addr[3] == 0 && addr[4]== 0 && addr[5] == 0))
729 /* Shared Prototypes */
731 #ifdef IXGBE_LEGACY_TX
732 void ixgbe_start(struct ifnet *);
733 void ixgbe_start_locked(struct tx_ring *, struct ifnet *);
734 #else /* ! IXGBE_LEGACY_TX */
735 int ixgbe_mq_start(struct ifnet *, struct mbuf *);
736 int ixgbe_mq_start_locked(struct ifnet *, struct tx_ring *);
737 void ixgbe_qflush(struct ifnet *);
738 void ixgbe_deferred_mq_start(void *, int);
739 #endif /* IXGBE_LEGACY_TX */
741 int ixgbe_allocate_queues(struct adapter *);
742 int ixgbe_allocate_transmit_buffers(struct tx_ring *);
743 int ixgbe_setup_transmit_structures(struct adapter *);
744 void ixgbe_free_transmit_structures(struct adapter *);
745 int ixgbe_allocate_receive_buffers(struct rx_ring *);
746 int ixgbe_setup_receive_structures(struct adapter *);
747 void ixgbe_free_receive_structures(struct adapter *);
748 void ixgbe_txeof(struct tx_ring *);
749 bool ixgbe_rxeof(struct ix_queue *);
751 int ixgbe_dma_malloc(struct adapter *,
752 bus_size_t, struct ixgbe_dma_alloc *, int);
753 void ixgbe_dma_free(struct adapter *, struct ixgbe_dma_alloc *);
757 static inline boolean_t
758 ixgbe_vf_mac_changed(struct ixgbe_vf *vf, const uint8_t *mac)
760 return (bcmp(mac, vf->ether_addr, ETHER_ADDR_LEN) != 0);
764 ixgbe_send_vf_msg(struct adapter *adapter, struct ixgbe_vf *vf, u32 msg)
767 if (vf->flags & IXGBE_VF_CTS)
768 msg |= IXGBE_VT_MSGTYPE_CTS;
770 ixgbe_write_mbx(&adapter->hw, &msg, 1, vf->pool);
774 ixgbe_send_vf_ack(struct adapter *adapter, struct ixgbe_vf *vf, u32 msg)
776 msg &= IXGBE_VT_MSG_MASK;
777 ixgbe_send_vf_msg(adapter, vf, msg | IXGBE_VT_MSGTYPE_ACK);
781 ixgbe_send_vf_nack(struct adapter *adapter, struct ixgbe_vf *vf, u32 msg)
783 msg &= IXGBE_VT_MSG_MASK;
784 ixgbe_send_vf_msg(adapter, vf, msg | IXGBE_VT_MSGTYPE_NACK);
788 ixgbe_process_vf_ack(struct adapter *adapter, struct ixgbe_vf *vf)
790 if (!(vf->flags & IXGBE_VF_CTS))
791 ixgbe_send_vf_nack(adapter, vf, 0);
794 static inline enum ixgbe_iov_mode
795 ixgbe_get_iov_mode(struct adapter *adapter)
797 if (adapter->num_vfs == 0)
798 return (IXGBE_NO_VM);
799 if (adapter->num_queues <= 2)
800 return (IXGBE_64_VM);
801 else if (adapter->num_queues <= 4)
802 return (IXGBE_32_VM);
804 return (IXGBE_NO_VM);
808 ixgbe_max_vfs(enum ixgbe_iov_mode mode)
811 * We return odd numbers below because we
812 * reserve 1 VM's worth of queues for the PF.
826 ixgbe_vf_queues(enum ixgbe_iov_mode mode)
840 ixgbe_vf_que_index(enum ixgbe_iov_mode mode, u32 vfnum, int num)
842 return ((vfnum * ixgbe_vf_queues(mode)) + num);
846 ixgbe_pf_que_index(enum ixgbe_iov_mode mode, int num)
848 return (ixgbe_vf_que_index(mode, ixgbe_max_vfs(mode), num));
852 ixgbe_update_max_frame(struct adapter * adapter, int max_frame)
854 if (adapter->max_frame_size < max_frame)
855 adapter->max_frame_size = max_frame;
859 ixgbe_get_mrqc(enum ixgbe_iov_mode mode)
864 mrqc = IXGBE_MRQC_VMDQRSS64EN;
867 mrqc = IXGBE_MRQC_VMDQRSS32EN;
873 panic("Unexpected SR-IOV mode %d", mode);
880 ixgbe_get_mtqc(enum ixgbe_iov_mode mode)
885 mtqc |= IXGBE_MTQC_64VF | IXGBE_MTQC_VT_ENA;
888 mtqc |= IXGBE_MTQC_32VF | IXGBE_MTQC_VT_ENA;
891 mtqc = IXGBE_MTQC_64Q_1PB;
894 panic("Unexpected SR-IOV mode %d", mode);
900 #endif /* _IXGBE_H_ */