1 /******************************************************************************
3 Copyright (c) 2001-2013, Intel Corporation
6 Redistribution and use in source and binary forms, with or without
7 modification, are permitted provided that the following conditions are met:
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10 this list of conditions and the following disclaimer.
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13 notice, this list of conditions and the following disclaimer in the
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21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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32 ******************************************************************************/
40 #include <sys/param.h>
41 #include <sys/systm.h>
42 #ifndef IXGBE_LEGACY_TX
43 #include <sys/buf_ring.h>
46 #include <sys/protosw.h>
47 #include <sys/socket.h>
48 #include <sys/malloc.h>
49 #include <sys/kernel.h>
50 #include <sys/module.h>
51 #include <sys/sockio.h>
52 #include <sys/eventhandler.h>
55 #include <net/if_var.h>
56 #include <net/if_arp.h>
58 #include <net/ethernet.h>
59 #include <net/if_dl.h>
60 #include <net/if_media.h>
63 #include <net/if_types.h>
64 #include <net/if_vlan_var.h>
66 #include <netinet/in_systm.h>
67 #include <netinet/in.h>
68 #include <netinet/if_ether.h>
69 #include <netinet/ip.h>
70 #include <netinet/ip6.h>
71 #include <netinet/tcp.h>
72 #include <netinet/tcp_lro.h>
73 #include <netinet/udp.h>
75 #include <machine/in_cksum.h>
78 #include <machine/bus.h>
80 #include <machine/resource.h>
83 #include <machine/clock.h>
84 #include <dev/pci/pcivar.h>
85 #include <dev/pci/pcireg.h>
87 #include <sys/sysctl.h>
88 #include <sys/endian.h>
89 #include <sys/taskqueue.h>
92 #include <machine/smp.h>
94 #include "ixgbe_api.h"
99 * TxDescriptors Valid Range: 64-4096 Default Value: 256 This value is the
100 * number of transmit descriptors allocated by the driver. Increasing this
101 * value allows the driver to queue more transmits. Each descriptor is 16
102 * bytes. Performance tests have show the 2K value to be optimal for top
105 #define DEFAULT_TXD 1024
106 #define PERFORM_TXD 2048
111 * RxDescriptors Valid Range: 64-4096 Default Value: 256 This value is the
112 * number of receive descriptors allocated for each RX queue. Increasing this
113 * value allows the driver to buffer more incoming packets. Each descriptor
114 * is 16 bytes. A receive buffer is also allocated for each descriptor.
116 * Note: with 8 rings and a dual port card, it is possible to bump up
117 * against the system mbuf pool limit, you can tune nmbclusters
118 * to adjust for this.
120 #define DEFAULT_RXD 1024
121 #define PERFORM_RXD 2048
125 /* Alignment for rings */
126 #define DBA_ALIGN 128
129 * This parameter controls the maximum no of times the driver will loop in
130 * the isr. Minimum Value = 1
135 * This is the max watchdog interval, ie. the time that can
136 * pass between any two TX clean operations, such only happening
137 * when the TX hardware is functioning.
139 #define IXGBE_WATCHDOG (10 * hz)
142 * This parameters control when the driver calls the routine to reclaim
143 * transmit descriptors.
145 #define IXGBE_TX_CLEANUP_THRESHOLD (adapter->num_tx_desc / 8)
146 #define IXGBE_TX_OP_THRESHOLD (adapter->num_tx_desc / 32)
148 #define IXGBE_MAX_FRAME_SIZE 0x3F00
150 /* Flow control constants */
151 #define IXGBE_FC_PAUSE 0xFFFF
152 #define IXGBE_FC_HI 0x20000
153 #define IXGBE_FC_LO 0x10000
156 * Used for optimizing small rx mbufs. Effort is made to keep the copy
157 * small and aligned for the CPU L1 cache.
159 * MHLEN is typically 168 bytes, giving us 8-byte alignment. Getting
160 * 32 byte alignment needed for the fast bcopy results in 8 bytes being
161 * wasted. Getting 64 byte alignment, which _should_ be ideal for
162 * modern Intel CPUs, results in 40 bytes wasted and a significant drop
163 * in observed efficiency of the optimization, 97.9% -> 81.8%.
165 #define IXGBE_RX_COPY_HDR_PADDED ((((MPKTHSIZE - 1) / 32) + 1) * 32)
166 #define IXGBE_RX_COPY_LEN (MSIZE - IXGBE_RX_COPY_HDR_PADDED)
167 #define IXGBE_RX_COPY_ALIGN (IXGBE_RX_COPY_HDR_PADDED - MPKTHSIZE)
169 /* Keep older OS drivers building... */
170 #if !defined(SYSCTL_ADD_UQUAD)
171 #define SYSCTL_ADD_UQUAD SYSCTL_ADD_QUAD
174 /* Defines for printing debug information */
176 #define DEBUG_IOCTL 0
179 #define INIT_DEBUGOUT(S) if (DEBUG_INIT) printf(S "\n")
180 #define INIT_DEBUGOUT1(S, A) if (DEBUG_INIT) printf(S "\n", A)
181 #define INIT_DEBUGOUT2(S, A, B) if (DEBUG_INIT) printf(S "\n", A, B)
182 #define IOCTL_DEBUGOUT(S) if (DEBUG_IOCTL) printf(S "\n")
183 #define IOCTL_DEBUGOUT1(S, A) if (DEBUG_IOCTL) printf(S "\n", A)
184 #define IOCTL_DEBUGOUT2(S, A, B) if (DEBUG_IOCTL) printf(S "\n", A, B)
185 #define HW_DEBUGOUT(S) if (DEBUG_HW) printf(S "\n")
186 #define HW_DEBUGOUT1(S, A) if (DEBUG_HW) printf(S "\n", A)
187 #define HW_DEBUGOUT2(S, A, B) if (DEBUG_HW) printf(S "\n", A, B)
189 #define MAX_NUM_MULTICAST_ADDRESSES 128
190 #define IXGBE_82598_SCATTER 100
191 #define IXGBE_82599_SCATTER 32
192 #define MSIX_82598_BAR 3
193 #define MSIX_82599_BAR 4
194 #define IXGBE_TSO_SIZE 262140
195 #define IXGBE_TX_BUFFER_SIZE ((u32) 1514)
196 #define IXGBE_RX_HDR 128
197 #define IXGBE_VFTA_SIZE 128
198 #define IXGBE_BR_SIZE 4096
199 #define IXGBE_QUEUE_MIN_FREE 32
201 /* Offload bits in mbuf flag */
202 #if __FreeBSD_version >= 800000
203 #define CSUM_OFFLOAD (CSUM_IP|CSUM_TCP|CSUM_UDP|CSUM_SCTP)
205 #define CSUM_OFFLOAD (CSUM_IP|CSUM_TCP|CSUM_UDP)
209 * Interrupt Moderation parameters
211 #define IXGBE_LOW_LATENCY 128
212 #define IXGBE_AVE_LATENCY 400
213 #define IXGBE_BULK_LATENCY 1200
214 #define IXGBE_LINK_ITR 2000
218 *****************************************************************************
221 * This array contains the list of Subvendor/Subdevice IDs on which the driver
224 *****************************************************************************
226 typedef struct _ixgbe_vendor_info_t {
227 unsigned int vendor_id;
228 unsigned int device_id;
229 unsigned int subvendor_id;
230 unsigned int subdevice_id;
232 } ixgbe_vendor_info_t;
234 struct ixgbe_tx_buf {
235 union ixgbe_adv_tx_desc *eop;
240 struct ixgbe_rx_buf {
245 #define IXGBE_RX_COPY 0x01
250 * Bus dma allocation structure used by ixgbe_dma_malloc and ixgbe_dma_free.
252 struct ixgbe_dma_alloc {
253 bus_addr_t dma_paddr;
255 bus_dma_tag_t dma_tag;
256 bus_dmamap_t dma_map;
257 bus_dma_segment_t dma_seg;
263 ** Driver queue struct: this is the interrupt container
264 ** for the associated tx and rx ring.
267 struct adapter *adapter;
268 u32 msix; /* This queue's MSIX vector */
269 u32 eims; /* This queue's EIMS bit */
271 struct resource *res;
275 struct task que_task;
276 struct taskqueue *tq;
281 * The transmit ring, one per queue
284 struct adapter *adapter;
288 union ixgbe_adv_tx_desc *tx_base;
289 struct ixgbe_tx_buf *tx_buffers;
290 struct ixgbe_dma_alloc txdma;
291 volatile u16 tx_avail;
304 #ifndef IXGBE_LEGACY_TX
306 struct task txq_task;
312 u32 bytes; /* used for AIM */
315 unsigned long tso_tx;
316 unsigned long no_tx_map_avail;
317 unsigned long no_tx_dma_setup;
324 * The Receive ring, one per rx queue
327 struct adapter *adapter;
330 union ixgbe_adv_rx_desc *rx_base;
331 struct ixgbe_dma_alloc rxdma;
342 struct ixgbe_rx_buf *rx_buffers;
345 u32 bytes; /* Used for AIM calc */
360 /* Our adapter structure */
365 struct ixgbe_osdep osdep;
368 struct resource *pci_mem;
369 struct resource *msix_mem;
372 * Interrupt resources: this set is
373 * either used for legacy, or for Link
377 struct resource *res;
379 struct ifmedia media;
380 struct callout timer;
386 eventhandler_tag vlan_attach;
387 eventhandler_tag vlan_detach;
393 ** Shadow VFTA table, this is needed because
394 ** the real vlan filter table gets cleared during
395 ** a soft reset and the driver needs to be able
398 u32 shadow_vfta[IXGBE_VFTA_SIZE];
400 /* Info about the interface */
402 u32 fc; /* local flow ctrl setting */
403 int advertise; /* link speeds */
411 /* Mbuf cluster size */
414 /* Support for pluggable optics */
416 struct task link_task; /* Link tasklet */
417 struct task mod_task; /* SFP tasklet */
418 struct task msf_task; /* Multispeed Fiber */
421 struct task fdir_task;
423 struct taskqueue *tq;
427 ** This is the irq holder, it has
428 ** and RX/TX pair or rings associated
431 struct ix_queue *queues;
435 * Allocated at run time, an array of rings.
437 struct tx_ring *tx_rings;
442 * Allocated at run time, an array of rings.
444 struct rx_ring *rx_rings;
448 /* Multicast array memory */
452 /* Misc stats maintained by the driver */
453 unsigned long dropped_pkts;
454 unsigned long mbuf_defrag_failed;
455 unsigned long mbuf_header_failed;
456 unsigned long mbuf_packet_failed;
457 unsigned long watchdog_events;
458 unsigned long link_irq;
460 struct ixgbe_hw_stats stats;
464 /* Precision Time Sync (IEEE 1588) defines */
465 #define ETHERTYPE_IEEE1588 0x88F7
466 #define PICOSECS_PER_TICK 20833
467 #define TSYNC_UDP_PORT 319 /* UDP port for the protocol */
468 #define IXGBE_ADVTXD_TSTAMP 0x00080000
471 #define IXGBE_CORE_LOCK_INIT(_sc, _name) \
472 mtx_init(&(_sc)->core_mtx, _name, "IXGBE Core Lock", MTX_DEF)
473 #define IXGBE_CORE_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->core_mtx)
474 #define IXGBE_TX_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->tx_mtx)
475 #define IXGBE_RX_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->rx_mtx)
476 #define IXGBE_CORE_LOCK(_sc) mtx_lock(&(_sc)->core_mtx)
477 #define IXGBE_TX_LOCK(_sc) mtx_lock(&(_sc)->tx_mtx)
478 #define IXGBE_TX_TRYLOCK(_sc) mtx_trylock(&(_sc)->tx_mtx)
479 #define IXGBE_RX_LOCK(_sc) mtx_lock(&(_sc)->rx_mtx)
480 #define IXGBE_CORE_UNLOCK(_sc) mtx_unlock(&(_sc)->core_mtx)
481 #define IXGBE_TX_UNLOCK(_sc) mtx_unlock(&(_sc)->tx_mtx)
482 #define IXGBE_RX_UNLOCK(_sc) mtx_unlock(&(_sc)->rx_mtx)
483 #define IXGBE_CORE_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->core_mtx, MA_OWNED)
484 #define IXGBE_TX_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->tx_mtx, MA_OWNED)
486 /* For backward compatibility */
487 #if !defined(PCIER_LINK_STA)
488 #define PCIER_LINK_STA PCIR_EXPRESS_LINK_STA
492 ixgbe_is_sfp(struct ixgbe_hw *hw)
494 switch (hw->phy.type) {
495 case ixgbe_phy_sfp_avago:
496 case ixgbe_phy_sfp_ftl:
497 case ixgbe_phy_sfp_intel:
498 case ixgbe_phy_sfp_unknown:
499 case ixgbe_phy_sfp_passive_tyco:
500 case ixgbe_phy_sfp_passive_unknown:
507 /* Workaround to make 8.0 buildable */
508 #if __FreeBSD_version >= 800000 && __FreeBSD_version < 800504
510 drbr_needs_enqueue(struct ifnet *ifp, struct buf_ring *br)
513 if (ALTQ_IS_ENABLED(&ifp->if_snd))
516 return (!buf_ring_empty(br));
521 ** Find the number of unrefreshed RX descriptors
524 ixgbe_rx_unrefreshed(struct rx_ring *rxr)
526 if (rxr->next_to_check > rxr->next_to_refresh)
527 return (rxr->next_to_check - rxr->next_to_refresh - 1);
529 return ((rxr->num_desc + rxr->next_to_check) -
530 rxr->next_to_refresh - 1);
533 #endif /* _IXGBE_H_ */