1 /******************************************************************************
3 Copyright (c) 2001-2014, Intel Corporation
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7 modification, are permitted provided that the following conditions are met:
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32 ******************************************************************************/
35 #include "ixgbe_api.h"
36 #include "ixgbe_common.h"
39 * ixgbe_dcb_get_rtrup2tc - read rtrup2tc reg
40 * @hw: pointer to hardware structure
41 * @map: pointer to u8 arr for returning map
43 * Read the rtrup2tc HW register and resolve its content into map
45 void ixgbe_dcb_get_rtrup2tc(struct ixgbe_hw *hw, u8 *map)
47 if (hw->mac.ops.get_rtrup2tc)
48 hw->mac.ops.get_rtrup2tc(hw, map);
52 * ixgbe_init_shared_code - Initialize the shared code
53 * @hw: pointer to hardware structure
55 * This will assign function pointers and assign the MAC type and PHY code.
56 * Does not touch the hardware. This function must be called prior to any
57 * other function in the shared code. The ixgbe_hw structure should be
58 * memset to 0 prior to calling this function. The following fields in
59 * hw structure should be filled in prior to calling this function:
60 * hw_addr, back, device_id, vendor_id, subsystem_device_id,
61 * subsystem_vendor_id, and revision_id
63 s32 ixgbe_init_shared_code(struct ixgbe_hw *hw)
67 DEBUGFUNC("ixgbe_init_shared_code");
72 ixgbe_set_mac_type(hw);
74 switch (hw->mac.type) {
75 case ixgbe_mac_82598EB:
76 status = ixgbe_init_ops_82598(hw);
78 case ixgbe_mac_82599EB:
79 status = ixgbe_init_ops_82599(hw);
82 status = ixgbe_init_ops_X540(hw);
84 #if 0 //JFV temporary disable
86 status = ixgbe_init_ops_X550(hw);
88 case ixgbe_mac_X550EM_x:
89 case ixgbe_mac_X550EM_a:
90 status = ixgbe_init_ops_X550EM(hw);
93 case ixgbe_mac_82599_vf:
94 case ixgbe_mac_X540_vf:
95 case ixgbe_mac_X550_vf:
96 case ixgbe_mac_X550EM_x_vf:
97 case ixgbe_mac_X550EM_a_vf:
98 status = ixgbe_init_ops_vf(hw);
101 status = IXGBE_ERR_DEVICE_NOT_SUPPORTED;
109 * ixgbe_set_mac_type - Sets MAC type
110 * @hw: pointer to the HW structure
112 * This function sets the mac type of the adapter based on the
113 * vendor ID and device ID stored in the hw structure.
115 s32 ixgbe_set_mac_type(struct ixgbe_hw *hw)
117 s32 ret_val = IXGBE_SUCCESS;
119 DEBUGFUNC("ixgbe_set_mac_type\n");
121 if (hw->vendor_id != IXGBE_INTEL_VENDOR_ID) {
122 ERROR_REPORT2(IXGBE_ERROR_UNSUPPORTED,
123 "Unsupported vendor id: %x", hw->vendor_id);
124 return IXGBE_ERR_DEVICE_NOT_SUPPORTED;
127 switch (hw->device_id) {
128 case IXGBE_DEV_ID_82598:
129 case IXGBE_DEV_ID_82598_BX:
130 case IXGBE_DEV_ID_82598AF_SINGLE_PORT:
131 case IXGBE_DEV_ID_82598AF_DUAL_PORT:
132 case IXGBE_DEV_ID_82598AT:
133 case IXGBE_DEV_ID_82598AT2:
134 case IXGBE_DEV_ID_82598EB_CX4:
135 case IXGBE_DEV_ID_82598_CX4_DUAL_PORT:
136 case IXGBE_DEV_ID_82598_DA_DUAL_PORT:
137 case IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM:
138 case IXGBE_DEV_ID_82598EB_XF_LR:
139 case IXGBE_DEV_ID_82598EB_SFP_LOM:
140 hw->mac.type = ixgbe_mac_82598EB;
142 case IXGBE_DEV_ID_82599_KX4:
143 case IXGBE_DEV_ID_82599_KX4_MEZZ:
144 case IXGBE_DEV_ID_82599_XAUI_LOM:
145 case IXGBE_DEV_ID_82599_COMBO_BACKPLANE:
146 case IXGBE_DEV_ID_82599_KR:
147 case IXGBE_DEV_ID_82599_SFP:
148 case IXGBE_DEV_ID_82599_BACKPLANE_FCOE:
149 case IXGBE_DEV_ID_82599_SFP_FCOE:
150 case IXGBE_DEV_ID_82599_SFP_EM:
151 case IXGBE_DEV_ID_82599_SFP_SF2:
152 case IXGBE_DEV_ID_82599_SFP_SF_QP:
153 case IXGBE_DEV_ID_82599_QSFP_SF_QP:
154 case IXGBE_DEV_ID_82599EN_SFP:
155 case IXGBE_DEV_ID_82599_CX4:
156 case IXGBE_DEV_ID_82599_BYPASS:
157 case IXGBE_DEV_ID_82599_T3_LOM:
158 hw->mac.type = ixgbe_mac_82599EB;
160 case IXGBE_DEV_ID_82599_VF:
161 case IXGBE_DEV_ID_82599_VF_HV:
162 hw->mac.type = ixgbe_mac_82599_vf;
164 case IXGBE_DEV_ID_X540_VF:
165 case IXGBE_DEV_ID_X540_VF_HV:
166 hw->mac.type = ixgbe_mac_X540_vf;
168 case IXGBE_DEV_ID_X540T:
169 case IXGBE_DEV_ID_X540T1:
170 case IXGBE_DEV_ID_X540_BYPASS:
171 hw->mac.type = ixgbe_mac_X540;
173 case IXGBE_DEV_ID_X550T:
174 hw->mac.type = ixgbe_mac_X550;
176 case IXGBE_DEV_ID_X550EM_X_KX4:
177 case IXGBE_DEV_ID_X550EM_X_KR:
178 case IXGBE_DEV_ID_X550EM_X_10G_T:
179 case IXGBE_DEV_ID_X550EM_X_1G_T:
180 case IXGBE_DEV_ID_X550EM_X_SFP:
181 hw->mac.type = ixgbe_mac_X550EM_x;
183 case IXGBE_DEV_ID_X550EM_A_KR:
184 hw->mac.type = ixgbe_mac_X550EM_a;
186 case IXGBE_DEV_ID_X550_VF:
187 case IXGBE_DEV_ID_X550_VF_HV:
188 hw->mac.type = ixgbe_mac_X550_vf;
190 case IXGBE_DEV_ID_X550EM_X_VF:
191 case IXGBE_DEV_ID_X550EM_X_VF_HV:
192 hw->mac.type = ixgbe_mac_X550EM_x_vf;
194 case IXGBE_DEV_ID_X550EM_A_VF:
195 case IXGBE_DEV_ID_X550EM_A_VF_HV:
196 hw->mac.type = ixgbe_mac_X550EM_a_vf;
199 ret_val = IXGBE_ERR_DEVICE_NOT_SUPPORTED;
200 ERROR_REPORT2(IXGBE_ERROR_UNSUPPORTED,
201 "Unsupported device id: %x",
206 DEBUGOUT2("ixgbe_set_mac_type found mac: %d, returns: %d\n",
207 hw->mac.type, ret_val);
212 * ixgbe_init_hw - Initialize the hardware
213 * @hw: pointer to hardware structure
215 * Initialize the hardware by resetting and then starting the hardware
217 s32 ixgbe_init_hw(struct ixgbe_hw *hw)
219 return ixgbe_call_func(hw, hw->mac.ops.init_hw, (hw),
220 IXGBE_NOT_IMPLEMENTED);
224 * ixgbe_reset_hw - Performs a hardware reset
225 * @hw: pointer to hardware structure
227 * Resets the hardware by resetting the transmit and receive units, masks and
228 * clears all interrupts, performs a PHY reset, and performs a MAC reset
230 s32 ixgbe_reset_hw(struct ixgbe_hw *hw)
232 return ixgbe_call_func(hw, hw->mac.ops.reset_hw, (hw),
233 IXGBE_NOT_IMPLEMENTED);
237 * ixgbe_start_hw - Prepares hardware for Rx/Tx
238 * @hw: pointer to hardware structure
240 * Starts the hardware by filling the bus info structure and media type,
241 * clears all on chip counters, initializes receive address registers,
242 * multicast table, VLAN filter table, calls routine to setup link and
243 * flow control settings, and leaves transmit and receive units disabled
246 s32 ixgbe_start_hw(struct ixgbe_hw *hw)
248 return ixgbe_call_func(hw, hw->mac.ops.start_hw, (hw),
249 IXGBE_NOT_IMPLEMENTED);
253 * ixgbe_enable_relaxed_ordering - Enables tx relaxed ordering,
254 * which is disabled by default in ixgbe_start_hw();
256 * @hw: pointer to hardware structure
258 * Enable relaxed ordering;
260 void ixgbe_enable_relaxed_ordering(struct ixgbe_hw *hw)
262 if (hw->mac.ops.enable_relaxed_ordering)
263 hw->mac.ops.enable_relaxed_ordering(hw);
267 * ixgbe_clear_hw_cntrs - Clear hardware counters
268 * @hw: pointer to hardware structure
270 * Clears all hardware statistics counters by reading them from the hardware
271 * Statistics counters are clear on read.
273 s32 ixgbe_clear_hw_cntrs(struct ixgbe_hw *hw)
275 return ixgbe_call_func(hw, hw->mac.ops.clear_hw_cntrs, (hw),
276 IXGBE_NOT_IMPLEMENTED);
280 * ixgbe_get_media_type - Get media type
281 * @hw: pointer to hardware structure
283 * Returns the media type (fiber, copper, backplane)
285 enum ixgbe_media_type ixgbe_get_media_type(struct ixgbe_hw *hw)
287 return ixgbe_call_func(hw, hw->mac.ops.get_media_type, (hw),
288 ixgbe_media_type_unknown);
292 * ixgbe_get_mac_addr - Get MAC address
293 * @hw: pointer to hardware structure
294 * @mac_addr: Adapter MAC address
296 * Reads the adapter's MAC address from the first Receive Address Register
297 * (RAR0) A reset of the adapter must have been performed prior to calling
298 * this function in order for the MAC address to have been loaded from the
301 s32 ixgbe_get_mac_addr(struct ixgbe_hw *hw, u8 *mac_addr)
303 return ixgbe_call_func(hw, hw->mac.ops.get_mac_addr,
304 (hw, mac_addr), IXGBE_NOT_IMPLEMENTED);
308 * ixgbe_get_san_mac_addr - Get SAN MAC address
309 * @hw: pointer to hardware structure
310 * @san_mac_addr: SAN MAC address
312 * Reads the SAN MAC address from the EEPROM, if it's available. This is
313 * per-port, so set_lan_id() must be called before reading the addresses.
315 s32 ixgbe_get_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr)
317 return ixgbe_call_func(hw, hw->mac.ops.get_san_mac_addr,
318 (hw, san_mac_addr), IXGBE_NOT_IMPLEMENTED);
322 * ixgbe_set_san_mac_addr - Write a SAN MAC address
323 * @hw: pointer to hardware structure
324 * @san_mac_addr: SAN MAC address
326 * Writes A SAN MAC address to the EEPROM.
328 s32 ixgbe_set_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr)
330 return ixgbe_call_func(hw, hw->mac.ops.set_san_mac_addr,
331 (hw, san_mac_addr), IXGBE_NOT_IMPLEMENTED);
335 * ixgbe_get_device_caps - Get additional device capabilities
336 * @hw: pointer to hardware structure
337 * @device_caps: the EEPROM word for device capabilities
339 * Reads the extra device capabilities from the EEPROM
341 s32 ixgbe_get_device_caps(struct ixgbe_hw *hw, u16 *device_caps)
343 return ixgbe_call_func(hw, hw->mac.ops.get_device_caps,
344 (hw, device_caps), IXGBE_NOT_IMPLEMENTED);
348 * ixgbe_get_wwn_prefix - Get alternative WWNN/WWPN prefix from the EEPROM
349 * @hw: pointer to hardware structure
350 * @wwnn_prefix: the alternative WWNN prefix
351 * @wwpn_prefix: the alternative WWPN prefix
353 * This function will read the EEPROM from the alternative SAN MAC address
354 * block to check the support for the alternative WWNN/WWPN prefix support.
356 s32 ixgbe_get_wwn_prefix(struct ixgbe_hw *hw, u16 *wwnn_prefix,
359 return ixgbe_call_func(hw, hw->mac.ops.get_wwn_prefix,
360 (hw, wwnn_prefix, wwpn_prefix),
361 IXGBE_NOT_IMPLEMENTED);
365 * ixgbe_get_fcoe_boot_status - Get FCOE boot status from EEPROM
366 * @hw: pointer to hardware structure
367 * @bs: the fcoe boot status
369 * This function will read the FCOE boot status from the iSCSI FCOE block
371 s32 ixgbe_get_fcoe_boot_status(struct ixgbe_hw *hw, u16 *bs)
373 return ixgbe_call_func(hw, hw->mac.ops.get_fcoe_boot_status,
375 IXGBE_NOT_IMPLEMENTED);
379 * ixgbe_get_bus_info - Set PCI bus info
380 * @hw: pointer to hardware structure
382 * Sets the PCI bus info (speed, width, type) within the ixgbe_hw structure
384 s32 ixgbe_get_bus_info(struct ixgbe_hw *hw)
386 return ixgbe_call_func(hw, hw->mac.ops.get_bus_info, (hw),
387 IXGBE_NOT_IMPLEMENTED);
391 * ixgbe_get_num_of_tx_queues - Get Tx queues
392 * @hw: pointer to hardware structure
394 * Returns the number of transmit queues for the given adapter.
396 u32 ixgbe_get_num_of_tx_queues(struct ixgbe_hw *hw)
398 return hw->mac.max_tx_queues;
402 * ixgbe_get_num_of_rx_queues - Get Rx queues
403 * @hw: pointer to hardware structure
405 * Returns the number of receive queues for the given adapter.
407 u32 ixgbe_get_num_of_rx_queues(struct ixgbe_hw *hw)
409 return hw->mac.max_rx_queues;
413 * ixgbe_stop_adapter - Disable Rx/Tx units
414 * @hw: pointer to hardware structure
416 * Sets the adapter_stopped flag within ixgbe_hw struct. Clears interrupts,
417 * disables transmit and receive units. The adapter_stopped flag is used by
418 * the shared code and drivers to determine if the adapter is in a stopped
419 * state and should not touch the hardware.
421 s32 ixgbe_stop_adapter(struct ixgbe_hw *hw)
423 return ixgbe_call_func(hw, hw->mac.ops.stop_adapter, (hw),
424 IXGBE_NOT_IMPLEMENTED);
428 * ixgbe_read_pba_string - Reads part number string from EEPROM
429 * @hw: pointer to hardware structure
430 * @pba_num: stores the part number string from the EEPROM
431 * @pba_num_size: part number string buffer length
433 * Reads the part number string from the EEPROM.
435 s32 ixgbe_read_pba_string(struct ixgbe_hw *hw, u8 *pba_num, u32 pba_num_size)
437 return ixgbe_read_pba_string_generic(hw, pba_num, pba_num_size);
441 * ixgbe_read_pba_num - Reads part number from EEPROM
442 * @hw: pointer to hardware structure
443 * @pba_num: stores the part number from the EEPROM
445 * Reads the part number from the EEPROM.
447 s32 ixgbe_read_pba_num(struct ixgbe_hw *hw, u32 *pba_num)
449 return ixgbe_read_pba_num_generic(hw, pba_num);
453 * ixgbe_identify_phy - Get PHY type
454 * @hw: pointer to hardware structure
456 * Determines the physical layer module found on the current adapter.
458 s32 ixgbe_identify_phy(struct ixgbe_hw *hw)
460 s32 status = IXGBE_SUCCESS;
462 if (hw->phy.type == ixgbe_phy_unknown) {
463 status = ixgbe_call_func(hw, hw->phy.ops.identify, (hw),
464 IXGBE_NOT_IMPLEMENTED);
471 * ixgbe_reset_phy - Perform a PHY reset
472 * @hw: pointer to hardware structure
474 s32 ixgbe_reset_phy(struct ixgbe_hw *hw)
476 s32 status = IXGBE_SUCCESS;
478 if (hw->phy.type == ixgbe_phy_unknown) {
479 if (ixgbe_identify_phy(hw) != IXGBE_SUCCESS)
480 status = IXGBE_ERR_PHY;
483 if (status == IXGBE_SUCCESS) {
484 status = ixgbe_call_func(hw, hw->phy.ops.reset, (hw),
485 IXGBE_NOT_IMPLEMENTED);
491 * ixgbe_get_phy_firmware_version -
492 * @hw: pointer to hardware structure
493 * @firmware_version: pointer to firmware version
495 s32 ixgbe_get_phy_firmware_version(struct ixgbe_hw *hw, u16 *firmware_version)
497 s32 status = IXGBE_SUCCESS;
499 status = ixgbe_call_func(hw, hw->phy.ops.get_firmware_version,
500 (hw, firmware_version),
501 IXGBE_NOT_IMPLEMENTED);
506 * ixgbe_read_phy_reg - Read PHY register
507 * @hw: pointer to hardware structure
508 * @reg_addr: 32 bit address of PHY register to read
509 * @phy_data: Pointer to read data from PHY register
511 * Reads a value from a specified PHY register
513 s32 ixgbe_read_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
517 ixgbe_identify_phy(hw);
519 return ixgbe_call_func(hw, hw->phy.ops.read_reg, (hw, reg_addr,
520 device_type, phy_data), IXGBE_NOT_IMPLEMENTED);
524 * ixgbe_write_phy_reg - Write PHY register
525 * @hw: pointer to hardware structure
526 * @reg_addr: 32 bit PHY register to write
527 * @phy_data: Data to write to the PHY register
529 * Writes a value to specified PHY register
531 s32 ixgbe_write_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
535 ixgbe_identify_phy(hw);
537 return ixgbe_call_func(hw, hw->phy.ops.write_reg, (hw, reg_addr,
538 device_type, phy_data), IXGBE_NOT_IMPLEMENTED);
542 * ixgbe_setup_phy_link - Restart PHY autoneg
543 * @hw: pointer to hardware structure
545 * Restart autonegotiation and PHY and waits for completion.
547 s32 ixgbe_setup_phy_link(struct ixgbe_hw *hw)
549 return ixgbe_call_func(hw, hw->phy.ops.setup_link, (hw),
550 IXGBE_NOT_IMPLEMENTED);
554 * ixgbe_setup_internal_phy - Configure integrated PHY
555 * @hw: pointer to hardware structure
557 * Reconfigure the integrated PHY in order to enable talk to the external PHY.
558 * Returns success if not implemented, since nothing needs to be done in this
561 s32 ixgbe_setup_internal_phy(struct ixgbe_hw *hw)
563 return ixgbe_call_func(hw, hw->phy.ops.setup_internal_link, (hw),
568 * ixgbe_check_phy_link - Determine link and speed status
569 * @hw: pointer to hardware structure
571 * Reads a PHY register to determine if link is up and the current speed for
574 s32 ixgbe_check_phy_link(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
577 return ixgbe_call_func(hw, hw->phy.ops.check_link, (hw, speed,
578 link_up), IXGBE_NOT_IMPLEMENTED);
582 * ixgbe_setup_phy_link_speed - Set auto advertise
583 * @hw: pointer to hardware structure
584 * @speed: new link speed
586 * Sets the auto advertised capabilities
588 s32 ixgbe_setup_phy_link_speed(struct ixgbe_hw *hw, ixgbe_link_speed speed,
589 bool autoneg_wait_to_complete)
591 return ixgbe_call_func(hw, hw->phy.ops.setup_link_speed, (hw, speed,
592 autoneg_wait_to_complete),
593 IXGBE_NOT_IMPLEMENTED);
597 * ixgbe_set_phy_power - Control the phy power state
598 * @hw: pointer to hardware structure
599 * @on: TRUE for on, FALSE for off
601 s32 ixgbe_set_phy_power(struct ixgbe_hw *hw, bool on)
603 return ixgbe_call_func(hw, hw->phy.ops.set_phy_power, (hw, on),
604 IXGBE_NOT_IMPLEMENTED);
608 * ixgbe_check_link - Get link and speed status
609 * @hw: pointer to hardware structure
611 * Reads the links register to determine if link is up and the current speed
613 s32 ixgbe_check_link(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
614 bool *link_up, bool link_up_wait_to_complete)
616 return ixgbe_call_func(hw, hw->mac.ops.check_link, (hw, speed,
617 link_up, link_up_wait_to_complete),
618 IXGBE_NOT_IMPLEMENTED);
622 * ixgbe_disable_tx_laser - Disable Tx laser
623 * @hw: pointer to hardware structure
625 * If the driver needs to disable the laser on SFI optics.
627 void ixgbe_disable_tx_laser(struct ixgbe_hw *hw)
629 if (hw->mac.ops.disable_tx_laser)
630 hw->mac.ops.disable_tx_laser(hw);
634 * ixgbe_enable_tx_laser - Enable Tx laser
635 * @hw: pointer to hardware structure
637 * If the driver needs to enable the laser on SFI optics.
639 void ixgbe_enable_tx_laser(struct ixgbe_hw *hw)
641 if (hw->mac.ops.enable_tx_laser)
642 hw->mac.ops.enable_tx_laser(hw);
646 * ixgbe_flap_tx_laser - flap Tx laser to start autotry process
647 * @hw: pointer to hardware structure
649 * When the driver changes the link speeds that it can support then
650 * flap the tx laser to alert the link partner to start autotry
651 * process on its end.
653 void ixgbe_flap_tx_laser(struct ixgbe_hw *hw)
655 if (hw->mac.ops.flap_tx_laser)
656 hw->mac.ops.flap_tx_laser(hw);
660 * ixgbe_setup_link - Set link speed
661 * @hw: pointer to hardware structure
662 * @speed: new link speed
664 * Configures link settings. Restarts the link.
665 * Performs autonegotiation if needed.
667 s32 ixgbe_setup_link(struct ixgbe_hw *hw, ixgbe_link_speed speed,
668 bool autoneg_wait_to_complete)
670 return ixgbe_call_func(hw, hw->mac.ops.setup_link, (hw, speed,
671 autoneg_wait_to_complete),
672 IXGBE_NOT_IMPLEMENTED);
676 * ixgbe_setup_mac_link - Set link speed
677 * @hw: pointer to hardware structure
678 * @speed: new link speed
680 * Configures link settings. Restarts the link.
681 * Performs autonegotiation if needed.
683 s32 ixgbe_setup_mac_link(struct ixgbe_hw *hw, ixgbe_link_speed speed,
684 bool autoneg_wait_to_complete)
686 return ixgbe_call_func(hw, hw->mac.ops.setup_mac_link, (hw, speed,
687 autoneg_wait_to_complete),
688 IXGBE_NOT_IMPLEMENTED);
692 * ixgbe_get_link_capabilities - Returns link capabilities
693 * @hw: pointer to hardware structure
695 * Determines the link capabilities of the current configuration.
697 s32 ixgbe_get_link_capabilities(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
700 return ixgbe_call_func(hw, hw->mac.ops.get_link_capabilities, (hw,
701 speed, autoneg), IXGBE_NOT_IMPLEMENTED);
705 * ixgbe_led_on - Turn on LEDs
706 * @hw: pointer to hardware structure
707 * @index: led number to turn on
709 * Turns on the software controllable LEDs.
711 s32 ixgbe_led_on(struct ixgbe_hw *hw, u32 index)
713 return ixgbe_call_func(hw, hw->mac.ops.led_on, (hw, index),
714 IXGBE_NOT_IMPLEMENTED);
718 * ixgbe_led_off - Turn off LEDs
719 * @hw: pointer to hardware structure
720 * @index: led number to turn off
722 * Turns off the software controllable LEDs.
724 s32 ixgbe_led_off(struct ixgbe_hw *hw, u32 index)
726 return ixgbe_call_func(hw, hw->mac.ops.led_off, (hw, index),
727 IXGBE_NOT_IMPLEMENTED);
731 * ixgbe_blink_led_start - Blink LEDs
732 * @hw: pointer to hardware structure
733 * @index: led number to blink
735 * Blink LED based on index.
737 s32 ixgbe_blink_led_start(struct ixgbe_hw *hw, u32 index)
739 return ixgbe_call_func(hw, hw->mac.ops.blink_led_start, (hw, index),
740 IXGBE_NOT_IMPLEMENTED);
744 * ixgbe_blink_led_stop - Stop blinking LEDs
745 * @hw: pointer to hardware structure
747 * Stop blinking LED based on index.
749 s32 ixgbe_blink_led_stop(struct ixgbe_hw *hw, u32 index)
751 return ixgbe_call_func(hw, hw->mac.ops.blink_led_stop, (hw, index),
752 IXGBE_NOT_IMPLEMENTED);
756 * ixgbe_init_eeprom_params - Initialize EEPROM parameters
757 * @hw: pointer to hardware structure
759 * Initializes the EEPROM parameters ixgbe_eeprom_info within the
760 * ixgbe_hw struct in order to set up EEPROM access.
762 s32 ixgbe_init_eeprom_params(struct ixgbe_hw *hw)
764 return ixgbe_call_func(hw, hw->eeprom.ops.init_params, (hw),
765 IXGBE_NOT_IMPLEMENTED);
770 * ixgbe_write_eeprom - Write word to EEPROM
771 * @hw: pointer to hardware structure
772 * @offset: offset within the EEPROM to be written to
773 * @data: 16 bit word to be written to the EEPROM
775 * Writes 16 bit value to EEPROM. If ixgbe_eeprom_update_checksum is not
776 * called after this function, the EEPROM will most likely contain an
779 s32 ixgbe_write_eeprom(struct ixgbe_hw *hw, u16 offset, u16 data)
781 return ixgbe_call_func(hw, hw->eeprom.ops.write, (hw, offset, data),
782 IXGBE_NOT_IMPLEMENTED);
786 * ixgbe_write_eeprom_buffer - Write word(s) to EEPROM
787 * @hw: pointer to hardware structure
788 * @offset: offset within the EEPROM to be written to
789 * @data: 16 bit word(s) to be written to the EEPROM
790 * @words: number of words
792 * Writes 16 bit word(s) to EEPROM. If ixgbe_eeprom_update_checksum is not
793 * called after this function, the EEPROM will most likely contain an
796 s32 ixgbe_write_eeprom_buffer(struct ixgbe_hw *hw, u16 offset, u16 words,
799 return ixgbe_call_func(hw, hw->eeprom.ops.write_buffer,
800 (hw, offset, words, data),
801 IXGBE_NOT_IMPLEMENTED);
805 * ixgbe_read_eeprom - Read word from EEPROM
806 * @hw: pointer to hardware structure
807 * @offset: offset within the EEPROM to be read
808 * @data: read 16 bit value from EEPROM
810 * Reads 16 bit value from EEPROM
812 s32 ixgbe_read_eeprom(struct ixgbe_hw *hw, u16 offset, u16 *data)
814 return ixgbe_call_func(hw, hw->eeprom.ops.read, (hw, offset, data),
815 IXGBE_NOT_IMPLEMENTED);
819 * ixgbe_read_eeprom_buffer - Read word(s) from EEPROM
820 * @hw: pointer to hardware structure
821 * @offset: offset within the EEPROM to be read
822 * @data: read 16 bit word(s) from EEPROM
823 * @words: number of words
825 * Reads 16 bit word(s) from EEPROM
827 s32 ixgbe_read_eeprom_buffer(struct ixgbe_hw *hw, u16 offset,
828 u16 words, u16 *data)
830 return ixgbe_call_func(hw, hw->eeprom.ops.read_buffer,
831 (hw, offset, words, data),
832 IXGBE_NOT_IMPLEMENTED);
836 * ixgbe_validate_eeprom_checksum - Validate EEPROM checksum
837 * @hw: pointer to hardware structure
838 * @checksum_val: calculated checksum
840 * Performs checksum calculation and validates the EEPROM checksum
842 s32 ixgbe_validate_eeprom_checksum(struct ixgbe_hw *hw, u16 *checksum_val)
844 return ixgbe_call_func(hw, hw->eeprom.ops.validate_checksum,
845 (hw, checksum_val), IXGBE_NOT_IMPLEMENTED);
849 * ixgbe_eeprom_update_checksum - Updates the EEPROM checksum
850 * @hw: pointer to hardware structure
852 s32 ixgbe_update_eeprom_checksum(struct ixgbe_hw *hw)
854 return ixgbe_call_func(hw, hw->eeprom.ops.update_checksum, (hw),
855 IXGBE_NOT_IMPLEMENTED);
859 * ixgbe_insert_mac_addr - Find a RAR for this mac address
860 * @hw: pointer to hardware structure
861 * @addr: Address to put into receive address register
862 * @vmdq: VMDq pool to assign
864 * Puts an ethernet address into a receive address register, or
865 * finds the rar that it is aleady in; adds to the pool list
867 s32 ixgbe_insert_mac_addr(struct ixgbe_hw *hw, u8 *addr, u32 vmdq)
869 return ixgbe_call_func(hw, hw->mac.ops.insert_mac_addr,
871 IXGBE_NOT_IMPLEMENTED);
875 * ixgbe_set_rar - Set Rx address register
876 * @hw: pointer to hardware structure
877 * @index: Receive address register to write
878 * @addr: Address to put into receive address register
880 * @enable_addr: set flag that address is active
882 * Puts an ethernet address into a receive address register.
884 s32 ixgbe_set_rar(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
887 return ixgbe_call_func(hw, hw->mac.ops.set_rar, (hw, index, addr, vmdq,
888 enable_addr), IXGBE_NOT_IMPLEMENTED);
892 * ixgbe_clear_rar - Clear Rx address register
893 * @hw: pointer to hardware structure
894 * @index: Receive address register to write
896 * Puts an ethernet address into a receive address register.
898 s32 ixgbe_clear_rar(struct ixgbe_hw *hw, u32 index)
900 return ixgbe_call_func(hw, hw->mac.ops.clear_rar, (hw, index),
901 IXGBE_NOT_IMPLEMENTED);
905 * ixgbe_set_vmdq - Associate a VMDq index with a receive address
906 * @hw: pointer to hardware structure
907 * @rar: receive address register index to associate with VMDq index
908 * @vmdq: VMDq set or pool index
910 s32 ixgbe_set_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq)
912 return ixgbe_call_func(hw, hw->mac.ops.set_vmdq, (hw, rar, vmdq),
913 IXGBE_NOT_IMPLEMENTED);
918 * ixgbe_set_vmdq_san_mac - Associate VMDq index 127 with a receive address
919 * @hw: pointer to hardware structure
920 * @vmdq: VMDq default pool index
922 s32 ixgbe_set_vmdq_san_mac(struct ixgbe_hw *hw, u32 vmdq)
924 return ixgbe_call_func(hw, hw->mac.ops.set_vmdq_san_mac,
925 (hw, vmdq), IXGBE_NOT_IMPLEMENTED);
929 * ixgbe_clear_vmdq - Disassociate a VMDq index from a receive address
930 * @hw: pointer to hardware structure
931 * @rar: receive address register index to disassociate with VMDq index
932 * @vmdq: VMDq set or pool index
934 s32 ixgbe_clear_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq)
936 return ixgbe_call_func(hw, hw->mac.ops.clear_vmdq, (hw, rar, vmdq),
937 IXGBE_NOT_IMPLEMENTED);
941 * ixgbe_init_rx_addrs - Initializes receive address filters.
942 * @hw: pointer to hardware structure
944 * Places the MAC address in receive address register 0 and clears the rest
945 * of the receive address registers. Clears the multicast table. Assumes
946 * the receiver is in reset when the routine is called.
948 s32 ixgbe_init_rx_addrs(struct ixgbe_hw *hw)
950 return ixgbe_call_func(hw, hw->mac.ops.init_rx_addrs, (hw),
951 IXGBE_NOT_IMPLEMENTED);
955 * ixgbe_get_num_rx_addrs - Returns the number of RAR entries.
956 * @hw: pointer to hardware structure
958 u32 ixgbe_get_num_rx_addrs(struct ixgbe_hw *hw)
960 return hw->mac.num_rar_entries;
964 * ixgbe_update_uc_addr_list - Updates the MAC's list of secondary addresses
965 * @hw: pointer to hardware structure
966 * @addr_list: the list of new multicast addresses
967 * @addr_count: number of addresses
968 * @func: iterator function to walk the multicast address list
970 * The given list replaces any existing list. Clears the secondary addrs from
971 * receive address registers. Uses unused receive address registers for the
972 * first secondary addresses, and falls back to promiscuous mode as needed.
974 s32 ixgbe_update_uc_addr_list(struct ixgbe_hw *hw, u8 *addr_list,
975 u32 addr_count, ixgbe_mc_addr_itr func)
977 return ixgbe_call_func(hw, hw->mac.ops.update_uc_addr_list, (hw,
978 addr_list, addr_count, func),
979 IXGBE_NOT_IMPLEMENTED);
983 * ixgbe_update_mc_addr_list - Updates the MAC's list of multicast addresses
984 * @hw: pointer to hardware structure
985 * @mc_addr_list: the list of new multicast addresses
986 * @mc_addr_count: number of addresses
987 * @func: iterator function to walk the multicast address list
989 * The given list replaces any existing list. Clears the MC addrs from receive
990 * address registers and the multicast table. Uses unused receive address
991 * registers for the first multicast addresses, and hashes the rest into the
994 s32 ixgbe_update_mc_addr_list(struct ixgbe_hw *hw, u8 *mc_addr_list,
995 u32 mc_addr_count, ixgbe_mc_addr_itr func,
998 return ixgbe_call_func(hw, hw->mac.ops.update_mc_addr_list, (hw,
999 mc_addr_list, mc_addr_count, func, clear),
1000 IXGBE_NOT_IMPLEMENTED);
1004 * ixgbe_enable_mc - Enable multicast address in RAR
1005 * @hw: pointer to hardware structure
1007 * Enables multicast address in RAR and the use of the multicast hash table.
1009 s32 ixgbe_enable_mc(struct ixgbe_hw *hw)
1011 return ixgbe_call_func(hw, hw->mac.ops.enable_mc, (hw),
1012 IXGBE_NOT_IMPLEMENTED);
1016 * ixgbe_disable_mc - Disable multicast address in RAR
1017 * @hw: pointer to hardware structure
1019 * Disables multicast address in RAR and the use of the multicast hash table.
1021 s32 ixgbe_disable_mc(struct ixgbe_hw *hw)
1023 return ixgbe_call_func(hw, hw->mac.ops.disable_mc, (hw),
1024 IXGBE_NOT_IMPLEMENTED);
1028 * ixgbe_clear_vfta - Clear VLAN filter table
1029 * @hw: pointer to hardware structure
1031 * Clears the VLAN filer table, and the VMDq index associated with the filter
1033 s32 ixgbe_clear_vfta(struct ixgbe_hw *hw)
1035 return ixgbe_call_func(hw, hw->mac.ops.clear_vfta, (hw),
1036 IXGBE_NOT_IMPLEMENTED);
1040 * ixgbe_set_vfta - Set VLAN filter table
1041 * @hw: pointer to hardware structure
1042 * @vlan: VLAN id to write to VLAN filter
1043 * @vind: VMDq output index that maps queue to VLAN id in VFTA
1044 * @vlan_on: boolean flag to turn on/off VLAN in VFTA
1046 * Turn on/off specified VLAN in the VLAN filter table.
1048 s32 ixgbe_set_vfta(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on)
1050 return ixgbe_call_func(hw, hw->mac.ops.set_vfta, (hw, vlan, vind,
1051 vlan_on), IXGBE_NOT_IMPLEMENTED);
1055 * ixgbe_set_vlvf - Set VLAN Pool Filter
1056 * @hw: pointer to hardware structure
1057 * @vlan: VLAN id to write to VLAN filter
1058 * @vind: VMDq output index that maps queue to VLAN id in VFVFB
1059 * @vlan_on: boolean flag to turn on/off VLAN in VFVF
1060 * @vfta_changed: pointer to boolean flag which indicates whether VFTA
1063 * Turn on/off specified bit in VLVF table.
1065 s32 ixgbe_set_vlvf(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on,
1068 return ixgbe_call_func(hw, hw->mac.ops.set_vlvf, (hw, vlan, vind,
1069 vlan_on, vfta_changed), IXGBE_NOT_IMPLEMENTED);
1073 * ixgbe_fc_enable - Enable flow control
1074 * @hw: pointer to hardware structure
1076 * Configures the flow control settings based on SW configuration.
1078 s32 ixgbe_fc_enable(struct ixgbe_hw *hw)
1080 return ixgbe_call_func(hw, hw->mac.ops.fc_enable, (hw),
1081 IXGBE_NOT_IMPLEMENTED);
1085 * ixgbe_setup_fc - Set up flow control
1086 * @hw: pointer to hardware structure
1088 * Called at init time to set up flow control.
1090 s32 ixgbe_setup_fc(struct ixgbe_hw *hw)
1092 return ixgbe_call_func(hw, hw->mac.ops.setup_fc, (hw),
1093 IXGBE_NOT_IMPLEMENTED);
1097 * ixgbe_set_fw_drv_ver - Try to send the driver version number FW
1098 * @hw: pointer to hardware structure
1099 * @maj: driver major number to be sent to firmware
1100 * @min: driver minor number to be sent to firmware
1101 * @build: driver build number to be sent to firmware
1102 * @ver: driver version number to be sent to firmware
1104 s32 ixgbe_set_fw_drv_ver(struct ixgbe_hw *hw, u8 maj, u8 min, u8 build,
1107 return ixgbe_call_func(hw, hw->mac.ops.set_fw_drv_ver, (hw, maj, min,
1108 build, ver), IXGBE_NOT_IMPLEMENTED);
1114 * ixgbe_dmac_config - Configure DMA Coalescing registers.
1115 * @hw: pointer to hardware structure
1117 * Configure DMA coalescing. If enabling dmac, dmac is activated.
1118 * When disabling dmac, dmac enable dmac bit is cleared.
1120 s32 ixgbe_dmac_config(struct ixgbe_hw *hw)
1122 return ixgbe_call_func(hw, hw->mac.ops.dmac_config, (hw),
1123 IXGBE_NOT_IMPLEMENTED);
1127 * ixgbe_dmac_update_tcs - Configure DMA Coalescing registers.
1128 * @hw: pointer to hardware structure
1130 * Disables dmac, updates per TC settings, and then enable dmac.
1132 s32 ixgbe_dmac_update_tcs(struct ixgbe_hw *hw)
1134 return ixgbe_call_func(hw, hw->mac.ops.dmac_update_tcs, (hw),
1135 IXGBE_NOT_IMPLEMENTED);
1139 * ixgbe_dmac_config_tcs - Configure DMA Coalescing registers.
1140 * @hw: pointer to hardware structure
1142 * Configure DMA coalescing threshold per TC and set high priority bit for
1143 * FCOE TC. The dmac enable bit must be cleared before configuring.
1145 s32 ixgbe_dmac_config_tcs(struct ixgbe_hw *hw)
1147 return ixgbe_call_func(hw, hw->mac.ops.dmac_config_tcs, (hw),
1148 IXGBE_NOT_IMPLEMENTED);
1152 * ixgbe_setup_eee - Enable/disable EEE support
1153 * @hw: pointer to the HW structure
1154 * @enable_eee: boolean flag to enable EEE
1156 * Enable/disable EEE based on enable_ee flag.
1157 * Auto-negotiation must be started after BASE-T EEE bits in PHY register 7.3C
1161 s32 ixgbe_setup_eee(struct ixgbe_hw *hw, bool enable_eee)
1163 return ixgbe_call_func(hw, hw->mac.ops.setup_eee, (hw, enable_eee),
1164 IXGBE_NOT_IMPLEMENTED);
1168 * ixgbe_set_source_address_pruning - Enable/Disable source address pruning
1169 * @hw: pointer to hardware structure
1170 * @enbale: enable or disable source address pruning
1171 * @pool: Rx pool - Rx pool to toggle source address pruning
1173 void ixgbe_set_source_address_pruning(struct ixgbe_hw *hw, bool enable,
1176 if (hw->mac.ops.set_source_address_pruning)
1177 hw->mac.ops.set_source_address_pruning(hw, enable, pool);
1181 * ixgbe_set_ethertype_anti_spoofing - Enable/Disable Ethertype anti-spoofing
1182 * @hw: pointer to hardware structure
1183 * @enable: enable or disable switch for Ethertype anti-spoofing
1184 * @vf: Virtual Function pool - VF Pool to set for Ethertype anti-spoofing
1187 void ixgbe_set_ethertype_anti_spoofing(struct ixgbe_hw *hw, bool enable, int vf)
1189 if (hw->mac.ops.set_ethertype_anti_spoofing)
1190 hw->mac.ops.set_ethertype_anti_spoofing(hw, enable, vf);
1194 * ixgbe_read_iosf_sb_reg - Read 32 bit PHY register
1195 * @hw: pointer to hardware structure
1196 * @reg_addr: 32 bit address of PHY register to read
1197 * @device_type: type of device you want to communicate with
1198 * @phy_data: Pointer to read data from PHY register
1200 * Reads a value from a specified PHY register
1202 s32 ixgbe_read_iosf_sb_reg(struct ixgbe_hw *hw, u32 reg_addr,
1203 u32 device_type, u32 *phy_data)
1205 return ixgbe_call_func(hw, hw->mac.ops.read_iosf_sb_reg, (hw, reg_addr,
1206 device_type, phy_data), IXGBE_NOT_IMPLEMENTED);
1210 * ixgbe_write_iosf_sb_reg - Write 32 bit register through IOSF Sideband
1211 * @hw: pointer to hardware structure
1212 * @reg_addr: 32 bit PHY register to write
1213 * @device_type: type of device you want to communicate with
1214 * @phy_data: Data to write to the PHY register
1216 * Writes a value to specified PHY register
1218 s32 ixgbe_write_iosf_sb_reg(struct ixgbe_hw *hw, u32 reg_addr,
1219 u32 device_type, u32 phy_data)
1221 return ixgbe_call_func(hw, hw->mac.ops.write_iosf_sb_reg, (hw, reg_addr,
1222 device_type, phy_data), IXGBE_NOT_IMPLEMENTED);
1226 * ixgbe_disable_mdd - Disable malicious driver detection
1227 * @hw: pointer to hardware structure
1230 void ixgbe_disable_mdd(struct ixgbe_hw *hw)
1232 if (hw->mac.ops.disable_mdd)
1233 hw->mac.ops.disable_mdd(hw);
1237 * ixgbe_enable_mdd - Enable malicious driver detection
1238 * @hw: pointer to hardware structure
1241 void ixgbe_enable_mdd(struct ixgbe_hw *hw)
1243 if (hw->mac.ops.enable_mdd)
1244 hw->mac.ops.enable_mdd(hw);
1248 * ixgbe_mdd_event - Handle malicious driver detection event
1249 * @hw: pointer to hardware structure
1250 * @vf_bitmap: vf bitmap of malicious vfs
1253 void ixgbe_mdd_event(struct ixgbe_hw *hw, u32 *vf_bitmap)
1255 if (hw->mac.ops.mdd_event)
1256 hw->mac.ops.mdd_event(hw, vf_bitmap);
1260 * ixgbe_restore_mdd_vf - Restore VF that was disabled during malicious driver
1262 * @hw: pointer to hardware structure
1266 void ixgbe_restore_mdd_vf(struct ixgbe_hw *hw, u32 vf)
1268 if (hw->mac.ops.restore_mdd_vf)
1269 hw->mac.ops.restore_mdd_vf(hw, vf);
1273 * ixgbe_enter_lplu - Transition to low power states
1274 * @hw: pointer to hardware structure
1276 * Configures Low Power Link Up on transition to low power states
1277 * (from D0 to non-D0).
1279 s32 ixgbe_enter_lplu(struct ixgbe_hw *hw)
1281 return ixgbe_call_func(hw, hw->phy.ops.enter_lplu, (hw),
1282 IXGBE_NOT_IMPLEMENTED);
1286 * ixgbe_read_analog_reg8 - Reads 8 bit analog register
1287 * @hw: pointer to hardware structure
1288 * @reg: analog register to read
1291 * Performs write operation to analog register specified.
1293 s32 ixgbe_read_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 *val)
1295 return ixgbe_call_func(hw, hw->mac.ops.read_analog_reg8, (hw, reg,
1296 val), IXGBE_NOT_IMPLEMENTED);
1300 * ixgbe_write_analog_reg8 - Writes 8 bit analog register
1301 * @hw: pointer to hardware structure
1302 * @reg: analog register to write
1303 * @val: value to write
1305 * Performs write operation to Atlas analog register specified.
1307 s32 ixgbe_write_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 val)
1309 return ixgbe_call_func(hw, hw->mac.ops.write_analog_reg8, (hw, reg,
1310 val), IXGBE_NOT_IMPLEMENTED);
1314 * ixgbe_init_uta_tables - Initializes Unicast Table Arrays.
1315 * @hw: pointer to hardware structure
1317 * Initializes the Unicast Table Arrays to zero on device load. This
1318 * is part of the Rx init addr execution path.
1320 s32 ixgbe_init_uta_tables(struct ixgbe_hw *hw)
1322 return ixgbe_call_func(hw, hw->mac.ops.init_uta_tables, (hw),
1323 IXGBE_NOT_IMPLEMENTED);
1327 * ixgbe_read_i2c_byte - Reads 8 bit word over I2C at specified device address
1328 * @hw: pointer to hardware structure
1329 * @byte_offset: byte offset to read
1330 * @dev_addr: I2C bus address to read from
1333 * Performs byte read operation to SFP module's EEPROM over I2C interface.
1335 s32 ixgbe_read_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr,
1338 return ixgbe_call_func(hw, hw->phy.ops.read_i2c_byte, (hw, byte_offset,
1339 dev_addr, data), IXGBE_NOT_IMPLEMENTED);
1343 * ixgbe_read_i2c_combined - Perform I2C read combined operation
1344 * @hw: pointer to the hardware structure
1345 * @addr: I2C bus address to read from
1346 * @reg: I2C device register to read from
1347 * @val: pointer to location to receive read value
1349 * Returns an error code on error.
1351 s32 ixgbe_read_i2c_combined(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 *val)
1353 return ixgbe_call_func(hw, hw->phy.ops.read_i2c_combined, (hw, addr,
1354 reg, val), IXGBE_NOT_IMPLEMENTED);
1358 * ixgbe_write_i2c_byte - Writes 8 bit word over I2C
1359 * @hw: pointer to hardware structure
1360 * @byte_offset: byte offset to write
1361 * @dev_addr: I2C bus address to write to
1362 * @data: value to write
1364 * Performs byte write operation to SFP module's EEPROM over I2C interface
1365 * at a specified device address.
1367 s32 ixgbe_write_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr,
1370 return ixgbe_call_func(hw, hw->phy.ops.write_i2c_byte, (hw, byte_offset,
1371 dev_addr, data), IXGBE_NOT_IMPLEMENTED);
1375 * ixgbe_write_i2c_combined - Perform I2C write combined operation
1376 * @hw: pointer to the hardware structure
1377 * @addr: I2C bus address to write to
1378 * @reg: I2C device register to write to
1379 * @val: value to write
1381 * Returns an error code on error.
1383 s32 ixgbe_write_i2c_combined(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 val)
1385 return ixgbe_call_func(hw, hw->phy.ops.write_i2c_combined, (hw, addr,
1386 reg, val), IXGBE_NOT_IMPLEMENTED);
1390 * ixgbe_write_i2c_eeprom - Writes 8 bit EEPROM word over I2C interface
1391 * @hw: pointer to hardware structure
1392 * @byte_offset: EEPROM byte offset to write
1393 * @eeprom_data: value to write
1395 * Performs byte write operation to SFP module's EEPROM over I2C interface.
1397 s32 ixgbe_write_i2c_eeprom(struct ixgbe_hw *hw,
1398 u8 byte_offset, u8 eeprom_data)
1400 return ixgbe_call_func(hw, hw->phy.ops.write_i2c_eeprom,
1401 (hw, byte_offset, eeprom_data),
1402 IXGBE_NOT_IMPLEMENTED);
1406 * ixgbe_read_i2c_eeprom - Reads 8 bit EEPROM word over I2C interface
1407 * @hw: pointer to hardware structure
1408 * @byte_offset: EEPROM byte offset to read
1409 * @eeprom_data: value read
1411 * Performs byte read operation to SFP module's EEPROM over I2C interface.
1413 s32 ixgbe_read_i2c_eeprom(struct ixgbe_hw *hw, u8 byte_offset, u8 *eeprom_data)
1415 return ixgbe_call_func(hw, hw->phy.ops.read_i2c_eeprom,
1416 (hw, byte_offset, eeprom_data),
1417 IXGBE_NOT_IMPLEMENTED);
1421 * ixgbe_get_supported_physical_layer - Returns physical layer type
1422 * @hw: pointer to hardware structure
1424 * Determines physical layer capabilities of the current configuration.
1426 u32 ixgbe_get_supported_physical_layer(struct ixgbe_hw *hw)
1428 return ixgbe_call_func(hw, hw->mac.ops.get_supported_physical_layer,
1429 (hw), IXGBE_PHYSICAL_LAYER_UNKNOWN);
1433 * ixgbe_enable_rx_dma - Enables Rx DMA unit, dependent on device specifics
1434 * @hw: pointer to hardware structure
1435 * @regval: bitfield to write to the Rx DMA register
1437 * Enables the Rx DMA unit of the device.
1439 s32 ixgbe_enable_rx_dma(struct ixgbe_hw *hw, u32 regval)
1441 return ixgbe_call_func(hw, hw->mac.ops.enable_rx_dma,
1442 (hw, regval), IXGBE_NOT_IMPLEMENTED);
1446 * ixgbe_disable_sec_rx_path - Stops the receive data path
1447 * @hw: pointer to hardware structure
1449 * Stops the receive data path.
1451 s32 ixgbe_disable_sec_rx_path(struct ixgbe_hw *hw)
1453 return ixgbe_call_func(hw, hw->mac.ops.disable_sec_rx_path,
1454 (hw), IXGBE_NOT_IMPLEMENTED);
1458 * ixgbe_enable_sec_rx_path - Enables the receive data path
1459 * @hw: pointer to hardware structure
1461 * Enables the receive data path.
1463 s32 ixgbe_enable_sec_rx_path(struct ixgbe_hw *hw)
1465 return ixgbe_call_func(hw, hw->mac.ops.enable_sec_rx_path,
1466 (hw), IXGBE_NOT_IMPLEMENTED);
1470 * ixgbe_acquire_swfw_semaphore - Acquire SWFW semaphore
1471 * @hw: pointer to hardware structure
1472 * @mask: Mask to specify which semaphore to acquire
1474 * Acquires the SWFW semaphore through SW_FW_SYNC register for the specified
1475 * function (CSR, PHY0, PHY1, EEPROM, Flash)
1477 s32 ixgbe_acquire_swfw_semaphore(struct ixgbe_hw *hw, u32 mask)
1479 return ixgbe_call_func(hw, hw->mac.ops.acquire_swfw_sync,
1480 (hw, mask), IXGBE_NOT_IMPLEMENTED);
1484 * ixgbe_release_swfw_semaphore - Release SWFW semaphore
1485 * @hw: pointer to hardware structure
1486 * @mask: Mask to specify which semaphore to release
1488 * Releases the SWFW semaphore through SW_FW_SYNC register for the specified
1489 * function (CSR, PHY0, PHY1, EEPROM, Flash)
1491 void ixgbe_release_swfw_semaphore(struct ixgbe_hw *hw, u32 mask)
1493 if (hw->mac.ops.release_swfw_sync)
1494 hw->mac.ops.release_swfw_sync(hw, mask);
1498 void ixgbe_disable_rx(struct ixgbe_hw *hw)
1500 if (hw->mac.ops.disable_rx)
1501 hw->mac.ops.disable_rx(hw);
1504 void ixgbe_enable_rx(struct ixgbe_hw *hw)
1506 if (hw->mac.ops.enable_rx)
1507 hw->mac.ops.enable_rx(hw);
1511 * ixgbe_set_rate_select_speed - Set module link speed
1512 * @hw: pointer to hardware structure
1513 * @speed: link speed to set
1515 * Set module link speed via the rate select.
1517 void ixgbe_set_rate_select_speed(struct ixgbe_hw *hw, ixgbe_link_speed speed)
1519 if (hw->mac.ops.set_rate_select_speed)
1520 hw->mac.ops.set_rate_select_speed(hw, speed);