1 /******************************************************************************
2 SPDX-License-Identifier: BSD-3-Clause
4 Copyright (c) 2001-2017, Intel Corporation
7 Redistribution and use in source and binary forms, with or without
8 modification, are permitted provided that the following conditions are met:
10 1. Redistributions of source code must retain the above copyright notice,
11 this list of conditions and the following disclaimer.
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14 notice, this list of conditions and the following disclaimer in the
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19 this software without specific prior written permission.
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31 POSSIBILITY OF SUCH DAMAGE.
33 ******************************************************************************/
36 #include "ixgbe_api.h"
37 #include "ixgbe_common.h"
39 #define IXGBE_EMPTY_PARAM
41 static const u32 ixgbe_mvals_base[IXGBE_MVALS_IDX_LIMIT] = {
42 IXGBE_MVALS_INIT(IXGBE_EMPTY_PARAM)
45 static const u32 ixgbe_mvals_X540[IXGBE_MVALS_IDX_LIMIT] = {
46 IXGBE_MVALS_INIT(_X540)
49 static const u32 ixgbe_mvals_X550[IXGBE_MVALS_IDX_LIMIT] = {
50 IXGBE_MVALS_INIT(_X550)
53 static const u32 ixgbe_mvals_X550EM_x[IXGBE_MVALS_IDX_LIMIT] = {
54 IXGBE_MVALS_INIT(_X550EM_x)
57 static const u32 ixgbe_mvals_X550EM_a[IXGBE_MVALS_IDX_LIMIT] = {
58 IXGBE_MVALS_INIT(_X550EM_a)
62 * ixgbe_dcb_get_rtrup2tc - read rtrup2tc reg
63 * @hw: pointer to hardware structure
64 * @map: pointer to u8 arr for returning map
66 * Read the rtrup2tc HW register and resolve its content into map
68 void ixgbe_dcb_get_rtrup2tc(struct ixgbe_hw *hw, u8 *map)
70 if (hw->mac.ops.get_rtrup2tc)
71 hw->mac.ops.get_rtrup2tc(hw, map);
75 * ixgbe_init_shared_code - Initialize the shared code
76 * @hw: pointer to hardware structure
78 * This will assign function pointers and assign the MAC type and PHY code.
79 * Does not touch the hardware. This function must be called prior to any
80 * other function in the shared code. The ixgbe_hw structure should be
81 * memset to 0 prior to calling this function. The following fields in
82 * hw structure should be filled in prior to calling this function:
83 * hw_addr, back, device_id, vendor_id, subsystem_device_id,
84 * subsystem_vendor_id, and revision_id
86 s32 ixgbe_init_shared_code(struct ixgbe_hw *hw)
90 DEBUGFUNC("ixgbe_init_shared_code");
95 ixgbe_set_mac_type(hw);
97 switch (hw->mac.type) {
98 case ixgbe_mac_82598EB:
99 status = ixgbe_init_ops_82598(hw);
101 case ixgbe_mac_82599EB:
102 status = ixgbe_init_ops_82599(hw);
105 status = ixgbe_init_ops_X540(hw);
108 status = ixgbe_init_ops_X550(hw);
110 case ixgbe_mac_X550EM_x:
111 status = ixgbe_init_ops_X550EM_x(hw);
113 case ixgbe_mac_X550EM_a:
114 status = ixgbe_init_ops_X550EM_a(hw);
117 status = IXGBE_ERR_DEVICE_NOT_SUPPORTED;
120 hw->mac.max_link_up_time = IXGBE_LINK_UP_TIME;
126 * ixgbe_set_mac_type - Sets MAC type
127 * @hw: pointer to the HW structure
129 * This function sets the mac type of the adapter based on the
130 * vendor ID and device ID stored in the hw structure.
132 s32 ixgbe_set_mac_type(struct ixgbe_hw *hw)
134 s32 ret_val = IXGBE_SUCCESS;
136 DEBUGFUNC("ixgbe_set_mac_type\n");
138 if (hw->vendor_id != IXGBE_INTEL_VENDOR_ID) {
139 ERROR_REPORT2(IXGBE_ERROR_UNSUPPORTED,
140 "Unsupported vendor id: %x", hw->vendor_id);
141 return IXGBE_ERR_DEVICE_NOT_SUPPORTED;
144 hw->mvals = ixgbe_mvals_base;
146 switch (hw->device_id) {
147 case IXGBE_DEV_ID_82598:
148 case IXGBE_DEV_ID_82598_BX:
149 case IXGBE_DEV_ID_82598AF_SINGLE_PORT:
150 case IXGBE_DEV_ID_82598AF_DUAL_PORT:
151 case IXGBE_DEV_ID_82598AT:
152 case IXGBE_DEV_ID_82598AT2:
153 case IXGBE_DEV_ID_82598EB_CX4:
154 case IXGBE_DEV_ID_82598_CX4_DUAL_PORT:
155 case IXGBE_DEV_ID_82598_DA_DUAL_PORT:
156 case IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM:
157 case IXGBE_DEV_ID_82598EB_XF_LR:
158 case IXGBE_DEV_ID_82598EB_SFP_LOM:
159 hw->mac.type = ixgbe_mac_82598EB;
161 case IXGBE_DEV_ID_82599_KX4:
162 case IXGBE_DEV_ID_82599_KX4_MEZZ:
163 case IXGBE_DEV_ID_82599_XAUI_LOM:
164 case IXGBE_DEV_ID_82599_COMBO_BACKPLANE:
165 case IXGBE_DEV_ID_82599_KR:
166 case IXGBE_DEV_ID_82599_SFP:
167 case IXGBE_DEV_ID_82599_BACKPLANE_FCOE:
168 case IXGBE_DEV_ID_82599_SFP_FCOE:
169 case IXGBE_DEV_ID_82599_SFP_EM:
170 case IXGBE_DEV_ID_82599_SFP_SF2:
171 case IXGBE_DEV_ID_82599_SFP_SF_QP:
172 case IXGBE_DEV_ID_82599_QSFP_SF_QP:
173 case IXGBE_DEV_ID_82599EN_SFP:
174 case IXGBE_DEV_ID_82599_CX4:
175 case IXGBE_DEV_ID_82599_BYPASS:
176 case IXGBE_DEV_ID_82599_T3_LOM:
177 hw->mac.type = ixgbe_mac_82599EB;
179 case IXGBE_DEV_ID_X540T:
180 case IXGBE_DEV_ID_X540T1:
181 case IXGBE_DEV_ID_X540_BYPASS:
182 hw->mac.type = ixgbe_mac_X540;
183 hw->mvals = ixgbe_mvals_X540;
185 case IXGBE_DEV_ID_X550T:
186 case IXGBE_DEV_ID_X550T1:
187 hw->mac.type = ixgbe_mac_X550;
188 hw->mvals = ixgbe_mvals_X550;
190 case IXGBE_DEV_ID_X550EM_X_KX4:
191 case IXGBE_DEV_ID_X550EM_X_KR:
192 case IXGBE_DEV_ID_X550EM_X_10G_T:
193 case IXGBE_DEV_ID_X550EM_X_1G_T:
194 case IXGBE_DEV_ID_X550EM_X_SFP:
195 case IXGBE_DEV_ID_X550EM_X_XFI:
196 hw->mac.type = ixgbe_mac_X550EM_x;
197 hw->mvals = ixgbe_mvals_X550EM_x;
199 case IXGBE_DEV_ID_X550EM_A_KR:
200 case IXGBE_DEV_ID_X550EM_A_KR_L:
201 case IXGBE_DEV_ID_X550EM_A_SFP_N:
202 case IXGBE_DEV_ID_X550EM_A_SGMII:
203 case IXGBE_DEV_ID_X550EM_A_SGMII_L:
204 case IXGBE_DEV_ID_X550EM_A_1G_T:
205 case IXGBE_DEV_ID_X550EM_A_1G_T_L:
206 case IXGBE_DEV_ID_X550EM_A_10G_T:
207 case IXGBE_DEV_ID_X550EM_A_QSFP:
208 case IXGBE_DEV_ID_X550EM_A_QSFP_N:
209 case IXGBE_DEV_ID_X550EM_A_SFP:
210 hw->mac.type = ixgbe_mac_X550EM_a;
211 hw->mvals = ixgbe_mvals_X550EM_a;
214 ret_val = IXGBE_ERR_DEVICE_NOT_SUPPORTED;
215 ERROR_REPORT2(IXGBE_ERROR_UNSUPPORTED,
216 "Unsupported device id: %x",
221 DEBUGOUT2("ixgbe_set_mac_type found mac: %d, returns: %d\n",
222 hw->mac.type, ret_val);
227 * ixgbe_init_hw - Initialize the hardware
228 * @hw: pointer to hardware structure
230 * Initialize the hardware by resetting and then starting the hardware
232 s32 ixgbe_init_hw(struct ixgbe_hw *hw)
234 return ixgbe_call_func(hw, hw->mac.ops.init_hw, (hw),
235 IXGBE_NOT_IMPLEMENTED);
239 * ixgbe_reset_hw - Performs a hardware reset
240 * @hw: pointer to hardware structure
242 * Resets the hardware by resetting the transmit and receive units, masks and
243 * clears all interrupts, performs a PHY reset, and performs a MAC reset
245 s32 ixgbe_reset_hw(struct ixgbe_hw *hw)
247 return ixgbe_call_func(hw, hw->mac.ops.reset_hw, (hw),
248 IXGBE_NOT_IMPLEMENTED);
252 * ixgbe_start_hw - Prepares hardware for Rx/Tx
253 * @hw: pointer to hardware structure
255 * Starts the hardware by filling the bus info structure and media type,
256 * clears all on chip counters, initializes receive address registers,
257 * multicast table, VLAN filter table, calls routine to setup link and
258 * flow control settings, and leaves transmit and receive units disabled
261 s32 ixgbe_start_hw(struct ixgbe_hw *hw)
263 return ixgbe_call_func(hw, hw->mac.ops.start_hw, (hw),
264 IXGBE_NOT_IMPLEMENTED);
268 * ixgbe_enable_relaxed_ordering - Enables tx relaxed ordering,
269 * which is disabled by default in ixgbe_start_hw();
271 * @hw: pointer to hardware structure
273 * Enable relaxed ordering;
275 void ixgbe_enable_relaxed_ordering(struct ixgbe_hw *hw)
277 if (hw->mac.ops.enable_relaxed_ordering)
278 hw->mac.ops.enable_relaxed_ordering(hw);
282 * ixgbe_clear_hw_cntrs - Clear hardware counters
283 * @hw: pointer to hardware structure
285 * Clears all hardware statistics counters by reading them from the hardware
286 * Statistics counters are clear on read.
288 s32 ixgbe_clear_hw_cntrs(struct ixgbe_hw *hw)
290 return ixgbe_call_func(hw, hw->mac.ops.clear_hw_cntrs, (hw),
291 IXGBE_NOT_IMPLEMENTED);
295 * ixgbe_get_media_type - Get media type
296 * @hw: pointer to hardware structure
298 * Returns the media type (fiber, copper, backplane)
300 enum ixgbe_media_type ixgbe_get_media_type(struct ixgbe_hw *hw)
302 return ixgbe_call_func(hw, hw->mac.ops.get_media_type, (hw),
303 ixgbe_media_type_unknown);
307 * ixgbe_get_mac_addr - Get MAC address
308 * @hw: pointer to hardware structure
309 * @mac_addr: Adapter MAC address
311 * Reads the adapter's MAC address from the first Receive Address Register
312 * (RAR0) A reset of the adapter must have been performed prior to calling
313 * this function in order for the MAC address to have been loaded from the
316 s32 ixgbe_get_mac_addr(struct ixgbe_hw *hw, u8 *mac_addr)
318 return ixgbe_call_func(hw, hw->mac.ops.get_mac_addr,
319 (hw, mac_addr), IXGBE_NOT_IMPLEMENTED);
323 * ixgbe_get_san_mac_addr - Get SAN MAC address
324 * @hw: pointer to hardware structure
325 * @san_mac_addr: SAN MAC address
327 * Reads the SAN MAC address from the EEPROM, if it's available. This is
328 * per-port, so set_lan_id() must be called before reading the addresses.
330 s32 ixgbe_get_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr)
332 return ixgbe_call_func(hw, hw->mac.ops.get_san_mac_addr,
333 (hw, san_mac_addr), IXGBE_NOT_IMPLEMENTED);
337 * ixgbe_set_san_mac_addr - Write a SAN MAC address
338 * @hw: pointer to hardware structure
339 * @san_mac_addr: SAN MAC address
341 * Writes A SAN MAC address to the EEPROM.
343 s32 ixgbe_set_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr)
345 return ixgbe_call_func(hw, hw->mac.ops.set_san_mac_addr,
346 (hw, san_mac_addr), IXGBE_NOT_IMPLEMENTED);
350 * ixgbe_get_device_caps - Get additional device capabilities
351 * @hw: pointer to hardware structure
352 * @device_caps: the EEPROM word for device capabilities
354 * Reads the extra device capabilities from the EEPROM
356 s32 ixgbe_get_device_caps(struct ixgbe_hw *hw, u16 *device_caps)
358 return ixgbe_call_func(hw, hw->mac.ops.get_device_caps,
359 (hw, device_caps), IXGBE_NOT_IMPLEMENTED);
363 * ixgbe_get_wwn_prefix - Get alternative WWNN/WWPN prefix from the EEPROM
364 * @hw: pointer to hardware structure
365 * @wwnn_prefix: the alternative WWNN prefix
366 * @wwpn_prefix: the alternative WWPN prefix
368 * This function will read the EEPROM from the alternative SAN MAC address
369 * block to check the support for the alternative WWNN/WWPN prefix support.
371 s32 ixgbe_get_wwn_prefix(struct ixgbe_hw *hw, u16 *wwnn_prefix,
374 return ixgbe_call_func(hw, hw->mac.ops.get_wwn_prefix,
375 (hw, wwnn_prefix, wwpn_prefix),
376 IXGBE_NOT_IMPLEMENTED);
380 * ixgbe_get_fcoe_boot_status - Get FCOE boot status from EEPROM
381 * @hw: pointer to hardware structure
382 * @bs: the fcoe boot status
384 * This function will read the FCOE boot status from the iSCSI FCOE block
386 s32 ixgbe_get_fcoe_boot_status(struct ixgbe_hw *hw, u16 *bs)
388 return ixgbe_call_func(hw, hw->mac.ops.get_fcoe_boot_status,
390 IXGBE_NOT_IMPLEMENTED);
394 * ixgbe_get_bus_info - Set PCI bus info
395 * @hw: pointer to hardware structure
397 * Sets the PCI bus info (speed, width, type) within the ixgbe_hw structure
399 s32 ixgbe_get_bus_info(struct ixgbe_hw *hw)
401 return ixgbe_call_func(hw, hw->mac.ops.get_bus_info, (hw),
402 IXGBE_NOT_IMPLEMENTED);
406 * ixgbe_get_num_of_tx_queues - Get Tx queues
407 * @hw: pointer to hardware structure
409 * Returns the number of transmit queues for the given adapter.
411 u32 ixgbe_get_num_of_tx_queues(struct ixgbe_hw *hw)
413 return hw->mac.max_tx_queues;
417 * ixgbe_get_num_of_rx_queues - Get Rx queues
418 * @hw: pointer to hardware structure
420 * Returns the number of receive queues for the given adapter.
422 u32 ixgbe_get_num_of_rx_queues(struct ixgbe_hw *hw)
424 return hw->mac.max_rx_queues;
428 * ixgbe_stop_adapter - Disable Rx/Tx units
429 * @hw: pointer to hardware structure
431 * Sets the adapter_stopped flag within ixgbe_hw struct. Clears interrupts,
432 * disables transmit and receive units. The adapter_stopped flag is used by
433 * the shared code and drivers to determine if the adapter is in a stopped
434 * state and should not touch the hardware.
436 s32 ixgbe_stop_adapter(struct ixgbe_hw *hw)
438 return ixgbe_call_func(hw, hw->mac.ops.stop_adapter, (hw),
439 IXGBE_NOT_IMPLEMENTED);
443 * ixgbe_read_pba_string - Reads part number string from EEPROM
444 * @hw: pointer to hardware structure
445 * @pba_num: stores the part number string from the EEPROM
446 * @pba_num_size: part number string buffer length
448 * Reads the part number string from the EEPROM.
450 s32 ixgbe_read_pba_string(struct ixgbe_hw *hw, u8 *pba_num, u32 pba_num_size)
452 return ixgbe_read_pba_string_generic(hw, pba_num, pba_num_size);
456 * ixgbe_read_pba_num - Reads part number from EEPROM
457 * @hw: pointer to hardware structure
458 * @pba_num: stores the part number from the EEPROM
460 * Reads the part number from the EEPROM.
462 s32 ixgbe_read_pba_num(struct ixgbe_hw *hw, u32 *pba_num)
464 return ixgbe_read_pba_num_generic(hw, pba_num);
468 * ixgbe_identify_phy - Get PHY type
469 * @hw: pointer to hardware structure
471 * Determines the physical layer module found on the current adapter.
473 s32 ixgbe_identify_phy(struct ixgbe_hw *hw)
475 s32 status = IXGBE_SUCCESS;
477 if (hw->phy.type == ixgbe_phy_unknown) {
478 status = ixgbe_call_func(hw, hw->phy.ops.identify, (hw),
479 IXGBE_NOT_IMPLEMENTED);
486 * ixgbe_reset_phy - Perform a PHY reset
487 * @hw: pointer to hardware structure
489 s32 ixgbe_reset_phy(struct ixgbe_hw *hw)
491 s32 status = IXGBE_SUCCESS;
493 if (hw->phy.type == ixgbe_phy_unknown) {
494 if (ixgbe_identify_phy(hw) != IXGBE_SUCCESS)
495 status = IXGBE_ERR_PHY;
498 if (status == IXGBE_SUCCESS) {
499 status = ixgbe_call_func(hw, hw->phy.ops.reset, (hw),
500 IXGBE_NOT_IMPLEMENTED);
506 * ixgbe_get_phy_firmware_version -
507 * @hw: pointer to hardware structure
508 * @firmware_version: pointer to firmware version
510 s32 ixgbe_get_phy_firmware_version(struct ixgbe_hw *hw, u16 *firmware_version)
512 s32 status = IXGBE_SUCCESS;
514 status = ixgbe_call_func(hw, hw->phy.ops.get_firmware_version,
515 (hw, firmware_version),
516 IXGBE_NOT_IMPLEMENTED);
521 * ixgbe_read_phy_reg - Read PHY register
522 * @hw: pointer to hardware structure
523 * @reg_addr: 32 bit address of PHY register to read
524 * @device_type: type of device you want to communicate with
525 * @phy_data: Pointer to read data from PHY register
527 * Reads a value from a specified PHY register
529 s32 ixgbe_read_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
533 ixgbe_identify_phy(hw);
535 return ixgbe_call_func(hw, hw->phy.ops.read_reg, (hw, reg_addr,
536 device_type, phy_data), IXGBE_NOT_IMPLEMENTED);
540 * ixgbe_write_phy_reg - Write PHY register
541 * @hw: pointer to hardware structure
542 * @reg_addr: 32 bit PHY register to write
543 * @device_type: type of device you want to communicate with
544 * @phy_data: Data to write to the PHY register
546 * Writes a value to specified PHY register
548 s32 ixgbe_write_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
552 ixgbe_identify_phy(hw);
554 return ixgbe_call_func(hw, hw->phy.ops.write_reg, (hw, reg_addr,
555 device_type, phy_data), IXGBE_NOT_IMPLEMENTED);
559 * ixgbe_setup_phy_link - Restart PHY autoneg
560 * @hw: pointer to hardware structure
562 * Restart autonegotiation and PHY and waits for completion.
564 s32 ixgbe_setup_phy_link(struct ixgbe_hw *hw)
566 return ixgbe_call_func(hw, hw->phy.ops.setup_link, (hw),
567 IXGBE_NOT_IMPLEMENTED);
571 * ixgbe_setup_internal_phy - Configure integrated PHY
572 * @hw: pointer to hardware structure
574 * Reconfigure the integrated PHY in order to enable talk to the external PHY.
575 * Returns success if not implemented, since nothing needs to be done in this
578 s32 ixgbe_setup_internal_phy(struct ixgbe_hw *hw)
580 return ixgbe_call_func(hw, hw->phy.ops.setup_internal_link, (hw),
585 * ixgbe_check_phy_link - Determine link and speed status
586 * @hw: pointer to hardware structure
588 * @link_up: TRUE when link is up
590 * Reads a PHY register to determine if link is up and the current speed for
593 s32 ixgbe_check_phy_link(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
596 return ixgbe_call_func(hw, hw->phy.ops.check_link, (hw, speed,
597 link_up), IXGBE_NOT_IMPLEMENTED);
601 * ixgbe_setup_phy_link_speed - Set auto advertise
602 * @hw: pointer to hardware structure
603 * @speed: new link speed
604 * @autoneg_wait_to_complete: TRUE when waiting for completion is needed
606 * Sets the auto advertised capabilities
608 s32 ixgbe_setup_phy_link_speed(struct ixgbe_hw *hw, ixgbe_link_speed speed,
609 bool autoneg_wait_to_complete)
611 return ixgbe_call_func(hw, hw->phy.ops.setup_link_speed, (hw, speed,
612 autoneg_wait_to_complete),
613 IXGBE_NOT_IMPLEMENTED);
617 * ixgbe_set_phy_power - Control the phy power state
618 * @hw: pointer to hardware structure
619 * @on: TRUE for on, FALSE for off
621 s32 ixgbe_set_phy_power(struct ixgbe_hw *hw, bool on)
623 return ixgbe_call_func(hw, hw->phy.ops.set_phy_power, (hw, on),
624 IXGBE_NOT_IMPLEMENTED);
628 * ixgbe_check_link - Get link and speed status
629 * @hw: pointer to hardware structure
630 * @speed: pointer to link speed
631 * @link_up: TRUE when link is up
632 * @link_up_wait_to_complete: bool used to wait for link up or not
634 * Reads the links register to determine if link is up and the current speed
636 s32 ixgbe_check_link(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
637 bool *link_up, bool link_up_wait_to_complete)
639 return ixgbe_call_func(hw, hw->mac.ops.check_link, (hw, speed,
640 link_up, link_up_wait_to_complete),
641 IXGBE_NOT_IMPLEMENTED);
645 * ixgbe_disable_tx_laser - Disable Tx laser
646 * @hw: pointer to hardware structure
648 * If the driver needs to disable the laser on SFI optics.
650 void ixgbe_disable_tx_laser(struct ixgbe_hw *hw)
652 if (hw->mac.ops.disable_tx_laser)
653 hw->mac.ops.disable_tx_laser(hw);
657 * ixgbe_enable_tx_laser - Enable Tx laser
658 * @hw: pointer to hardware structure
660 * If the driver needs to enable the laser on SFI optics.
662 void ixgbe_enable_tx_laser(struct ixgbe_hw *hw)
664 if (hw->mac.ops.enable_tx_laser)
665 hw->mac.ops.enable_tx_laser(hw);
669 * ixgbe_flap_tx_laser - flap Tx laser to start autotry process
670 * @hw: pointer to hardware structure
672 * When the driver changes the link speeds that it can support then
673 * flap the tx laser to alert the link partner to start autotry
674 * process on its end.
676 void ixgbe_flap_tx_laser(struct ixgbe_hw *hw)
678 if (hw->mac.ops.flap_tx_laser)
679 hw->mac.ops.flap_tx_laser(hw);
683 * ixgbe_setup_link - Set link speed
684 * @hw: pointer to hardware structure
685 * @speed: new link speed
686 * @autoneg_wait_to_complete: TRUE when waiting for completion is needed
688 * Configures link settings. Restarts the link.
689 * Performs autonegotiation if needed.
691 s32 ixgbe_setup_link(struct ixgbe_hw *hw, ixgbe_link_speed speed,
692 bool autoneg_wait_to_complete)
694 return ixgbe_call_func(hw, hw->mac.ops.setup_link, (hw, speed,
695 autoneg_wait_to_complete),
696 IXGBE_NOT_IMPLEMENTED);
700 * ixgbe_setup_mac_link - Set link speed
701 * @hw: pointer to hardware structure
702 * @speed: new link speed
703 * @autoneg_wait_to_complete: TRUE when waiting for completion is needed
705 * Configures link settings. Restarts the link.
706 * Performs autonegotiation if needed.
708 s32 ixgbe_setup_mac_link(struct ixgbe_hw *hw, ixgbe_link_speed speed,
709 bool autoneg_wait_to_complete)
711 return ixgbe_call_func(hw, hw->mac.ops.setup_mac_link, (hw, speed,
712 autoneg_wait_to_complete),
713 IXGBE_NOT_IMPLEMENTED);
717 * ixgbe_get_link_capabilities - Returns link capabilities
718 * @hw: pointer to hardware structure
719 * @speed: link speed capabilities
720 * @autoneg: TRUE when autoneg or autotry is enabled
722 * Determines the link capabilities of the current configuration.
724 s32 ixgbe_get_link_capabilities(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
727 return ixgbe_call_func(hw, hw->mac.ops.get_link_capabilities, (hw,
728 speed, autoneg), IXGBE_NOT_IMPLEMENTED);
732 * ixgbe_led_on - Turn on LEDs
733 * @hw: pointer to hardware structure
734 * @index: led number to turn on
736 * Turns on the software controllable LEDs.
738 s32 ixgbe_led_on(struct ixgbe_hw *hw, u32 index)
740 return ixgbe_call_func(hw, hw->mac.ops.led_on, (hw, index),
741 IXGBE_NOT_IMPLEMENTED);
745 * ixgbe_led_off - Turn off LEDs
746 * @hw: pointer to hardware structure
747 * @index: led number to turn off
749 * Turns off the software controllable LEDs.
751 s32 ixgbe_led_off(struct ixgbe_hw *hw, u32 index)
753 return ixgbe_call_func(hw, hw->mac.ops.led_off, (hw, index),
754 IXGBE_NOT_IMPLEMENTED);
758 * ixgbe_blink_led_start - Blink LEDs
759 * @hw: pointer to hardware structure
760 * @index: led number to blink
762 * Blink LED based on index.
764 s32 ixgbe_blink_led_start(struct ixgbe_hw *hw, u32 index)
766 return ixgbe_call_func(hw, hw->mac.ops.blink_led_start, (hw, index),
767 IXGBE_NOT_IMPLEMENTED);
771 * ixgbe_blink_led_stop - Stop blinking LEDs
772 * @hw: pointer to hardware structure
773 * @index: led number to stop
775 * Stop blinking LED based on index.
777 s32 ixgbe_blink_led_stop(struct ixgbe_hw *hw, u32 index)
779 return ixgbe_call_func(hw, hw->mac.ops.blink_led_stop, (hw, index),
780 IXGBE_NOT_IMPLEMENTED);
784 * ixgbe_init_eeprom_params - Initialize EEPROM parameters
785 * @hw: pointer to hardware structure
787 * Initializes the EEPROM parameters ixgbe_eeprom_info within the
788 * ixgbe_hw struct in order to set up EEPROM access.
790 s32 ixgbe_init_eeprom_params(struct ixgbe_hw *hw)
792 return ixgbe_call_func(hw, hw->eeprom.ops.init_params, (hw),
793 IXGBE_NOT_IMPLEMENTED);
798 * ixgbe_write_eeprom - Write word to EEPROM
799 * @hw: pointer to hardware structure
800 * @offset: offset within the EEPROM to be written to
801 * @data: 16 bit word to be written to the EEPROM
803 * Writes 16 bit value to EEPROM. If ixgbe_eeprom_update_checksum is not
804 * called after this function, the EEPROM will most likely contain an
807 s32 ixgbe_write_eeprom(struct ixgbe_hw *hw, u16 offset, u16 data)
809 return ixgbe_call_func(hw, hw->eeprom.ops.write, (hw, offset, data),
810 IXGBE_NOT_IMPLEMENTED);
814 * ixgbe_write_eeprom_buffer - Write word(s) to EEPROM
815 * @hw: pointer to hardware structure
816 * @offset: offset within the EEPROM to be written to
817 * @data: 16 bit word(s) to be written to the EEPROM
818 * @words: number of words
820 * Writes 16 bit word(s) to EEPROM. If ixgbe_eeprom_update_checksum is not
821 * called after this function, the EEPROM will most likely contain an
824 s32 ixgbe_write_eeprom_buffer(struct ixgbe_hw *hw, u16 offset, u16 words,
827 return ixgbe_call_func(hw, hw->eeprom.ops.write_buffer,
828 (hw, offset, words, data),
829 IXGBE_NOT_IMPLEMENTED);
833 * ixgbe_read_eeprom - Read word from EEPROM
834 * @hw: pointer to hardware structure
835 * @offset: offset within the EEPROM to be read
836 * @data: read 16 bit value from EEPROM
838 * Reads 16 bit value from EEPROM
840 s32 ixgbe_read_eeprom(struct ixgbe_hw *hw, u16 offset, u16 *data)
842 return ixgbe_call_func(hw, hw->eeprom.ops.read, (hw, offset, data),
843 IXGBE_NOT_IMPLEMENTED);
847 * ixgbe_read_eeprom_buffer - Read word(s) from EEPROM
848 * @hw: pointer to hardware structure
849 * @offset: offset within the EEPROM to be read
850 * @data: read 16 bit word(s) from EEPROM
851 * @words: number of words
853 * Reads 16 bit word(s) from EEPROM
855 s32 ixgbe_read_eeprom_buffer(struct ixgbe_hw *hw, u16 offset,
856 u16 words, u16 *data)
858 return ixgbe_call_func(hw, hw->eeprom.ops.read_buffer,
859 (hw, offset, words, data),
860 IXGBE_NOT_IMPLEMENTED);
864 * ixgbe_validate_eeprom_checksum - Validate EEPROM checksum
865 * @hw: pointer to hardware structure
866 * @checksum_val: calculated checksum
868 * Performs checksum calculation and validates the EEPROM checksum
870 s32 ixgbe_validate_eeprom_checksum(struct ixgbe_hw *hw, u16 *checksum_val)
872 return ixgbe_call_func(hw, hw->eeprom.ops.validate_checksum,
873 (hw, checksum_val), IXGBE_NOT_IMPLEMENTED);
877 * ixgbe_eeprom_update_checksum - Updates the EEPROM checksum
878 * @hw: pointer to hardware structure
880 s32 ixgbe_update_eeprom_checksum(struct ixgbe_hw *hw)
882 return ixgbe_call_func(hw, hw->eeprom.ops.update_checksum, (hw),
883 IXGBE_NOT_IMPLEMENTED);
887 * ixgbe_insert_mac_addr - Find a RAR for this mac address
888 * @hw: pointer to hardware structure
889 * @addr: Address to put into receive address register
890 * @vmdq: VMDq pool to assign
892 * Puts an ethernet address into a receive address register, or
893 * finds the rar that it is already in; adds to the pool list
895 s32 ixgbe_insert_mac_addr(struct ixgbe_hw *hw, u8 *addr, u32 vmdq)
897 return ixgbe_call_func(hw, hw->mac.ops.insert_mac_addr,
899 IXGBE_NOT_IMPLEMENTED);
903 * ixgbe_set_rar - Set Rx address register
904 * @hw: pointer to hardware structure
905 * @index: Receive address register to write
906 * @addr: Address to put into receive address register
908 * @enable_addr: set flag that address is active
910 * Puts an ethernet address into a receive address register.
912 s32 ixgbe_set_rar(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
915 return ixgbe_call_func(hw, hw->mac.ops.set_rar, (hw, index, addr, vmdq,
916 enable_addr), IXGBE_NOT_IMPLEMENTED);
920 * ixgbe_clear_rar - Clear Rx address register
921 * @hw: pointer to hardware structure
922 * @index: Receive address register to write
924 * Puts an ethernet address into a receive address register.
926 s32 ixgbe_clear_rar(struct ixgbe_hw *hw, u32 index)
928 return ixgbe_call_func(hw, hw->mac.ops.clear_rar, (hw, index),
929 IXGBE_NOT_IMPLEMENTED);
933 * ixgbe_set_vmdq - Associate a VMDq index with a receive address
934 * @hw: pointer to hardware structure
935 * @rar: receive address register index to associate with VMDq index
936 * @vmdq: VMDq set or pool index
938 s32 ixgbe_set_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq)
940 return ixgbe_call_func(hw, hw->mac.ops.set_vmdq, (hw, rar, vmdq),
941 IXGBE_NOT_IMPLEMENTED);
946 * ixgbe_set_vmdq_san_mac - Associate VMDq index 127 with a receive address
947 * @hw: pointer to hardware structure
948 * @vmdq: VMDq default pool index
950 s32 ixgbe_set_vmdq_san_mac(struct ixgbe_hw *hw, u32 vmdq)
952 return ixgbe_call_func(hw, hw->mac.ops.set_vmdq_san_mac,
953 (hw, vmdq), IXGBE_NOT_IMPLEMENTED);
957 * ixgbe_clear_vmdq - Disassociate a VMDq index from a receive address
958 * @hw: pointer to hardware structure
959 * @rar: receive address register index to disassociate with VMDq index
960 * @vmdq: VMDq set or pool index
962 s32 ixgbe_clear_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq)
964 return ixgbe_call_func(hw, hw->mac.ops.clear_vmdq, (hw, rar, vmdq),
965 IXGBE_NOT_IMPLEMENTED);
969 * ixgbe_init_rx_addrs - Initializes receive address filters.
970 * @hw: pointer to hardware structure
972 * Places the MAC address in receive address register 0 and clears the rest
973 * of the receive address registers. Clears the multicast table. Assumes
974 * the receiver is in reset when the routine is called.
976 s32 ixgbe_init_rx_addrs(struct ixgbe_hw *hw)
978 return ixgbe_call_func(hw, hw->mac.ops.init_rx_addrs, (hw),
979 IXGBE_NOT_IMPLEMENTED);
983 * ixgbe_get_num_rx_addrs - Returns the number of RAR entries.
984 * @hw: pointer to hardware structure
986 u32 ixgbe_get_num_rx_addrs(struct ixgbe_hw *hw)
988 return hw->mac.num_rar_entries;
992 * ixgbe_update_uc_addr_list - Updates the MAC's list of secondary addresses
993 * @hw: pointer to hardware structure
994 * @addr_list: the list of new multicast addresses
995 * @addr_count: number of addresses
996 * @func: iterator function to walk the multicast address list
998 * The given list replaces any existing list. Clears the secondary addrs from
999 * receive address registers. Uses unused receive address registers for the
1000 * first secondary addresses, and falls back to promiscuous mode as needed.
1002 s32 ixgbe_update_uc_addr_list(struct ixgbe_hw *hw, u8 *addr_list,
1003 u32 addr_count, ixgbe_mc_addr_itr func)
1005 return ixgbe_call_func(hw, hw->mac.ops.update_uc_addr_list, (hw,
1006 addr_list, addr_count, func),
1007 IXGBE_NOT_IMPLEMENTED);
1011 * ixgbe_update_mc_addr_list - Updates the MAC's list of multicast addresses
1012 * @hw: pointer to hardware structure
1013 * @mc_addr_list: the list of new multicast addresses
1014 * @mc_addr_count: number of addresses
1015 * @func: iterator function to walk the multicast address list
1016 * @clear: flag, when set clears the table beforehand
1018 * The given list replaces any existing list. Clears the MC addrs from receive
1019 * address registers and the multicast table. Uses unused receive address
1020 * registers for the first multicast addresses, and hashes the rest into the
1023 s32 ixgbe_update_mc_addr_list(struct ixgbe_hw *hw, u8 *mc_addr_list,
1024 u32 mc_addr_count, ixgbe_mc_addr_itr func,
1027 return ixgbe_call_func(hw, hw->mac.ops.update_mc_addr_list, (hw,
1028 mc_addr_list, mc_addr_count, func, clear),
1029 IXGBE_NOT_IMPLEMENTED);
1033 * ixgbe_enable_mc - Enable multicast address in RAR
1034 * @hw: pointer to hardware structure
1036 * Enables multicast address in RAR and the use of the multicast hash table.
1038 s32 ixgbe_enable_mc(struct ixgbe_hw *hw)
1040 return ixgbe_call_func(hw, hw->mac.ops.enable_mc, (hw),
1041 IXGBE_NOT_IMPLEMENTED);
1045 * ixgbe_disable_mc - Disable multicast address in RAR
1046 * @hw: pointer to hardware structure
1048 * Disables multicast address in RAR and the use of the multicast hash table.
1050 s32 ixgbe_disable_mc(struct ixgbe_hw *hw)
1052 return ixgbe_call_func(hw, hw->mac.ops.disable_mc, (hw),
1053 IXGBE_NOT_IMPLEMENTED);
1057 * ixgbe_clear_vfta - Clear VLAN filter table
1058 * @hw: pointer to hardware structure
1060 * Clears the VLAN filer table, and the VMDq index associated with the filter
1062 s32 ixgbe_clear_vfta(struct ixgbe_hw *hw)
1064 return ixgbe_call_func(hw, hw->mac.ops.clear_vfta, (hw),
1065 IXGBE_NOT_IMPLEMENTED);
1069 * ixgbe_set_vfta - Set VLAN filter table
1070 * @hw: pointer to hardware structure
1071 * @vlan: VLAN id to write to VLAN filter
1072 * @vind: VMDq output index that maps queue to VLAN id in VLVFB
1073 * @vlan_on: boolean flag to turn on/off VLAN
1074 * @vlvf_bypass: boolean flag indicating updating the default pool is okay
1076 * Turn on/off specified VLAN in the VLAN filter table.
1078 s32 ixgbe_set_vfta(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on,
1081 return ixgbe_call_func(hw, hw->mac.ops.set_vfta, (hw, vlan, vind,
1082 vlan_on, vlvf_bypass), IXGBE_NOT_IMPLEMENTED);
1086 * ixgbe_set_vlvf - Set VLAN Pool Filter
1087 * @hw: pointer to hardware structure
1088 * @vlan: VLAN id to write to VLAN filter
1089 * @vind: VMDq output index that maps queue to VLAN id in VLVFB
1090 * @vlan_on: boolean flag to turn on/off VLAN in VLVF
1091 * @vfta_delta: pointer to the difference between the current value of VFTA
1092 * and the desired value
1093 * @vfta: the desired value of the VFTA
1094 * @vlvf_bypass: boolean flag indicating updating the default pool is okay
1096 * Turn on/off specified bit in VLVF table.
1098 s32 ixgbe_set_vlvf(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on,
1099 u32 *vfta_delta, u32 vfta, bool vlvf_bypass)
1101 return ixgbe_call_func(hw, hw->mac.ops.set_vlvf, (hw, vlan, vind,
1102 vlan_on, vfta_delta, vfta, vlvf_bypass),
1103 IXGBE_NOT_IMPLEMENTED);
1107 * ixgbe_fc_enable - Enable flow control
1108 * @hw: pointer to hardware structure
1110 * Configures the flow control settings based on SW configuration.
1112 s32 ixgbe_fc_enable(struct ixgbe_hw *hw)
1114 return ixgbe_call_func(hw, hw->mac.ops.fc_enable, (hw),
1115 IXGBE_NOT_IMPLEMENTED);
1119 * ixgbe_setup_fc - Set up flow control
1120 * @hw: pointer to hardware structure
1122 * Called at init time to set up flow control.
1124 s32 ixgbe_setup_fc(struct ixgbe_hw *hw)
1126 return ixgbe_call_func(hw, hw->mac.ops.setup_fc, (hw),
1127 IXGBE_NOT_IMPLEMENTED);
1131 * ixgbe_set_fw_drv_ver - Try to send the driver version number FW
1132 * @hw: pointer to hardware structure
1133 * @maj: driver major number to be sent to firmware
1134 * @min: driver minor number to be sent to firmware
1135 * @build: driver build number to be sent to firmware
1136 * @ver: driver version number to be sent to firmware
1137 * @len: length of driver_ver string
1138 * @driver_ver: driver string
1140 s32 ixgbe_set_fw_drv_ver(struct ixgbe_hw *hw, u8 maj, u8 min, u8 build,
1141 u8 ver, u16 len, char *driver_ver)
1143 return ixgbe_call_func(hw, hw->mac.ops.set_fw_drv_ver, (hw, maj, min,
1144 build, ver, len, driver_ver),
1145 IXGBE_NOT_IMPLEMENTED);
1151 * ixgbe_dmac_config - Configure DMA Coalescing registers.
1152 * @hw: pointer to hardware structure
1154 * Configure DMA coalescing. If enabling dmac, dmac is activated.
1155 * When disabling dmac, dmac enable dmac bit is cleared.
1157 s32 ixgbe_dmac_config(struct ixgbe_hw *hw)
1159 return ixgbe_call_func(hw, hw->mac.ops.dmac_config, (hw),
1160 IXGBE_NOT_IMPLEMENTED);
1164 * ixgbe_dmac_update_tcs - Configure DMA Coalescing registers.
1165 * @hw: pointer to hardware structure
1167 * Disables dmac, updates per TC settings, and then enable dmac.
1169 s32 ixgbe_dmac_update_tcs(struct ixgbe_hw *hw)
1171 return ixgbe_call_func(hw, hw->mac.ops.dmac_update_tcs, (hw),
1172 IXGBE_NOT_IMPLEMENTED);
1176 * ixgbe_dmac_config_tcs - Configure DMA Coalescing registers.
1177 * @hw: pointer to hardware structure
1179 * Configure DMA coalescing threshold per TC and set high priority bit for
1180 * FCOE TC. The dmac enable bit must be cleared before configuring.
1182 s32 ixgbe_dmac_config_tcs(struct ixgbe_hw *hw)
1184 return ixgbe_call_func(hw, hw->mac.ops.dmac_config_tcs, (hw),
1185 IXGBE_NOT_IMPLEMENTED);
1189 * ixgbe_setup_eee - Enable/disable EEE support
1190 * @hw: pointer to the HW structure
1191 * @enable_eee: boolean flag to enable EEE
1193 * Enable/disable EEE based on enable_ee flag.
1194 * Auto-negotiation must be started after BASE-T EEE bits in PHY register 7.3C
1198 s32 ixgbe_setup_eee(struct ixgbe_hw *hw, bool enable_eee)
1200 return ixgbe_call_func(hw, hw->mac.ops.setup_eee, (hw, enable_eee),
1201 IXGBE_NOT_IMPLEMENTED);
1205 * ixgbe_set_source_address_pruning - Enable/Disable source address pruning
1206 * @hw: pointer to hardware structure
1207 * @enable: enable or disable source address pruning
1208 * @pool: Rx pool - Rx pool to toggle source address pruning
1210 void ixgbe_set_source_address_pruning(struct ixgbe_hw *hw, bool enable,
1213 if (hw->mac.ops.set_source_address_pruning)
1214 hw->mac.ops.set_source_address_pruning(hw, enable, pool);
1218 * ixgbe_set_ethertype_anti_spoofing - Enable/Disable Ethertype anti-spoofing
1219 * @hw: pointer to hardware structure
1220 * @enable: enable or disable switch for Ethertype anti-spoofing
1221 * @vf: Virtual Function pool - VF Pool to set for Ethertype anti-spoofing
1224 void ixgbe_set_ethertype_anti_spoofing(struct ixgbe_hw *hw, bool enable, int vf)
1226 if (hw->mac.ops.set_ethertype_anti_spoofing)
1227 hw->mac.ops.set_ethertype_anti_spoofing(hw, enable, vf);
1231 * ixgbe_read_iosf_sb_reg - Read 32 bit PHY register
1232 * @hw: pointer to hardware structure
1233 * @reg_addr: 32 bit address of PHY register to read
1234 * @device_type: type of device you want to communicate with
1235 * @phy_data: Pointer to read data from PHY register
1237 * Reads a value from a specified PHY register
1239 s32 ixgbe_read_iosf_sb_reg(struct ixgbe_hw *hw, u32 reg_addr,
1240 u32 device_type, u32 *phy_data)
1242 return ixgbe_call_func(hw, hw->mac.ops.read_iosf_sb_reg, (hw, reg_addr,
1243 device_type, phy_data), IXGBE_NOT_IMPLEMENTED);
1247 * ixgbe_write_iosf_sb_reg - Write 32 bit register through IOSF Sideband
1248 * @hw: pointer to hardware structure
1249 * @reg_addr: 32 bit PHY register to write
1250 * @device_type: type of device you want to communicate with
1251 * @phy_data: Data to write to the PHY register
1253 * Writes a value to specified PHY register
1255 s32 ixgbe_write_iosf_sb_reg(struct ixgbe_hw *hw, u32 reg_addr,
1256 u32 device_type, u32 phy_data)
1258 return ixgbe_call_func(hw, hw->mac.ops.write_iosf_sb_reg, (hw, reg_addr,
1259 device_type, phy_data), IXGBE_NOT_IMPLEMENTED);
1263 * ixgbe_disable_mdd - Disable malicious driver detection
1264 * @hw: pointer to hardware structure
1267 void ixgbe_disable_mdd(struct ixgbe_hw *hw)
1269 if (hw->mac.ops.disable_mdd)
1270 hw->mac.ops.disable_mdd(hw);
1274 * ixgbe_enable_mdd - Enable malicious driver detection
1275 * @hw: pointer to hardware structure
1278 void ixgbe_enable_mdd(struct ixgbe_hw *hw)
1280 if (hw->mac.ops.enable_mdd)
1281 hw->mac.ops.enable_mdd(hw);
1285 * ixgbe_mdd_event - Handle malicious driver detection event
1286 * @hw: pointer to hardware structure
1287 * @vf_bitmap: vf bitmap of malicious vfs
1290 void ixgbe_mdd_event(struct ixgbe_hw *hw, u32 *vf_bitmap)
1292 if (hw->mac.ops.mdd_event)
1293 hw->mac.ops.mdd_event(hw, vf_bitmap);
1297 * ixgbe_restore_mdd_vf - Restore VF that was disabled during malicious driver
1299 * @hw: pointer to hardware structure
1303 void ixgbe_restore_mdd_vf(struct ixgbe_hw *hw, u32 vf)
1305 if (hw->mac.ops.restore_mdd_vf)
1306 hw->mac.ops.restore_mdd_vf(hw, vf);
1310 * ixgbe_enter_lplu - Transition to low power states
1311 * @hw: pointer to hardware structure
1313 * Configures Low Power Link Up on transition to low power states
1314 * (from D0 to non-D0).
1316 s32 ixgbe_enter_lplu(struct ixgbe_hw *hw)
1318 return ixgbe_call_func(hw, hw->phy.ops.enter_lplu, (hw),
1319 IXGBE_NOT_IMPLEMENTED);
1323 * ixgbe_handle_lasi - Handle external Base T PHY interrupt
1324 * @hw: pointer to hardware structure
1326 * Handle external Base T PHY interrupt. If high temperature
1327 * failure alarm then return error, else if link status change
1328 * then setup internal/external PHY link
1330 * Return IXGBE_ERR_OVERTEMP if interrupt is high temperature
1331 * failure alarm, else return PHY access status.
1333 s32 ixgbe_handle_lasi(struct ixgbe_hw *hw)
1335 return ixgbe_call_func(hw, hw->phy.ops.handle_lasi, (hw),
1336 IXGBE_NOT_IMPLEMENTED);
1340 * ixgbe_bypass_rw - Bit bang data into by_pass FW
1341 * @hw: pointer to hardware structure
1342 * @cmd: Command we send to the FW
1343 * @status: The reply from the FW
1345 * Bit-bangs the cmd to the by_pass FW status points to what is returned.
1347 s32 ixgbe_bypass_rw(struct ixgbe_hw *hw, u32 cmd, u32 *status)
1349 return ixgbe_call_func(hw, hw->mac.ops.bypass_rw, (hw, cmd, status),
1350 IXGBE_NOT_IMPLEMENTED);
1354 * ixgbe_bypass_valid_rd - Verify valid return from bit-bang.
1356 * If we send a write we can't be sure it took until we can read back
1357 * that same register. It can be a problem as some of the feilds may
1358 * for valid reasons change inbetween the time wrote the register and
1359 * we read it again to verify. So this function check everything we
1360 * can check and then assumes it worked.
1362 * @u32 in_reg - The register cmd for the bit-bang read.
1363 * @u32 out_reg - The register returned from a bit-bang read.
1365 bool ixgbe_bypass_valid_rd(struct ixgbe_hw *hw, u32 in_reg, u32 out_reg)
1367 return ixgbe_call_func(hw, hw->mac.ops.bypass_valid_rd,
1368 (in_reg, out_reg), IXGBE_NOT_IMPLEMENTED);
1372 * ixgbe_bypass_set - Set a bypass field in the FW CTRL Regiter.
1373 * @hw: pointer to hardware structure
1374 * @cmd: The control word we are setting.
1375 * @event: The event we are setting in the FW. This also happens to
1376 * be the mask for the event we are setting (handy)
1377 * @action: The action we set the event to in the FW. This is in a
1378 * bit field that happens to be what we want to put in
1379 * the event spot (also handy)
1381 * Writes to the cmd control the bits in actions.
1383 s32 ixgbe_bypass_set(struct ixgbe_hw *hw, u32 cmd, u32 event, u32 action)
1385 return ixgbe_call_func(hw, hw->mac.ops.bypass_set,
1386 (hw, cmd, event, action),
1387 IXGBE_NOT_IMPLEMENTED);
1391 * ixgbe_bypass_rd_eep - Read the bypass FW eeprom address
1392 * @hw: pointer to hardware structure
1393 * @addr: The bypass eeprom address to read.
1394 * @value: The 8b of data at the address above.
1396 s32 ixgbe_bypass_rd_eep(struct ixgbe_hw *hw, u32 addr, u8 *value)
1398 return ixgbe_call_func(hw, hw->mac.ops.bypass_rd_eep,
1399 (hw, addr, value), IXGBE_NOT_IMPLEMENTED);
1403 * ixgbe_read_analog_reg8 - Reads 8 bit analog register
1404 * @hw: pointer to hardware structure
1405 * @reg: analog register to read
1408 * Performs write operation to analog register specified.
1410 s32 ixgbe_read_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 *val)
1412 return ixgbe_call_func(hw, hw->mac.ops.read_analog_reg8, (hw, reg,
1413 val), IXGBE_NOT_IMPLEMENTED);
1417 * ixgbe_write_analog_reg8 - Writes 8 bit analog register
1418 * @hw: pointer to hardware structure
1419 * @reg: analog register to write
1420 * @val: value to write
1422 * Performs write operation to Atlas analog register specified.
1424 s32 ixgbe_write_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 val)
1426 return ixgbe_call_func(hw, hw->mac.ops.write_analog_reg8, (hw, reg,
1427 val), IXGBE_NOT_IMPLEMENTED);
1431 * ixgbe_init_uta_tables - Initializes Unicast Table Arrays.
1432 * @hw: pointer to hardware structure
1434 * Initializes the Unicast Table Arrays to zero on device load. This
1435 * is part of the Rx init addr execution path.
1437 s32 ixgbe_init_uta_tables(struct ixgbe_hw *hw)
1439 return ixgbe_call_func(hw, hw->mac.ops.init_uta_tables, (hw),
1440 IXGBE_NOT_IMPLEMENTED);
1444 * ixgbe_read_i2c_byte - Reads 8 bit word over I2C at specified device address
1445 * @hw: pointer to hardware structure
1446 * @byte_offset: byte offset to read
1447 * @dev_addr: I2C bus address to read from
1450 * Performs byte read operation to SFP module's EEPROM over I2C interface.
1452 s32 ixgbe_read_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr,
1455 return ixgbe_call_func(hw, hw->phy.ops.read_i2c_byte, (hw, byte_offset,
1456 dev_addr, data), IXGBE_NOT_IMPLEMENTED);
1460 * ixgbe_read_i2c_byte_unlocked - Reads 8 bit word via I2C from device address
1461 * @hw: pointer to hardware structure
1462 * @byte_offset: byte offset to read
1463 * @dev_addr: I2C bus address to read from
1466 * Performs byte read operation to SFP module's EEPROM over I2C interface.
1468 s32 ixgbe_read_i2c_byte_unlocked(struct ixgbe_hw *hw, u8 byte_offset,
1469 u8 dev_addr, u8 *data)
1471 return ixgbe_call_func(hw, hw->phy.ops.read_i2c_byte_unlocked,
1472 (hw, byte_offset, dev_addr, data),
1473 IXGBE_NOT_IMPLEMENTED);
1477 * ixgbe_read_link - Perform read operation on link device
1478 * @hw: pointer to the hardware structure
1479 * @addr: bus address to read from
1480 * @reg: device register to read from
1481 * @val: pointer to location to receive read value
1483 * Returns an error code on error.
1485 s32 ixgbe_read_link(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 *val)
1487 return ixgbe_call_func(hw, hw->link.ops.read_link, (hw, addr,
1488 reg, val), IXGBE_NOT_IMPLEMENTED);
1492 * ixgbe_read_link_unlocked - Perform read operation on link device
1493 * @hw: pointer to the hardware structure
1494 * @addr: bus address to read from
1495 * @reg: device register to read from
1496 * @val: pointer to location to receive read value
1498 * Returns an error code on error.
1500 s32 ixgbe_read_link_unlocked(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 *val)
1502 return ixgbe_call_func(hw, hw->link.ops.read_link_unlocked,
1503 (hw, addr, reg, val), IXGBE_NOT_IMPLEMENTED);
1507 * ixgbe_write_i2c_byte - Writes 8 bit word over I2C
1508 * @hw: pointer to hardware structure
1509 * @byte_offset: byte offset to write
1510 * @dev_addr: I2C bus address to write to
1511 * @data: value to write
1513 * Performs byte write operation to SFP module's EEPROM over I2C interface
1514 * at a specified device address.
1516 s32 ixgbe_write_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr,
1519 return ixgbe_call_func(hw, hw->phy.ops.write_i2c_byte, (hw, byte_offset,
1520 dev_addr, data), IXGBE_NOT_IMPLEMENTED);
1524 * ixgbe_write_i2c_byte_unlocked - Writes 8 bit word over I2C
1525 * @hw: pointer to hardware structure
1526 * @byte_offset: byte offset to write
1527 * @dev_addr: I2C bus address to write to
1528 * @data: value to write
1530 * Performs byte write operation to SFP module's EEPROM over I2C interface
1531 * at a specified device address.
1533 s32 ixgbe_write_i2c_byte_unlocked(struct ixgbe_hw *hw, u8 byte_offset,
1534 u8 dev_addr, u8 data)
1536 return ixgbe_call_func(hw, hw->phy.ops.write_i2c_byte_unlocked,
1537 (hw, byte_offset, dev_addr, data),
1538 IXGBE_NOT_IMPLEMENTED);
1542 * ixgbe_write_link - Perform write operation on link device
1543 * @hw: pointer to the hardware structure
1544 * @addr: bus address to write to
1545 * @reg: device register to write to
1546 * @val: value to write
1548 * Returns an error code on error.
1550 s32 ixgbe_write_link(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 val)
1552 return ixgbe_call_func(hw, hw->link.ops.write_link,
1553 (hw, addr, reg, val), IXGBE_NOT_IMPLEMENTED);
1557 * ixgbe_write_link_unlocked - Perform write operation on link device
1558 * @hw: pointer to the hardware structure
1559 * @addr: bus address to write to
1560 * @reg: device register to write to
1561 * @val: value to write
1563 * Returns an error code on error.
1565 s32 ixgbe_write_link_unlocked(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 val)
1567 return ixgbe_call_func(hw, hw->link.ops.write_link_unlocked,
1568 (hw, addr, reg, val), IXGBE_NOT_IMPLEMENTED);
1572 * ixgbe_write_i2c_eeprom - Writes 8 bit EEPROM word over I2C interface
1573 * @hw: pointer to hardware structure
1574 * @byte_offset: EEPROM byte offset to write
1575 * @eeprom_data: value to write
1577 * Performs byte write operation to SFP module's EEPROM over I2C interface.
1579 s32 ixgbe_write_i2c_eeprom(struct ixgbe_hw *hw,
1580 u8 byte_offset, u8 eeprom_data)
1582 return ixgbe_call_func(hw, hw->phy.ops.write_i2c_eeprom,
1583 (hw, byte_offset, eeprom_data),
1584 IXGBE_NOT_IMPLEMENTED);
1588 * ixgbe_read_i2c_eeprom - Reads 8 bit EEPROM word over I2C interface
1589 * @hw: pointer to hardware structure
1590 * @byte_offset: EEPROM byte offset to read
1591 * @eeprom_data: value read
1593 * Performs byte read operation to SFP module's EEPROM over I2C interface.
1595 s32 ixgbe_read_i2c_eeprom(struct ixgbe_hw *hw, u8 byte_offset, u8 *eeprom_data)
1597 return ixgbe_call_func(hw, hw->phy.ops.read_i2c_eeprom,
1598 (hw, byte_offset, eeprom_data),
1599 IXGBE_NOT_IMPLEMENTED);
1603 * ixgbe_get_supported_physical_layer - Returns physical layer type
1604 * @hw: pointer to hardware structure
1606 * Determines physical layer capabilities of the current configuration.
1608 u64 ixgbe_get_supported_physical_layer(struct ixgbe_hw *hw)
1610 return ixgbe_call_func(hw, hw->mac.ops.get_supported_physical_layer,
1611 (hw), IXGBE_PHYSICAL_LAYER_UNKNOWN);
1615 * ixgbe_enable_rx_dma - Enables Rx DMA unit, dependent on device specifics
1616 * @hw: pointer to hardware structure
1617 * @regval: bitfield to write to the Rx DMA register
1619 * Enables the Rx DMA unit of the device.
1621 s32 ixgbe_enable_rx_dma(struct ixgbe_hw *hw, u32 regval)
1623 return ixgbe_call_func(hw, hw->mac.ops.enable_rx_dma,
1624 (hw, regval), IXGBE_NOT_IMPLEMENTED);
1628 * ixgbe_disable_sec_rx_path - Stops the receive data path
1629 * @hw: pointer to hardware structure
1631 * Stops the receive data path.
1633 s32 ixgbe_disable_sec_rx_path(struct ixgbe_hw *hw)
1635 return ixgbe_call_func(hw, hw->mac.ops.disable_sec_rx_path,
1636 (hw), IXGBE_NOT_IMPLEMENTED);
1640 * ixgbe_enable_sec_rx_path - Enables the receive data path
1641 * @hw: pointer to hardware structure
1643 * Enables the receive data path.
1645 s32 ixgbe_enable_sec_rx_path(struct ixgbe_hw *hw)
1647 return ixgbe_call_func(hw, hw->mac.ops.enable_sec_rx_path,
1648 (hw), IXGBE_NOT_IMPLEMENTED);
1652 * ixgbe_acquire_swfw_semaphore - Acquire SWFW semaphore
1653 * @hw: pointer to hardware structure
1654 * @mask: Mask to specify which semaphore to acquire
1656 * Acquires the SWFW semaphore through SW_FW_SYNC register for the specified
1657 * function (CSR, PHY0, PHY1, EEPROM, Flash)
1659 s32 ixgbe_acquire_swfw_semaphore(struct ixgbe_hw *hw, u32 mask)
1661 return ixgbe_call_func(hw, hw->mac.ops.acquire_swfw_sync,
1662 (hw, mask), IXGBE_NOT_IMPLEMENTED);
1666 * ixgbe_release_swfw_semaphore - Release SWFW semaphore
1667 * @hw: pointer to hardware structure
1668 * @mask: Mask to specify which semaphore to release
1670 * Releases the SWFW semaphore through SW_FW_SYNC register for the specified
1671 * function (CSR, PHY0, PHY1, EEPROM, Flash)
1673 void ixgbe_release_swfw_semaphore(struct ixgbe_hw *hw, u32 mask)
1675 if (hw->mac.ops.release_swfw_sync)
1676 hw->mac.ops.release_swfw_sync(hw, mask);
1680 * ixgbe_init_swfw_semaphore - Clean up SWFW semaphore
1681 * @hw: pointer to hardware structure
1683 * Attempts to acquire the SWFW semaphore through SW_FW_SYNC register.
1684 * Regardless of whether is succeeds or not it then release the semaphore.
1685 * This is function is called to recover from catastrophic failures that
1686 * may have left the semaphore locked.
1688 void ixgbe_init_swfw_semaphore(struct ixgbe_hw *hw)
1690 if (hw->mac.ops.init_swfw_sync)
1691 hw->mac.ops.init_swfw_sync(hw);
1695 void ixgbe_disable_rx(struct ixgbe_hw *hw)
1697 if (hw->mac.ops.disable_rx)
1698 hw->mac.ops.disable_rx(hw);
1701 void ixgbe_enable_rx(struct ixgbe_hw *hw)
1703 if (hw->mac.ops.enable_rx)
1704 hw->mac.ops.enable_rx(hw);
1708 * ixgbe_set_rate_select_speed - Set module link speed
1709 * @hw: pointer to hardware structure
1710 * @speed: link speed to set
1712 * Set module link speed via the rate select.
1714 void ixgbe_set_rate_select_speed(struct ixgbe_hw *hw, ixgbe_link_speed speed)
1716 if (hw->mac.ops.set_rate_select_speed)
1717 hw->mac.ops.set_rate_select_speed(hw, speed);