1 /******************************************************************************
3 Copyright (c) 2001-2017, Intel Corporation
6 Redistribution and use in source and binary forms, with or without
7 modification, are permitted provided that the following conditions are met:
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13 notice, this list of conditions and the following disclaimer in the
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32 ******************************************************************************/
35 #ifndef _IXGBE_OSDEP_H_
36 #define _IXGBE_OSDEP_H_
38 #include <sys/types.h>
39 #include <sys/param.h>
40 #include <sys/endian.h>
41 #include <sys/systm.h>
43 #include <sys/protosw.h>
44 #include <sys/socket.h>
45 #include <sys/malloc.h>
46 #include <sys/kernel.h>
48 #include <machine/bus.h>
50 #include <machine/resource.h>
53 #include <machine/clock.h>
54 #include <dev/pci/pcivar.h>
55 #include <dev/pci/pcireg.h>
57 #define ASSERT(x) if(!(x)) panic("IXGBE: x")
58 #define EWARN(H, W) printf(W)
63 IXGBE_ERROR_INVALID_STATE,
64 IXGBE_ERROR_UNSUPPORTED,
69 /* The happy-fun DELAY macro is defined in /usr/src/sys/i386/include/clock.h */
70 #define usec_delay(x) DELAY(x)
71 #define msec_delay(x) DELAY(1000*(x))
74 #define MSGOUT(S, A, B) printf(S "\n", A, B)
75 #define DEBUGFUNC(F) DEBUGOUT(F);
77 #define DEBUGOUT(S) printf(S "\n")
78 #define DEBUGOUT1(S,A) printf(S "\n",A)
79 #define DEBUGOUT2(S,A,B) printf(S "\n",A,B)
80 #define DEBUGOUT3(S,A,B,C) printf(S "\n",A,B,C)
81 #define DEBUGOUT4(S,A,B,C,D) printf(S "\n",A,B,C,D)
82 #define DEBUGOUT5(S,A,B,C,D,E) printf(S "\n",A,B,C,D,E)
83 #define DEBUGOUT6(S,A,B,C,D,E,F) printf(S "\n",A,B,C,D,E,F)
84 #define DEBUGOUT7(S,A,B,C,D,E,F,G) printf(S "\n",A,B,C,D,E,F,G)
85 #define ERROR_REPORT1 ERROR_REPORT
86 #define ERROR_REPORT2 ERROR_REPORT
87 #define ERROR_REPORT3 ERROR_REPORT
88 #define ERROR_REPORT(level, format, arg...) do { \
90 case IXGBE_ERROR_SOFTWARE: \
91 case IXGBE_ERROR_CAUTION: \
92 case IXGBE_ERROR_POLLING: \
93 case IXGBE_ERROR_INVALID_STATE: \
94 case IXGBE_ERROR_UNSUPPORTED: \
95 case IXGBE_ERROR_ARGUMENT: \
96 device_printf(ixgbe_dev_from_hw(hw), format, ## arg); \
104 #define DEBUGOUT1(S,A)
105 #define DEBUGOUT2(S,A,B)
106 #define DEBUGOUT3(S,A,B,C)
107 #define DEBUGOUT4(S,A,B,C,D)
108 #define DEBUGOUT5(S,A,B,C,D,E)
109 #define DEBUGOUT6(S,A,B,C,D,E,F)
110 #define DEBUGOUT7(S,A,B,C,D,E,F,G)
112 #define ERROR_REPORT1(S,A)
113 #define ERROR_REPORT2(S,A,B)
114 #define ERROR_REPORT3(S,A,B,C)
118 #define false 0 /* shared code requires this */
121 #define CMD_MEM_WRT_INVALIDATE 0x0010 /* BIT_4 */
122 #define PCI_COMMAND_REGISTER PCIR_COMMAND
124 /* Shared code dropped this define.. */
125 #define IXGBE_INTEL_VENDOR_ID 0x8086
127 /* Bunch of defines for shared code bogosity */
128 #define UNREFERENCED_PARAMETER(_p)
129 #define UNREFERENCED_1PARAMETER(_p)
130 #define UNREFERENCED_2PARAMETER(_p, _q)
131 #define UNREFERENCED_3PARAMETER(_p, _q, _r)
132 #define UNREFERENCED_4PARAMETER(_p, _q, _r, _s)
134 #define IXGBE_NTOHL(_i) ntohl(_i)
135 #define IXGBE_NTOHS(_i) ntohs(_i)
137 /* XXX these need to be revisited */
138 #define IXGBE_CPU_TO_LE16 htole16
139 #define IXGBE_CPU_TO_LE32 htole32
140 #define IXGBE_LE32_TO_CPU le32toh
141 #define IXGBE_LE32_TO_CPUS(x)
142 #define IXGBE_CPU_TO_BE16 htobe16
143 #define IXGBE_CPU_TO_BE32 htobe32
144 #define IXGBE_BE32_TO_CPU be32toh
148 typedef uint16_t u16;
150 typedef uint32_t u32;
152 typedef uint64_t u64;
153 #ifndef __bool_true_false_are_defined
154 typedef boolean_t bool;
157 /* shared code requires this */
167 #if __FreeBSD_version < 800000
168 #if defined(__i386__) || defined(__amd64__)
169 #define mb() __asm volatile("mfence" ::: "memory")
170 #define wmb() __asm volatile("sfence" ::: "memory")
171 #define rmb() __asm volatile("lfence" ::: "memory")
179 #if defined(__i386__) || defined(__amd64__)
181 void prefetch(void *x)
183 __asm volatile("prefetcht0 %0" :: "m" (*(unsigned long *)x));
190 * Optimized bcopy thanks to Luigi Rizzo's investigative work. Assumes
191 * non-overlapping regions and 32-byte padding on both src and dst.
194 ixgbe_bcopy(void *restrict _src, void *restrict _dst, int l)
196 uint64_t *src = _src;
197 uint64_t *dst = _dst;
199 for (; l > 0; l -= 32) {
210 bus_space_tag_t mem_bus_space_tag;
211 bus_space_handle_t mem_bus_space_handle;
214 /* These routines need struct ixgbe_hw declared */
217 /* These routines are needed by the shared code */
218 extern u16 ixgbe_read_pci_cfg(struct ixgbe_hw *, u32);
219 #define IXGBE_READ_PCIE_WORD ixgbe_read_pci_cfg
221 extern void ixgbe_write_pci_cfg(struct ixgbe_hw *, u32, u16);
222 #define IXGBE_WRITE_PCIE_WORD ixgbe_write_pci_cfg
224 #define IXGBE_WRITE_FLUSH(a) IXGBE_READ_REG(a, IXGBE_STATUS)
226 extern u32 ixgbe_read_reg(struct ixgbe_hw *, u32);
227 #define IXGBE_READ_REG(a, reg) ixgbe_read_reg(a, reg)
229 extern void ixgbe_write_reg(struct ixgbe_hw *, u32, u32);
230 #define IXGBE_WRITE_REG(a, reg, val) ixgbe_write_reg(a, reg, val)
232 extern u32 ixgbe_read_reg_array(struct ixgbe_hw *, u32, u32);
233 #define IXGBE_READ_REG_ARRAY(a, reg, offset) \
234 ixgbe_read_reg_array(a, reg, offset)
236 extern void ixgbe_write_reg_array(struct ixgbe_hw *, u32, u32, u32);
237 #define IXGBE_WRITE_REG_ARRAY(a, reg, offset, val) \
238 ixgbe_write_reg_array(a, reg, offset, val)
240 #endif /* _IXGBE_OSDEP_H_ */