2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
4 * Authors: Ravi Pokala (rpokala@freebsd.org), Andriy Gapon (avg@FreeBSD.org)
6 * Copyright (c) 2016 Andriy Gapon <avg@FreeBSD.org>
7 * Copyright (c) 2018 Panasas
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34 * This driver is a super-set of the now-deleted jedec_ts(4), and most of the
35 * code for reading and reporting the temperature is either based on that driver,
36 * or copied from it verbatim.
39 #include <sys/param.h>
40 #include <sys/kernel.h>
42 #include <sys/endian.h>
43 #include <sys/malloc.h>
44 #include <sys/module.h>
45 #include <sys/sysctl.h>
46 #include <sys/systm.h>
48 #include <dev/jedec_dimm/jedec_dimm.h>
49 #include <dev/smbus/smbconf.h>
50 #include <dev/smbus/smbus.h>
54 struct jedec_dimm_softc {
57 uint8_t spd_addr; /* SMBus address of the SPD EEPROM. */
58 uint8_t tsod_addr; /* Address of the Thermal Sensor On DIMM */
61 char part_str[21]; /* 18 (DDR3) or 20 (DDR4) chars, plus terminator */
62 char serial_str[9]; /* 4 bytes = 8 nybble characters, plus terminator */
63 char *slotid_str; /* Optional DIMM slot identifier (silkscreen) */
66 /* General Thermal Sensor on DIMM (TSOD) identification notes.
68 * The JEDEC TSE2004av specification defines the device ID that all compliant
69 * devices should use, but very few do in practice. Maybe that's because the
70 * earlier TSE2002av specification was rather vague about that.
71 * Rare examples are IDT TSE2004GB2B0 and Atmel AT30TSE004A, not sure if
72 * they are TSE2004av compliant by design or by accident.
73 * Also, the specification mandates that PCI SIG manufacturer IDs are to be
74 * used, but in practice the JEDEC manufacturer IDs are often used.
76 const struct jedec_dimm_tsod_dev {
79 const char *description;
80 } known_tsod_devices[] = {
81 /* Analog Devices ADT7408.
82 * http://www.analog.com/media/en/technical-documentation/data-sheets/ADT7408.pdf
84 { 0x11d4, 0x08, "Analog Devices TSOD" },
86 /* Atmel AT30TSE002B, AT30TSE004A.
87 * http://www.atmel.com/images/doc8711.pdf
88 * http://www.atmel.com/images/atmel-8868-dts-at30tse004a-datasheet.pdf
89 * Note how one chip uses the JEDEC Manufacturer ID while the other
90 * uses the PCI SIG one.
92 { 0x001f, 0x82, "Atmel TSOD" },
93 { 0x1114, 0x22, "Atmel TSOD" },
95 /* Integrated Device Technology (IDT) TS3000B3A, TSE2002B3C,
96 * TSE2004GB2B0 chips and their variants.
97 * http://www.idt.com/sites/default/files/documents/IDT_TSE2002B3C_DST_20100512_120303152056.pdf
98 * http://www.idt.com/sites/default/files/documents/IDT_TS3000B3A_DST_20101129_120303152013.pdf
99 * https://www.idt.com/document/dst/tse2004gb2b0-datasheet
101 { 0x00b3, 0x29, "IDT TSOD" },
102 { 0x00b3, 0x22, "IDT TSOD" },
104 /* Maxim Integrated MAX6604.
105 * Different document revisions specify different Device IDs.
106 * Document 19-3837; Rev 0; 10/05 has 0x3e00 while
107 * 19-3837; Rev 3; 10/11 has 0x5400.
108 * http://datasheets.maximintegrated.com/en/ds/MAX6604.pdf
110 { 0x004d, 0x3e, "Maxim Integrated TSOD" },
111 { 0x004d, 0x54, "Maxim Integrated TSOD" },
113 /* Microchip Technology MCP9805, MCP9843, MCP98242, MCP98243
114 * and their variants.
115 * http://ww1.microchip.com/downloads/en/DeviceDoc/21977b.pdf
116 * Microchip Technology EMC1501.
117 * http://ww1.microchip.com/downloads/en/DeviceDoc/00001605A.pdf
119 { 0x0054, 0x00, "Microchip TSOD" },
120 { 0x0054, 0x20, "Microchip TSOD" },
121 { 0x0054, 0x21, "Microchip TSOD" },
122 { 0x1055, 0x08, "Microchip TSOD" },
124 /* NXP Semiconductors SE97 and SE98.
125 * http://www.nxp.com/docs/en/data-sheet/SE97B.pdf
127 { 0x1131, 0xa1, "NXP TSOD" },
128 { 0x1131, 0xa2, "NXP TSOD" },
130 /* ON Semiconductor CAT34TS02 revisions B and C, CAT6095 and compatible.
131 * https://www.onsemi.com/pub/Collateral/CAT34TS02-D.PDF
132 * http://www.onsemi.com/pub/Collateral/CAT6095-D.PDF
134 { 0x1b09, 0x08, "ON Semiconductor TSOD" },
135 { 0x1b09, 0x0a, "ON Semiconductor TSOD" },
137 /* ST[Microelectronics] STTS424E02, STTS2002 and others.
138 * http://www.st.com/resource/en/datasheet/cd00157558.pdf
139 * http://www.st.com/resource/en/datasheet/stts2002.pdf
141 { 0x104a, 0x00, "ST Microelectronics TSOD" },
142 { 0x104a, 0x03, "ST Microelectronics TSOD" },
145 static int jedec_dimm_attach(device_t dev);
147 static int jedec_dimm_capacity(struct jedec_dimm_softc *sc, enum dram_type type,
148 uint32_t *capacity_mb);
150 static int jedec_dimm_detach(device_t dev);
152 static int jedec_dimm_dump(struct jedec_dimm_softc *sc, enum dram_type type);
154 static int jedec_dimm_field_to_str(struct jedec_dimm_softc *sc, char *dst,
155 size_t dstsz, uint16_t offset, uint16_t len, bool ascii);
157 static int jedec_dimm_probe(device_t dev);
159 static int jedec_dimm_readw_be(struct jedec_dimm_softc *sc, uint8_t reg,
162 static int jedec_dimm_temp_sysctl(SYSCTL_HANDLER_ARGS);
164 static const char *jedec_dimm_tsod_match(uint16_t vid, uint16_t did);
168 * device_attach() method. Read the DRAM type, use that to determine the offsets
169 * and lengths of the asset string fields. Calculate the capacity. If a TSOD is
170 * present, figure out exactly what it is, and update the device description.
171 * If all of that was successful, create the sysctls for the DIMM. If an
172 * optional slotid has been hinted, create a sysctl for that too.
177 * Device being attached.
180 jedec_dimm_attach(device_t dev)
184 uint16_t partnum_len;
185 uint16_t partnum_offset;
187 uint16_t serial_offset;
188 uint16_t tsod_present_offset;
194 struct jedec_dimm_softc *sc;
195 struct sysctl_ctx_list *ctx;
196 struct sysctl_oid *oid;
197 struct sysctl_oid_list *children;
198 const char *tsod_match;
199 const char *slotid_str;
202 sc = device_get_softc(dev);
203 ctx = device_get_sysctl_ctx(dev);
204 oid = device_get_sysctl_tree(dev);
205 children = SYSCTL_CHILDREN(oid);
207 bzero(sc, sizeof(*sc));
209 sc->smbus = device_get_parent(dev);
210 sc->spd_addr = smbus_get_addr(dev);
212 /* The TSOD address has a different DTI from the SPD address, but shares
215 sc->tsod_addr = JEDEC_DTI_TSOD | (sc->spd_addr & 0x0f);
217 /* Read the DRAM type, and set the various offsets and lengths. */
218 rc = smbus_readb(sc->smbus, sc->spd_addr, SPD_OFFSET_DRAM_TYPE, &byte);
220 device_printf(dev, "failed to read dram_type: %d\n", rc);
223 type = (enum dram_type) byte;
225 case DRAM_TYPE_DDR3_SDRAM:
226 (void) snprintf(sc->type_str, sizeof(sc->type_str), "DDR3");
227 partnum_len = SPD_LEN_DDR3_PARTNUM;
228 partnum_offset = SPD_OFFSET_DDR3_PARTNUM;
229 serial_len = SPD_LEN_DDR3_SERIAL;
230 serial_offset = SPD_OFFSET_DDR3_SERIAL;
231 tsod_present_offset = SPD_OFFSET_DDR3_TSOD_PRESENT;
233 case DRAM_TYPE_DDR4_SDRAM:
234 (void) snprintf(sc->type_str, sizeof(sc->type_str), "DDR4");
235 partnum_len = SPD_LEN_DDR4_PARTNUM;
236 partnum_offset = SPD_OFFSET_DDR4_PARTNUM;
237 serial_len = SPD_LEN_DDR4_SERIAL;
238 serial_offset = SPD_OFFSET_DDR4_SERIAL;
239 tsod_present_offset = SPD_OFFSET_DDR4_TSOD_PRESENT;
242 device_printf(dev, "unsupported dram_type 0x%02x\n", type);
248 /* bootverbose debuggery is best-effort, so ignore the rc. */
249 (void) jedec_dimm_dump(sc, type);
252 /* Read all the required info from the SPD. If any of it fails, error
253 * out without creating the sysctls.
255 rc = jedec_dimm_capacity(sc, type, &sc->capacity_mb);
260 rc = jedec_dimm_field_to_str(sc, sc->part_str, sizeof(sc->part_str),
261 partnum_offset, partnum_len, true);
266 rc = jedec_dimm_field_to_str(sc, sc->serial_str, sizeof(sc->serial_str),
267 serial_offset, serial_len, false);
272 /* The MSBit of the TSOD-presence byte reports whether or not the TSOD
273 * is in fact present. (While DDR3 and DDR4 don't explicitly require a
274 * TSOD, essentially all DDR3 and DDR4 DIMMs include one.) But, as
275 * discussed in [PR 235944], it turns out that some DIMMs claim to have
276 * a TSOD when they actually don't. (Or maybe the firmware blocks it?)
278 * If the SPD data says the TSOD is present, try to read manufacturer
279 * and device info from it to confirm that it's a valid TSOD device.
280 * If the data is unreadable, just continue as if the TSOD isn't there.
281 * If the data was read successfully, see if it is a known TSOD device;
282 * it's okay if it isn't (tsod_match == NULL).
284 rc = smbus_readb(sc->smbus, sc->spd_addr, tsod_present_offset, &byte);
286 device_printf(dev, "failed to read TSOD-present byte: %d\n",
292 rc = jedec_dimm_readw_be(sc, TSOD_REG_MANUFACTURER, &vendorid);
295 "failed to read TSOD Manufacturer ID\n");
299 rc = jedec_dimm_readw_be(sc, TSOD_REG_DEV_REV, &devid);
301 device_printf(dev, "failed to read TSOD Device ID\n");
306 tsod_match = jedec_dimm_tsod_match(vendorid, devid);
308 if (tsod_match == NULL) {
310 "Unknown TSOD Manufacturer and Device IDs,"
311 " 0x%x and 0x%x\n", vendorid, devid);
314 "TSOD: %s\n", tsod_match);
320 tsod_present = false;
323 SYSCTL_ADD_STRING(ctx, children, OID_AUTO, "type",
324 CTLFLAG_RD | CTLFLAG_MPSAFE, sc->type_str, 0,
327 SYSCTL_ADD_UINT(ctx, children, OID_AUTO, "capacity",
328 CTLFLAG_RD | CTLFLAG_MPSAFE, NULL, sc->capacity_mb,
329 "DIMM capacity (MB)");
331 SYSCTL_ADD_STRING(ctx, children, OID_AUTO, "part",
332 CTLFLAG_RD | CTLFLAG_MPSAFE, sc->part_str, 0,
335 SYSCTL_ADD_STRING(ctx, children, OID_AUTO, "serial",
336 CTLFLAG_RD | CTLFLAG_MPSAFE, sc->serial_str, 0,
337 "DIMM Serial Number");
339 /* Create the temperature sysctl IFF the TSOD is present and valid */
340 if (tsod_present && (tsod_match != NULL)) {
341 SYSCTL_ADD_PROC(ctx, children, OID_AUTO, "temp",
342 CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_MPSAFE, dev, 0,
343 jedec_dimm_temp_sysctl, "IK", "DIMM temperature (deg C)");
346 /* If a "slotid" was hinted, add the sysctl for it. */
347 if (resource_string_value(device_get_name(dev), device_get_unit(dev),
348 "slotid", &slotid_str) == 0) {
349 if (slotid_str != NULL) {
350 sc->slotid_str = strdup(slotid_str, M_DEVBUF);
351 SYSCTL_ADD_STRING(ctx, children, OID_AUTO, "slotid",
352 CTLFLAG_RD | CTLFLAG_MPSAFE, sc->slotid_str, 0,
353 "DIMM Slot Identifier");
357 /* If a TSOD type string or a slotid are present, add them to the
358 * device description.
360 if ((tsod_match != NULL) || (sc->slotid_str != NULL)) {
361 new_desc_len = strlen(device_get_desc(dev));
362 if (tsod_match != NULL) {
363 new_desc_len += strlen(tsod_match);
364 new_desc_len += 4; /* " w/ " */
366 if (sc->slotid_str != NULL) {
367 new_desc_len += strlen(sc->slotid_str);
368 new_desc_len += 3; /* space + parens */
370 new_desc_len++; /* terminator */
371 new_desc = malloc(new_desc_len, M_TEMP, (M_WAITOK | M_ZERO));
372 (void) snprintf(new_desc, new_desc_len, "%s%s%s%s%s%s",
373 device_get_desc(dev),
374 (tsod_match ? " w/ " : ""),
375 (tsod_match ? tsod_match : ""),
376 (sc->slotid_str ? " (" : ""),
377 (sc->slotid_str ? sc->slotid_str : ""),
378 (sc->slotid_str ? ")" : ""));
379 device_set_desc_copy(dev, new_desc);
380 free(new_desc, M_TEMP);
388 * Calculate the capacity of a DIMM. Both DDR3 and DDR4 encode "geometry"
389 * information in various SPD bytes. The standards documents codify everything
390 * in look-up tables, but it's trivial to reverse-engineer the the formulas for
391 * most of them. Unless otherwise noted, the same formulas apply for both DDR3
392 * and DDR4. The SPD offsets of where the data comes from are different between
393 * the two types, because having them be the same would be too easy.
398 * Instance-specific context data
400 * @param[in] dram_type
401 * The locations of the data used to calculate the capacity depends on the
404 * @param[out] capacity_mb
405 * The calculated capacity, in MB
408 jedec_dimm_capacity(struct jedec_dimm_softc *sc, enum dram_type type,
409 uint32_t *capacity_mb)
411 uint8_t bus_width_byte;
412 uint8_t bus_width_offset;
413 uint8_t dimm_ranks_byte;
414 uint8_t dimm_ranks_offset;
415 uint8_t sdram_capacity_byte;
416 uint8_t sdram_capacity_offset;
417 uint8_t sdram_pkg_type_byte;
418 uint8_t sdram_pkg_type_offset;
419 uint8_t sdram_width_byte;
420 uint8_t sdram_width_offset;
423 uint32_t sdram_capacity;
424 uint32_t sdram_pkg_type;
425 uint32_t sdram_width;
429 case DRAM_TYPE_DDR3_SDRAM:
430 bus_width_offset = SPD_OFFSET_DDR3_BUS_WIDTH;
431 dimm_ranks_offset = SPD_OFFSET_DDR3_DIMM_RANKS;
432 sdram_capacity_offset = SPD_OFFSET_DDR3_SDRAM_CAPACITY;
433 sdram_width_offset = SPD_OFFSET_DDR3_SDRAM_WIDTH;
435 case DRAM_TYPE_DDR4_SDRAM:
436 bus_width_offset = SPD_OFFSET_DDR4_BUS_WIDTH;
437 dimm_ranks_offset = SPD_OFFSET_DDR4_DIMM_RANKS;
438 sdram_capacity_offset = SPD_OFFSET_DDR4_SDRAM_CAPACITY;
439 sdram_pkg_type_offset = SPD_OFFSET_DDR4_SDRAM_PKG_TYPE;
440 sdram_width_offset = SPD_OFFSET_DDR4_SDRAM_WIDTH;
443 device_printf(sc->dev, "unsupported dram_type 0x%02x\n", type);
448 rc = smbus_readb(sc->smbus, sc->spd_addr, bus_width_offset,
451 device_printf(sc->dev, "failed to read bus_width: %d\n", rc);
455 rc = smbus_readb(sc->smbus, sc->spd_addr, dimm_ranks_offset,
458 device_printf(sc->dev, "failed to read dimm_ranks: %d\n", rc);
462 rc = smbus_readb(sc->smbus, sc->spd_addr, sdram_capacity_offset,
463 &sdram_capacity_byte);
465 device_printf(sc->dev, "failed to read sdram_capacity: %d\n",
470 rc = smbus_readb(sc->smbus, sc->spd_addr, sdram_width_offset,
473 device_printf(sc->dev, "failed to read sdram_width: %d\n", rc);
477 /* The "SDRAM Package Type" is only needed for DDR4 DIMMs. */
478 if (type == DRAM_TYPE_DDR4_SDRAM) {
479 rc = smbus_readb(sc->smbus, sc->spd_addr, sdram_pkg_type_offset,
480 &sdram_pkg_type_byte);
482 device_printf(sc->dev,
483 "failed to read sdram_pkg_type: %d\n", rc);
488 /* "Primary bus width, in bits" is in bits [2:0]. */
489 bus_width_byte &= 0x07;
490 if (bus_width_byte <= 3) {
491 bus_width = 1 << bus_width_byte;
494 device_printf(sc->dev, "invalid bus width info\n");
499 /* "Number of ranks per DIMM" is in bits [5:3]. Values 4-7 are only
502 dimm_ranks_byte >>= 3;
503 dimm_ranks_byte &= 0x07;
504 if (dimm_ranks_byte <= 7) {
505 dimm_ranks = dimm_ranks_byte + 1;
507 device_printf(sc->dev, "invalid DIMM Rank info\n");
511 if ((dimm_ranks_byte >= 4) && (type != DRAM_TYPE_DDR4_SDRAM)) {
512 device_printf(sc->dev, "invalid DIMM Rank info\n");
517 /* "Total SDRAM capacity per die, in Mb" is in bits [3:0]. There are two
518 * different formulas, for values 0-7 and for values 8-9. Also, values
519 * 7-9 are only valid for DDR4.
521 sdram_capacity_byte &= 0x0f;
522 if (sdram_capacity_byte <= 7) {
523 sdram_capacity = 1 << sdram_capacity_byte;
524 sdram_capacity *= 256;
525 } else if (sdram_capacity_byte <= 9) {
526 sdram_capacity = 12 << (sdram_capacity_byte - 8);
527 sdram_capacity *= 1024;
529 device_printf(sc->dev, "invalid SDRAM capacity info\n");
533 if ((sdram_capacity_byte >= 7) && (type != DRAM_TYPE_DDR4_SDRAM)) {
534 device_printf(sc->dev, "invalid SDRAM capacity info\n");
539 /* "SDRAM device width" is in bits [2:0]. */
540 sdram_width_byte &= 0x7;
541 if (sdram_width_byte <= 3) {
542 sdram_width = 1 << sdram_width_byte;
545 device_printf(sc->dev, "invalid SDRAM width info\n");
550 /* DDR4 has something called "3DS", which is indicated by [1:0] = 2;
551 * when that is the case, the die count is encoded in [6:4], and
552 * dimm_ranks is multiplied by it.
554 if ((type == DRAM_TYPE_DDR4_SDRAM) &&
555 ((sdram_pkg_type_byte & 0x3) == 2)) {
556 sdram_pkg_type_byte >>= 4;
557 sdram_pkg_type_byte &= 0x07;
558 sdram_pkg_type = sdram_pkg_type_byte + 1;
559 dimm_ranks *= sdram_pkg_type;
562 /* Finally, assemble the actual capacity. The formula is the same for
563 * both DDR3 and DDR4.
565 *capacity_mb = sdram_capacity / 8 * bus_width / sdram_width *
573 * device_detach() method. If we allocated sc->slotid_str, free it. Even if we
574 * didn't allocate, free it anyway; free(NULL) is safe.
579 * Device being detached.
582 jedec_dimm_detach(device_t dev)
584 struct jedec_dimm_softc *sc;
586 sc = device_get_softc(dev);
587 free(sc->slotid_str, M_DEVBUF);
593 * Read and dump the entire SPD contents.
598 * Instance-specific context data
600 * @param[in] dram_type
601 * The length of data which needs to be read and dumped differs based on
602 * the type of the DIMM.
605 jedec_dimm_dump(struct jedec_dimm_softc *sc, enum dram_type type)
612 page_changed = false;
614 for (i = 0; i < 256; i++) {
615 rc = smbus_readb(sc->smbus, sc->spd_addr, i, &bytes[i]);
617 device_printf(sc->dev,
618 "unable to read page0:0x%02x: %d\n", i, rc);
623 /* The DDR4 SPD is 512 bytes, but SMBus only allows for 8-bit offsets.
624 * JEDEC gets around this by defining the "PAGE" DTI and LSAs.
626 if (type == DRAM_TYPE_DDR4_SDRAM) {
628 rc = smbus_writeb(sc->smbus,
629 (JEDEC_DTI_PAGE | JEDEC_LSA_PAGE_SET1), 0, 0);
631 /* Some SPD devices (or SMBus controllers?) claim the
632 * page-change command failed when it actually
633 * succeeded. Log a message but soldier on.
635 device_printf(sc->dev, "unable to change page: %d\n",
638 /* Add 256 to the store location, because we're in the second
641 for (i = 0; i < 256; i++) {
642 rc = smbus_readb(sc->smbus, sc->spd_addr, i,
645 device_printf(sc->dev,
646 "unable to read page1:0x%02x: %d\n", i, rc);
652 /* Display the data in a nice hexdump format, with byte offsets. */
653 hexdump(bytes, (page_changed ? 512 : 256), NULL, 0);
658 /* Switch back to page0 before returning. */
659 rc2 = smbus_writeb(sc->smbus,
660 (JEDEC_DTI_PAGE | JEDEC_LSA_PAGE_SET0), 0, 0);
662 device_printf(sc->dev, "unable to restore page: %d\n",
670 * Read a specified range of bytes from the SPD, convert them to a string, and
671 * store them in the provided buffer. Some SPD fields are space-padded ASCII,
672 * and some are just a string of bits that we want to convert to a hex string.
677 * Instance-specific context data
680 * The output buffer to populate
683 * The size of the output buffer
686 * The starting offset of the field within the SPD
689 * The length in bytes of the field within the SPD
692 * Is the field a sequence of ASCII characters? If not, it is binary data
693 * which should be converted to characters.
696 jedec_dimm_field_to_str(struct jedec_dimm_softc *sc, char *dst, size_t dstsz,
697 uint16_t offset, uint16_t len, bool ascii)
704 /* Change to the proper page. Offsets [0, 255] are in page0; offsets
705 * [256, 512] are in page1.
707 * *The page must be reset to page0 before returning.*
709 * For the page-change operation, only the DTI and LSA matter; the
710 * offset and write-value are ignored, so use just 0.
712 * Mercifully, JEDEC defined the fields such that none of them cross
713 * pages, so we don't need to worry about that complication.
715 if (offset < JEDEC_SPD_PAGE_SIZE) {
716 page_changed = false;
717 } else if (offset < (2 * JEDEC_SPD_PAGE_SIZE)) {
719 rc = smbus_writeb(sc->smbus,
720 (JEDEC_DTI_PAGE | JEDEC_LSA_PAGE_SET1), 0, 0);
722 device_printf(sc->dev,
723 "unable to change page for offset 0x%04x: %d\n",
726 /* Adjust the offset to account for the page change. */
727 offset -= JEDEC_SPD_PAGE_SIZE;
729 page_changed = false;
731 device_printf(sc->dev, "invalid offset 0x%04x\n", offset);
735 /* Sanity-check (adjusted) offset and length; everything must be within
738 if (offset >= JEDEC_SPD_PAGE_SIZE) {
740 device_printf(sc->dev, "invalid offset 0x%04x\n", offset);
743 if ((offset + len) >= JEDEC_SPD_PAGE_SIZE) {
745 device_printf(sc->dev,
746 "(offset + len) would cross page (0x%04x + 0x%04x)\n",
751 /* Sanity-check the destination string length. If we're dealing with
752 * ASCII chars, then the destination must be at least the same length;
753 * otherwise, it must be *twice* the length, because each byte must
754 * be converted into two nybble characters.
756 * And, of course, there needs to be an extra byte for the terminator.
759 if (dstsz < (len + 1)) {
761 device_printf(sc->dev,
762 "destination too short (%u < %u)\n",
763 (uint16_t) dstsz, (len + 1));
767 if (dstsz < ((2 * len) + 1)) {
769 device_printf(sc->dev,
770 "destination too short (%u < %u)\n",
771 (uint16_t) dstsz, ((2 * len) + 1));
776 /* Read a byte at a time. */
777 for (i = 0; i < len; i++) {
778 rc = smbus_readb(sc->smbus, sc->spd_addr, (offset + i), &byte);
780 device_printf(sc->dev,
781 "failed to read byte at 0x%02x: %d\n",
786 /* chars can be copied directly. */
789 /* Raw bytes need to be converted to a two-byte hex
790 * string, plus the terminator.
792 (void) snprintf(&dst[(2 * i)], 3, "%02x", byte);
796 /* If we're dealing with ASCII, convert trailing spaces to NULs. */
798 for (i = dstsz; i > 0; i--) {
801 } else if (dst[i] == 0) {
812 /* Switch back to page0 before returning. */
813 rc2 = smbus_writeb(sc->smbus,
814 (JEDEC_DTI_PAGE | JEDEC_LSA_PAGE_SET0), 0, 0);
816 device_printf(sc->dev,
817 "unable to restore page for offset 0x%04x: %d\n",
826 * device_probe() method. Validate the address that was given as a hint, and
827 * display an error if it's bogus. Make sure that we're dealing with one of the
828 * SPD versions that we can handle.
833 * Device being probed.
836 jedec_dimm_probe(device_t dev)
844 smbus = device_get_parent(dev);
845 addr = smbus_get_addr(dev);
847 /* Don't bother if this isn't an SPD address, or if the LSBit is set. */
848 if (((addr & 0xf0) != JEDEC_DTI_SPD) ||
849 ((addr & 0x01) != 0)) {
851 "invalid \"addr\" hint; address must start with \"0x%x\","
852 " and the least-significant bit must be 0\n",
858 /* Try to read the DRAM_TYPE from the SPD. */
859 rc = smbus_readb(smbus, addr, SPD_OFFSET_DRAM_TYPE, &byte);
861 device_printf(dev, "failed to read dram_type\n");
865 /* This driver currently only supports DDR3 and DDR4 SPDs. */
866 type = (enum dram_type) byte;
868 case DRAM_TYPE_DDR3_SDRAM:
869 rc = BUS_PROBE_DEFAULT;
870 device_set_desc(dev, "DDR3 DIMM");
872 case DRAM_TYPE_DDR4_SDRAM:
873 rc = BUS_PROBE_DEFAULT;
874 device_set_desc(dev, "DDR4 DIMM");
886 * SMBus specifies little-endian byte order, but it looks like the TSODs use
887 * big-endian. Read and convert.
892 * Instance-specific context data
895 * The register number to read.
898 * Pointer to populate with the value read.
901 jedec_dimm_readw_be(struct jedec_dimm_softc *sc, uint8_t reg, uint16_t *val)
905 rc = smbus_readw(sc->smbus, sc->tsod_addr, reg, val);
909 *val = be16toh(*val);
916 * Read the temperature data from the TSOD and convert it to the deciKelvin
917 * value that the sysctl expects.
922 jedec_dimm_temp_sysctl(SYSCTL_HANDLER_ARGS)
928 struct jedec_dimm_softc *sc;
930 sc = device_get_softc(dev);
932 rc = jedec_dimm_readw_be(sc, TSOD_REG_TEMPERATURE, &val);
937 /* The three MSBits are flags, and the next bit is a sign bit. */
939 if ((val & 0x1000) != 0)
941 /* Each step is 0.0625 degrees, so convert to 1000ths of a degree C. */
943 /* ... and then convert to 1000ths of a Kelvin */
945 /* As a practical matter, few (if any) TSODs are more accurate than
946 * about a tenth of a degree, so round accordingly. This correlates with
947 * the "IK" formatting used for this sysctl.
949 temp = (temp + 500) / 1000;
951 rc = sysctl_handle_int(oidp, &temp, 0, req);
958 * Check the TSOD's Vendor ID and Device ID against the list of known TSOD
959 * devices. Return the description, or NULL if this doesn't look like a valid
965 * The Vendor ID of the TSOD device
968 * The Device ID of the TSOD device
971 * The description string, or NULL for a failure to match.
974 jedec_dimm_tsod_match(uint16_t vid, uint16_t did)
976 const struct jedec_dimm_tsod_dev *d;
979 for (i = 0; i < nitems(known_tsod_devices); i++) {
980 d = &known_tsod_devices[i];
981 if ((vid == d->vendor_id) && ((did >> 8) == d->device_id)) {
982 return (d->description);
986 /* If no matches for a specific device, then check for a generic
987 * TSE2004av-compliant device.
989 if ((did >> 8) == 0x22) {
990 return ("TSE2004av compliant TSOD");
996 static device_method_t jedec_dimm_methods[] = {
997 /* Methods from the device interface */
998 DEVMETHOD(device_probe, jedec_dimm_probe),
999 DEVMETHOD(device_attach, jedec_dimm_attach),
1000 DEVMETHOD(device_detach, jedec_dimm_detach),
1004 static driver_t jedec_dimm_driver = {
1005 .name = "jedec_dimm",
1006 .methods = jedec_dimm_methods,
1007 .size = sizeof(struct jedec_dimm_softc),
1010 static devclass_t jedec_dimm_devclass;
1012 DRIVER_MODULE(jedec_dimm, smbus, jedec_dimm_driver, jedec_dimm_devclass, 0, 0);
1013 MODULE_DEPEND(jedec_dimm, smbus, SMBUS_MINVER, SMBUS_PREFVER, SMBUS_MAXVER);
1014 MODULE_VERSION(jedec_dimm, 1);
1016 /* vi: set ts=8 sw=4 sts=8 noet: */