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36 * \brief Host Driver: Configuration data structures for the host driver.
39 #ifndef __LIO_CONFIG_H__
40 #define __LIO_CONFIG_H__
42 /*--------------------------CONFIG VALUES------------------------*/
45 * The following macros affect the way the driver data structures
46 * are generated for Octeon devices.
47 * They can be modified.
51 * Maximum octeon devices defined as LIO_MAX_IF to support
52 * multiple(<= LIO_MAX_IF) Miniports
54 #define LIO_MAX_IF 128
55 #define LIO_MAX_DEVICES LIO_MAX_IF
56 #define LIO_MAX_MULTICAST_ADDR 32
58 /* CN23xx IQ configuration macros */
59 #define LIO_CN23XX_PF_MAX_RINGS 64
61 #define LIO_BR_SIZE 4096
63 #define LIO_CN23XX_PF_MAX_INPUT_QUEUES LIO_CN23XX_PF_MAX_RINGS
64 #define LIO_CN23XX_MAX_IQ_DESCRIPTORS 2048
65 #define LIO_CN23XX_DEFAULT_IQ_DESCRIPTORS 512
66 #define LIO_CN23XX_MIN_IQ_DESCRIPTORS 128
67 #define LIO_CN23XX_DB_MIN 1
68 #define LIO_CN23XX_DB_TIMEOUT 1
70 #define LIO_CN23XX_PF_MAX_OUTPUT_QUEUES LIO_CN23XX_PF_MAX_RINGS
71 #define LIO_CN23XX_MAX_OQ_DESCRIPTORS 2048
72 #define LIO_CN23XX_DEFAULT_OQ_DESCRIPTORS 512
73 #define LIO_CN23XX_MIN_OQ_DESCRIPTORS 128
74 #define LIO_CN23XX_OQ_BUF_SIZE MCLBYTES
75 #define LIO_CN23XX_OQ_PKTS_PER_INTR 128
76 #define LIO_CN23XX_OQ_REFIL_THRESHOLD 16
78 #define LIO_CN23XX_OQ_INTR_PKT 64
79 #define LIO_CN23XX_OQ_INTR_TIME 100
80 #define LIO_CN23XX_DEFAULT_NUM_PORTS 1
82 #define LIO_CN23XX_CFG_IO_QUEUES LIO_CN23XX_PF_MAX_RINGS
84 #define LIO_CN23XX_DEF_IQ_INTR_THRESHOLD 32
85 #define LIO_CN23XX_PKI_MAX_FRAME_SIZE 65535
86 #define LIO_CN23XX_RAW_FRONT_SIZE 48
88 * this is the max jabber value.Any packets greater than this size sent over
89 * DPI will be truncated.
91 #define LIO_CN23XX_MAX_INPUT_JABBER (LIO_CN23XX_PKI_MAX_FRAME_SIZE - \
92 LIO_CN23XX_RAW_FRONT_SIZE)
94 /* common OCTEON configuration macros */
95 #define LIO_64BYTE_INSTR 64
97 #define LIO_MAX_TXQS_PER_INTF 8
98 #define LIO_MAX_RXQS_PER_INTF 8
99 #define LIO_DEF_TXQS_PER_INTF 4
100 #define LIO_DEF_RXQS_PER_INTF 4
102 /* Macros to get octeon config params */
103 #define LIO_GET_IQ_CFG(cfg) ((cfg)->iq)
104 #define LIO_GET_IQ_MAX_Q_CFG(cfg) ((cfg)->iq.max_iqs)
105 #define LIO_GET_IQ_INSTR_TYPE_CFG(cfg) ((cfg)->iq.instr_type)
107 #define LIO_GET_IQ_INTR_PKT_CFG(cfg) ((cfg)->iq.iq_intr_pkt)
109 #define LIO_GET_OQ_MAX_Q_CFG(cfg) ((cfg)->oq.max_oqs)
110 #define LIO_GET_OQ_PKTS_PER_INTR_CFG(cfg) ((cfg)->oq.pkts_per_intr)
111 #define LIO_GET_OQ_REFILL_THRESHOLD_CFG(cfg) ((cfg)->oq.refill_threshold)
112 #define LIO_GET_OQ_INTR_PKT_CFG(cfg) ((cfg)->oq.oq_intr_pkt)
113 #define LIO_GET_OQ_INTR_TIME_CFG(cfg) ((cfg)->oq.oq_intr_time)
115 #define LIO_GET_NUM_NIC_PORTS_CFG(cfg) ((cfg)->num_nic_ports)
116 #define LIO_GET_NUM_DEF_TX_DESCS_CFG(cfg) ((cfg)->num_def_tx_descs)
117 #define LIO_GET_NUM_DEF_RX_DESCS_CFG(cfg) ((cfg)->num_def_rx_descs)
118 #define LIO_GET_DEF_RX_BUF_SIZE_CFG(cfg) ((cfg)->def_rx_buf_size)
120 #define LIO_GET_NUM_RX_DESCS_NIC_IF_CFG(cfg, idx) \
121 ((cfg)->nic_if_cfg[idx].num_rx_descs)
122 #define LIO_GET_NUM_TX_DESCS_NIC_IF_CFG(cfg, idx) \
123 ((cfg)->nic_if_cfg[idx].num_tx_descs)
124 #define LIO_GET_NUM_RX_BUF_SIZE_NIC_IF_CFG(cfg, idx) \
125 ((cfg)->nic_if_cfg[idx].rx_buf_size)
127 #define LIO_GET_IS_SLI_BP_ON_CFG(cfg) ((cfg)->misc.enable_sli_oq_bp)
129 /* Max IOQs per OCTEON Link */
130 #define LIO_MAX_IOQS_PER_NICIF 64
132 #define LIO_SET_NUM_RX_DESCS_NIC_IF(cfg, idx, value) \
133 ((cfg)->nic_if_cfg[idx].num_rx_descs = value)
134 #define LIO_SET_NUM_TX_DESCS_NIC_IF(cfg, idx, value) \
135 ((cfg)->nic_if_cfg[idx].num_tx_descs = value)
137 /* TX/RX process pkt budget */
138 #define LIO_DEFAULT_TX_PKTS_PROCESS_BUDGET 64
139 #define LIO_DEFAULT_RX_PKTS_PROCESS_BUDGET 64
145 #define LIO_23XX_NAME "23xx"
148 * Structure to define the configuration attributes for each Input queue.
149 * Applicable to all Octeon processors
151 struct lio_iq_config {
152 #if BYTE_ORDER == BIG_ENDIAN
153 uint64_t reserved:16;
155 /* Tx interrupt packets. Applicable to 23xx only */
156 uint64_t iq_intr_pkt:16;
158 /* Minimum ticks to wait before checking for pending instructions. */
159 uint64_t db_timeout:16;
162 * Minimum number of commands pending to be posted to Octeon
163 * before driver hits the Input queue doorbell.
167 /* Command size - 32 or 64 bytes */
168 uint64_t instr_type:32;
171 * Pending list size (usually set to the sum of the size of all Input
174 uint64_t pending_list_size:32;
176 /* Max number of IQs available */
179 #else /* BYTE_ORDER != BIG_ENDIAN */
181 /* Max number of IQs available */
185 * Pending list size (usually set to the sum of the size of all Input
188 uint64_t pending_list_size:32;
190 /* Command size - 32 or 64 bytes */
191 uint64_t instr_type:32;
194 * Minimum number of commands pending to be posted to Octeon
195 * before driver hits the Input queue doorbell.
199 /* Minimum ticks to wait before checking for pending instructions. */
200 uint64_t db_timeout:16;
202 /* Tx interrupt packets. Applicable to 23xx only */
203 uint64_t iq_intr_pkt:16;
205 uint64_t reserved:16;
207 #endif /* BYTE_ORDER == BIG_ENDIAN */
211 * Structure to define the configuration attributes for each Output queue.
212 * Applicable to all Octeon processors
214 struct lio_oq_config {
215 #if BYTE_ORDER == BIG_ENDIAN
216 uint64_t reserved:16;
218 uint64_t pkts_per_intr:16;
221 * Interrupt Coalescing (Time Interval). Octeon will interrupt the
222 * host if atleast one packet was sent in the time interval specified
223 * by this field. The driver uses time interval interrupt coalescing
224 * by default. The time is specified in microseconds.
226 uint64_t oq_intr_time:16;
229 * Interrupt Coalescing (Packet Count). Octeon will interrupt the host
230 * only if it sent as many packets as specified by this field.
232 * usually does not use packet count interrupt coalescing.
234 uint64_t oq_intr_pkt:16;
237 * The number of buffers that were consumed during packet processing by
238 * the driver on this Output queue before the driver attempts to
240 * the descriptor ring with new buffers.
242 uint64_t refill_threshold:16;
244 /* Max number of OQs available */
247 #else /* BYTE_ORDER != BIG_ENDIAN */
249 /* Max number of OQs available */
253 * The number of buffers that were consumed during packet processing by
254 * the driver on this Output queue before the driver attempts to
256 * the descriptor ring with new buffers.
258 uint64_t refill_threshold:16;
261 * Interrupt Coalescing (Packet Count). Octeon will interrupt the host
262 * only if it sent as many packets as specified by this field.
264 * usually does not use packet count interrupt coalescing.
266 uint64_t oq_intr_pkt:16;
269 * Interrupt Coalescing (Time Interval). Octeon will interrupt the
270 * host if atleast one packet was sent in the time interval specified
271 * by this field. The driver uses time interval interrupt coalescing
272 * by default. The time is specified in microseconds.
274 uint64_t oq_intr_time:16;
276 uint64_t pkts_per_intr:16;
278 uint64_t reserved:16;
279 #endif /* BYTE_ORDER == BIG_ENDIAN */
284 * This structure conatins the NIC link configuration attributes,
285 * common for all the OCTEON Modles.
287 struct lio_nic_if_config {
288 #if BYTE_ORDER == BIG_ENDIAN
289 uint64_t reserved:56;
291 uint64_t base_queue:16;
293 uint64_t gmx_port_id:8;
296 * mbuf size, We need not change buf size even for Jumbo frames.
297 * Octeon can send jumbo frames in 4 consecutive descriptors,
299 uint64_t rx_buf_size:16;
301 /* Num of desc for tx rings */
302 uint64_t num_tx_descs:16;
304 /* Num of desc for rx rings */
305 uint64_t num_rx_descs:16;
307 /* Actual configured value. Range could be: 1...max_rxqs */
308 uint64_t num_rxqs:16;
310 /* Max Rxqs: Half for each of the two ports :max_oq/2 */
311 uint64_t max_rxqs:16;
313 /* Actual configured value. Range could be: 1...max_txqs */
314 uint64_t num_txqs:16;
316 /* Max Txqs: Half for each of the two ports :max_iq/2 */
317 uint64_t max_txqs:16;
319 #else /* BYTE_ORDER != BIG_ENDIAN */
321 /* Max Txqs: Half for each of the two ports :max_iq/2 */
322 uint64_t max_txqs:16;
324 /* Actual configured value. Range could be: 1...max_txqs */
325 uint64_t num_txqs:16;
327 /* Max Rxqs: Half for each of the two ports :max_oq/2 */
328 uint64_t max_rxqs:16;
330 /* Actual configured value. Range could be: 1...max_rxqs */
331 uint64_t num_rxqs:16;
333 /* Num of desc for rx rings */
334 uint64_t num_rx_descs:16;
336 /* Num of desc for tx rings */
337 uint64_t num_tx_descs:16;
340 * mbuf size, We need not change buf size even for Jumbo frames.
341 * Octeon can send jumbo frames in 4 consecutive descriptors,
343 uint64_t rx_buf_size:16;
345 uint64_t gmx_port_id:8;
347 uint64_t base_queue:16;
349 uint64_t reserved:56;
350 #endif /* BYTE_ORDER == BIG_ENDIAN */
355 * Structure to define the configuration attributes for meta data.
356 * Applicable to all Octeon processors.
359 struct lio_misc_config {
360 #if BYTE_ORDER == BIG_ENDIAN
361 /* Host link status polling period */
362 uint64_t host_link_query_interval:32;
363 /* Oct link status polling period */
364 uint64_t oct_link_query_interval:32;
366 uint64_t enable_sli_oq_bp:1;
367 /* Control IQ Group */
368 uint64_t ctrlq_grp:4;
370 #else /* BYTE_ORDER != BIG_ENDIAN */
372 /* Control IQ Group */
373 uint64_t ctrlq_grp:4;
375 uint64_t enable_sli_oq_bp:1;
376 /* Host link status polling period */
377 uint64_t oct_link_query_interval:32;
378 /* Oct link status polling period */
379 uint64_t host_link_query_interval:32;
381 #endif /* BYTE_ORDER == BIG_ENDIAN */
384 /* Structure to define the configuration for all OCTEON processors. */
389 /* Input Queue attributes. */
390 struct lio_iq_config iq;
392 /* Output Queue attributes. */
393 struct lio_oq_config oq;
395 /* NIC Port Configuration */
396 struct lio_nic_if_config nic_if_cfg[LIO_MAX_IF];
398 /* Miscellaneous attributes */
399 struct lio_misc_config misc;
403 int num_def_tx_descs;
405 /* Num of desc for rx rings */
406 int num_def_rx_descs;
412 /* The following config values are fixed and should not be modified. */
413 /* Maximum address space to be mapped for Octeon's BAR1 index-based access. */
414 #define LIO_MAX_BAR1_MAP_INDEX 2
417 * Response lists - 1 ordered, 1 unordered-blocking, 1 unordered-nonblocking
418 * NoResponse Lists are now maintained with each IQ. (Dec' 2007).
420 #define LIO_MAX_RESPONSE_LISTS 4
423 * Opcode hash bits. The opcode is hashed on the lower 6-bits to lookup the
426 #define LIO_OPCODE_MASK_BITS 6
428 /* Mask for the 6-bit lookup hash */
429 #define LIO_OPCODE_MASK 0x3f
431 /* Size of the dispatch table. The 6-bit hash can index into 2^6 entries */
432 #define LIO_DISPATCH_LIST_SIZE BIT(LIO_OPCODE_MASK_BITS)
434 #define LIO_MAX_INSTR_QUEUES(oct) LIO_CN23XX_PF_MAX_INPUT_QUEUES
435 #define LIO_MAX_OUTPUT_QUEUES(oct) LIO_CN23XX_PF_MAX_OUTPUT_QUEUES
437 #define LIO_MAX_POSSIBLE_INSTR_QUEUES LIO_CN23XX_PF_MAX_INPUT_QUEUES
438 #define LIO_MAX_POSSIBLE_OUTPUT_QUEUES LIO_CN23XX_PF_MAX_OUTPUT_QUEUES
439 #endif /* __LIO_CONFIG_H__ */