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36 * \brief Host Driver: This file defines the octeon device structure.
39 #ifndef _LIO_DEVICE_H_
40 #define _LIO_DEVICE_H_
42 #include <sys/endian.h> /* for BYTE_ORDER */
44 /* PCI VendorId Device Id */
45 #define LIO_CN23XX_PF_PCIID 0x9702177d
47 * Driver identifies chips by these Ids, created by clubbing together
48 * DeviceId+RevisionId; Where Revision Id is not used to distinguish
49 * between chips, a value of 0 is used for revision id.
51 #define LIO_CN23XX_PF_VID 0x9702
52 #define LIO_CN2350_10G_SUBDEVICE 0x03
53 #define LIO_CN2350_10G_SUBDEVICE1 0x04
54 #define LIO_CN2360_10G_SUBDEVICE 0x05
55 #define LIO_CN2350_25G_SUBDEVICE 0x07
56 #define LIO_CN2360_25G_SUBDEVICE 0x06
59 /* Endian-swap modes supported by Octeon. */
60 enum lio_pci_swap_mode {
61 LIO_PCI_PASSTHROUGH = 0,
62 LIO_PCI_SWAP_64BIT = 1,
63 LIO_PCI_SWAP_32BIT = 2,
64 LIO_PCI_LW_SWAP_32BIT = 3
68 LIO_CFG_TYPE_DEFAULT = 0,
72 #define OCTEON_OUTPUT_INTR (2)
73 #define OCTEON_ALL_INTR 0xff
75 /*--------------- PCI BAR1 index registers -------------*/
78 #define LIO_PCI_BAR1_ENABLE_CA 1
79 #define LIO_PCI_BAR1_ENDIAN_MODE LIO_PCI_SWAP_64BIT
80 #define LIO_PCI_BAR1_ENTRY_VALID 1
81 #define LIO_PCI_BAR1_MASK ((LIO_PCI_BAR1_ENABLE_CA << 3) | \
82 (LIO_PCI_BAR1_ENDIAN_MODE << 1) | \
83 LIO_PCI_BAR1_ENTRY_VALID)
86 * Octeon Device state.
87 * Each octeon device goes through each of these states
88 * as it is initialized.
90 #define LIO_DEV_BEGIN_STATE 0x0
91 #define LIO_DEV_PCI_ENABLE_DONE 0x1
92 #define LIO_DEV_PCI_MAP_DONE 0x2
93 #define LIO_DEV_DISPATCH_INIT_DONE 0x3
94 #define LIO_DEV_INSTR_QUEUE_INIT_DONE 0x4
95 #define LIO_DEV_SC_BUFF_POOL_INIT_DONE 0x5
96 #define LIO_DEV_MSIX_ALLOC_VECTOR_DONE 0x6
97 #define LIO_DEV_RESP_LIST_INIT_DONE 0x7
98 #define LIO_DEV_DROQ_INIT_DONE 0x8
99 #define LIO_DEV_INTR_SET_DONE 0xa
100 #define LIO_DEV_IO_QUEUES_DONE 0xb
101 #define LIO_DEV_CONSOLE_INIT_DONE 0xc
102 #define LIO_DEV_HOST_OK 0xd
103 #define LIO_DEV_CORE_OK 0xe
104 #define LIO_DEV_RUNNING 0xf
105 #define LIO_DEV_IN_RESET 0x10
106 #define LIO_DEV_STATE_INVALID 0x11
108 #define LIO_DEV_STATES LIO_DEV_STATE_INVALID
111 * Octeon Device interrupts
112 * These interrupt bits are set in int_status filed of
113 * octeon_device structure
115 #define LIO_DEV_INTR_DMA0_FORCE 0x01
116 #define LIO_DEV_INTR_DMA1_FORCE 0x02
117 #define LIO_DEV_INTR_PKT_DATA 0x04
119 #define LIO_RESET_MSECS (3000)
121 /*---------------------------DISPATCH LIST-------------------------------*/
124 * The dispatch list entry.
125 * The driver keeps a record of functions registered for each
126 * response header opcode in this structure. Since the opcode is
127 * hashed to index into the driver's list, more than one opcode
128 * can hash to the same entry, in which case the list field points
129 * to a linked list with the other entries.
131 struct lio_dispatch {
132 /* Singly-linked tail queue node for this entry */
133 struct lio_stailq_node node;
135 /* Singly-linked tail queue head for this entry */
136 struct lio_stailq_head head;
138 /* The opcode for which the dispatch function & arg should be used */
141 /* The function to be called for a packet received by the driver */
142 lio_dispatch_fn_t dispatch_fn;
145 * The application specified argument to be passed to the above
146 * function along with the received packet
151 /* The dispatch list structure. */
152 struct lio_dispatch_list {
153 /* access to dispatch list must be atomic */
156 /* Count of dispatch functions currently registered */
159 /* The list of dispatch functions */
160 struct lio_dispatch *dlist;
163 /*----------------------- THE OCTEON DEVICE ---------------------------*/
165 #define LIO_MEM_REGIONS 3
167 * PCI address space information.
168 * Each of the 3 address spaces given by BAR0, BAR2 and BAR4 of
169 * Octeon gets mapped to different physical address spaces in
172 struct lio_mem_bus_space {
173 struct resource *pci_mem;
175 bus_space_handle_t handle;
178 #define LIO_MAX_MAPS 32
180 struct lio_io_enable {
186 struct lio_reg_list {
187 uint32_t pci_win_wr_addr;
189 uint32_t pci_win_rd_addr_hi;
190 uint32_t pci_win_rd_addr_lo;
191 uint32_t pci_win_rd_addr;
193 uint32_t pci_win_wr_data_hi;
194 uint32_t pci_win_wr_data_lo;
195 uint32_t pci_win_wr_data;
197 uint32_t pci_win_rd_data;
200 #define LIO_MAX_CONSOLE_READ_BYTES 512
202 typedef int (*octeon_console_print_fn)(struct octeon_device *oct,
203 uint32_t num, char *pre, char *suf);
208 uint32_t buffer_size;
209 uint64_t input_base_addr;
210 uint64_t output_base_addr;
211 octeon_console_print_fn print;
212 char leftover[LIO_MAX_CONSOLE_READ_BYTES];
215 struct lio_board_info {
216 char name[LIO_BOARD_NAME];
217 char serial_number[LIO_SERIAL_NUM_LEN];
223 void (*setup_iq_regs) (struct octeon_device *, uint32_t);
224 void (*setup_oq_regs) (struct octeon_device *, uint32_t);
226 void (*process_interrupt_regs) (void *);
227 uint64_t (*msix_interrupt_handler) (void *);
228 int (*soft_reset) (struct octeon_device *);
229 int (*setup_device_regs) (struct octeon_device *);
230 void (*bar1_idx_setup) (struct octeon_device *, uint64_t,
232 void (*bar1_idx_write) (struct octeon_device *, uint32_t,
234 uint32_t (*bar1_idx_read) (struct octeon_device *, uint32_t);
235 uint32_t (*update_iq_read_idx) (struct lio_instr_queue *);
237 void (*enable_interrupt) (struct octeon_device *, uint8_t);
238 void (*disable_interrupt) (struct octeon_device *, uint8_t);
240 int (*enable_io_queues) (struct octeon_device *);
241 void (*disable_io_queues) (struct octeon_device *);
244 /* Must be multiple of 8, changing breaks ABI */
245 #define LIO_BOOTMEM_NAME_LEN 128
248 * Structure for named memory blocks
249 * Number of descriptors
250 * available can be changed without affecting compatibility,
251 * but name length changes require a bump in the bootmem
253 * Note: This structure must be naturally 64 bit aligned, as a single
254 * memory image will be used by both 32 and 64 bit programs.
256 struct cvmx_bootmem_named_block_desc {
257 /* Base address of named block */
260 /* Size actually allocated for named block */
263 /* name of named block */
264 char name[LIO_BOOTMEM_NAME_LEN];
268 uint32_t max_nic_ports; /* max nic ports for the device */
269 uint32_t num_gmx_ports; /* num gmx ports */
270 uint64_t app_cap_flags; /* firmware cap flags */
273 * The core application is running in this mode.
274 * See octeon-drv-opcodes.h for values.
277 char lio_firmware_version[32];
281 struct callout timer;
286 #define LIO_NIC_STARTER_TIMEOUT 30000 /* 30000ms (30s) */
289 struct taskqueue *tq;
290 struct timeout_task work;
295 struct lio_if_props {
297 * Each interface in the Octeon device has a network
298 * device pointer (used for OS specific calls).
305 #define LIO_MSIX_PO_INT 0x1
306 #define LIO_MSIX_PI_INT 0x2
308 struct lio_pf_vf_hs_word {
309 #if BYTE_ORDER == LITTLE_ENDIAN
310 /* PKIND value assigned for the DPI interface */
313 /* OCTEON core clock multiplier */
314 uint64_t core_tics_per_us:16;
316 /* OCTEON coprocessor clock multiplier */
317 uint64_t coproc_tics_per_us:16;
319 /* app that currently running on OCTEON */
323 uint64_t reserved:16;
325 #else /* BYTE_ORDER != LITTLE_ENDIAN */
328 uint64_t reserved:16;
330 /* app that currently running on OCTEON */
333 /* OCTEON coprocessor clock multiplier */
334 uint64_t coproc_tics_per_us:16;
336 /* OCTEON core clock multiplier */
337 uint64_t core_tics_per_us:16;
339 /* PKIND value assigned for the DPI interface */
341 #endif /* BYTE_ORDER == LITTLE_ENDIAN */
344 struct lio_sriov_info {
346 /* Actual rings left for PF device */
347 uint32_t num_pf_rings;
349 /* SRN of PF usable IO queues */
356 struct lio_ioq_vector {
357 struct octeon_device *oct_dev;
358 struct resource *msix_res;
362 cpuset_t affinity_mask;
368 * Each Octeon device has this structure to represent all its
371 struct octeon_device {
372 /* Lock for PCI window configuration accesses */
373 struct mtx pci_win_lock;
375 /* Lock for memory accesses */
376 struct mtx mem_access_lock;
378 /* PCI device pointer */
381 /* Chip specific information. */
384 /* Number of interfaces detected in this octeon device. */
387 struct lio_if_props props;
389 /* Octeon Chip type. */
394 uint16_t subdevice_id;
399 /* This device's id - set by the driver. */
402 /* This device's PCIe port used for traffic. */
406 #define LIO_FLAG_MSIX_ENABLED (uint32_t)(1 << 2)
408 /* The state of this device */
411 /* memory mapped io range */
412 struct lio_mem_bus_space mem_bus_space[LIO_MEM_REGIONS];
414 struct lio_reg_list reg_list;
416 struct lio_fn_list fn_list;
418 struct lio_board_info boardinfo;
422 /* The pool containing pre allocated buffers used for soft commands */
423 struct lio_sc_buffer_pool sc_buf_pool;
425 /* The input instruction queues */
426 struct lio_instr_queue *instr_queue[LIO_MAX_POSSIBLE_INSTR_QUEUES];
428 /* The doubly-linked list of instruction response */
429 struct lio_response_list response_list[LIO_MAX_RESPONSE_LISTS];
433 /* The DROQ output queues */
434 struct lio_droq *droq[LIO_MAX_POSSIBLE_OUTPUT_QUEUES];
436 struct lio_io_enable io_qmask;
438 /* List of dispatch functions */
439 struct lio_dispatch_list dispatch;
443 /* Physical location of the cvmx_bootmem_desc_t in octeon memory */
444 uint64_t bootmem_desc_addr;
447 * Placeholder memory for named blocks.
448 * Assumes single-threaded access
450 struct cvmx_bootmem_named_block_desc bootmem_named_block_desc;
452 /* Address of consoles descriptor */
453 uint64_t console_desc_addr;
455 /* Number of consoles available. 0 means they are inaccessible */
456 uint32_t num_consoles;
459 struct lio_console console[LIO_MAX_MAPS];
461 /* Console named block info */
463 uint64_t dram_region_base;
467 /* Coprocessor clock rate. */
468 uint64_t coproc_clock_rate;
471 * The core application is running in this mode. See lio_common.h
476 struct lio_fw_info fw_info;
478 /* The name given to this device. */
479 char device_name[32];
481 struct lio_tq dma_comp_tq;
483 /* Lock for dma response list */
484 struct mtx cmd_resp_wqlock;
485 uint32_t cmd_resp_state;
487 struct lio_tq check_db_tq[LIO_MAX_POSSIBLE_INSTR_QUEUES];
489 struct lio_callout console_timer[LIO_MAX_MAPS];
493 /* For PF, there is one non-ioq interrupt handler */
494 struct resource *msix_res;
498 #define INTRNAMSIZ (32)
499 #define IRQ_NAME_OFF(i) ((i) * INTRNAMSIZ)
501 struct lio_sriov_info sriov_info;
503 struct lio_pf_vf_hs_word pfvf_hsword;
507 /* IOq information of it's corresponding MSI-X interrupt. */
508 struct lio_ioq_vector *ioq_vector;
513 /* TX/RX process pkt budget */
517 struct octeon_link_stats link_stats; /* stastics from firmware */
519 struct proc *watchdog_task;
521 volatile bool cores_crashed;
523 uint32_t rx_coalesce_usecs;
524 uint32_t rx_max_coalesced_frames;
525 uint32_t tx_max_coalesced_frames;
527 #define OCTEON_UBOOT_BUFFER_SIZE 512
528 char uboot_version[OCTEON_UBOOT_BUFFER_SIZE];
530 int uboot_sidx, uboot_eidx;
538 volatile int *adapter_refcount; /* reference count of adapter */
541 #define LIO_DRV_ONLINE 1
542 #define LIO_DRV_OFFLINE 2
543 #define LIO_CN23XX_PF(oct) ((oct)->chip_id == LIO_CN23XX_PF_VID)
544 #define LIO_CHIP_CONF(oct, TYPE) \
545 (((struct lio_ ## TYPE *)((oct)->chip))->conf)
546 #define MAX_IO_PENDING_PKT_COUNT 100
548 /*------------------ Function Prototypes ----------------------*/
550 /* Initialize device list memory */
551 void lio_init_device_list(int conf_type);
553 /* Free memory for Input and Output queue structures for a octeon device */
554 void lio_free_device_mem(struct octeon_device *oct);
557 * Look up a free entry in the octeon_device table and allocate resources
558 * for the octeon_device structure for an octeon device. Called at init
561 struct octeon_device *lio_allocate_device(device_t device);
564 * Register a device's bus location at initialization time.
565 * @param oct - pointer to the octeon device structure.
566 * @param bus - PCIe bus #
567 * @param dev - PCIe device #
568 * @param func - PCIe function #
569 * @param is_pf - TRUE for PF, FALSE for VF
570 * @return reference count of device's adapter
572 int lio_register_device(struct octeon_device *oct, int bus, int dev,
573 int func, int is_pf);
576 * Deregister a device at de-initialization time.
577 * @param oct - pointer to the octeon device structure.
578 * @return reference count of device's adapter
580 int lio_deregister_device(struct octeon_device *oct);
583 * Initialize the driver's dispatch list which is a mix of a hash table
584 * and a linked list. This is done at driver load time.
585 * @param octeon_dev - pointer to the octeon device structure.
586 * @return 0 on success, else -ve error value
588 int lio_init_dispatch_list(struct octeon_device *octeon_dev);
591 * Delete the driver's dispatch list and all registered entries.
592 * This is done at driver unload time.
593 * @param octeon_dev - pointer to the octeon device structure.
595 void lio_delete_dispatch_list(struct octeon_device *octeon_dev);
598 * Initialize the core device fields with the info returned by the FW.
599 * @param recv_info - Receive info structure
600 * @param buf - Receive buffer
602 int lio_core_drv_init(struct lio_recv_info *recv_info, void *buf);
605 * Gets the dispatch function registered to receive packets with a
606 * given opcode/subcode.
607 * @param octeon_dev - the octeon device pointer.
608 * @param opcode - the opcode for which the dispatch function
610 * @param subcode - the subcode for which the dispatch function
613 * @return Success: lio_dispatch_fn_t (dispatch function pointer)
614 * @return Failure: NULL
616 * Looks up the dispatch list to get the dispatch function for a
619 lio_dispatch_fn_t lio_get_dispatch(struct octeon_device *octeon_dev,
620 uint16_t opcode, uint16_t subcode);
623 * Get the octeon device pointer.
624 * @param octeon_id - The id for which the octeon device pointer is required.
625 * @return Success: Octeon device pointer.
626 * @return Failure: NULL.
628 struct octeon_device *lio_get_device(uint32_t octeon_id);
631 * Get the octeon id assigned to the octeon device passed as argument.
632 * This function is exported to other modules.
633 * @param dev - octeon device pointer passed as a void *.
634 * @return octeon device id
636 int lio_get_device_id(void *dev);
638 static inline uint16_t
639 OCTEON_MAJOR_REV(struct octeon_device *oct)
642 uint16_t rev = (oct->rev_id & 0xC) >> 2;
644 return ((rev == 0) ? 1 : rev);
647 static inline uint16_t
648 OCTEON_MINOR_REV(struct octeon_device *oct)
651 return (oct->rev_id & 0x3);
655 * Read windowed register.
656 * @param oct - pointer to the Octeon device.
657 * @param addr - Address of the register to read.
659 * This routine is called to read from the indirectly accessed
660 * Octeon registers that are visible through a PCI BAR0 mapped window
662 * @return - 64 bit value read from the register.
665 uint64_t lio_pci_readq(struct octeon_device *oct, uint64_t addr);
668 * Write windowed register.
669 * @param oct - pointer to the Octeon device.
670 * @param val - Value to write
671 * @param addr - Address of the register to write
673 * This routine is called to write to the indirectly accessed
674 * Octeon registers that are visible through a PCI BAR0 mapped window
678 void lio_pci_writeq(struct octeon_device *oct, uint64_t val, uint64_t addr);
681 * Checks if memory access is okay
683 * @param oct which octeon to send to
684 * @return Zero on success, negative on failure.
686 int lio_mem_access_ok(struct octeon_device *oct);
689 * Waits for DDR initialization.
691 * @param oct which octeon to send to
692 * @param timeout_in_ms pointer to how long to wait until DDR is initialized
694 * If contents are 0, it waits until contents are non-zero
695 * before starting to check.
696 * @return Zero on success, negative on failure.
698 int lio_wait_for_ddr_init(struct octeon_device *oct,
699 unsigned long *timeout_in_ms);
702 * Wait for u-boot to boot and be waiting for a command.
704 * @param wait_time_hundredths
705 * Maximum time to wait
707 * @return Zero on success, negative on failure.
709 int lio_wait_for_bootloader(struct octeon_device *oct,
710 uint32_t wait_time_hundredths);
713 * Initialize console access
715 * @param oct which octeon initialize
716 * @return Zero on success, negative on failure.
718 int lio_init_consoles(struct octeon_device *oct);
721 * Adds access to a console to the device.
723 * @param oct: which octeon to add to
724 * @param console_num: which console
725 * @param dbg_enb: ptr to debug enablement string, one of:
726 * * NULL for no debug output (i.e. disabled)
727 * * empty string enables debug output (via default method)
728 * * specific string to enable debug console output
730 * @return Zero on success, negative on failure.
732 int lio_add_console(struct octeon_device *oct, uint32_t console_num,
735 /* write or read from a console */
736 int lio_console_write(struct octeon_device *oct, uint32_t console_num,
737 char *buffer, uint32_t write_request_size,
740 /* Removes all attached consoles. */
741 void lio_remove_consoles(struct octeon_device *oct);
744 * Send a string to u-boot on console 0 as a command.
746 * @param oct which octeon to send to
747 * @param cmd_str String to send
748 * @param wait_hundredths Time to wait for u-boot to accept the command.
750 * @return Zero on success, negative on failure.
752 int lio_console_send_cmd(struct octeon_device *oct, char *cmd_str,
753 uint32_t wait_hundredths);
756 * Parses, validates, and downloads firmware, then boots associated cores.
757 * @param oct which octeon to download firmware to
758 * @param data - The complete firmware file image
759 * @param size - The size of the data
761 * @return 0 if success.
762 * -EINVAL if file is incompatible or badly formatted.
763 * -ENODEV if no handler was found for the application type or an
764 * invalid octeon id was passed.
766 int lio_download_firmware(struct octeon_device *oct, const uint8_t *data,
769 char *lio_get_state_string(volatile int *state_ptr);
772 * Sets up instruction queues for the device
773 * @param oct which octeon to setup
775 * @return 0 if success. 1 if fails
777 int lio_setup_instr_queue0(struct octeon_device *oct);
780 * Sets up output queues for the device
781 * @param oct which octeon to setup
783 * @return 0 if success. 1 if fails
785 int lio_setup_output_queue0(struct octeon_device *oct);
787 int lio_get_tx_qsize(struct octeon_device *oct, uint32_t q_no);
789 int lio_get_rx_qsize(struct octeon_device *oct, uint32_t q_no);
792 * Retrieve the config for the device
793 * @param oct which octeon
794 * @param card_type type of card
796 * @returns pointer to configuration
798 void *lio_get_config_info(struct octeon_device *oct, uint16_t card_type);
801 * Gets the octeon device configuration
802 * @return - pointer to the octeon configuration struture
804 struct lio_config *lio_get_conf(struct octeon_device *oct);
806 void lio_free_ioq_vector(struct octeon_device *oct);
807 int lio_allocate_ioq_vector(struct octeon_device *oct);
808 void lio_enable_irq(struct lio_droq *droq, struct lio_instr_queue *iq);
810 static inline uint32_t
811 lio_read_pci_cfg(struct octeon_device *oct, uint32_t reg)
814 return (pci_read_config(oct->device, reg, 4));
818 lio_write_pci_cfg(struct octeon_device *oct, uint32_t reg, uint32_t value)
821 pci_write_config(oct->device, reg, value, 4);
824 static inline uint8_t
825 lio_read_csr8(struct octeon_device *oct, uint32_t reg)
828 return (bus_space_read_1(oct->mem_bus_space[0].tag,
829 oct->mem_bus_space[0].handle, reg));
833 lio_write_csr8(struct octeon_device *oct, uint32_t reg, uint8_t val)
836 bus_space_write_1(oct->mem_bus_space[0].tag,
837 oct->mem_bus_space[0].handle, reg, val);
840 static inline uint16_t
841 lio_read_csr16(struct octeon_device *oct, uint32_t reg)
844 return (bus_space_read_2(oct->mem_bus_space[0].tag,
845 oct->mem_bus_space[0].handle, reg));
849 lio_write_csr16(struct octeon_device *oct, uint32_t reg, uint16_t val)
852 bus_space_write_2(oct->mem_bus_space[0].tag,
853 oct->mem_bus_space[0].handle, reg, val);
856 static inline uint32_t
857 lio_read_csr32(struct octeon_device *oct, uint32_t reg)
860 return (bus_space_read_4(oct->mem_bus_space[0].tag,
861 oct->mem_bus_space[0].handle, reg));
865 lio_write_csr32(struct octeon_device *oct, uint32_t reg, uint32_t val)
868 bus_space_write_4(oct->mem_bus_space[0].tag,
869 oct->mem_bus_space[0].handle, reg, val);
872 static inline uint64_t
873 lio_read_csr64(struct octeon_device *oct, uint32_t reg)
877 return (lio_read_csr32(oct, reg) |
878 ((uint64_t)lio_read_csr32(oct, reg + 4) << 32));
880 return (bus_space_read_8(oct->mem_bus_space[0].tag,
881 oct->mem_bus_space[0].handle, reg));
886 lio_write_csr64(struct octeon_device *oct, uint32_t reg, uint64_t val)
890 lio_write_csr32(oct, reg, (uint32_t)val);
891 lio_write_csr32(oct, reg + 4, val >> 32);
893 bus_space_write_8(oct->mem_bus_space[0].tag,
894 oct->mem_bus_space[0].handle, reg, val);
898 #endif /* _LIO_DEVICE_H_ */