4 * Copyright(c) 2017 Cavium, Inc.. All rights reserved.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
11 * * Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
17 * * Neither the name of Cavium, Inc. nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25 * OWNER(S) OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 * \brief Host Driver: This file is included by all host driver source files
37 * to include common definitions.
43 extern unsigned int lio_hwlro;
45 #define LIO_CAST64(v) ((long long)(long)(v))
47 #define LIO_DRV_NAME "lio"
51 lio_swap_8B_data(uint64_t *data, uint32_t blocks)
55 *data = htobe64(*data);
62 * \brief unmaps a PCI BAR
63 * @param oct Pointer to Octeon device
64 * @param baridx bar index
67 lio_unmap_pci_barx(struct octeon_device *oct, int baridx)
70 lio_dev_dbg(oct, "Freeing PCI mapped regions for Bar%d\n", baridx);
72 if (oct->mem_bus_space[baridx].pci_mem != NULL) {
73 bus_release_resource(oct->device, SYS_RES_MEMORY,
75 oct->mem_bus_space[baridx].pci_mem);
76 oct->mem_bus_space[baridx].pci_mem = NULL;
81 * \brief maps a PCI BAR
82 * @param oct Pointer to Octeon device
83 * @param baridx bar index
86 lio_map_pci_barx(struct octeon_device *oct, int baridx)
88 int rid = PCIR_BAR(baridx * 2);
90 oct->mem_bus_space[baridx].pci_mem =
91 bus_alloc_resource_any(oct->device, SYS_RES_MEMORY, &rid,
94 if (oct->mem_bus_space[baridx].pci_mem == NULL) {
95 lio_dev_err(oct, "Unable to allocate bus resource: memory\n");
99 /* Save bus_space values for READ/WRITE_REG macros */
100 oct->mem_bus_space[baridx].tag =
101 rman_get_bustag(oct->mem_bus_space[baridx].pci_mem);
102 oct->mem_bus_space[baridx].handle =
103 rman_get_bushandle(oct->mem_bus_space[baridx].pci_mem);
105 lio_dev_dbg(oct, "BAR%d Tag 0x%llx Handle 0x%llx\n",
106 baridx, LIO_CAST64(oct->mem_bus_space[baridx].tag),
107 LIO_CAST64(oct->mem_bus_space[baridx].handle));
113 lio_sleep_cond(struct octeon_device *oct, volatile int *condition)
116 while (!(*condition)) {
118 lio_flush_iq(oct, oct->instr_queue[0], 0);
119 lio_process_ordered_list(oct, 0);
123 int lio_console_debug_enabled(uint32_t console);
126 #define ROUNDUP4(val) (((val) + 3) & 0xfffffffc)
130 #define ROUNDUP8(val) (((val) + 7) & 0xfffffff8)
133 #define BIT_ULL(nr) (1ULL << (nr))
135 void lio_free_mbuf(struct lio_instr_queue *iq,
136 struct lio_mbuf_free_info *finfo);
137 void lio_free_sgmbuf(struct lio_instr_queue *iq,
138 struct lio_mbuf_free_info *finfo);
140 #endif /* _LIO_MAIN_H_ */