4 * Copyright(c) 2017 Cavium, Inc.. All rights reserved.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
11 * * Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
17 * * Neither the name of Cavium, Inc. nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25 * OWNER(S) OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
37 * \brief Host Driver: This file is included by all host driver source files
38 * to include common definitions.
44 extern unsigned int lio_hwlro;
47 #define LIO_CAST64(v) ((long long)(long)(v))
49 #error "Unknown system architecture"
52 #define LIO_DRV_NAME "lio"
56 lio_swap_8B_data(uint64_t *data, uint32_t blocks)
60 *data = htobe64(*data);
67 * \brief unmaps a PCI BAR
68 * @param oct Pointer to Octeon device
69 * @param baridx bar index
72 lio_unmap_pci_barx(struct octeon_device *oct, int baridx)
75 lio_dev_dbg(oct, "Freeing PCI mapped regions for Bar%d\n", baridx);
77 if (oct->mem_bus_space[baridx].pci_mem != NULL) {
78 bus_release_resource(oct->device, SYS_RES_MEMORY,
80 oct->mem_bus_space[baridx].pci_mem);
81 oct->mem_bus_space[baridx].pci_mem = NULL;
86 * \brief maps a PCI BAR
87 * @param oct Pointer to Octeon device
88 * @param baridx bar index
91 lio_map_pci_barx(struct octeon_device *oct, int baridx)
93 int rid = PCIR_BAR(baridx * 2);
95 oct->mem_bus_space[baridx].pci_mem =
96 bus_alloc_resource_any(oct->device, SYS_RES_MEMORY, &rid,
99 if (oct->mem_bus_space[baridx].pci_mem == NULL) {
100 lio_dev_err(oct, "Unable to allocate bus resource: memory\n");
104 /* Save bus_space values for READ/WRITE_REG macros */
105 oct->mem_bus_space[baridx].tag =
106 rman_get_bustag(oct->mem_bus_space[baridx].pci_mem);
107 oct->mem_bus_space[baridx].handle =
108 rman_get_bushandle(oct->mem_bus_space[baridx].pci_mem);
110 lio_dev_dbg(oct, "BAR%d Tag 0x%lx Handle 0x%lx\n",
111 baridx, oct->mem_bus_space[baridx].tag,
112 oct->mem_bus_space[baridx].handle);
118 lio_sleep_cond(struct octeon_device *oct, volatile int *condition)
121 while (!(*condition)) {
123 lio_flush_iq(oct, oct->instr_queue[0], 0);
124 lio_process_ordered_list(oct, 0);
128 int lio_console_debug_enabled(uint32_t console);
131 #define ROUNDUP4(val) (((val) + 3) & 0xfffffffc)
135 #define ROUNDUP8(val) (((val) + 7) & 0xfffffff8)
138 #define BIT_ULL(nr) (1ULL << (nr))
140 void lio_free_mbuf(struct lio_instr_queue *iq,
141 struct lio_mbuf_free_info *finfo);
142 void lio_free_sgmbuf(struct lio_instr_queue *iq,
143 struct lio_mbuf_free_info *finfo);
145 #endif /* _LIO_MAIN_H_ */