2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
4 * Copyright (c) 2008 Weongyo Jeong <weongyo@freebsd.org>
5 * Copyright (c) 2007 Marvell Semiconductor, Inc.
6 * Copyright (c) 2007 Sam Leffler, Errno Consulting
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer,
14 * without modification.
15 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
16 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
17 * redistribution must be conditioned upon including a substantially
18 * similar Disclaimer requirement for further binary redistribution.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
24 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
25 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
26 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
29 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
31 * THE POSSIBILITY OF SUCH DAMAGES.
34 #include <sys/cdefs.h>
36 __FBSDID("$FreeBSD$");
41 #include <sys/param.h>
42 #include <sys/endian.h>
43 #include <sys/kernel.h>
44 #include <sys/malloc.h>
45 #include <sys/socket.h>
46 #include <sys/sockio.h>
47 #include <sys/sysctl.h>
48 #include <sys/taskqueue.h>
50 #include <machine/bus.h>
54 #include <net/if_var.h>
55 #include <net/if_dl.h>
56 #include <net/if_media.h>
57 #include <net/if_types.h>
58 #include <net/ethernet.h>
60 #include <net80211/ieee80211_var.h>
61 #include <net80211/ieee80211_regdomain.h>
65 #include <dev/malo/if_malo.h>
67 SYSCTL_NODE(_hw, OID_AUTO, malo, CTLFLAG_RD, 0,
68 "Marvell 88w8335 driver parameters");
70 static int malo_txcoalesce = 8; /* # tx pkts to q before poking f/w*/
71 SYSCTL_INT(_hw_malo, OID_AUTO, txcoalesce, CTLFLAG_RWTUN, &malo_txcoalesce,
72 0, "tx buffers to send at once");
73 static int malo_rxbuf = MALO_RXBUF; /* # rx buffers to allocate */
74 SYSCTL_INT(_hw_malo, OID_AUTO, rxbuf, CTLFLAG_RWTUN, &malo_rxbuf,
75 0, "rx buffers allocated");
76 static int malo_rxquota = MALO_RXBUF; /* # max buffers to process */
77 SYSCTL_INT(_hw_malo, OID_AUTO, rxquota, CTLFLAG_RWTUN, &malo_rxquota,
78 0, "max rx buffers to process per interrupt");
79 static int malo_txbuf = MALO_TXBUF; /* # tx buffers to allocate */
80 SYSCTL_INT(_hw_malo, OID_AUTO, txbuf, CTLFLAG_RWTUN, &malo_txbuf,
81 0, "tx buffers allocated");
84 static int malo_debug = 0;
85 SYSCTL_INT(_hw_malo, OID_AUTO, debug, CTLFLAG_RWTUN, &malo_debug,
86 0, "control debugging printfs");
88 MALO_DEBUG_XMIT = 0x00000001, /* basic xmit operation */
89 MALO_DEBUG_XMIT_DESC = 0x00000002, /* xmit descriptors */
90 MALO_DEBUG_RECV = 0x00000004, /* basic recv operation */
91 MALO_DEBUG_RECV_DESC = 0x00000008, /* recv descriptors */
92 MALO_DEBUG_RESET = 0x00000010, /* reset processing */
93 MALO_DEBUG_INTR = 0x00000040, /* ISR */
94 MALO_DEBUG_TX_PROC = 0x00000080, /* tx ISR proc */
95 MALO_DEBUG_RX_PROC = 0x00000100, /* rx ISR proc */
96 MALO_DEBUG_STATE = 0x00000400, /* 802.11 state transitions */
97 MALO_DEBUG_NODE = 0x00000800, /* node management */
98 MALO_DEBUG_RECV_ALL = 0x00001000, /* trace all frames (beacons) */
99 MALO_DEBUG_FW = 0x00008000, /* firmware */
100 MALO_DEBUG_ANY = 0xffffffff
102 #define IS_BEACON(wh) \
103 ((wh->i_fc[0] & (IEEE80211_FC0_TYPE_MASK | \
104 IEEE80211_FC0_SUBTYPE_MASK)) == \
105 (IEEE80211_FC0_TYPE_MGT|IEEE80211_FC0_SUBTYPE_BEACON))
106 #define IFF_DUMPPKTS_RECV(sc, wh) \
107 (((sc->malo_debug & MALO_DEBUG_RECV) && \
108 ((sc->malo_debug & MALO_DEBUG_RECV_ALL) || !IS_BEACON(wh))))
109 #define IFF_DUMPPKTS_XMIT(sc) \
110 (sc->malo_debug & MALO_DEBUG_XMIT)
111 #define DPRINTF(sc, m, fmt, ...) do { \
112 if (sc->malo_debug & (m)) \
113 printf(fmt, __VA_ARGS__); \
116 #define DPRINTF(sc, m, fmt, ...) do { \
121 static MALLOC_DEFINE(M_MALODEV, "malodev", "malo driver dma buffers");
123 static struct ieee80211vap *malo_vap_create(struct ieee80211com *,
124 const char [IFNAMSIZ], int, enum ieee80211_opmode, int,
125 const uint8_t [IEEE80211_ADDR_LEN],
126 const uint8_t [IEEE80211_ADDR_LEN]);
127 static void malo_vap_delete(struct ieee80211vap *);
128 static int malo_dma_setup(struct malo_softc *);
129 static int malo_setup_hwdma(struct malo_softc *);
130 static void malo_txq_init(struct malo_softc *, struct malo_txq *, int);
131 static void malo_tx_cleanupq(struct malo_softc *, struct malo_txq *);
132 static void malo_parent(struct ieee80211com *);
133 static int malo_transmit(struct ieee80211com *, struct mbuf *);
134 static void malo_start(struct malo_softc *);
135 static void malo_watchdog(void *);
136 static void malo_updateslot(struct ieee80211com *);
137 static int malo_newstate(struct ieee80211vap *, enum ieee80211_state, int);
138 static void malo_scan_start(struct ieee80211com *);
139 static void malo_scan_end(struct ieee80211com *);
140 static void malo_set_channel(struct ieee80211com *);
141 static int malo_raw_xmit(struct ieee80211_node *, struct mbuf *,
142 const struct ieee80211_bpf_params *);
143 static void malo_sysctlattach(struct malo_softc *);
144 static void malo_announce(struct malo_softc *);
145 static void malo_dma_cleanup(struct malo_softc *);
146 static void malo_stop(struct malo_softc *);
147 static int malo_chan_set(struct malo_softc *, struct ieee80211_channel *);
148 static int malo_mode_init(struct malo_softc *);
149 static void malo_tx_proc(void *, int);
150 static void malo_rx_proc(void *, int);
151 static void malo_init(void *);
154 * Read/Write shorthands for accesses to BAR 0. Note that all BAR 1
155 * operations are done in the "hal" except getting H/W MAC address at
156 * malo_attach and there should be no reference to them here.
159 malo_bar0_read4(struct malo_softc *sc, bus_size_t off)
161 return bus_space_read_4(sc->malo_io0t, sc->malo_io0h, off);
165 malo_bar0_write4(struct malo_softc *sc, bus_size_t off, uint32_t val)
167 DPRINTF(sc, MALO_DEBUG_FW, "%s: off 0x%jx val 0x%x\n",
168 __func__, (uintmax_t)off, val);
170 bus_space_write_4(sc->malo_io0t, sc->malo_io0h, off, val);
174 malo_attach(uint16_t devid, struct malo_softc *sc)
176 struct ieee80211com *ic = &sc->malo_ic;
179 uint8_t bands[IEEE80211_MODE_BYTES];
182 callout_init_mtx(&sc->malo_watchdog_timer, &sc->malo_mtx, 0);
183 mbufq_init(&sc->malo_snd, ifqmaxlen);
185 mh = malo_hal_attach(sc->malo_dev, devid,
186 sc->malo_io1h, sc->malo_io1t, sc->malo_dmat);
188 device_printf(sc->malo_dev, "unable to attach HAL\n");
195 * Load firmware so we can get setup. We arbitrarily pick station
196 * firmware; we'll re-load firmware as needed so setting up
197 * the wrong mode isn't a big deal.
199 error = malo_hal_fwload(mh, "malo8335-h", "malo8335-m");
201 device_printf(sc->malo_dev, "unable to setup firmware\n");
204 /* XXX gethwspecs() extracts correct informations? not maybe! */
205 error = malo_hal_gethwspecs(mh, &sc->malo_hwspecs);
207 device_printf(sc->malo_dev, "unable to fetch h/w specs\n");
211 DPRINTF(sc, MALO_DEBUG_FW,
212 "malo_hal_gethwspecs: hwversion 0x%x hostif 0x%x"
213 "maxnum_wcb 0x%x maxnum_mcaddr 0x%x maxnum_tx_wcb 0x%x"
214 "regioncode 0x%x num_antenna 0x%x fw_releasenum 0x%x"
215 "wcbbase0 0x%x rxdesc_read 0x%x rxdesc_write 0x%x"
216 "ul_fw_awakecookie 0x%x w[4] = %x %x %x %x",
217 sc->malo_hwspecs.hwversion,
218 sc->malo_hwspecs.hostinterface, sc->malo_hwspecs.maxnum_wcb,
219 sc->malo_hwspecs.maxnum_mcaddr, sc->malo_hwspecs.maxnum_tx_wcb,
220 sc->malo_hwspecs.regioncode, sc->malo_hwspecs.num_antenna,
221 sc->malo_hwspecs.fw_releasenum, sc->malo_hwspecs.wcbbase0,
222 sc->malo_hwspecs.rxdesc_read, sc->malo_hwspecs.rxdesc_write,
223 sc->malo_hwspecs.ul_fw_awakecookie,
224 sc->malo_hwspecs.wcbbase[0], sc->malo_hwspecs.wcbbase[1],
225 sc->malo_hwspecs.wcbbase[2], sc->malo_hwspecs.wcbbase[3]);
227 /* NB: firmware looks that it does not export regdomain info API. */
228 memset(bands, 0, sizeof(bands));
229 setbit(bands, IEEE80211_MODE_11B);
230 setbit(bands, IEEE80211_MODE_11G);
231 ieee80211_init_channels(ic, NULL, bands);
233 sc->malo_txantenna = 0x2; /* h/w default */
234 sc->malo_rxantenna = 0xffff; /* h/w default */
237 * Allocate tx + rx descriptors and populate the lists.
238 * We immediately push the information to the firmware
239 * as otherwise it gets upset.
241 error = malo_dma_setup(sc);
243 device_printf(sc->malo_dev,
244 "failed to setup descriptors: %d\n", error);
247 error = malo_setup_hwdma(sc); /* push to firmware */
248 if (error != 0) /* NB: malo_setupdma prints msg */
251 sc->malo_tq = taskqueue_create_fast("malo_taskq", M_NOWAIT,
252 taskqueue_thread_enqueue, &sc->malo_tq);
253 taskqueue_start_threads(&sc->malo_tq, 1, PI_NET,
254 "%s taskq", device_get_nameunit(sc->malo_dev));
256 NET_TASK_INIT(&sc->malo_rxtask, 0, malo_rx_proc, sc);
257 TASK_INIT(&sc->malo_txtask, 0, malo_tx_proc, sc);
260 ic->ic_name = device_get_nameunit(sc->malo_dev);
261 /* XXX not right but it's not used anywhere important */
262 ic->ic_phytype = IEEE80211_T_OFDM;
263 ic->ic_opmode = IEEE80211_M_STA;
265 IEEE80211_C_STA /* station mode supported */
266 | IEEE80211_C_BGSCAN /* capable of bg scanning */
267 | IEEE80211_C_MONITOR /* monitor mode */
268 | IEEE80211_C_SHPREAMBLE /* short preamble supported */
269 | IEEE80211_C_SHSLOT /* short slot time supported */
270 | IEEE80211_C_TXPMGT /* capable of txpow mgt */
271 | IEEE80211_C_WPA /* capable of WPA1+WPA2 */
273 IEEE80211_ADDR_COPY(ic->ic_macaddr, sc->malo_hwspecs.macaddr);
276 * Transmit requires space in the packet for a special format transmit
277 * record and optional padding between this record and the payload.
278 * Ask the net80211 layer to arrange this when encapsulating
279 * packets so we can add it efficiently.
281 ic->ic_headroom = sizeof(struct malo_txrec) -
282 sizeof(struct ieee80211_frame);
284 /* call MI attach routine. */
285 ieee80211_ifattach(ic);
286 /* override default methods */
287 ic->ic_vap_create = malo_vap_create;
288 ic->ic_vap_delete = malo_vap_delete;
289 ic->ic_raw_xmit = malo_raw_xmit;
290 ic->ic_updateslot = malo_updateslot;
291 ic->ic_scan_start = malo_scan_start;
292 ic->ic_scan_end = malo_scan_end;
293 ic->ic_set_channel = malo_set_channel;
294 ic->ic_parent = malo_parent;
295 ic->ic_transmit = malo_transmit;
297 sc->malo_invalid = 0; /* ready to go, enable int handling */
299 ieee80211_radiotap_attach(ic,
300 &sc->malo_tx_th.wt_ihdr, sizeof(sc->malo_tx_th),
301 MALO_TX_RADIOTAP_PRESENT,
302 &sc->malo_rx_th.wr_ihdr, sizeof(sc->malo_rx_th),
303 MALO_RX_RADIOTAP_PRESENT);
306 * Setup dynamic sysctl's.
308 malo_sysctlattach(sc);
311 ieee80211_announce(ic);
316 malo_dma_cleanup(sc);
320 sc->malo_invalid = 1;
325 static struct ieee80211vap *
326 malo_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit,
327 enum ieee80211_opmode opmode, int flags,
328 const uint8_t bssid[IEEE80211_ADDR_LEN],
329 const uint8_t mac[IEEE80211_ADDR_LEN])
331 struct malo_softc *sc = ic->ic_softc;
332 struct malo_vap *mvp;
333 struct ieee80211vap *vap;
335 if (!TAILQ_EMPTY(&ic->ic_vaps)) {
336 device_printf(sc->malo_dev, "multiple vaps not supported\n");
340 case IEEE80211_M_STA:
341 if (opmode == IEEE80211_M_STA)
342 flags |= IEEE80211_CLONE_NOBEACONS;
344 case IEEE80211_M_MONITOR:
347 device_printf(sc->malo_dev, "%s mode not supported\n",
348 ieee80211_opmode_name[opmode]);
349 return NULL; /* unsupported */
351 mvp = malloc(sizeof(struct malo_vap), M_80211_VAP, M_WAITOK | M_ZERO);
352 vap = &mvp->malo_vap;
353 ieee80211_vap_setup(ic, vap, name, unit, opmode, flags, bssid);
355 /* override state transition machine */
356 mvp->malo_newstate = vap->iv_newstate;
357 vap->iv_newstate = malo_newstate;
360 ieee80211_vap_attach(vap,
361 ieee80211_media_change, ieee80211_media_status, mac);
362 ic->ic_opmode = opmode;
367 malo_vap_delete(struct ieee80211vap *vap)
369 struct malo_vap *mvp = MALO_VAP(vap);
371 ieee80211_vap_detach(vap);
372 free(mvp, M_80211_VAP);
378 struct malo_softc *sc = arg;
379 struct malo_hal *mh = sc->malo_mh;
382 if (sc->malo_invalid) {
384 * The hardware is not ready/present, don't touch anything.
385 * Note this can happen early on if the IRQ is shared.
387 DPRINTF(sc, MALO_DEBUG_ANY, "%s: invalid; ignored\n", __func__);
388 return (FILTER_STRAY);
392 * Figure out the reason(s) for the interrupt.
394 malo_hal_getisr(mh, &status); /* NB: clears ISR too */
395 if (status == 0) /* must be a shared irq */
396 return (FILTER_STRAY);
398 DPRINTF(sc, MALO_DEBUG_INTR, "%s: status 0x%x imask 0x%x\n",
399 __func__, status, sc->malo_imask);
401 if (status & MALO_A2HRIC_BIT_RX_RDY)
402 taskqueue_enqueue(sc->malo_tq, &sc->malo_rxtask);
403 if (status & MALO_A2HRIC_BIT_TX_DONE)
404 taskqueue_enqueue(sc->malo_tq, &sc->malo_txtask);
405 if (status & MALO_A2HRIC_BIT_OPC_DONE)
406 malo_hal_cmddone(mh);
407 if (status & MALO_A2HRIC_BIT_MAC_EVENT)
409 if (status & MALO_A2HRIC_BIT_RX_PROBLEM)
411 if (status & MALO_A2HRIC_BIT_ICV_ERROR) {
413 sc->malo_stats.mst_rx_badtkipicv++;
416 if (((status | sc->malo_imask) ^ sc->malo_imask) != 0)
417 DPRINTF(sc, MALO_DEBUG_INTR,
418 "%s: can't handle interrupt status 0x%x\n",
421 return (FILTER_HANDLED);
425 malo_load_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error)
427 bus_addr_t *paddr = (bus_addr_t*) arg;
429 KASSERT(error == 0, ("error %u on bus_dma callback", error));
431 *paddr = segs->ds_addr;
435 malo_desc_setup(struct malo_softc *sc, const char *name,
436 struct malo_descdma *dd,
437 int nbuf, size_t bufsize, int ndesc, size_t descsize)
442 DPRINTF(sc, MALO_DEBUG_RESET,
443 "%s: %s DMA: %u bufs (%ju) %u desc/buf (%ju)\n",
444 __func__, name, nbuf, (uintmax_t) bufsize,
445 ndesc, (uintmax_t) descsize);
448 dd->dd_desc_len = nbuf * ndesc * descsize;
451 * Setup DMA descriptor area.
453 error = bus_dma_tag_create(bus_get_dma_tag(sc->malo_dev),/* parent */
454 PAGE_SIZE, 0, /* alignment, bounds */
455 BUS_SPACE_MAXADDR_32BIT, /* lowaddr */
456 BUS_SPACE_MAXADDR, /* highaddr */
457 NULL, NULL, /* filter, filterarg */
458 dd->dd_desc_len, /* maxsize */
460 dd->dd_desc_len, /* maxsegsize */
461 BUS_DMA_ALLOCNOW, /* flags */
466 device_printf(sc->malo_dev, "cannot allocate %s DMA tag\n",
471 /* allocate descriptors */
472 error = bus_dmamem_alloc(dd->dd_dmat, (void**) &dd->dd_desc,
473 BUS_DMA_NOWAIT | BUS_DMA_COHERENT, &dd->dd_dmamap);
475 device_printf(sc->malo_dev,
476 "unable to alloc memory for %u %s descriptors, "
477 "error %u\n", nbuf * ndesc, dd->dd_name, error);
481 error = bus_dmamap_load(dd->dd_dmat, dd->dd_dmamap,
482 dd->dd_desc, dd->dd_desc_len,
483 malo_load_cb, &dd->dd_desc_paddr, BUS_DMA_NOWAIT);
485 device_printf(sc->malo_dev,
486 "unable to map %s descriptors, error %u\n",
492 memset(ds, 0, dd->dd_desc_len);
493 DPRINTF(sc, MALO_DEBUG_RESET,
494 "%s: %s DMA map: %p (%lu) -> 0x%jx (%lu)\n",
495 __func__, dd->dd_name, ds, (u_long) dd->dd_desc_len,
496 (uintmax_t) dd->dd_desc_paddr, /*XXX*/ (u_long) dd->dd_desc_len);
500 bus_dmamem_free(dd->dd_dmat, dd->dd_desc, dd->dd_dmamap);
502 bus_dma_tag_destroy(dd->dd_dmat);
503 memset(dd, 0, sizeof(*dd));
507 #define DS2PHYS(_dd, _ds) \
508 ((_dd)->dd_desc_paddr + ((caddr_t)(_ds) - (caddr_t)(_dd)->dd_desc))
511 malo_rxdma_setup(struct malo_softc *sc)
514 struct malo_rxbuf *bf;
515 struct malo_rxdesc *ds;
517 error = malo_desc_setup(sc, "rx", &sc->malo_rxdma,
518 malo_rxbuf, sizeof(struct malo_rxbuf),
519 1, sizeof(struct malo_rxdesc));
524 * Allocate rx buffers and set them up.
526 bsize = malo_rxbuf * sizeof(struct malo_rxbuf);
527 bf = malloc(bsize, M_MALODEV, M_NOWAIT | M_ZERO);
529 device_printf(sc->malo_dev,
530 "malloc of %u rx buffers failed\n", bsize);
533 sc->malo_rxdma.dd_bufptr = bf;
535 STAILQ_INIT(&sc->malo_rxbuf);
536 ds = sc->malo_rxdma.dd_desc;
537 for (i = 0; i < malo_rxbuf; i++, bf++, ds++) {
539 bf->bf_daddr = DS2PHYS(&sc->malo_rxdma, ds);
540 error = bus_dmamap_create(sc->malo_dmat, BUS_DMA_NOWAIT,
543 device_printf(sc->malo_dev,
544 "%s: unable to dmamap for rx buffer, error %d\n",
548 /* NB: tail is intentional to preserve descriptor order */
549 STAILQ_INSERT_TAIL(&sc->malo_rxbuf, bf, bf_list);
555 malo_txdma_setup(struct malo_softc *sc, struct malo_txq *txq)
558 struct malo_txbuf *bf;
559 struct malo_txdesc *ds;
561 error = malo_desc_setup(sc, "tx", &txq->dma,
562 malo_txbuf, sizeof(struct malo_txbuf),
563 MALO_TXDESC, sizeof(struct malo_txdesc));
567 /* allocate and setup tx buffers */
568 bsize = malo_txbuf * sizeof(struct malo_txbuf);
569 bf = malloc(bsize, M_MALODEV, M_NOWAIT | M_ZERO);
571 device_printf(sc->malo_dev, "malloc of %u tx buffers failed\n",
575 txq->dma.dd_bufptr = bf;
577 STAILQ_INIT(&txq->free);
579 ds = txq->dma.dd_desc;
580 for (i = 0; i < malo_txbuf; i++, bf++, ds += MALO_TXDESC) {
582 bf->bf_daddr = DS2PHYS(&txq->dma, ds);
583 error = bus_dmamap_create(sc->malo_dmat, BUS_DMA_NOWAIT,
586 device_printf(sc->malo_dev,
587 "unable to create dmamap for tx "
588 "buffer %u, error %u\n", i, error);
591 STAILQ_INSERT_TAIL(&txq->free, bf, bf_list);
599 malo_desc_cleanup(struct malo_softc *sc, struct malo_descdma *dd)
601 bus_dmamap_unload(dd->dd_dmat, dd->dd_dmamap);
602 bus_dmamem_free(dd->dd_dmat, dd->dd_desc, dd->dd_dmamap);
603 bus_dma_tag_destroy(dd->dd_dmat);
605 memset(dd, 0, sizeof(*dd));
609 malo_rxdma_cleanup(struct malo_softc *sc)
611 struct malo_rxbuf *bf;
613 STAILQ_FOREACH(bf, &sc->malo_rxbuf, bf_list) {
614 if (bf->bf_m != NULL) {
618 if (bf->bf_dmamap != NULL) {
619 bus_dmamap_destroy(sc->malo_dmat, bf->bf_dmamap);
620 bf->bf_dmamap = NULL;
623 STAILQ_INIT(&sc->malo_rxbuf);
624 if (sc->malo_rxdma.dd_bufptr != NULL) {
625 free(sc->malo_rxdma.dd_bufptr, M_MALODEV);
626 sc->malo_rxdma.dd_bufptr = NULL;
628 if (sc->malo_rxdma.dd_desc_len != 0)
629 malo_desc_cleanup(sc, &sc->malo_rxdma);
633 malo_txdma_cleanup(struct malo_softc *sc, struct malo_txq *txq)
635 struct malo_txbuf *bf;
636 struct ieee80211_node *ni;
638 STAILQ_FOREACH(bf, &txq->free, bf_list) {
639 if (bf->bf_m != NULL) {
647 * Reclaim node reference.
649 ieee80211_free_node(ni);
651 if (bf->bf_dmamap != NULL) {
652 bus_dmamap_destroy(sc->malo_dmat, bf->bf_dmamap);
653 bf->bf_dmamap = NULL;
656 STAILQ_INIT(&txq->free);
658 if (txq->dma.dd_bufptr != NULL) {
659 free(txq->dma.dd_bufptr, M_MALODEV);
660 txq->dma.dd_bufptr = NULL;
662 if (txq->dma.dd_desc_len != 0)
663 malo_desc_cleanup(sc, &txq->dma);
667 malo_dma_cleanup(struct malo_softc *sc)
671 for (i = 0; i < MALO_NUM_TX_QUEUES; i++)
672 malo_txdma_cleanup(sc, &sc->malo_txq[i]);
674 malo_rxdma_cleanup(sc);
678 malo_dma_setup(struct malo_softc *sc)
682 /* rxdma initializing. */
683 error = malo_rxdma_setup(sc);
687 /* NB: we just have 1 tx queue now. */
688 for (i = 0; i < MALO_NUM_TX_QUEUES; i++) {
689 error = malo_txdma_setup(sc, &sc->malo_txq[i]);
691 malo_dma_cleanup(sc);
696 malo_txq_init(sc, &sc->malo_txq[i], i);
703 malo_hal_set_rxtxdma(struct malo_softc *sc)
707 malo_bar0_write4(sc, sc->malo_hwspecs.rxdesc_read,
708 sc->malo_hwdma.rxdesc_read);
709 malo_bar0_write4(sc, sc->malo_hwspecs.rxdesc_write,
710 sc->malo_hwdma.rxdesc_read);
712 for (i = 0; i < MALO_NUM_TX_QUEUES; i++) {
714 sc->malo_hwspecs.wcbbase[i], sc->malo_hwdma.wcbbase[i]);
719 * Inform firmware of our tx/rx dma setup. The BAR 0 writes below are
720 * for compatibility with older firmware. For current firmware we send
721 * this information with a cmd block via malo_hal_sethwdma.
724 malo_setup_hwdma(struct malo_softc *sc)
727 struct malo_txq *txq;
729 sc->malo_hwdma.rxdesc_read = sc->malo_rxdma.dd_desc_paddr;
731 for (i = 0; i < MALO_NUM_TX_QUEUES; i++) {
732 txq = &sc->malo_txq[i];
733 sc->malo_hwdma.wcbbase[i] = txq->dma.dd_desc_paddr;
735 sc->malo_hwdma.maxnum_txwcb = malo_txbuf;
736 sc->malo_hwdma.maxnum_wcb = MALO_NUM_TX_QUEUES;
738 malo_hal_set_rxtxdma(sc);
744 malo_txq_init(struct malo_softc *sc, struct malo_txq *txq, int qnum)
746 struct malo_txbuf *bf, *bn;
747 struct malo_txdesc *ds;
749 MALO_TXQ_LOCK_INIT(sc, txq);
751 txq->txpri = 0; /* XXX */
753 STAILQ_FOREACH(bf, &txq->free, bf_list) {
757 bn = STAILQ_NEXT(bf, bf_list);
759 bn = STAILQ_FIRST(&txq->free);
760 ds->physnext = htole32(bn->bf_daddr);
762 STAILQ_INIT(&txq->active);
766 * Reclaim resources for a setup queue.
769 malo_tx_cleanupq(struct malo_softc *sc, struct malo_txq *txq)
772 MALO_TXQ_LOCK_DESTROY(txq);
776 * Allocate a tx buffer for sending a frame.
778 static struct malo_txbuf *
779 malo_getbuf(struct malo_softc *sc, struct malo_txq *txq)
781 struct malo_txbuf *bf;
784 bf = STAILQ_FIRST(&txq->free);
786 STAILQ_REMOVE_HEAD(&txq->free, bf_list);
789 MALO_TXQ_UNLOCK(txq);
791 DPRINTF(sc, MALO_DEBUG_XMIT,
792 "%s: out of xmit buffers on q %d\n", __func__, txq->qnum);
793 sc->malo_stats.mst_tx_qstop++;
799 malo_tx_dmasetup(struct malo_softc *sc, struct malo_txbuf *bf, struct mbuf *m0)
805 * Load the DMA map so any coalescing is done. This also calculates
806 * the number of descriptors we need.
808 error = bus_dmamap_load_mbuf_sg(sc->malo_dmat, bf->bf_dmamap, m0,
809 bf->bf_segs, &bf->bf_nseg,
811 if (error == EFBIG) {
812 /* XXX packet requires too many descriptors */
813 bf->bf_nseg = MALO_TXDESC + 1;
814 } else if (error != 0) {
815 sc->malo_stats.mst_tx_busdma++;
820 * Discard null packets and check for packets that require too many
821 * TX descriptors. We try to convert the latter to a cluster.
823 if (error == EFBIG) { /* too many desc's, linearize */
824 sc->malo_stats.mst_tx_linear++;
825 m = m_defrag(m0, M_NOWAIT);
828 sc->malo_stats.mst_tx_nombuf++;
832 error = bus_dmamap_load_mbuf_sg(sc->malo_dmat, bf->bf_dmamap, m0,
833 bf->bf_segs, &bf->bf_nseg,
836 sc->malo_stats.mst_tx_busdma++;
840 KASSERT(bf->bf_nseg <= MALO_TXDESC,
841 ("too many segments after defrag; nseg %u", bf->bf_nseg));
842 } else if (bf->bf_nseg == 0) { /* null packet, discard */
843 sc->malo_stats.mst_tx_nodata++;
847 DPRINTF(sc, MALO_DEBUG_XMIT, "%s: m %p len %u\n",
848 __func__, m0, m0->m_pkthdr.len);
849 bus_dmamap_sync(sc->malo_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE);
857 malo_printrxbuf(const struct malo_rxbuf *bf, u_int ix)
859 const struct malo_rxdesc *ds = bf->bf_desc;
860 uint32_t status = le32toh(ds->status);
862 printf("R[%2u] (DS.V:%p DS.P:0x%jx) NEXT:%08x DATA:%08x RC:%02x%s\n"
863 " STAT:%02x LEN:%04x SNR:%02x NF:%02x CHAN:%02x"
864 " RATE:%02x QOS:%04x\n", ix, ds, (uintmax_t)bf->bf_daddr,
865 le32toh(ds->physnext), le32toh(ds->physbuffdata),
867 ds->rxcontrol != MALO_RXD_CTRL_DRIVER_OWN ?
868 "" : (status & MALO_RXD_STATUS_OK) ? " *" : " !",
869 ds->status, le16toh(ds->pktlen), ds->snr, ds->nf, ds->channel,
870 ds->rate, le16toh(ds->qosctrl));
874 malo_printtxbuf(const struct malo_txbuf *bf, u_int qnum, u_int ix)
876 const struct malo_txdesc *ds = bf->bf_desc;
877 uint32_t status = le32toh(ds->status);
879 printf("Q%u[%3u]", qnum, ix);
880 printf(" (DS.V:%p DS.P:0x%jx)\n", ds, (uintmax_t)bf->bf_daddr);
881 printf(" NEXT:%08x DATA:%08x LEN:%04x STAT:%08x%s\n",
882 le32toh(ds->physnext),
883 le32toh(ds->pktptr), le16toh(ds->pktlen), status,
884 status & MALO_TXD_STATUS_USED ?
885 "" : (status & 3) != 0 ? " *" : " !");
886 printf(" RATE:%02x PRI:%x QOS:%04x SAP:%08x FORMAT:%04x\n",
887 ds->datarate, ds->txpriority, le16toh(ds->qosctrl),
888 le32toh(ds->sap_pktinfo), le16toh(ds->format));
891 const uint8_t *cp = (const uint8_t *) ds;
893 for (i = 0; i < sizeof(struct malo_txdesc); i++) {
894 printf("%02x ", cp[i]);
895 if (((i+1) % 16) == 0)
902 #endif /* MALO_DEBUG */
905 malo_updatetxrate(struct ieee80211_node *ni, int rix)
907 static const int ieeerates[] =
908 { 2, 4, 11, 22, 44, 12, 18, 24, 36, 48, 96, 108 };
909 if (rix < nitems(ieeerates))
910 ni->ni_txrate = ieeerates[rix];
914 malo_fix2rate(int fix_rate)
916 static const int rates[] =
917 { 2, 4, 11, 22, 12, 18, 24, 36, 48, 96, 108 };
918 return (fix_rate < nitems(rates) ? rates[fix_rate] : 0);
921 /* idiomatic shorthands: MS = mask+shift, SM = shift+mask */
922 #define MS(v,x) (((v) & x) >> x##_S)
923 #define SM(v,x) (((v) << x##_S) & x)
926 * Process completed xmit descriptors from the specified queue.
929 malo_tx_processq(struct malo_softc *sc, struct malo_txq *txq)
931 struct malo_txbuf *bf;
932 struct malo_txdesc *ds;
933 struct ieee80211_node *ni;
937 DPRINTF(sc, MALO_DEBUG_TX_PROC, "%s: tx queue %u\n",
938 __func__, txq->qnum);
939 for (nreaped = 0;; nreaped++) {
941 bf = STAILQ_FIRST(&txq->active);
943 MALO_TXQ_UNLOCK(txq);
947 MALO_TXDESC_SYNC(txq, ds,
948 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
949 if (ds->status & htole32(MALO_TXD_STATUS_FW_OWNED)) {
950 MALO_TXQ_UNLOCK(txq);
953 STAILQ_REMOVE_HEAD(&txq->active, bf_list);
954 MALO_TXQ_UNLOCK(txq);
957 if (sc->malo_debug & MALO_DEBUG_XMIT_DESC)
958 malo_printtxbuf(bf, txq->qnum, nreaped);
962 status = le32toh(ds->status);
963 if (status & MALO_TXD_STATUS_OK) {
964 uint16_t format = le16toh(ds->format);
965 uint8_t txant = MS(format, MALO_TXD_ANTENNA);
967 sc->malo_stats.mst_ant_tx[txant]++;
968 if (status & MALO_TXD_STATUS_OK_RETRY)
969 sc->malo_stats.mst_tx_retries++;
970 if (status & MALO_TXD_STATUS_OK_MORE_RETRY)
971 sc->malo_stats.mst_tx_mretries++;
972 malo_updatetxrate(ni, ds->datarate);
973 sc->malo_stats.mst_tx_rate = ds->datarate;
975 if (status & MALO_TXD_STATUS_FAILED_LINK_ERROR)
976 sc->malo_stats.mst_tx_linkerror++;
977 if (status & MALO_TXD_STATUS_FAILED_XRETRY)
978 sc->malo_stats.mst_tx_xretries++;
979 if (status & MALO_TXD_STATUS_FAILED_AGING)
980 sc->malo_stats.mst_tx_aging++;
982 /* XXX strip fw len in case header inspected */
983 m_adj(bf->bf_m, sizeof(uint16_t));
984 ieee80211_tx_complete(ni, bf->bf_m,
985 (status & MALO_TXD_STATUS_OK) == 0);
989 ds->status = htole32(MALO_TXD_STATUS_IDLE);
990 ds->pktlen = htole32(0);
992 bus_dmamap_sync(sc->malo_dmat, bf->bf_dmamap,
993 BUS_DMASYNC_POSTWRITE);
994 bus_dmamap_unload(sc->malo_dmat, bf->bf_dmamap);
999 STAILQ_INSERT_TAIL(&txq->free, bf, bf_list);
1001 MALO_TXQ_UNLOCK(txq);
1007 * Deferred processing of transmit interrupt.
1010 malo_tx_proc(void *arg, int npending)
1012 struct malo_softc *sc = arg;
1016 * Process each active queue.
1020 for (i = 0; i < MALO_NUM_TX_QUEUES; i++) {
1021 if (!STAILQ_EMPTY(&sc->malo_txq[i].active))
1022 nreaped += malo_tx_processq(sc, &sc->malo_txq[i]);
1033 malo_tx_start(struct malo_softc *sc, struct ieee80211_node *ni,
1034 struct malo_txbuf *bf, struct mbuf *m0)
1036 #define IS_DATA_FRAME(wh) \
1037 ((wh->i_fc[0] & (IEEE80211_FC0_TYPE_MASK)) == IEEE80211_FC0_TYPE_DATA)
1038 int error, ismcast, iswep;
1039 int copyhdrlen, hdrlen, pktlen;
1040 struct ieee80211_frame *wh;
1041 struct ieee80211com *ic = &sc->malo_ic;
1042 struct ieee80211vap *vap = ni->ni_vap;
1043 struct malo_txdesc *ds;
1044 struct malo_txrec *tr;
1045 struct malo_txq *txq;
1048 wh = mtod(m0, struct ieee80211_frame *);
1049 iswep = wh->i_fc[1] & IEEE80211_FC1_PROTECTED;
1050 ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1);
1051 copyhdrlen = hdrlen = ieee80211_anyhdrsize(wh);
1052 pktlen = m0->m_pkthdr.len;
1053 if (IEEE80211_QOS_HAS_SEQ(wh)) {
1054 qos = *(uint16_t *)ieee80211_getqos(wh);
1055 if (IEEE80211_IS_DSTODS(wh))
1056 copyhdrlen -= sizeof(qos);
1061 struct ieee80211_key *k;
1064 * Construct the 802.11 header+trailer for an encrypted
1065 * frame. The only reason this can fail is because of an
1066 * unknown or unsupported cipher/key type.
1068 * NB: we do this even though the firmware will ignore
1069 * what we've done for WEP and TKIP as we need the
1070 * ExtIV filled in for CCMP and this also adjusts
1071 * the headers which simplifies our work below.
1073 k = ieee80211_crypto_encap(ni, m0);
1076 * This can happen when the key is yanked after the
1077 * frame was queued. Just discard the frame; the
1078 * 802.11 layer counts failures and provides
1079 * debugging/diagnostics.
1086 * Adjust the packet length for the crypto additions
1087 * done during encap and any other bits that the f/w
1088 * will add later on.
1090 pktlen = m0->m_pkthdr.len;
1092 /* packet header may have moved, reset our local pointer */
1093 wh = mtod(m0, struct ieee80211_frame *);
1096 if (ieee80211_radiotap_active_vap(vap)) {
1097 sc->malo_tx_th.wt_flags = 0; /* XXX */
1099 sc->malo_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_WEP;
1100 sc->malo_tx_th.wt_txpower = ni->ni_txpower;
1101 sc->malo_tx_th.wt_antenna = sc->malo_txantenna;
1103 ieee80211_radiotap_tx(vap, m0);
1107 * Copy up/down the 802.11 header; the firmware requires
1108 * we present a 2-byte payload length followed by a
1109 * 4-address header (w/o QoS), followed (optionally) by
1110 * any WEP/ExtIV header (but only filled in for CCMP).
1111 * We are assured the mbuf has sufficient headroom to
1112 * prepend in-place by the setup of ic_headroom in
1115 if (hdrlen < sizeof(struct malo_txrec)) {
1116 const int space = sizeof(struct malo_txrec) - hdrlen;
1117 if (M_LEADINGSPACE(m0) < space) {
1118 /* NB: should never happen */
1119 device_printf(sc->malo_dev,
1120 "not enough headroom, need %d found %zd, "
1121 "m_flags 0x%x m_len %d\n",
1122 space, M_LEADINGSPACE(m0), m0->m_flags, m0->m_len);
1123 ieee80211_dump_pkt(ic,
1124 mtod(m0, const uint8_t *), m0->m_len, 0, -1);
1129 M_PREPEND(m0, space, M_NOWAIT);
1131 tr = mtod(m0, struct malo_txrec *);
1132 if (wh != (struct ieee80211_frame *) &tr->wh)
1133 ovbcopy(wh, &tr->wh, hdrlen);
1135 * Note: the "firmware length" is actually the length of the fully
1136 * formed "802.11 payload". That is, it's everything except for
1137 * the 802.11 header. In particular this includes all crypto
1138 * material including the MIC!
1140 tr->fwlen = htole16(pktlen - hdrlen);
1143 * Load the DMA map so any coalescing is done. This
1144 * also calculates the number of descriptors we need.
1146 error = malo_tx_dmasetup(sc, bf, m0);
1149 bf->bf_node = ni; /* NB: held reference */
1150 m0 = bf->bf_m; /* NB: may have changed */
1151 tr = mtod(m0, struct malo_txrec *);
1152 wh = (struct ieee80211_frame *)&tr->wh;
1155 * Formulate tx descriptor.
1160 ds->qosctrl = qos; /* NB: already little-endian */
1161 ds->pktptr = htole32(bf->bf_segs[0].ds_addr);
1162 ds->pktlen = htole16(bf->bf_segs[0].ds_len);
1163 /* NB: pPhysNext setup once, don't touch */
1164 ds->datarate = IS_DATA_FRAME(wh) ? 1 : 0;
1165 ds->sap_pktinfo = 0;
1169 * Select transmit rate.
1171 switch (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) {
1172 case IEEE80211_FC0_TYPE_MGT:
1173 sc->malo_stats.mst_tx_mgmt++;
1175 case IEEE80211_FC0_TYPE_CTL:
1178 case IEEE80211_FC0_TYPE_DATA:
1179 ds->txpriority = txq->qnum;
1182 device_printf(sc->malo_dev, "bogus frame type 0x%x (%s)\n",
1183 wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK, __func__);
1190 if (IFF_DUMPPKTS_XMIT(sc))
1191 ieee80211_dump_pkt(ic,
1192 mtod(m0, const uint8_t *)+sizeof(uint16_t),
1193 m0->m_len - sizeof(uint16_t), ds->datarate, -1);
1197 if (!IS_DATA_FRAME(wh))
1198 ds->status |= htole32(1);
1199 ds->status |= htole32(MALO_TXD_STATUS_FW_OWNED);
1200 STAILQ_INSERT_TAIL(&txq->active, bf, bf_list);
1201 MALO_TXDESC_SYNC(txq, ds, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
1204 MALO_TXQ_UNLOCK(txq);
1209 malo_transmit(struct ieee80211com *ic, struct mbuf *m)
1211 struct malo_softc *sc = ic->ic_softc;
1215 if (!sc->malo_running) {
1219 error = mbufq_enqueue(&sc->malo_snd, m);
1230 malo_start(struct malo_softc *sc)
1232 struct ieee80211_node *ni;
1233 struct malo_txq *txq = &sc->malo_txq[0];
1234 struct malo_txbuf *bf = NULL;
1238 MALO_LOCK_ASSERT(sc);
1240 if (!sc->malo_running || sc->malo_invalid)
1243 while ((m = mbufq_dequeue(&sc->malo_snd)) != NULL) {
1244 ni = (struct ieee80211_node *) m->m_pkthdr.rcvif;
1245 bf = malo_getbuf(sc, txq);
1247 mbufq_prepend(&sc->malo_snd, m);
1248 sc->malo_stats.mst_tx_qstop++;
1252 * Pass the frame to the h/w for transmission.
1254 if (malo_tx_start(sc, ni, bf, m)) {
1255 if_inc_counter(ni->ni_vap->iv_ifp,
1256 IFCOUNTER_OERRORS, 1);
1261 STAILQ_INSERT_HEAD(&txq->free, bf, bf_list);
1262 MALO_TXQ_UNLOCK(txq);
1264 ieee80211_free_node(ni);
1269 if (nqueued >= malo_txcoalesce) {
1271 * Poke the firmware to process queued frames;
1272 * see below about (lack of) locking.
1275 malo_hal_txstart(sc->malo_mh, 0/*XXX*/);
1281 * NB: We don't need to lock against tx done because
1282 * this just prods the firmware to check the transmit
1283 * descriptors. The firmware will also start fetching
1284 * descriptors by itself if it notices new ones are
1285 * present when it goes to deliver a tx done interrupt
1286 * to the host. So if we race with tx done processing
1287 * it's ok. Delivering the kick here rather than in
1288 * malo_tx_start is an optimization to avoid poking the
1289 * firmware for each packet.
1291 * NB: the queue id isn't used so 0 is ok.
1293 malo_hal_txstart(sc->malo_mh, 0/*XXX*/);
1298 malo_watchdog(void *arg)
1300 struct malo_softc *sc = arg;
1302 callout_reset(&sc->malo_watchdog_timer, hz, malo_watchdog, sc);
1303 if (sc->malo_timer == 0 || --sc->malo_timer > 0)
1306 if (sc->malo_running && !sc->malo_invalid) {
1307 device_printf(sc->malo_dev, "watchdog timeout\n");
1309 /* XXX no way to reset h/w. now */
1311 counter_u64_add(sc->malo_ic.ic_oerrors, 1);
1312 sc->malo_stats.mst_watchdog++;
1317 malo_hal_reset(struct malo_softc *sc)
1319 static int first = 0;
1320 struct ieee80211com *ic = &sc->malo_ic;
1321 struct malo_hal *mh = sc->malo_mh;
1325 * NB: when the device firstly is initialized, sometimes
1326 * firmware could override rx/tx dma registers so we re-set
1327 * these values once.
1329 malo_hal_set_rxtxdma(sc);
1333 malo_hal_setantenna(mh, MHA_ANTENNATYPE_RX, sc->malo_rxantenna);
1334 malo_hal_setantenna(mh, MHA_ANTENNATYPE_TX, sc->malo_txantenna);
1335 malo_hal_setradio(mh, 1, MHP_AUTO_PREAMBLE);
1336 malo_chan_set(sc, ic->ic_curchan);
1338 /* XXX needs other stuffs? */
1343 static __inline struct mbuf *
1344 malo_getrxmbuf(struct malo_softc *sc, struct malo_rxbuf *bf)
1350 /* XXX don't need mbuf, just dma buffer */
1351 m = m_getjcl(M_NOWAIT, MT_DATA, M_PKTHDR, MJUMPAGESIZE);
1353 sc->malo_stats.mst_rx_nombuf++; /* XXX */
1356 error = bus_dmamap_load(sc->malo_dmat, bf->bf_dmamap,
1357 mtod(m, caddr_t), MJUMPAGESIZE,
1358 malo_load_cb, &paddr, BUS_DMA_NOWAIT);
1360 device_printf(sc->malo_dev,
1361 "%s: bus_dmamap_load failed, error %d\n", __func__, error);
1365 bf->bf_data = paddr;
1366 bus_dmamap_sync(sc->malo_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE);
1372 malo_rxbuf_init(struct malo_softc *sc, struct malo_rxbuf *bf)
1374 struct malo_rxdesc *ds;
1377 if (bf->bf_m == NULL) {
1378 bf->bf_m = malo_getrxmbuf(sc, bf);
1379 if (bf->bf_m == NULL) {
1380 /* mark descriptor to be skipped */
1381 ds->rxcontrol = MALO_RXD_CTRL_OS_OWN;
1382 /* NB: don't need PREREAD */
1383 MALO_RXDESC_SYNC(sc, ds, BUS_DMASYNC_PREWRITE);
1393 ds->status = MALO_RXD_STATUS_IDLE;
1395 ds->pktlen = htole16(MALO_RXSIZE);
1397 ds->physbuffdata = htole32(bf->bf_data);
1398 /* NB: don't touch pPhysNext, set once */
1399 ds->rxcontrol = MALO_RXD_CTRL_DRIVER_OWN;
1400 MALO_RXDESC_SYNC(sc, ds, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
1406 * Setup the rx data structures. This should only be done once or we may get
1407 * out of sync with the firmware.
1410 malo_startrecv(struct malo_softc *sc)
1412 struct malo_rxbuf *bf, *prev;
1413 struct malo_rxdesc *ds;
1415 if (sc->malo_recvsetup == 1) {
1416 malo_mode_init(sc); /* set filters, etc. */
1421 STAILQ_FOREACH(bf, &sc->malo_rxbuf, bf_list) {
1422 int error = malo_rxbuf_init(sc, bf);
1424 DPRINTF(sc, MALO_DEBUG_RECV,
1425 "%s: malo_rxbuf_init failed %d\n",
1431 ds->physnext = htole32(bf->bf_daddr);
1438 htole32(STAILQ_FIRST(&sc->malo_rxbuf)->bf_daddr);
1441 sc->malo_recvsetup = 1;
1443 malo_mode_init(sc); /* set filters, etc. */
1449 malo_init_locked(struct malo_softc *sc)
1451 struct malo_hal *mh = sc->malo_mh;
1454 MALO_LOCK_ASSERT(sc);
1457 * Stop anything previously setup. This is safe whether this is
1458 * the first time through or not.
1463 * Push state to the firmware.
1465 if (!malo_hal_reset(sc)) {
1466 device_printf(sc->malo_dev,
1467 "%s: unable to reset hardware\n", __func__);
1472 * Setup recv (once); transmit is already good to go.
1474 error = malo_startrecv(sc);
1476 device_printf(sc->malo_dev,
1477 "%s: unable to start recv logic, error %d\n",
1483 * Enable interrupts.
1485 sc->malo_imask = MALO_A2HRIC_BIT_RX_RDY
1486 | MALO_A2HRIC_BIT_TX_DONE
1487 | MALO_A2HRIC_BIT_OPC_DONE
1488 | MALO_A2HRIC_BIT_MAC_EVENT
1489 | MALO_A2HRIC_BIT_RX_PROBLEM
1490 | MALO_A2HRIC_BIT_ICV_ERROR
1491 | MALO_A2HRIC_BIT_RADAR_DETECT
1492 | MALO_A2HRIC_BIT_CHAN_SWITCH;
1494 sc->malo_running = 1;
1495 malo_hal_intrset(mh, sc->malo_imask);
1496 callout_reset(&sc->malo_watchdog_timer, hz, malo_watchdog, sc);
1500 malo_init(void *arg)
1502 struct malo_softc *sc = (struct malo_softc *) arg;
1503 struct ieee80211com *ic = &sc->malo_ic;
1506 malo_init_locked(sc);
1509 if (sc->malo_running)
1510 ieee80211_start_all(ic); /* start all vap's */
1513 struct malo_copy_maddr_ctx {
1514 uint8_t macs[IEEE80211_ADDR_LEN * MALO_HAL_MCAST_MAX];
1519 malo_copy_maddr(void *arg, struct sockaddr_dl *sdl, u_int nmc)
1521 struct malo_copy_maddr_ctx *ctx = arg;
1523 if (ctx->nmc == MALO_HAL_MCAST_MAX)
1526 IEEE80211_ADDR_COPY(ctx->macs + (ctx->nmc * IEEE80211_ADDR_LEN),
1534 * Set the multicast filter contents into the hardware.
1537 malo_setmcastfilter(struct malo_softc *sc)
1539 struct malo_copy_maddr_ctx ctx;
1540 struct ieee80211com *ic = &sc->malo_ic;
1541 struct ieee80211vap *vap;
1544 if (ic->ic_opmode == IEEE80211_M_MONITOR || ic->ic_allmulti > 0 ||
1549 TAILQ_FOREACH(vap, &ic->ic_vaps, iv_next)
1550 if_foreach_llmaddr(vap->iv_ifp, malo_copy_maddr, &ctx);
1552 malo_hal_setmcast(sc->malo_mh, ctx.nmc, ctx.macs);
1556 * XXX we don't know how to set the f/w for supporting
1557 * IFF_ALLMULTI | IFF_PROMISC cases
1563 malo_mode_init(struct malo_softc *sc)
1565 struct ieee80211com *ic = &sc->malo_ic;
1566 struct malo_hal *mh = sc->malo_mh;
1568 malo_hal_setpromisc(mh, ic->ic_promisc > 0);
1569 malo_setmcastfilter(sc);
1575 malo_tx_draintxq(struct malo_softc *sc, struct malo_txq *txq)
1577 struct ieee80211_node *ni;
1578 struct malo_txbuf *bf;
1582 * NB: this assumes output has been stopped and
1583 * we do not need to block malo_tx_tasklet
1585 for (ix = 0;; ix++) {
1587 bf = STAILQ_FIRST(&txq->active);
1589 MALO_TXQ_UNLOCK(txq);
1592 STAILQ_REMOVE_HEAD(&txq->active, bf_list);
1593 MALO_TXQ_UNLOCK(txq);
1595 if (sc->malo_debug & MALO_DEBUG_RESET) {
1596 struct ieee80211com *ic = &sc->malo_ic;
1597 const struct malo_txrec *tr =
1598 mtod(bf->bf_m, const struct malo_txrec *);
1599 malo_printtxbuf(bf, txq->qnum, ix);
1600 ieee80211_dump_pkt(ic, (const uint8_t *)&tr->wh,
1601 bf->bf_m->m_len - sizeof(tr->fwlen), 0, -1);
1603 #endif /* MALO_DEBUG */
1604 bus_dmamap_unload(sc->malo_dmat, bf->bf_dmamap);
1609 * Reclaim node reference.
1611 ieee80211_free_node(ni);
1617 STAILQ_INSERT_TAIL(&txq->free, bf, bf_list);
1619 MALO_TXQ_UNLOCK(txq);
1624 malo_stop(struct malo_softc *sc)
1626 struct malo_hal *mh = sc->malo_mh;
1629 DPRINTF(sc, MALO_DEBUG_ANY, "%s: invalid %u running %u\n",
1630 __func__, sc->malo_invalid, sc->malo_running);
1632 MALO_LOCK_ASSERT(sc);
1634 if (!sc->malo_running)
1638 * Shutdown the hardware and driver:
1639 * disable interrupts
1640 * turn off the radio
1641 * drain and release tx queues
1643 * Note that some of this work is not possible if the hardware
1644 * is gone (invalid).
1646 sc->malo_running = 0;
1647 callout_stop(&sc->malo_watchdog_timer);
1649 /* disable interrupt. */
1650 malo_hal_intrset(mh, 0);
1651 /* turn off the radio. */
1652 malo_hal_setradio(mh, 0, MHP_AUTO_PREAMBLE);
1654 /* drain and release tx queues. */
1655 for (i = 0; i < MALO_NUM_TX_QUEUES; i++)
1656 malo_tx_draintxq(sc, &sc->malo_txq[i]);
1660 malo_parent(struct ieee80211com *ic)
1662 struct malo_softc *sc = ic->ic_softc;
1666 if (ic->ic_nrunning > 0) {
1668 * Beware of being called during attach/detach
1669 * to reset promiscuous mode. In that case we
1670 * will still be marked UP but not RUNNING.
1671 * However trying to re-init the interface
1672 * is the wrong thing to do as we've already
1673 * torn down much of our state. There's
1674 * probably a better way to deal with this.
1676 if (!sc->malo_running && !sc->malo_invalid) {
1681 * To avoid rescanning another access point,
1682 * do not call malo_init() here. Instead,
1683 * only reflect promisc mode settings.
1686 } else if (sc->malo_running)
1690 ieee80211_start_all(ic);
1694 * Callback from the 802.11 layer to update the slot time
1695 * based on the current setting. We use it to notify the
1696 * firmware of ERP changes and the f/w takes care of things
1697 * like slot time and preamble.
1700 malo_updateslot(struct ieee80211com *ic)
1702 struct malo_softc *sc = ic->ic_softc;
1703 struct malo_hal *mh = sc->malo_mh;
1706 /* NB: can be called early; suppress needless cmds */
1707 if (!sc->malo_running)
1710 DPRINTF(sc, MALO_DEBUG_RESET,
1711 "%s: chan %u MHz/flags 0x%x %s slot, (ic_flags 0x%x)\n",
1712 __func__, ic->ic_curchan->ic_freq, ic->ic_curchan->ic_flags,
1713 ic->ic_flags & IEEE80211_F_SHSLOT ? "short" : "long", ic->ic_flags);
1715 if (ic->ic_flags & IEEE80211_F_SHSLOT)
1716 error = malo_hal_set_slot(mh, 1);
1718 error = malo_hal_set_slot(mh, 0);
1721 device_printf(sc->malo_dev, "setting %s slot failed\n",
1722 ic->ic_flags & IEEE80211_F_SHSLOT ? "short" : "long");
1726 malo_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg)
1728 struct ieee80211com *ic = vap->iv_ic;
1729 struct malo_softc *sc = ic->ic_softc;
1730 struct malo_hal *mh = sc->malo_mh;
1733 DPRINTF(sc, MALO_DEBUG_STATE, "%s: %s -> %s\n", __func__,
1734 ieee80211_state_name[vap->iv_state],
1735 ieee80211_state_name[nstate]);
1738 * Invoke the net80211 layer first so iv_bss is setup.
1740 error = MALO_VAP(vap)->malo_newstate(vap, nstate, arg);
1744 if (nstate == IEEE80211_S_RUN && vap->iv_state != IEEE80211_S_RUN) {
1745 struct ieee80211_node *ni = vap->iv_bss;
1746 enum ieee80211_phymode mode = ieee80211_chan2mode(ni->ni_chan);
1747 const struct ieee80211_txparam *tp = &vap->iv_txparms[mode];
1749 DPRINTF(sc, MALO_DEBUG_STATE,
1750 "%s: %s(RUN): iv_flags 0x%08x bintvl %d bssid %s "
1751 "capinfo 0x%04x chan %d associd 0x%x mode %d rate %d\n",
1752 vap->iv_ifp->if_xname, __func__, vap->iv_flags,
1753 ni->ni_intval, ether_sprintf(ni->ni_bssid), ni->ni_capinfo,
1754 ieee80211_chan2ieee(ic, ic->ic_curchan),
1755 ni->ni_associd, mode, tp->ucastrate);
1757 malo_hal_setradio(mh, 1,
1758 (ic->ic_flags & IEEE80211_F_SHPREAMBLE) ?
1759 MHP_SHORT_PREAMBLE : MHP_LONG_PREAMBLE);
1760 malo_hal_setassocid(sc->malo_mh, ni->ni_bssid, ni->ni_associd);
1761 malo_hal_set_rate(mh, mode,
1762 tp->ucastrate == IEEE80211_FIXED_RATE_NONE ?
1763 0 : malo_fix2rate(tp->ucastrate));
1769 malo_raw_xmit(struct ieee80211_node *ni, struct mbuf *m,
1770 const struct ieee80211_bpf_params *params)
1772 struct ieee80211com *ic = ni->ni_ic;
1773 struct malo_softc *sc = ic->ic_softc;
1774 struct malo_txbuf *bf;
1775 struct malo_txq *txq;
1777 if (!sc->malo_running || sc->malo_invalid) {
1783 * Grab a TX buffer and associated resources. Note that we depend
1784 * on the classification by the 802.11 layer to get to the right h/w
1785 * queue. Management frames must ALWAYS go on queue 1 but we
1786 * cannot just force that here because we may receive non-mgt frames.
1788 txq = &sc->malo_txq[0];
1789 bf = malo_getbuf(sc, txq);
1796 * Pass the frame to the h/w for transmission.
1798 if (malo_tx_start(sc, ni, bf, m) != 0) {
1802 STAILQ_INSERT_HEAD(&txq->free, bf, bf_list);
1804 MALO_TXQ_UNLOCK(txq);
1806 return EIO; /* XXX */
1810 * NB: We don't need to lock against tx done because this just
1811 * prods the firmware to check the transmit descriptors. The firmware
1812 * will also start fetching descriptors by itself if it notices
1813 * new ones are present when it goes to deliver a tx done interrupt
1814 * to the host. So if we race with tx done processing it's ok.
1815 * Delivering the kick here rather than in malo_tx_start is
1816 * an optimization to avoid poking the firmware for each packet.
1818 * NB: the queue id isn't used so 0 is ok.
1820 malo_hal_txstart(sc->malo_mh, 0/*XXX*/);
1826 malo_sysctlattach(struct malo_softc *sc)
1829 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->malo_dev);
1830 struct sysctl_oid *tree = device_get_sysctl_tree(sc->malo_dev);
1832 sc->malo_debug = malo_debug;
1833 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
1834 "debug", CTLFLAG_RW, &sc->malo_debug, 0,
1835 "control debugging printfs");
1840 malo_announce(struct malo_softc *sc)
1843 device_printf(sc->malo_dev,
1844 "versions [hw %d fw %d.%d.%d.%d] (regioncode %d)\n",
1845 sc->malo_hwspecs.hwversion,
1846 (sc->malo_hwspecs.fw_releasenum >> 24) & 0xff,
1847 (sc->malo_hwspecs.fw_releasenum >> 16) & 0xff,
1848 (sc->malo_hwspecs.fw_releasenum >> 8) & 0xff,
1849 (sc->malo_hwspecs.fw_releasenum >> 0) & 0xff,
1850 sc->malo_hwspecs.regioncode);
1852 if (bootverbose || malo_rxbuf != MALO_RXBUF)
1853 device_printf(sc->malo_dev,
1854 "using %u rx buffers\n", malo_rxbuf);
1855 if (bootverbose || malo_txbuf != MALO_TXBUF)
1856 device_printf(sc->malo_dev,
1857 "using %u tx buffers\n", malo_txbuf);
1861 * Convert net80211 channel to a HAL channel.
1864 malo_mapchan(struct malo_hal_channel *hc, const struct ieee80211_channel *chan)
1866 hc->channel = chan->ic_ieee;
1868 *(uint32_t *)&hc->flags = 0;
1869 if (IEEE80211_IS_CHAN_2GHZ(chan))
1870 hc->flags.freqband = MALO_FREQ_BAND_2DOT4GHZ;
1874 * Set/change channels. If the channel is really being changed,
1875 * it's done by reseting the chip. To accomplish this we must
1876 * first cleanup any pending DMA, then restart stuff after a la
1880 malo_chan_set(struct malo_softc *sc, struct ieee80211_channel *chan)
1882 struct malo_hal *mh = sc->malo_mh;
1883 struct malo_hal_channel hchan;
1885 DPRINTF(sc, MALO_DEBUG_RESET, "%s: chan %u MHz/flags 0x%x\n",
1886 __func__, chan->ic_freq, chan->ic_flags);
1889 * Convert to a HAL channel description with the flags constrained
1890 * to reflect the current operating mode.
1892 malo_mapchan(&hchan, chan);
1893 malo_hal_intrset(mh, 0); /* disable interrupts */
1894 malo_hal_setchannel(mh, &hchan);
1895 malo_hal_settxpower(mh, &hchan);
1898 * Update internal state.
1900 sc->malo_tx_th.wt_chan_freq = htole16(chan->ic_freq);
1901 sc->malo_rx_th.wr_chan_freq = htole16(chan->ic_freq);
1902 if (IEEE80211_IS_CHAN_ANYG(chan)) {
1903 sc->malo_tx_th.wt_chan_flags = htole16(IEEE80211_CHAN_G);
1904 sc->malo_rx_th.wr_chan_flags = htole16(IEEE80211_CHAN_G);
1906 sc->malo_tx_th.wt_chan_flags = htole16(IEEE80211_CHAN_B);
1907 sc->malo_rx_th.wr_chan_flags = htole16(IEEE80211_CHAN_B);
1909 sc->malo_curchan = hchan;
1910 malo_hal_intrset(mh, sc->malo_imask);
1916 malo_scan_start(struct ieee80211com *ic)
1918 struct malo_softc *sc = ic->ic_softc;
1920 DPRINTF(sc, MALO_DEBUG_STATE, "%s\n", __func__);
1924 malo_scan_end(struct ieee80211com *ic)
1926 struct malo_softc *sc = ic->ic_softc;
1928 DPRINTF(sc, MALO_DEBUG_STATE, "%s\n", __func__);
1932 malo_set_channel(struct ieee80211com *ic)
1934 struct malo_softc *sc = ic->ic_softc;
1936 (void) malo_chan_set(sc, ic->ic_curchan);
1940 malo_rx_proc(void *arg, int npending)
1942 struct epoch_tracker et;
1943 struct malo_softc *sc = arg;
1944 struct ieee80211com *ic = &sc->malo_ic;
1945 struct malo_rxbuf *bf;
1946 struct malo_rxdesc *ds;
1947 struct mbuf *m, *mnew;
1948 struct ieee80211_qosframe *wh;
1949 struct ieee80211_node *ni;
1950 int off, len, hdrlen, pktlen, rssi, ntodo;
1951 uint8_t *data, status;
1952 uint32_t readptr, writeptr;
1954 DPRINTF(sc, MALO_DEBUG_RX_PROC,
1955 "%s: pending %u rdptr(0x%x) 0x%x wrptr(0x%x) 0x%x\n",
1957 sc->malo_hwspecs.rxdesc_read,
1958 malo_bar0_read4(sc, sc->malo_hwspecs.rxdesc_read),
1959 sc->malo_hwspecs.rxdesc_write,
1960 malo_bar0_read4(sc, sc->malo_hwspecs.rxdesc_write));
1962 readptr = malo_bar0_read4(sc, sc->malo_hwspecs.rxdesc_read);
1963 writeptr = malo_bar0_read4(sc, sc->malo_hwspecs.rxdesc_write);
1964 if (readptr == writeptr)
1967 bf = sc->malo_rxnext;
1968 for (ntodo = malo_rxquota; ntodo > 0 && readptr != writeptr; ntodo--) {
1970 bf = STAILQ_FIRST(&sc->malo_rxbuf);
1974 if (bf->bf_m == NULL) {
1976 * If data allocation failed previously there
1977 * will be no buffer; try again to re-populate it.
1978 * Note the firmware will not advance to the next
1979 * descriptor with a dma buffer so we must mimic
1980 * this or we'll get out of sync.
1982 DPRINTF(sc, MALO_DEBUG_ANY,
1983 "%s: rx buf w/o dma memory\n", __func__);
1984 (void)malo_rxbuf_init(sc, bf);
1987 MALO_RXDESC_SYNC(sc, ds,
1988 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
1989 if (ds->rxcontrol != MALO_RXD_CTRL_DMA_OWN)
1992 readptr = le32toh(ds->physnext);
1995 if (sc->malo_debug & MALO_DEBUG_RECV_DESC)
1996 malo_printrxbuf(bf, 0);
1998 status = ds->status;
1999 if (status & MALO_RXD_STATUS_DECRYPT_ERR_MASK) {
2000 counter_u64_add(ic->ic_ierrors, 1);
2004 * Sync the data buffer.
2006 len = le16toh(ds->pktlen);
2007 bus_dmamap_sync(sc->malo_dmat, bf->bf_dmamap,
2008 BUS_DMASYNC_POSTREAD);
2010 * The 802.11 header is provided all or in part at the front;
2011 * use it to calculate the true size of the header that we'll
2012 * construct below. We use this to figure out where to copy
2013 * payload prior to constructing the header.
2016 data = mtod(m, uint8_t *);
2017 hdrlen = ieee80211_anyhdrsize(data + sizeof(uint16_t));
2018 off = sizeof(uint16_t) + sizeof(struct ieee80211_frame_addr4);
2021 * Calculate RSSI. XXX wrong
2023 rssi = 2 * ((int) ds->snr - ds->nf); /* NB: .5 dBm */
2027 pktlen = hdrlen + (len - off);
2029 * NB: we know our frame is at least as large as
2030 * IEEE80211_MIN_LEN because there is a 4-address frame at
2031 * the front. Hence there's no need to vet the packet length.
2032 * If the frame in fact is too small it should be discarded
2033 * at the net80211 layer.
2036 /* XXX don't need mbuf, just dma buffer */
2037 mnew = malo_getrxmbuf(sc, bf);
2039 counter_u64_add(ic->ic_ierrors, 1);
2043 * Attach the dma buffer to the mbuf; malo_rxbuf_init will
2044 * re-setup the rx descriptor using the replacement dma
2045 * buffer we just installed above.
2048 m->m_data += off - hdrlen;
2049 m->m_pkthdr.len = m->m_len = pktlen;
2052 * Piece 802.11 header together.
2054 wh = mtod(m, struct ieee80211_qosframe *);
2055 /* NB: don't need to do this sometimes but ... */
2056 /* XXX special case so we can memcpy after m_devget? */
2057 ovbcopy(data + sizeof(uint16_t), wh, hdrlen);
2058 if (IEEE80211_QOS_HAS_SEQ(wh))
2059 *(uint16_t *)ieee80211_getqos(wh) = ds->qosctrl;
2060 if (ieee80211_radiotap_active(ic)) {
2061 sc->malo_rx_th.wr_flags = 0;
2062 sc->malo_rx_th.wr_rate = ds->rate;
2063 sc->malo_rx_th.wr_antsignal = rssi;
2064 sc->malo_rx_th.wr_antnoise = ds->nf;
2067 if (IFF_DUMPPKTS_RECV(sc, wh)) {
2068 ieee80211_dump_pkt(ic, mtod(m, caddr_t),
2069 len, ds->rate, rssi);
2073 ni = ieee80211_find_rxnode(ic,
2074 (struct ieee80211_frame_min *)wh);
2075 NET_EPOCH_ENTER(et);
2077 (void) ieee80211_input(ni, m, rssi, ds->nf);
2078 ieee80211_free_node(ni);
2080 (void) ieee80211_input_all(ic, m, rssi, ds->nf);
2083 /* NB: ignore ENOMEM so we process more descriptors */
2084 (void) malo_rxbuf_init(sc, bf);
2085 bf = STAILQ_NEXT(bf, bf_list);
2088 malo_bar0_write4(sc, sc->malo_hwspecs.rxdesc_read, readptr);
2089 sc->malo_rxnext = bf;
2091 if (mbufq_first(&sc->malo_snd) != NULL)
2096 * Reclaim all tx queue resources.
2099 malo_tx_cleanup(struct malo_softc *sc)
2103 for (i = 0; i < MALO_NUM_TX_QUEUES; i++)
2104 malo_tx_cleanupq(sc, &sc->malo_txq[i]);
2108 malo_detach(struct malo_softc *sc)
2110 struct ieee80211com *ic = &sc->malo_ic;
2114 if (sc->malo_tq != NULL) {
2115 taskqueue_drain(sc->malo_tq, &sc->malo_rxtask);
2116 taskqueue_drain(sc->malo_tq, &sc->malo_txtask);
2117 taskqueue_free(sc->malo_tq);
2122 * NB: the order of these is important:
2123 * o call the 802.11 layer before detaching the hal to
2124 * insure callbacks into the driver to delete global
2125 * key cache entries can be handled
2126 * o reclaim the tx queue data structures after calling
2127 * the 802.11 layer as we'll get called back to reclaim
2128 * node state and potentially want to use them
2129 * o to cleanup the tx queues the hal is called, so detach
2131 * Other than that, it's straightforward...
2133 ieee80211_ifdetach(ic);
2134 callout_drain(&sc->malo_watchdog_timer);
2135 malo_dma_cleanup(sc);
2136 malo_tx_cleanup(sc);
2137 malo_hal_detach(sc->malo_mh);
2138 mbufq_drain(&sc->malo_snd);
2139 MALO_LOCK_DESTROY(sc);
2145 malo_shutdown(struct malo_softc *sc)
2152 malo_suspend(struct malo_softc *sc)
2159 malo_resume(struct malo_softc *sc)
2162 if (sc->malo_ic.ic_nrunning > 0)