2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
4 * Copyright (c) 2008, Pyun YongHyeon <yongari@FreeBSD.org>
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice unmodified, this list of conditions, and the following
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 #include <sys/cdefs.h>
31 __FBSDID("$FreeBSD$");
34 * Driver for the Attansic/Atheros F1 10/100/1000 PHY.
37 #include <sys/param.h>
38 #include <sys/systm.h>
39 #include <sys/kernel.h>
40 #include <sys/module.h>
41 #include <sys/socket.h>
45 #include <net/if_media.h>
47 #include <dev/mii/mii.h>
48 #include <dev/mii/miivar.h>
51 #include <dev/mii/atphyreg.h>
53 #include "miibus_if.h"
55 static int atphy_probe(device_t);
56 static int atphy_attach(device_t);
58 static device_method_t atphy_methods[] = {
59 /* Device interface. */
60 DEVMETHOD(device_probe, atphy_probe),
61 DEVMETHOD(device_attach, atphy_attach),
62 DEVMETHOD(device_detach, mii_phy_detach),
63 DEVMETHOD(device_shutdown, bus_generic_shutdown),
67 static driver_t atphy_driver = {
70 sizeof(struct mii_softc)
73 DRIVER_MODULE(atphy, miibus, atphy_driver, 0, 0);
75 static int atphy_service(struct mii_softc *, struct mii_data *, int);
76 static void atphy_status(struct mii_softc *);
77 static void atphy_reset(struct mii_softc *);
78 static uint16_t atphy_anar(struct ifmedia_entry *);
79 static int atphy_setmedia(struct mii_softc *, int);
81 static const struct mii_phydesc atphys[] = {
82 MII_PHY_DESC(xxATHEROS, F1),
83 MII_PHY_DESC(xxATHEROS, F1_7),
84 MII_PHY_DESC(xxATHEROS, AR8021),
85 MII_PHY_DESC(xxATHEROS, F2),
89 static const struct mii_phy_funcs atphy_funcs = {
96 atphy_probe(device_t dev)
99 return (mii_phy_dev_probe(dev, atphys, BUS_PROBE_DEFAULT));
103 atphy_attach(device_t dev)
106 mii_phy_dev_attach(dev, MIIF_NOMANPAUSE, &atphy_funcs, 1);
111 atphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
113 struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
114 uint16_t anar, bmcr, bmsr;
121 if (IFM_SUBTYPE(ife->ifm_media) == IFM_AUTO ||
122 IFM_SUBTYPE(ife->ifm_media) == IFM_1000_T) {
123 atphy_setmedia(sc, ife->ifm_media);
128 switch (IFM_SUBTYPE(ife->ifm_media)) {
136 bmcr = PHY_READ(sc, MII_BMCR);
139 * Due to an unknown reason powering down PHY resulted
140 * in unexpected results such as inaccessibility of
141 * hardware of freshly rebooted system. Disable
142 * powering down PHY until I got more information for
143 * Attansic/Atheros PHY hardwares.
145 PHY_WRITE(sc, MII_BMCR, bmcr | BMCR_ISO);
151 anar = atphy_anar(ife);
152 if ((ife->ifm_media & IFM_FDX) != 0) {
154 if ((ife->ifm_media & IFM_FLOW) != 0 ||
155 (sc->mii_flags & MIIF_FORCEPAUSE) != 0)
156 anar |= ANAR_PAUSE_TOWARDS;
159 if ((sc->mii_extcapabilities & (EXTSR_1000TFDX |
160 EXTSR_1000THDX)) != 0)
161 PHY_WRITE(sc, MII_100T2CR, 0);
162 PHY_WRITE(sc, MII_ANAR, anar | ANAR_CSMA);
165 * Reset the PHY so all changes take effect.
167 PHY_WRITE(sc, MII_BMCR, bmcr | BMCR_RESET | BMCR_AUTOEN |
174 * Only used for autonegotiation.
176 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) {
183 * Read the status register twice; BMSR_LINK is latch-low.
185 bmsr = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR);
186 if (bmsr & BMSR_LINK) {
191 /* Announce link loss right after it happens. */
192 if (sc->mii_ticks++ == 0)
194 if (sc->mii_ticks <= sc->mii_anegticks)
198 atphy_setmedia(sc, ife->ifm_media);
202 /* Update the media status. */
205 /* Callback if something changed. */
206 mii_phy_update(sc, cmd);
211 atphy_status(struct mii_softc *sc)
213 struct mii_data *mii = sc->mii_pdata;
214 uint32_t bmsr, bmcr, ssr;
216 mii->mii_media_status = IFM_AVALID;
217 mii->mii_media_active = IFM_ETHER;
219 bmsr = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR);
220 if ((bmsr & BMSR_LINK) != 0)
221 mii->mii_media_status |= IFM_ACTIVE;
223 bmcr = PHY_READ(sc, MII_BMCR);
224 if ((bmcr & BMCR_ISO) != 0) {
225 mii->mii_media_active |= IFM_NONE;
226 mii->mii_media_status = 0;
230 if ((bmcr & BMCR_LOOP) != 0)
231 mii->mii_media_active |= IFM_LOOP;
233 ssr = PHY_READ(sc, ATPHY_SSR);
234 if ((ssr & ATPHY_SSR_SPD_DPLX_RESOLVED) == 0) {
235 /* Erg, still trying, I guess... */
236 mii->mii_media_active |= IFM_NONE;
240 switch (ssr & ATPHY_SSR_SPEED_MASK) {
241 case ATPHY_SSR_1000MBS:
242 mii->mii_media_active |= IFM_1000_T;
244 * atphy(4) has a valid link so reset mii_ticks.
245 * Resetting mii_ticks is needed in order to
246 * detect link loss after auto-negotiation.
250 case ATPHY_SSR_100MBS:
251 mii->mii_media_active |= IFM_100_TX;
254 case ATPHY_SSR_10MBS:
255 mii->mii_media_active |= IFM_10_T;
259 mii->mii_media_active |= IFM_NONE;
263 if ((ssr & ATPHY_SSR_DUPLEX) != 0)
264 mii->mii_media_active |= IFM_FDX | mii_phy_flowstatus(sc);
266 mii->mii_media_active |= IFM_HDX;
268 if ((IFM_SUBTYPE(mii->mii_media_active) == IFM_1000_T) &&
269 (PHY_READ(sc, MII_100T2SR) & GTSR_MS_RES) != 0)
270 mii->mii_media_active |= IFM_ETH_MASTER;
274 atphy_reset(struct mii_softc *sc)
276 struct ifmedia_entry *ife = sc->mii_pdata->mii_media.ifm_cur;
280 /* Take PHY out of power down mode. */
281 PHY_WRITE(sc, 29, 0x29);
282 PHY_WRITE(sc, 30, 0);
284 reg = PHY_READ(sc, ATPHY_SCR);
285 /* Enable automatic crossover. */
286 reg |= ATPHY_SCR_AUTO_X_MODE;
287 /* Disable power down. */
288 reg &= ~ATPHY_SCR_MAC_PDOWN;
289 /* Enable CRS on Tx. */
290 reg |= ATPHY_SCR_ASSERT_CRS_ON_TX;
291 /* Auto correction for reversed cable polarity. */
292 reg |= ATPHY_SCR_POLARITY_REVERSAL;
293 PHY_WRITE(sc, ATPHY_SCR, reg);
295 /* Workaround F1 bug to reset phy. */
296 atphy_setmedia(sc, ife == NULL ? IFM_AUTO : ife->ifm_media);
298 for (i = 0; i < 1000; i++) {
300 if ((PHY_READ(sc, MII_BMCR) & BMCR_RESET) == 0)
306 atphy_anar(struct ifmedia_entry *ife)
311 switch (IFM_SUBTYPE(ife->ifm_media)) {
313 anar |= ANAR_TX_FD | ANAR_TX | ANAR_10_FD | ANAR_10;
327 if ((ife->ifm_media & IFM_FDX) != 0) {
328 if (IFM_SUBTYPE(ife->ifm_media) == IFM_100_TX)
338 atphy_setmedia(struct mii_softc *sc, int media)
342 anar = BMSR_MEDIA_TO_ANAR(sc->mii_capabilities) | ANAR_CSMA;
343 if ((IFM_SUBTYPE(media) == IFM_AUTO || (media & IFM_FDX) != 0) &&
344 ((media & IFM_FLOW) != 0 ||
345 (sc->mii_flags & MIIF_FORCEPAUSE) != 0))
346 anar |= ANAR_PAUSE_TOWARDS;
347 PHY_WRITE(sc, MII_ANAR, anar);
348 if ((sc->mii_extcapabilities &
349 (EXTSR_1000TFDX | EXTSR_1000THDX)) != 0)
350 PHY_WRITE(sc, MII_100T2CR, GTCR_ADV_1000TFDX |
352 else if (sc->mii_mpd_model == MII_MODEL_xxATHEROS_F1) {
354 * AR8132 has 10/100 PHY and the PHY uses the same
355 * model number of F1 gigabit PHY. The PHY has no
356 * ability to establish gigabit link so explicitly
357 * disable 1000baseT configuration for the PHY.
358 * Otherwise, there is a case that atphy(4) could
359 * not establish a link against gigabit link partner
360 * unless the link partner supports down-shifting.
362 PHY_WRITE(sc, MII_100T2CR, 0);
364 PHY_WRITE(sc, MII_BMCR, BMCR_RESET | BMCR_AUTOEN | BMCR_STARTNEG);
366 return (EJUSTRETURN);